sim/m32r/sim-main.h

   1 /* Main header for the m32r.  */
   2
   3 #ifndef SIM_MAIN_H
   4 #define SIM_MAIN_H
   5
   6 #define USING_SIM_BASE_H /* FIXME: quick hack */
   7
   8 struct _sim_cpu; /* FIXME: should be in sim-basics.h */
   9 typedef struct _sim_cpu SIM_CPU;
  10
  11 #include "symcat.h"
  12 #include "sim-basics.h"
  13 #include "cgen-types.h"
  14 #include "m32r-desc.h"
  15 #include "m32r-opc.h"
  16 #include "arch.h"
  17
  18 /* These must be defined before sim-base.h.  */
  19 typedef USI sim_cia;
  20
  21 #define CIA_GET(cpu)     CPU_PC_GET (cpu)
  22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
  23
  24 #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
  25 do { \
  26   if (cpu) /* null if ctrl-c */ \
  27     sim_pc_set ((cpu), (cia)); \
  28 } while (0)
  29 #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
  30 do { \
  31   sim_pc_set ((cpu), (cia)); \
  32 } while (0)
  33
  34 #include "sim-base.h"
  35 #include "cgen-sim.h"
  36 #include "m32r-sim.h"
  37 #include "opcode/cgen.h"
  38 \f
  39 /* The _sim_cpu struct.  */
  40
  41 struct _sim_cpu {
  42   /* sim/common cpu base.  */
  43   sim_cpu_base base;
  44
  45   /* Static parts of cgen.  */
  46   CGEN_CPU cgen_cpu;
  47
  48   M32R_MISC_PROFILE m32r_misc_profile;
  49 #define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
  50
  51   /* CPU specific parts go here.
  52      Note that in files that don't need to access these pieces WANT_CPU_FOO
  53      won't be defined and thus these parts won't appear.  This is ok in the
  54      sense that things work.  It is a source of bugs though.
  55      One has to of course be careful to not take the size of this
  56      struct and no structure members accessed in non-cpu specific files can
  57      go after here.  Oh for a better language.  */
  58 #if defined (WANT_CPU_M32RBF)
  59   M32RBF_CPU_DATA cpu_data;
  60 #endif
  61 };
  62 \f
  63 /* The sim_state struct.  */
  64
  65 struct sim_state {
  66   sim_cpu *cpu;
  67 #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
  68
  69   CGEN_STATE cgen_state;
  70
  71   sim_state_base base;
  72 };
  73 \f
  74 /* Misc.  */
  75
  76 /* Catch address exceptions.  */
  77 extern SIM_CORE_SIGNAL_FN m32r_core_signal;
  78 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
  79 m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
  80                   (TRANSFER), (ERROR))
  81
  82 /* Default memory size.  */
  83 #define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
  84
  85 #endif /* SIM_MAIN_H */