sim/microblaze/sim-main.h

   1 #ifndef MICROBLAZE_SIM_MAIN
   2 #define MICROBLAZE_SIM_MAIN
   3
   4 /* Copyright 2009-2014 Free Software Foundation, Inc.
   5
   6    This file is part of the Xilinx MicroBlaze simulator.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "microblaze.h"
  22 #include "sim-basics.h"
  23 typedef address_word sim_cia;
  24 #include "sim-base.h"
  25
  26 /* The machine state.
  27    This state is maintained in host byte order.  The
  28    fetch/store register functions must translate between host
  29    byte order and the target processor byte order.
  30    Keeping this data in target byte order simplifies the register
  31    read/write functions.  Keeping this data in native order improves
  32    the performance of the simulator.  Simulation speed is deemed more
  33    important.  */
  34
  35 /* The ordering of the microblaze_regset structure is matched in the
  36    gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro.  */
  37  struct microblaze_regset
  38 {
  39   word            regs[32];             /* primary registers */
  40   word            spregs[2];            /* pc + msr */
  41   int             cycles;
  42   int             insts;
  43   int             exception;
  44   unsigned long   msize;
  45   unsigned char  *memory;
  46   ubyte           imm_enable;
  47   half            imm_high;
  48 };
  49
  50 struct _sim_cpu {
  51   struct microblaze_regset microblaze_cpu;
  52   sim_cpu_base base;
  53 };
  54
  55 #define MAX_NR_PROCESSORS 1
  56 struct sim_state {
  57   sim_cpu cpu[MAX_NR_PROCESSORS];
  58 #define STATE_CPU(sd, n) (&(sd)->cpu[0])
  59   sim_state_base base;
  60 };
  61 #endif /* MICROBLAZE_SIM_MAIN */
  62