1 2021-06-17 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
4 * aclocal.m4, configure: Regenerate.
6 2021-06-16 Mike Frysinger <vapier@gentoo.org>
8 * interp.c (dotrace): Make comment const.
9 * sim-main.h (dotrace): Likewise. Add ATTRIBUTE_PRINTF.
11 2021-06-16 Mike Frysinger <vapier@gentoo.org>
13 * interp.c (sim_monitor): Change ap type to address_word*.
14 (_P, P): New macros. Rewrite dynamic printf logic to use these.
16 2021-06-16 Mike Frysinger <vapier@gentoo.org>
18 * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
21 2021-06-16 Mike Frysinger <vapier@gentoo.org>
23 * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
26 2021-06-16 Mike Frysinger <vapier@gentoo.org>
28 * configure: Regenerate.
30 2021-06-16 Mike Frysinger <vapier@gentoo.org>
32 * interp.c (sim_open): Change %lx to %x and PRIx macros.
34 2021-06-16 Mike Frysinger <vapier@gentoo.org>
36 * configure: Regenerate.
39 2021-06-15 Mike Frysinger <vapier@gentoo.org>
41 * config.in, configure: Regenerate.
43 2021-06-12 Mike Frysinger <vapier@gentoo.org>
45 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
47 2021-06-12 Mike Frysinger <vapier@gentoo.org>
49 * aclocal.m4, config.in, configure: Regenerate.
51 2021-06-12 Mike Frysinger <vapier@gentoo.org>
53 * configure.ac: Delete call to AC_CHECK_FUNCS.
54 * config.in, configure: Regenerate.
56 2021-06-08 Mike Frysinger <vapier@gentoo.org>
58 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
61 2021-05-29 Mike Frysinger <vapier@gentoo.org>
63 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
65 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
67 * interp.c (sim_open): Add shadow mappings from 32-bit
68 address space to 64-bit sign-extended address space.
70 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
72 * interp.c (sim_create_inferior): Only truncate sign extension
73 bits for 32-bit target models.
75 2021-05-17 Mike Frysinger <vapier@gentoo.org>
77 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
79 2021-05-17 Mike Frysinger <vapier@gentoo.org>
81 * interp.c (sim_open): Switch to sim_state_alloc_extra.
82 * micromips.igen: Change SD to mips_sim_state.
83 * micromipsrun.c (sim_engine_run): Likewise.
84 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
85 (watch_options_install): Delete.
86 (struct swatch): Delete.
87 (struct sim_state): Delete.
88 (struct mips_sim_state): New struct.
89 (MIPS_SIM_STATE): Define.
91 2021-05-16 Mike Frysinger <vapier@gentoo.org>
93 * interp.c: Replace config.h include with defs.h.
94 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
95 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
98 2021-05-16 Mike Frysinger <vapier@gentoo.org>
100 * config.in, configure: Regenerate.
102 2021-05-14 Mike Frysinger <vapier@gentoo.org>
104 * interp.c: Update include path.
106 2021-05-04 Mike Frysinger <vapier@gentoo.org>
108 * dv-tx3904sio.c: Include stdlib.h.
110 2021-05-04 Mike Frysinger <vapier@gentoo.org>
112 * configure.ac (hw_extra_devices): Inline contents into
113 SIM_AC_OPTION_HARDWARE and delete.
114 * configure: Regenerate.
116 2021-05-04 Mike Frysinger <vapier@gentoo.org>
118 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
119 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
120 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
121 * configure: Regenerate.
123 2021-05-04 Mike Frysinger <vapier@gentoo.org>
125 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
127 2021-05-04 Mike Frysinger <vapier@gentoo.org>
129 * configure: Regenerate.
131 2021-05-01 Mike Frysinger <vapier@gentoo.org>
133 * cp1.c (store_fcr): Mark static.
135 2021-05-01 Mike Frysinger <vapier@gentoo.org>
137 * config.in, configure: Regenerate.
139 2021-04-23 Mike Frysinger <vapier@gentoo.org>
141 * configure.ac (hw_enabled): Delete.
142 (SIM_AC_OPTION_HARDWARE): Delete first two args.
143 * configure: Regenerate.
145 2021-04-22 Tom Tromey <tom@tromey.com>
147 * configure, config.in: Rebuild.
149 2021-04-22 Tom Tromey <tom@tromey.com>
151 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
153 (SIM_EXTRA_DEPS): New variable.
155 2021-04-22 Tom Tromey <tom@tromey.com>
157 * configure: Rebuild.
159 2021-04-21 Mike Frysinger <vapier@gentoo.org>
161 * aclocal.m4: Regenerate.
163 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
165 * configure: Regenerate.
167 2021-04-18 Mike Frysinger <vapier@gentoo.org>
169 * configure: Regenerate.
171 2021-04-12 Mike Frysinger <vapier@gentoo.org>
173 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
175 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
177 * Makefile.in: Set ASAN_OPTIONS when running igen.
179 2021-04-04 Steve Ellcey <sellcey@mips.com>
180 Faraz Shahbazker <fshahbazker@wavecomp.com>
182 * interp.c (sim_monitor): Add switch entries for unlink (13),
183 lseek (14), and stat (15).
185 2021-04-02 Mike Frysinger <vapier@gentoo.org>
187 * Makefile.in (../igen/igen): Delete rule.
188 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
190 2021-04-02 Mike Frysinger <vapier@gentoo.org>
192 * aclocal.m4, configure: Regenerate.
194 2021-02-28 Mike Frysinger <vapier@gentoo.org>
196 * configure: Regenerate.
198 2021-02-27 Mike Frysinger <vapier@gentoo.org>
200 * Makefile.in (SIM_EXTRA_ALL): Delete.
203 2021-02-21 Mike Frysinger <vapier@gentoo.org>
205 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
206 * aclocal.m4, configure: Regenerate.
208 2021-02-13 Mike Frysinger <vapier@gentoo.org>
210 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
211 * aclocal.m4, configure: Regenerate.
213 2021-02-06 Mike Frysinger <vapier@gentoo.org>
215 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
217 2021-02-06 Mike Frysinger <vapier@gentoo.org>
219 * configure: Regenerate.
221 2021-01-30 Mike Frysinger <vapier@gentoo.org>
223 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
225 2021-01-11 Mike Frysinger <vapier@gentoo.org>
227 * config.in, configure: Regenerate.
228 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
229 and strings.h include.
231 2021-01-09 Mike Frysinger <vapier@gentoo.org>
233 * configure: Regenerate.
235 2021-01-09 Mike Frysinger <vapier@gentoo.org>
237 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
238 * configure: Regenerate.
240 2021-01-08 Mike Frysinger <vapier@gentoo.org>
242 * configure: Regenerate.
244 2021-01-04 Mike Frysinger <vapier@gentoo.org>
246 * configure: Regenerate.
248 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
250 * sim-main.c: Include <stdlib.h>.
252 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
254 * cp1.c: Include <stdlib.h>.
256 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
258 * configure: Re-generate.
260 2017-09-06 John Baldwin <jhb@FreeBSD.org>
262 * configure: Regenerate.
264 2016-11-11 Mike Frysinger <vapier@gentoo.org>
267 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
270 2016-11-11 Mike Frysinger <vapier@gentoo.org>
273 * mips.igen (check_u64): Enable for `r3900'.
275 2016-02-05 Mike Frysinger <vapier@gentoo.org>
277 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
279 * configure: Regenerate.
281 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
282 Maciej W. Rozycki <macro@imgtec.com>
285 * micromips.igen (delayslot_micromips): Enable for `micromips32',
286 `micromips64' and `micromipsdsp' only.
287 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
288 (do_micromips_jalr, do_micromips_jal): Likewise.
289 (compute_movep_src_reg): Likewise.
290 (compute_andi16_imm): Likewise.
291 (convert_fmt_micromips): Likewise.
292 (convert_fmt_micromips_cvt_d): Likewise.
293 (convert_fmt_micromips_cvt_s): Likewise.
294 (FMT_MICROMIPS): Likewise.
295 (FMT_MICROMIPS_CVT_D): Likewise.
296 (FMT_MICROMIPS_CVT_S): Likewise.
298 2016-01-12 Mike Frysinger <vapier@gentoo.org>
300 * interp.c: Include elf-bfd.h.
301 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
304 2016-01-10 Mike Frysinger <vapier@gentoo.org>
306 * config.in, configure: Regenerate.
308 2016-01-10 Mike Frysinger <vapier@gentoo.org>
310 * configure: Regenerate.
312 2016-01-10 Mike Frysinger <vapier@gentoo.org>
314 * configure: Regenerate.
316 2016-01-10 Mike Frysinger <vapier@gentoo.org>
318 * configure: Regenerate.
320 2016-01-10 Mike Frysinger <vapier@gentoo.org>
322 * configure: Regenerate.
324 2016-01-10 Mike Frysinger <vapier@gentoo.org>
326 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
327 * configure: Regenerate.
329 2016-01-10 Mike Frysinger <vapier@gentoo.org>
331 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
332 * configure: Regenerate.
334 2016-01-10 Mike Frysinger <vapier@gentoo.org>
336 * configure: Regenerate.
338 2016-01-10 Mike Frysinger <vapier@gentoo.org>
340 * configure: Regenerate.
342 2016-01-09 Mike Frysinger <vapier@gentoo.org>
344 * config.in, configure: Regenerate.
346 2016-01-06 Mike Frysinger <vapier@gentoo.org>
348 * interp.c (sim_open): Mark argv const.
349 (sim_create_inferior): Mark argv and env const.
351 2016-01-04 Mike Frysinger <vapier@gentoo.org>
353 * configure: Regenerate.
355 2016-01-03 Mike Frysinger <vapier@gentoo.org>
357 * interp.c (sim_open): Update sim_parse_args comment.
359 2016-01-03 Mike Frysinger <vapier@gentoo.org>
361 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
362 * configure: Regenerate.
364 2016-01-02 Mike Frysinger <vapier@gentoo.org>
366 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
367 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
368 * configure: Regenerate.
369 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
371 2016-01-02 Mike Frysinger <vapier@gentoo.org>
373 * dv-tx3904cpu.c (CPU, SD): Delete.
375 2015-12-30 Mike Frysinger <vapier@gentoo.org>
377 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
378 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
379 (sim_store_register): Rename to ...
380 (mips_reg_store): ... this. Delete local cpu var.
381 Update sim_io_eprintf calls.
382 (sim_fetch_register): Rename to ...
383 (mips_reg_fetch): ... this. Delete local cpu var.
384 Update sim_io_eprintf calls.
386 2015-12-27 Mike Frysinger <vapier@gentoo.org>
388 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
390 2015-12-26 Mike Frysinger <vapier@gentoo.org>
392 * config.in, configure: Regenerate.
394 2015-12-26 Mike Frysinger <vapier@gentoo.org>
396 * interp.c (sim_write, sim_read): Delete.
397 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
398 (load_word): Likewise.
399 * micromips.igen (cache): Likewise.
400 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
401 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
402 do_store_left, do_store_right, do_load_double, do_store_double):
404 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
405 (do_prefx): Likewise.
406 * sim-main.c (address_translation, prefetch): Delete.
407 (ifetch32, ifetch16): Delete call to AddressTranslation and set
409 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
410 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
411 (LoadMemory, StoreMemory): Delete CCA arg.
413 2015-12-24 Mike Frysinger <vapier@gentoo.org>
415 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
416 * configure: Regenerated.
418 2015-12-24 Mike Frysinger <vapier@gentoo.org>
420 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
423 2015-12-24 Mike Frysinger <vapier@gentoo.org>
425 * tconfig.h (SIM_HANDLES_LMA): Delete.
427 2015-12-24 Mike Frysinger <vapier@gentoo.org>
429 * sim-main.h (WITH_WATCHPOINTS): Delete.
431 2015-12-24 Mike Frysinger <vapier@gentoo.org>
433 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
435 2015-12-24 Mike Frysinger <vapier@gentoo.org>
437 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
439 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
441 * micromips.igen (process_isa_mode): Fix left shift of negative
444 2015-11-17 Mike Frysinger <vapier@gentoo.org>
446 * sim-main.h (WITH_MODULO_MEMORY): Delete.
448 2015-11-15 Mike Frysinger <vapier@gentoo.org>
450 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
452 2015-11-14 Mike Frysinger <vapier@gentoo.org>
454 * interp.c (sim_close): Rename to ...
455 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
457 * sim-main.h (mips_sim_close): Declare.
458 (SIM_CLOSE_HOOK): Define.
460 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
461 Ali Lown <ali.lown@imgtec.com>
463 * Makefile.in (tmp-micromips): New rule.
464 (tmp-mach-multi): Add support for micromips.
465 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
466 that works for both mips64 and micromips64.
467 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
469 Add build support for micromips.
470 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
471 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
472 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
473 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
474 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
475 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
476 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
477 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
478 Refactored instruction code to use these functions.
479 * dsp2.igen: Refactored instruction code to use the new functions.
480 * interp.c (decode_coproc): Refactored to work with any instruction
482 (isa_mode): New variable
483 (RSVD_INSTRUCTION): Changed to 0x00000039.
484 * m16.igen (BREAK16): Refactored instruction to use do_break16.
485 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
486 * micromips.dc: New file.
487 * micromips.igen: New file.
488 * micromips16.dc: New file.
489 * micromipsdsp.igen: New file.
490 * micromipsrun.c: New file.
491 * mips.igen (do_swc1): Changed to work with any instruction encoding.
492 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
493 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
494 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
495 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
496 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
497 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
498 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
499 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
500 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
501 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
502 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
503 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
504 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
505 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
506 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
507 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
508 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
509 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
511 Refactored instruction code to use these functions.
512 (RSVD): Changed to use new reserved instruction.
513 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
514 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
515 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
516 do_store_double): Added micromips32 and micromips64 models.
517 Added include for micromips.igen and micromipsdsp.igen
518 Add micromips32 and micromips64 models.
519 (DecodeCoproc): Updated to use new macro definition.
520 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
521 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
522 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
523 Refactored instruction code to use these functions.
524 * sim-main.h (CP0_operation): New enum.
525 (DecodeCoproc): Updated macro.
526 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
527 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
528 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
529 ISA_MODE_MICROMIPS): New defines.
530 (sim_state): Add isa_mode field.
532 2015-06-23 Mike Frysinger <vapier@gentoo.org>
534 * configure: Regenerate.
536 2015-06-12 Mike Frysinger <vapier@gentoo.org>
538 * configure.ac: Change configure.in to configure.ac.
539 * configure: Regenerate.
541 2015-06-12 Mike Frysinger <vapier@gentoo.org>
543 * configure: Regenerate.
545 2015-06-12 Mike Frysinger <vapier@gentoo.org>
547 * interp.c [TRACE]: Delete.
548 (TRACE): Change to WITH_TRACE_ANY_P.
549 [!WITH_TRACE_ANY_P] (open_trace): Define.
550 (mips_option_handler, open_trace, sim_close, dotrace):
551 Change defined(TRACE) to WITH_TRACE_ANY_P.
552 (sim_open): Delete TRACE ifdef check.
553 * sim-main.c (load_memory): Delete TRACE ifdef check.
554 (store_memory): Likewise.
555 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
556 [!WITH_TRACE_ANY_P] (dotrace): Define.
558 2015-04-18 Mike Frysinger <vapier@gentoo.org>
560 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
563 2015-04-18 Mike Frysinger <vapier@gentoo.org>
565 * sim-main.h (SIM_CPU): Delete.
567 2015-04-18 Mike Frysinger <vapier@gentoo.org>
569 * sim-main.h (sim_cia): Delete.
571 2015-04-17 Mike Frysinger <vapier@gentoo.org>
573 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
575 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
576 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
577 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
578 CIA_SET to CPU_PC_SET.
579 * sim-main.h (CIA_GET, CIA_SET): Delete.
581 2015-04-15 Mike Frysinger <vapier@gentoo.org>
583 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
584 * sim-main.h (STATE_CPU): Delete.
586 2015-04-13 Mike Frysinger <vapier@gentoo.org>
588 * configure: Regenerate.
590 2015-04-13 Mike Frysinger <vapier@gentoo.org>
592 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
593 * interp.c (mips_pc_get, mips_pc_set): New functions.
594 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
595 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
596 (sim_pc_get): Delete.
597 * sim-main.h (SIM_CPU): Define.
598 (struct sim_state): Change cpu to an array of pointers.
601 2015-04-13 Mike Frysinger <vapier@gentoo.org>
603 * interp.c (mips_option_handler, open_trace, sim_close,
604 sim_write, sim_read, sim_store_register, sim_fetch_register,
605 sim_create_inferior, pr_addr, pr_uword64): Convert old style
607 (sim_open): Convert old style prototype. Change casts with
608 sim_write to unsigned char *.
609 (fetch_str): Change null to unsigned char, and change cast to
611 (sim_monitor): Change c & ch to unsigned char. Change cast to
614 2015-04-12 Mike Frysinger <vapier@gentoo.org>
616 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
618 2015-04-06 Mike Frysinger <vapier@gentoo.org>
620 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
622 2015-04-01 Mike Frysinger <vapier@gentoo.org>
624 * tconfig.h (SIM_HAVE_PROFILE): Delete.
626 2015-03-31 Mike Frysinger <vapier@gentoo.org>
628 * config.in, configure: Regenerate.
630 2015-03-24 Mike Frysinger <vapier@gentoo.org>
632 * interp.c (sim_pc_get): New function.
634 2015-03-24 Mike Frysinger <vapier@gentoo.org>
636 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
637 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
639 2015-03-24 Mike Frysinger <vapier@gentoo.org>
641 * configure: Regenerate.
643 2015-03-23 Mike Frysinger <vapier@gentoo.org>
645 * configure: Regenerate.
647 2015-03-23 Mike Frysinger <vapier@gentoo.org>
649 * configure: Regenerate.
650 * configure.ac (mips_extra_objs): Delete.
651 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
652 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
654 2015-03-23 Mike Frysinger <vapier@gentoo.org>
656 * configure: Regenerate.
657 * configure.ac: Delete sim_hw checks for dv-sockser.
659 2015-03-16 Mike Frysinger <vapier@gentoo.org>
661 * config.in, configure: Regenerate.
662 * tconfig.in: Rename file ...
663 * tconfig.h: ... here.
665 2015-03-15 Mike Frysinger <vapier@gentoo.org>
667 * tconfig.in: Delete includes.
668 [HAVE_DV_SOCKSER]: Delete.
670 2015-03-14 Mike Frysinger <vapier@gentoo.org>
672 * Makefile.in (SIM_RUN_OBJS): Delete.
674 2015-03-14 Mike Frysinger <vapier@gentoo.org>
676 * configure.ac (AC_CHECK_HEADERS): Delete.
677 * aclocal.m4, configure: Regenerate.
679 2014-08-19 Alan Modra <amodra@gmail.com>
681 * configure: Regenerate.
683 2014-08-15 Roland McGrath <mcgrathr@google.com>
685 * configure: Regenerate.
686 * config.in: Regenerate.
688 2014-03-04 Mike Frysinger <vapier@gentoo.org>
690 * configure: Regenerate.
692 2013-09-23 Alan Modra <amodra@gmail.com>
694 * configure: Regenerate.
696 2013-06-03 Mike Frysinger <vapier@gentoo.org>
698 * aclocal.m4, configure: Regenerate.
700 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
702 * configure: Rebuild.
704 2013-03-26 Mike Frysinger <vapier@gentoo.org>
706 * configure: Regenerate.
708 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
710 * configure.ac: Address use of dv-sockser.o.
711 * tconfig.in: Conditionalize use of dv_sockser_install.
712 * configure: Regenerated.
713 * config.in: Regenerated.
715 2012-10-04 Chao-ying Fu <fu@mips.com>
716 Steve Ellcey <sellcey@mips.com>
718 * mips/mips3264r2.igen (rdhwr): New.
720 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
722 * configure.ac: Always link against dv-sockser.o.
723 * configure: Regenerate.
725 2012-06-15 Joel Brobecker <brobecker@adacore.com>
727 * config.in, configure: Regenerate.
729 2012-05-18 Nick Clifton <nickc@redhat.com>
732 * interp.c: Include config.h before system header files.
734 2012-03-24 Mike Frysinger <vapier@gentoo.org>
736 * aclocal.m4, config.in, configure: Regenerate.
738 2011-12-03 Mike Frysinger <vapier@gentoo.org>
740 * aclocal.m4: New file.
741 * configure: Regenerate.
743 2011-10-19 Mike Frysinger <vapier@gentoo.org>
745 * configure: Regenerate after common/acinclude.m4 update.
747 2011-10-17 Mike Frysinger <vapier@gentoo.org>
749 * configure.ac: Change include to common/acinclude.m4.
751 2011-10-17 Mike Frysinger <vapier@gentoo.org>
753 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
754 call. Replace common.m4 include with SIM_AC_COMMON.
755 * configure: Regenerate.
757 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
759 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
761 (tmp-mach-multi): Exit early when igen fails.
763 2011-07-05 Mike Frysinger <vapier@gentoo.org>
765 * interp.c (sim_do_command): Delete.
767 2011-02-14 Mike Frysinger <vapier@gentoo.org>
769 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
770 (tx3904sio_fifo_reset): Likewise.
771 * interp.c (sim_monitor): Likewise.
773 2010-04-14 Mike Frysinger <vapier@gentoo.org>
775 * interp.c (sim_write): Add const to buffer arg.
777 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
779 * interp.c: Don't include sysdep.h
781 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
783 * configure: Regenerate.
785 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
787 * config.in: Regenerate.
788 * configure: Likewise.
790 * configure: Regenerate.
792 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
794 * configure: Regenerate to track ../common/common.m4 changes.
797 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
798 Daniel Jacobowitz <dan@codesourcery.com>
799 Joseph Myers <joseph@codesourcery.com>
801 * configure: Regenerate.
803 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
805 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
806 that unconditionally allows fmt_ps.
807 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
808 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
809 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
810 filter from 64,f to 32,f.
811 (PREFX): Change filter from 64 to 32.
812 (LDXC1, LUXC1): Provide separate mips32r2 implementations
813 that use do_load_double instead of do_load. Make both LUXC1
814 versions unpredictable if SizeFGR () != 64.
815 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
816 instead of do_store. Remove unused variable. Make both SUXC1
817 versions unpredictable if SizeFGR () != 64.
819 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
821 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
822 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
823 shifts for that case.
825 2007-09-04 Nick Clifton <nickc@redhat.com>
827 * interp.c (options enum): Add OPTION_INFO_MEMORY.
828 (display_mem_info): New static variable.
829 (mips_option_handler): Handle OPTION_INFO_MEMORY.
830 (mips_options): Add info-memory and memory-info.
831 (sim_open): After processing the command line and board
832 specification, check display_mem_info. If it is set then
833 call the real handler for the --memory-info command line
836 2007-08-24 Joel Brobecker <brobecker@adacore.com>
838 * configure.ac: Change license of multi-run.c to GPL version 3.
839 * configure: Regenerate.
841 2007-06-28 Richard Sandiford <richard@codesourcery.com>
843 * configure.ac, configure: Revert last patch.
845 2007-06-26 Richard Sandiford <richard@codesourcery.com>
847 * configure.ac (sim_mipsisa3264_configs): New variable.
848 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
849 every configuration support all four targets, using the triplet to
850 determine the default.
851 * configure: Regenerate.
853 2007-06-25 Richard Sandiford <richard@codesourcery.com>
855 * Makefile.in (m16run.o): New rule.
857 2007-05-15 Thiemo Seufer <ths@mips.com>
859 * mips3264r2.igen (DSHD): Fix compile warning.
861 2007-05-14 Thiemo Seufer <ths@mips.com>
863 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
864 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
865 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
866 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
869 2007-03-01 Thiemo Seufer <ths@mips.com>
871 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
874 2007-02-20 Thiemo Seufer <ths@mips.com>
876 * dsp.igen: Update copyright notice.
877 * dsp2.igen: Fix copyright notice.
879 2007-02-20 Thiemo Seufer <ths@mips.com>
880 Chao-Ying Fu <fu@mips.com>
882 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
883 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
884 Add dsp2 to sim_igen_machine.
885 * configure: Regenerate.
886 * dsp.igen (do_ph_op): Add MUL support when op = 2.
887 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
888 (mulq_rs.ph): Use do_ph_mulq.
889 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
890 * mips.igen: Add dsp2 model and include dsp2.igen.
891 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
892 for *mips32r2, *mips64r2, *dsp.
893 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
894 for *mips32r2, *mips64r2, *dsp2.
895 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
897 2007-02-19 Thiemo Seufer <ths@mips.com>
898 Nigel Stephens <nigel@mips.com>
900 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
901 jumps with hazard barrier.
903 2007-02-19 Thiemo Seufer <ths@mips.com>
904 Nigel Stephens <nigel@mips.com>
906 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
907 after each call to sim_io_write.
909 2007-02-19 Thiemo Seufer <ths@mips.com>
910 Nigel Stephens <nigel@mips.com>
912 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
913 supported by this simulator.
914 (decode_coproc): Recognise additional CP0 Config registers
917 2007-02-19 Thiemo Seufer <ths@mips.com>
918 Nigel Stephens <nigel@mips.com>
919 David Ung <davidu@mips.com>
921 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
922 uninterpreted formats. If fmt is one of the uninterpreted types
923 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
924 fmt_word, and fmt_uninterpreted_64 like fmt_long.
925 (store_fpr): When writing an invalid odd register, set the
926 matching even register to fmt_unknown, not the following register.
927 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
928 the the memory window at offset 0 set by --memory-size command
930 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
932 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
934 (sim_monitor): When returning the memory size to the MIPS
935 application, use the value in STATE_MEM_SIZE, not an arbitrary
937 (cop_lw): Don' mess around with FPR_STATE, just pass
938 fmt_uninterpreted_32 to StoreFPR.
940 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
942 * mips.igen (not_word_value): Single version for mips32, mips64
945 2007-02-19 Thiemo Seufer <ths@mips.com>
946 Nigel Stephens <nigel@mips.com>
948 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
951 2007-02-17 Thiemo Seufer <ths@mips.com>
953 * configure.ac (mips*-sde-elf*): Move in front of generic machine
955 * configure: Regenerate.
957 2007-02-17 Thiemo Seufer <ths@mips.com>
959 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
960 Add mdmx to sim_igen_machine.
961 (mipsisa64*-*-*): Likewise. Remove dsp.
962 (mipsisa32*-*-*): Remove dsp.
963 * configure: Regenerate.
965 2007-02-13 Thiemo Seufer <ths@mips.com>
967 * configure.ac: Add mips*-sde-elf* target.
968 * configure: Regenerate.
970 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
972 * acconfig.h: Remove.
973 * config.in, configure: Regenerate.
975 2006-11-07 Thiemo Seufer <ths@mips.com>
977 * dsp.igen (do_w_op): Fix compiler warning.
979 2006-08-29 Thiemo Seufer <ths@mips.com>
980 David Ung <davidu@mips.com>
982 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
984 * configure: Regenerate.
985 * mips.igen (model): Add smartmips.
986 (MADDU): Increment ACX if carry.
987 (do_mult): Clear ACX.
988 (ROR,RORV): Add smartmips.
989 (include): Include smartmips.igen.
990 * sim-main.h (ACX): Set to REGISTERS[89].
991 * smartmips.igen: New file.
993 2006-08-29 Thiemo Seufer <ths@mips.com>
994 David Ung <davidu@mips.com>
996 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
997 mips3264r2.igen. Add missing dependency rules.
998 * m16e.igen: Support for mips16e save/restore instructions.
1000 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
1002 * configure: Regenerated.
1004 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1006 * configure: Regenerated.
1008 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1010 * configure: Regenerated.
1012 2006-05-15 Chao-ying Fu <fu@mips.com>
1014 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1016 2006-04-18 Nick Clifton <nickc@redhat.com>
1018 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1021 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
1023 * configure: Regenerate.
1025 2005-12-14 Chao-ying Fu <fu@mips.com>
1027 * Makefile.in (SIM_OBJS): Add dsp.o.
1028 (dsp.o): New dependency.
1029 (IGEN_INCLUDE): Add dsp.igen.
1030 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1031 mipsisa64*-*-*): Add dsp to sim_igen_machine.
1032 * configure: Regenerate.
1033 * mips.igen: Add dsp model and include dsp.igen.
1034 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1035 because these instructions are extended in DSP ASE.
1036 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1037 adding 6 DSP accumulator registers and 1 DSP control register.
1038 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1039 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1040 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1041 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1042 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1043 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1044 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1045 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1046 DSPCR_CCOND_SMASK): New define.
1047 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1048 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1050 2005-07-08 Ian Lance Taylor <ian@airs.com>
1052 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1054 2005-06-16 David Ung <davidu@mips.com>
1055 Nigel Stephens <nigel@mips.com>
1057 * mips.igen: New mips16e model and include m16e.igen.
1058 (check_u64): Add mips16e tag.
1059 * m16e.igen: New file for MIPS16e instructions.
1060 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1061 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1063 * configure: Regenerate.
1065 2005-05-26 David Ung <davidu@mips.com>
1067 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1068 tags to all instructions which are applicable to the new ISAs.
1069 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1071 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1073 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1075 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1076 * configure: Regenerate.
1078 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1080 * configure: Regenerate.
1082 2005-01-14 Andrew Cagney <cagney@gnu.org>
1084 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1085 explicit call to AC_CONFIG_HEADER.
1086 * configure: Regenerate.
1088 2005-01-12 Andrew Cagney <cagney@gnu.org>
1090 * configure.ac: Update to use ../common/common.m4.
1091 * configure: Re-generate.
1093 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1095 * configure: Regenerated to track ../common/aclocal.m4 changes.
1097 2005-01-07 Andrew Cagney <cagney@gnu.org>
1099 * configure.ac: Rename configure.in, require autoconf 2.59.
1100 * configure: Re-generate.
1102 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1104 * configure: Regenerate for ../common/aclocal.m4 update.
1106 2004-09-24 Monika Chaddha <monika@acmet.com>
1108 Committed by Andrew Cagney.
1109 * m16.igen (CMP, CMPI): Fix assembler.
1111 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1113 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1114 * configure: Regenerate.
1116 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1118 * configure.in (sim_m16_machine): Include mipsIII.
1119 * configure: Regenerate.
1121 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1123 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1125 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1127 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1129 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1131 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1133 * mips.igen (check_fmt): Remove.
1134 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1135 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1136 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1137 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1138 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1139 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1140 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1141 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1142 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1143 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1145 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1147 * sb1.igen (check_sbx): New function.
1148 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1150 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1151 Richard Sandiford <rsandifo@redhat.com>
1153 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1154 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1155 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1156 separate implementations for mipsIV and mipsV. Use new macros to
1157 determine whether the restrictions apply.
1159 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1161 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1162 (check_mult_hilo): Improve comments.
1163 (check_div_hilo): Likewise. Also, fork off a new version
1164 to handle mips32/mips64 (since there are no hazards to check
1167 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1169 * mips.igen (do_dmultx): Fix check for negative operands.
1171 2003-05-16 Ian Lance Taylor <ian@airs.com>
1173 * Makefile.in (SHELL): Make sure this is defined.
1174 (various): Use $(SHELL) whenever we invoke move-if-change.
1176 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1178 * cp1.c: Tweak attribution slightly.
1181 * mdmx.igen: Likewise.
1182 * mips3d.igen: Likewise.
1183 * sb1.igen: Likewise.
1185 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1187 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1190 2003-02-27 Andrew Cagney <cagney@redhat.com>
1192 * interp.c (sim_open): Rename _bfd to bfd.
1193 (sim_create_inferior): Ditto.
1195 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1197 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1199 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1201 * mips.igen (EI, DI): Remove.
1203 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1205 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1207 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1208 Andrew Cagney <ac131313@redhat.com>
1209 Gavin Romig-Koch <gavin@redhat.com>
1210 Graydon Hoare <graydon@redhat.com>
1211 Aldy Hernandez <aldyh@redhat.com>
1212 Dave Brolley <brolley@redhat.com>
1213 Chris Demetriou <cgd@broadcom.com>
1215 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1216 (sim_mach_default): New variable.
1217 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1218 Add a new simulator generator, MULTI.
1219 * configure: Regenerate.
1220 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1221 (multi-run.o): New dependency.
1222 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1223 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1224 (tmp-multi): Combine them.
1225 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1226 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1227 (distclean-extra): New rule.
1228 * sim-main.h: Include bfd.h.
1229 (MIPS_MACH): New macro.
1230 * mips.igen (vr4120, vr5400, vr5500): New models.
1231 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1232 * vr.igen: Replace with new version.
1234 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1236 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1237 * configure: Regenerate.
1239 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1241 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1242 * mips.igen: Remove all invocations of check_branch_bug and
1245 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1247 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1249 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1251 * mips.igen (do_load_double, do_store_double): New functions.
1252 (LDC1, SDC1): Rename to...
1253 (LDC1b, SDC1b): respectively.
1254 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1256 2002-07-29 Michael Snyder <msnyder@redhat.com>
1258 * cp1.c (fp_recip2): Modify initialization expression so that
1259 GCC will recognize it as constant.
1261 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1263 * mdmx.c (SD_): Delete.
1264 (Unpredictable): Re-define, for now, to directly invoke
1265 unpredictable_action().
1266 (mdmx_acc_op): Fix error in .ob immediate handling.
1268 2002-06-18 Andrew Cagney <cagney@redhat.com>
1270 * interp.c (sim_firmware_command): Initialize `address'.
1272 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1274 * configure: Regenerated to track ../common/aclocal.m4 changes.
1276 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1277 Ed Satterthwaite <ehs@broadcom.com>
1279 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1280 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1281 * mips.igen: Include mips3d.igen.
1282 (mips3d): New model name for MIPS-3D ASE instructions.
1283 (CVT.W.fmt): Don't use this instruction for word (source) format
1285 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1286 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1287 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1288 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1289 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1290 (RSquareRoot1, RSquareRoot2): New macros.
1291 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1292 (fp_rsqrt2): New functions.
1293 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1294 * configure: Regenerate.
1296 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1297 Ed Satterthwaite <ehs@broadcom.com>
1299 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1300 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1301 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1302 (convert): Note that this function is not used for paired-single
1304 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1305 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1306 (check_fmt_p): Enable paired-single support.
1307 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1308 (PUU.PS): New instructions.
1309 (CVT.S.fmt): Don't use this instruction for paired-single format
1311 * sim-main.h (FP_formats): New value 'fmt_ps.'
1312 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1313 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1315 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1317 * mips.igen: Fix formatting of function calls in
1320 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1322 * mips.igen (MOVN, MOVZ): Trace result.
1323 (TNEI): Print "tnei" as the opcode name in traces.
1324 (CEIL.W): Add disassembly string for traces.
1325 (RSQRT.fmt): Make location of disassembly string consistent
1326 with other instructions.
1328 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen (X): Delete unused function.
1332 2002-06-08 Andrew Cagney <cagney@redhat.com>
1334 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1336 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1337 Ed Satterthwaite <ehs@broadcom.com>
1339 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1340 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1341 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1342 (fp_nmsub): New prototypes.
1343 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1344 (NegMultiplySub): New defines.
1345 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1346 (MADD.D, MADD.S): Replace with...
1347 (MADD.fmt): New instruction.
1348 (MSUB.D, MSUB.S): Replace with...
1349 (MSUB.fmt): New instruction.
1350 (NMADD.D, NMADD.S): Replace with...
1351 (NMADD.fmt): New instruction.
1352 (NMSUB.D, MSUB.S): Replace with...
1353 (NMSUB.fmt): New instruction.
1355 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1356 Ed Satterthwaite <ehs@broadcom.com>
1358 * cp1.c: Fix more comment spelling and formatting.
1359 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1360 (denorm_mode): New function.
1361 (fpu_unary, fpu_binary): Round results after operation, collect
1362 status from rounding operations, and update the FCSR.
1363 (convert): Collect status from integer conversions and rounding
1364 operations, and update the FCSR. Adjust NaN values that result
1365 from conversions. Convert to use sim_io_eprintf rather than
1366 fprintf, and remove some debugging code.
1367 * cp1.h (fenr_FS): New define.
1369 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1371 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1372 rounding mode to sim FP rounding mode flag conversion code into...
1373 (rounding_mode): New function.
1375 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1377 * cp1.c: Clean up formatting of a few comments.
1378 (value_fpr): Reformat switch statement.
1380 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1381 Ed Satterthwaite <ehs@broadcom.com>
1384 * sim-main.h: Include cp1.h.
1385 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1386 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1387 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1388 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1389 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1390 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1391 * cp1.c: Don't include sim-fpu.h; already included by
1392 sim-main.h. Clean up formatting of some comments.
1393 (NaN, Equal, Less): Remove.
1394 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1395 (fp_cmp): New functions.
1396 * mips.igen (do_c_cond_fmt): Remove.
1397 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1398 Compare. Add result tracing.
1399 (CxC1): Remove, replace with...
1400 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1401 (DMxC1): Remove, replace with...
1402 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1403 (MxC1): Remove, replace with...
1404 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1406 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1408 * sim-main.h (FGRIDX): Remove, replace all uses with...
1409 (FGR_BASE): New macro.
1410 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1411 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1412 (NR_FGR, FGR): Likewise.
1413 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1414 * mips.igen: Likewise.
1416 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1418 * cp1.c: Add an FSF Copyright notice to this file.
1420 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1421 Ed Satterthwaite <ehs@broadcom.com>
1423 * cp1.c (Infinity): Remove.
1424 * sim-main.h (Infinity): Likewise.
1426 * cp1.c (fp_unary, fp_binary): New functions.
1427 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1428 (fp_sqrt): New functions, implemented in terms of the above.
1429 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1430 (Recip, SquareRoot): Remove (replaced by functions above).
1431 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1432 (fp_recip, fp_sqrt): New prototypes.
1433 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1434 (Recip, SquareRoot): Replace prototypes with #defines which
1435 invoke the functions above.
1437 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1439 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1440 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1441 file, remove PARAMS from prototypes.
1442 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1443 simulator state arguments.
1444 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1445 pass simulator state arguments.
1446 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1447 (store_fpr, convert): Remove 'sd' argument.
1448 (value_fpr): Likewise. Convert to use 'SD' instead.
1450 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1452 * cp1.c (Min, Max): Remove #if 0'd functions.
1453 * sim-main.h (Min, Max): Remove.
1455 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1457 * cp1.c: fix formatting of switch case and default labels.
1458 * interp.c: Likewise.
1459 * sim-main.c: Likewise.
1461 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1463 * cp1.c: Clean up comments which describe FP formats.
1464 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1466 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1467 Ed Satterthwaite <ehs@broadcom.com>
1469 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1470 Broadcom SiByte SB-1 processor configurations.
1471 * configure: Regenerate.
1472 * sb1.igen: New file.
1473 * mips.igen: Include sb1.igen.
1475 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1476 * mdmx.igen: Add "sb1" model to all appropriate functions and
1478 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1479 (ob_func, ob_acc): Reference the above.
1480 (qh_acc): Adjust to keep the same size as ob_acc.
1481 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1482 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1484 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1486 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1488 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1489 Ed Satterthwaite <ehs@broadcom.com>
1491 * mips.igen (mdmx): New (pseudo-)model.
1492 * mdmx.c, mdmx.igen: New files.
1493 * Makefile.in (SIM_OBJS): Add mdmx.o.
1494 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1496 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1497 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1498 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1499 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1500 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1501 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1502 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1503 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1504 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1505 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1506 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1507 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1508 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1509 (qh_fmtsel): New macros.
1510 (_sim_cpu): New member "acc".
1511 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1512 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1514 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1516 * interp.c: Use 'deprecated' rather than 'depreciated.'
1517 * sim-main.h: Likewise.
1519 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1521 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1522 which wouldn't compile anyway.
1523 * sim-main.h (unpredictable_action): New function prototype.
1524 (Unpredictable): Define to call igen function unpredictable().
1525 (NotWordValue): New macro to call igen function not_word_value().
1526 (UndefinedResult): Remove.
1527 * interp.c (undefined_result): Remove.
1528 (unpredictable_action): New function.
1529 * mips.igen (not_word_value, unpredictable): New functions.
1530 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1531 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1532 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1533 NotWordValue() to check for unpredictable inputs, then
1534 Unpredictable() to handle them.
1536 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1538 * mips.igen: Fix formatting of calls to Unpredictable().
1540 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1542 * interp.c (sim_open): Revert previous change.
1544 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1546 * interp.c (sim_open): Disable chunk of code that wrote code in
1547 vector table entries.
1549 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1551 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1552 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1555 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1557 * cp1.c: Fix many formatting issues.
1559 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1561 * cp1.c (fpu_format_name): New function to replace...
1562 (DOFMT): This. Delete, and update all callers.
1563 (fpu_rounding_mode_name): New function to replace...
1564 (RMMODE): This. Delete, and update all callers.
1566 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1568 * interp.c: Move FPU support routines from here to...
1569 * cp1.c: Here. New file.
1570 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1571 (cp1.o): New target.
1573 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1575 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1576 * mips.igen (mips32, mips64): New models, add to all instructions
1577 and functions as appropriate.
1578 (loadstore_ea, check_u64): New variant for model mips64.
1579 (check_fmt_p): New variant for models mipsV and mips64, remove
1580 mipsV model marking fro other variant.
1583 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1584 for mips32 and mips64.
1585 (DCLO, DCLZ): New instructions for mips64.
1587 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1589 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1590 immediate or code as a hex value with the "%#lx" format.
1591 (ANDI): Likewise, and fix printed instruction name.
1593 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1595 * sim-main.h (UndefinedResult, Unpredictable): New macros
1596 which currently do nothing.
1598 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1600 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1601 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1602 (status_CU3): New definitions.
1604 * sim-main.h (ExceptionCause): Add new values for MIPS32
1605 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1606 for DebugBreakPoint and NMIReset to note their status in
1608 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1609 (SignalExceptionCacheErr): New exception macros.
1611 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1613 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1614 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1616 (SignalExceptionCoProcessorUnusable): Take as argument the
1617 unusable coprocessor number.
1619 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1621 * mips.igen: Fix formatting of all SignalException calls.
1623 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1625 * sim-main.h (SIGNEXTEND): Remove.
1627 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1629 * mips.igen: Remove gencode comment from top of file, fix
1630 spelling in another comment.
1632 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1634 * mips.igen (check_fmt, check_fmt_p): New functions to check
1635 whether specific floating point formats are usable.
1636 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1637 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1638 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1639 Use the new functions.
1640 (do_c_cond_fmt): Remove format checks...
1641 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1643 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1645 * mips.igen: Fix formatting of check_fpu calls.
1647 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1649 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1651 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1653 * mips.igen: Remove whitespace at end of lines.
1655 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1657 * mips.igen (loadstore_ea): New function to do effective
1658 address calculations.
1659 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1660 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1661 CACHE): Use loadstore_ea to do effective address computations.
1663 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1665 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1666 * mips.igen (LL, CxC1, MxC1): Likewise.
1668 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1670 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1671 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1672 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1673 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1674 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1675 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1676 Don't split opcode fields by hand, use the opcode field values
1679 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1681 * mips.igen (do_divu): Fix spacing.
1683 * mips.igen (do_dsllv): Move to be right before DSLLV,
1684 to match the rest of the do_<shift> functions.
1686 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1688 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1689 DSRL32, do_dsrlv): Trace inputs and results.
1691 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1693 * mips.igen (CACHE): Provide instruction-printing string.
1695 * interp.c (signal_exception): Comment tokens after #endif.
1697 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1699 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1700 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1701 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1702 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1703 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1704 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1705 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1706 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1708 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1710 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1711 instruction-printing string.
1712 (LWU): Use '64' as the filter flag.
1714 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1716 * mips.igen (SDXC1): Fix instruction-printing string.
1718 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1720 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1721 filter flags "32,f".
1723 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1725 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1728 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1730 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1731 add a comma) so that it more closely match the MIPS ISA
1732 documentation opcode partitioning.
1733 (PREF): Put useful names on opcode fields, and include
1734 instruction-printing string.
1736 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1738 * mips.igen (check_u64): New function which in the future will
1739 check whether 64-bit instructions are usable and signal an
1740 exception if not. Currently a no-op.
1741 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1742 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1743 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1744 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1746 * mips.igen (check_fpu): New function which in the future will
1747 check whether FPU instructions are usable and signal an exception
1748 if not. Currently a no-op.
1749 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1750 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1751 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1752 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1753 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1754 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1755 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1756 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1758 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1760 * mips.igen (do_load_left, do_load_right): Move to be immediately
1762 (do_store_left, do_store_right): Move to be immediately following
1765 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1767 * mips.igen (mipsV): New model name. Also, add it to
1768 all instructions and functions where it is appropriate.
1770 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1772 * mips.igen: For all functions and instructions, list model
1773 names that support that instruction one per line.
1775 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1777 * mips.igen: Add some additional comments about supported
1778 models, and about which instructions go where.
1779 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1780 order as is used in the rest of the file.
1782 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1784 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1785 indicating that ALU32_END or ALU64_END are there to check
1787 (DADD): Likewise, but also remove previous comment about
1790 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1792 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1793 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1794 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1795 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1796 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1797 fields (i.e., add and move commas) so that they more closely
1798 match the MIPS ISA documentation opcode partitioning.
1800 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1802 * mips.igen (ADDI): Print immediate value.
1803 (BREAK): Print code.
1804 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1805 (SLL): Print "nop" specially, and don't run the code
1806 that does the shift for the "nop" case.
1808 2001-11-17 Fred Fish <fnf@redhat.com>
1810 * sim-main.h (float_operation): Move enum declaration outside
1811 of _sim_cpu struct declaration.
1813 2001-04-12 Jim Blandy <jimb@redhat.com>
1815 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1816 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1818 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1819 PENDING_FILL, and you can get the intended effect gracefully by
1820 calling PENDING_SCHED directly.
1822 2001-02-23 Ben Elliston <bje@redhat.com>
1824 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1825 already defined elsewhere.
1827 2001-02-19 Ben Elliston <bje@redhat.com>
1829 * sim-main.h (sim_monitor): Return an int.
1830 * interp.c (sim_monitor): Add return values.
1831 (signal_exception): Handle error conditions from sim_monitor.
1833 2001-02-08 Ben Elliston <bje@redhat.com>
1835 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1836 (store_memory): Likewise, pass cia to sim_core_write*.
1838 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1840 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1841 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1843 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1845 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1846 * Makefile.in: Don't delete *.igen when cleaning directory.
1848 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1850 * m16.igen (break): Call SignalException not sim_engine_halt.
1852 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1854 From Jason Eckhardt:
1855 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1857 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1859 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1861 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1863 * mips.igen (do_dmultx): Fix typo.
1865 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1867 * configure: Regenerated to track ../common/aclocal.m4 changes.
1869 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1871 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1873 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1875 * sim-main.h (GPR_CLEAR): Define macro.
1877 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1879 * interp.c (decode_coproc): Output long using %lx and not %s.
1881 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1883 * interp.c (sim_open): Sort & extend dummy memory regions for
1884 --board=jmr3904 for eCos.
1886 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1888 * configure: Regenerated.
1890 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1892 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1893 calls, conditional on the simulator being in verbose mode.
1895 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1897 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1898 cache don't get ReservedInstruction traps.
1900 1999-11-29 Mark Salter <msalter@cygnus.com>
1902 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1903 to clear status bits in sdisr register. This is how the hardware works.
1905 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1906 being used by cygmon.
1908 1999-11-11 Andrew Haley <aph@cygnus.com>
1910 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1913 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1915 * mips.igen (MULT): Correct previous mis-applied patch.
1917 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1919 * mips.igen (delayslot32): Handle sequence like
1920 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1921 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1922 (MULT): Actually pass the third register...
1924 1999-09-03 Mark Salter <msalter@cygnus.com>
1926 * interp.c (sim_open): Added more memory aliases for additional
1927 hardware being touched by cygmon on jmr3904 board.
1929 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1931 * configure: Regenerated to track ../common/aclocal.m4 changes.
1933 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1935 * interp.c (sim_store_register): Handle case where client - GDB -
1936 specifies that a 4 byte register is 8 bytes in size.
1937 (sim_fetch_register): Ditto.
1939 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1941 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1942 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1943 (idt_monitor_base): Base address for IDT monitor traps.
1944 (pmon_monitor_base): Ditto for PMON.
1945 (lsipmon_monitor_base): Ditto for LSI PMON.
1946 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1947 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1948 (sim_firmware_command): New function.
1949 (mips_option_handler): Call it for OPTION_FIRMWARE.
1950 (sim_open): Allocate memory for idt_monitor region. If "--board"
1951 option was given, add no monitor by default. Add BREAK hooks only if
1952 monitors are also there.
1954 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1956 * interp.c (sim_monitor): Flush output before reading input.
1958 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1960 * tconfig.in (SIM_HANDLES_LMA): Always define.
1962 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1964 From Mark Salter <msalter@cygnus.com>:
1965 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1966 (sim_open): Add setup for BSP board.
1968 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1970 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1971 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1972 them as unimplemented.
1974 1999-05-08 Felix Lee <flee@cygnus.com>
1976 * configure: Regenerated to track ../common/aclocal.m4 changes.
1978 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1980 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1982 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1984 * configure.in: Any mips64vr5*-*-* target should have
1985 -DTARGET_ENABLE_FR=1.
1986 (default_endian): Any mips64vr*el-*-* target should default to
1988 * configure: Re-generate.
1990 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1992 * mips.igen (ldl): Extend from _16_, not 32.
1994 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1996 * interp.c (sim_store_register): Force registers written to by GDB
1997 into an un-interpreted state.
1999 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
2001 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2002 CPU, start periodic background I/O polls.
2003 (tx3904sio_poll): New function: periodic I/O poller.
2005 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
2007 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2009 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
2011 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2014 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
2016 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2017 (load_word): Call SIM_CORE_SIGNAL hook on error.
2018 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2019 starting. For exception dispatching, pass PC instead of NULL_CIA.
2020 (decode_coproc): Use COP0_BADVADDR to store faulting address.
2021 * sim-main.h (COP0_BADVADDR): Define.
2022 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2023 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2024 (_sim_cpu): Add exc_* fields to store register value snapshots.
2025 * mips.igen (*): Replace memory-related SignalException* calls
2026 with references to SIM_CORE_SIGNAL hook.
2028 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2030 * sim-main.c (*): Minor warning cleanups.
2032 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
2034 * m16.igen (DADDIU5): Correct type-o.
2036 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
2038 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2041 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2043 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2045 (interp.o): Add dependency on itable.h
2046 (oengine.c, gencode): Delete remaining references.
2047 (BUILT_SRC_FROM_GEN): Clean up.
2049 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2052 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2053 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2054 tmp-run-hack) : New.
2055 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2056 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2057 Drop the "64" qualifier to get the HACK generator working.
2058 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2059 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2060 qualifier to get the hack generator working.
2061 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2062 (DSLL): Use do_dsll.
2063 (DSLLV): Use do_dsllv.
2064 (DSRA): Use do_dsra.
2065 (DSRL): Use do_dsrl.
2066 (DSRLV): Use do_dsrlv.
2067 (BC1): Move *vr4100 to get the HACK generator working.
2068 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2069 get the HACK generator working.
2070 (MACC) Rename to get the HACK generator working.
2071 (DMACC,MACCS,DMACCS): Add the 64.
2073 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2075 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2076 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2078 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2080 * mips/interp.c (DEBUG): Cleanups.
2082 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2084 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2085 (tx3904sio_tickle): fflush after a stdout character output.
2087 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2089 * interp.c (sim_close): Uninstall modules.
2091 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2093 * sim-main.h, interp.c (sim_monitor): Change to global
2096 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2098 * configure.in (vr4100): Only include vr4100 instructions in
2100 * configure: Re-generate.
2101 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2103 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2105 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2106 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2109 * configure.in (sim_default_gen, sim_use_gen): Replace with
2111 (--enable-sim-igen): Delete config option. Always using IGEN.
2112 * configure: Re-generate.
2114 * Makefile.in (gencode): Kill, kill, kill.
2117 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2119 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2120 bit mips16 igen simulator.
2121 * configure: Re-generate.
2123 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2124 as part of vr4100 ISA.
2125 * vr.igen: Mark all instructions as 64 bit only.
2127 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2129 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2132 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2134 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2135 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2136 * configure: Re-generate.
2138 * m16.igen (BREAK): Define breakpoint instruction.
2139 (JALX32): Mark instruction as mips16 and not r3900.
2140 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2142 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2144 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2146 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2147 insn as a debug breakpoint.
2149 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2151 (PENDING_SCHED): Clean up trace statement.
2152 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2153 (PENDING_FILL): Delay write by only one cycle.
2154 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2156 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2158 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2160 (pending_tick): Move incrementing of index to FOR statement.
2161 (pending_tick): Only update PENDING_OUT after a write has occured.
2163 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2165 * configure: Re-generate.
2167 * interp.c (sim_engine_run OLD): Delete explicit call to
2168 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2170 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2172 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2173 interrupt level number to match changed SignalExceptionInterrupt
2176 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2178 * interp.c: #include "itable.h" if WITH_IGEN.
2179 (get_insn_name): New function.
2180 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2181 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2183 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2185 * configure: Rebuilt to inhale new common/aclocal.m4.
2187 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2189 * dv-tx3904sio.c: Include sim-assert.h.
2191 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2193 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2194 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2195 Reorganize target-specific sim-hardware checks.
2196 * configure: rebuilt.
2197 * interp.c (sim_open): For tx39 target boards, set
2198 OPERATING_ENVIRONMENT, add tx3904sio devices.
2199 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2200 ROM executables. Install dv-sockser into sim-modules list.
2202 * dv-tx3904irc.c: Compiler warning clean-up.
2203 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2204 frequent hw-trace messages.
2206 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2208 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2210 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2212 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2214 * vr.igen: New file.
2215 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2216 * mips.igen: Define vr4100 model. Include vr.igen.
2217 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2219 * mips.igen (check_mf_hilo): Correct check.
2221 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2223 * sim-main.h (interrupt_event): Add prototype.
2225 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2226 register_ptr, register_value.
2227 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2229 * sim-main.h (tracefh): Make extern.
2231 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2233 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2234 Reduce unnecessarily high timer event frequency.
2235 * dv-tx3904cpu.c: Ditto for interrupt event.
2237 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2239 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2241 (interrupt_event): Made non-static.
2243 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2244 interchange of configuration values for external vs. internal
2247 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2249 * mips.igen (BREAK): Moved code to here for
2250 simulator-reserved break instructions.
2251 * gencode.c (build_instruction): Ditto.
2252 * interp.c (signal_exception): Code moved from here. Non-
2253 reserved instructions now use exception vector, rather
2255 * sim-main.h: Moved magic constants to here.
2257 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2259 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2260 register upon non-zero interrupt event level, clear upon zero
2262 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2263 by passing zero event value.
2264 (*_io_{read,write}_buffer): Endianness fixes.
2265 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2266 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2268 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2269 serial I/O and timer module at base address 0xFFFF0000.
2271 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2273 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2276 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2278 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2280 * configure: Update.
2282 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2284 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2285 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2286 * configure.in: Include tx3904tmr in hw_device list.
2287 * configure: Rebuilt.
2288 * interp.c (sim_open): Instantiate three timer instances.
2289 Fix address typo of tx3904irc instance.
2291 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2293 * interp.c (signal_exception): SystemCall exception now uses
2294 the exception vector.
2296 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2298 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2301 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2303 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2305 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2307 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2309 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2310 sim-main.h. Declare a struct hw_descriptor instead of struct
2311 hw_device_descriptor.
2313 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2315 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2316 right bits and then re-align left hand bytes to correct byte
2317 lanes. Fix incorrect computation in do_store_left when loading
2318 bytes from second word.
2320 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2322 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2323 * interp.c (sim_open): Only create a device tree when HW is
2326 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2327 * interp.c (signal_exception): Ditto.
2329 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2331 * gencode.c: Mark BEGEZALL as LIKELY.
2333 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2335 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2336 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2338 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2340 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2341 modules. Recognize TX39 target with "mips*tx39" pattern.
2342 * configure: Rebuilt.
2343 * sim-main.h (*): Added many macros defining bits in
2344 TX39 control registers.
2345 (SignalInterrupt): Send actual PC instead of NULL.
2346 (SignalNMIReset): New exception type.
2347 * interp.c (board): New variable for future use to identify
2348 a particular board being simulated.
2349 (mips_option_handler,mips_options): Added "--board" option.
2350 (interrupt_event): Send actual PC.
2351 (sim_open): Make memory layout conditional on board setting.
2352 (signal_exception): Initial implementation of hardware interrupt
2353 handling. Accept another break instruction variant for simulator
2355 (decode_coproc): Implement RFE instruction for TX39.
2356 (mips.igen): Decode RFE instruction as such.
2357 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2358 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2359 bbegin to implement memory map.
2360 * dv-tx3904cpu.c: New file.
2361 * dv-tx3904irc.c: New file.
2363 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2365 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2367 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2369 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2370 with calls to check_div_hilo.
2372 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2374 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2375 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2376 Add special r3900 version of do_mult_hilo.
2377 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2378 with calls to check_mult_hilo.
2379 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2380 with calls to check_div_hilo.
2382 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2384 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2385 Document a replacement.
2387 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2389 * interp.c (sim_monitor): Make mon_printf work.
2391 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2393 * sim-main.h (INSN_NAME): New arg `cpu'.
2395 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2397 * configure: Regenerated to track ../common/aclocal.m4 changes.
2399 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2401 * configure: Regenerated to track ../common/aclocal.m4 changes.
2404 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2406 * acconfig.h: New file.
2407 * configure.in: Reverted change of Apr 24; use sinclude again.
2409 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2411 * configure: Regenerated to track ../common/aclocal.m4 changes.
2414 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2416 * configure.in: Don't call sinclude.
2418 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2420 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2422 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2424 * mips.igen (ERET): Implement.
2426 * interp.c (decode_coproc): Return sign-extended EPC.
2428 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2430 * interp.c (signal_exception): Do not ignore Trap.
2431 (signal_exception): On TRAP, restart at exception address.
2432 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2433 (signal_exception): Update.
2434 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2435 so that TRAP instructions are caught.
2437 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2439 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2440 contains HI/LO access history.
2441 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2442 (HIACCESS, LOACCESS): Delete, replace with
2443 (HIHISTORY, LOHISTORY): New macros.
2444 (CHECKHILO): Delete all, moved to mips.igen
2446 * gencode.c (build_instruction): Do not generate checks for
2447 correct HI/LO register usage.
2449 * interp.c (old_engine_run): Delete checks for correct HI/LO
2452 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2453 check_mf_cycles): New functions.
2454 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2455 do_divu, domultx, do_mult, do_multu): Use.
2457 * tx.igen ("madd", "maddu"): Use.
2459 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2461 * mips.igen (DSRAV): Use function do_dsrav.
2462 (SRAV): Use new function do_srav.
2464 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2465 (B): Sign extend 11 bit immediate.
2466 (EXT-B*): Shift 16 bit immediate left by 1.
2467 (ADDIU*): Don't sign extend immediate value.
2469 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2471 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2473 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2476 * mips.igen (delayslot32, nullify_next_insn): New functions.
2477 (m16.igen): Always include.
2478 (do_*): Add more tracing.
2480 * m16.igen (delayslot16): Add NIA argument, could be called by a
2481 32 bit MIPS16 instruction.
2483 * interp.c (ifetch16): Move function from here.
2484 * sim-main.c (ifetch16): To here.
2486 * sim-main.c (ifetch16, ifetch32): Update to match current
2487 implementations of LH, LW.
2488 (signal_exception): Don't print out incorrect hex value of illegal
2491 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2493 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2496 * m16.igen: Implement MIPS16 instructions.
2498 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2499 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2500 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2501 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2502 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2503 bodies of corresponding code from 32 bit insn to these. Also used
2504 by MIPS16 versions of functions.
2506 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2507 (IMEM16): Drop NR argument from macro.
2509 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2511 * Makefile.in (SIM_OBJS): Add sim-main.o.
2513 * sim-main.h (address_translation, load_memory, store_memory,
2514 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2516 (pr_addr, pr_uword64): Declare.
2517 (sim-main.c): Include when H_REVEALS_MODULE_P.
2519 * interp.c (address_translation, load_memory, store_memory,
2520 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2522 * sim-main.c: To here. Fix compilation problems.
2524 * configure.in: Enable inlining.
2525 * configure: Re-config.
2527 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2529 * configure: Regenerated to track ../common/aclocal.m4 changes.
2531 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2533 * mips.igen: Include tx.igen.
2534 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2535 * tx.igen: New file, contains MADD and MADDU.
2537 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2538 the hardwired constant `7'.
2539 (store_memory): Ditto.
2540 (LOADDRMASK): Move definition to sim-main.h.
2542 mips.igen (MTC0): Enable for r3900.
2545 mips.igen (do_load_byte): Delete.
2546 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2547 do_store_right): New functions.
2548 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2550 configure.in: Let the tx39 use igen again.
2553 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2555 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2556 not an address sized quantity. Return zero for cache sizes.
2558 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2560 * mips.igen (r3900): r3900 does not support 64 bit integer
2563 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2565 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2567 * configure : Rebuild.
2569 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2571 * configure: Regenerated to track ../common/aclocal.m4 changes.
2573 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2575 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2577 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2579 * configure: Regenerated to track ../common/aclocal.m4 changes.
2580 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2582 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2584 * configure: Regenerated to track ../common/aclocal.m4 changes.
2586 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2588 * interp.c (Max, Min): Comment out functions. Not yet used.
2590 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2592 * configure: Regenerated to track ../common/aclocal.m4 changes.
2594 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2596 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2597 configurable settings for stand-alone simulator.
2599 * configure.in: Added X11 search, just in case.
2601 * configure: Regenerated.
2603 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2605 * interp.c (sim_write, sim_read, load_memory, store_memory):
2606 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2608 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2610 * sim-main.h (GETFCC): Return an unsigned value.
2612 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2614 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2615 (DADD): Result destination is RD not RT.
2617 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2619 * sim-main.h (HIACCESS, LOACCESS): Always define.
2621 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2623 * interp.c (sim_info): Delete.
2625 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2627 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2628 (mips_option_handler): New argument `cpu'.
2629 (sim_open): Update call to sim_add_option_table.
2631 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2633 * mips.igen (CxC1): Add tracing.
2635 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2637 * sim-main.h (Max, Min): Declare.
2639 * interp.c (Max, Min): New functions.
2641 * mips.igen (BC1): Add tracing.
2643 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2645 * interp.c Added memory map for stack in vr4100
2647 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2649 * interp.c (load_memory): Add missing "break"'s.
2651 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2653 * interp.c (sim_store_register, sim_fetch_register): Pass in
2654 length parameter. Return -1.
2656 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2658 * interp.c: Added hardware init hook, fixed warnings.
2660 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2662 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2664 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2666 * interp.c (ifetch16): New function.
2668 * sim-main.h (IMEM32): Rename IMEM.
2669 (IMEM16_IMMED): Define.
2671 (DELAY_SLOT): Update.
2673 * m16run.c (sim_engine_run): New file.
2675 * m16.igen: All instructions except LB.
2676 (LB): Call do_load_byte.
2677 * mips.igen (do_load_byte): New function.
2678 (LB): Call do_load_byte.
2680 * mips.igen: Move spec for insn bit size and high bit from here.
2681 * Makefile.in (tmp-igen, tmp-m16): To here.
2683 * m16.dc: New file, decode mips16 instructions.
2685 * Makefile.in (SIM_NO_ALL): Define.
2686 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2688 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2690 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2691 point unit to 32 bit registers.
2692 * configure: Re-generate.
2694 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2696 * configure.in (sim_use_gen): Make IGEN the default simulator
2697 generator for generic 32 and 64 bit mips targets.
2698 * configure: Re-generate.
2700 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2702 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2705 * interp.c (sim_fetch_register, sim_store_register): Read/write
2706 FGR from correct location.
2707 (sim_open): Set size of FGR's according to
2708 WITH_TARGET_FLOATING_POINT_BITSIZE.
2710 * sim-main.h (FGR): Store floating point registers in a separate
2713 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2715 * configure: Regenerated to track ../common/aclocal.m4 changes.
2717 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2719 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2721 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2723 * interp.c (pending_tick): New function. Deliver pending writes.
2725 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2726 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2727 it can handle mixed sized quantites and single bits.
2729 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2731 * interp.c (oengine.h): Do not include when building with IGEN.
2732 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2733 (sim_info): Ditto for PROCESSOR_64BIT.
2734 (sim_monitor): Replace ut_reg with unsigned_word.
2735 (*): Ditto for t_reg.
2736 (LOADDRMASK): Define.
2737 (sim_open): Remove defunct check that host FP is IEEE compliant,
2738 using software to emulate floating point.
2739 (value_fpr, ...): Always compile, was conditional on HASFPU.
2741 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2743 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2746 * interp.c (SD, CPU): Define.
2747 (mips_option_handler): Set flags in each CPU.
2748 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2749 (sim_close): Do not clear STATE, deleted anyway.
2750 (sim_write, sim_read): Assume CPU zero's vm should be used for
2752 (sim_create_inferior): Set the PC for all processors.
2753 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2755 (mips16_entry): Pass correct nr of args to store_word, load_word.
2756 (ColdReset): Cold reset all cpu's.
2757 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2758 (sim_monitor, load_memory, store_memory, signal_exception): Use
2759 `CPU' instead of STATE_CPU.
2762 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2765 * sim-main.h (signal_exception): Add sim_cpu arg.
2766 (SignalException*): Pass both SD and CPU to signal_exception.
2767 * interp.c (signal_exception): Update.
2769 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2771 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2772 address_translation): Ditto
2773 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2775 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2777 * configure: Regenerated to track ../common/aclocal.m4 changes.
2779 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2781 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2783 * mips.igen (model): Map processor names onto BFD name.
2785 * sim-main.h (CPU_CIA): Delete.
2786 (SET_CIA, GET_CIA): Define
2788 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2790 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2793 * configure.in (default_endian): Configure a big-endian simulator
2795 * configure: Re-generate.
2797 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2799 * configure: Regenerated to track ../common/aclocal.m4 changes.
2801 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2803 * interp.c (sim_monitor): Handle Densan monitor outbyte
2804 and inbyte functions.
2806 1997-12-29 Felix Lee <flee@cygnus.com>
2808 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2810 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2812 * Makefile.in (tmp-igen): Arrange for $zero to always be
2813 reset to zero after every instruction.
2815 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2817 * configure: Regenerated to track ../common/aclocal.m4 changes.
2820 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2822 * mips.igen (MSUB): Fix to work like MADD.
2823 * gencode.c (MSUB): Similarly.
2825 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2827 * configure: Regenerated to track ../common/aclocal.m4 changes.
2829 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2831 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2833 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2835 * sim-main.h (sim-fpu.h): Include.
2837 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2838 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2839 using host independant sim_fpu module.
2841 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2843 * interp.c (signal_exception): Report internal errors with SIGABRT
2846 * sim-main.h (C0_CONFIG): New register.
2847 (signal.h): No longer include.
2849 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2851 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2853 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2855 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2857 * mips.igen: Tag vr5000 instructions.
2858 (ANDI): Was missing mipsIV model, fix assembler syntax.
2859 (do_c_cond_fmt): New function.
2860 (C.cond.fmt): Handle mips I-III which do not support CC field
2862 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2863 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2865 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2866 vr5000 which saves LO in a GPR separatly.
2868 * configure.in (enable-sim-igen): For vr5000, select vr5000
2869 specific instructions.
2870 * configure: Re-generate.
2872 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2874 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2876 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2877 fmt_uninterpreted_64 bit cases to switch. Convert to
2880 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2882 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2883 as specified in IV3.2 spec.
2884 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2886 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2888 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2889 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2890 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2891 PENDING_FILL versions of instructions. Simplify.
2893 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2895 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2897 (MTHI, MFHI): Disable code checking HI-LO.
2899 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2901 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2903 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2905 * gencode.c (build_mips16_operands): Replace IPC with cia.
2907 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2908 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2910 (UndefinedResult): Replace function with macro/function
2912 (sim_engine_run): Don't save PC in IPC.
2914 * sim-main.h (IPC): Delete.
2917 * interp.c (signal_exception, store_word, load_word,
2918 address_translation, load_memory, store_memory, cache_op,
2919 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2920 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2921 current instruction address - cia - argument.
2922 (sim_read, sim_write): Call address_translation directly.
2923 (sim_engine_run): Rename variable vaddr to cia.
2924 (signal_exception): Pass cia to sim_monitor
2926 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2927 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2928 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2930 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2931 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2934 * interp.c (signal_exception): Pass restart address to
2937 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2938 idecode.o): Add dependency.
2940 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2942 (DELAY_SLOT): Update NIA not PC with branch address.
2943 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2945 * mips.igen: Use CIA not PC in branch calculations.
2946 (illegal): Call SignalException.
2947 (BEQ, ADDIU): Fix assembler.
2949 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2951 * m16.igen (JALX): Was missing.
2953 * configure.in (enable-sim-igen): New configuration option.
2954 * configure: Re-generate.
2956 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2958 * interp.c (load_memory, store_memory): Delete parameter RAW.
2959 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2960 bypassing {load,store}_memory.
2962 * sim-main.h (ByteSwapMem): Delete definition.
2964 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2966 * interp.c (sim_do_command, sim_commands): Delete mips specific
2967 commands. Handled by module sim-options.
2969 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2970 (WITH_MODULO_MEMORY): Define.
2972 * interp.c (sim_info): Delete code printing memory size.
2974 * interp.c (mips_size): Nee sim_size, delete function.
2976 (monitor, monitor_base, monitor_size): Delete global variables.
2977 (sim_open, sim_close): Delete code creating monitor and other
2978 memory regions. Use sim-memopts module, via sim_do_commandf, to
2979 manage memory regions.
2980 (load_memory, store_memory): Use sim-core for memory model.
2982 * interp.c (address_translation): Delete all memory map code
2983 except line forcing 32 bit addresses.
2985 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2987 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2990 * interp.c (logfh, logfile): Delete globals.
2991 (sim_open, sim_close): Delete code opening & closing log file.
2992 (mips_option_handler): Delete -l and -n options.
2993 (OPTION mips_options): Ditto.
2995 * interp.c (OPTION mips_options): Rename option trace to dinero.
2996 (mips_option_handler): Update.
2998 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3000 * interp.c (fetch_str): New function.
3001 (sim_monitor): Rewrite using sim_read & sim_write.
3002 (sim_open): Check magic number.
3003 (sim_open): Write monitor vectors into memory using sim_write.
3004 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3005 (sim_read, sim_write): Simplify - transfer data one byte at a
3007 (load_memory, store_memory): Clarify meaning of parameter RAW.
3009 * sim-main.h (isHOST): Defete definition.
3010 (isTARGET): Mark as depreciated.
3011 (address_translation): Delete parameter HOST.
3013 * interp.c (address_translation): Delete parameter HOST.
3015 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3019 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3020 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3022 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3024 * mips.igen: Add model filter field to records.
3026 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3028 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
3030 interp.c (sim_engine_run): Do not compile function sim_engine_run
3031 when WITH_IGEN == 1.
3033 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3034 target architecture.
3036 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3037 igen. Replace with configuration variables sim_igen_flags /
3040 * m16.igen: New file. Copy mips16 insns here.
3041 * mips.igen: From here.
3043 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3045 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3047 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3049 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3051 * gencode.c (build_instruction): Follow sim_write's lead in using
3052 BigEndianMem instead of !ByteSwapMem.
3054 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3056 * configure.in (sim_gen): Dependent on target, select type of
3057 generator. Always select old style generator.
3059 configure: Re-generate.
3061 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3063 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3064 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3065 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3066 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3067 SIM_@sim_gen@_*, set by autoconf.
3069 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3071 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3073 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3074 CURRENT_FLOATING_POINT instead.
3076 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3077 (address_translation): Raise exception InstructionFetch when
3078 translation fails and isINSTRUCTION.
3080 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3081 sim_engine_run): Change type of of vaddr and paddr to
3083 (address_translation, prefetch, load_memory, store_memory,
3084 cache_op): Change type of vAddr and pAddr to address_word.
3086 * gencode.c (build_instruction): Change type of vaddr and paddr to
3089 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3091 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3092 macro to obtain result of ALU op.
3094 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3096 * interp.c (sim_info): Call profile_print.
3098 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3100 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3102 * sim-main.h (WITH_PROFILE): Do not define, defined in
3103 common/sim-config.h. Use sim-profile module.
3104 (simPROFILE): Delete defintion.
3106 * interp.c (PROFILE): Delete definition.
3107 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3108 (sim_close): Delete code writing profile histogram.
3109 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3111 (sim_engine_run): Delete code profiling the PC.
3113 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3115 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3117 * interp.c (sim_monitor): Make register pointers of type
3120 * sim-main.h: Make registers of type unsigned_word not
3123 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3125 * interp.c (sync_operation): Rename from SyncOperation, make
3126 global, add SD argument.
3127 (prefetch): Rename from Prefetch, make global, add SD argument.
3128 (decode_coproc): Make global.
3130 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3132 * gencode.c (build_instruction): Generate DecodeCoproc not
3133 decode_coproc calls.
3135 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3136 (SizeFGR): Move to sim-main.h
3137 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3138 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3139 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3141 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3142 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3143 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3144 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3145 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3146 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3148 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3150 (sim-alu.h): Include.
3151 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3152 (sim_cia): Typedef to instruction_address.
3154 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3156 * Makefile.in (interp.o): Rename generated file engine.c to
3161 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3163 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3165 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3167 * gencode.c (build_instruction): For "FPSQRT", output correct
3168 number of arguments to Recip.
3170 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3172 * Makefile.in (interp.o): Depends on sim-main.h
3174 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3176 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3177 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3178 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3179 STATE, DSSTATE): Define
3180 (GPR, FGRIDX, ..): Define.
3182 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3183 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3184 (GPR, FGRIDX, ...): Delete macros.
3186 * interp.c: Update names to match defines from sim-main.h
3188 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3190 * interp.c (sim_monitor): Add SD argument.
3191 (sim_warning): Delete. Replace calls with calls to
3193 (sim_error): Delete. Replace calls with sim_io_error.
3194 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3195 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3196 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3198 (mips_size): Rename from sim_size. Add SD argument.
3200 * interp.c (simulator): Delete global variable.
3201 (callback): Delete global variable.
3202 (mips_option_handler, sim_open, sim_write, sim_read,
3203 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3204 sim_size,sim_monitor): Use sim_io_* not callback->*.
3205 (sim_open): ZALLOC simulator struct.
3206 (PROFILE): Do not define.
3208 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3210 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3211 support.h with corresponding code.
3213 * sim-main.h (word64, uword64), support.h: Move definition to
3215 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3218 * Makefile.in: Update dependencies
3219 * interp.c: Do not include.
3221 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3223 * interp.c (address_translation, load_memory, store_memory,
3224 cache_op): Rename to from AddressTranslation et.al., make global,
3227 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3230 * interp.c (SignalException): Rename to signal_exception, make
3233 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3235 * sim-main.h (SignalException, SignalExceptionInterrupt,
3236 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3237 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3238 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3241 * interp.c, support.h: Use.
3243 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3245 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3246 to value_fpr / store_fpr. Add SD argument.
3247 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3248 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3250 * sim-main.h (ValueFPR, StoreFPR): Define.
3252 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3254 * interp.c (sim_engine_run): Check consistency between configure
3255 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3258 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3259 (mips_fpu): Configure WITH_FLOATING_POINT.
3260 (mips_endian): Configure WITH_TARGET_ENDIAN.
3261 * configure: Update.
3263 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3265 * configure: Regenerated to track ../common/aclocal.m4 changes.
3267 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3269 * configure: Regenerated.
3271 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3273 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3275 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3277 * gencode.c (print_igen_insn_models): Assume certain architectures
3278 include all mips* instructions.
3279 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3282 * Makefile.in (tmp.igen): Add target. Generate igen input from
3285 * gencode.c (FEATURE_IGEN): Define.
3286 (main): Add --igen option. Generate output in igen format.
3287 (process_instructions): Format output according to igen option.
3288 (print_igen_insn_format): New function.
3289 (print_igen_insn_models): New function.
3290 (process_instructions): Only issue warnings and ignore
3291 instructions when no FEATURE_IGEN.
3293 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3295 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3298 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3300 * configure: Regenerated to track ../common/aclocal.m4 changes.
3302 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3304 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3305 SIM_RESERVED_BITS): Delete, moved to common.
3306 (SIM_EXTRA_CFLAGS): Update.
3308 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3310 * configure.in: Configure non-strict memory alignment.
3311 * configure: Regenerated to track ../common/aclocal.m4 changes.
3313 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3315 * configure: Regenerated to track ../common/aclocal.m4 changes.
3317 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3319 * gencode.c (SDBBP,DERET): Added (3900) insns.
3320 (RFE): Turn on for 3900.
3321 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3322 (dsstate): Made global.
3323 (SUBTARGET_R3900): Added.
3324 (CANCELDELAYSLOT): New.
3325 (SignalException): Ignore SystemCall rather than ignore and
3326 terminate. Add DebugBreakPoint handling.
3327 (decode_coproc): New insns RFE, DERET; and new registers Debug
3328 and DEPC protected by SUBTARGET_R3900.
3329 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3331 * Makefile.in,configure.in: Add mips subtarget option.
3332 * configure: Update.
3334 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3336 * gencode.c: Add r3900 (tx39).
3339 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3341 * gencode.c (build_instruction): Don't need to subtract 4 for
3344 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3346 * interp.c: Correct some HASFPU problems.
3348 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3350 * configure: Regenerated to track ../common/aclocal.m4 changes.
3352 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3354 * interp.c (mips_options): Fix samples option short form, should
3357 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3359 * interp.c (sim_info): Enable info code. Was just returning.
3361 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3363 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3366 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3368 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3370 (build_instruction): Ditto for LL.
3372 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3374 * configure: Regenerated to track ../common/aclocal.m4 changes.
3376 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3378 * configure: Regenerated to track ../common/aclocal.m4 changes.
3381 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3383 * interp.c (sim_open): Add call to sim_analyze_program, update
3386 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3388 * interp.c (sim_kill): Delete.
3389 (sim_create_inferior): Add ABFD argument. Set PC from same.
3390 (sim_load): Move code initializing trap handlers from here.
3391 (sim_open): To here.
3392 (sim_load): Delete, use sim-hload.c.
3394 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3396 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3398 * configure: Regenerated to track ../common/aclocal.m4 changes.
3401 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3403 * interp.c (sim_open): Add ABFD argument.
3404 (sim_load): Move call to sim_config from here.
3405 (sim_open): To here. Check return status.
3407 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3409 * gencode.c (build_instruction): Two arg MADD should
3410 not assign result to $0.
3412 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3414 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3415 * sim/mips/configure.in: Regenerate.
3417 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3419 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3420 signed8, unsigned8 et.al. types.
3422 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3423 hosts when selecting subreg.
3425 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3427 * interp.c (sim_engine_run): Reset the ZERO register to zero
3428 regardless of FEATURE_WARN_ZERO.
3429 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3431 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3433 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3434 (SignalException): For BreakPoints ignore any mode bits and just
3436 (SignalException): Always set the CAUSE register.
3438 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3440 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3441 exception has been taken.
3443 * interp.c: Implement the ERET and mt/f sr instructions.
3445 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3447 * interp.c (SignalException): Don't bother restarting an
3450 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3452 * interp.c (SignalException): Really take an interrupt.
3453 (interrupt_event): Only deliver interrupts when enabled.
3455 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3457 * interp.c (sim_info): Only print info when verbose.
3458 (sim_info) Use sim_io_printf for output.
3460 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3462 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3465 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3467 * interp.c (sim_do_command): Check for common commands if a
3468 simulator specific command fails.
3470 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3472 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3473 and simBE when DEBUG is defined.
3475 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3477 * interp.c (interrupt_event): New function. Pass exception event
3478 onto exception handler.
3480 * configure.in: Check for stdlib.h.
3481 * configure: Regenerate.
3483 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3484 variable declaration.
3485 (build_instruction): Initialize memval1.
3486 (build_instruction): Add UNUSED attribute to byte, bigend,
3488 (build_operands): Ditto.
3490 * interp.c: Fix GCC warnings.
3491 (sim_get_quit_code): Delete.
3493 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3494 * Makefile.in: Ditto.
3495 * configure: Re-generate.
3497 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3499 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3501 * interp.c (mips_option_handler): New function parse argumes using
3503 (myname): Replace with STATE_MY_NAME.
3504 (sim_open): Delete check for host endianness - performed by
3506 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3507 (sim_open): Move much of the initialization from here.
3508 (sim_load): To here. After the image has been loaded and
3510 (sim_open): Move ColdReset from here.
3511 (sim_create_inferior): To here.
3512 (sim_open): Make FP check less dependant on host endianness.
3514 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3516 * interp.c (sim_set_callbacks): Delete.
3518 * interp.c (membank, membank_base, membank_size): Replace with
3519 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3520 (sim_open): Remove call to callback->init. gdb/run do this.
3524 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3526 * interp.c (big_endian_p): Delete, replaced by
3527 current_target_byte_order.
3529 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3531 * interp.c (host_read_long, host_read_word, host_swap_word,
3532 host_swap_long): Delete. Using common sim-endian.
3533 (sim_fetch_register, sim_store_register): Use H2T.
3534 (pipeline_ticks): Delete. Handled by sim-events.
3536 (sim_engine_run): Update.
3538 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3540 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3542 (SignalException): To here. Signal using sim_engine_halt.
3543 (sim_stop_reason): Delete, moved to common.
3545 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3547 * interp.c (sim_open): Add callback argument.
3548 (sim_set_callbacks): Delete SIM_DESC argument.
3551 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3553 * Makefile.in (SIM_OBJS): Add common modules.
3555 * interp.c (sim_set_callbacks): Also set SD callback.
3556 (set_endianness, xfer_*, swap_*): Delete.
3557 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3558 Change to functions using sim-endian macros.
3559 (control_c, sim_stop): Delete, use common version.
3560 (simulate): Convert into.
3561 (sim_engine_run): This function.
3562 (sim_resume): Delete.
3564 * interp.c (simulation): New variable - the simulator object.
3565 (sim_kind): Delete global - merged into simulation.
3566 (sim_load): Cleanup. Move PC assignment from here.
3567 (sim_create_inferior): To here.
3569 * sim-main.h: New file.
3570 * interp.c (sim-main.h): Include.
3572 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3574 * configure: Regenerated to track ../common/aclocal.m4 changes.
3576 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3578 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3580 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3582 * gencode.c (build_instruction): DIV instructions: check
3583 for division by zero and integer overflow before using
3584 host's division operation.
3586 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3588 * Makefile.in (SIM_OBJS): Add sim-load.o.
3589 * interp.c: #include bfd.h.
3590 (target_byte_order): Delete.
3591 (sim_kind, myname, big_endian_p): New static locals.
3592 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3593 after argument parsing. Recognize -E arg, set endianness accordingly.
3594 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3595 load file into simulator. Set PC from bfd.
3596 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3597 (set_endianness): Use big_endian_p instead of target_byte_order.
3599 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3601 * interp.c (sim_size): Delete prototype - conflicts with
3602 definition in remote-sim.h. Correct definition.
3604 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3606 * configure: Regenerated to track ../common/aclocal.m4 changes.
3609 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3611 * interp.c (sim_open): New arg `kind'.
3613 * configure: Regenerated to track ../common/aclocal.m4 changes.
3615 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3617 * configure: Regenerated to track ../common/aclocal.m4 changes.
3619 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3621 * interp.c (sim_open): Set optind to 0 before calling getopt.
3623 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3625 * configure: Regenerated to track ../common/aclocal.m4 changes.
3627 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3629 * interp.c : Replace uses of pr_addr with pr_uword64
3630 where the bit length is always 64 independent of SIM_ADDR.
3631 (pr_uword64) : added.
3633 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3635 * configure: Re-generate.
3637 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3639 * configure: Regenerate to track ../common/aclocal.m4 changes.
3641 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3643 * interp.c (sim_open): New SIM_DESC result. Argument is now
3645 (other sim_*): New SIM_DESC argument.
3647 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3649 * interp.c: Fix printing of addresses for non-64-bit targets.
3650 (pr_addr): Add function to print address based on size.
3652 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3654 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3656 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3658 * gencode.c (build_mips16_operands): Correct computation of base
3659 address for extended PC relative instruction.
3661 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3663 * interp.c (mips16_entry): Add support for floating point cases.
3664 (SignalException): Pass floating point cases to mips16_entry.
3665 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3667 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3669 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3670 and then set the state to fmt_uninterpreted.
3671 (COP_SW): Temporarily set the state to fmt_word while calling
3674 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3676 * gencode.c (build_instruction): The high order may be set in the
3677 comparison flags at any ISA level, not just ISA 4.
3679 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3681 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3682 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3683 * configure.in: sinclude ../common/aclocal.m4.
3684 * configure: Regenerated.
3686 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3688 * configure: Rebuild after change to aclocal.m4.
3690 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3692 * configure configure.in Makefile.in: Update to new configure
3693 scheme which is more compatible with WinGDB builds.
3694 * configure.in: Improve comment on how to run autoconf.
3695 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3696 * Makefile.in: Use autoconf substitution to install common
3699 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3701 * gencode.c (build_instruction): Use BigEndianCPU instead of
3704 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3706 * interp.c (sim_monitor): Make output to stdout visible in
3707 wingdb's I/O log window.
3709 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3711 * support.h: Undo previous change to SIGTRAP
3714 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3716 * interp.c (store_word, load_word): New static functions.
3717 (mips16_entry): New static function.
3718 (SignalException): Look for mips16 entry and exit instructions.
3719 (simulate): Use the correct index when setting fpr_state after
3720 doing a pending move.
3722 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3724 * interp.c: Fix byte-swapping code throughout to work on
3725 both little- and big-endian hosts.
3727 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3729 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3730 with gdb/config/i386/xm-windows.h.
3732 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3734 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3735 that messes up arithmetic shifts.
3737 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3739 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3740 SIGTRAP and SIGQUIT for _WIN32.
3742 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3744 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3745 force a 64 bit multiplication.
3746 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3747 destination register is 0, since that is the default mips16 nop
3750 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3752 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3753 (build_endian_shift): Don't check proc64.
3754 (build_instruction): Always set memval to uword64. Cast op2 to
3755 uword64 when shifting it left in memory instructions. Always use
3756 the same code for stores--don't special case proc64.
3758 * gencode.c (build_mips16_operands): Fix base PC value for PC
3760 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3762 * interp.c (simJALDELAYSLOT): Define.
3763 (JALDELAYSLOT): Define.
3764 (INDELAYSLOT, INJALDELAYSLOT): Define.
3765 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3767 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3769 * interp.c (sim_open): add flush_cache as a PMON routine
3770 (sim_monitor): handle flush_cache by ignoring it
3772 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3774 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3776 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3777 (BigEndianMem): Rename to ByteSwapMem and change sense.
3778 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3779 BigEndianMem references to !ByteSwapMem.
3780 (set_endianness): New function, with prototype.
3781 (sim_open): Call set_endianness.
3782 (sim_info): Use simBE instead of BigEndianMem.
3783 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3784 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3785 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3786 ifdefs, keeping the prototype declaration.
3787 (swap_word): Rewrite correctly.
3788 (ColdReset): Delete references to CONFIG. Delete endianness related
3789 code; moved to set_endianness.
3791 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3793 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3794 * interp.c (CHECKHILO): Define away.
3795 (simSIGINT): New macro.
3796 (membank_size): Increase from 1MB to 2MB.
3797 (control_c): New function.
3798 (sim_resume): Rename parameter signal to signal_number. Add local
3799 variable prev. Call signal before and after simulate.
3800 (sim_stop_reason): Add simSIGINT support.
3801 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3803 (sim_warning): Delete call to SignalException. Do call printf_filtered
3805 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3806 a call to sim_warning.
3808 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3810 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3811 16 bit instructions.
3813 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3815 Add support for mips16 (16 bit MIPS implementation):
3816 * gencode.c (inst_type): Add mips16 instruction encoding types.
3817 (GETDATASIZEINSN): Define.
3818 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3819 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3821 (MIPS16_DECODE): New table, for mips16 instructions.
3822 (bitmap_val): New static function.
3823 (struct mips16_op): Define.
3824 (mips16_op_table): New table, for mips16 operands.
3825 (build_mips16_operands): New static function.
3826 (process_instructions): If PC is odd, decode a mips16
3827 instruction. Break out instruction handling into new
3828 build_instruction function.
3829 (build_instruction): New static function, broken out of
3830 process_instructions. Check modifiers rather than flags for SHIFT
3831 bit count and m[ft]{hi,lo} direction.
3832 (usage): Pass program name to fprintf.
3833 (main): Remove unused variable this_option_optind. Change
3834 ``*loptarg++'' to ``loptarg++''.
3835 (my_strtoul): Parenthesize && within ||.
3836 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3837 (simulate): If PC is odd, fetch a 16 bit instruction, and
3838 increment PC by 2 rather than 4.
3839 * configure.in: Add case for mips16*-*-*.
3840 * configure: Rebuild.
3842 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3844 * interp.c: Allow -t to enable tracing in standalone simulator.
3845 Fix garbage output in trace file and error messages.
3847 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3849 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3850 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3851 * configure.in: Simplify using macros in ../common/aclocal.m4.
3852 * configure: Regenerated.
3853 * tconfig.in: New file.
3855 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3857 * interp.c: Fix bugs in 64-bit port.
3858 Use ansi function declarations for msvc compiler.
3859 Initialize and test file pointer in trace code.
3860 Prevent duplicate definition of LAST_EMED_REGNUM.
3862 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3864 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3866 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3868 * interp.c (SignalException): Check for explicit terminating
3870 * gencode.c: Pass instruction value through SignalException()
3871 calls for Trap, Breakpoint and Syscall.
3873 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3875 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3876 only used on those hosts that provide it.
3877 * configure.in: Add sqrt() to list of functions to be checked for.
3878 * config.in: Re-generated.
3879 * configure: Re-generated.
3881 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3883 * gencode.c (process_instructions): Call build_endian_shift when
3884 expanding STORE RIGHT, to fix swr.
3885 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3886 clear the high bits.
3887 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3888 Fix float to int conversions to produce signed values.
3890 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3892 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3893 (process_instructions): Correct handling of nor instruction.
3894 Correct shift count for 32 bit shift instructions. Correct sign
3895 extension for arithmetic shifts to not shift the number of bits in
3896 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3897 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3899 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3900 It's OK to have a mult follow a mult. What's not OK is to have a
3901 mult follow an mfhi.
3902 (Convert): Comment out incorrect rounding code.
3904 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3906 * interp.c (sim_monitor): Improved monitor printf
3907 simulation. Tidied up simulator warnings, and added "--log" option
3908 for directing warning message output.
3909 * gencode.c: Use sim_warning() rather than WARNING macro.
3911 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3913 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3914 getopt1.o, rather than on gencode.c. Link objects together.
3915 Don't link against -liberty.
3916 (gencode.o, getopt.o, getopt1.o): New targets.
3917 * gencode.c: Include <ctype.h> and "ansidecl.h".
3918 (AND): Undefine after including "ansidecl.h".
3919 (ULONG_MAX): Define if not defined.
3920 (OP_*): Don't define macros; now defined in opcode/mips.h.
3921 (main): Call my_strtoul rather than strtoul.
3922 (my_strtoul): New static function.
3924 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3926 * gencode.c (process_instructions): Generate word64 and uword64
3927 instead of `long long' and `unsigned long long' data types.
3928 * interp.c: #include sysdep.h to get signals, and define default
3930 * (Convert): Work around for Visual-C++ compiler bug with type
3932 * support.h: Make things compile under Visual-C++ by using
3933 __int64 instead of `long long'. Change many refs to long long
3934 into word64/uword64 typedefs.
3936 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3938 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3939 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3941 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3942 (AC_PROG_INSTALL): Added.
3943 (AC_PROG_CC): Moved to before configure.host call.
3944 * configure: Rebuilt.
3946 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3948 * configure.in: Define @SIMCONF@ depending on mips target.
3949 * configure: Rebuild.
3950 * Makefile.in (run): Add @SIMCONF@ to control simulator
3952 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3953 * interp.c: Remove some debugging, provide more detailed error
3954 messages, update memory accesses to use LOADDRMASK.
3956 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3958 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3959 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3961 * configure: Rebuild.
3962 * config.in: New file, generated by autoheader.
3963 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3964 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3965 HAVE_ANINT and HAVE_AINT, as appropriate.
3966 * Makefile.in (run): Use @LIBS@ rather than -lm.
3967 (interp.o): Depend upon config.h.
3968 (Makefile): Just rebuild Makefile.
3969 (clean): Remove stamp-h.
3970 (mostlyclean): Make the same as clean, not as distclean.
3971 (config.h, stamp-h): New targets.
3973 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3975 * interp.c (ColdReset): Fix boolean test. Make all simulator
3978 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3980 * interp.c (xfer_direct_word, xfer_direct_long,
3981 swap_direct_word, swap_direct_long, xfer_big_word,
3982 xfer_big_long, xfer_little_word, xfer_little_long,
3983 swap_word,swap_long): Added.
3984 * interp.c (ColdReset): Provide function indirection to
3985 host<->simulated_target transfer routines.
3986 * interp.c (sim_store_register, sim_fetch_register): Updated to
3987 make use of indirected transfer routines.
3989 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3991 * gencode.c (process_instructions): Ensure FP ABS instruction
3993 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3994 system call support.
3996 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3998 * interp.c (sim_do_command): Complain if callback structure not
4001 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
4003 * interp.c (Convert): Provide round-to-nearest and round-to-zero
4004 support for Sun hosts.
4005 * Makefile.in (gencode): Ensure the host compiler and libraries
4006 used for cross-hosted build.
4008 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
4010 * interp.c, gencode.c: Some more (TODO) tidying.
4012 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
4014 * gencode.c, interp.c: Replaced explicit long long references with
4015 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4016 * support.h (SET64LO, SET64HI): Macros added.
4018 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
4020 * configure: Regenerate with autoconf 2.7.
4022 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
4024 * interp.c (LoadMemory): Enclose text following #endif in /* */.
4025 * support.h: Remove superfluous "1" from #if.
4026 * support.h (CHECKSIM): Remove stray 'a' at end of line.
4028 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
4030 * interp.c (StoreFPR): Control UndefinedResult() call on
4031 WARN_RESULT manifest.
4033 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
4035 * gencode.c: Tidied instruction decoding, and added FP instruction
4038 * interp.c: Added dineroIII, and BSD profiling support. Also
4039 run-time FP handling.
4041 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4043 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4044 gencode.c, interp.c, support.h: created.
projects / thirdparty / binutils-gdb.git / blob