sim/mips/ChangeLog

   1 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * interp.c [TRACE]: Delete.
   4         (TRACE): Change to WITH_TRACE_ANY_P.
   5         [!WITH_TRACE_ANY_P] (open_trace): Define.
   6         (mips_option_handler, open_trace, sim_close, dotrace):
   7         Change defined(TRACE) to WITH_TRACE_ANY_P.
   8         (sim_open): Delete TRACE ifdef check.
   9         * sim-main.c (load_memory): Delete TRACE ifdef check.
  10         (store_memory): Likewise.
  11         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
  12         [!WITH_TRACE_ANY_P] (dotrace): Define.
  13
  14 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
  17         comments.
  18
  19 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
  20
  21         * sim-main.h (SIM_CPU): Delete.
  22
  23 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
  24
  25         * sim-main.h (sim_cia): Delete.
  26
  27 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
  28
  29         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
  30         PU_PC_GET.
  31         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
  32         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
  33         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
  34         CIA_SET to CPU_PC_SET.
  35         * sim-main.h (CIA_GET, CIA_SET): Delete.
  36
  37 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
  38
  39         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
  40         * sim-main.h (STATE_CPU): Delete.
  41
  42 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * configure: Regenerate.
  45
  46 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
  49         * interp.c (mips_pc_get, mips_pc_set): New functions.
  50         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
  51         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
  52         (sim_pc_get): Delete.
  53         * sim-main.h (SIM_CPU): Define.
  54         (struct sim_state): Change cpu to an array of pointers.
  55         (STATE_CPU): Drop &.
  56
  57 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  58
  59         * interp.c (mips_option_handler, open_trace, sim_close,
  60         sim_write, sim_read, sim_store_register, sim_fetch_register,
  61         sim_create_inferior, pr_addr, pr_uword64): Convert old style
  62         prototypes.
  63         (sim_open): Convert old style prototype.  Change casts with
  64         sim_write to unsigned char *.
  65         (fetch_str): Change null to unsigned char, and change cast to
  66         unsigned char *.
  67         (sim_monitor): Change c & ch to unsigned char.  Change cast to
  68         unsigned char *.
  69
  70 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
  73
  74 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
  77
  78 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
  79
  80         * tconfig.h (SIM_HAVE_PROFILE): Delete.
  81
  82 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
  83
  84         * config.in, configure: Regenerate.
  85
  86 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * interp.c (sim_pc_get): New function.
  89
  90 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  91
  92         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
  93         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
  94
  95 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  96
  97         * configure: Regenerate.
  98
  99 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * configure: Regenerate.
 102
 103 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 104
 105         * configure: Regenerate.
 106         * configure.ac (mips_extra_objs): Delete.
 107         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 108         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 109
 110 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 111
 112         * configure: Regenerate.
 113         * configure.ac: Delete sim_hw checks for dv-sockser.
 114
 115 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * config.in, configure: Regenerate.
 118         * tconfig.in: Rename file ...
 119         * tconfig.h: ... here.
 120
 121 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 122
 123         * tconfig.in: Delete includes.
 124         [HAVE_DV_SOCKSER]: Delete.
 125
 126 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 127
 128         * Makefile.in (SIM_RUN_OBJS): Delete.
 129
 130 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 131
 132         * configure.ac (AC_CHECK_HEADERS): Delete.
 133         * aclocal.m4, configure: Regenerate.
 134
 135 2014-08-19  Alan Modra  <amodra@gmail.com>
 136
 137         * configure: Regenerate.
 138
 139 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 140
 141         * configure: Regenerate.
 142         * config.in: Regenerate.
 143
 144 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 145
 146         * configure: Regenerate.
 147
 148 2013-09-23  Alan Modra  <amodra@gmail.com>
 149
 150         * configure: Regenerate.
 151
 152 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 153
 154         * aclocal.m4, configure: Regenerate.
 155
 156 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 157
 158         * configure: Rebuild.
 159
 160 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 161
 162         * configure: Regenerate.
 163
 164 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 165
 166         * configure.ac: Address use of dv-sockser.o.
 167         * tconfig.in: Conditionalize use of dv_sockser_install.
 168         * configure: Regenerated.
 169         * config.in: Regenerated.
 170
 171 2012-10-04  Chao-ying Fu  <fu@mips.com>
 172             Steve Ellcey  <sellcey@mips.com>
 173
 174         * mips/mips3264r2.igen (rdhwr): New.
 175
 176 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 177
 178         * configure.ac: Always link against dv-sockser.o.
 179         * configure: Regenerate.
 180
 181 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 182
 183         * config.in, configure: Regenerate.
 184
 185 2012-05-18  Nick Clifton  <nickc@redhat.com>
 186
 187         PR 14072
 188         * interp.c: Include config.h before system header files.
 189
 190 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 191
 192         * aclocal.m4, config.in, configure: Regenerate.
 193
 194 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 195
 196         * aclocal.m4: New file.
 197         * configure: Regenerate.
 198
 199 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 200
 201         * configure: Regenerate after common/acinclude.m4 update.
 202
 203 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 204
 205         * configure.ac: Change include to common/acinclude.m4.
 206
 207 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 208
 209         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 210         call.  Replace common.m4 include with SIM_AC_COMMON.
 211         * configure: Regenerate.
 212
 213 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 214
 215         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 216         $(SIM_EXTRA_DEPS).
 217         (tmp-mach-multi): Exit early when igen fails.
 218
 219 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 220
 221         * interp.c (sim_do_command): Delete.
 222
 223 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 224
 225         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 226         (tx3904sio_fifo_reset): Likewise.
 227         * interp.c (sim_monitor): Likewise.
 228
 229 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 230
 231         * interp.c (sim_write): Add const to buffer arg.
 232
 233 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 234
 235         * interp.c: Don't include sysdep.h
 236
 237 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 238
 239         * configure: Regenerate.
 240
 241 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 242
 243         * config.in: Regenerate.
 244         * configure: Likewise.
 245
 246         * configure: Regenerate.
 247
 248 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 249
 250         * configure: Regenerate to track ../common/common.m4 changes.
 251         * config.in: Ditto.
 252
 253 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 254             Daniel Jacobowitz  <dan@codesourcery.com>
 255             Joseph Myers  <joseph@codesourcery.com>
 256
 257         * configure: Regenerate.
 258
 259 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 260
 261         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 262         that unconditionally allows fmt_ps.
 263         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 264         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 265         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 266         filter from 64,f to 32,f.
 267         (PREFX): Change filter from 64 to 32.
 268         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 269         that use do_load_double instead of do_load.  Make both LUXC1
 270         versions unpredictable if SizeFGR () != 64.
 271         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 272         instead of do_store.  Remove unused variable.  Make both SUXC1
 273         versions unpredictable if SizeFGR () != 64.
 274
 275 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 276
 277         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 278         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 279         shifts for that case.
 280
 281 2007-09-04  Nick Clifton  <nickc@redhat.com>
 282
 283         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 284         (display_mem_info): New static variable.
 285         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 286         (mips_options): Add info-memory and memory-info.
 287         (sim_open): After processing the command line and board
 288         specification, check display_mem_info.  If it is set then
 289         call the real handler for the --memory-info command line
 290         switch.
 291
 292 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 293
 294         * configure.ac: Change license of multi-run.c to GPL version 3.
 295         * configure: Regenerate.
 296
 297 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 298
 299         * configure.ac, configure: Revert last patch.
 300
 301 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 302
 303         * configure.ac (sim_mipsisa3264_configs): New variable.
 304         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 305         every configuration support all four targets, using the triplet to
 306         determine the default.
 307         * configure: Regenerate.
 308
 309 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 310
 311         * Makefile.in (m16run.o): New rule.
 312
 313 2007-05-15  Thiemo Seufer  <ths@mips.com>
 314
 315         * mips3264r2.igen (DSHD): Fix compile warning.
 316
 317 2007-05-14  Thiemo Seufer  <ths@mips.com>
 318
 319         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 320         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 321         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 322         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 323         for mips32r2.
 324
 325 2007-03-01  Thiemo Seufer  <ths@mips.com>
 326
 327         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 328         and mips64.
 329
 330 2007-02-20  Thiemo Seufer  <ths@mips.com>
 331
 332         * dsp.igen: Update copyright notice.
 333         * dsp2.igen: Fix copyright notice.
 334
 335 2007-02-20  Thiemo Seufer  <ths@mips.com>
 336             Chao-Ying Fu  <fu@mips.com>
 337
 338         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 339         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 340         Add dsp2 to sim_igen_machine.
 341         * configure: Regenerate.
 342         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 343         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 344         (mulq_rs.ph): Use do_ph_mulq.
 345         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 346         * mips.igen: Add dsp2 model and include dsp2.igen.
 347         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 348         for *mips32r2, *mips64r2, *dsp.
 349         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 350         for *mips32r2, *mips64r2, *dsp2.
 351         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 352
 353 2007-02-19  Thiemo Seufer  <ths@mips.com>
 354             Nigel Stephens  <nigel@mips.com>
 355
 356         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 357         jumps with hazard barrier.
 358
 359 2007-02-19  Thiemo Seufer  <ths@mips.com>
 360             Nigel Stephens  <nigel@mips.com>
 361
 362         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 363         after each call to sim_io_write.
 364
 365 2007-02-19  Thiemo Seufer  <ths@mips.com>
 366             Nigel Stephens  <nigel@mips.com>
 367
 368         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 369         supported by this simulator.
 370         (decode_coproc): Recognise additional CP0 Config registers
 371         correctly.
 372
 373 2007-02-19  Thiemo Seufer  <ths@mips.com>
 374             Nigel Stephens  <nigel@mips.com>
 375             David Ung  <davidu@mips.com>
 376
 377         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 378         uninterpreted formats. If fmt is one of the uninterpreted types
 379         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 380         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 381         (store_fpr): When writing an invalid odd register, set the
 382         matching even register to fmt_unknown, not the following register.
 383         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 384         the the memory window at offset 0 set by --memory-size command
 385         line option.
 386         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 387         point register.
 388         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 389         register.
 390         (sim_monitor): When returning the memory size to the MIPS
 391         application, use the value in STATE_MEM_SIZE, not an arbitrary
 392         hardcoded value.
 393         (cop_lw): Don' mess around with FPR_STATE, just pass
 394         fmt_uninterpreted_32 to StoreFPR.
 395         (cop_sw): Similarly.
 396         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 397         (cop_sd): Similarly.
 398         * mips.igen (not_word_value): Single version for mips32, mips64
 399         and mips16.
 400
 401 2007-02-19  Thiemo Seufer <ths@mips.com>
 402             Nigel Stephens  <nigel@mips.com>
 403
 404         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 405         MBytes.
 406
 407 2007-02-17  Thiemo Seufer  <ths@mips.com>
 408
 409         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 410         configuration.
 411         * configure: Regenerate.
 412
 413 2007-02-17  Thiemo Seufer  <ths@mips.com>
 414
 415         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 416         Add mdmx to sim_igen_machine.
 417         (mipsisa64*-*-*): Likewise. Remove dsp.
 418         (mipsisa32*-*-*): Remove dsp.
 419         * configure: Regenerate.
 420
 421 2007-02-13  Thiemo Seufer  <ths@mips.com>
 422
 423         * configure.ac: Add mips*-sde-elf* target.
 424         * configure: Regenerate.
 425
 426 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 427
 428         * acconfig.h: Remove.
 429         * config.in, configure: Regenerate.
 430
 431 2006-11-07  Thiemo Seufer  <ths@mips.com>
 432
 433         * dsp.igen (do_w_op): Fix compiler warning.
 434
 435 2006-08-29  Thiemo Seufer  <ths@mips.com>
 436             David Ung  <davidu@mips.com>
 437
 438         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 439         sim_igen_machine.
 440         * configure: Regenerate.
 441         * mips.igen (model): Add smartmips.
 442         (MADDU): Increment ACX if carry.
 443         (do_mult): Clear ACX.
 444         (ROR,RORV): Add smartmips.
 445         (include): Include smartmips.igen.
 446         * sim-main.h (ACX): Set to REGISTERS[89].
 447         * smartmips.igen: New file.
 448
 449 2006-08-29  Thiemo Seufer  <ths@mips.com>
 450             David Ung  <davidu@mips.com>
 451
 452         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 453         mips3264r2.igen. Add missing dependency rules.
 454         * m16e.igen: Support for mips16e save/restore instructions.
 455
 456 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 457
 458         * configure: Regenerated.
 459
 460 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 461
 462         * configure: Regenerated.
 463
 464 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 465
 466         * configure: Regenerated.
 467
 468 2006-05-15 Chao-ying Fu  <fu@mips.com>
 469
 470         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 471
 472 2006-04-18  Nick Clifton  <nickc@redhat.com>
 473
 474         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 475         statement.
 476
 477 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 478
 479         * configure: Regenerate.
 480
 481 2005-12-14  Chao-ying Fu  <fu@mips.com>
 482
 483         * Makefile.in (SIM_OBJS): Add dsp.o.
 484         (dsp.o): New dependency.
 485         (IGEN_INCLUDE): Add dsp.igen.
 486         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 487         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 488         * configure: Regenerate.
 489         * mips.igen: Add dsp model and include dsp.igen.
 490         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 491         because these instructions are extended in DSP ASE.
 492         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 493         adding 6 DSP accumulator registers and 1 DSP control register.
 494         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 495         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 496         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 497         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 498         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 499         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 500         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 501         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 502         DSPCR_CCOND_SMASK): New define.
 503         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 504         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 505
 506 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 507
 508         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 509
 510 2005-06-16  David Ung  <davidu@mips.com>
 511             Nigel Stephens  <nigel@mips.com>
 512
 513         * mips.igen: New mips16e model and include m16e.igen.
 514         (check_u64): Add mips16e tag.
 515         * m16e.igen: New file for MIPS16e instructions.
 516         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 517         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 518         models.
 519         * configure: Regenerate.
 520
 521 2005-05-26  David Ung  <davidu@mips.com>
 522
 523         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 524         tags to all instructions which are applicable to the new ISAs.
 525         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 526         vr.igen.
 527         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 528         instructions.
 529         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 530         to mips.igen.
 531         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 532         * configure: Regenerate.
 533
 534 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 535
 536         * configure: Regenerate.
 537
 538 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 539
 540         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 541         explicit call to AC_CONFIG_HEADER.
 542         * configure: Regenerate.
 543
 544 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 545
 546         * configure.ac: Update to use ../common/common.m4.
 547         * configure: Re-generate.
 548
 549 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 550
 551         * configure: Regenerated to track ../common/aclocal.m4 changes.
 552
 553 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 554
 555         * configure.ac: Rename configure.in, require autoconf 2.59.
 556         * configure: Re-generate.
 557
 558 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 559
 560         * configure: Regenerate for ../common/aclocal.m4 update.
 561
 562 2004-09-24  Monika Chaddha  <monika@acmet.com>
 563
 564         Committed by Andrew Cagney.
 565         * m16.igen (CMP, CMPI): Fix assembler.
 566
 567 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 568
 569         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 570         * configure: Regenerate.
 571
 572 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 573
 574         * configure.in (sim_m16_machine): Include mipsIII.
 575         * configure: Regenerate.
 576
 577 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 578
 579         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 580         from COP0_BADVADDR.
 581         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 582
 583 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 584
 585         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 586
 587 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 588
 589         * mips.igen (check_fmt): Remove.
 590         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 591         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 592         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 593         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 594         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 595         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 596         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 597         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 598         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 599         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 600
 601 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 602
 603         * sb1.igen (check_sbx): New function.
 604         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 605
 606 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 607             Richard Sandiford  <rsandifo@redhat.com>
 608
 609         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 610         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 611         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 612         separate implementations for mipsIV and mipsV.  Use new macros to
 613         determine whether the restrictions apply.
 614
 615 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 616
 617         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 618         (check_mult_hilo): Improve comments.
 619         (check_div_hilo): Likewise.  Also, fork off a new version
 620         to handle mips32/mips64 (since there are no hazards to check
 621         in MIPS32/MIPS64).
 622
 623 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 624
 625         * mips.igen (do_dmultx): Fix check for negative operands.
 626
 627 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 628
 629         * Makefile.in (SHELL): Make sure this is defined.
 630         (various): Use $(SHELL) whenever we invoke move-if-change.
 631
 632 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 633
 634         * cp1.c: Tweak attribution slightly.
 635         * cp1.h: Likewise.
 636         * mdmx.c: Likewise.
 637         * mdmx.igen: Likewise.
 638         * mips3d.igen: Likewise.
 639         * sb1.igen: Likewise.
 640
 641 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 642
 643         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 644         unsigned operands.
 645
 646 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 647
 648         * interp.c (sim_open): Rename _bfd to bfd.
 649         (sim_create_inferior): Ditto.
 650
 651 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 652
 653         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 654
 655 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 656
 657         * mips.igen (EI, DI): Remove.
 658
 659 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 660
 661         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 662
 663 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 664             Andrew Cagney  <ac131313@redhat.com>
 665             Gavin Romig-Koch  <gavin@redhat.com>
 666             Graydon Hoare  <graydon@redhat.com>
 667             Aldy Hernandez  <aldyh@redhat.com>
 668             Dave Brolley  <brolley@redhat.com>
 669             Chris Demetriou  <cgd@broadcom.com>
 670
 671         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 672         (sim_mach_default): New variable.
 673         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 674         Add a new simulator generator, MULTI.
 675         * configure: Regenerate.
 676         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 677         (multi-run.o): New dependency.
 678         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 679         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 680         (tmp-multi): Combine them.
 681         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 682         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 683         (distclean-extra): New rule.
 684         * sim-main.h: Include bfd.h.
 685         (MIPS_MACH): New macro.
 686         * mips.igen (vr4120, vr5400, vr5500): New models.
 687         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 688         * vr.igen: Replace with new version.
 689
 690 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 691
 692         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 693         * configure: Regenerate.
 694
 695 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 696
 697         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 698         * mips.igen: Remove all invocations of check_branch_bug and
 699         mark_branch_bug.
 700
 701 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 702
 703         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 704
 705 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 706
 707         * mips.igen (do_load_double, do_store_double): New functions.
 708         (LDC1, SDC1): Rename to...
 709         (LDC1b, SDC1b): respectively.
 710         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 711
 712 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 713
 714         * cp1.c (fp_recip2): Modify initialization expression so that
 715         GCC will recognize it as constant.
 716
 717 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 718
 719         * mdmx.c (SD_): Delete.
 720         (Unpredictable): Re-define, for now, to directly invoke
 721         unpredictable_action().
 722         (mdmx_acc_op): Fix error in .ob immediate handling.
 723
 724 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 725
 726         * interp.c (sim_firmware_command): Initialize `address'.
 727
 728 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 729
 730         * configure: Regenerated to track ../common/aclocal.m4 changes.
 731
 732 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 733             Ed Satterthwaite  <ehs@broadcom.com>
 734
 735         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 736         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 737         * mips.igen: Include mips3d.igen.
 738         (mips3d): New model name for MIPS-3D ASE instructions.
 739         (CVT.W.fmt): Don't use this instruction for word (source) format
 740         instructions.
 741         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 742         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 743         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 744         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 745         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 746         (RSquareRoot1, RSquareRoot2): New macros.
 747         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 748         (fp_rsqrt2): New functions.
 749         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 750         * configure: Regenerate.
 751
 752 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 753             Ed Satterthwaite  <ehs@broadcom.com>
 754
 755         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 756         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 757         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 758         (convert): Note that this function is not used for paired-single
 759         format conversions.
 760         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 761         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 762         (check_fmt_p): Enable paired-single support.
 763         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 764         (PUU.PS): New instructions.
 765         (CVT.S.fmt): Don't use this instruction for paired-single format
 766         destinations.
 767         * sim-main.h (FP_formats): New value 'fmt_ps.'
 768         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 769         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 770
 771 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 772
 773         * mips.igen: Fix formatting of function calls in
 774         many FP operations.
 775
 776 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 777
 778         * mips.igen (MOVN, MOVZ): Trace result.
 779         (TNEI): Print "tnei" as the opcode name in traces.
 780         (CEIL.W): Add disassembly string for traces.
 781         (RSQRT.fmt): Make location of disassembly string consistent
 782         with other instructions.
 783
 784 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 785
 786         * mips.igen (X): Delete unused function.
 787
 788 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 789
 790         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 791
 792 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 793             Ed Satterthwaite  <ehs@broadcom.com>
 794
 795         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 796         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 797         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 798         (fp_nmsub): New prototypes.
 799         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 800         (NegMultiplySub): New defines.
 801         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 802         (MADD.D, MADD.S): Replace with...
 803         (MADD.fmt): New instruction.
 804         (MSUB.D, MSUB.S): Replace with...
 805         (MSUB.fmt): New instruction.
 806         (NMADD.D, NMADD.S): Replace with...
 807         (NMADD.fmt): New instruction.
 808         (NMSUB.D, MSUB.S): Replace with...
 809         (NMSUB.fmt): New instruction.
 810
 811 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 812             Ed Satterthwaite  <ehs@broadcom.com>
 813
 814         * cp1.c: Fix more comment spelling and formatting.
 815         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 816         (denorm_mode): New function.
 817         (fpu_unary, fpu_binary): Round results after operation, collect
 818         status from rounding operations, and update the FCSR.
 819         (convert): Collect status from integer conversions and rounding
 820         operations, and update the FCSR.  Adjust NaN values that result
 821         from conversions.  Convert to use sim_io_eprintf rather than
 822         fprintf, and remove some debugging code.
 823         * cp1.h (fenr_FS): New define.
 824
 825 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 826
 827         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 828         rounding mode to sim FP rounding mode flag conversion code into...
 829         (rounding_mode): New function.
 830
 831 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 832
 833         * cp1.c: Clean up formatting of a few comments.
 834         (value_fpr): Reformat switch statement.
 835
 836 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 837             Ed Satterthwaite  <ehs@broadcom.com>
 838
 839         * cp1.h: New file.
 840         * sim-main.h: Include cp1.h.
 841         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 842         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 843         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 844         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 845         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 846         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 847         * cp1.c: Don't include sim-fpu.h; already included by
 848         sim-main.h.  Clean up formatting of some comments.
 849         (NaN, Equal, Less): Remove.
 850         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 851         (fp_cmp): New functions.
 852         * mips.igen (do_c_cond_fmt): Remove.
 853         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 854         Compare.  Add result tracing.
 855         (CxC1): Remove, replace with...
 856         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 857         (DMxC1): Remove, replace with...
 858         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 859         (MxC1): Remove, replace with...
 860         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 861
 862 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 863
 864         * sim-main.h (FGRIDX): Remove, replace all uses with...
 865         (FGR_BASE): New macro.
 866         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 867         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 868         (NR_FGR, FGR): Likewise.
 869         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 870         * mips.igen: Likewise.
 871
 872 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 873
 874         * cp1.c: Add an FSF Copyright notice to this file.
 875
 876 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 877             Ed Satterthwaite  <ehs@broadcom.com>
 878
 879         * cp1.c (Infinity): Remove.
 880         * sim-main.h (Infinity): Likewise.
 881
 882         * cp1.c (fp_unary, fp_binary): New functions.
 883         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 884         (fp_sqrt): New functions, implemented in terms of the above.
 885         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 886         (Recip, SquareRoot): Remove (replaced by functions above).
 887         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 888         (fp_recip, fp_sqrt): New prototypes.
 889         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 890         (Recip, SquareRoot): Replace prototypes with #defines which
 891         invoke the functions above.
 892
 893 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 894
 895         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 896         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 897         file, remove PARAMS from prototypes.
 898         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 899         simulator state arguments.
 900         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 901         pass simulator state arguments.
 902         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 903         (store_fpr, convert): Remove 'sd' argument.
 904         (value_fpr): Likewise.  Convert to use 'SD' instead.
 905
 906 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 907
 908         * cp1.c (Min, Max): Remove #if 0'd functions.
 909         * sim-main.h (Min, Max): Remove.
 910
 911 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 912
 913         * cp1.c: fix formatting of switch case and default labels.
 914         * interp.c: Likewise.
 915         * sim-main.c: Likewise.
 916
 917 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 918
 919         * cp1.c: Clean up comments which describe FP formats.
 920          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 921
 922 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 923             Ed Satterthwaite  <ehs@broadcom.com>
 924
 925         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 926         Broadcom SiByte SB-1 processor configurations.
 927         * configure: Regenerate.
 928         * sb1.igen: New file.
 929         * mips.igen: Include sb1.igen.
 930         (sb1): New model.
 931         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 932         * mdmx.igen: Add "sb1" model to all appropriate functions and
 933         instructions.
 934         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 935         (ob_func, ob_acc): Reference the above.
 936         (qh_acc): Adjust to keep the same size as ob_acc.
 937         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 938         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 939
 940 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 941
 942         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 943
 944 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 945             Ed Satterthwaite  <ehs@broadcom.com>
 946
 947         * mips.igen (mdmx): New (pseudo-)model.
 948         * mdmx.c, mdmx.igen: New files.
 949         * Makefile.in (SIM_OBJS): Add mdmx.o.
 950         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 951         New typedefs.
 952         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 953         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 954         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 955         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 956         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 957         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 958         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 959         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 960         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 961         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 962         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 963         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 964         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 965         (qh_fmtsel): New macros.
 966         (_sim_cpu): New member "acc".
 967         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 968         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 969
 970 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 971
 972         * interp.c: Use 'deprecated' rather than 'depreciated.'
 973         * sim-main.h: Likewise.
 974
 975 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 976
 977         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 978         which wouldn't compile anyway.
 979         * sim-main.h (unpredictable_action): New function prototype.
 980         (Unpredictable): Define to call igen function unpredictable().
 981         (NotWordValue): New macro to call igen function not_word_value().
 982         (UndefinedResult): Remove.
 983         * interp.c (undefined_result): Remove.
 984         (unpredictable_action): New function.
 985         * mips.igen (not_word_value, unpredictable): New functions.
 986         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 987         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 988         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 989         NotWordValue() to check for unpredictable inputs, then
 990         Unpredictable() to handle them.
 991
 992 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 993
 994         * mips.igen: Fix formatting of calls to Unpredictable().
 995
 996 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 997
 998         * interp.c (sim_open): Revert previous change.
 999
1000 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1001
1002         * interp.c (sim_open): Disable chunk of code that wrote code in
1003         vector table entries.
1004
1005 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1006
1007         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1008         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1009         unused definitions.
1010
1011 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1012
1013         * cp1.c: Fix many formatting issues.
1014
1015 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1016
1017         * cp1.c (fpu_format_name): New function to replace...
1018         (DOFMT): This.  Delete, and update all callers.
1019         (fpu_rounding_mode_name): New function to replace...
1020         (RMMODE): This.  Delete, and update all callers.
1021
1022 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1023
1024         * interp.c: Move FPU support routines from here to...
1025         * cp1.c: Here.  New file.
1026         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1027         (cp1.o): New target.
1028
1029 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1030
1031         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1032         * mips.igen (mips32, mips64): New models, add to all instructions
1033         and functions as appropriate.
1034         (loadstore_ea, check_u64): New variant for model mips64.
1035         (check_fmt_p): New variant for models mipsV and mips64, remove
1036         mipsV model marking fro other variant.
1037         (SLL) Rename to...
1038         (SLLa) this.
1039         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1040         for mips32 and mips64.
1041         (DCLO, DCLZ): New instructions for mips64.
1042
1043 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1044
1045         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1046         immediate or code as a hex value with the "%#lx" format.
1047         (ANDI): Likewise, and fix printed instruction name.
1048
1049 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1050
1051         * sim-main.h (UndefinedResult, Unpredictable): New macros
1052         which currently do nothing.
1053
1054 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1055
1056         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1057         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1058         (status_CU3): New definitions.
1059
1060         * sim-main.h (ExceptionCause): Add new values for MIPS32
1061         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1062         for DebugBreakPoint and NMIReset to note their status in
1063         MIPS32 and MIPS64.
1064         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1065         (SignalExceptionCacheErr): New exception macros.
1066
1067 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1068
1069         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1070         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1071         is always enabled.
1072         (SignalExceptionCoProcessorUnusable): Take as argument the
1073         unusable coprocessor number.
1074
1075 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1076
1077         * mips.igen: Fix formatting of all SignalException calls.
1078
1079 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1080
1081         * sim-main.h (SIGNEXTEND): Remove.
1082
1083 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1084
1085         * mips.igen: Remove gencode comment from top of file, fix
1086         spelling in another comment.
1087
1088 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1089
1090         * mips.igen (check_fmt, check_fmt_p): New functions to check
1091         whether specific floating point formats are usable.
1092         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1093         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1094         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1095         Use the new functions.
1096         (do_c_cond_fmt): Remove format checks...
1097         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1098
1099 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1100
1101         * mips.igen: Fix formatting of check_fpu calls.
1102
1103 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1104
1105         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1106
1107 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1108
1109         * mips.igen: Remove whitespace at end of lines.
1110
1111 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1112
1113         * mips.igen (loadstore_ea): New function to do effective
1114         address calculations.
1115         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1116         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1117         CACHE): Use loadstore_ea to do effective address computations.
1118
1119 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1120
1121         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1122         * mips.igen (LL, CxC1, MxC1): Likewise.
1123
1124 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1125
1126         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1127         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1128         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1129         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1130         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1131         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1132         Don't split opcode fields by hand, use the opcode field values
1133         provided by igen.
1134
1135 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1136
1137         * mips.igen (do_divu): Fix spacing.
1138
1139         * mips.igen (do_dsllv): Move to be right before DSLLV,
1140         to match the rest of the do_<shift> functions.
1141
1142 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1143
1144         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1145         DSRL32, do_dsrlv): Trace inputs and results.
1146
1147 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1148
1149         * mips.igen (CACHE): Provide instruction-printing string.
1150
1151         * interp.c (signal_exception): Comment tokens after #endif.
1152
1153 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1154
1155         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1156         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1157         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1158         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1159         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1160         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1161         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1162         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1163
1164 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1165
1166         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1167         instruction-printing string.
1168         (LWU): Use '64' as the filter flag.
1169
1170 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1171
1172         * mips.igen (SDXC1): Fix instruction-printing string.
1173
1174 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1175
1176         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1177         filter flags "32,f".
1178
1179 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1180
1181         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1182         as the filter flag.
1183
1184 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1185
1186         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1187         add a comma) so that it more closely match the MIPS ISA
1188         documentation opcode partitioning.
1189         (PREF): Put useful names on opcode fields, and include
1190         instruction-printing string.
1191
1192 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1193
1194         * mips.igen (check_u64): New function which in the future will
1195         check whether 64-bit instructions are usable and signal an
1196         exception if not.  Currently a no-op.
1197         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1198         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1199         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1200         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1201
1202         * mips.igen (check_fpu): New function which in the future will
1203         check whether FPU instructions are usable and signal an exception
1204         if not.  Currently a no-op.
1205         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1206         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1207         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1208         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1209         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1210         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1211         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1212         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1213
1214 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1215
1216         * mips.igen (do_load_left, do_load_right): Move to be immediately
1217         following do_load.
1218         (do_store_left, do_store_right): Move to be immediately following
1219         do_store.
1220
1221 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1222
1223         * mips.igen (mipsV): New model name.  Also, add it to
1224         all instructions and functions where it is appropriate.
1225
1226 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1227
1228         * mips.igen: For all functions and instructions, list model
1229         names that support that instruction one per line.
1230
1231 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1232
1233         * mips.igen: Add some additional comments about supported
1234         models, and about which instructions go where.
1235         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1236         order as is used in the rest of the file.
1237
1238 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1239
1240         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1241         indicating that ALU32_END or ALU64_END are there to check
1242         for overflow.
1243         (DADD): Likewise, but also remove previous comment about
1244         overflow checking.
1245
1246 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1247
1248         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1249         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1250         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1251         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1252         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1253         fields (i.e., add and move commas) so that they more closely
1254         match the MIPS ISA documentation opcode partitioning.
1255
1256 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1257
1258         * mips.igen (ADDI): Print immediate value.
1259         (BREAK): Print code.
1260         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1261         (SLL): Print "nop" specially, and don't run the code
1262         that does the shift for the "nop" case.
1263
1264 2001-11-17  Fred Fish  <fnf@redhat.com>
1265
1266         * sim-main.h (float_operation): Move enum declaration outside
1267         of _sim_cpu struct declaration.
1268
1269 2001-04-12  Jim Blandy  <jimb@redhat.com>
1270
1271         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1272         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1273         set of the FCSR.
1274         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1275         PENDING_FILL, and you can get the intended effect gracefully by
1276         calling PENDING_SCHED directly.
1277
1278 2001-02-23  Ben Elliston  <bje@redhat.com>
1279
1280         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1281         already defined elsewhere.
1282
1283 2001-02-19  Ben Elliston  <bje@redhat.com>
1284
1285         * sim-main.h (sim_monitor): Return an int.
1286         * interp.c (sim_monitor): Add return values.
1287         (signal_exception): Handle error conditions from sim_monitor.
1288
1289 2001-02-08  Ben Elliston  <bje@redhat.com>
1290
1291         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1292         (store_memory): Likewise, pass cia to sim_core_write*.
1293
1294 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1295
1296         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1297         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1298
1299 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1300
1301         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1302         * Makefile.in: Don't delete *.igen when cleaning directory.
1303
1304 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1305
1306         * m16.igen (break): Call SignalException not sim_engine_halt.
1307
1308 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1309
1310         From Jason Eckhardt:
1311         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1312
1313 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1314
1315         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1316
1317 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1318
1319         * mips.igen (do_dmultx): Fix typo.
1320
1321 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1322
1323         * configure: Regenerated to track ../common/aclocal.m4 changes.
1324
1325 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1326
1327         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1328
1329 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1330
1331         * sim-main.h (GPR_CLEAR): Define macro.
1332
1333 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1334
1335         * interp.c (decode_coproc): Output long using %lx and not %s.
1336
1337 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1338
1339         * interp.c (sim_open): Sort & extend dummy memory regions for
1340         --board=jmr3904 for eCos.
1341
1342 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1343
1344         * configure: Regenerated.
1345
1346 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1347
1348         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1349         calls, conditional on the simulator being in verbose mode.
1350
1351 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1352
1353         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1354         cache don't get ReservedInstruction traps.
1355
1356 1999-11-29  Mark Salter  <msalter@cygnus.com>
1357
1358         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1359         to clear status bits in sdisr register. This is how the hardware works.
1360
1361         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1362         being used by cygmon.
1363
1364 1999-11-11  Andrew Haley  <aph@cygnus.com>
1365
1366         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1367         instructions.
1368
1369 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1370
1371         * mips.igen (MULT): Correct previous mis-applied patch.
1372
1373 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1374
1375         * mips.igen (delayslot32): Handle sequence like
1376         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1377         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1378         (MULT): Actually pass the third register...
1379
1380 1999-09-03  Mark Salter  <msalter@cygnus.com>
1381
1382         * interp.c (sim_open): Added more memory aliases for additional
1383         hardware being touched by cygmon on jmr3904 board.
1384
1385 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1386
1387         * configure: Regenerated to track ../common/aclocal.m4 changes.
1388
1389 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1390
1391         * interp.c (sim_store_register): Handle case where client - GDB -
1392         specifies that a 4 byte register is 8 bytes in size.
1393         (sim_fetch_register): Ditto.
1394
1395 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1396
1397         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1398         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1399         (idt_monitor_base): Base address for IDT monitor traps.
1400         (pmon_monitor_base): Ditto for PMON.
1401         (lsipmon_monitor_base): Ditto for LSI PMON.
1402         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1403         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1404         (sim_firmware_command): New function.
1405         (mips_option_handler): Call it for OPTION_FIRMWARE.
1406         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1407         option was given, add no monitor by default.  Add BREAK hooks only if
1408         monitors are also there.
1409
1410 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1411
1412         * interp.c (sim_monitor): Flush output before reading input.
1413
1414 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1415
1416         * tconfig.in (SIM_HANDLES_LMA): Always define.
1417
1418 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1419
1420         From Mark Salter <msalter@cygnus.com>:
1421         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1422         (sim_open): Add setup for BSP board.
1423
1424 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1425
1426         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1427         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1428         them as unimplemented.
1429
1430 1999-05-08  Felix Lee  <flee@cygnus.com>
1431
1432         * configure: Regenerated to track ../common/aclocal.m4 changes.
1433
1434 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1435
1436         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1437
1438 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1439
1440         * configure.in: Any mips64vr5*-*-* target should have
1441         -DTARGET_ENABLE_FR=1.
1442         (default_endian): Any mips64vr*el-*-* target should default to
1443         LITTLE_ENDIAN.
1444         * configure: Re-generate.
1445
1446 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1447
1448         * mips.igen (ldl): Extend from _16_, not 32.
1449
1450 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1451
1452         * interp.c (sim_store_register): Force registers written to by GDB
1453         into an un-interpreted state.
1454
1455 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1456
1457         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1458         CPU, start periodic background I/O polls.
1459         (tx3904sio_poll): New function: periodic I/O poller.
1460
1461 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1462
1463         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1464
1465 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1466
1467         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1468         case statement.
1469
1470 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1471
1472         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1473         (load_word): Call SIM_CORE_SIGNAL hook on error.
1474         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1475         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1476         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1477         * sim-main.h (COP0_BADVADDR): Define.
1478         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1479         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1480         (_sim_cpu): Add exc_* fields to store register value snapshots.
1481         * mips.igen (*): Replace memory-related SignalException* calls
1482         with references to SIM_CORE_SIGNAL hook.
1483
1484         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1485         fix.
1486         * sim-main.c (*): Minor warning cleanups.
1487
1488 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1489
1490         * m16.igen (DADDIU5): Correct type-o.
1491
1492 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1493
1494         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1495         variables.
1496
1497 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1498
1499         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1500         to include path.
1501         (interp.o): Add dependency on itable.h
1502         (oengine.c, gencode): Delete remaining references.
1503         (BUILT_SRC_FROM_GEN): Clean up.
1504
1505 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1506
1507         * vr4run.c: New.
1508         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1509         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1510         tmp-run-hack) : New.
1511         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1512         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1513         Drop the "64" qualifier to get the HACK generator working.
1514         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1515         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1516         qualifier to get the hack generator working.
1517         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1518         (DSLL): Use do_dsll.
1519         (DSLLV): Use do_dsllv.
1520         (DSRA): Use do_dsra.
1521         (DSRL): Use do_dsrl.
1522         (DSRLV): Use do_dsrlv.
1523         (BC1): Move *vr4100 to get the HACK generator working.
1524         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1525         get the HACK generator working.
1526         (MACC) Rename to get the HACK generator working.
1527         (DMACC,MACCS,DMACCS): Add the 64.
1528
1529 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1530
1531         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1532         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1533
1534 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1535
1536     * mips/interp.c (DEBUG): Cleanups.
1537
1538 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1539
1540         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1541         (tx3904sio_tickle): fflush after a stdout character output.
1542
1543 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1544
1545         * interp.c (sim_close): Uninstall modules.
1546
1547 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1548
1549         * sim-main.h, interp.c (sim_monitor): Change to global
1550         function.
1551
1552 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1553
1554         * configure.in (vr4100): Only include vr4100 instructions in
1555         simulator.
1556         * configure: Re-generate.
1557         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1558
1559 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1560
1561         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1562         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1563         true alternative.
1564
1565         * configure.in (sim_default_gen, sim_use_gen): Replace with
1566         sim_gen.
1567         (--enable-sim-igen): Delete config option. Always using IGEN.
1568         * configure: Re-generate.
1569
1570         * Makefile.in (gencode): Kill, kill, kill.
1571         * gencode.c: Ditto.
1572
1573 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1574
1575         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1576         bit mips16 igen simulator.
1577         * configure: Re-generate.
1578
1579         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1580         as part of vr4100 ISA.
1581         * vr.igen: Mark all instructions as 64 bit only.
1582
1583 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1584
1585         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1586         Pacify GCC.
1587
1588 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1589
1590         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1591         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1592         * configure: Re-generate.
1593
1594         * m16.igen (BREAK): Define breakpoint instruction.
1595         (JALX32): Mark instruction as mips16 and not r3900.
1596         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1597
1598         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1599
1600 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1601
1602         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1603         insn as a debug breakpoint.
1604
1605         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1606         pending.slot_size.
1607         (PENDING_SCHED): Clean up trace statement.
1608         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1609         (PENDING_FILL): Delay write by only one cycle.
1610         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1611
1612         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1613         of pending writes.
1614         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1615         32 & 64.
1616         (pending_tick): Move incrementing of index to FOR statement.
1617         (pending_tick): Only update PENDING_OUT after a write has occured.
1618
1619         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1620         build simulator.
1621         * configure: Re-generate.
1622
1623         * interp.c (sim_engine_run OLD): Delete explicit call to
1624         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1625
1626 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1627
1628         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1629         interrupt level number to match changed SignalExceptionInterrupt
1630         macro.
1631
1632 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1633
1634         * interp.c: #include "itable.h" if WITH_IGEN.
1635         (get_insn_name): New function.
1636         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1637         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1638
1639 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1640
1641         * configure: Rebuilt to inhale new common/aclocal.m4.
1642
1643 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1644
1645         * dv-tx3904sio.c: Include sim-assert.h.
1646
1647 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1648
1649         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1650         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1651         Reorganize target-specific sim-hardware checks.
1652         * configure: rebuilt.
1653         * interp.c (sim_open): For tx39 target boards, set
1654         OPERATING_ENVIRONMENT, add tx3904sio devices.
1655         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1656         ROM executables.  Install dv-sockser into sim-modules list.
1657
1658         * dv-tx3904irc.c: Compiler warning clean-up.
1659         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1660         frequent hw-trace messages.
1661
1662 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1663
1664         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1665
1666 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1667
1668         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1669
1670         * vr.igen: New file.
1671         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1672         * mips.igen: Define vr4100 model. Include vr.igen.
1673 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1674
1675         * mips.igen (check_mf_hilo): Correct check.
1676
1677 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1678
1679         * sim-main.h (interrupt_event): Add prototype.
1680
1681         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1682         register_ptr, register_value.
1683         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1684
1685         * sim-main.h (tracefh): Make extern.
1686
1687 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1688
1689         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1690         Reduce unnecessarily high timer event frequency.
1691         * dv-tx3904cpu.c: Ditto for interrupt event.
1692
1693 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1694
1695         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1696         to allay warnings.
1697         (interrupt_event): Made non-static.
1698
1699         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1700         interchange of configuration values for external vs. internal
1701         clock dividers.
1702
1703 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1704
1705         * mips.igen (BREAK): Moved code to here for
1706         simulator-reserved break instructions.
1707         * gencode.c (build_instruction): Ditto.
1708         * interp.c (signal_exception): Code moved from here.  Non-
1709         reserved instructions now use exception vector, rather
1710         than halting sim.
1711         * sim-main.h: Moved magic constants to here.
1712
1713 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1714
1715         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1716         register upon non-zero interrupt event level, clear upon zero
1717         event value.
1718         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1719         by passing zero event value.
1720         (*_io_{read,write}_buffer): Endianness fixes.
1721         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1722         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1723
1724         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1725         serial I/O and timer module at base address 0xFFFF0000.
1726
1727 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1728
1729         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1730         and BigEndianCPU.
1731
1732 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1733
1734         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1735         parts.
1736         * configure: Update.
1737
1738 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1739
1740         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1741         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1742         * configure.in: Include tx3904tmr in hw_device list.
1743         * configure: Rebuilt.
1744         * interp.c (sim_open): Instantiate three timer instances.
1745         Fix address typo of tx3904irc instance.
1746
1747 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1748
1749         * interp.c (signal_exception): SystemCall exception now uses
1750         the exception vector.
1751
1752 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1753
1754         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1755         to allay warnings.
1756
1757 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1758
1759         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1760
1761 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1762
1763         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1764
1765         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1766         sim-main.h. Declare a struct hw_descriptor instead of struct
1767         hw_device_descriptor.
1768
1769 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1770
1771         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1772         right bits and then re-align left hand bytes to correct byte
1773         lanes.  Fix incorrect computation in do_store_left when loading
1774         bytes from second word.
1775
1776 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1777
1778         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1779         * interp.c (sim_open): Only create a device tree when HW is
1780         enabled.
1781
1782         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1783         * interp.c (signal_exception): Ditto.
1784
1785 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1786
1787         * gencode.c: Mark BEGEZALL as LIKELY.
1788
1789 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1790
1791         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1792         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1793
1794 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1795
1796         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1797         modules.  Recognize TX39 target with "mips*tx39" pattern.
1798         * configure: Rebuilt.
1799         * sim-main.h (*): Added many macros defining bits in
1800         TX39 control registers.
1801         (SignalInterrupt): Send actual PC instead of NULL.
1802         (SignalNMIReset): New exception type.
1803         * interp.c (board): New variable for future use to identify
1804         a particular board being simulated.
1805         (mips_option_handler,mips_options): Added "--board" option.
1806         (interrupt_event): Send actual PC.
1807         (sim_open): Make memory layout conditional on board setting.
1808         (signal_exception): Initial implementation of hardware interrupt
1809         handling.  Accept another break instruction variant for simulator
1810         exit.
1811         (decode_coproc): Implement RFE instruction for TX39.
1812         (mips.igen): Decode RFE instruction as such.
1813         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1814         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1815         bbegin to implement memory map.
1816         * dv-tx3904cpu.c: New file.
1817         * dv-tx3904irc.c: New file.
1818
1819 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1820
1821         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1822
1823 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1824
1825         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1826         with calls to check_div_hilo.
1827
1828 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1829
1830         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1831         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1832         Add special r3900 version of do_mult_hilo.
1833         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1834         with calls to check_mult_hilo.
1835         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1836         with calls to check_div_hilo.
1837
1838 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1839
1840         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1841         Document a replacement.
1842
1843 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1844
1845         * interp.c (sim_monitor): Make mon_printf work.
1846
1847 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1848
1849         * sim-main.h (INSN_NAME): New arg `cpu'.
1850
1851 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1852
1853         * configure: Regenerated to track ../common/aclocal.m4 changes.
1854
1855 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1856
1857         * configure: Regenerated to track ../common/aclocal.m4 changes.
1858         * config.in: Ditto.
1859
1860 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1861
1862         * acconfig.h: New file.
1863         * configure.in: Reverted change of Apr 24; use sinclude again.
1864
1865 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1866
1867         * configure: Regenerated to track ../common/aclocal.m4 changes.
1868         * config.in: Ditto.
1869
1870 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1871
1872         * configure.in: Don't call sinclude.
1873
1874 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1875
1876         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1877
1878 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1879
1880         * mips.igen (ERET): Implement.
1881
1882         * interp.c (decode_coproc): Return sign-extended EPC.
1883
1884         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1885
1886         * interp.c (signal_exception): Do not ignore Trap.
1887         (signal_exception): On TRAP, restart at exception address.
1888         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1889         (signal_exception): Update.
1890         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1891         so that TRAP instructions are caught.
1892
1893 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1894
1895         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1896         contains HI/LO access history.
1897         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1898         (HIACCESS, LOACCESS): Delete, replace with
1899         (HIHISTORY, LOHISTORY): New macros.
1900         (CHECKHILO): Delete all, moved to mips.igen
1901
1902         * gencode.c (build_instruction): Do not generate checks for
1903         correct HI/LO register usage.
1904
1905         * interp.c (old_engine_run): Delete checks for correct HI/LO
1906         register usage.
1907
1908         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1909         check_mf_cycles): New functions.
1910         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1911         do_divu, domultx, do_mult, do_multu): Use.
1912
1913         * tx.igen ("madd", "maddu"): Use.
1914
1915 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1916
1917         * mips.igen (DSRAV): Use function do_dsrav.
1918         (SRAV): Use new function do_srav.
1919
1920         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1921         (B): Sign extend 11 bit immediate.
1922         (EXT-B*): Shift 16 bit immediate left by 1.
1923         (ADDIU*): Don't sign extend immediate value.
1924
1925 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1926
1927         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1928
1929         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1930         functions.
1931
1932         * mips.igen (delayslot32, nullify_next_insn): New functions.
1933         (m16.igen): Always include.
1934         (do_*): Add more tracing.
1935
1936         * m16.igen (delayslot16): Add NIA argument, could be called by a
1937         32 bit MIPS16 instruction.
1938
1939         * interp.c (ifetch16): Move function from here.
1940         * sim-main.c (ifetch16): To here.
1941
1942         * sim-main.c (ifetch16, ifetch32): Update to match current
1943         implementations of LH, LW.
1944         (signal_exception): Don't print out incorrect hex value of illegal
1945         instruction.
1946
1947 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1948
1949         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1950         instruction.
1951
1952         * m16.igen: Implement MIPS16 instructions.
1953
1954         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1955         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1956         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1957         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1958         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1959         bodies of corresponding code from 32 bit insn to these.  Also used
1960         by MIPS16 versions of functions.
1961
1962         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1963         (IMEM16): Drop NR argument from macro.
1964
1965 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1966
1967         * Makefile.in (SIM_OBJS): Add sim-main.o.
1968
1969         * sim-main.h (address_translation, load_memory, store_memory,
1970         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1971         as INLINE_SIM_MAIN.
1972         (pr_addr, pr_uword64): Declare.
1973         (sim-main.c): Include when H_REVEALS_MODULE_P.
1974
1975         * interp.c (address_translation, load_memory, store_memory,
1976         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1977         from here.
1978         * sim-main.c: To here. Fix compilation problems.
1979
1980         * configure.in: Enable inlining.
1981         * configure: Re-config.
1982
1983 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1984
1985         * configure: Regenerated to track ../common/aclocal.m4 changes.
1986
1987 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1988
1989         * mips.igen: Include tx.igen.
1990         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1991         * tx.igen: New file, contains MADD and MADDU.
1992
1993         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1994         the hardwired constant `7'.
1995         (store_memory): Ditto.
1996         (LOADDRMASK): Move definition to sim-main.h.
1997
1998         mips.igen (MTC0): Enable for r3900.
1999         (ADDU): Add trace.
2000
2001         mips.igen (do_load_byte): Delete.
2002         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2003         do_store_right): New functions.
2004         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2005
2006         configure.in: Let the tx39 use igen again.
2007         configure: Update.
2008
2009 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2010
2011         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2012         not an address sized quantity.  Return zero for cache sizes.
2013
2014 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2015
2016         * mips.igen (r3900): r3900 does not support 64 bit integer
2017         operations.
2018
2019 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2020
2021         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2022         than igen one.
2023         * configure : Rebuild.
2024
2025 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2026
2027         * configure: Regenerated to track ../common/aclocal.m4 changes.
2028
2029 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2030
2031         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2032
2033 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2034
2035         * configure: Regenerated to track ../common/aclocal.m4 changes.
2036         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2037
2038 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2039
2040         * configure: Regenerated to track ../common/aclocal.m4 changes.
2041
2042 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2043
2044         * interp.c (Max, Min): Comment out functions. Not yet used.
2045
2046 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * configure: Regenerated to track ../common/aclocal.m4 changes.
2049
2050 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2051
2052         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2053         configurable settings for stand-alone simulator.
2054
2055         * configure.in: Added X11 search, just in case.
2056
2057         * configure: Regenerated.
2058
2059 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2060
2061         * interp.c (sim_write, sim_read, load_memory, store_memory):
2062         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2063
2064 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2065
2066         * sim-main.h (GETFCC): Return an unsigned value.
2067
2068 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2069
2070         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2071         (DADD): Result destination is RD not RT.
2072
2073 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2074
2075         * sim-main.h (HIACCESS, LOACCESS): Always define.
2076
2077         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2078
2079         * interp.c (sim_info): Delete.
2080
2081 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2082
2083         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2084         (mips_option_handler): New argument `cpu'.
2085         (sim_open): Update call to sim_add_option_table.
2086
2087 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2088
2089         * mips.igen (CxC1): Add tracing.
2090
2091 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2092
2093         * sim-main.h (Max, Min): Declare.
2094
2095         * interp.c (Max, Min): New functions.
2096
2097         * mips.igen (BC1): Add tracing.
2098
2099 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2100
2101         * interp.c Added memory map for stack in vr4100
2102
2103 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2104
2105         * interp.c (load_memory): Add missing "break"'s.
2106
2107 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2108
2109         * interp.c (sim_store_register, sim_fetch_register): Pass in
2110         length parameter.  Return -1.
2111
2112 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2113
2114         * interp.c: Added hardware init hook, fixed warnings.
2115
2116 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2117
2118         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2119
2120 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2121
2122         * interp.c (ifetch16): New function.
2123
2124         * sim-main.h (IMEM32): Rename IMEM.
2125         (IMEM16_IMMED): Define.
2126         (IMEM16): Define.
2127         (DELAY_SLOT): Update.
2128
2129         * m16run.c (sim_engine_run): New file.
2130
2131         * m16.igen: All instructions except LB.
2132         (LB): Call do_load_byte.
2133         * mips.igen (do_load_byte): New function.
2134         (LB): Call do_load_byte.
2135
2136         * mips.igen: Move spec for insn bit size and high bit from here.
2137         * Makefile.in (tmp-igen, tmp-m16): To here.
2138
2139         * m16.dc: New file, decode mips16 instructions.
2140
2141         * Makefile.in (SIM_NO_ALL): Define.
2142         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2143
2144 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2145
2146         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2147         point unit to 32 bit registers.
2148         * configure: Re-generate.
2149
2150 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2151
2152         * configure.in (sim_use_gen): Make IGEN the default simulator
2153         generator for generic 32 and 64 bit mips targets.
2154         * configure: Re-generate.
2155
2156 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2157
2158         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2159         bitsize.
2160
2161         * interp.c (sim_fetch_register, sim_store_register): Read/write
2162         FGR from correct location.
2163         (sim_open): Set size of FGR's according to
2164         WITH_TARGET_FLOATING_POINT_BITSIZE.
2165
2166         * sim-main.h (FGR): Store floating point registers in a separate
2167         array.
2168
2169 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2170
2171         * configure: Regenerated to track ../common/aclocal.m4 changes.
2172
2173 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2174
2175         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2176
2177         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2178
2179         * interp.c (pending_tick): New function.  Deliver pending writes.
2180
2181         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2182         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2183         it can handle mixed sized quantites and single bits.
2184
2185 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2186
2187         * interp.c (oengine.h): Do not include when building with IGEN.
2188         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2189         (sim_info): Ditto for PROCESSOR_64BIT.
2190         (sim_monitor): Replace ut_reg with unsigned_word.
2191         (*): Ditto for t_reg.
2192         (LOADDRMASK): Define.
2193         (sim_open): Remove defunct check that host FP is IEEE compliant,
2194         using software to emulate floating point.
2195         (value_fpr, ...): Always compile, was conditional on HASFPU.
2196
2197 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2198
2199         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2200         size.
2201
2202         * interp.c (SD, CPU): Define.
2203         (mips_option_handler): Set flags in each CPU.
2204         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2205         (sim_close): Do not clear STATE, deleted anyway.
2206         (sim_write, sim_read): Assume CPU zero's vm should be used for
2207         data transfers.
2208         (sim_create_inferior): Set the PC for all processors.
2209         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2210         argument.
2211         (mips16_entry): Pass correct nr of args to store_word, load_word.
2212         (ColdReset): Cold reset all cpu's.
2213         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2214         (sim_monitor, load_memory, store_memory, signal_exception): Use
2215         `CPU' instead of STATE_CPU.
2216
2217
2218         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2219         SD or CPU_.
2220
2221         * sim-main.h (signal_exception): Add sim_cpu arg.
2222         (SignalException*): Pass both SD and CPU to signal_exception.
2223         * interp.c (signal_exception): Update.
2224
2225         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2226         Ditto
2227         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2228         address_translation): Ditto
2229         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2230
2231 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2232
2233         * configure: Regenerated to track ../common/aclocal.m4 changes.
2234
2235 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2236
2237         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2238
2239         * mips.igen (model): Map processor names onto BFD name.
2240
2241         * sim-main.h (CPU_CIA): Delete.
2242         (SET_CIA, GET_CIA): Define
2243
2244 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2245
2246         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2247         regiser.
2248
2249         * configure.in (default_endian): Configure a big-endian simulator
2250         by default.
2251         * configure: Re-generate.
2252
2253 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2254
2255         * configure: Regenerated to track ../common/aclocal.m4 changes.
2256
2257 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2258
2259         * interp.c (sim_monitor): Handle Densan monitor outbyte
2260         and inbyte functions.
2261
2262 1997-12-29  Felix Lee  <flee@cygnus.com>
2263
2264         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2265
2266 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2267
2268         * Makefile.in (tmp-igen): Arrange for $zero to always be
2269         reset to zero after every instruction.
2270
2271 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2272
2273         * configure: Regenerated to track ../common/aclocal.m4 changes.
2274         * config.in: Ditto.
2275
2276 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2277
2278         * mips.igen (MSUB): Fix to work like MADD.
2279         * gencode.c (MSUB): Similarly.
2280
2281 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2282
2283         * configure: Regenerated to track ../common/aclocal.m4 changes.
2284
2285 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2286
2287         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2288
2289 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2290
2291         * sim-main.h (sim-fpu.h): Include.
2292
2293         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2294         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2295         using host independant sim_fpu module.
2296
2297 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2298
2299         * interp.c (signal_exception): Report internal errors with SIGABRT
2300         not SIGQUIT.
2301
2302         * sim-main.h (C0_CONFIG): New register.
2303         (signal.h): No longer include.
2304
2305         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2306
2307 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2308
2309         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2310
2311 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2312
2313         * mips.igen: Tag vr5000 instructions.
2314         (ANDI): Was missing mipsIV model, fix assembler syntax.
2315         (do_c_cond_fmt): New function.
2316         (C.cond.fmt): Handle mips I-III which do not support CC field
2317         separatly.
2318         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2319         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2320         in IV3.2 spec.
2321         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2322         vr5000 which saves LO in a GPR separatly.
2323
2324         * configure.in (enable-sim-igen): For vr5000, select vr5000
2325         specific instructions.
2326         * configure: Re-generate.
2327
2328 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2329
2330         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2331
2332         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2333         fmt_uninterpreted_64 bit cases to switch.  Convert to
2334         fmt_formatted,
2335
2336         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2337
2338         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2339         as specified in IV3.2 spec.
2340         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2341
2342 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2343
2344         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2345         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2346         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2347         PENDING_FILL versions of instructions.  Simplify.
2348         (X): New function.
2349         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2350         instructions.
2351         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2352         a signed value.
2353         (MTHI, MFHI): Disable code checking HI-LO.
2354
2355         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2356         global.
2357         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2358
2359 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2360
2361         * gencode.c (build_mips16_operands): Replace IPC with cia.
2362
2363         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2364         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2365         IPC to `cia'.
2366         (UndefinedResult): Replace function with macro/function
2367         combination.
2368         (sim_engine_run): Don't save PC in IPC.
2369
2370         * sim-main.h (IPC): Delete.
2371
2372
2373         * interp.c (signal_exception, store_word, load_word,
2374         address_translation, load_memory, store_memory, cache_op,
2375         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2376         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2377         current instruction address - cia - argument.
2378         (sim_read, sim_write): Call address_translation directly.
2379         (sim_engine_run): Rename variable vaddr to cia.
2380         (signal_exception): Pass cia to sim_monitor
2381
2382         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2383         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2384         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2385
2386         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2387         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2388         SIM_ASSERT.
2389
2390         * interp.c (signal_exception): Pass restart address to
2391         sim_engine_restart.
2392
2393         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2394         idecode.o): Add dependency.
2395
2396         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2397         Delete definitions
2398         (DELAY_SLOT): Update NIA not PC with branch address.
2399         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2400
2401         * mips.igen: Use CIA not PC in branch calculations.
2402         (illegal): Call SignalException.
2403         (BEQ, ADDIU): Fix assembler.
2404
2405 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2406
2407         * m16.igen (JALX): Was missing.
2408
2409         * configure.in (enable-sim-igen): New configuration option.
2410         * configure: Re-generate.
2411
2412         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2413
2414         * interp.c (load_memory, store_memory): Delete parameter RAW.
2415         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2416         bypassing {load,store}_memory.
2417
2418         * sim-main.h (ByteSwapMem): Delete definition.
2419
2420         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2421
2422         * interp.c (sim_do_command, sim_commands): Delete mips specific
2423         commands.  Handled by module sim-options.
2424
2425         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2426         (WITH_MODULO_MEMORY): Define.
2427
2428         * interp.c (sim_info): Delete code printing memory size.
2429
2430         * interp.c (mips_size): Nee sim_size, delete function.
2431         (power2): Delete.
2432         (monitor, monitor_base, monitor_size): Delete global variables.
2433         (sim_open, sim_close): Delete code creating monitor and other
2434         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2435         manage memory regions.
2436         (load_memory, store_memory): Use sim-core for memory model.
2437
2438         * interp.c (address_translation): Delete all memory map code
2439         except line forcing 32 bit addresses.
2440
2441 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2442
2443         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2444         trace options.
2445
2446         * interp.c (logfh, logfile): Delete globals.
2447         (sim_open, sim_close): Delete code opening & closing log file.
2448         (mips_option_handler): Delete -l and -n options.
2449         (OPTION mips_options): Ditto.
2450
2451         * interp.c (OPTION mips_options): Rename option trace to dinero.
2452         (mips_option_handler): Update.
2453
2454 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2455
2456         * interp.c (fetch_str): New function.
2457         (sim_monitor): Rewrite using sim_read & sim_write.
2458         (sim_open): Check magic number.
2459         (sim_open): Write monitor vectors into memory using sim_write.
2460         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2461         (sim_read, sim_write): Simplify - transfer data one byte at a
2462         time.
2463         (load_memory, store_memory): Clarify meaning of parameter RAW.
2464
2465         * sim-main.h (isHOST): Defete definition.
2466         (isTARGET): Mark as depreciated.
2467         (address_translation): Delete parameter HOST.
2468
2469         * interp.c (address_translation): Delete parameter HOST.
2470
2471 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2472
2473         * mips.igen:
2474
2475         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2476         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2477
2478 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2479
2480         * mips.igen: Add model filter field to records.
2481
2482 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2483
2484         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2485
2486         interp.c (sim_engine_run): Do not compile function sim_engine_run
2487         when WITH_IGEN == 1.
2488
2489         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2490         target architecture.
2491
2492         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2493         igen. Replace with configuration variables sim_igen_flags /
2494         sim_m16_flags.
2495
2496         * m16.igen: New file.  Copy mips16 insns here.
2497         * mips.igen: From here.
2498
2499 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2500
2501         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2502         to top.
2503         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2504
2505 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2506
2507         * gencode.c (build_instruction): Follow sim_write's lead in using
2508         BigEndianMem instead of !ByteSwapMem.
2509
2510 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2511
2512         * configure.in (sim_gen): Dependent on target, select type of
2513         generator.  Always select old style generator.
2514
2515         configure: Re-generate.
2516
2517         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2518         targets.
2519         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2520         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2521         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2522         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2523         SIM_@sim_gen@_*, set by autoconf.
2524
2525 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2526
2527         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2528
2529         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2530         CURRENT_FLOATING_POINT instead.
2531
2532         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2533         (address_translation): Raise exception InstructionFetch when
2534         translation fails and isINSTRUCTION.
2535
2536         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2537         sim_engine_run): Change type of of vaddr and paddr to
2538         address_word.
2539         (address_translation, prefetch, load_memory, store_memory,
2540         cache_op): Change type of vAddr and pAddr to address_word.
2541
2542         * gencode.c (build_instruction): Change type of vaddr and paddr to
2543         address_word.
2544
2545 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2546
2547         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2548         macro to obtain result of ALU op.
2549
2550 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2551
2552         * interp.c (sim_info): Call profile_print.
2553
2554 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2555
2556         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2557
2558         * sim-main.h (WITH_PROFILE): Do not define, defined in
2559         common/sim-config.h.  Use sim-profile module.
2560         (simPROFILE): Delete defintion.
2561
2562         * interp.c (PROFILE): Delete definition.
2563         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2564         (sim_close): Delete code writing profile histogram.
2565         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2566         Delete.
2567         (sim_engine_run): Delete code profiling the PC.
2568
2569 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2570
2571         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2572
2573         * interp.c (sim_monitor): Make register pointers of type
2574         unsigned_word*.
2575
2576         * sim-main.h: Make registers of type unsigned_word not
2577         signed_word.
2578
2579 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2580
2581         * interp.c (sync_operation): Rename from SyncOperation, make
2582         global, add SD argument.
2583         (prefetch): Rename from Prefetch, make global, add SD argument.
2584         (decode_coproc): Make global.
2585
2586         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2587
2588         * gencode.c (build_instruction): Generate DecodeCoproc not
2589         decode_coproc calls.
2590
2591         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2592         (SizeFGR): Move to sim-main.h
2593         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2594         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2595         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2596         sim-main.h.
2597         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2598         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2599         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2600         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2601         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2602         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2603
2604         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2605         exception.
2606         (sim-alu.h): Include.
2607         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2608         (sim_cia): Typedef to instruction_address.
2609
2610 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2611
2612         * Makefile.in (interp.o): Rename generated file engine.c to
2613         oengine.c.
2614
2615         * interp.c: Update.
2616
2617 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2618
2619         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2620
2621 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2622
2623         * gencode.c (build_instruction): For "FPSQRT", output correct
2624         number of arguments to Recip.
2625
2626 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2627
2628         * Makefile.in (interp.o): Depends on sim-main.h
2629
2630         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2631
2632         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2633         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2634         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2635         STATE, DSSTATE): Define
2636         (GPR, FGRIDX, ..): Define.
2637
2638         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2639         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2640         (GPR, FGRIDX, ...): Delete macros.
2641
2642         * interp.c: Update names to match defines from sim-main.h
2643
2644 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2645
2646         * interp.c (sim_monitor): Add SD argument.
2647         (sim_warning): Delete.  Replace calls with calls to
2648         sim_io_eprintf.
2649         (sim_error): Delete. Replace calls with sim_io_error.
2650         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2651         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2652         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2653         argument.
2654         (mips_size): Rename from sim_size. Add SD argument.
2655
2656         * interp.c (simulator): Delete global variable.
2657         (callback): Delete global variable.
2658         (mips_option_handler, sim_open, sim_write, sim_read,
2659         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2660         sim_size,sim_monitor): Use sim_io_* not callback->*.
2661         (sim_open): ZALLOC simulator struct.
2662         (PROFILE): Do not define.
2663
2664 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2665
2666         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2667         support.h with corresponding code.
2668
2669         * sim-main.h (word64, uword64), support.h: Move definition to
2670         sim-main.h.
2671         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2672
2673         * support.h: Delete
2674         * Makefile.in: Update dependencies
2675         * interp.c: Do not include.
2676
2677 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2678
2679         * interp.c (address_translation, load_memory, store_memory,
2680         cache_op): Rename to from AddressTranslation et.al., make global,
2681         add SD argument
2682
2683         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2684         CacheOp): Define.
2685
2686         * interp.c (SignalException): Rename to signal_exception, make
2687         global.
2688
2689         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2690
2691         * sim-main.h (SignalException, SignalExceptionInterrupt,
2692         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2693         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2694         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2695         Define.
2696
2697         * interp.c, support.h: Use.
2698
2699 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2700
2701         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2702         to value_fpr / store_fpr. Add SD argument.
2703         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2704         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2705
2706         * sim-main.h (ValueFPR, StoreFPR): Define.
2707
2708 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2709
2710         * interp.c (sim_engine_run): Check consistency between configure
2711         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2712         and HASFPU.
2713
2714         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2715         (mips_fpu): Configure WITH_FLOATING_POINT.
2716         (mips_endian): Configure WITH_TARGET_ENDIAN.
2717         * configure: Update.
2718
2719 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2720
2721         * configure: Regenerated to track ../common/aclocal.m4 changes.
2722
2723 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2724
2725         * configure: Regenerated.
2726
2727 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2728
2729         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2730
2731 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2732
2733         * gencode.c (print_igen_insn_models): Assume certain architectures
2734         include all mips* instructions.
2735         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2736         instruction.
2737
2738         * Makefile.in (tmp.igen): Add target. Generate igen input from
2739         gencode file.
2740
2741         * gencode.c (FEATURE_IGEN): Define.
2742         (main): Add --igen option.  Generate output in igen format.
2743         (process_instructions): Format output according to igen option.
2744         (print_igen_insn_format): New function.
2745         (print_igen_insn_models): New function.
2746         (process_instructions): Only issue warnings and ignore
2747         instructions when no FEATURE_IGEN.
2748
2749 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2750
2751         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2752         MIPS targets.
2753
2754 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2755
2756         * configure: Regenerated to track ../common/aclocal.m4 changes.
2757
2758 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2759
2760         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2761         SIM_RESERVED_BITS): Delete, moved to common.
2762         (SIM_EXTRA_CFLAGS): Update.
2763
2764 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2765
2766         * configure.in: Configure non-strict memory alignment.
2767         * configure: Regenerated to track ../common/aclocal.m4 changes.
2768
2769 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2770
2771         * configure: Regenerated to track ../common/aclocal.m4 changes.
2772
2773 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2774
2775         * gencode.c (SDBBP,DERET): Added (3900) insns.
2776         (RFE): Turn on for 3900.
2777         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2778         (dsstate): Made global.
2779         (SUBTARGET_R3900): Added.
2780         (CANCELDELAYSLOT): New.
2781         (SignalException): Ignore SystemCall rather than ignore and
2782         terminate.  Add DebugBreakPoint handling.
2783         (decode_coproc): New insns RFE, DERET; and new registers Debug
2784         and DEPC protected by SUBTARGET_R3900.
2785         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2786         bits explicitly.
2787         * Makefile.in,configure.in: Add mips subtarget option.
2788         * configure: Update.
2789
2790 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2791
2792         * gencode.c: Add r3900 (tx39).
2793
2794
2795 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2796
2797         * gencode.c (build_instruction): Don't need to subtract 4 for
2798         JALR, just 2.
2799
2800 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2801
2802         * interp.c: Correct some HASFPU problems.
2803
2804 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2805
2806         * configure: Regenerated to track ../common/aclocal.m4 changes.
2807
2808 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2809
2810         * interp.c (mips_options): Fix samples option short form, should
2811         be `x'.
2812
2813 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2814
2815         * interp.c (sim_info): Enable info code.  Was just returning.
2816
2817 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2818
2819         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2820         MFC0.
2821
2822 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2823
2824         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2825         constants.
2826         (build_instruction): Ditto for LL.
2827
2828 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2829
2830         * configure: Regenerated to track ../common/aclocal.m4 changes.
2831
2832 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2833
2834         * configure: Regenerated to track ../common/aclocal.m4 changes.
2835         * config.in: Ditto.
2836
2837 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2838
2839         * interp.c (sim_open): Add call to sim_analyze_program, update
2840         call to sim_config.
2841
2842 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2843
2844         * interp.c (sim_kill): Delete.
2845         (sim_create_inferior): Add ABFD argument. Set PC from same.
2846         (sim_load): Move code initializing trap handlers from here.
2847         (sim_open): To here.
2848         (sim_load): Delete, use sim-hload.c.
2849
2850         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2851
2852 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2853
2854         * configure: Regenerated to track ../common/aclocal.m4 changes.
2855         * config.in: Ditto.
2856
2857 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2858
2859         * interp.c (sim_open): Add ABFD argument.
2860         (sim_load): Move call to sim_config from here.
2861         (sim_open): To here.  Check return status.
2862
2863 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2864
2865         * gencode.c (build_instruction): Two arg MADD should
2866         not assign result to $0.
2867
2868 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2869
2870         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2871         * sim/mips/configure.in: Regenerate.
2872
2873 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2874
2875         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2876         signed8, unsigned8 et.al. types.
2877
2878         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2879         hosts when selecting subreg.
2880
2881 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2882
2883         * interp.c (sim_engine_run): Reset the ZERO register to zero
2884         regardless of FEATURE_WARN_ZERO.
2885         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2886
2887 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2888
2889         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2890         (SignalException): For BreakPoints ignore any mode bits and just
2891         save the PC.
2892         (SignalException): Always set the CAUSE register.
2893
2894 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2895
2896         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2897         exception has been taken.
2898
2899         * interp.c: Implement the ERET and mt/f sr instructions.
2900
2901 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2902
2903         * interp.c (SignalException): Don't bother restarting an
2904         interrupt.
2905
2906 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2907
2908         * interp.c (SignalException): Really take an interrupt.
2909         (interrupt_event): Only deliver interrupts when enabled.
2910
2911 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2912
2913         * interp.c (sim_info): Only print info when verbose.
2914         (sim_info) Use sim_io_printf for output.
2915
2916 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2917
2918         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2919         mips architectures.
2920
2921 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2922
2923         * interp.c (sim_do_command): Check for common commands if a
2924         simulator specific command fails.
2925
2926 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2927
2928         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2929         and simBE when DEBUG is defined.
2930
2931 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2932
2933         * interp.c (interrupt_event): New function.  Pass exception event
2934         onto exception handler.
2935
2936         * configure.in: Check for stdlib.h.
2937         * configure: Regenerate.
2938
2939         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2940         variable declaration.
2941         (build_instruction): Initialize memval1.
2942         (build_instruction): Add UNUSED attribute to byte, bigend,
2943         reverse.
2944         (build_operands): Ditto.
2945
2946         * interp.c: Fix GCC warnings.
2947         (sim_get_quit_code): Delete.
2948
2949         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2950         * Makefile.in: Ditto.
2951         * configure: Re-generate.
2952
2953         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2954
2955 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2956
2957         * interp.c (mips_option_handler): New function parse argumes using
2958         sim-options.
2959         (myname): Replace with STATE_MY_NAME.
2960         (sim_open): Delete check for host endianness - performed by
2961         sim_config.
2962         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2963         (sim_open): Move much of the initialization from here.
2964         (sim_load): To here.  After the image has been loaded and
2965         endianness set.
2966         (sim_open): Move ColdReset from here.
2967         (sim_create_inferior): To here.
2968         (sim_open): Make FP check less dependant on host endianness.
2969
2970         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2971         run.
2972         * interp.c (sim_set_callbacks): Delete.
2973
2974         * interp.c (membank, membank_base, membank_size): Replace with
2975         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2976         (sim_open): Remove call to callback->init. gdb/run do this.
2977
2978         * interp.c: Update
2979
2980         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2981
2982         * interp.c (big_endian_p): Delete, replaced by
2983         current_target_byte_order.
2984
2985 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2986
2987         * interp.c (host_read_long, host_read_word, host_swap_word,
2988         host_swap_long): Delete. Using common sim-endian.
2989         (sim_fetch_register, sim_store_register): Use H2T.
2990         (pipeline_ticks): Delete.  Handled by sim-events.
2991         (sim_info): Update.
2992         (sim_engine_run): Update.
2993
2994 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2995
2996         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2997         reason from here.
2998         (SignalException): To here. Signal using sim_engine_halt.
2999         (sim_stop_reason): Delete, moved to common.
3000
3001 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3002
3003         * interp.c (sim_open): Add callback argument.
3004         (sim_set_callbacks): Delete SIM_DESC argument.
3005         (sim_size): Ditto.
3006
3007 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3008
3009         * Makefile.in (SIM_OBJS): Add common modules.
3010
3011         * interp.c (sim_set_callbacks): Also set SD callback.
3012         (set_endianness, xfer_*, swap_*): Delete.
3013         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3014         Change to functions using sim-endian macros.
3015         (control_c, sim_stop): Delete, use common version.
3016         (simulate): Convert into.
3017         (sim_engine_run): This function.
3018         (sim_resume): Delete.
3019
3020         * interp.c (simulation): New variable - the simulator object.
3021         (sim_kind): Delete global - merged into simulation.
3022         (sim_load): Cleanup.  Move PC assignment from here.
3023         (sim_create_inferior): To here.
3024
3025         * sim-main.h: New file.
3026         * interp.c (sim-main.h): Include.
3027
3028 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3029
3030         * configure: Regenerated to track ../common/aclocal.m4 changes.
3031
3032 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3033
3034         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3035
3036 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3037
3038         * gencode.c (build_instruction): DIV instructions: check
3039         for division by zero and integer overflow before using
3040         host's division operation.
3041
3042 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3043
3044         * Makefile.in (SIM_OBJS): Add sim-load.o.
3045         * interp.c: #include bfd.h.
3046         (target_byte_order): Delete.
3047         (sim_kind, myname, big_endian_p): New static locals.
3048         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3049         after argument parsing.  Recognize -E arg, set endianness accordingly.
3050         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3051         load file into simulator.  Set PC from bfd.
3052         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3053         (set_endianness): Use big_endian_p instead of target_byte_order.
3054
3055 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3056
3057         * interp.c (sim_size): Delete prototype - conflicts with
3058         definition in remote-sim.h.  Correct definition.
3059
3060 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3061
3062         * configure: Regenerated to track ../common/aclocal.m4 changes.
3063         * config.in: Ditto.
3064
3065 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3066
3067         * interp.c (sim_open): New arg `kind'.
3068
3069         * configure: Regenerated to track ../common/aclocal.m4 changes.
3070
3071 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3072
3073         * configure: Regenerated to track ../common/aclocal.m4 changes.
3074
3075 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3076
3077         * interp.c (sim_open): Set optind to 0 before calling getopt.
3078
3079 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3080
3081         * configure: Regenerated to track ../common/aclocal.m4 changes.
3082
3083 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3084
3085         * interp.c : Replace uses of pr_addr with pr_uword64
3086         where the bit length is always 64 independent of SIM_ADDR.
3087         (pr_uword64) : added.
3088
3089 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3090
3091         * configure: Re-generate.
3092
3093 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3094
3095         * configure: Regenerate to track ../common/aclocal.m4 changes.
3096
3097 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3098
3099         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3100         in argv form.
3101         (other sim_*): New SIM_DESC argument.
3102
3103 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3104
3105         * interp.c: Fix printing of addresses for non-64-bit targets.
3106         (pr_addr): Add function to print address based on size.
3107
3108 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3109
3110         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3111
3112 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3113
3114         * gencode.c (build_mips16_operands): Correct computation of base
3115         address for extended PC relative instruction.
3116
3117 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3118
3119         * interp.c (mips16_entry): Add support for floating point cases.
3120         (SignalException): Pass floating point cases to mips16_entry.
3121         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3122         registers.
3123         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3124         or fmt_word.
3125         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3126         and then set the state to fmt_uninterpreted.
3127         (COP_SW): Temporarily set the state to fmt_word while calling
3128         ValueFPR.
3129
3130 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3131
3132         * gencode.c (build_instruction): The high order may be set in the
3133         comparison flags at any ISA level, not just ISA 4.
3134
3135 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3136
3137         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3138         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3139         * configure.in: sinclude ../common/aclocal.m4.
3140         * configure: Regenerated.
3141
3142 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3143
3144         * configure: Rebuild after change to aclocal.m4.
3145
3146 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3147
3148         * configure configure.in Makefile.in:  Update to new configure
3149         scheme which is more compatible with WinGDB builds.
3150         * configure.in:  Improve comment on how to run autoconf.
3151         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3152         * Makefile.in:  Use autoconf substitution to install common
3153         makefile fragment.
3154
3155 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3156
3157         * gencode.c (build_instruction): Use BigEndianCPU instead of
3158         ByteSwapMem.
3159
3160 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3161
3162         * interp.c (sim_monitor): Make output to stdout visible in
3163         wingdb's I/O log window.
3164
3165 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3166
3167         * support.h: Undo previous change to SIGTRAP
3168         and SIGQUIT values.
3169
3170 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3171
3172         * interp.c (store_word, load_word): New static functions.
3173         (mips16_entry): New static function.
3174         (SignalException): Look for mips16 entry and exit instructions.
3175         (simulate): Use the correct index when setting fpr_state after
3176         doing a pending move.
3177
3178 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3179
3180         * interp.c: Fix byte-swapping code throughout to work on
3181         both little- and big-endian hosts.
3182
3183 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3184
3185         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3186         with gdb/config/i386/xm-windows.h.
3187
3188 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3189
3190         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3191         that messes up arithmetic shifts.
3192
3193 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3194
3195         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3196         SIGTRAP and SIGQUIT for _WIN32.
3197
3198 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3199
3200         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3201         force a 64 bit multiplication.
3202         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3203         destination register is 0, since that is the default mips16 nop
3204         instruction.
3205
3206 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3207
3208         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3209         (build_endian_shift): Don't check proc64.
3210         (build_instruction): Always set memval to uword64.  Cast op2 to
3211         uword64 when shifting it left in memory instructions.  Always use
3212         the same code for stores--don't special case proc64.
3213
3214         * gencode.c (build_mips16_operands): Fix base PC value for PC
3215         relative operands.
3216         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3217         jal instruction.
3218         * interp.c (simJALDELAYSLOT): Define.
3219         (JALDELAYSLOT): Define.
3220         (INDELAYSLOT, INJALDELAYSLOT): Define.
3221         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3222
3223 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3224
3225         * interp.c (sim_open): add flush_cache as a PMON routine
3226         (sim_monitor): handle flush_cache by ignoring it
3227
3228 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3229
3230         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3231         BigEndianMem.
3232         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3233         (BigEndianMem): Rename to ByteSwapMem and change sense.
3234         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3235         BigEndianMem references to !ByteSwapMem.
3236         (set_endianness): New function, with prototype.
3237         (sim_open): Call set_endianness.
3238         (sim_info): Use simBE instead of BigEndianMem.
3239         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3240         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3241         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3242         ifdefs, keeping the prototype declaration.
3243         (swap_word): Rewrite correctly.
3244         (ColdReset): Delete references to CONFIG.  Delete endianness related
3245         code; moved to set_endianness.
3246
3247 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3248
3249         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3250         * interp.c (CHECKHILO): Define away.
3251         (simSIGINT): New macro.
3252         (membank_size): Increase from 1MB to 2MB.
3253         (control_c): New function.
3254         (sim_resume): Rename parameter signal to signal_number.  Add local
3255         variable prev.  Call signal before and after simulate.
3256         (sim_stop_reason): Add simSIGINT support.
3257         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3258         functions always.
3259         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3260         if logfh is NULL.
3261         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3262         a call to sim_warning.
3263
3264 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3265
3266         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3267         16 bit instructions.
3268
3269 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3270
3271         Add support for mips16 (16 bit MIPS implementation):
3272         * gencode.c (inst_type): Add mips16 instruction encoding types.
3273         (GETDATASIZEINSN): Define.
3274         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3275         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3276         mtlo.
3277         (MIPS16_DECODE): New table, for mips16 instructions.
3278         (bitmap_val): New static function.
3279         (struct mips16_op): Define.
3280         (mips16_op_table): New table, for mips16 operands.
3281         (build_mips16_operands): New static function.
3282         (process_instructions): If PC is odd, decode a mips16
3283         instruction.  Break out instruction handling into new
3284         build_instruction function.
3285         (build_instruction): New static function, broken out of
3286         process_instructions.  Check modifiers rather than flags for SHIFT
3287         bit count and m[ft]{hi,lo} direction.
3288         (usage): Pass program name to fprintf.
3289         (main): Remove unused variable this_option_optind.  Change
3290         ``*loptarg++'' to ``loptarg++''.
3291         (my_strtoul): Parenthesize && within ||.
3292         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3293         (simulate): If PC is odd, fetch a 16 bit instruction, and
3294         increment PC by 2 rather than 4.
3295         * configure.in: Add case for mips16*-*-*.
3296         * configure: Rebuild.
3297
3298 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3299
3300         * interp.c: Allow -t to enable tracing in standalone simulator.
3301         Fix garbage output in trace file and error messages.
3302
3303 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3304
3305         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3306         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3307         * configure.in: Simplify using macros in ../common/aclocal.m4.
3308         * configure: Regenerated.
3309         * tconfig.in: New file.
3310
3311 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3312
3313         * interp.c: Fix bugs in 64-bit port.
3314         Use ansi function declarations for msvc compiler.
3315         Initialize and test file pointer in trace code.
3316         Prevent duplicate definition of LAST_EMED_REGNUM.
3317
3318 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3319
3320         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3321
3322 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3323
3324         * interp.c (SignalException): Check for explicit terminating
3325         breakpoint value.
3326         * gencode.c: Pass instruction value through SignalException()
3327         calls for Trap, Breakpoint and Syscall.
3328
3329 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3330
3331         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3332         only used on those hosts that provide it.
3333         * configure.in: Add sqrt() to list of functions to be checked for.
3334         * config.in: Re-generated.
3335         * configure: Re-generated.
3336
3337 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3338
3339         * gencode.c (process_instructions): Call build_endian_shift when
3340         expanding STORE RIGHT, to fix swr.
3341         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3342         clear the high bits.
3343         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3344         Fix float to int conversions to produce signed values.
3345
3346 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3347
3348         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3349         (process_instructions): Correct handling of nor instruction.
3350         Correct shift count for 32 bit shift instructions. Correct sign
3351         extension for arithmetic shifts to not shift the number of bits in
3352         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3353         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3354         Fix madd.
3355         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3356         It's OK to have a mult follow a mult.  What's not OK is to have a
3357         mult follow an mfhi.
3358         (Convert): Comment out incorrect rounding code.
3359
3360 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3361
3362         * interp.c (sim_monitor): Improved monitor printf
3363         simulation. Tidied up simulator warnings, and added "--log" option
3364         for directing warning message output.
3365         * gencode.c: Use sim_warning() rather than WARNING macro.
3366
3367 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3368
3369         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3370         getopt1.o, rather than on gencode.c.  Link objects together.
3371         Don't link against -liberty.
3372         (gencode.o, getopt.o, getopt1.o): New targets.
3373         * gencode.c: Include <ctype.h> and "ansidecl.h".
3374         (AND): Undefine after including "ansidecl.h".
3375         (ULONG_MAX): Define if not defined.
3376         (OP_*): Don't define macros; now defined in opcode/mips.h.
3377         (main): Call my_strtoul rather than strtoul.
3378         (my_strtoul): New static function.
3379
3380 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3381
3382         * gencode.c (process_instructions):  Generate word64 and uword64
3383         instead of `long long' and `unsigned long long' data types.
3384         * interp.c:  #include sysdep.h to get signals, and define default
3385         for SIGBUS.
3386         * (Convert):  Work around for Visual-C++ compiler bug with type
3387         conversion.
3388         * support.h:  Make things compile under Visual-C++ by using
3389         __int64 instead of `long long'.  Change many refs to long long
3390         into word64/uword64 typedefs.
3391
3392 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3393
3394         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3395         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3396         (docdir): Removed.
3397         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3398         (AC_PROG_INSTALL): Added.
3399         (AC_PROG_CC): Moved to before configure.host call.
3400         * configure: Rebuilt.
3401
3402 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3403
3404         * configure.in: Define @SIMCONF@ depending on mips target.
3405         * configure: Rebuild.
3406         * Makefile.in (run): Add @SIMCONF@ to control simulator
3407         construction.
3408         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3409         * interp.c: Remove some debugging, provide more detailed error
3410         messages, update memory accesses to use LOADDRMASK.
3411
3412 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3413
3414         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3415         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3416         stamp-h.
3417         * configure: Rebuild.
3418         * config.in: New file, generated by autoheader.
3419         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3420         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3421         HAVE_ANINT and HAVE_AINT, as appropriate.
3422         * Makefile.in (run): Use @LIBS@ rather than -lm.
3423         (interp.o): Depend upon config.h.
3424         (Makefile): Just rebuild Makefile.
3425         (clean): Remove stamp-h.
3426         (mostlyclean): Make the same as clean, not as distclean.
3427         (config.h, stamp-h): New targets.
3428
3429 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3430
3431         * interp.c (ColdReset): Fix boolean test. Make all simulator
3432         globals static.
3433
3434 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3435
3436         * interp.c (xfer_direct_word, xfer_direct_long,
3437         swap_direct_word, swap_direct_long, xfer_big_word,
3438         xfer_big_long, xfer_little_word, xfer_little_long,
3439         swap_word,swap_long): Added.
3440         * interp.c (ColdReset): Provide function indirection to
3441         host<->simulated_target transfer routines.
3442         * interp.c (sim_store_register, sim_fetch_register): Updated to
3443         make use of indirected transfer routines.
3444
3445 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3446
3447         * gencode.c (process_instructions): Ensure FP ABS instruction
3448         recognised.
3449         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3450         system call support.
3451
3452 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3453
3454         * interp.c (sim_do_command): Complain if callback structure not
3455         initialised.
3456
3457 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3458
3459         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3460         support for Sun hosts.
3461         * Makefile.in (gencode): Ensure the host compiler and libraries
3462         used for cross-hosted build.
3463
3464 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3465
3466         * interp.c, gencode.c: Some more (TODO) tidying.
3467
3468 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3469
3470         * gencode.c, interp.c: Replaced explicit long long references with
3471         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3472         * support.h (SET64LO, SET64HI): Macros added.
3473
3474 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3475
3476         * configure: Regenerate with autoconf 2.7.
3477
3478 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3479
3480         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3481         * support.h: Remove superfluous "1" from #if.
3482         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3483
3484 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3485
3486         * interp.c (StoreFPR): Control UndefinedResult() call on
3487         WARN_RESULT manifest.
3488
3489 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3490
3491         * gencode.c: Tidied instruction decoding, and added FP instruction
3492         support.
3493
3494         * interp.c: Added dineroIII, and BSD profiling support. Also
3495         run-time FP handling.
3496
3497 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3498
3499         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3500         gencode.c, interp.c, support.h: created.