1 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
5 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
7 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
9 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
11 * interp.c (decode_coproc): Output long using %lx and not %s.
13 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
15 * interp.c (sim_open): Sort & extend dummy memory regions for
16 --board=jmr3904 for eCos.
18 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
20 * configure: Regenerated.
22 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
24 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
25 calls, conditional on the simulator being in verbose mode.
27 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
29 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
30 cache don't get ReservedInstruction traps.
32 1999-11-29 Mark Salter <msalter@cygnus.com>
34 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
35 to clear status bits in sdisr register. This is how the hardware works.
37 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
40 1999-11-11 Andrew Haley <aph@cygnus.com>
42 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
45 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
47 * mips.igen (MULT): Correct previous mis-applied patch.
49 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
51 * mips.igen (delayslot32): Handle sequence like
52 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
53 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
54 (MULT): Actually pass the third register...
56 1999-09-03 Mark Salter <msalter@cygnus.com>
58 * interp.c (sim_open): Added more memory aliases for additional
59 hardware being touched by cygmon on jmr3904 board.
61 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
63 * configure: Regenerated to track ../common/aclocal.m4 changes.
65 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
67 * interp.c (sim_store_register): Handle case where client - GDB -
68 specifies that a 4 byte register is 8 bytes in size.
69 (sim_fetch_register): Ditto.
71 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
73 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
74 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
75 (idt_monitor_base): Base address for IDT monitor traps.
76 (pmon_monitor_base): Ditto for PMON.
77 (lsipmon_monitor_base): Ditto for LSI PMON.
78 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
79 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
80 (sim_firmware_command): New function.
81 (mips_option_handler): Call it for OPTION_FIRMWARE.
82 (sim_open): Allocate memory for idt_monitor region. If "--board"
83 option was given, add no monitor by default. Add BREAK hooks only if
84 monitors are also there.
86 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
88 * interp.c (sim_monitor): Flush output before reading input.
90 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
92 * tconfig.in (SIM_HANDLES_LMA): Always define.
94 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
96 From Mark Salter <msalter@cygnus.com>:
97 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
98 (sim_open): Add setup for BSP board.
100 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
102 * mips.igen (MULT, MULTU): Add syntax for two operand version.
103 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
104 them as unimplemented.
106 1999-05-08 Felix Lee <flee@cygnus.com>
108 * configure: Regenerated to track ../common/aclocal.m4 changes.
110 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
112 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
114 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
116 * configure.in: Any mips64vr5*-*-* target should have
117 -DTARGET_ENABLE_FR=1.
118 (default_endian): Any mips64vr*el-*-* target should default to
120 * configure: Re-generate.
122 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
124 * mips.igen (ldl): Extend from _16_, not 32.
126 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
128 * interp.c (sim_store_register): Force registers written to by GDB
129 into an un-interpreted state.
131 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
133 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
134 CPU, start periodic background I/O polls.
135 (tx3904sio_poll): New function: periodic I/O poller.
137 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
139 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
141 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
143 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
146 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
148 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
149 (load_word): Call SIM_CORE_SIGNAL hook on error.
150 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
151 starting. For exception dispatching, pass PC instead of NULL_CIA.
152 (decode_coproc): Use COP0_BADVADDR to store faulting address.
153 * sim-main.h (COP0_BADVADDR): Define.
154 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
155 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
156 (_sim_cpu): Add exc_* fields to store register value snapshots.
157 * mips.igen (*): Replace memory-related SignalException* calls
158 with references to SIM_CORE_SIGNAL hook.
160 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
162 * sim-main.c (*): Minor warning cleanups.
164 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
166 * m16.igen (DADDIU5): Correct type-o.
168 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
170 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
173 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
175 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
177 (interp.o): Add dependency on itable.h
178 (oengine.c, gencode): Delete remaining references.
179 (BUILT_SRC_FROM_GEN): Clean up.
181 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
184 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
185 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
187 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
188 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
189 Drop the "64" qualifier to get the HACK generator working.
190 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
191 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
192 qualifier to get the hack generator working.
193 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
195 (DSLLV): Use do_dsllv.
198 (DSRLV): Use do_dsrlv.
199 (BC1): Move *vr4100 to get the HACK generator working.
200 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
201 get the HACK generator working.
202 (MACC) Rename to get the HACK generator working.
203 (DMACC,MACCS,DMACCS): Add the 64.
205 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
207 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
208 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
210 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
212 * mips/interp.c (DEBUG): Cleanups.
214 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
216 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
217 (tx3904sio_tickle): fflush after a stdout character output.
219 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
221 * interp.c (sim_close): Uninstall modules.
223 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
225 * sim-main.h, interp.c (sim_monitor): Change to global
228 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
230 * configure.in (vr4100): Only include vr4100 instructions in
232 * configure: Re-generate.
233 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
235 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
237 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
238 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
241 * configure.in (sim_default_gen, sim_use_gen): Replace with
243 (--enable-sim-igen): Delete config option. Always using IGEN.
244 * configure: Re-generate.
246 * Makefile.in (gencode): Kill, kill, kill.
249 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
251 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
252 bit mips16 igen simulator.
253 * configure: Re-generate.
255 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
256 as part of vr4100 ISA.
257 * vr.igen: Mark all instructions as 64 bit only.
259 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
261 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
264 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
266 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
267 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
268 * configure: Re-generate.
270 * m16.igen (BREAK): Define breakpoint instruction.
271 (JALX32): Mark instruction as mips16 and not r3900.
272 * mips.igen (C.cond.fmt): Fix typo in instruction format.
274 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
276 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
278 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
279 insn as a debug breakpoint.
281 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
283 (PENDING_SCHED): Clean up trace statement.
284 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
285 (PENDING_FILL): Delay write by only one cycle.
286 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
288 * sim-main.c (pending_tick): Clean up trace statements. Add trace
290 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
292 (pending_tick): Move incrementing of index to FOR statement.
293 (pending_tick): Only update PENDING_OUT after a write has occured.
295 * configure.in: Add explicit mips-lsi-* target. Use gencode to
297 * configure: Re-generate.
299 * interp.c (sim_engine_run OLD): Delete explicit call to
300 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
302 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
304 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
305 interrupt level number to match changed SignalExceptionInterrupt
308 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
310 * interp.c: #include "itable.h" if WITH_IGEN.
311 (get_insn_name): New function.
312 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
313 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
315 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
317 * configure: Rebuilt to inhale new common/aclocal.m4.
319 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
321 * dv-tx3904sio.c: Include sim-assert.h.
323 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
325 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
326 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
327 Reorganize target-specific sim-hardware checks.
328 * configure: rebuilt.
329 * interp.c (sim_open): For tx39 target boards, set
330 OPERATING_ENVIRONMENT, add tx3904sio devices.
331 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
332 ROM executables. Install dv-sockser into sim-modules list.
334 * dv-tx3904irc.c: Compiler warning clean-up.
335 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
336 frequent hw-trace messages.
338 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
340 * vr.igen (MulAcc): Identify as a vr4100 specific function.
342 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
344 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
347 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
348 * mips.igen: Define vr4100 model. Include vr.igen.
349 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
351 * mips.igen (check_mf_hilo): Correct check.
353 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
355 * sim-main.h (interrupt_event): Add prototype.
357 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
358 register_ptr, register_value.
359 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
361 * sim-main.h (tracefh): Make extern.
363 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
365 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
366 Reduce unnecessarily high timer event frequency.
367 * dv-tx3904cpu.c: Ditto for interrupt event.
369 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
371 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
373 (interrupt_event): Made non-static.
375 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
376 interchange of configuration values for external vs. internal
379 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
381 * mips.igen (BREAK): Moved code to here for
382 simulator-reserved break instructions.
383 * gencode.c (build_instruction): Ditto.
384 * interp.c (signal_exception): Code moved from here. Non-
385 reserved instructions now use exception vector, rather
387 * sim-main.h: Moved magic constants to here.
389 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
391 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
392 register upon non-zero interrupt event level, clear upon zero
394 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
395 by passing zero event value.
396 (*_io_{read,write}_buffer): Endianness fixes.
397 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
398 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
400 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
401 serial I/O and timer module at base address 0xFFFF0000.
403 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
405 * mips.igen (SWC1) : Correct the handling of ReverseEndian
408 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
410 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
414 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
416 * dv-tx3904tmr.c: New file - implements tx3904 timer.
417 * dv-tx3904{irc,cpu}.c: Mild reformatting.
418 * configure.in: Include tx3904tmr in hw_device list.
419 * configure: Rebuilt.
420 * interp.c (sim_open): Instantiate three timer instances.
421 Fix address typo of tx3904irc instance.
423 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
425 * interp.c (signal_exception): SystemCall exception now uses
426 the exception vector.
428 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
430 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
433 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
435 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
437 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
439 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
441 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
442 sim-main.h. Declare a struct hw_descriptor instead of struct
443 hw_device_descriptor.
445 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
447 * mips.igen (do_store_left, do_load_left): Compute nr of left and
448 right bits and then re-align left hand bytes to correct byte
449 lanes. Fix incorrect computation in do_store_left when loading
450 bytes from second word.
452 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
454 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
455 * interp.c (sim_open): Only create a device tree when HW is
458 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
459 * interp.c (signal_exception): Ditto.
461 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
463 * gencode.c: Mark BEGEZALL as LIKELY.
465 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
467 * sim-main.h (ALU32_END): Sign extend 32 bit results.
468 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
470 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
472 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
473 modules. Recognize TX39 target with "mips*tx39" pattern.
474 * configure: Rebuilt.
475 * sim-main.h (*): Added many macros defining bits in
476 TX39 control registers.
477 (SignalInterrupt): Send actual PC instead of NULL.
478 (SignalNMIReset): New exception type.
479 * interp.c (board): New variable for future use to identify
480 a particular board being simulated.
481 (mips_option_handler,mips_options): Added "--board" option.
482 (interrupt_event): Send actual PC.
483 (sim_open): Make memory layout conditional on board setting.
484 (signal_exception): Initial implementation of hardware interrupt
485 handling. Accept another break instruction variant for simulator
487 (decode_coproc): Implement RFE instruction for TX39.
488 (mips.igen): Decode RFE instruction as such.
489 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
490 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
491 bbegin to implement memory map.
492 * dv-tx3904cpu.c: New file.
493 * dv-tx3904irc.c: New file.
495 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
497 * mips.igen (check_mt_hilo): Create a separate r3900 version.
499 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
501 * tx.igen (madd,maddu): Replace calls to check_op_hilo
502 with calls to check_div_hilo.
504 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
506 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
507 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
508 Add special r3900 version of do_mult_hilo.
509 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
510 with calls to check_mult_hilo.
511 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
512 with calls to check_div_hilo.
514 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
516 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
517 Document a replacement.
519 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
521 * interp.c (sim_monitor): Make mon_printf work.
523 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
525 * sim-main.h (INSN_NAME): New arg `cpu'.
527 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
529 * configure: Regenerated to track ../common/aclocal.m4 changes.
531 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
533 * configure: Regenerated to track ../common/aclocal.m4 changes.
536 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
538 * acconfig.h: New file.
539 * configure.in: Reverted change of Apr 24; use sinclude again.
541 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
543 * configure: Regenerated to track ../common/aclocal.m4 changes.
546 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
548 * configure.in: Don't call sinclude.
550 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
552 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
554 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
556 * mips.igen (ERET): Implement.
558 * interp.c (decode_coproc): Return sign-extended EPC.
560 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
562 * interp.c (signal_exception): Do not ignore Trap.
563 (signal_exception): On TRAP, restart at exception address.
564 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
565 (signal_exception): Update.
566 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
567 so that TRAP instructions are caught.
569 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
571 * sim-main.h (struct hilo_access, struct hilo_history): Define,
572 contains HI/LO access history.
573 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
574 (HIACCESS, LOACCESS): Delete, replace with
575 (HIHISTORY, LOHISTORY): New macros.
576 (CHECKHILO): Delete all, moved to mips.igen
578 * gencode.c (build_instruction): Do not generate checks for
579 correct HI/LO register usage.
581 * interp.c (old_engine_run): Delete checks for correct HI/LO
584 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
585 check_mf_cycles): New functions.
586 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
587 do_divu, domultx, do_mult, do_multu): Use.
589 * tx.igen ("madd", "maddu"): Use.
591 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
593 * mips.igen (DSRAV): Use function do_dsrav.
594 (SRAV): Use new function do_srav.
596 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
597 (B): Sign extend 11 bit immediate.
598 (EXT-B*): Shift 16 bit immediate left by 1.
599 (ADDIU*): Don't sign extend immediate value.
601 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
603 * m16run.c (sim_engine_run): Restore CIA after handling an event.
605 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
608 * mips.igen (delayslot32, nullify_next_insn): New functions.
609 (m16.igen): Always include.
610 (do_*): Add more tracing.
612 * m16.igen (delayslot16): Add NIA argument, could be called by a
613 32 bit MIPS16 instruction.
615 * interp.c (ifetch16): Move function from here.
616 * sim-main.c (ifetch16): To here.
618 * sim-main.c (ifetch16, ifetch32): Update to match current
619 implementations of LH, LW.
620 (signal_exception): Don't print out incorrect hex value of illegal
623 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
625 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
628 * m16.igen: Implement MIPS16 instructions.
630 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
631 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
632 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
633 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
634 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
635 bodies of corresponding code from 32 bit insn to these. Also used
636 by MIPS16 versions of functions.
638 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
639 (IMEM16): Drop NR argument from macro.
641 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
643 * Makefile.in (SIM_OBJS): Add sim-main.o.
645 * sim-main.h (address_translation, load_memory, store_memory,
646 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
648 (pr_addr, pr_uword64): Declare.
649 (sim-main.c): Include when H_REVEALS_MODULE_P.
651 * interp.c (address_translation, load_memory, store_memory,
652 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
654 * sim-main.c: To here. Fix compilation problems.
656 * configure.in: Enable inlining.
657 * configure: Re-config.
659 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
661 * configure: Regenerated to track ../common/aclocal.m4 changes.
663 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
665 * mips.igen: Include tx.igen.
666 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
667 * tx.igen: New file, contains MADD and MADDU.
669 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
670 the hardwired constant `7'.
671 (store_memory): Ditto.
672 (LOADDRMASK): Move definition to sim-main.h.
674 mips.igen (MTC0): Enable for r3900.
677 mips.igen (do_load_byte): Delete.
678 (do_load, do_store, do_load_left, do_load_write, do_store_left,
679 do_store_right): New functions.
680 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
682 configure.in: Let the tx39 use igen again.
685 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
687 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
688 not an address sized quantity. Return zero for cache sizes.
690 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
692 * mips.igen (r3900): r3900 does not support 64 bit integer
695 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
697 * configure.in (mipstx39*-*-*): Use gencode simulator rather
699 * configure : Rebuild.
701 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
703 * configure: Regenerated to track ../common/aclocal.m4 changes.
705 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
707 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
709 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
711 * configure: Regenerated to track ../common/aclocal.m4 changes.
712 * config.in: Regenerated to track ../common/aclocal.m4 changes.
714 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
716 * configure: Regenerated to track ../common/aclocal.m4 changes.
718 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
720 * interp.c (Max, Min): Comment out functions. Not yet used.
722 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
724 * configure: Regenerated to track ../common/aclocal.m4 changes.
726 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
728 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
729 configurable settings for stand-alone simulator.
731 * configure.in: Added X11 search, just in case.
733 * configure: Regenerated.
735 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
737 * interp.c (sim_write, sim_read, load_memory, store_memory):
738 Replace sim_core_*_map with read_map, write_map, exec_map resp.
740 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
742 * sim-main.h (GETFCC): Return an unsigned value.
744 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
746 * mips.igen (DIV): Fix check for -1 / MIN_INT.
747 (DADD): Result destination is RD not RT.
749 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
751 * sim-main.h (HIACCESS, LOACCESS): Always define.
753 * mdmx.igen (Maxi, Mini): Rename Max, Min.
755 * interp.c (sim_info): Delete.
757 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
759 * interp.c (DECLARE_OPTION_HANDLER): Use it.
760 (mips_option_handler): New argument `cpu'.
761 (sim_open): Update call to sim_add_option_table.
763 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
765 * mips.igen (CxC1): Add tracing.
767 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
769 * sim-main.h (Max, Min): Declare.
771 * interp.c (Max, Min): New functions.
773 * mips.igen (BC1): Add tracing.
775 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
777 * interp.c Added memory map for stack in vr4100
779 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
781 * interp.c (load_memory): Add missing "break"'s.
783 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
785 * interp.c (sim_store_register, sim_fetch_register): Pass in
786 length parameter. Return -1.
788 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
790 * interp.c: Added hardware init hook, fixed warnings.
792 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
794 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
796 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
798 * interp.c (ifetch16): New function.
800 * sim-main.h (IMEM32): Rename IMEM.
801 (IMEM16_IMMED): Define.
803 (DELAY_SLOT): Update.
805 * m16run.c (sim_engine_run): New file.
807 * m16.igen: All instructions except LB.
808 (LB): Call do_load_byte.
809 * mips.igen (do_load_byte): New function.
810 (LB): Call do_load_byte.
812 * mips.igen: Move spec for insn bit size and high bit from here.
813 * Makefile.in (tmp-igen, tmp-m16): To here.
815 * m16.dc: New file, decode mips16 instructions.
817 * Makefile.in (SIM_NO_ALL): Define.
818 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
820 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
822 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
823 point unit to 32 bit registers.
824 * configure: Re-generate.
826 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
828 * configure.in (sim_use_gen): Make IGEN the default simulator
829 generator for generic 32 and 64 bit mips targets.
830 * configure: Re-generate.
832 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
834 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
837 * interp.c (sim_fetch_register, sim_store_register): Read/write
838 FGR from correct location.
839 (sim_open): Set size of FGR's according to
840 WITH_TARGET_FLOATING_POINT_BITSIZE.
842 * sim-main.h (FGR): Store floating point registers in a separate
845 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
847 * configure: Regenerated to track ../common/aclocal.m4 changes.
849 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
851 * interp.c (ColdReset): Call PENDING_INVALIDATE.
853 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
855 * interp.c (pending_tick): New function. Deliver pending writes.
857 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
858 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
859 it can handle mixed sized quantites and single bits.
861 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
863 * interp.c (oengine.h): Do not include when building with IGEN.
864 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
865 (sim_info): Ditto for PROCESSOR_64BIT.
866 (sim_monitor): Replace ut_reg with unsigned_word.
867 (*): Ditto for t_reg.
868 (LOADDRMASK): Define.
869 (sim_open): Remove defunct check that host FP is IEEE compliant,
870 using software to emulate floating point.
871 (value_fpr, ...): Always compile, was conditional on HASFPU.
873 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
875 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
878 * interp.c (SD, CPU): Define.
879 (mips_option_handler): Set flags in each CPU.
880 (interrupt_event): Assume CPU 0 is the one being iterrupted.
881 (sim_close): Do not clear STATE, deleted anyway.
882 (sim_write, sim_read): Assume CPU zero's vm should be used for
884 (sim_create_inferior): Set the PC for all processors.
885 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
887 (mips16_entry): Pass correct nr of args to store_word, load_word.
888 (ColdReset): Cold reset all cpu's.
889 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
890 (sim_monitor, load_memory, store_memory, signal_exception): Use
891 `CPU' instead of STATE_CPU.
894 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
897 * sim-main.h (signal_exception): Add sim_cpu arg.
898 (SignalException*): Pass both SD and CPU to signal_exception.
899 * interp.c (signal_exception): Update.
901 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
903 (sync_operation, prefetch, cache_op, store_memory, load_memory,
904 address_translation): Ditto
905 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
907 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
909 * configure: Regenerated to track ../common/aclocal.m4 changes.
911 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
913 * interp.c (sim_engine_run): Add `nr_cpus' argument.
915 * mips.igen (model): Map processor names onto BFD name.
917 * sim-main.h (CPU_CIA): Delete.
918 (SET_CIA, GET_CIA): Define
920 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
922 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
925 * configure.in (default_endian): Configure a big-endian simulator
927 * configure: Re-generate.
929 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
931 * configure: Regenerated to track ../common/aclocal.m4 changes.
933 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
935 * interp.c (sim_monitor): Handle Densan monitor outbyte
936 and inbyte functions.
938 1997-12-29 Felix Lee <flee@cygnus.com>
940 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
942 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
944 * Makefile.in (tmp-igen): Arrange for $zero to always be
945 reset to zero after every instruction.
947 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
949 * configure: Regenerated to track ../common/aclocal.m4 changes.
952 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
954 * mips.igen (MSUB): Fix to work like MADD.
955 * gencode.c (MSUB): Similarly.
957 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
959 * configure: Regenerated to track ../common/aclocal.m4 changes.
961 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
963 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
965 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
967 * sim-main.h (sim-fpu.h): Include.
969 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
970 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
971 using host independant sim_fpu module.
973 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
975 * interp.c (signal_exception): Report internal errors with SIGABRT
978 * sim-main.h (C0_CONFIG): New register.
979 (signal.h): No longer include.
981 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
983 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
985 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
987 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
989 * mips.igen: Tag vr5000 instructions.
990 (ANDI): Was missing mipsIV model, fix assembler syntax.
991 (do_c_cond_fmt): New function.
992 (C.cond.fmt): Handle mips I-III which do not support CC field
994 (bc1): Handle mips IV which do not have a delaed FCC separatly.
995 (SDR): Mask paddr when BigEndianMem, not the converse as specified
997 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
998 vr5000 which saves LO in a GPR separatly.
1000 * configure.in (enable-sim-igen): For vr5000, select vr5000
1001 specific instructions.
1002 * configure: Re-generate.
1004 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1006 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1008 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1009 fmt_uninterpreted_64 bit cases to switch. Convert to
1012 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1014 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1015 as specified in IV3.2 spec.
1016 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1018 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1020 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1021 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1022 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1023 PENDING_FILL versions of instructions. Simplify.
1025 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1027 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1029 (MTHI, MFHI): Disable code checking HI-LO.
1031 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1033 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1035 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1037 * gencode.c (build_mips16_operands): Replace IPC with cia.
1039 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1040 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1042 (UndefinedResult): Replace function with macro/function
1044 (sim_engine_run): Don't save PC in IPC.
1046 * sim-main.h (IPC): Delete.
1049 * interp.c (signal_exception, store_word, load_word,
1050 address_translation, load_memory, store_memory, cache_op,
1051 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1052 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1053 current instruction address - cia - argument.
1054 (sim_read, sim_write): Call address_translation directly.
1055 (sim_engine_run): Rename variable vaddr to cia.
1056 (signal_exception): Pass cia to sim_monitor
1058 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1059 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1060 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1062 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1063 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1066 * interp.c (signal_exception): Pass restart address to
1069 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1070 idecode.o): Add dependency.
1072 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1074 (DELAY_SLOT): Update NIA not PC with branch address.
1075 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1077 * mips.igen: Use CIA not PC in branch calculations.
1078 (illegal): Call SignalException.
1079 (BEQ, ADDIU): Fix assembler.
1081 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1083 * m16.igen (JALX): Was missing.
1085 * configure.in (enable-sim-igen): New configuration option.
1086 * configure: Re-generate.
1088 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1090 * interp.c (load_memory, store_memory): Delete parameter RAW.
1091 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1092 bypassing {load,store}_memory.
1094 * sim-main.h (ByteSwapMem): Delete definition.
1096 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1098 * interp.c (sim_do_command, sim_commands): Delete mips specific
1099 commands. Handled by module sim-options.
1101 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1102 (WITH_MODULO_MEMORY): Define.
1104 * interp.c (sim_info): Delete code printing memory size.
1106 * interp.c (mips_size): Nee sim_size, delete function.
1108 (monitor, monitor_base, monitor_size): Delete global variables.
1109 (sim_open, sim_close): Delete code creating monitor and other
1110 memory regions. Use sim-memopts module, via sim_do_commandf, to
1111 manage memory regions.
1112 (load_memory, store_memory): Use sim-core for memory model.
1114 * interp.c (address_translation): Delete all memory map code
1115 except line forcing 32 bit addresses.
1117 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1119 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1122 * interp.c (logfh, logfile): Delete globals.
1123 (sim_open, sim_close): Delete code opening & closing log file.
1124 (mips_option_handler): Delete -l and -n options.
1125 (OPTION mips_options): Ditto.
1127 * interp.c (OPTION mips_options): Rename option trace to dinero.
1128 (mips_option_handler): Update.
1130 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1132 * interp.c (fetch_str): New function.
1133 (sim_monitor): Rewrite using sim_read & sim_write.
1134 (sim_open): Check magic number.
1135 (sim_open): Write monitor vectors into memory using sim_write.
1136 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1137 (sim_read, sim_write): Simplify - transfer data one byte at a
1139 (load_memory, store_memory): Clarify meaning of parameter RAW.
1141 * sim-main.h (isHOST): Defete definition.
1142 (isTARGET): Mark as depreciated.
1143 (address_translation): Delete parameter HOST.
1145 * interp.c (address_translation): Delete parameter HOST.
1147 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1151 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1152 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1154 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1156 * mips.igen: Add model filter field to records.
1158 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1160 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1162 interp.c (sim_engine_run): Do not compile function sim_engine_run
1163 when WITH_IGEN == 1.
1165 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1166 target architecture.
1168 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1169 igen. Replace with configuration variables sim_igen_flags /
1172 * m16.igen: New file. Copy mips16 insns here.
1173 * mips.igen: From here.
1175 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1177 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1179 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1181 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1183 * gencode.c (build_instruction): Follow sim_write's lead in using
1184 BigEndianMem instead of !ByteSwapMem.
1186 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1188 * configure.in (sim_gen): Dependent on target, select type of
1189 generator. Always select old style generator.
1191 configure: Re-generate.
1193 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1195 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1196 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1197 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1198 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1199 SIM_@sim_gen@_*, set by autoconf.
1201 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1203 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1205 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1206 CURRENT_FLOATING_POINT instead.
1208 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1209 (address_translation): Raise exception InstructionFetch when
1210 translation fails and isINSTRUCTION.
1212 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1213 sim_engine_run): Change type of of vaddr and paddr to
1215 (address_translation, prefetch, load_memory, store_memory,
1216 cache_op): Change type of vAddr and pAddr to address_word.
1218 * gencode.c (build_instruction): Change type of vaddr and paddr to
1221 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1223 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1224 macro to obtain result of ALU op.
1226 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1228 * interp.c (sim_info): Call profile_print.
1230 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1232 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1234 * sim-main.h (WITH_PROFILE): Do not define, defined in
1235 common/sim-config.h. Use sim-profile module.
1236 (simPROFILE): Delete defintion.
1238 * interp.c (PROFILE): Delete definition.
1239 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1240 (sim_close): Delete code writing profile histogram.
1241 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1243 (sim_engine_run): Delete code profiling the PC.
1245 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1247 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1249 * interp.c (sim_monitor): Make register pointers of type
1252 * sim-main.h: Make registers of type unsigned_word not
1255 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1257 * interp.c (sync_operation): Rename from SyncOperation, make
1258 global, add SD argument.
1259 (prefetch): Rename from Prefetch, make global, add SD argument.
1260 (decode_coproc): Make global.
1262 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1264 * gencode.c (build_instruction): Generate DecodeCoproc not
1265 decode_coproc calls.
1267 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1268 (SizeFGR): Move to sim-main.h
1269 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1270 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1271 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1273 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1274 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1275 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1276 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1277 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1278 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1280 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1282 (sim-alu.h): Include.
1283 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1284 (sim_cia): Typedef to instruction_address.
1286 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1288 * Makefile.in (interp.o): Rename generated file engine.c to
1293 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1295 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1297 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1299 * gencode.c (build_instruction): For "FPSQRT", output correct
1300 number of arguments to Recip.
1302 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1304 * Makefile.in (interp.o): Depends on sim-main.h
1306 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1308 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1309 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1310 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1311 STATE, DSSTATE): Define
1312 (GPR, FGRIDX, ..): Define.
1314 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1315 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1316 (GPR, FGRIDX, ...): Delete macros.
1318 * interp.c: Update names to match defines from sim-main.h
1320 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1322 * interp.c (sim_monitor): Add SD argument.
1323 (sim_warning): Delete. Replace calls with calls to
1325 (sim_error): Delete. Replace calls with sim_io_error.
1326 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1327 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1328 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1330 (mips_size): Rename from sim_size. Add SD argument.
1332 * interp.c (simulator): Delete global variable.
1333 (callback): Delete global variable.
1334 (mips_option_handler, sim_open, sim_write, sim_read,
1335 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1336 sim_size,sim_monitor): Use sim_io_* not callback->*.
1337 (sim_open): ZALLOC simulator struct.
1338 (PROFILE): Do not define.
1340 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1342 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1343 support.h with corresponding code.
1345 * sim-main.h (word64, uword64), support.h: Move definition to
1347 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1350 * Makefile.in: Update dependencies
1351 * interp.c: Do not include.
1353 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1355 * interp.c (address_translation, load_memory, store_memory,
1356 cache_op): Rename to from AddressTranslation et.al., make global,
1359 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1362 * interp.c (SignalException): Rename to signal_exception, make
1365 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1367 * sim-main.h (SignalException, SignalExceptionInterrupt,
1368 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1369 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1370 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1373 * interp.c, support.h: Use.
1375 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1377 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1378 to value_fpr / store_fpr. Add SD argument.
1379 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1380 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1382 * sim-main.h (ValueFPR, StoreFPR): Define.
1384 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1386 * interp.c (sim_engine_run): Check consistency between configure
1387 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1390 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1391 (mips_fpu): Configure WITH_FLOATING_POINT.
1392 (mips_endian): Configure WITH_TARGET_ENDIAN.
1393 * configure: Update.
1395 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1397 * configure: Regenerated to track ../common/aclocal.m4 changes.
1399 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1401 * configure: Regenerated.
1403 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1405 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1407 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1409 * gencode.c (print_igen_insn_models): Assume certain architectures
1410 include all mips* instructions.
1411 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1414 * Makefile.in (tmp.igen): Add target. Generate igen input from
1417 * gencode.c (FEATURE_IGEN): Define.
1418 (main): Add --igen option. Generate output in igen format.
1419 (process_instructions): Format output according to igen option.
1420 (print_igen_insn_format): New function.
1421 (print_igen_insn_models): New function.
1422 (process_instructions): Only issue warnings and ignore
1423 instructions when no FEATURE_IGEN.
1425 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1427 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1430 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1432 * configure: Regenerated to track ../common/aclocal.m4 changes.
1434 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1436 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1437 SIM_RESERVED_BITS): Delete, moved to common.
1438 (SIM_EXTRA_CFLAGS): Update.
1440 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1442 * configure.in: Configure non-strict memory alignment.
1443 * configure: Regenerated to track ../common/aclocal.m4 changes.
1445 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1447 * configure: Regenerated to track ../common/aclocal.m4 changes.
1449 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1451 * gencode.c (SDBBP,DERET): Added (3900) insns.
1452 (RFE): Turn on for 3900.
1453 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1454 (dsstate): Made global.
1455 (SUBTARGET_R3900): Added.
1456 (CANCELDELAYSLOT): New.
1457 (SignalException): Ignore SystemCall rather than ignore and
1458 terminate. Add DebugBreakPoint handling.
1459 (decode_coproc): New insns RFE, DERET; and new registers Debug
1460 and DEPC protected by SUBTARGET_R3900.
1461 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1463 * Makefile.in,configure.in: Add mips subtarget option.
1464 * configure: Update.
1466 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1468 * gencode.c: Add r3900 (tx39).
1471 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1473 * gencode.c (build_instruction): Don't need to subtract 4 for
1476 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1478 * interp.c: Correct some HASFPU problems.
1480 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1482 * configure: Regenerated to track ../common/aclocal.m4 changes.
1484 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1486 * interp.c (mips_options): Fix samples option short form, should
1489 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1491 * interp.c (sim_info): Enable info code. Was just returning.
1493 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1495 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1498 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1500 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1502 (build_instruction): Ditto for LL.
1504 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1506 * configure: Regenerated to track ../common/aclocal.m4 changes.
1508 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1510 * configure: Regenerated to track ../common/aclocal.m4 changes.
1513 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1515 * interp.c (sim_open): Add call to sim_analyze_program, update
1518 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1520 * interp.c (sim_kill): Delete.
1521 (sim_create_inferior): Add ABFD argument. Set PC from same.
1522 (sim_load): Move code initializing trap handlers from here.
1523 (sim_open): To here.
1524 (sim_load): Delete, use sim-hload.c.
1526 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1528 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1530 * configure: Regenerated to track ../common/aclocal.m4 changes.
1533 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1535 * interp.c (sim_open): Add ABFD argument.
1536 (sim_load): Move call to sim_config from here.
1537 (sim_open): To here. Check return status.
1539 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1541 * gencode.c (build_instruction): Two arg MADD should
1542 not assign result to $0.
1544 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1546 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1547 * sim/mips/configure.in: Regenerate.
1549 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1551 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1552 signed8, unsigned8 et.al. types.
1554 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1555 hosts when selecting subreg.
1557 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1559 * interp.c (sim_engine_run): Reset the ZERO register to zero
1560 regardless of FEATURE_WARN_ZERO.
1561 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1563 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1565 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1566 (SignalException): For BreakPoints ignore any mode bits and just
1568 (SignalException): Always set the CAUSE register.
1570 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1572 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1573 exception has been taken.
1575 * interp.c: Implement the ERET and mt/f sr instructions.
1577 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1579 * interp.c (SignalException): Don't bother restarting an
1582 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1584 * interp.c (SignalException): Really take an interrupt.
1585 (interrupt_event): Only deliver interrupts when enabled.
1587 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1589 * interp.c (sim_info): Only print info when verbose.
1590 (sim_info) Use sim_io_printf for output.
1592 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1594 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1597 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1599 * interp.c (sim_do_command): Check for common commands if a
1600 simulator specific command fails.
1602 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1604 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1605 and simBE when DEBUG is defined.
1607 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1609 * interp.c (interrupt_event): New function. Pass exception event
1610 onto exception handler.
1612 * configure.in: Check for stdlib.h.
1613 * configure: Regenerate.
1615 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1616 variable declaration.
1617 (build_instruction): Initialize memval1.
1618 (build_instruction): Add UNUSED attribute to byte, bigend,
1620 (build_operands): Ditto.
1622 * interp.c: Fix GCC warnings.
1623 (sim_get_quit_code): Delete.
1625 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1626 * Makefile.in: Ditto.
1627 * configure: Re-generate.
1629 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1631 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1633 * interp.c (mips_option_handler): New function parse argumes using
1635 (myname): Replace with STATE_MY_NAME.
1636 (sim_open): Delete check for host endianness - performed by
1638 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1639 (sim_open): Move much of the initialization from here.
1640 (sim_load): To here. After the image has been loaded and
1642 (sim_open): Move ColdReset from here.
1643 (sim_create_inferior): To here.
1644 (sim_open): Make FP check less dependant on host endianness.
1646 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1648 * interp.c (sim_set_callbacks): Delete.
1650 * interp.c (membank, membank_base, membank_size): Replace with
1651 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1652 (sim_open): Remove call to callback->init. gdb/run do this.
1656 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1658 * interp.c (big_endian_p): Delete, replaced by
1659 current_target_byte_order.
1661 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1663 * interp.c (host_read_long, host_read_word, host_swap_word,
1664 host_swap_long): Delete. Using common sim-endian.
1665 (sim_fetch_register, sim_store_register): Use H2T.
1666 (pipeline_ticks): Delete. Handled by sim-events.
1668 (sim_engine_run): Update.
1670 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1672 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1674 (SignalException): To here. Signal using sim_engine_halt.
1675 (sim_stop_reason): Delete, moved to common.
1677 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1679 * interp.c (sim_open): Add callback argument.
1680 (sim_set_callbacks): Delete SIM_DESC argument.
1683 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1685 * Makefile.in (SIM_OBJS): Add common modules.
1687 * interp.c (sim_set_callbacks): Also set SD callback.
1688 (set_endianness, xfer_*, swap_*): Delete.
1689 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1690 Change to functions using sim-endian macros.
1691 (control_c, sim_stop): Delete, use common version.
1692 (simulate): Convert into.
1693 (sim_engine_run): This function.
1694 (sim_resume): Delete.
1696 * interp.c (simulation): New variable - the simulator object.
1697 (sim_kind): Delete global - merged into simulation.
1698 (sim_load): Cleanup. Move PC assignment from here.
1699 (sim_create_inferior): To here.
1701 * sim-main.h: New file.
1702 * interp.c (sim-main.h): Include.
1704 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1706 * configure: Regenerated to track ../common/aclocal.m4 changes.
1708 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1710 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1712 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1714 * gencode.c (build_instruction): DIV instructions: check
1715 for division by zero and integer overflow before using
1716 host's division operation.
1718 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1720 * Makefile.in (SIM_OBJS): Add sim-load.o.
1721 * interp.c: #include bfd.h.
1722 (target_byte_order): Delete.
1723 (sim_kind, myname, big_endian_p): New static locals.
1724 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1725 after argument parsing. Recognize -E arg, set endianness accordingly.
1726 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1727 load file into simulator. Set PC from bfd.
1728 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1729 (set_endianness): Use big_endian_p instead of target_byte_order.
1731 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1733 * interp.c (sim_size): Delete prototype - conflicts with
1734 definition in remote-sim.h. Correct definition.
1736 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1738 * configure: Regenerated to track ../common/aclocal.m4 changes.
1741 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1743 * interp.c (sim_open): New arg `kind'.
1745 * configure: Regenerated to track ../common/aclocal.m4 changes.
1747 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1749 * configure: Regenerated to track ../common/aclocal.m4 changes.
1751 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1753 * interp.c (sim_open): Set optind to 0 before calling getopt.
1755 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1757 * configure: Regenerated to track ../common/aclocal.m4 changes.
1759 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1761 * interp.c : Replace uses of pr_addr with pr_uword64
1762 where the bit length is always 64 independent of SIM_ADDR.
1763 (pr_uword64) : added.
1765 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1767 * configure: Re-generate.
1769 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1771 * configure: Regenerate to track ../common/aclocal.m4 changes.
1773 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1775 * interp.c (sim_open): New SIM_DESC result. Argument is now
1777 (other sim_*): New SIM_DESC argument.
1779 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1781 * interp.c: Fix printing of addresses for non-64-bit targets.
1782 (pr_addr): Add function to print address based on size.
1784 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1786 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1788 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1790 * gencode.c (build_mips16_operands): Correct computation of base
1791 address for extended PC relative instruction.
1793 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1795 * interp.c (mips16_entry): Add support for floating point cases.
1796 (SignalException): Pass floating point cases to mips16_entry.
1797 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1799 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1801 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1802 and then set the state to fmt_uninterpreted.
1803 (COP_SW): Temporarily set the state to fmt_word while calling
1806 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1808 * gencode.c (build_instruction): The high order may be set in the
1809 comparison flags at any ISA level, not just ISA 4.
1811 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1813 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1814 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1815 * configure.in: sinclude ../common/aclocal.m4.
1816 * configure: Regenerated.
1818 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1820 * configure: Rebuild after change to aclocal.m4.
1822 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1824 * configure configure.in Makefile.in: Update to new configure
1825 scheme which is more compatible with WinGDB builds.
1826 * configure.in: Improve comment on how to run autoconf.
1827 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1828 * Makefile.in: Use autoconf substitution to install common
1831 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1833 * gencode.c (build_instruction): Use BigEndianCPU instead of
1836 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1838 * interp.c (sim_monitor): Make output to stdout visible in
1839 wingdb's I/O log window.
1841 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1843 * support.h: Undo previous change to SIGTRAP
1846 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1848 * interp.c (store_word, load_word): New static functions.
1849 (mips16_entry): New static function.
1850 (SignalException): Look for mips16 entry and exit instructions.
1851 (simulate): Use the correct index when setting fpr_state after
1852 doing a pending move.
1854 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1856 * interp.c: Fix byte-swapping code throughout to work on
1857 both little- and big-endian hosts.
1859 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1861 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1862 with gdb/config/i386/xm-windows.h.
1864 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1866 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1867 that messes up arithmetic shifts.
1869 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1871 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1872 SIGTRAP and SIGQUIT for _WIN32.
1874 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1876 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1877 force a 64 bit multiplication.
1878 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1879 destination register is 0, since that is the default mips16 nop
1882 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1884 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1885 (build_endian_shift): Don't check proc64.
1886 (build_instruction): Always set memval to uword64. Cast op2 to
1887 uword64 when shifting it left in memory instructions. Always use
1888 the same code for stores--don't special case proc64.
1890 * gencode.c (build_mips16_operands): Fix base PC value for PC
1892 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1894 * interp.c (simJALDELAYSLOT): Define.
1895 (JALDELAYSLOT): Define.
1896 (INDELAYSLOT, INJALDELAYSLOT): Define.
1897 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1899 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1901 * interp.c (sim_open): add flush_cache as a PMON routine
1902 (sim_monitor): handle flush_cache by ignoring it
1904 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1906 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1908 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1909 (BigEndianMem): Rename to ByteSwapMem and change sense.
1910 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1911 BigEndianMem references to !ByteSwapMem.
1912 (set_endianness): New function, with prototype.
1913 (sim_open): Call set_endianness.
1914 (sim_info): Use simBE instead of BigEndianMem.
1915 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1916 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1917 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1918 ifdefs, keeping the prototype declaration.
1919 (swap_word): Rewrite correctly.
1920 (ColdReset): Delete references to CONFIG. Delete endianness related
1921 code; moved to set_endianness.
1923 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1925 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1926 * interp.c (CHECKHILO): Define away.
1927 (simSIGINT): New macro.
1928 (membank_size): Increase from 1MB to 2MB.
1929 (control_c): New function.
1930 (sim_resume): Rename parameter signal to signal_number. Add local
1931 variable prev. Call signal before and after simulate.
1932 (sim_stop_reason): Add simSIGINT support.
1933 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1935 (sim_warning): Delete call to SignalException. Do call printf_filtered
1937 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1938 a call to sim_warning.
1940 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1942 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1943 16 bit instructions.
1945 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1947 Add support for mips16 (16 bit MIPS implementation):
1948 * gencode.c (inst_type): Add mips16 instruction encoding types.
1949 (GETDATASIZEINSN): Define.
1950 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1951 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1953 (MIPS16_DECODE): New table, for mips16 instructions.
1954 (bitmap_val): New static function.
1955 (struct mips16_op): Define.
1956 (mips16_op_table): New table, for mips16 operands.
1957 (build_mips16_operands): New static function.
1958 (process_instructions): If PC is odd, decode a mips16
1959 instruction. Break out instruction handling into new
1960 build_instruction function.
1961 (build_instruction): New static function, broken out of
1962 process_instructions. Check modifiers rather than flags for SHIFT
1963 bit count and m[ft]{hi,lo} direction.
1964 (usage): Pass program name to fprintf.
1965 (main): Remove unused variable this_option_optind. Change
1966 ``*loptarg++'' to ``loptarg++''.
1967 (my_strtoul): Parenthesize && within ||.
1968 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1969 (simulate): If PC is odd, fetch a 16 bit instruction, and
1970 increment PC by 2 rather than 4.
1971 * configure.in: Add case for mips16*-*-*.
1972 * configure: Rebuild.
1974 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1976 * interp.c: Allow -t to enable tracing in standalone simulator.
1977 Fix garbage output in trace file and error messages.
1979 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1981 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1982 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1983 * configure.in: Simplify using macros in ../common/aclocal.m4.
1984 * configure: Regenerated.
1985 * tconfig.in: New file.
1987 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1989 * interp.c: Fix bugs in 64-bit port.
1990 Use ansi function declarations for msvc compiler.
1991 Initialize and test file pointer in trace code.
1992 Prevent duplicate definition of LAST_EMED_REGNUM.
1994 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1996 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1998 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2000 * interp.c (SignalException): Check for explicit terminating
2002 * gencode.c: Pass instruction value through SignalException()
2003 calls for Trap, Breakpoint and Syscall.
2005 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2007 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2008 only used on those hosts that provide it.
2009 * configure.in: Add sqrt() to list of functions to be checked for.
2010 * config.in: Re-generated.
2011 * configure: Re-generated.
2013 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2015 * gencode.c (process_instructions): Call build_endian_shift when
2016 expanding STORE RIGHT, to fix swr.
2017 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2018 clear the high bits.
2019 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2020 Fix float to int conversions to produce signed values.
2022 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2024 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2025 (process_instructions): Correct handling of nor instruction.
2026 Correct shift count for 32 bit shift instructions. Correct sign
2027 extension for arithmetic shifts to not shift the number of bits in
2028 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2029 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2031 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2032 It's OK to have a mult follow a mult. What's not OK is to have a
2033 mult follow an mfhi.
2034 (Convert): Comment out incorrect rounding code.
2036 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2038 * interp.c (sim_monitor): Improved monitor printf
2039 simulation. Tidied up simulator warnings, and added "--log" option
2040 for directing warning message output.
2041 * gencode.c: Use sim_warning() rather than WARNING macro.
2043 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2045 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2046 getopt1.o, rather than on gencode.c. Link objects together.
2047 Don't link against -liberty.
2048 (gencode.o, getopt.o, getopt1.o): New targets.
2049 * gencode.c: Include <ctype.h> and "ansidecl.h".
2050 (AND): Undefine after including "ansidecl.h".
2051 (ULONG_MAX): Define if not defined.
2052 (OP_*): Don't define macros; now defined in opcode/mips.h.
2053 (main): Call my_strtoul rather than strtoul.
2054 (my_strtoul): New static function.
2056 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2058 * gencode.c (process_instructions): Generate word64 and uword64
2059 instead of `long long' and `unsigned long long' data types.
2060 * interp.c: #include sysdep.h to get signals, and define default
2062 * (Convert): Work around for Visual-C++ compiler bug with type
2064 * support.h: Make things compile under Visual-C++ by using
2065 __int64 instead of `long long'. Change many refs to long long
2066 into word64/uword64 typedefs.
2068 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2070 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2071 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2073 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2074 (AC_PROG_INSTALL): Added.
2075 (AC_PROG_CC): Moved to before configure.host call.
2076 * configure: Rebuilt.
2078 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2080 * configure.in: Define @SIMCONF@ depending on mips target.
2081 * configure: Rebuild.
2082 * Makefile.in (run): Add @SIMCONF@ to control simulator
2084 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2085 * interp.c: Remove some debugging, provide more detailed error
2086 messages, update memory accesses to use LOADDRMASK.
2088 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2090 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2091 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2093 * configure: Rebuild.
2094 * config.in: New file, generated by autoheader.
2095 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2096 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2097 HAVE_ANINT and HAVE_AINT, as appropriate.
2098 * Makefile.in (run): Use @LIBS@ rather than -lm.
2099 (interp.o): Depend upon config.h.
2100 (Makefile): Just rebuild Makefile.
2101 (clean): Remove stamp-h.
2102 (mostlyclean): Make the same as clean, not as distclean.
2103 (config.h, stamp-h): New targets.
2105 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2107 * interp.c (ColdReset): Fix boolean test. Make all simulator
2110 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2112 * interp.c (xfer_direct_word, xfer_direct_long,
2113 swap_direct_word, swap_direct_long, xfer_big_word,
2114 xfer_big_long, xfer_little_word, xfer_little_long,
2115 swap_word,swap_long): Added.
2116 * interp.c (ColdReset): Provide function indirection to
2117 host<->simulated_target transfer routines.
2118 * interp.c (sim_store_register, sim_fetch_register): Updated to
2119 make use of indirected transfer routines.
2121 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2123 * gencode.c (process_instructions): Ensure FP ABS instruction
2125 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2126 system call support.
2128 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2130 * interp.c (sim_do_command): Complain if callback structure not
2133 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2135 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2136 support for Sun hosts.
2137 * Makefile.in (gencode): Ensure the host compiler and libraries
2138 used for cross-hosted build.
2140 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2142 * interp.c, gencode.c: Some more (TODO) tidying.
2144 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2146 * gencode.c, interp.c: Replaced explicit long long references with
2147 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2148 * support.h (SET64LO, SET64HI): Macros added.
2150 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2152 * configure: Regenerate with autoconf 2.7.
2154 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2156 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2157 * support.h: Remove superfluous "1" from #if.
2158 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2160 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2162 * interp.c (StoreFPR): Control UndefinedResult() call on
2163 WARN_RESULT manifest.
2165 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2167 * gencode.c: Tidied instruction decoding, and added FP instruction
2170 * interp.c: Added dineroIII, and BSD profiling support. Also
2171 run-time FP handling.
2173 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2175 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2176 gencode.c, interp.c, support.h: created.