sim/mips/ChangeLog

   1 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure: Regenerate.
   4
   5 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * interp.c [TRACE]: Delete.
   8         (TRACE): Change to WITH_TRACE_ANY_P.
   9         [!WITH_TRACE_ANY_P] (open_trace): Define.
  10         (mips_option_handler, open_trace, sim_close, dotrace):
  11         Change defined(TRACE) to WITH_TRACE_ANY_P.
  12         (sim_open): Delete TRACE ifdef check.
  13         * sim-main.c (load_memory): Delete TRACE ifdef check.
  14         (store_memory): Likewise.
  15         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
  16         [!WITH_TRACE_ANY_P] (dotrace): Define.
  17
  18 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
  21         comments.
  22
  23 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
  24
  25         * sim-main.h (SIM_CPU): Delete.
  26
  27 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
  28
  29         * sim-main.h (sim_cia): Delete.
  30
  31 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
  34         PU_PC_GET.
  35         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
  36         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
  37         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
  38         CIA_SET to CPU_PC_SET.
  39         * sim-main.h (CIA_GET, CIA_SET): Delete.
  40
  41 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
  42
  43         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
  44         * sim-main.h (STATE_CPU): Delete.
  45
  46 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * configure: Regenerate.
  49
  50 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  51
  52         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
  53         * interp.c (mips_pc_get, mips_pc_set): New functions.
  54         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
  55         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
  56         (sim_pc_get): Delete.
  57         * sim-main.h (SIM_CPU): Define.
  58         (struct sim_state): Change cpu to an array of pointers.
  59         (STATE_CPU): Drop &.
  60
  61 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * interp.c (mips_option_handler, open_trace, sim_close,
  64         sim_write, sim_read, sim_store_register, sim_fetch_register,
  65         sim_create_inferior, pr_addr, pr_uword64): Convert old style
  66         prototypes.
  67         (sim_open): Convert old style prototype.  Change casts with
  68         sim_write to unsigned char *.
  69         (fetch_str): Change null to unsigned char, and change cast to
  70         unsigned char *.
  71         (sim_monitor): Change c & ch to unsigned char.  Change cast to
  72         unsigned char *.
  73
  74 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
  77
  78 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
  79
  80         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
  81
  82 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
  83
  84         * tconfig.h (SIM_HAVE_PROFILE): Delete.
  85
  86 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * config.in, configure: Regenerate.
  89
  90 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  91
  92         * interp.c (sim_pc_get): New function.
  93
  94 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  95
  96         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
  97         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
  98
  99 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * configure: Regenerate.
 102
 103 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 104
 105         * configure: Regenerate.
 106
 107 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * configure: Regenerate.
 110         * configure.ac (mips_extra_objs): Delete.
 111         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 112         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 113
 114 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 115
 116         * configure: Regenerate.
 117         * configure.ac: Delete sim_hw checks for dv-sockser.
 118
 119 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 120
 121         * config.in, configure: Regenerate.
 122         * tconfig.in: Rename file ...
 123         * tconfig.h: ... here.
 124
 125 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 126
 127         * tconfig.in: Delete includes.
 128         [HAVE_DV_SOCKSER]: Delete.
 129
 130 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 131
 132         * Makefile.in (SIM_RUN_OBJS): Delete.
 133
 134 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 135
 136         * configure.ac (AC_CHECK_HEADERS): Delete.
 137         * aclocal.m4, configure: Regenerate.
 138
 139 2014-08-19  Alan Modra  <amodra@gmail.com>
 140
 141         * configure: Regenerate.
 142
 143 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 144
 145         * configure: Regenerate.
 146         * config.in: Regenerate.
 147
 148 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 149
 150         * configure: Regenerate.
 151
 152 2013-09-23  Alan Modra  <amodra@gmail.com>
 153
 154         * configure: Regenerate.
 155
 156 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 157
 158         * aclocal.m4, configure: Regenerate.
 159
 160 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 161
 162         * configure: Rebuild.
 163
 164 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * configure: Regenerate.
 167
 168 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 169
 170         * configure.ac: Address use of dv-sockser.o.
 171         * tconfig.in: Conditionalize use of dv_sockser_install.
 172         * configure: Regenerated.
 173         * config.in: Regenerated.
 174
 175 2012-10-04  Chao-ying Fu  <fu@mips.com>
 176             Steve Ellcey  <sellcey@mips.com>
 177
 178         * mips/mips3264r2.igen (rdhwr): New.
 179
 180 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 181
 182         * configure.ac: Always link against dv-sockser.o.
 183         * configure: Regenerate.
 184
 185 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 186
 187         * config.in, configure: Regenerate.
 188
 189 2012-05-18  Nick Clifton  <nickc@redhat.com>
 190
 191         PR 14072
 192         * interp.c: Include config.h before system header files.
 193
 194 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 195
 196         * aclocal.m4, config.in, configure: Regenerate.
 197
 198 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 199
 200         * aclocal.m4: New file.
 201         * configure: Regenerate.
 202
 203 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 204
 205         * configure: Regenerate after common/acinclude.m4 update.
 206
 207 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 208
 209         * configure.ac: Change include to common/acinclude.m4.
 210
 211 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 212
 213         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 214         call.  Replace common.m4 include with SIM_AC_COMMON.
 215         * configure: Regenerate.
 216
 217 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 218
 219         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 220         $(SIM_EXTRA_DEPS).
 221         (tmp-mach-multi): Exit early when igen fails.
 222
 223 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 224
 225         * interp.c (sim_do_command): Delete.
 226
 227 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 228
 229         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 230         (tx3904sio_fifo_reset): Likewise.
 231         * interp.c (sim_monitor): Likewise.
 232
 233 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 234
 235         * interp.c (sim_write): Add const to buffer arg.
 236
 237 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 238
 239         * interp.c: Don't include sysdep.h
 240
 241 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 242
 243         * configure: Regenerate.
 244
 245 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 246
 247         * config.in: Regenerate.
 248         * configure: Likewise.
 249
 250         * configure: Regenerate.
 251
 252 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 253
 254         * configure: Regenerate to track ../common/common.m4 changes.
 255         * config.in: Ditto.
 256
 257 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 258             Daniel Jacobowitz  <dan@codesourcery.com>
 259             Joseph Myers  <joseph@codesourcery.com>
 260
 261         * configure: Regenerate.
 262
 263 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 264
 265         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 266         that unconditionally allows fmt_ps.
 267         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 268         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 269         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 270         filter from 64,f to 32,f.
 271         (PREFX): Change filter from 64 to 32.
 272         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 273         that use do_load_double instead of do_load.  Make both LUXC1
 274         versions unpredictable if SizeFGR () != 64.
 275         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 276         instead of do_store.  Remove unused variable.  Make both SUXC1
 277         versions unpredictable if SizeFGR () != 64.
 278
 279 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 280
 281         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 282         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 283         shifts for that case.
 284
 285 2007-09-04  Nick Clifton  <nickc@redhat.com>
 286
 287         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 288         (display_mem_info): New static variable.
 289         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 290         (mips_options): Add info-memory and memory-info.
 291         (sim_open): After processing the command line and board
 292         specification, check display_mem_info.  If it is set then
 293         call the real handler for the --memory-info command line
 294         switch.
 295
 296 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 297
 298         * configure.ac: Change license of multi-run.c to GPL version 3.
 299         * configure: Regenerate.
 300
 301 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 302
 303         * configure.ac, configure: Revert last patch.
 304
 305 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 306
 307         * configure.ac (sim_mipsisa3264_configs): New variable.
 308         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 309         every configuration support all four targets, using the triplet to
 310         determine the default.
 311         * configure: Regenerate.
 312
 313 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 314
 315         * Makefile.in (m16run.o): New rule.
 316
 317 2007-05-15  Thiemo Seufer  <ths@mips.com>
 318
 319         * mips3264r2.igen (DSHD): Fix compile warning.
 320
 321 2007-05-14  Thiemo Seufer  <ths@mips.com>
 322
 323         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 324         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 325         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 326         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 327         for mips32r2.
 328
 329 2007-03-01  Thiemo Seufer  <ths@mips.com>
 330
 331         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 332         and mips64.
 333
 334 2007-02-20  Thiemo Seufer  <ths@mips.com>
 335
 336         * dsp.igen: Update copyright notice.
 337         * dsp2.igen: Fix copyright notice.
 338
 339 2007-02-20  Thiemo Seufer  <ths@mips.com>
 340             Chao-Ying Fu  <fu@mips.com>
 341
 342         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 343         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 344         Add dsp2 to sim_igen_machine.
 345         * configure: Regenerate.
 346         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 347         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 348         (mulq_rs.ph): Use do_ph_mulq.
 349         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 350         * mips.igen: Add dsp2 model and include dsp2.igen.
 351         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 352         for *mips32r2, *mips64r2, *dsp.
 353         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 354         for *mips32r2, *mips64r2, *dsp2.
 355         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 356
 357 2007-02-19  Thiemo Seufer  <ths@mips.com>
 358             Nigel Stephens  <nigel@mips.com>
 359
 360         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 361         jumps with hazard barrier.
 362
 363 2007-02-19  Thiemo Seufer  <ths@mips.com>
 364             Nigel Stephens  <nigel@mips.com>
 365
 366         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 367         after each call to sim_io_write.
 368
 369 2007-02-19  Thiemo Seufer  <ths@mips.com>
 370             Nigel Stephens  <nigel@mips.com>
 371
 372         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 373         supported by this simulator.
 374         (decode_coproc): Recognise additional CP0 Config registers
 375         correctly.
 376
 377 2007-02-19  Thiemo Seufer  <ths@mips.com>
 378             Nigel Stephens  <nigel@mips.com>
 379             David Ung  <davidu@mips.com>
 380
 381         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 382         uninterpreted formats. If fmt is one of the uninterpreted types
 383         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 384         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 385         (store_fpr): When writing an invalid odd register, set the
 386         matching even register to fmt_unknown, not the following register.
 387         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 388         the the memory window at offset 0 set by --memory-size command
 389         line option.
 390         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 391         point register.
 392         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 393         register.
 394         (sim_monitor): When returning the memory size to the MIPS
 395         application, use the value in STATE_MEM_SIZE, not an arbitrary
 396         hardcoded value.
 397         (cop_lw): Don' mess around with FPR_STATE, just pass
 398         fmt_uninterpreted_32 to StoreFPR.
 399         (cop_sw): Similarly.
 400         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 401         (cop_sd): Similarly.
 402         * mips.igen (not_word_value): Single version for mips32, mips64
 403         and mips16.
 404
 405 2007-02-19  Thiemo Seufer <ths@mips.com>
 406             Nigel Stephens  <nigel@mips.com>
 407
 408         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 409         MBytes.
 410
 411 2007-02-17  Thiemo Seufer  <ths@mips.com>
 412
 413         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 414         configuration.
 415         * configure: Regenerate.
 416
 417 2007-02-17  Thiemo Seufer  <ths@mips.com>
 418
 419         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 420         Add mdmx to sim_igen_machine.
 421         (mipsisa64*-*-*): Likewise. Remove dsp.
 422         (mipsisa32*-*-*): Remove dsp.
 423         * configure: Regenerate.
 424
 425 2007-02-13  Thiemo Seufer  <ths@mips.com>
 426
 427         * configure.ac: Add mips*-sde-elf* target.
 428         * configure: Regenerate.
 429
 430 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 431
 432         * acconfig.h: Remove.
 433         * config.in, configure: Regenerate.
 434
 435 2006-11-07  Thiemo Seufer  <ths@mips.com>
 436
 437         * dsp.igen (do_w_op): Fix compiler warning.
 438
 439 2006-08-29  Thiemo Seufer  <ths@mips.com>
 440             David Ung  <davidu@mips.com>
 441
 442         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 443         sim_igen_machine.
 444         * configure: Regenerate.
 445         * mips.igen (model): Add smartmips.
 446         (MADDU): Increment ACX if carry.
 447         (do_mult): Clear ACX.
 448         (ROR,RORV): Add smartmips.
 449         (include): Include smartmips.igen.
 450         * sim-main.h (ACX): Set to REGISTERS[89].
 451         * smartmips.igen: New file.
 452
 453 2006-08-29  Thiemo Seufer  <ths@mips.com>
 454             David Ung  <davidu@mips.com>
 455
 456         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 457         mips3264r2.igen. Add missing dependency rules.
 458         * m16e.igen: Support for mips16e save/restore instructions.
 459
 460 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 461
 462         * configure: Regenerated.
 463
 464 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 465
 466         * configure: Regenerated.
 467
 468 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 469
 470         * configure: Regenerated.
 471
 472 2006-05-15 Chao-ying Fu  <fu@mips.com>
 473
 474         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 475
 476 2006-04-18  Nick Clifton  <nickc@redhat.com>
 477
 478         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 479         statement.
 480
 481 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 482
 483         * configure: Regenerate.
 484
 485 2005-12-14  Chao-ying Fu  <fu@mips.com>
 486
 487         * Makefile.in (SIM_OBJS): Add dsp.o.
 488         (dsp.o): New dependency.
 489         (IGEN_INCLUDE): Add dsp.igen.
 490         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 491         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 492         * configure: Regenerate.
 493         * mips.igen: Add dsp model and include dsp.igen.
 494         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 495         because these instructions are extended in DSP ASE.
 496         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 497         adding 6 DSP accumulator registers and 1 DSP control register.
 498         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 499         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 500         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 501         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 502         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 503         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 504         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 505         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 506         DSPCR_CCOND_SMASK): New define.
 507         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 508         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 509
 510 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 511
 512         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 513
 514 2005-06-16  David Ung  <davidu@mips.com>
 515             Nigel Stephens  <nigel@mips.com>
 516
 517         * mips.igen: New mips16e model and include m16e.igen.
 518         (check_u64): Add mips16e tag.
 519         * m16e.igen: New file for MIPS16e instructions.
 520         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 521         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 522         models.
 523         * configure: Regenerate.
 524
 525 2005-05-26  David Ung  <davidu@mips.com>
 526
 527         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 528         tags to all instructions which are applicable to the new ISAs.
 529         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 530         vr.igen.
 531         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 532         instructions.
 533         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 534         to mips.igen.
 535         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 536         * configure: Regenerate.
 537
 538 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 539
 540         * configure: Regenerate.
 541
 542 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 543
 544         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 545         explicit call to AC_CONFIG_HEADER.
 546         * configure: Regenerate.
 547
 548 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 549
 550         * configure.ac: Update to use ../common/common.m4.
 551         * configure: Re-generate.
 552
 553 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 554
 555         * configure: Regenerated to track ../common/aclocal.m4 changes.
 556
 557 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 558
 559         * configure.ac: Rename configure.in, require autoconf 2.59.
 560         * configure: Re-generate.
 561
 562 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 563
 564         * configure: Regenerate for ../common/aclocal.m4 update.
 565
 566 2004-09-24  Monika Chaddha  <monika@acmet.com>
 567
 568         Committed by Andrew Cagney.
 569         * m16.igen (CMP, CMPI): Fix assembler.
 570
 571 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 572
 573         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 574         * configure: Regenerate.
 575
 576 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 577
 578         * configure.in (sim_m16_machine): Include mipsIII.
 579         * configure: Regenerate.
 580
 581 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 582
 583         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 584         from COP0_BADVADDR.
 585         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 586
 587 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 588
 589         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 590
 591 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 592
 593         * mips.igen (check_fmt): Remove.
 594         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 595         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 596         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 597         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 598         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 599         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 600         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 601         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 602         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 603         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 604
 605 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 606
 607         * sb1.igen (check_sbx): New function.
 608         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 609
 610 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 611             Richard Sandiford  <rsandifo@redhat.com>
 612
 613         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 614         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 615         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 616         separate implementations for mipsIV and mipsV.  Use new macros to
 617         determine whether the restrictions apply.
 618
 619 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 620
 621         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 622         (check_mult_hilo): Improve comments.
 623         (check_div_hilo): Likewise.  Also, fork off a new version
 624         to handle mips32/mips64 (since there are no hazards to check
 625         in MIPS32/MIPS64).
 626
 627 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 628
 629         * mips.igen (do_dmultx): Fix check for negative operands.
 630
 631 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 632
 633         * Makefile.in (SHELL): Make sure this is defined.
 634         (various): Use $(SHELL) whenever we invoke move-if-change.
 635
 636 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 637
 638         * cp1.c: Tweak attribution slightly.
 639         * cp1.h: Likewise.
 640         * mdmx.c: Likewise.
 641         * mdmx.igen: Likewise.
 642         * mips3d.igen: Likewise.
 643         * sb1.igen: Likewise.
 644
 645 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 646
 647         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 648         unsigned operands.
 649
 650 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 651
 652         * interp.c (sim_open): Rename _bfd to bfd.
 653         (sim_create_inferior): Ditto.
 654
 655 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 656
 657         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 658
 659 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 660
 661         * mips.igen (EI, DI): Remove.
 662
 663 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 664
 665         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 666
 667 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 668             Andrew Cagney  <ac131313@redhat.com>
 669             Gavin Romig-Koch  <gavin@redhat.com>
 670             Graydon Hoare  <graydon@redhat.com>
 671             Aldy Hernandez  <aldyh@redhat.com>
 672             Dave Brolley  <brolley@redhat.com>
 673             Chris Demetriou  <cgd@broadcom.com>
 674
 675         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 676         (sim_mach_default): New variable.
 677         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 678         Add a new simulator generator, MULTI.
 679         * configure: Regenerate.
 680         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 681         (multi-run.o): New dependency.
 682         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 683         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 684         (tmp-multi): Combine them.
 685         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 686         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 687         (distclean-extra): New rule.
 688         * sim-main.h: Include bfd.h.
 689         (MIPS_MACH): New macro.
 690         * mips.igen (vr4120, vr5400, vr5500): New models.
 691         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 692         * vr.igen: Replace with new version.
 693
 694 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 695
 696         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 697         * configure: Regenerate.
 698
 699 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 700
 701         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 702         * mips.igen: Remove all invocations of check_branch_bug and
 703         mark_branch_bug.
 704
 705 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 706
 707         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 708
 709 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 710
 711         * mips.igen (do_load_double, do_store_double): New functions.
 712         (LDC1, SDC1): Rename to...
 713         (LDC1b, SDC1b): respectively.
 714         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 715
 716 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 717
 718         * cp1.c (fp_recip2): Modify initialization expression so that
 719         GCC will recognize it as constant.
 720
 721 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 722
 723         * mdmx.c (SD_): Delete.
 724         (Unpredictable): Re-define, for now, to directly invoke
 725         unpredictable_action().
 726         (mdmx_acc_op): Fix error in .ob immediate handling.
 727
 728 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 729
 730         * interp.c (sim_firmware_command): Initialize `address'.
 731
 732 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 733
 734         * configure: Regenerated to track ../common/aclocal.m4 changes.
 735
 736 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 737             Ed Satterthwaite  <ehs@broadcom.com>
 738
 739         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 740         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 741         * mips.igen: Include mips3d.igen.
 742         (mips3d): New model name for MIPS-3D ASE instructions.
 743         (CVT.W.fmt): Don't use this instruction for word (source) format
 744         instructions.
 745         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 746         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 747         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 748         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 749         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 750         (RSquareRoot1, RSquareRoot2): New macros.
 751         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 752         (fp_rsqrt2): New functions.
 753         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 754         * configure: Regenerate.
 755
 756 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 757             Ed Satterthwaite  <ehs@broadcom.com>
 758
 759         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 760         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 761         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 762         (convert): Note that this function is not used for paired-single
 763         format conversions.
 764         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 765         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 766         (check_fmt_p): Enable paired-single support.
 767         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 768         (PUU.PS): New instructions.
 769         (CVT.S.fmt): Don't use this instruction for paired-single format
 770         destinations.
 771         * sim-main.h (FP_formats): New value 'fmt_ps.'
 772         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 773         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 774
 775 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 776
 777         * mips.igen: Fix formatting of function calls in
 778         many FP operations.
 779
 780 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 781
 782         * mips.igen (MOVN, MOVZ): Trace result.
 783         (TNEI): Print "tnei" as the opcode name in traces.
 784         (CEIL.W): Add disassembly string for traces.
 785         (RSQRT.fmt): Make location of disassembly string consistent
 786         with other instructions.
 787
 788 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 789
 790         * mips.igen (X): Delete unused function.
 791
 792 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 793
 794         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 795
 796 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 797             Ed Satterthwaite  <ehs@broadcom.com>
 798
 799         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 800         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 801         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 802         (fp_nmsub): New prototypes.
 803         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 804         (NegMultiplySub): New defines.
 805         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 806         (MADD.D, MADD.S): Replace with...
 807         (MADD.fmt): New instruction.
 808         (MSUB.D, MSUB.S): Replace with...
 809         (MSUB.fmt): New instruction.
 810         (NMADD.D, NMADD.S): Replace with...
 811         (NMADD.fmt): New instruction.
 812         (NMSUB.D, MSUB.S): Replace with...
 813         (NMSUB.fmt): New instruction.
 814
 815 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 816             Ed Satterthwaite  <ehs@broadcom.com>
 817
 818         * cp1.c: Fix more comment spelling and formatting.
 819         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 820         (denorm_mode): New function.
 821         (fpu_unary, fpu_binary): Round results after operation, collect
 822         status from rounding operations, and update the FCSR.
 823         (convert): Collect status from integer conversions and rounding
 824         operations, and update the FCSR.  Adjust NaN values that result
 825         from conversions.  Convert to use sim_io_eprintf rather than
 826         fprintf, and remove some debugging code.
 827         * cp1.h (fenr_FS): New define.
 828
 829 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 830
 831         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 832         rounding mode to sim FP rounding mode flag conversion code into...
 833         (rounding_mode): New function.
 834
 835 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 836
 837         * cp1.c: Clean up formatting of a few comments.
 838         (value_fpr): Reformat switch statement.
 839
 840 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 841             Ed Satterthwaite  <ehs@broadcom.com>
 842
 843         * cp1.h: New file.
 844         * sim-main.h: Include cp1.h.
 845         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 846         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 847         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 848         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 849         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 850         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 851         * cp1.c: Don't include sim-fpu.h; already included by
 852         sim-main.h.  Clean up formatting of some comments.
 853         (NaN, Equal, Less): Remove.
 854         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 855         (fp_cmp): New functions.
 856         * mips.igen (do_c_cond_fmt): Remove.
 857         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 858         Compare.  Add result tracing.
 859         (CxC1): Remove, replace with...
 860         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 861         (DMxC1): Remove, replace with...
 862         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 863         (MxC1): Remove, replace with...
 864         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 865
 866 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 867
 868         * sim-main.h (FGRIDX): Remove, replace all uses with...
 869         (FGR_BASE): New macro.
 870         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 871         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 872         (NR_FGR, FGR): Likewise.
 873         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 874         * mips.igen: Likewise.
 875
 876 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 877
 878         * cp1.c: Add an FSF Copyright notice to this file.
 879
 880 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 881             Ed Satterthwaite  <ehs@broadcom.com>
 882
 883         * cp1.c (Infinity): Remove.
 884         * sim-main.h (Infinity): Likewise.
 885
 886         * cp1.c (fp_unary, fp_binary): New functions.
 887         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 888         (fp_sqrt): New functions, implemented in terms of the above.
 889         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 890         (Recip, SquareRoot): Remove (replaced by functions above).
 891         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 892         (fp_recip, fp_sqrt): New prototypes.
 893         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 894         (Recip, SquareRoot): Replace prototypes with #defines which
 895         invoke the functions above.
 896
 897 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 898
 899         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 900         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 901         file, remove PARAMS from prototypes.
 902         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 903         simulator state arguments.
 904         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 905         pass simulator state arguments.
 906         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 907         (store_fpr, convert): Remove 'sd' argument.
 908         (value_fpr): Likewise.  Convert to use 'SD' instead.
 909
 910 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 911
 912         * cp1.c (Min, Max): Remove #if 0'd functions.
 913         * sim-main.h (Min, Max): Remove.
 914
 915 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 916
 917         * cp1.c: fix formatting of switch case and default labels.
 918         * interp.c: Likewise.
 919         * sim-main.c: Likewise.
 920
 921 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 922
 923         * cp1.c: Clean up comments which describe FP formats.
 924          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 925
 926 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 927             Ed Satterthwaite  <ehs@broadcom.com>
 928
 929         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 930         Broadcom SiByte SB-1 processor configurations.
 931         * configure: Regenerate.
 932         * sb1.igen: New file.
 933         * mips.igen: Include sb1.igen.
 934         (sb1): New model.
 935         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 936         * mdmx.igen: Add "sb1" model to all appropriate functions and
 937         instructions.
 938         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 939         (ob_func, ob_acc): Reference the above.
 940         (qh_acc): Adjust to keep the same size as ob_acc.
 941         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 942         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 943
 944 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 945
 946         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 947
 948 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 949             Ed Satterthwaite  <ehs@broadcom.com>
 950
 951         * mips.igen (mdmx): New (pseudo-)model.
 952         * mdmx.c, mdmx.igen: New files.
 953         * Makefile.in (SIM_OBJS): Add mdmx.o.
 954         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 955         New typedefs.
 956         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 957         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 958         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 959         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 960         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 961         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 962         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 963         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 964         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 965         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 966         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 967         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 968         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 969         (qh_fmtsel): New macros.
 970         (_sim_cpu): New member "acc".
 971         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 972         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 973
 974 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 975
 976         * interp.c: Use 'deprecated' rather than 'depreciated.'
 977         * sim-main.h: Likewise.
 978
 979 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 980
 981         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 982         which wouldn't compile anyway.
 983         * sim-main.h (unpredictable_action): New function prototype.
 984         (Unpredictable): Define to call igen function unpredictable().
 985         (NotWordValue): New macro to call igen function not_word_value().
 986         (UndefinedResult): Remove.
 987         * interp.c (undefined_result): Remove.
 988         (unpredictable_action): New function.
 989         * mips.igen (not_word_value, unpredictable): New functions.
 990         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 991         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 992         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 993         NotWordValue() to check for unpredictable inputs, then
 994         Unpredictable() to handle them.
 995
 996 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 997
 998         * mips.igen: Fix formatting of calls to Unpredictable().
 999
1000 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1001
1002         * interp.c (sim_open): Revert previous change.
1003
1004 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1005
1006         * interp.c (sim_open): Disable chunk of code that wrote code in
1007         vector table entries.
1008
1009 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1010
1011         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1012         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1013         unused definitions.
1014
1015 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1016
1017         * cp1.c: Fix many formatting issues.
1018
1019 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1020
1021         * cp1.c (fpu_format_name): New function to replace...
1022         (DOFMT): This.  Delete, and update all callers.
1023         (fpu_rounding_mode_name): New function to replace...
1024         (RMMODE): This.  Delete, and update all callers.
1025
1026 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1027
1028         * interp.c: Move FPU support routines from here to...
1029         * cp1.c: Here.  New file.
1030         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1031         (cp1.o): New target.
1032
1033 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1034
1035         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1036         * mips.igen (mips32, mips64): New models, add to all instructions
1037         and functions as appropriate.
1038         (loadstore_ea, check_u64): New variant for model mips64.
1039         (check_fmt_p): New variant for models mipsV and mips64, remove
1040         mipsV model marking fro other variant.
1041         (SLL) Rename to...
1042         (SLLa) this.
1043         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1044         for mips32 and mips64.
1045         (DCLO, DCLZ): New instructions for mips64.
1046
1047 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1048
1049         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1050         immediate or code as a hex value with the "%#lx" format.
1051         (ANDI): Likewise, and fix printed instruction name.
1052
1053 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1054
1055         * sim-main.h (UndefinedResult, Unpredictable): New macros
1056         which currently do nothing.
1057
1058 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1059
1060         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1061         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1062         (status_CU3): New definitions.
1063
1064         * sim-main.h (ExceptionCause): Add new values for MIPS32
1065         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1066         for DebugBreakPoint and NMIReset to note their status in
1067         MIPS32 and MIPS64.
1068         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1069         (SignalExceptionCacheErr): New exception macros.
1070
1071 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1072
1073         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1074         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1075         is always enabled.
1076         (SignalExceptionCoProcessorUnusable): Take as argument the
1077         unusable coprocessor number.
1078
1079 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1080
1081         * mips.igen: Fix formatting of all SignalException calls.
1082
1083 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1084
1085         * sim-main.h (SIGNEXTEND): Remove.
1086
1087 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1088
1089         * mips.igen: Remove gencode comment from top of file, fix
1090         spelling in another comment.
1091
1092 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1093
1094         * mips.igen (check_fmt, check_fmt_p): New functions to check
1095         whether specific floating point formats are usable.
1096         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1097         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1098         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1099         Use the new functions.
1100         (do_c_cond_fmt): Remove format checks...
1101         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1102
1103 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1104
1105         * mips.igen: Fix formatting of check_fpu calls.
1106
1107 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1108
1109         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1110
1111 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1112
1113         * mips.igen: Remove whitespace at end of lines.
1114
1115 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1116
1117         * mips.igen (loadstore_ea): New function to do effective
1118         address calculations.
1119         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1120         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1121         CACHE): Use loadstore_ea to do effective address computations.
1122
1123 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1124
1125         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1126         * mips.igen (LL, CxC1, MxC1): Likewise.
1127
1128 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1129
1130         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1131         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1132         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1133         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1134         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1135         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1136         Don't split opcode fields by hand, use the opcode field values
1137         provided by igen.
1138
1139 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1140
1141         * mips.igen (do_divu): Fix spacing.
1142
1143         * mips.igen (do_dsllv): Move to be right before DSLLV,
1144         to match the rest of the do_<shift> functions.
1145
1146 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1147
1148         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1149         DSRL32, do_dsrlv): Trace inputs and results.
1150
1151 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1152
1153         * mips.igen (CACHE): Provide instruction-printing string.
1154
1155         * interp.c (signal_exception): Comment tokens after #endif.
1156
1157 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1158
1159         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1160         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1161         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1162         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1163         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1164         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1165         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1166         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1167
1168 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1169
1170         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1171         instruction-printing string.
1172         (LWU): Use '64' as the filter flag.
1173
1174 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1175
1176         * mips.igen (SDXC1): Fix instruction-printing string.
1177
1178 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1179
1180         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1181         filter flags "32,f".
1182
1183 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1184
1185         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1186         as the filter flag.
1187
1188 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1189
1190         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1191         add a comma) so that it more closely match the MIPS ISA
1192         documentation opcode partitioning.
1193         (PREF): Put useful names on opcode fields, and include
1194         instruction-printing string.
1195
1196 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1197
1198         * mips.igen (check_u64): New function which in the future will
1199         check whether 64-bit instructions are usable and signal an
1200         exception if not.  Currently a no-op.
1201         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1202         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1203         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1204         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1205
1206         * mips.igen (check_fpu): New function which in the future will
1207         check whether FPU instructions are usable and signal an exception
1208         if not.  Currently a no-op.
1209         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1210         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1211         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1212         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1213         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1214         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1215         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1216         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1217
1218 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1219
1220         * mips.igen (do_load_left, do_load_right): Move to be immediately
1221         following do_load.
1222         (do_store_left, do_store_right): Move to be immediately following
1223         do_store.
1224
1225 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1226
1227         * mips.igen (mipsV): New model name.  Also, add it to
1228         all instructions and functions where it is appropriate.
1229
1230 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1231
1232         * mips.igen: For all functions and instructions, list model
1233         names that support that instruction one per line.
1234
1235 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1236
1237         * mips.igen: Add some additional comments about supported
1238         models, and about which instructions go where.
1239         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1240         order as is used in the rest of the file.
1241
1242 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1243
1244         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1245         indicating that ALU32_END or ALU64_END are there to check
1246         for overflow.
1247         (DADD): Likewise, but also remove previous comment about
1248         overflow checking.
1249
1250 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1251
1252         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1253         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1254         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1255         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1256         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1257         fields (i.e., add and move commas) so that they more closely
1258         match the MIPS ISA documentation opcode partitioning.
1259
1260 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1261
1262         * mips.igen (ADDI): Print immediate value.
1263         (BREAK): Print code.
1264         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1265         (SLL): Print "nop" specially, and don't run the code
1266         that does the shift for the "nop" case.
1267
1268 2001-11-17  Fred Fish  <fnf@redhat.com>
1269
1270         * sim-main.h (float_operation): Move enum declaration outside
1271         of _sim_cpu struct declaration.
1272
1273 2001-04-12  Jim Blandy  <jimb@redhat.com>
1274
1275         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1276         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1277         set of the FCSR.
1278         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1279         PENDING_FILL, and you can get the intended effect gracefully by
1280         calling PENDING_SCHED directly.
1281
1282 2001-02-23  Ben Elliston  <bje@redhat.com>
1283
1284         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1285         already defined elsewhere.
1286
1287 2001-02-19  Ben Elliston  <bje@redhat.com>
1288
1289         * sim-main.h (sim_monitor): Return an int.
1290         * interp.c (sim_monitor): Add return values.
1291         (signal_exception): Handle error conditions from sim_monitor.
1292
1293 2001-02-08  Ben Elliston  <bje@redhat.com>
1294
1295         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1296         (store_memory): Likewise, pass cia to sim_core_write*.
1297
1298 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1299
1300         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1301         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1302
1303 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1304
1305         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1306         * Makefile.in: Don't delete *.igen when cleaning directory.
1307
1308 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1309
1310         * m16.igen (break): Call SignalException not sim_engine_halt.
1311
1312 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1313
1314         From Jason Eckhardt:
1315         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1316
1317 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1318
1319         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1320
1321 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1322
1323         * mips.igen (do_dmultx): Fix typo.
1324
1325 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1326
1327         * configure: Regenerated to track ../common/aclocal.m4 changes.
1328
1329 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1330
1331         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1332
1333 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1334
1335         * sim-main.h (GPR_CLEAR): Define macro.
1336
1337 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1338
1339         * interp.c (decode_coproc): Output long using %lx and not %s.
1340
1341 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1342
1343         * interp.c (sim_open): Sort & extend dummy memory regions for
1344         --board=jmr3904 for eCos.
1345
1346 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1347
1348         * configure: Regenerated.
1349
1350 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1351
1352         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1353         calls, conditional on the simulator being in verbose mode.
1354
1355 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1356
1357         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1358         cache don't get ReservedInstruction traps.
1359
1360 1999-11-29  Mark Salter  <msalter@cygnus.com>
1361
1362         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1363         to clear status bits in sdisr register. This is how the hardware works.
1364
1365         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1366         being used by cygmon.
1367
1368 1999-11-11  Andrew Haley  <aph@cygnus.com>
1369
1370         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1371         instructions.
1372
1373 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1374
1375         * mips.igen (MULT): Correct previous mis-applied patch.
1376
1377 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1378
1379         * mips.igen (delayslot32): Handle sequence like
1380         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1381         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1382         (MULT): Actually pass the third register...
1383
1384 1999-09-03  Mark Salter  <msalter@cygnus.com>
1385
1386         * interp.c (sim_open): Added more memory aliases for additional
1387         hardware being touched by cygmon on jmr3904 board.
1388
1389 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1390
1391         * configure: Regenerated to track ../common/aclocal.m4 changes.
1392
1393 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1394
1395         * interp.c (sim_store_register): Handle case where client - GDB -
1396         specifies that a 4 byte register is 8 bytes in size.
1397         (sim_fetch_register): Ditto.
1398
1399 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1400
1401         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1402         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1403         (idt_monitor_base): Base address for IDT monitor traps.
1404         (pmon_monitor_base): Ditto for PMON.
1405         (lsipmon_monitor_base): Ditto for LSI PMON.
1406         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1407         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1408         (sim_firmware_command): New function.
1409         (mips_option_handler): Call it for OPTION_FIRMWARE.
1410         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1411         option was given, add no monitor by default.  Add BREAK hooks only if
1412         monitors are also there.
1413
1414 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1415
1416         * interp.c (sim_monitor): Flush output before reading input.
1417
1418 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1419
1420         * tconfig.in (SIM_HANDLES_LMA): Always define.
1421
1422 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1423
1424         From Mark Salter <msalter@cygnus.com>:
1425         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1426         (sim_open): Add setup for BSP board.
1427
1428 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1429
1430         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1431         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1432         them as unimplemented.
1433
1434 1999-05-08  Felix Lee  <flee@cygnus.com>
1435
1436         * configure: Regenerated to track ../common/aclocal.m4 changes.
1437
1438 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1439
1440         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1441
1442 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1443
1444         * configure.in: Any mips64vr5*-*-* target should have
1445         -DTARGET_ENABLE_FR=1.
1446         (default_endian): Any mips64vr*el-*-* target should default to
1447         LITTLE_ENDIAN.
1448         * configure: Re-generate.
1449
1450 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1451
1452         * mips.igen (ldl): Extend from _16_, not 32.
1453
1454 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1455
1456         * interp.c (sim_store_register): Force registers written to by GDB
1457         into an un-interpreted state.
1458
1459 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1460
1461         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1462         CPU, start periodic background I/O polls.
1463         (tx3904sio_poll): New function: periodic I/O poller.
1464
1465 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1466
1467         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1468
1469 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1470
1471         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1472         case statement.
1473
1474 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1475
1476         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1477         (load_word): Call SIM_CORE_SIGNAL hook on error.
1478         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1479         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1480         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1481         * sim-main.h (COP0_BADVADDR): Define.
1482         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1483         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1484         (_sim_cpu): Add exc_* fields to store register value snapshots.
1485         * mips.igen (*): Replace memory-related SignalException* calls
1486         with references to SIM_CORE_SIGNAL hook.
1487
1488         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1489         fix.
1490         * sim-main.c (*): Minor warning cleanups.
1491
1492 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1493
1494         * m16.igen (DADDIU5): Correct type-o.
1495
1496 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1497
1498         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1499         variables.
1500
1501 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1502
1503         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1504         to include path.
1505         (interp.o): Add dependency on itable.h
1506         (oengine.c, gencode): Delete remaining references.
1507         (BUILT_SRC_FROM_GEN): Clean up.
1508
1509 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1510
1511         * vr4run.c: New.
1512         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1513         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1514         tmp-run-hack) : New.
1515         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1516         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1517         Drop the "64" qualifier to get the HACK generator working.
1518         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1519         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1520         qualifier to get the hack generator working.
1521         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1522         (DSLL): Use do_dsll.
1523         (DSLLV): Use do_dsllv.
1524         (DSRA): Use do_dsra.
1525         (DSRL): Use do_dsrl.
1526         (DSRLV): Use do_dsrlv.
1527         (BC1): Move *vr4100 to get the HACK generator working.
1528         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1529         get the HACK generator working.
1530         (MACC) Rename to get the HACK generator working.
1531         (DMACC,MACCS,DMACCS): Add the 64.
1532
1533 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1534
1535         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1536         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1537
1538 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1539
1540     * mips/interp.c (DEBUG): Cleanups.
1541
1542 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1543
1544         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1545         (tx3904sio_tickle): fflush after a stdout character output.
1546
1547 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1548
1549         * interp.c (sim_close): Uninstall modules.
1550
1551 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1552
1553         * sim-main.h, interp.c (sim_monitor): Change to global
1554         function.
1555
1556 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1557
1558         * configure.in (vr4100): Only include vr4100 instructions in
1559         simulator.
1560         * configure: Re-generate.
1561         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1562
1563 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1564
1565         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1566         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1567         true alternative.
1568
1569         * configure.in (sim_default_gen, sim_use_gen): Replace with
1570         sim_gen.
1571         (--enable-sim-igen): Delete config option. Always using IGEN.
1572         * configure: Re-generate.
1573
1574         * Makefile.in (gencode): Kill, kill, kill.
1575         * gencode.c: Ditto.
1576
1577 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1578
1579         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1580         bit mips16 igen simulator.
1581         * configure: Re-generate.
1582
1583         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1584         as part of vr4100 ISA.
1585         * vr.igen: Mark all instructions as 64 bit only.
1586
1587 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1588
1589         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1590         Pacify GCC.
1591
1592 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1593
1594         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1595         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1596         * configure: Re-generate.
1597
1598         * m16.igen (BREAK): Define breakpoint instruction.
1599         (JALX32): Mark instruction as mips16 and not r3900.
1600         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1601
1602         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1603
1604 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1605
1606         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1607         insn as a debug breakpoint.
1608
1609         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1610         pending.slot_size.
1611         (PENDING_SCHED): Clean up trace statement.
1612         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1613         (PENDING_FILL): Delay write by only one cycle.
1614         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1615
1616         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1617         of pending writes.
1618         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1619         32 & 64.
1620         (pending_tick): Move incrementing of index to FOR statement.
1621         (pending_tick): Only update PENDING_OUT after a write has occured.
1622
1623         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1624         build simulator.
1625         * configure: Re-generate.
1626
1627         * interp.c (sim_engine_run OLD): Delete explicit call to
1628         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1629
1630 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1631
1632         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1633         interrupt level number to match changed SignalExceptionInterrupt
1634         macro.
1635
1636 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1637
1638         * interp.c: #include "itable.h" if WITH_IGEN.
1639         (get_insn_name): New function.
1640         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1641         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1642
1643 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1644
1645         * configure: Rebuilt to inhale new common/aclocal.m4.
1646
1647 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1648
1649         * dv-tx3904sio.c: Include sim-assert.h.
1650
1651 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1652
1653         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1654         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1655         Reorganize target-specific sim-hardware checks.
1656         * configure: rebuilt.
1657         * interp.c (sim_open): For tx39 target boards, set
1658         OPERATING_ENVIRONMENT, add tx3904sio devices.
1659         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1660         ROM executables.  Install dv-sockser into sim-modules list.
1661
1662         * dv-tx3904irc.c: Compiler warning clean-up.
1663         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1664         frequent hw-trace messages.
1665
1666 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1667
1668         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1669
1670 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1671
1672         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1673
1674         * vr.igen: New file.
1675         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1676         * mips.igen: Define vr4100 model. Include vr.igen.
1677 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1678
1679         * mips.igen (check_mf_hilo): Correct check.
1680
1681 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1682
1683         * sim-main.h (interrupt_event): Add prototype.
1684
1685         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1686         register_ptr, register_value.
1687         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1688
1689         * sim-main.h (tracefh): Make extern.
1690
1691 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1692
1693         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1694         Reduce unnecessarily high timer event frequency.
1695         * dv-tx3904cpu.c: Ditto for interrupt event.
1696
1697 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1698
1699         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1700         to allay warnings.
1701         (interrupt_event): Made non-static.
1702
1703         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1704         interchange of configuration values for external vs. internal
1705         clock dividers.
1706
1707 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1708
1709         * mips.igen (BREAK): Moved code to here for
1710         simulator-reserved break instructions.
1711         * gencode.c (build_instruction): Ditto.
1712         * interp.c (signal_exception): Code moved from here.  Non-
1713         reserved instructions now use exception vector, rather
1714         than halting sim.
1715         * sim-main.h: Moved magic constants to here.
1716
1717 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1718
1719         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1720         register upon non-zero interrupt event level, clear upon zero
1721         event value.
1722         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1723         by passing zero event value.
1724         (*_io_{read,write}_buffer): Endianness fixes.
1725         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1726         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1727
1728         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1729         serial I/O and timer module at base address 0xFFFF0000.
1730
1731 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1732
1733         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1734         and BigEndianCPU.
1735
1736 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1737
1738         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1739         parts.
1740         * configure: Update.
1741
1742 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1743
1744         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1745         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1746         * configure.in: Include tx3904tmr in hw_device list.
1747         * configure: Rebuilt.
1748         * interp.c (sim_open): Instantiate three timer instances.
1749         Fix address typo of tx3904irc instance.
1750
1751 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1752
1753         * interp.c (signal_exception): SystemCall exception now uses
1754         the exception vector.
1755
1756 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1757
1758         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1759         to allay warnings.
1760
1761 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1762
1763         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1764
1765 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1766
1767         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1768
1769         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1770         sim-main.h. Declare a struct hw_descriptor instead of struct
1771         hw_device_descriptor.
1772
1773 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1774
1775         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1776         right bits and then re-align left hand bytes to correct byte
1777         lanes.  Fix incorrect computation in do_store_left when loading
1778         bytes from second word.
1779
1780 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1781
1782         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1783         * interp.c (sim_open): Only create a device tree when HW is
1784         enabled.
1785
1786         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1787         * interp.c (signal_exception): Ditto.
1788
1789 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1790
1791         * gencode.c: Mark BEGEZALL as LIKELY.
1792
1793 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1794
1795         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1796         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1797
1798 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1799
1800         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1801         modules.  Recognize TX39 target with "mips*tx39" pattern.
1802         * configure: Rebuilt.
1803         * sim-main.h (*): Added many macros defining bits in
1804         TX39 control registers.
1805         (SignalInterrupt): Send actual PC instead of NULL.
1806         (SignalNMIReset): New exception type.
1807         * interp.c (board): New variable for future use to identify
1808         a particular board being simulated.
1809         (mips_option_handler,mips_options): Added "--board" option.
1810         (interrupt_event): Send actual PC.
1811         (sim_open): Make memory layout conditional on board setting.
1812         (signal_exception): Initial implementation of hardware interrupt
1813         handling.  Accept another break instruction variant for simulator
1814         exit.
1815         (decode_coproc): Implement RFE instruction for TX39.
1816         (mips.igen): Decode RFE instruction as such.
1817         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1818         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1819         bbegin to implement memory map.
1820         * dv-tx3904cpu.c: New file.
1821         * dv-tx3904irc.c: New file.
1822
1823 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1824
1825         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1826
1827 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1828
1829         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1830         with calls to check_div_hilo.
1831
1832 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1833
1834         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1835         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1836         Add special r3900 version of do_mult_hilo.
1837         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1838         with calls to check_mult_hilo.
1839         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1840         with calls to check_div_hilo.
1841
1842 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1843
1844         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1845         Document a replacement.
1846
1847 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1848
1849         * interp.c (sim_monitor): Make mon_printf work.
1850
1851 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1852
1853         * sim-main.h (INSN_NAME): New arg `cpu'.
1854
1855 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1856
1857         * configure: Regenerated to track ../common/aclocal.m4 changes.
1858
1859 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1860
1861         * configure: Regenerated to track ../common/aclocal.m4 changes.
1862         * config.in: Ditto.
1863
1864 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1865
1866         * acconfig.h: New file.
1867         * configure.in: Reverted change of Apr 24; use sinclude again.
1868
1869 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1870
1871         * configure: Regenerated to track ../common/aclocal.m4 changes.
1872         * config.in: Ditto.
1873
1874 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1875
1876         * configure.in: Don't call sinclude.
1877
1878 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1879
1880         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1881
1882 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1883
1884         * mips.igen (ERET): Implement.
1885
1886         * interp.c (decode_coproc): Return sign-extended EPC.
1887
1888         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1889
1890         * interp.c (signal_exception): Do not ignore Trap.
1891         (signal_exception): On TRAP, restart at exception address.
1892         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1893         (signal_exception): Update.
1894         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1895         so that TRAP instructions are caught.
1896
1897 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1898
1899         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1900         contains HI/LO access history.
1901         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1902         (HIACCESS, LOACCESS): Delete, replace with
1903         (HIHISTORY, LOHISTORY): New macros.
1904         (CHECKHILO): Delete all, moved to mips.igen
1905
1906         * gencode.c (build_instruction): Do not generate checks for
1907         correct HI/LO register usage.
1908
1909         * interp.c (old_engine_run): Delete checks for correct HI/LO
1910         register usage.
1911
1912         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1913         check_mf_cycles): New functions.
1914         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1915         do_divu, domultx, do_mult, do_multu): Use.
1916
1917         * tx.igen ("madd", "maddu"): Use.
1918
1919 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1920
1921         * mips.igen (DSRAV): Use function do_dsrav.
1922         (SRAV): Use new function do_srav.
1923
1924         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1925         (B): Sign extend 11 bit immediate.
1926         (EXT-B*): Shift 16 bit immediate left by 1.
1927         (ADDIU*): Don't sign extend immediate value.
1928
1929 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1930
1931         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1932
1933         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1934         functions.
1935
1936         * mips.igen (delayslot32, nullify_next_insn): New functions.
1937         (m16.igen): Always include.
1938         (do_*): Add more tracing.
1939
1940         * m16.igen (delayslot16): Add NIA argument, could be called by a
1941         32 bit MIPS16 instruction.
1942
1943         * interp.c (ifetch16): Move function from here.
1944         * sim-main.c (ifetch16): To here.
1945
1946         * sim-main.c (ifetch16, ifetch32): Update to match current
1947         implementations of LH, LW.
1948         (signal_exception): Don't print out incorrect hex value of illegal
1949         instruction.
1950
1951 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1952
1953         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1954         instruction.
1955
1956         * m16.igen: Implement MIPS16 instructions.
1957
1958         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1959         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1960         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1961         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1962         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1963         bodies of corresponding code from 32 bit insn to these.  Also used
1964         by MIPS16 versions of functions.
1965
1966         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1967         (IMEM16): Drop NR argument from macro.
1968
1969 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1970
1971         * Makefile.in (SIM_OBJS): Add sim-main.o.
1972
1973         * sim-main.h (address_translation, load_memory, store_memory,
1974         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1975         as INLINE_SIM_MAIN.
1976         (pr_addr, pr_uword64): Declare.
1977         (sim-main.c): Include when H_REVEALS_MODULE_P.
1978
1979         * interp.c (address_translation, load_memory, store_memory,
1980         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1981         from here.
1982         * sim-main.c: To here. Fix compilation problems.
1983
1984         * configure.in: Enable inlining.
1985         * configure: Re-config.
1986
1987 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1988
1989         * configure: Regenerated to track ../common/aclocal.m4 changes.
1990
1991 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1992
1993         * mips.igen: Include tx.igen.
1994         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1995         * tx.igen: New file, contains MADD and MADDU.
1996
1997         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1998         the hardwired constant `7'.
1999         (store_memory): Ditto.
2000         (LOADDRMASK): Move definition to sim-main.h.
2001
2002         mips.igen (MTC0): Enable for r3900.
2003         (ADDU): Add trace.
2004
2005         mips.igen (do_load_byte): Delete.
2006         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2007         do_store_right): New functions.
2008         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2009
2010         configure.in: Let the tx39 use igen again.
2011         configure: Update.
2012
2013 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2014
2015         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2016         not an address sized quantity.  Return zero for cache sizes.
2017
2018 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2019
2020         * mips.igen (r3900): r3900 does not support 64 bit integer
2021         operations.
2022
2023 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2024
2025         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2026         than igen one.
2027         * configure : Rebuild.
2028
2029 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2030
2031         * configure: Regenerated to track ../common/aclocal.m4 changes.
2032
2033 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2034
2035         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2036
2037 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2038
2039         * configure: Regenerated to track ../common/aclocal.m4 changes.
2040         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2041
2042 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2043
2044         * configure: Regenerated to track ../common/aclocal.m4 changes.
2045
2046 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * interp.c (Max, Min): Comment out functions. Not yet used.
2049
2050 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2051
2052         * configure: Regenerated to track ../common/aclocal.m4 changes.
2053
2054 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2055
2056         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2057         configurable settings for stand-alone simulator.
2058
2059         * configure.in: Added X11 search, just in case.
2060
2061         * configure: Regenerated.
2062
2063 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2064
2065         * interp.c (sim_write, sim_read, load_memory, store_memory):
2066         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2067
2068 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2069
2070         * sim-main.h (GETFCC): Return an unsigned value.
2071
2072 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2073
2074         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2075         (DADD): Result destination is RD not RT.
2076
2077 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2078
2079         * sim-main.h (HIACCESS, LOACCESS): Always define.
2080
2081         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2082
2083         * interp.c (sim_info): Delete.
2084
2085 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2086
2087         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2088         (mips_option_handler): New argument `cpu'.
2089         (sim_open): Update call to sim_add_option_table.
2090
2091 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2092
2093         * mips.igen (CxC1): Add tracing.
2094
2095 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2096
2097         * sim-main.h (Max, Min): Declare.
2098
2099         * interp.c (Max, Min): New functions.
2100
2101         * mips.igen (BC1): Add tracing.
2102
2103 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2104
2105         * interp.c Added memory map for stack in vr4100
2106
2107 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2108
2109         * interp.c (load_memory): Add missing "break"'s.
2110
2111 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2112
2113         * interp.c (sim_store_register, sim_fetch_register): Pass in
2114         length parameter.  Return -1.
2115
2116 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2117
2118         * interp.c: Added hardware init hook, fixed warnings.
2119
2120 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2121
2122         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2123
2124 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2125
2126         * interp.c (ifetch16): New function.
2127
2128         * sim-main.h (IMEM32): Rename IMEM.
2129         (IMEM16_IMMED): Define.
2130         (IMEM16): Define.
2131         (DELAY_SLOT): Update.
2132
2133         * m16run.c (sim_engine_run): New file.
2134
2135         * m16.igen: All instructions except LB.
2136         (LB): Call do_load_byte.
2137         * mips.igen (do_load_byte): New function.
2138         (LB): Call do_load_byte.
2139
2140         * mips.igen: Move spec for insn bit size and high bit from here.
2141         * Makefile.in (tmp-igen, tmp-m16): To here.
2142
2143         * m16.dc: New file, decode mips16 instructions.
2144
2145         * Makefile.in (SIM_NO_ALL): Define.
2146         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2147
2148 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2149
2150         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2151         point unit to 32 bit registers.
2152         * configure: Re-generate.
2153
2154 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2155
2156         * configure.in (sim_use_gen): Make IGEN the default simulator
2157         generator for generic 32 and 64 bit mips targets.
2158         * configure: Re-generate.
2159
2160 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2161
2162         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2163         bitsize.
2164
2165         * interp.c (sim_fetch_register, sim_store_register): Read/write
2166         FGR from correct location.
2167         (sim_open): Set size of FGR's according to
2168         WITH_TARGET_FLOATING_POINT_BITSIZE.
2169
2170         * sim-main.h (FGR): Store floating point registers in a separate
2171         array.
2172
2173 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2174
2175         * configure: Regenerated to track ../common/aclocal.m4 changes.
2176
2177 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2178
2179         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2180
2181         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2182
2183         * interp.c (pending_tick): New function.  Deliver pending writes.
2184
2185         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2186         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2187         it can handle mixed sized quantites and single bits.
2188
2189 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2190
2191         * interp.c (oengine.h): Do not include when building with IGEN.
2192         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2193         (sim_info): Ditto for PROCESSOR_64BIT.
2194         (sim_monitor): Replace ut_reg with unsigned_word.
2195         (*): Ditto for t_reg.
2196         (LOADDRMASK): Define.
2197         (sim_open): Remove defunct check that host FP is IEEE compliant,
2198         using software to emulate floating point.
2199         (value_fpr, ...): Always compile, was conditional on HASFPU.
2200
2201 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2202
2203         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2204         size.
2205
2206         * interp.c (SD, CPU): Define.
2207         (mips_option_handler): Set flags in each CPU.
2208         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2209         (sim_close): Do not clear STATE, deleted anyway.
2210         (sim_write, sim_read): Assume CPU zero's vm should be used for
2211         data transfers.
2212         (sim_create_inferior): Set the PC for all processors.
2213         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2214         argument.
2215         (mips16_entry): Pass correct nr of args to store_word, load_word.
2216         (ColdReset): Cold reset all cpu's.
2217         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2218         (sim_monitor, load_memory, store_memory, signal_exception): Use
2219         `CPU' instead of STATE_CPU.
2220
2221
2222         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2223         SD or CPU_.
2224
2225         * sim-main.h (signal_exception): Add sim_cpu arg.
2226         (SignalException*): Pass both SD and CPU to signal_exception.
2227         * interp.c (signal_exception): Update.
2228
2229         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2230         Ditto
2231         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2232         address_translation): Ditto
2233         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2234
2235 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2236
2237         * configure: Regenerated to track ../common/aclocal.m4 changes.
2238
2239 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2240
2241         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2242
2243         * mips.igen (model): Map processor names onto BFD name.
2244
2245         * sim-main.h (CPU_CIA): Delete.
2246         (SET_CIA, GET_CIA): Define
2247
2248 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2249
2250         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2251         regiser.
2252
2253         * configure.in (default_endian): Configure a big-endian simulator
2254         by default.
2255         * configure: Re-generate.
2256
2257 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2258
2259         * configure: Regenerated to track ../common/aclocal.m4 changes.
2260
2261 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2262
2263         * interp.c (sim_monitor): Handle Densan monitor outbyte
2264         and inbyte functions.
2265
2266 1997-12-29  Felix Lee  <flee@cygnus.com>
2267
2268         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2269
2270 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2271
2272         * Makefile.in (tmp-igen): Arrange for $zero to always be
2273         reset to zero after every instruction.
2274
2275 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * configure: Regenerated to track ../common/aclocal.m4 changes.
2278         * config.in: Ditto.
2279
2280 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2281
2282         * mips.igen (MSUB): Fix to work like MADD.
2283         * gencode.c (MSUB): Similarly.
2284
2285 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2286
2287         * configure: Regenerated to track ../common/aclocal.m4 changes.
2288
2289 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2290
2291         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2292
2293 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2294
2295         * sim-main.h (sim-fpu.h): Include.
2296
2297         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2298         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2299         using host independant sim_fpu module.
2300
2301 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2302
2303         * interp.c (signal_exception): Report internal errors with SIGABRT
2304         not SIGQUIT.
2305
2306         * sim-main.h (C0_CONFIG): New register.
2307         (signal.h): No longer include.
2308
2309         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2310
2311 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2312
2313         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2314
2315 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2316
2317         * mips.igen: Tag vr5000 instructions.
2318         (ANDI): Was missing mipsIV model, fix assembler syntax.
2319         (do_c_cond_fmt): New function.
2320         (C.cond.fmt): Handle mips I-III which do not support CC field
2321         separatly.
2322         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2323         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2324         in IV3.2 spec.
2325         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2326         vr5000 which saves LO in a GPR separatly.
2327
2328         * configure.in (enable-sim-igen): For vr5000, select vr5000
2329         specific instructions.
2330         * configure: Re-generate.
2331
2332 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2333
2334         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2335
2336         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2337         fmt_uninterpreted_64 bit cases to switch.  Convert to
2338         fmt_formatted,
2339
2340         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2341
2342         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2343         as specified in IV3.2 spec.
2344         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2345
2346 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2347
2348         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2349         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2350         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2351         PENDING_FILL versions of instructions.  Simplify.
2352         (X): New function.
2353         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2354         instructions.
2355         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2356         a signed value.
2357         (MTHI, MFHI): Disable code checking HI-LO.
2358
2359         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2360         global.
2361         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2362
2363 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2364
2365         * gencode.c (build_mips16_operands): Replace IPC with cia.
2366
2367         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2368         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2369         IPC to `cia'.
2370         (UndefinedResult): Replace function with macro/function
2371         combination.
2372         (sim_engine_run): Don't save PC in IPC.
2373
2374         * sim-main.h (IPC): Delete.
2375
2376
2377         * interp.c (signal_exception, store_word, load_word,
2378         address_translation, load_memory, store_memory, cache_op,
2379         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2380         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2381         current instruction address - cia - argument.
2382         (sim_read, sim_write): Call address_translation directly.
2383         (sim_engine_run): Rename variable vaddr to cia.
2384         (signal_exception): Pass cia to sim_monitor
2385
2386         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2387         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2388         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2389
2390         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2391         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2392         SIM_ASSERT.
2393
2394         * interp.c (signal_exception): Pass restart address to
2395         sim_engine_restart.
2396
2397         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2398         idecode.o): Add dependency.
2399
2400         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2401         Delete definitions
2402         (DELAY_SLOT): Update NIA not PC with branch address.
2403         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2404
2405         * mips.igen: Use CIA not PC in branch calculations.
2406         (illegal): Call SignalException.
2407         (BEQ, ADDIU): Fix assembler.
2408
2409 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2410
2411         * m16.igen (JALX): Was missing.
2412
2413         * configure.in (enable-sim-igen): New configuration option.
2414         * configure: Re-generate.
2415
2416         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2417
2418         * interp.c (load_memory, store_memory): Delete parameter RAW.
2419         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2420         bypassing {load,store}_memory.
2421
2422         * sim-main.h (ByteSwapMem): Delete definition.
2423
2424         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2425
2426         * interp.c (sim_do_command, sim_commands): Delete mips specific
2427         commands.  Handled by module sim-options.
2428
2429         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2430         (WITH_MODULO_MEMORY): Define.
2431
2432         * interp.c (sim_info): Delete code printing memory size.
2433
2434         * interp.c (mips_size): Nee sim_size, delete function.
2435         (power2): Delete.
2436         (monitor, monitor_base, monitor_size): Delete global variables.
2437         (sim_open, sim_close): Delete code creating monitor and other
2438         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2439         manage memory regions.
2440         (load_memory, store_memory): Use sim-core for memory model.
2441
2442         * interp.c (address_translation): Delete all memory map code
2443         except line forcing 32 bit addresses.
2444
2445 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2446
2447         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2448         trace options.
2449
2450         * interp.c (logfh, logfile): Delete globals.
2451         (sim_open, sim_close): Delete code opening & closing log file.
2452         (mips_option_handler): Delete -l and -n options.
2453         (OPTION mips_options): Ditto.
2454
2455         * interp.c (OPTION mips_options): Rename option trace to dinero.
2456         (mips_option_handler): Update.
2457
2458 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2459
2460         * interp.c (fetch_str): New function.
2461         (sim_monitor): Rewrite using sim_read & sim_write.
2462         (sim_open): Check magic number.
2463         (sim_open): Write monitor vectors into memory using sim_write.
2464         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2465         (sim_read, sim_write): Simplify - transfer data one byte at a
2466         time.
2467         (load_memory, store_memory): Clarify meaning of parameter RAW.
2468
2469         * sim-main.h (isHOST): Defete definition.
2470         (isTARGET): Mark as depreciated.
2471         (address_translation): Delete parameter HOST.
2472
2473         * interp.c (address_translation): Delete parameter HOST.
2474
2475 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2476
2477         * mips.igen:
2478
2479         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2480         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2481
2482 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2483
2484         * mips.igen: Add model filter field to records.
2485
2486 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2489
2490         interp.c (sim_engine_run): Do not compile function sim_engine_run
2491         when WITH_IGEN == 1.
2492
2493         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2494         target architecture.
2495
2496         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2497         igen. Replace with configuration variables sim_igen_flags /
2498         sim_m16_flags.
2499
2500         * m16.igen: New file.  Copy mips16 insns here.
2501         * mips.igen: From here.
2502
2503 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2504
2505         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2506         to top.
2507         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2508
2509 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2510
2511         * gencode.c (build_instruction): Follow sim_write's lead in using
2512         BigEndianMem instead of !ByteSwapMem.
2513
2514 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2515
2516         * configure.in (sim_gen): Dependent on target, select type of
2517         generator.  Always select old style generator.
2518
2519         configure: Re-generate.
2520
2521         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2522         targets.
2523         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2524         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2525         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2526         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2527         SIM_@sim_gen@_*, set by autoconf.
2528
2529 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2530
2531         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2532
2533         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2534         CURRENT_FLOATING_POINT instead.
2535
2536         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2537         (address_translation): Raise exception InstructionFetch when
2538         translation fails and isINSTRUCTION.
2539
2540         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2541         sim_engine_run): Change type of of vaddr and paddr to
2542         address_word.
2543         (address_translation, prefetch, load_memory, store_memory,
2544         cache_op): Change type of vAddr and pAddr to address_word.
2545
2546         * gencode.c (build_instruction): Change type of vaddr and paddr to
2547         address_word.
2548
2549 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2550
2551         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2552         macro to obtain result of ALU op.
2553
2554 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2555
2556         * interp.c (sim_info): Call profile_print.
2557
2558 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2559
2560         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2561
2562         * sim-main.h (WITH_PROFILE): Do not define, defined in
2563         common/sim-config.h.  Use sim-profile module.
2564         (simPROFILE): Delete defintion.
2565
2566         * interp.c (PROFILE): Delete definition.
2567         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2568         (sim_close): Delete code writing profile histogram.
2569         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2570         Delete.
2571         (sim_engine_run): Delete code profiling the PC.
2572
2573 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2574
2575         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2576
2577         * interp.c (sim_monitor): Make register pointers of type
2578         unsigned_word*.
2579
2580         * sim-main.h: Make registers of type unsigned_word not
2581         signed_word.
2582
2583 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2584
2585         * interp.c (sync_operation): Rename from SyncOperation, make
2586         global, add SD argument.
2587         (prefetch): Rename from Prefetch, make global, add SD argument.
2588         (decode_coproc): Make global.
2589
2590         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2591
2592         * gencode.c (build_instruction): Generate DecodeCoproc not
2593         decode_coproc calls.
2594
2595         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2596         (SizeFGR): Move to sim-main.h
2597         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2598         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2599         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2600         sim-main.h.
2601         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2602         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2603         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2604         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2605         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2606         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2607
2608         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2609         exception.
2610         (sim-alu.h): Include.
2611         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2612         (sim_cia): Typedef to instruction_address.
2613
2614 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2615
2616         * Makefile.in (interp.o): Rename generated file engine.c to
2617         oengine.c.
2618
2619         * interp.c: Update.
2620
2621 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2622
2623         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2624
2625 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2626
2627         * gencode.c (build_instruction): For "FPSQRT", output correct
2628         number of arguments to Recip.
2629
2630 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2631
2632         * Makefile.in (interp.o): Depends on sim-main.h
2633
2634         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2635
2636         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2637         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2638         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2639         STATE, DSSTATE): Define
2640         (GPR, FGRIDX, ..): Define.
2641
2642         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2643         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2644         (GPR, FGRIDX, ...): Delete macros.
2645
2646         * interp.c: Update names to match defines from sim-main.h
2647
2648 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2649
2650         * interp.c (sim_monitor): Add SD argument.
2651         (sim_warning): Delete.  Replace calls with calls to
2652         sim_io_eprintf.
2653         (sim_error): Delete. Replace calls with sim_io_error.
2654         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2655         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2656         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2657         argument.
2658         (mips_size): Rename from sim_size. Add SD argument.
2659
2660         * interp.c (simulator): Delete global variable.
2661         (callback): Delete global variable.
2662         (mips_option_handler, sim_open, sim_write, sim_read,
2663         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2664         sim_size,sim_monitor): Use sim_io_* not callback->*.
2665         (sim_open): ZALLOC simulator struct.
2666         (PROFILE): Do not define.
2667
2668 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2669
2670         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2671         support.h with corresponding code.
2672
2673         * sim-main.h (word64, uword64), support.h: Move definition to
2674         sim-main.h.
2675         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2676
2677         * support.h: Delete
2678         * Makefile.in: Update dependencies
2679         * interp.c: Do not include.
2680
2681 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2682
2683         * interp.c (address_translation, load_memory, store_memory,
2684         cache_op): Rename to from AddressTranslation et.al., make global,
2685         add SD argument
2686
2687         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2688         CacheOp): Define.
2689
2690         * interp.c (SignalException): Rename to signal_exception, make
2691         global.
2692
2693         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2694
2695         * sim-main.h (SignalException, SignalExceptionInterrupt,
2696         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2697         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2698         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2699         Define.
2700
2701         * interp.c, support.h: Use.
2702
2703 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2704
2705         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2706         to value_fpr / store_fpr. Add SD argument.
2707         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2708         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2709
2710         * sim-main.h (ValueFPR, StoreFPR): Define.
2711
2712 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2713
2714         * interp.c (sim_engine_run): Check consistency between configure
2715         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2716         and HASFPU.
2717
2718         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2719         (mips_fpu): Configure WITH_FLOATING_POINT.
2720         (mips_endian): Configure WITH_TARGET_ENDIAN.
2721         * configure: Update.
2722
2723 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2724
2725         * configure: Regenerated to track ../common/aclocal.m4 changes.
2726
2727 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2728
2729         * configure: Regenerated.
2730
2731 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2732
2733         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2734
2735 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2736
2737         * gencode.c (print_igen_insn_models): Assume certain architectures
2738         include all mips* instructions.
2739         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2740         instruction.
2741
2742         * Makefile.in (tmp.igen): Add target. Generate igen input from
2743         gencode file.
2744
2745         * gencode.c (FEATURE_IGEN): Define.
2746         (main): Add --igen option.  Generate output in igen format.
2747         (process_instructions): Format output according to igen option.
2748         (print_igen_insn_format): New function.
2749         (print_igen_insn_models): New function.
2750         (process_instructions): Only issue warnings and ignore
2751         instructions when no FEATURE_IGEN.
2752
2753 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2754
2755         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2756         MIPS targets.
2757
2758 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2759
2760         * configure: Regenerated to track ../common/aclocal.m4 changes.
2761
2762 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2763
2764         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2765         SIM_RESERVED_BITS): Delete, moved to common.
2766         (SIM_EXTRA_CFLAGS): Update.
2767
2768 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2769
2770         * configure.in: Configure non-strict memory alignment.
2771         * configure: Regenerated to track ../common/aclocal.m4 changes.
2772
2773 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2774
2775         * configure: Regenerated to track ../common/aclocal.m4 changes.
2776
2777 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2778
2779         * gencode.c (SDBBP,DERET): Added (3900) insns.
2780         (RFE): Turn on for 3900.
2781         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2782         (dsstate): Made global.
2783         (SUBTARGET_R3900): Added.
2784         (CANCELDELAYSLOT): New.
2785         (SignalException): Ignore SystemCall rather than ignore and
2786         terminate.  Add DebugBreakPoint handling.
2787         (decode_coproc): New insns RFE, DERET; and new registers Debug
2788         and DEPC protected by SUBTARGET_R3900.
2789         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2790         bits explicitly.
2791         * Makefile.in,configure.in: Add mips subtarget option.
2792         * configure: Update.
2793
2794 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2795
2796         * gencode.c: Add r3900 (tx39).
2797
2798
2799 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2800
2801         * gencode.c (build_instruction): Don't need to subtract 4 for
2802         JALR, just 2.
2803
2804 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2805
2806         * interp.c: Correct some HASFPU problems.
2807
2808 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2809
2810         * configure: Regenerated to track ../common/aclocal.m4 changes.
2811
2812 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2813
2814         * interp.c (mips_options): Fix samples option short form, should
2815         be `x'.
2816
2817 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2818
2819         * interp.c (sim_info): Enable info code.  Was just returning.
2820
2821 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2822
2823         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2824         MFC0.
2825
2826 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2827
2828         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2829         constants.
2830         (build_instruction): Ditto for LL.
2831
2832 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2833
2834         * configure: Regenerated to track ../common/aclocal.m4 changes.
2835
2836 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2837
2838         * configure: Regenerated to track ../common/aclocal.m4 changes.
2839         * config.in: Ditto.
2840
2841 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2842
2843         * interp.c (sim_open): Add call to sim_analyze_program, update
2844         call to sim_config.
2845
2846 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2847
2848         * interp.c (sim_kill): Delete.
2849         (sim_create_inferior): Add ABFD argument. Set PC from same.
2850         (sim_load): Move code initializing trap handlers from here.
2851         (sim_open): To here.
2852         (sim_load): Delete, use sim-hload.c.
2853
2854         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2855
2856 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2857
2858         * configure: Regenerated to track ../common/aclocal.m4 changes.
2859         * config.in: Ditto.
2860
2861 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2862
2863         * interp.c (sim_open): Add ABFD argument.
2864         (sim_load): Move call to sim_config from here.
2865         (sim_open): To here.  Check return status.
2866
2867 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2868
2869         * gencode.c (build_instruction): Two arg MADD should
2870         not assign result to $0.
2871
2872 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2873
2874         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2875         * sim/mips/configure.in: Regenerate.
2876
2877 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2878
2879         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2880         signed8, unsigned8 et.al. types.
2881
2882         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2883         hosts when selecting subreg.
2884
2885 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2886
2887         * interp.c (sim_engine_run): Reset the ZERO register to zero
2888         regardless of FEATURE_WARN_ZERO.
2889         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2890
2891 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2892
2893         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2894         (SignalException): For BreakPoints ignore any mode bits and just
2895         save the PC.
2896         (SignalException): Always set the CAUSE register.
2897
2898 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2899
2900         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2901         exception has been taken.
2902
2903         * interp.c: Implement the ERET and mt/f sr instructions.
2904
2905 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2906
2907         * interp.c (SignalException): Don't bother restarting an
2908         interrupt.
2909
2910 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2911
2912         * interp.c (SignalException): Really take an interrupt.
2913         (interrupt_event): Only deliver interrupts when enabled.
2914
2915 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2916
2917         * interp.c (sim_info): Only print info when verbose.
2918         (sim_info) Use sim_io_printf for output.
2919
2920 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2921
2922         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2923         mips architectures.
2924
2925 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2926
2927         * interp.c (sim_do_command): Check for common commands if a
2928         simulator specific command fails.
2929
2930 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2931
2932         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2933         and simBE when DEBUG is defined.
2934
2935 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2936
2937         * interp.c (interrupt_event): New function.  Pass exception event
2938         onto exception handler.
2939
2940         * configure.in: Check for stdlib.h.
2941         * configure: Regenerate.
2942
2943         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2944         variable declaration.
2945         (build_instruction): Initialize memval1.
2946         (build_instruction): Add UNUSED attribute to byte, bigend,
2947         reverse.
2948         (build_operands): Ditto.
2949
2950         * interp.c: Fix GCC warnings.
2951         (sim_get_quit_code): Delete.
2952
2953         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2954         * Makefile.in: Ditto.
2955         * configure: Re-generate.
2956
2957         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2958
2959 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2960
2961         * interp.c (mips_option_handler): New function parse argumes using
2962         sim-options.
2963         (myname): Replace with STATE_MY_NAME.
2964         (sim_open): Delete check for host endianness - performed by
2965         sim_config.
2966         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2967         (sim_open): Move much of the initialization from here.
2968         (sim_load): To here.  After the image has been loaded and
2969         endianness set.
2970         (sim_open): Move ColdReset from here.
2971         (sim_create_inferior): To here.
2972         (sim_open): Make FP check less dependant on host endianness.
2973
2974         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2975         run.
2976         * interp.c (sim_set_callbacks): Delete.
2977
2978         * interp.c (membank, membank_base, membank_size): Replace with
2979         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2980         (sim_open): Remove call to callback->init. gdb/run do this.
2981
2982         * interp.c: Update
2983
2984         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2985
2986         * interp.c (big_endian_p): Delete, replaced by
2987         current_target_byte_order.
2988
2989 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2990
2991         * interp.c (host_read_long, host_read_word, host_swap_word,
2992         host_swap_long): Delete. Using common sim-endian.
2993         (sim_fetch_register, sim_store_register): Use H2T.
2994         (pipeline_ticks): Delete.  Handled by sim-events.
2995         (sim_info): Update.
2996         (sim_engine_run): Update.
2997
2998 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2999
3000         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3001         reason from here.
3002         (SignalException): To here. Signal using sim_engine_halt.
3003         (sim_stop_reason): Delete, moved to common.
3004
3005 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3006
3007         * interp.c (sim_open): Add callback argument.
3008         (sim_set_callbacks): Delete SIM_DESC argument.
3009         (sim_size): Ditto.
3010
3011 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3012
3013         * Makefile.in (SIM_OBJS): Add common modules.
3014
3015         * interp.c (sim_set_callbacks): Also set SD callback.
3016         (set_endianness, xfer_*, swap_*): Delete.
3017         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3018         Change to functions using sim-endian macros.
3019         (control_c, sim_stop): Delete, use common version.
3020         (simulate): Convert into.
3021         (sim_engine_run): This function.
3022         (sim_resume): Delete.
3023
3024         * interp.c (simulation): New variable - the simulator object.
3025         (sim_kind): Delete global - merged into simulation.
3026         (sim_load): Cleanup.  Move PC assignment from here.
3027         (sim_create_inferior): To here.
3028
3029         * sim-main.h: New file.
3030         * interp.c (sim-main.h): Include.
3031
3032 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3033
3034         * configure: Regenerated to track ../common/aclocal.m4 changes.
3035
3036 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3037
3038         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3039
3040 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3041
3042         * gencode.c (build_instruction): DIV instructions: check
3043         for division by zero and integer overflow before using
3044         host's division operation.
3045
3046 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3047
3048         * Makefile.in (SIM_OBJS): Add sim-load.o.
3049         * interp.c: #include bfd.h.
3050         (target_byte_order): Delete.
3051         (sim_kind, myname, big_endian_p): New static locals.
3052         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3053         after argument parsing.  Recognize -E arg, set endianness accordingly.
3054         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3055         load file into simulator.  Set PC from bfd.
3056         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3057         (set_endianness): Use big_endian_p instead of target_byte_order.
3058
3059 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3060
3061         * interp.c (sim_size): Delete prototype - conflicts with
3062         definition in remote-sim.h.  Correct definition.
3063
3064 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3065
3066         * configure: Regenerated to track ../common/aclocal.m4 changes.
3067         * config.in: Ditto.
3068
3069 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3070
3071         * interp.c (sim_open): New arg `kind'.
3072
3073         * configure: Regenerated to track ../common/aclocal.m4 changes.
3074
3075 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3076
3077         * configure: Regenerated to track ../common/aclocal.m4 changes.
3078
3079 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3080
3081         * interp.c (sim_open): Set optind to 0 before calling getopt.
3082
3083 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3084
3085         * configure: Regenerated to track ../common/aclocal.m4 changes.
3086
3087 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3088
3089         * interp.c : Replace uses of pr_addr with pr_uword64
3090         where the bit length is always 64 independent of SIM_ADDR.
3091         (pr_uword64) : added.
3092
3093 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3094
3095         * configure: Re-generate.
3096
3097 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3098
3099         * configure: Regenerate to track ../common/aclocal.m4 changes.
3100
3101 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3102
3103         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3104         in argv form.
3105         (other sim_*): New SIM_DESC argument.
3106
3107 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3108
3109         * interp.c: Fix printing of addresses for non-64-bit targets.
3110         (pr_addr): Add function to print address based on size.
3111
3112 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3113
3114         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3115
3116 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3117
3118         * gencode.c (build_mips16_operands): Correct computation of base
3119         address for extended PC relative instruction.
3120
3121 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3122
3123         * interp.c (mips16_entry): Add support for floating point cases.
3124         (SignalException): Pass floating point cases to mips16_entry.
3125         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3126         registers.
3127         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3128         or fmt_word.
3129         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3130         and then set the state to fmt_uninterpreted.
3131         (COP_SW): Temporarily set the state to fmt_word while calling
3132         ValueFPR.
3133
3134 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3135
3136         * gencode.c (build_instruction): The high order may be set in the
3137         comparison flags at any ISA level, not just ISA 4.
3138
3139 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3140
3141         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3142         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3143         * configure.in: sinclude ../common/aclocal.m4.
3144         * configure: Regenerated.
3145
3146 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3147
3148         * configure: Rebuild after change to aclocal.m4.
3149
3150 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3151
3152         * configure configure.in Makefile.in:  Update to new configure
3153         scheme which is more compatible with WinGDB builds.
3154         * configure.in:  Improve comment on how to run autoconf.
3155         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3156         * Makefile.in:  Use autoconf substitution to install common
3157         makefile fragment.
3158
3159 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3160
3161         * gencode.c (build_instruction): Use BigEndianCPU instead of
3162         ByteSwapMem.
3163
3164 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3165
3166         * interp.c (sim_monitor): Make output to stdout visible in
3167         wingdb's I/O log window.
3168
3169 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3170
3171         * support.h: Undo previous change to SIGTRAP
3172         and SIGQUIT values.
3173
3174 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3175
3176         * interp.c (store_word, load_word): New static functions.
3177         (mips16_entry): New static function.
3178         (SignalException): Look for mips16 entry and exit instructions.
3179         (simulate): Use the correct index when setting fpr_state after
3180         doing a pending move.
3181
3182 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3183
3184         * interp.c: Fix byte-swapping code throughout to work on
3185         both little- and big-endian hosts.
3186
3187 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3188
3189         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3190         with gdb/config/i386/xm-windows.h.
3191
3192 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3193
3194         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3195         that messes up arithmetic shifts.
3196
3197 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3198
3199         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3200         SIGTRAP and SIGQUIT for _WIN32.
3201
3202 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3203
3204         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3205         force a 64 bit multiplication.
3206         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3207         destination register is 0, since that is the default mips16 nop
3208         instruction.
3209
3210 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3211
3212         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3213         (build_endian_shift): Don't check proc64.
3214         (build_instruction): Always set memval to uword64.  Cast op2 to
3215         uword64 when shifting it left in memory instructions.  Always use
3216         the same code for stores--don't special case proc64.
3217
3218         * gencode.c (build_mips16_operands): Fix base PC value for PC
3219         relative operands.
3220         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3221         jal instruction.
3222         * interp.c (simJALDELAYSLOT): Define.
3223         (JALDELAYSLOT): Define.
3224         (INDELAYSLOT, INJALDELAYSLOT): Define.
3225         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3226
3227 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3228
3229         * interp.c (sim_open): add flush_cache as a PMON routine
3230         (sim_monitor): handle flush_cache by ignoring it
3231
3232 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3233
3234         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3235         BigEndianMem.
3236         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3237         (BigEndianMem): Rename to ByteSwapMem and change sense.
3238         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3239         BigEndianMem references to !ByteSwapMem.
3240         (set_endianness): New function, with prototype.
3241         (sim_open): Call set_endianness.
3242         (sim_info): Use simBE instead of BigEndianMem.
3243         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3244         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3245         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3246         ifdefs, keeping the prototype declaration.
3247         (swap_word): Rewrite correctly.
3248         (ColdReset): Delete references to CONFIG.  Delete endianness related
3249         code; moved to set_endianness.
3250
3251 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3252
3253         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3254         * interp.c (CHECKHILO): Define away.
3255         (simSIGINT): New macro.
3256         (membank_size): Increase from 1MB to 2MB.
3257         (control_c): New function.
3258         (sim_resume): Rename parameter signal to signal_number.  Add local
3259         variable prev.  Call signal before and after simulate.
3260         (sim_stop_reason): Add simSIGINT support.
3261         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3262         functions always.
3263         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3264         if logfh is NULL.
3265         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3266         a call to sim_warning.
3267
3268 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3269
3270         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3271         16 bit instructions.
3272
3273 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3274
3275         Add support for mips16 (16 bit MIPS implementation):
3276         * gencode.c (inst_type): Add mips16 instruction encoding types.
3277         (GETDATASIZEINSN): Define.
3278         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3279         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3280         mtlo.
3281         (MIPS16_DECODE): New table, for mips16 instructions.
3282         (bitmap_val): New static function.
3283         (struct mips16_op): Define.
3284         (mips16_op_table): New table, for mips16 operands.
3285         (build_mips16_operands): New static function.
3286         (process_instructions): If PC is odd, decode a mips16
3287         instruction.  Break out instruction handling into new
3288         build_instruction function.
3289         (build_instruction): New static function, broken out of
3290         process_instructions.  Check modifiers rather than flags for SHIFT
3291         bit count and m[ft]{hi,lo} direction.
3292         (usage): Pass program name to fprintf.
3293         (main): Remove unused variable this_option_optind.  Change
3294         ``*loptarg++'' to ``loptarg++''.
3295         (my_strtoul): Parenthesize && within ||.
3296         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3297         (simulate): If PC is odd, fetch a 16 bit instruction, and
3298         increment PC by 2 rather than 4.
3299         * configure.in: Add case for mips16*-*-*.
3300         * configure: Rebuild.
3301
3302 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3303
3304         * interp.c: Allow -t to enable tracing in standalone simulator.
3305         Fix garbage output in trace file and error messages.
3306
3307 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3308
3309         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3310         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3311         * configure.in: Simplify using macros in ../common/aclocal.m4.
3312         * configure: Regenerated.
3313         * tconfig.in: New file.
3314
3315 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3316
3317         * interp.c: Fix bugs in 64-bit port.
3318         Use ansi function declarations for msvc compiler.
3319         Initialize and test file pointer in trace code.
3320         Prevent duplicate definition of LAST_EMED_REGNUM.
3321
3322 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3323
3324         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3325
3326 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3327
3328         * interp.c (SignalException): Check for explicit terminating
3329         breakpoint value.
3330         * gencode.c: Pass instruction value through SignalException()
3331         calls for Trap, Breakpoint and Syscall.
3332
3333 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3334
3335         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3336         only used on those hosts that provide it.
3337         * configure.in: Add sqrt() to list of functions to be checked for.
3338         * config.in: Re-generated.
3339         * configure: Re-generated.
3340
3341 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3342
3343         * gencode.c (process_instructions): Call build_endian_shift when
3344         expanding STORE RIGHT, to fix swr.
3345         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3346         clear the high bits.
3347         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3348         Fix float to int conversions to produce signed values.
3349
3350 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3351
3352         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3353         (process_instructions): Correct handling of nor instruction.
3354         Correct shift count for 32 bit shift instructions. Correct sign
3355         extension for arithmetic shifts to not shift the number of bits in
3356         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3357         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3358         Fix madd.
3359         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3360         It's OK to have a mult follow a mult.  What's not OK is to have a
3361         mult follow an mfhi.
3362         (Convert): Comment out incorrect rounding code.
3363
3364 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3365
3366         * interp.c (sim_monitor): Improved monitor printf
3367         simulation. Tidied up simulator warnings, and added "--log" option
3368         for directing warning message output.
3369         * gencode.c: Use sim_warning() rather than WARNING macro.
3370
3371 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3372
3373         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3374         getopt1.o, rather than on gencode.c.  Link objects together.
3375         Don't link against -liberty.
3376         (gencode.o, getopt.o, getopt1.o): New targets.
3377         * gencode.c: Include <ctype.h> and "ansidecl.h".
3378         (AND): Undefine after including "ansidecl.h".
3379         (ULONG_MAX): Define if not defined.
3380         (OP_*): Don't define macros; now defined in opcode/mips.h.
3381         (main): Call my_strtoul rather than strtoul.
3382         (my_strtoul): New static function.
3383
3384 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3385
3386         * gencode.c (process_instructions):  Generate word64 and uword64
3387         instead of `long long' and `unsigned long long' data types.
3388         * interp.c:  #include sysdep.h to get signals, and define default
3389         for SIGBUS.
3390         * (Convert):  Work around for Visual-C++ compiler bug with type
3391         conversion.
3392         * support.h:  Make things compile under Visual-C++ by using
3393         __int64 instead of `long long'.  Change many refs to long long
3394         into word64/uword64 typedefs.
3395
3396 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3397
3398         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3399         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3400         (docdir): Removed.
3401         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3402         (AC_PROG_INSTALL): Added.
3403         (AC_PROG_CC): Moved to before configure.host call.
3404         * configure: Rebuilt.
3405
3406 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3407
3408         * configure.in: Define @SIMCONF@ depending on mips target.
3409         * configure: Rebuild.
3410         * Makefile.in (run): Add @SIMCONF@ to control simulator
3411         construction.
3412         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3413         * interp.c: Remove some debugging, provide more detailed error
3414         messages, update memory accesses to use LOADDRMASK.
3415
3416 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3417
3418         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3419         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3420         stamp-h.
3421         * configure: Rebuild.
3422         * config.in: New file, generated by autoheader.
3423         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3424         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3425         HAVE_ANINT and HAVE_AINT, as appropriate.
3426         * Makefile.in (run): Use @LIBS@ rather than -lm.
3427         (interp.o): Depend upon config.h.
3428         (Makefile): Just rebuild Makefile.
3429         (clean): Remove stamp-h.
3430         (mostlyclean): Make the same as clean, not as distclean.
3431         (config.h, stamp-h): New targets.
3432
3433 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3434
3435         * interp.c (ColdReset): Fix boolean test. Make all simulator
3436         globals static.
3437
3438 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3439
3440         * interp.c (xfer_direct_word, xfer_direct_long,
3441         swap_direct_word, swap_direct_long, xfer_big_word,
3442         xfer_big_long, xfer_little_word, xfer_little_long,
3443         swap_word,swap_long): Added.
3444         * interp.c (ColdReset): Provide function indirection to
3445         host<->simulated_target transfer routines.
3446         * interp.c (sim_store_register, sim_fetch_register): Updated to
3447         make use of indirected transfer routines.
3448
3449 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3450
3451         * gencode.c (process_instructions): Ensure FP ABS instruction
3452         recognised.
3453         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3454         system call support.
3455
3456 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3457
3458         * interp.c (sim_do_command): Complain if callback structure not
3459         initialised.
3460
3461 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3462
3463         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3464         support for Sun hosts.
3465         * Makefile.in (gencode): Ensure the host compiler and libraries
3466         used for cross-hosted build.
3467
3468 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3469
3470         * interp.c, gencode.c: Some more (TODO) tidying.
3471
3472 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3473
3474         * gencode.c, interp.c: Replaced explicit long long references with
3475         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3476         * support.h (SET64LO, SET64HI): Macros added.
3477
3478 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3479
3480         * configure: Regenerate with autoconf 2.7.
3481
3482 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3483
3484         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3485         * support.h: Remove superfluous "1" from #if.
3486         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3487
3488 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3489
3490         * interp.c (StoreFPR): Control UndefinedResult() call on
3491         WARN_RESULT manifest.
3492
3493 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3494
3495         * gencode.c: Tidied instruction decoding, and added FP instruction
3496         support.
3497
3498         * interp.c: Added dineroIII, and BSD profiling support. Also
3499         run-time FP handling.
3500
3501 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3502
3503         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3504         gencode.c, interp.c, support.h: created.