1 2016-01-02 Mike Frysinger <vapier@gentoo.org>
3 * dv-tx3904cpu.c (CPU, SD): Delete.
5 2015-12-30 Mike Frysinger <vapier@gentoo.org>
7 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
8 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
9 (sim_store_register): Rename to ...
10 (mips_reg_store): ... this. Delete local cpu var.
11 Update sim_io_eprintf calls.
12 (sim_fetch_register): Rename to ...
13 (mips_reg_fetch): ... this. Delete local cpu var.
14 Update sim_io_eprintf calls.
16 2015-12-27 Mike Frysinger <vapier@gentoo.org>
18 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
20 2015-12-26 Mike Frysinger <vapier@gentoo.org>
22 * config.in, configure: Regenerate.
24 2015-12-26 Mike Frysinger <vapier@gentoo.org>
26 * interp.c (sim_write, sim_read): Delete.
27 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
28 (load_word): Likewise.
29 * micromips.igen (cache): Likewise.
30 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
31 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
32 do_store_left, do_store_right, do_load_double, do_store_double):
34 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
36 * sim-main.c (address_translation, prefetch): Delete.
37 (ifetch32, ifetch16): Delete call to AddressTranslation and set
39 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
40 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
41 (LoadMemory, StoreMemory): Delete CCA arg.
43 2015-12-24 Mike Frysinger <vapier@gentoo.org>
45 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
46 * configure: Regenerated.
48 2015-12-24 Mike Frysinger <vapier@gentoo.org>
50 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
53 2015-12-24 Mike Frysinger <vapier@gentoo.org>
55 * tconfig.h (SIM_HANDLES_LMA): Delete.
57 2015-12-24 Mike Frysinger <vapier@gentoo.org>
59 * sim-main.h (WITH_WATCHPOINTS): Delete.
61 2015-12-24 Mike Frysinger <vapier@gentoo.org>
63 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
65 2015-12-24 Mike Frysinger <vapier@gentoo.org>
67 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
69 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
71 * micromips.igen (process_isa_mode): Fix left shift of negative
74 2015-11-17 Mike Frysinger <vapier@gentoo.org>
76 * sim-main.h (WITH_MODULO_MEMORY): Delete.
78 2015-11-15 Mike Frysinger <vapier@gentoo.org>
80 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
82 2015-11-14 Mike Frysinger <vapier@gentoo.org>
84 * interp.c (sim_close): Rename to ...
85 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
87 * sim-main.h (mips_sim_close): Declare.
88 (SIM_CLOSE_HOOK): Define.
90 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
91 Ali Lown <ali.lown@imgtec.com>
93 * Makefile.in (tmp-micromips): New rule.
94 (tmp-mach-multi): Add support for micromips.
95 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
96 that works for both mips64 and micromips64.
97 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
99 Add build support for micromips.
100 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
101 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
102 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
103 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
104 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
105 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
106 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
107 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
108 Refactored instruction code to use these functions.
109 * dsp2.igen: Refactored instruction code to use the new functions.
110 * interp.c (decode_coproc): Refactored to work with any instruction
112 (isa_mode): New variable
113 (RSVD_INSTRUCTION): Changed to 0x00000039.
114 * m16.igen (BREAK16): Refactored instruction to use do_break16.
115 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
116 * micromips.dc: New file.
117 * micromips.igen: New file.
118 * micromips16.dc: New file.
119 * micromipsdsp.igen: New file.
120 * micromipsrun.c: New file.
121 * mips.igen (do_swc1): Changed to work with any instruction encoding.
122 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
123 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
124 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
125 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
126 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
127 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
128 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
129 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
130 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
131 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
132 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
133 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
134 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
135 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
136 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
137 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
138 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
139 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
141 Refactored instruction code to use these functions.
142 (RSVD): Changed to use new reserved instruction.
143 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
144 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
145 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
146 do_store_double): Added micromips32 and micromips64 models.
147 Added include for micromips.igen and micromipsdsp.igen
148 Add micromips32 and micromips64 models.
149 (DecodeCoproc): Updated to use new macro definition.
150 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
151 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
152 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
153 Refactored instruction code to use these functions.
154 * sim-main.h (CP0_operation): New enum.
155 (DecodeCoproc): Updated macro.
156 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
157 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
158 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
159 ISA_MODE_MICROMIPS): New defines.
160 (sim_state): Add isa_mode field.
162 2015-06-23 Mike Frysinger <vapier@gentoo.org>
164 * configure: Regenerate.
166 2015-06-12 Mike Frysinger <vapier@gentoo.org>
168 * configure.ac: Change configure.in to configure.ac.
169 * configure: Regenerate.
171 2015-06-12 Mike Frysinger <vapier@gentoo.org>
173 * configure: Regenerate.
175 2015-06-12 Mike Frysinger <vapier@gentoo.org>
177 * interp.c [TRACE]: Delete.
178 (TRACE): Change to WITH_TRACE_ANY_P.
179 [!WITH_TRACE_ANY_P] (open_trace): Define.
180 (mips_option_handler, open_trace, sim_close, dotrace):
181 Change defined(TRACE) to WITH_TRACE_ANY_P.
182 (sim_open): Delete TRACE ifdef check.
183 * sim-main.c (load_memory): Delete TRACE ifdef check.
184 (store_memory): Likewise.
185 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
186 [!WITH_TRACE_ANY_P] (dotrace): Define.
188 2015-04-18 Mike Frysinger <vapier@gentoo.org>
190 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
193 2015-04-18 Mike Frysinger <vapier@gentoo.org>
195 * sim-main.h (SIM_CPU): Delete.
197 2015-04-18 Mike Frysinger <vapier@gentoo.org>
199 * sim-main.h (sim_cia): Delete.
201 2015-04-17 Mike Frysinger <vapier@gentoo.org>
203 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
205 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
206 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
207 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
208 CIA_SET to CPU_PC_SET.
209 * sim-main.h (CIA_GET, CIA_SET): Delete.
211 2015-04-15 Mike Frysinger <vapier@gentoo.org>
213 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
214 * sim-main.h (STATE_CPU): Delete.
216 2015-04-13 Mike Frysinger <vapier@gentoo.org>
218 * configure: Regenerate.
220 2015-04-13 Mike Frysinger <vapier@gentoo.org>
222 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
223 * interp.c (mips_pc_get, mips_pc_set): New functions.
224 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
225 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
226 (sim_pc_get): Delete.
227 * sim-main.h (SIM_CPU): Define.
228 (struct sim_state): Change cpu to an array of pointers.
231 2015-04-13 Mike Frysinger <vapier@gentoo.org>
233 * interp.c (mips_option_handler, open_trace, sim_close,
234 sim_write, sim_read, sim_store_register, sim_fetch_register,
235 sim_create_inferior, pr_addr, pr_uword64): Convert old style
237 (sim_open): Convert old style prototype. Change casts with
238 sim_write to unsigned char *.
239 (fetch_str): Change null to unsigned char, and change cast to
241 (sim_monitor): Change c & ch to unsigned char. Change cast to
244 2015-04-12 Mike Frysinger <vapier@gentoo.org>
246 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
248 2015-04-06 Mike Frysinger <vapier@gentoo.org>
250 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
252 2015-04-01 Mike Frysinger <vapier@gentoo.org>
254 * tconfig.h (SIM_HAVE_PROFILE): Delete.
256 2015-03-31 Mike Frysinger <vapier@gentoo.org>
258 * config.in, configure: Regenerate.
260 2015-03-24 Mike Frysinger <vapier@gentoo.org>
262 * interp.c (sim_pc_get): New function.
264 2015-03-24 Mike Frysinger <vapier@gentoo.org>
266 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
267 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
269 2015-03-24 Mike Frysinger <vapier@gentoo.org>
271 * configure: Regenerate.
273 2015-03-23 Mike Frysinger <vapier@gentoo.org>
275 * configure: Regenerate.
277 2015-03-23 Mike Frysinger <vapier@gentoo.org>
279 * configure: Regenerate.
280 * configure.ac (mips_extra_objs): Delete.
281 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
282 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
284 2015-03-23 Mike Frysinger <vapier@gentoo.org>
286 * configure: Regenerate.
287 * configure.ac: Delete sim_hw checks for dv-sockser.
289 2015-03-16 Mike Frysinger <vapier@gentoo.org>
291 * config.in, configure: Regenerate.
292 * tconfig.in: Rename file ...
293 * tconfig.h: ... here.
295 2015-03-15 Mike Frysinger <vapier@gentoo.org>
297 * tconfig.in: Delete includes.
298 [HAVE_DV_SOCKSER]: Delete.
300 2015-03-14 Mike Frysinger <vapier@gentoo.org>
302 * Makefile.in (SIM_RUN_OBJS): Delete.
304 2015-03-14 Mike Frysinger <vapier@gentoo.org>
306 * configure.ac (AC_CHECK_HEADERS): Delete.
307 * aclocal.m4, configure: Regenerate.
309 2014-08-19 Alan Modra <amodra@gmail.com>
311 * configure: Regenerate.
313 2014-08-15 Roland McGrath <mcgrathr@google.com>
315 * configure: Regenerate.
316 * config.in: Regenerate.
318 2014-03-04 Mike Frysinger <vapier@gentoo.org>
320 * configure: Regenerate.
322 2013-09-23 Alan Modra <amodra@gmail.com>
324 * configure: Regenerate.
326 2013-06-03 Mike Frysinger <vapier@gentoo.org>
328 * aclocal.m4, configure: Regenerate.
330 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
332 * configure: Rebuild.
334 2013-03-26 Mike Frysinger <vapier@gentoo.org>
336 * configure: Regenerate.
338 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
340 * configure.ac: Address use of dv-sockser.o.
341 * tconfig.in: Conditionalize use of dv_sockser_install.
342 * configure: Regenerated.
343 * config.in: Regenerated.
345 2012-10-04 Chao-ying Fu <fu@mips.com>
346 Steve Ellcey <sellcey@mips.com>
348 * mips/mips3264r2.igen (rdhwr): New.
350 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
352 * configure.ac: Always link against dv-sockser.o.
353 * configure: Regenerate.
355 2012-06-15 Joel Brobecker <brobecker@adacore.com>
357 * config.in, configure: Regenerate.
359 2012-05-18 Nick Clifton <nickc@redhat.com>
362 * interp.c: Include config.h before system header files.
364 2012-03-24 Mike Frysinger <vapier@gentoo.org>
366 * aclocal.m4, config.in, configure: Regenerate.
368 2011-12-03 Mike Frysinger <vapier@gentoo.org>
370 * aclocal.m4: New file.
371 * configure: Regenerate.
373 2011-10-19 Mike Frysinger <vapier@gentoo.org>
375 * configure: Regenerate after common/acinclude.m4 update.
377 2011-10-17 Mike Frysinger <vapier@gentoo.org>
379 * configure.ac: Change include to common/acinclude.m4.
381 2011-10-17 Mike Frysinger <vapier@gentoo.org>
383 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
384 call. Replace common.m4 include with SIM_AC_COMMON.
385 * configure: Regenerate.
387 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
389 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
391 (tmp-mach-multi): Exit early when igen fails.
393 2011-07-05 Mike Frysinger <vapier@gentoo.org>
395 * interp.c (sim_do_command): Delete.
397 2011-02-14 Mike Frysinger <vapier@gentoo.org>
399 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
400 (tx3904sio_fifo_reset): Likewise.
401 * interp.c (sim_monitor): Likewise.
403 2010-04-14 Mike Frysinger <vapier@gentoo.org>
405 * interp.c (sim_write): Add const to buffer arg.
407 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
409 * interp.c: Don't include sysdep.h
411 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
413 * configure: Regenerate.
415 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
417 * config.in: Regenerate.
418 * configure: Likewise.
420 * configure: Regenerate.
422 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
424 * configure: Regenerate to track ../common/common.m4 changes.
427 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
428 Daniel Jacobowitz <dan@codesourcery.com>
429 Joseph Myers <joseph@codesourcery.com>
431 * configure: Regenerate.
433 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
435 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
436 that unconditionally allows fmt_ps.
437 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
438 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
439 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
440 filter from 64,f to 32,f.
441 (PREFX): Change filter from 64 to 32.
442 (LDXC1, LUXC1): Provide separate mips32r2 implementations
443 that use do_load_double instead of do_load. Make both LUXC1
444 versions unpredictable if SizeFGR () != 64.
445 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
446 instead of do_store. Remove unused variable. Make both SUXC1
447 versions unpredictable if SizeFGR () != 64.
449 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
451 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
452 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
453 shifts for that case.
455 2007-09-04 Nick Clifton <nickc@redhat.com>
457 * interp.c (options enum): Add OPTION_INFO_MEMORY.
458 (display_mem_info): New static variable.
459 (mips_option_handler): Handle OPTION_INFO_MEMORY.
460 (mips_options): Add info-memory and memory-info.
461 (sim_open): After processing the command line and board
462 specification, check display_mem_info. If it is set then
463 call the real handler for the --memory-info command line
466 2007-08-24 Joel Brobecker <brobecker@adacore.com>
468 * configure.ac: Change license of multi-run.c to GPL version 3.
469 * configure: Regenerate.
471 2007-06-28 Richard Sandiford <richard@codesourcery.com>
473 * configure.ac, configure: Revert last patch.
475 2007-06-26 Richard Sandiford <richard@codesourcery.com>
477 * configure.ac (sim_mipsisa3264_configs): New variable.
478 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
479 every configuration support all four targets, using the triplet to
480 determine the default.
481 * configure: Regenerate.
483 2007-06-25 Richard Sandiford <richard@codesourcery.com>
485 * Makefile.in (m16run.o): New rule.
487 2007-05-15 Thiemo Seufer <ths@mips.com>
489 * mips3264r2.igen (DSHD): Fix compile warning.
491 2007-05-14 Thiemo Seufer <ths@mips.com>
493 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
494 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
495 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
496 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
499 2007-03-01 Thiemo Seufer <ths@mips.com>
501 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
504 2007-02-20 Thiemo Seufer <ths@mips.com>
506 * dsp.igen: Update copyright notice.
507 * dsp2.igen: Fix copyright notice.
509 2007-02-20 Thiemo Seufer <ths@mips.com>
510 Chao-Ying Fu <fu@mips.com>
512 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
513 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
514 Add dsp2 to sim_igen_machine.
515 * configure: Regenerate.
516 * dsp.igen (do_ph_op): Add MUL support when op = 2.
517 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
518 (mulq_rs.ph): Use do_ph_mulq.
519 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
520 * mips.igen: Add dsp2 model and include dsp2.igen.
521 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
522 for *mips32r2, *mips64r2, *dsp.
523 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
524 for *mips32r2, *mips64r2, *dsp2.
525 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
527 2007-02-19 Thiemo Seufer <ths@mips.com>
528 Nigel Stephens <nigel@mips.com>
530 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
531 jumps with hazard barrier.
533 2007-02-19 Thiemo Seufer <ths@mips.com>
534 Nigel Stephens <nigel@mips.com>
536 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
537 after each call to sim_io_write.
539 2007-02-19 Thiemo Seufer <ths@mips.com>
540 Nigel Stephens <nigel@mips.com>
542 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
543 supported by this simulator.
544 (decode_coproc): Recognise additional CP0 Config registers
547 2007-02-19 Thiemo Seufer <ths@mips.com>
548 Nigel Stephens <nigel@mips.com>
549 David Ung <davidu@mips.com>
551 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
552 uninterpreted formats. If fmt is one of the uninterpreted types
553 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
554 fmt_word, and fmt_uninterpreted_64 like fmt_long.
555 (store_fpr): When writing an invalid odd register, set the
556 matching even register to fmt_unknown, not the following register.
557 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
558 the the memory window at offset 0 set by --memory-size command
560 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
562 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
564 (sim_monitor): When returning the memory size to the MIPS
565 application, use the value in STATE_MEM_SIZE, not an arbitrary
567 (cop_lw): Don' mess around with FPR_STATE, just pass
568 fmt_uninterpreted_32 to StoreFPR.
570 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
572 * mips.igen (not_word_value): Single version for mips32, mips64
575 2007-02-19 Thiemo Seufer <ths@mips.com>
576 Nigel Stephens <nigel@mips.com>
578 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
581 2007-02-17 Thiemo Seufer <ths@mips.com>
583 * configure.ac (mips*-sde-elf*): Move in front of generic machine
585 * configure: Regenerate.
587 2007-02-17 Thiemo Seufer <ths@mips.com>
589 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
590 Add mdmx to sim_igen_machine.
591 (mipsisa64*-*-*): Likewise. Remove dsp.
592 (mipsisa32*-*-*): Remove dsp.
593 * configure: Regenerate.
595 2007-02-13 Thiemo Seufer <ths@mips.com>
597 * configure.ac: Add mips*-sde-elf* target.
598 * configure: Regenerate.
600 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
602 * acconfig.h: Remove.
603 * config.in, configure: Regenerate.
605 2006-11-07 Thiemo Seufer <ths@mips.com>
607 * dsp.igen (do_w_op): Fix compiler warning.
609 2006-08-29 Thiemo Seufer <ths@mips.com>
610 David Ung <davidu@mips.com>
612 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
614 * configure: Regenerate.
615 * mips.igen (model): Add smartmips.
616 (MADDU): Increment ACX if carry.
617 (do_mult): Clear ACX.
618 (ROR,RORV): Add smartmips.
619 (include): Include smartmips.igen.
620 * sim-main.h (ACX): Set to REGISTERS[89].
621 * smartmips.igen: New file.
623 2006-08-29 Thiemo Seufer <ths@mips.com>
624 David Ung <davidu@mips.com>
626 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
627 mips3264r2.igen. Add missing dependency rules.
628 * m16e.igen: Support for mips16e save/restore instructions.
630 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
632 * configure: Regenerated.
634 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
636 * configure: Regenerated.
638 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
640 * configure: Regenerated.
642 2006-05-15 Chao-ying Fu <fu@mips.com>
644 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
646 2006-04-18 Nick Clifton <nickc@redhat.com>
648 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
651 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
653 * configure: Regenerate.
655 2005-12-14 Chao-ying Fu <fu@mips.com>
657 * Makefile.in (SIM_OBJS): Add dsp.o.
658 (dsp.o): New dependency.
659 (IGEN_INCLUDE): Add dsp.igen.
660 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
661 mipsisa64*-*-*): Add dsp to sim_igen_machine.
662 * configure: Regenerate.
663 * mips.igen: Add dsp model and include dsp.igen.
664 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
665 because these instructions are extended in DSP ASE.
666 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
667 adding 6 DSP accumulator registers and 1 DSP control register.
668 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
669 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
670 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
671 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
672 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
673 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
674 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
675 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
676 DSPCR_CCOND_SMASK): New define.
677 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
678 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
680 2005-07-08 Ian Lance Taylor <ian@airs.com>
682 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
684 2005-06-16 David Ung <davidu@mips.com>
685 Nigel Stephens <nigel@mips.com>
687 * mips.igen: New mips16e model and include m16e.igen.
688 (check_u64): Add mips16e tag.
689 * m16e.igen: New file for MIPS16e instructions.
690 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
691 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
693 * configure: Regenerate.
695 2005-05-26 David Ung <davidu@mips.com>
697 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
698 tags to all instructions which are applicable to the new ISAs.
699 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
701 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
703 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
705 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
706 * configure: Regenerate.
708 2005-03-23 Mark Kettenis <kettenis@gnu.org>
710 * configure: Regenerate.
712 2005-01-14 Andrew Cagney <cagney@gnu.org>
714 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
715 explicit call to AC_CONFIG_HEADER.
716 * configure: Regenerate.
718 2005-01-12 Andrew Cagney <cagney@gnu.org>
720 * configure.ac: Update to use ../common/common.m4.
721 * configure: Re-generate.
723 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
725 * configure: Regenerated to track ../common/aclocal.m4 changes.
727 2005-01-07 Andrew Cagney <cagney@gnu.org>
729 * configure.ac: Rename configure.in, require autoconf 2.59.
730 * configure: Re-generate.
732 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
734 * configure: Regenerate for ../common/aclocal.m4 update.
736 2004-09-24 Monika Chaddha <monika@acmet.com>
738 Committed by Andrew Cagney.
739 * m16.igen (CMP, CMPI): Fix assembler.
741 2004-08-18 Chris Demetriou <cgd@broadcom.com>
743 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
744 * configure: Regenerate.
746 2004-06-25 Chris Demetriou <cgd@broadcom.com>
748 * configure.in (sim_m16_machine): Include mipsIII.
749 * configure: Regenerate.
751 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
753 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
755 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
757 2004-04-10 Chris Demetriou <cgd@broadcom.com>
759 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
761 2004-04-09 Chris Demetriou <cgd@broadcom.com>
763 * mips.igen (check_fmt): Remove.
764 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
765 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
766 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
767 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
768 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
769 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
770 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
771 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
772 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
773 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
775 2004-04-09 Chris Demetriou <cgd@broadcom.com>
777 * sb1.igen (check_sbx): New function.
778 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
780 2004-03-29 Chris Demetriou <cgd@broadcom.com>
781 Richard Sandiford <rsandifo@redhat.com>
783 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
784 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
785 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
786 separate implementations for mipsIV and mipsV. Use new macros to
787 determine whether the restrictions apply.
789 2004-01-19 Chris Demetriou <cgd@broadcom.com>
791 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
792 (check_mult_hilo): Improve comments.
793 (check_div_hilo): Likewise. Also, fork off a new version
794 to handle mips32/mips64 (since there are no hazards to check
797 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
799 * mips.igen (do_dmultx): Fix check for negative operands.
801 2003-05-16 Ian Lance Taylor <ian@airs.com>
803 * Makefile.in (SHELL): Make sure this is defined.
804 (various): Use $(SHELL) whenever we invoke move-if-change.
806 2003-05-03 Chris Demetriou <cgd@broadcom.com>
808 * cp1.c: Tweak attribution slightly.
811 * mdmx.igen: Likewise.
812 * mips3d.igen: Likewise.
813 * sb1.igen: Likewise.
815 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
817 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
820 2003-02-27 Andrew Cagney <cagney@redhat.com>
822 * interp.c (sim_open): Rename _bfd to bfd.
823 (sim_create_inferior): Ditto.
825 2003-01-14 Chris Demetriou <cgd@broadcom.com>
827 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
829 2003-01-14 Chris Demetriou <cgd@broadcom.com>
831 * mips.igen (EI, DI): Remove.
833 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
835 * Makefile.in (tmp-run-multi): Fix mips16 filter.
837 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
838 Andrew Cagney <ac131313@redhat.com>
839 Gavin Romig-Koch <gavin@redhat.com>
840 Graydon Hoare <graydon@redhat.com>
841 Aldy Hernandez <aldyh@redhat.com>
842 Dave Brolley <brolley@redhat.com>
843 Chris Demetriou <cgd@broadcom.com>
845 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
846 (sim_mach_default): New variable.
847 (mips64vr-*-*, mips64vrel-*-*): New configurations.
848 Add a new simulator generator, MULTI.
849 * configure: Regenerate.
850 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
851 (multi-run.o): New dependency.
852 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
853 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
854 (tmp-multi): Combine them.
855 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
856 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
857 (distclean-extra): New rule.
858 * sim-main.h: Include bfd.h.
859 (MIPS_MACH): New macro.
860 * mips.igen (vr4120, vr5400, vr5500): New models.
861 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
862 * vr.igen: Replace with new version.
864 2003-01-04 Chris Demetriou <cgd@broadcom.com>
866 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
867 * configure: Regenerate.
869 2002-12-31 Chris Demetriou <cgd@broadcom.com>
871 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
872 * mips.igen: Remove all invocations of check_branch_bug and
875 2002-12-16 Chris Demetriou <cgd@broadcom.com>
877 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
879 2002-07-30 Chris Demetriou <cgd@broadcom.com>
881 * mips.igen (do_load_double, do_store_double): New functions.
882 (LDC1, SDC1): Rename to...
883 (LDC1b, SDC1b): respectively.
884 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
886 2002-07-29 Michael Snyder <msnyder@redhat.com>
888 * cp1.c (fp_recip2): Modify initialization expression so that
889 GCC will recognize it as constant.
891 2002-06-18 Chris Demetriou <cgd@broadcom.com>
893 * mdmx.c (SD_): Delete.
894 (Unpredictable): Re-define, for now, to directly invoke
895 unpredictable_action().
896 (mdmx_acc_op): Fix error in .ob immediate handling.
898 2002-06-18 Andrew Cagney <cagney@redhat.com>
900 * interp.c (sim_firmware_command): Initialize `address'.
902 2002-06-16 Andrew Cagney <ac131313@redhat.com>
904 * configure: Regenerated to track ../common/aclocal.m4 changes.
906 2002-06-14 Chris Demetriou <cgd@broadcom.com>
907 Ed Satterthwaite <ehs@broadcom.com>
909 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
910 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
911 * mips.igen: Include mips3d.igen.
912 (mips3d): New model name for MIPS-3D ASE instructions.
913 (CVT.W.fmt): Don't use this instruction for word (source) format
915 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
916 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
917 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
918 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
919 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
920 (RSquareRoot1, RSquareRoot2): New macros.
921 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
922 (fp_rsqrt2): New functions.
923 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
924 * configure: Regenerate.
926 2002-06-13 Chris Demetriou <cgd@broadcom.com>
927 Ed Satterthwaite <ehs@broadcom.com>
929 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
930 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
931 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
932 (convert): Note that this function is not used for paired-single
934 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
935 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
936 (check_fmt_p): Enable paired-single support.
937 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
938 (PUU.PS): New instructions.
939 (CVT.S.fmt): Don't use this instruction for paired-single format
941 * sim-main.h (FP_formats): New value 'fmt_ps.'
942 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
943 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
945 2002-06-12 Chris Demetriou <cgd@broadcom.com>
947 * mips.igen: Fix formatting of function calls in
950 2002-06-12 Chris Demetriou <cgd@broadcom.com>
952 * mips.igen (MOVN, MOVZ): Trace result.
953 (TNEI): Print "tnei" as the opcode name in traces.
954 (CEIL.W): Add disassembly string for traces.
955 (RSQRT.fmt): Make location of disassembly string consistent
956 with other instructions.
958 2002-06-12 Chris Demetriou <cgd@broadcom.com>
960 * mips.igen (X): Delete unused function.
962 2002-06-08 Andrew Cagney <cagney@redhat.com>
964 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
966 2002-06-07 Chris Demetriou <cgd@broadcom.com>
967 Ed Satterthwaite <ehs@broadcom.com>
969 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
970 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
971 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
972 (fp_nmsub): New prototypes.
973 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
974 (NegMultiplySub): New defines.
975 * mips.igen (RSQRT.fmt): Use RSquareRoot().
976 (MADD.D, MADD.S): Replace with...
977 (MADD.fmt): New instruction.
978 (MSUB.D, MSUB.S): Replace with...
979 (MSUB.fmt): New instruction.
980 (NMADD.D, NMADD.S): Replace with...
981 (NMADD.fmt): New instruction.
982 (NMSUB.D, MSUB.S): Replace with...
983 (NMSUB.fmt): New instruction.
985 2002-06-07 Chris Demetriou <cgd@broadcom.com>
986 Ed Satterthwaite <ehs@broadcom.com>
988 * cp1.c: Fix more comment spelling and formatting.
989 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
990 (denorm_mode): New function.
991 (fpu_unary, fpu_binary): Round results after operation, collect
992 status from rounding operations, and update the FCSR.
993 (convert): Collect status from integer conversions and rounding
994 operations, and update the FCSR. Adjust NaN values that result
995 from conversions. Convert to use sim_io_eprintf rather than
996 fprintf, and remove some debugging code.
997 * cp1.h (fenr_FS): New define.
999 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1001 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1002 rounding mode to sim FP rounding mode flag conversion code into...
1003 (rounding_mode): New function.
1005 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1007 * cp1.c: Clean up formatting of a few comments.
1008 (value_fpr): Reformat switch statement.
1010 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1011 Ed Satterthwaite <ehs@broadcom.com>
1014 * sim-main.h: Include cp1.h.
1015 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1016 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1017 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1018 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1019 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1020 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1021 * cp1.c: Don't include sim-fpu.h; already included by
1022 sim-main.h. Clean up formatting of some comments.
1023 (NaN, Equal, Less): Remove.
1024 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1025 (fp_cmp): New functions.
1026 * mips.igen (do_c_cond_fmt): Remove.
1027 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1028 Compare. Add result tracing.
1029 (CxC1): Remove, replace with...
1030 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1031 (DMxC1): Remove, replace with...
1032 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1033 (MxC1): Remove, replace with...
1034 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1036 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1038 * sim-main.h (FGRIDX): Remove, replace all uses with...
1039 (FGR_BASE): New macro.
1040 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1041 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1042 (NR_FGR, FGR): Likewise.
1043 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1044 * mips.igen: Likewise.
1046 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1048 * cp1.c: Add an FSF Copyright notice to this file.
1050 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1051 Ed Satterthwaite <ehs@broadcom.com>
1053 * cp1.c (Infinity): Remove.
1054 * sim-main.h (Infinity): Likewise.
1056 * cp1.c (fp_unary, fp_binary): New functions.
1057 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1058 (fp_sqrt): New functions, implemented in terms of the above.
1059 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1060 (Recip, SquareRoot): Remove (replaced by functions above).
1061 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1062 (fp_recip, fp_sqrt): New prototypes.
1063 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1064 (Recip, SquareRoot): Replace prototypes with #defines which
1065 invoke the functions above.
1067 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1069 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1070 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1071 file, remove PARAMS from prototypes.
1072 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1073 simulator state arguments.
1074 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1075 pass simulator state arguments.
1076 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1077 (store_fpr, convert): Remove 'sd' argument.
1078 (value_fpr): Likewise. Convert to use 'SD' instead.
1080 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1082 * cp1.c (Min, Max): Remove #if 0'd functions.
1083 * sim-main.h (Min, Max): Remove.
1085 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1087 * cp1.c: fix formatting of switch case and default labels.
1088 * interp.c: Likewise.
1089 * sim-main.c: Likewise.
1091 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1093 * cp1.c: Clean up comments which describe FP formats.
1094 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1096 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1097 Ed Satterthwaite <ehs@broadcom.com>
1099 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1100 Broadcom SiByte SB-1 processor configurations.
1101 * configure: Regenerate.
1102 * sb1.igen: New file.
1103 * mips.igen: Include sb1.igen.
1105 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1106 * mdmx.igen: Add "sb1" model to all appropriate functions and
1108 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1109 (ob_func, ob_acc): Reference the above.
1110 (qh_acc): Adjust to keep the same size as ob_acc.
1111 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1112 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1114 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1116 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1118 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1119 Ed Satterthwaite <ehs@broadcom.com>
1121 * mips.igen (mdmx): New (pseudo-)model.
1122 * mdmx.c, mdmx.igen: New files.
1123 * Makefile.in (SIM_OBJS): Add mdmx.o.
1124 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1126 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1127 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1128 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1129 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1130 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1131 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1132 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1133 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1134 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1135 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1136 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1137 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1138 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1139 (qh_fmtsel): New macros.
1140 (_sim_cpu): New member "acc".
1141 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1142 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1144 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1146 * interp.c: Use 'deprecated' rather than 'depreciated.'
1147 * sim-main.h: Likewise.
1149 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1151 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1152 which wouldn't compile anyway.
1153 * sim-main.h (unpredictable_action): New function prototype.
1154 (Unpredictable): Define to call igen function unpredictable().
1155 (NotWordValue): New macro to call igen function not_word_value().
1156 (UndefinedResult): Remove.
1157 * interp.c (undefined_result): Remove.
1158 (unpredictable_action): New function.
1159 * mips.igen (not_word_value, unpredictable): New functions.
1160 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1161 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1162 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1163 NotWordValue() to check for unpredictable inputs, then
1164 Unpredictable() to handle them.
1166 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1168 * mips.igen: Fix formatting of calls to Unpredictable().
1170 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1172 * interp.c (sim_open): Revert previous change.
1174 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1176 * interp.c (sim_open): Disable chunk of code that wrote code in
1177 vector table entries.
1179 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1181 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1182 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1185 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1187 * cp1.c: Fix many formatting issues.
1189 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1191 * cp1.c (fpu_format_name): New function to replace...
1192 (DOFMT): This. Delete, and update all callers.
1193 (fpu_rounding_mode_name): New function to replace...
1194 (RMMODE): This. Delete, and update all callers.
1196 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1198 * interp.c: Move FPU support routines from here to...
1199 * cp1.c: Here. New file.
1200 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1201 (cp1.o): New target.
1203 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1205 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1206 * mips.igen (mips32, mips64): New models, add to all instructions
1207 and functions as appropriate.
1208 (loadstore_ea, check_u64): New variant for model mips64.
1209 (check_fmt_p): New variant for models mipsV and mips64, remove
1210 mipsV model marking fro other variant.
1213 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1214 for mips32 and mips64.
1215 (DCLO, DCLZ): New instructions for mips64.
1217 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1219 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1220 immediate or code as a hex value with the "%#lx" format.
1221 (ANDI): Likewise, and fix printed instruction name.
1223 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1225 * sim-main.h (UndefinedResult, Unpredictable): New macros
1226 which currently do nothing.
1228 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1230 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1231 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1232 (status_CU3): New definitions.
1234 * sim-main.h (ExceptionCause): Add new values for MIPS32
1235 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1236 for DebugBreakPoint and NMIReset to note their status in
1238 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1239 (SignalExceptionCacheErr): New exception macros.
1241 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1243 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1244 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1246 (SignalExceptionCoProcessorUnusable): Take as argument the
1247 unusable coprocessor number.
1249 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1251 * mips.igen: Fix formatting of all SignalException calls.
1253 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1255 * sim-main.h (SIGNEXTEND): Remove.
1257 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1259 * mips.igen: Remove gencode comment from top of file, fix
1260 spelling in another comment.
1262 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1264 * mips.igen (check_fmt, check_fmt_p): New functions to check
1265 whether specific floating point formats are usable.
1266 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1267 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1268 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1269 Use the new functions.
1270 (do_c_cond_fmt): Remove format checks...
1271 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1273 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1275 * mips.igen: Fix formatting of check_fpu calls.
1277 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1279 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1281 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1283 * mips.igen: Remove whitespace at end of lines.
1285 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1287 * mips.igen (loadstore_ea): New function to do effective
1288 address calculations.
1289 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1290 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1291 CACHE): Use loadstore_ea to do effective address computations.
1293 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1295 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1296 * mips.igen (LL, CxC1, MxC1): Likewise.
1298 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1300 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1301 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1302 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1303 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1304 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1305 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1306 Don't split opcode fields by hand, use the opcode field values
1309 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1311 * mips.igen (do_divu): Fix spacing.
1313 * mips.igen (do_dsllv): Move to be right before DSLLV,
1314 to match the rest of the do_<shift> functions.
1316 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1318 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1319 DSRL32, do_dsrlv): Trace inputs and results.
1321 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1323 * mips.igen (CACHE): Provide instruction-printing string.
1325 * interp.c (signal_exception): Comment tokens after #endif.
1327 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1329 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1330 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1331 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1332 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1333 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1334 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1335 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1336 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1338 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1340 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1341 instruction-printing string.
1342 (LWU): Use '64' as the filter flag.
1344 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1346 * mips.igen (SDXC1): Fix instruction-printing string.
1348 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1350 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1351 filter flags "32,f".
1353 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1355 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1358 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1360 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1361 add a comma) so that it more closely match the MIPS ISA
1362 documentation opcode partitioning.
1363 (PREF): Put useful names on opcode fields, and include
1364 instruction-printing string.
1366 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1368 * mips.igen (check_u64): New function which in the future will
1369 check whether 64-bit instructions are usable and signal an
1370 exception if not. Currently a no-op.
1371 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1372 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1373 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1374 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1376 * mips.igen (check_fpu): New function which in the future will
1377 check whether FPU instructions are usable and signal an exception
1378 if not. Currently a no-op.
1379 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1380 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1381 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1382 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1383 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1384 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1385 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1386 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1388 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1390 * mips.igen (do_load_left, do_load_right): Move to be immediately
1392 (do_store_left, do_store_right): Move to be immediately following
1395 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1397 * mips.igen (mipsV): New model name. Also, add it to
1398 all instructions and functions where it is appropriate.
1400 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1402 * mips.igen: For all functions and instructions, list model
1403 names that support that instruction one per line.
1405 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1407 * mips.igen: Add some additional comments about supported
1408 models, and about which instructions go where.
1409 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1410 order as is used in the rest of the file.
1412 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1414 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1415 indicating that ALU32_END or ALU64_END are there to check
1417 (DADD): Likewise, but also remove previous comment about
1420 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1422 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1423 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1424 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1425 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1426 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1427 fields (i.e., add and move commas) so that they more closely
1428 match the MIPS ISA documentation opcode partitioning.
1430 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1432 * mips.igen (ADDI): Print immediate value.
1433 (BREAK): Print code.
1434 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1435 (SLL): Print "nop" specially, and don't run the code
1436 that does the shift for the "nop" case.
1438 2001-11-17 Fred Fish <fnf@redhat.com>
1440 * sim-main.h (float_operation): Move enum declaration outside
1441 of _sim_cpu struct declaration.
1443 2001-04-12 Jim Blandy <jimb@redhat.com>
1445 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1446 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1448 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1449 PENDING_FILL, and you can get the intended effect gracefully by
1450 calling PENDING_SCHED directly.
1452 2001-02-23 Ben Elliston <bje@redhat.com>
1454 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1455 already defined elsewhere.
1457 2001-02-19 Ben Elliston <bje@redhat.com>
1459 * sim-main.h (sim_monitor): Return an int.
1460 * interp.c (sim_monitor): Add return values.
1461 (signal_exception): Handle error conditions from sim_monitor.
1463 2001-02-08 Ben Elliston <bje@redhat.com>
1465 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1466 (store_memory): Likewise, pass cia to sim_core_write*.
1468 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1470 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1471 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1473 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1475 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1476 * Makefile.in: Don't delete *.igen when cleaning directory.
1478 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1480 * m16.igen (break): Call SignalException not sim_engine_halt.
1482 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1484 From Jason Eckhardt:
1485 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1487 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1489 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1491 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1493 * mips.igen (do_dmultx): Fix typo.
1495 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1497 * configure: Regenerated to track ../common/aclocal.m4 changes.
1499 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1501 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1503 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1505 * sim-main.h (GPR_CLEAR): Define macro.
1507 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1509 * interp.c (decode_coproc): Output long using %lx and not %s.
1511 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1513 * interp.c (sim_open): Sort & extend dummy memory regions for
1514 --board=jmr3904 for eCos.
1516 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1518 * configure: Regenerated.
1520 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1522 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1523 calls, conditional on the simulator being in verbose mode.
1525 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1527 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1528 cache don't get ReservedInstruction traps.
1530 1999-11-29 Mark Salter <msalter@cygnus.com>
1532 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1533 to clear status bits in sdisr register. This is how the hardware works.
1535 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1536 being used by cygmon.
1538 1999-11-11 Andrew Haley <aph@cygnus.com>
1540 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1543 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1545 * mips.igen (MULT): Correct previous mis-applied patch.
1547 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1549 * mips.igen (delayslot32): Handle sequence like
1550 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1551 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1552 (MULT): Actually pass the third register...
1554 1999-09-03 Mark Salter <msalter@cygnus.com>
1556 * interp.c (sim_open): Added more memory aliases for additional
1557 hardware being touched by cygmon on jmr3904 board.
1559 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1561 * configure: Regenerated to track ../common/aclocal.m4 changes.
1563 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1565 * interp.c (sim_store_register): Handle case where client - GDB -
1566 specifies that a 4 byte register is 8 bytes in size.
1567 (sim_fetch_register): Ditto.
1569 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1571 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1572 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1573 (idt_monitor_base): Base address for IDT monitor traps.
1574 (pmon_monitor_base): Ditto for PMON.
1575 (lsipmon_monitor_base): Ditto for LSI PMON.
1576 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1577 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1578 (sim_firmware_command): New function.
1579 (mips_option_handler): Call it for OPTION_FIRMWARE.
1580 (sim_open): Allocate memory for idt_monitor region. If "--board"
1581 option was given, add no monitor by default. Add BREAK hooks only if
1582 monitors are also there.
1584 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1586 * interp.c (sim_monitor): Flush output before reading input.
1588 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1590 * tconfig.in (SIM_HANDLES_LMA): Always define.
1592 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1594 From Mark Salter <msalter@cygnus.com>:
1595 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1596 (sim_open): Add setup for BSP board.
1598 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1600 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1601 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1602 them as unimplemented.
1604 1999-05-08 Felix Lee <flee@cygnus.com>
1606 * configure: Regenerated to track ../common/aclocal.m4 changes.
1608 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1610 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1612 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1614 * configure.in: Any mips64vr5*-*-* target should have
1615 -DTARGET_ENABLE_FR=1.
1616 (default_endian): Any mips64vr*el-*-* target should default to
1618 * configure: Re-generate.
1620 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1622 * mips.igen (ldl): Extend from _16_, not 32.
1624 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1626 * interp.c (sim_store_register): Force registers written to by GDB
1627 into an un-interpreted state.
1629 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1631 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1632 CPU, start periodic background I/O polls.
1633 (tx3904sio_poll): New function: periodic I/O poller.
1635 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1637 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1639 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1641 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1644 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1646 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1647 (load_word): Call SIM_CORE_SIGNAL hook on error.
1648 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1649 starting. For exception dispatching, pass PC instead of NULL_CIA.
1650 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1651 * sim-main.h (COP0_BADVADDR): Define.
1652 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1653 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1654 (_sim_cpu): Add exc_* fields to store register value snapshots.
1655 * mips.igen (*): Replace memory-related SignalException* calls
1656 with references to SIM_CORE_SIGNAL hook.
1658 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1660 * sim-main.c (*): Minor warning cleanups.
1662 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1664 * m16.igen (DADDIU5): Correct type-o.
1666 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1668 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1671 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1673 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1675 (interp.o): Add dependency on itable.h
1676 (oengine.c, gencode): Delete remaining references.
1677 (BUILT_SRC_FROM_GEN): Clean up.
1679 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1682 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1683 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1684 tmp-run-hack) : New.
1685 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1686 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1687 Drop the "64" qualifier to get the HACK generator working.
1688 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1689 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1690 qualifier to get the hack generator working.
1691 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1692 (DSLL): Use do_dsll.
1693 (DSLLV): Use do_dsllv.
1694 (DSRA): Use do_dsra.
1695 (DSRL): Use do_dsrl.
1696 (DSRLV): Use do_dsrlv.
1697 (BC1): Move *vr4100 to get the HACK generator working.
1698 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1699 get the HACK generator working.
1700 (MACC) Rename to get the HACK generator working.
1701 (DMACC,MACCS,DMACCS): Add the 64.
1703 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1705 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1706 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1708 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1710 * mips/interp.c (DEBUG): Cleanups.
1712 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1714 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1715 (tx3904sio_tickle): fflush after a stdout character output.
1717 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1719 * interp.c (sim_close): Uninstall modules.
1721 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1723 * sim-main.h, interp.c (sim_monitor): Change to global
1726 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1728 * configure.in (vr4100): Only include vr4100 instructions in
1730 * configure: Re-generate.
1731 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1733 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1735 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1736 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1739 * configure.in (sim_default_gen, sim_use_gen): Replace with
1741 (--enable-sim-igen): Delete config option. Always using IGEN.
1742 * configure: Re-generate.
1744 * Makefile.in (gencode): Kill, kill, kill.
1747 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1749 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1750 bit mips16 igen simulator.
1751 * configure: Re-generate.
1753 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1754 as part of vr4100 ISA.
1755 * vr.igen: Mark all instructions as 64 bit only.
1757 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1759 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1762 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1764 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1765 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1766 * configure: Re-generate.
1768 * m16.igen (BREAK): Define breakpoint instruction.
1769 (JALX32): Mark instruction as mips16 and not r3900.
1770 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1772 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1774 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1776 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1777 insn as a debug breakpoint.
1779 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1781 (PENDING_SCHED): Clean up trace statement.
1782 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1783 (PENDING_FILL): Delay write by only one cycle.
1784 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1786 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1788 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1790 (pending_tick): Move incrementing of index to FOR statement.
1791 (pending_tick): Only update PENDING_OUT after a write has occured.
1793 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1795 * configure: Re-generate.
1797 * interp.c (sim_engine_run OLD): Delete explicit call to
1798 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1800 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1802 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1803 interrupt level number to match changed SignalExceptionInterrupt
1806 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1808 * interp.c: #include "itable.h" if WITH_IGEN.
1809 (get_insn_name): New function.
1810 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1811 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1813 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1815 * configure: Rebuilt to inhale new common/aclocal.m4.
1817 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1819 * dv-tx3904sio.c: Include sim-assert.h.
1821 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1823 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1824 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1825 Reorganize target-specific sim-hardware checks.
1826 * configure: rebuilt.
1827 * interp.c (sim_open): For tx39 target boards, set
1828 OPERATING_ENVIRONMENT, add tx3904sio devices.
1829 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1830 ROM executables. Install dv-sockser into sim-modules list.
1832 * dv-tx3904irc.c: Compiler warning clean-up.
1833 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1834 frequent hw-trace messages.
1836 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1838 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1840 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1842 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1844 * vr.igen: New file.
1845 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1846 * mips.igen: Define vr4100 model. Include vr.igen.
1847 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1849 * mips.igen (check_mf_hilo): Correct check.
1851 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1853 * sim-main.h (interrupt_event): Add prototype.
1855 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1856 register_ptr, register_value.
1857 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1859 * sim-main.h (tracefh): Make extern.
1861 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1863 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1864 Reduce unnecessarily high timer event frequency.
1865 * dv-tx3904cpu.c: Ditto for interrupt event.
1867 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1869 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1871 (interrupt_event): Made non-static.
1873 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1874 interchange of configuration values for external vs. internal
1877 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1879 * mips.igen (BREAK): Moved code to here for
1880 simulator-reserved break instructions.
1881 * gencode.c (build_instruction): Ditto.
1882 * interp.c (signal_exception): Code moved from here. Non-
1883 reserved instructions now use exception vector, rather
1885 * sim-main.h: Moved magic constants to here.
1887 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1889 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1890 register upon non-zero interrupt event level, clear upon zero
1892 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1893 by passing zero event value.
1894 (*_io_{read,write}_buffer): Endianness fixes.
1895 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1896 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1898 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1899 serial I/O and timer module at base address 0xFFFF0000.
1901 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1903 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1906 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1908 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1910 * configure: Update.
1912 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1914 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1915 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1916 * configure.in: Include tx3904tmr in hw_device list.
1917 * configure: Rebuilt.
1918 * interp.c (sim_open): Instantiate three timer instances.
1919 Fix address typo of tx3904irc instance.
1921 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1923 * interp.c (signal_exception): SystemCall exception now uses
1924 the exception vector.
1926 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1928 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1931 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1935 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1937 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1939 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1940 sim-main.h. Declare a struct hw_descriptor instead of struct
1941 hw_device_descriptor.
1943 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1945 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1946 right bits and then re-align left hand bytes to correct byte
1947 lanes. Fix incorrect computation in do_store_left when loading
1948 bytes from second word.
1950 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1952 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1953 * interp.c (sim_open): Only create a device tree when HW is
1956 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1957 * interp.c (signal_exception): Ditto.
1959 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1961 * gencode.c: Mark BEGEZALL as LIKELY.
1963 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1965 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1966 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1968 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1970 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1971 modules. Recognize TX39 target with "mips*tx39" pattern.
1972 * configure: Rebuilt.
1973 * sim-main.h (*): Added many macros defining bits in
1974 TX39 control registers.
1975 (SignalInterrupt): Send actual PC instead of NULL.
1976 (SignalNMIReset): New exception type.
1977 * interp.c (board): New variable for future use to identify
1978 a particular board being simulated.
1979 (mips_option_handler,mips_options): Added "--board" option.
1980 (interrupt_event): Send actual PC.
1981 (sim_open): Make memory layout conditional on board setting.
1982 (signal_exception): Initial implementation of hardware interrupt
1983 handling. Accept another break instruction variant for simulator
1985 (decode_coproc): Implement RFE instruction for TX39.
1986 (mips.igen): Decode RFE instruction as such.
1987 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1988 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1989 bbegin to implement memory map.
1990 * dv-tx3904cpu.c: New file.
1991 * dv-tx3904irc.c: New file.
1993 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1995 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1997 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1999 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2000 with calls to check_div_hilo.
2002 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2004 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2005 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2006 Add special r3900 version of do_mult_hilo.
2007 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2008 with calls to check_mult_hilo.
2009 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2010 with calls to check_div_hilo.
2012 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2014 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2015 Document a replacement.
2017 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2019 * interp.c (sim_monitor): Make mon_printf work.
2021 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2023 * sim-main.h (INSN_NAME): New arg `cpu'.
2025 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2027 * configure: Regenerated to track ../common/aclocal.m4 changes.
2029 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2031 * configure: Regenerated to track ../common/aclocal.m4 changes.
2034 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2036 * acconfig.h: New file.
2037 * configure.in: Reverted change of Apr 24; use sinclude again.
2039 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2041 * configure: Regenerated to track ../common/aclocal.m4 changes.
2044 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2046 * configure.in: Don't call sinclude.
2048 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2050 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2052 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2054 * mips.igen (ERET): Implement.
2056 * interp.c (decode_coproc): Return sign-extended EPC.
2058 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2060 * interp.c (signal_exception): Do not ignore Trap.
2061 (signal_exception): On TRAP, restart at exception address.
2062 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2063 (signal_exception): Update.
2064 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2065 so that TRAP instructions are caught.
2067 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2069 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2070 contains HI/LO access history.
2071 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2072 (HIACCESS, LOACCESS): Delete, replace with
2073 (HIHISTORY, LOHISTORY): New macros.
2074 (CHECKHILO): Delete all, moved to mips.igen
2076 * gencode.c (build_instruction): Do not generate checks for
2077 correct HI/LO register usage.
2079 * interp.c (old_engine_run): Delete checks for correct HI/LO
2082 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2083 check_mf_cycles): New functions.
2084 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2085 do_divu, domultx, do_mult, do_multu): Use.
2087 * tx.igen ("madd", "maddu"): Use.
2089 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2091 * mips.igen (DSRAV): Use function do_dsrav.
2092 (SRAV): Use new function do_srav.
2094 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2095 (B): Sign extend 11 bit immediate.
2096 (EXT-B*): Shift 16 bit immediate left by 1.
2097 (ADDIU*): Don't sign extend immediate value.
2099 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2101 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2103 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2106 * mips.igen (delayslot32, nullify_next_insn): New functions.
2107 (m16.igen): Always include.
2108 (do_*): Add more tracing.
2110 * m16.igen (delayslot16): Add NIA argument, could be called by a
2111 32 bit MIPS16 instruction.
2113 * interp.c (ifetch16): Move function from here.
2114 * sim-main.c (ifetch16): To here.
2116 * sim-main.c (ifetch16, ifetch32): Update to match current
2117 implementations of LH, LW.
2118 (signal_exception): Don't print out incorrect hex value of illegal
2121 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2123 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2126 * m16.igen: Implement MIPS16 instructions.
2128 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2129 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2130 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2131 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2132 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2133 bodies of corresponding code from 32 bit insn to these. Also used
2134 by MIPS16 versions of functions.
2136 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2137 (IMEM16): Drop NR argument from macro.
2139 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2141 * Makefile.in (SIM_OBJS): Add sim-main.o.
2143 * sim-main.h (address_translation, load_memory, store_memory,
2144 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2146 (pr_addr, pr_uword64): Declare.
2147 (sim-main.c): Include when H_REVEALS_MODULE_P.
2149 * interp.c (address_translation, load_memory, store_memory,
2150 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2152 * sim-main.c: To here. Fix compilation problems.
2154 * configure.in: Enable inlining.
2155 * configure: Re-config.
2157 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2159 * configure: Regenerated to track ../common/aclocal.m4 changes.
2161 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2163 * mips.igen: Include tx.igen.
2164 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2165 * tx.igen: New file, contains MADD and MADDU.
2167 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2168 the hardwired constant `7'.
2169 (store_memory): Ditto.
2170 (LOADDRMASK): Move definition to sim-main.h.
2172 mips.igen (MTC0): Enable for r3900.
2175 mips.igen (do_load_byte): Delete.
2176 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2177 do_store_right): New functions.
2178 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2180 configure.in: Let the tx39 use igen again.
2183 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2185 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2186 not an address sized quantity. Return zero for cache sizes.
2188 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2190 * mips.igen (r3900): r3900 does not support 64 bit integer
2193 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2195 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2197 * configure : Rebuild.
2199 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2201 * configure: Regenerated to track ../common/aclocal.m4 changes.
2203 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2205 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2207 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2209 * configure: Regenerated to track ../common/aclocal.m4 changes.
2210 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2212 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2214 * configure: Regenerated to track ../common/aclocal.m4 changes.
2216 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2218 * interp.c (Max, Min): Comment out functions. Not yet used.
2220 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2222 * configure: Regenerated to track ../common/aclocal.m4 changes.
2224 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2226 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2227 configurable settings for stand-alone simulator.
2229 * configure.in: Added X11 search, just in case.
2231 * configure: Regenerated.
2233 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2235 * interp.c (sim_write, sim_read, load_memory, store_memory):
2236 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2238 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2240 * sim-main.h (GETFCC): Return an unsigned value.
2242 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2244 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2245 (DADD): Result destination is RD not RT.
2247 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2249 * sim-main.h (HIACCESS, LOACCESS): Always define.
2251 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2253 * interp.c (sim_info): Delete.
2255 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2257 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2258 (mips_option_handler): New argument `cpu'.
2259 (sim_open): Update call to sim_add_option_table.
2261 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2263 * mips.igen (CxC1): Add tracing.
2265 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2267 * sim-main.h (Max, Min): Declare.
2269 * interp.c (Max, Min): New functions.
2271 * mips.igen (BC1): Add tracing.
2273 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2275 * interp.c Added memory map for stack in vr4100
2277 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2279 * interp.c (load_memory): Add missing "break"'s.
2281 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2283 * interp.c (sim_store_register, sim_fetch_register): Pass in
2284 length parameter. Return -1.
2286 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2288 * interp.c: Added hardware init hook, fixed warnings.
2290 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2292 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2294 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2296 * interp.c (ifetch16): New function.
2298 * sim-main.h (IMEM32): Rename IMEM.
2299 (IMEM16_IMMED): Define.
2301 (DELAY_SLOT): Update.
2303 * m16run.c (sim_engine_run): New file.
2305 * m16.igen: All instructions except LB.
2306 (LB): Call do_load_byte.
2307 * mips.igen (do_load_byte): New function.
2308 (LB): Call do_load_byte.
2310 * mips.igen: Move spec for insn bit size and high bit from here.
2311 * Makefile.in (tmp-igen, tmp-m16): To here.
2313 * m16.dc: New file, decode mips16 instructions.
2315 * Makefile.in (SIM_NO_ALL): Define.
2316 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2318 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2320 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2321 point unit to 32 bit registers.
2322 * configure: Re-generate.
2324 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2326 * configure.in (sim_use_gen): Make IGEN the default simulator
2327 generator for generic 32 and 64 bit mips targets.
2328 * configure: Re-generate.
2330 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2332 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2335 * interp.c (sim_fetch_register, sim_store_register): Read/write
2336 FGR from correct location.
2337 (sim_open): Set size of FGR's according to
2338 WITH_TARGET_FLOATING_POINT_BITSIZE.
2340 * sim-main.h (FGR): Store floating point registers in a separate
2343 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2345 * configure: Regenerated to track ../common/aclocal.m4 changes.
2347 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2349 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2351 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2353 * interp.c (pending_tick): New function. Deliver pending writes.
2355 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2356 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2357 it can handle mixed sized quantites and single bits.
2359 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2361 * interp.c (oengine.h): Do not include when building with IGEN.
2362 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2363 (sim_info): Ditto for PROCESSOR_64BIT.
2364 (sim_monitor): Replace ut_reg with unsigned_word.
2365 (*): Ditto for t_reg.
2366 (LOADDRMASK): Define.
2367 (sim_open): Remove defunct check that host FP is IEEE compliant,
2368 using software to emulate floating point.
2369 (value_fpr, ...): Always compile, was conditional on HASFPU.
2371 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2373 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2376 * interp.c (SD, CPU): Define.
2377 (mips_option_handler): Set flags in each CPU.
2378 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2379 (sim_close): Do not clear STATE, deleted anyway.
2380 (sim_write, sim_read): Assume CPU zero's vm should be used for
2382 (sim_create_inferior): Set the PC for all processors.
2383 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2385 (mips16_entry): Pass correct nr of args to store_word, load_word.
2386 (ColdReset): Cold reset all cpu's.
2387 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2388 (sim_monitor, load_memory, store_memory, signal_exception): Use
2389 `CPU' instead of STATE_CPU.
2392 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2395 * sim-main.h (signal_exception): Add sim_cpu arg.
2396 (SignalException*): Pass both SD and CPU to signal_exception.
2397 * interp.c (signal_exception): Update.
2399 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2401 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2402 address_translation): Ditto
2403 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2405 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2407 * configure: Regenerated to track ../common/aclocal.m4 changes.
2409 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2411 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2413 * mips.igen (model): Map processor names onto BFD name.
2415 * sim-main.h (CPU_CIA): Delete.
2416 (SET_CIA, GET_CIA): Define
2418 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2420 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2423 * configure.in (default_endian): Configure a big-endian simulator
2425 * configure: Re-generate.
2427 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2429 * configure: Regenerated to track ../common/aclocal.m4 changes.
2431 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2433 * interp.c (sim_monitor): Handle Densan monitor outbyte
2434 and inbyte functions.
2436 1997-12-29 Felix Lee <flee@cygnus.com>
2438 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2440 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2442 * Makefile.in (tmp-igen): Arrange for $zero to always be
2443 reset to zero after every instruction.
2445 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2447 * configure: Regenerated to track ../common/aclocal.m4 changes.
2450 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2452 * mips.igen (MSUB): Fix to work like MADD.
2453 * gencode.c (MSUB): Similarly.
2455 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2457 * configure: Regenerated to track ../common/aclocal.m4 changes.
2459 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2461 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2463 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2465 * sim-main.h (sim-fpu.h): Include.
2467 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2468 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2469 using host independant sim_fpu module.
2471 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2473 * interp.c (signal_exception): Report internal errors with SIGABRT
2476 * sim-main.h (C0_CONFIG): New register.
2477 (signal.h): No longer include.
2479 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2481 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2483 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2485 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2487 * mips.igen: Tag vr5000 instructions.
2488 (ANDI): Was missing mipsIV model, fix assembler syntax.
2489 (do_c_cond_fmt): New function.
2490 (C.cond.fmt): Handle mips I-III which do not support CC field
2492 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2493 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2495 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2496 vr5000 which saves LO in a GPR separatly.
2498 * configure.in (enable-sim-igen): For vr5000, select vr5000
2499 specific instructions.
2500 * configure: Re-generate.
2502 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2504 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2506 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2507 fmt_uninterpreted_64 bit cases to switch. Convert to
2510 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2512 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2513 as specified in IV3.2 spec.
2514 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2516 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2518 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2519 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2520 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2521 PENDING_FILL versions of instructions. Simplify.
2523 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2525 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2527 (MTHI, MFHI): Disable code checking HI-LO.
2529 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2531 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2533 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2535 * gencode.c (build_mips16_operands): Replace IPC with cia.
2537 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2538 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2540 (UndefinedResult): Replace function with macro/function
2542 (sim_engine_run): Don't save PC in IPC.
2544 * sim-main.h (IPC): Delete.
2547 * interp.c (signal_exception, store_word, load_word,
2548 address_translation, load_memory, store_memory, cache_op,
2549 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2550 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2551 current instruction address - cia - argument.
2552 (sim_read, sim_write): Call address_translation directly.
2553 (sim_engine_run): Rename variable vaddr to cia.
2554 (signal_exception): Pass cia to sim_monitor
2556 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2557 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2558 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2560 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2561 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2564 * interp.c (signal_exception): Pass restart address to
2567 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2568 idecode.o): Add dependency.
2570 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2572 (DELAY_SLOT): Update NIA not PC with branch address.
2573 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2575 * mips.igen: Use CIA not PC in branch calculations.
2576 (illegal): Call SignalException.
2577 (BEQ, ADDIU): Fix assembler.
2579 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2581 * m16.igen (JALX): Was missing.
2583 * configure.in (enable-sim-igen): New configuration option.
2584 * configure: Re-generate.
2586 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2588 * interp.c (load_memory, store_memory): Delete parameter RAW.
2589 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2590 bypassing {load,store}_memory.
2592 * sim-main.h (ByteSwapMem): Delete definition.
2594 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2596 * interp.c (sim_do_command, sim_commands): Delete mips specific
2597 commands. Handled by module sim-options.
2599 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2600 (WITH_MODULO_MEMORY): Define.
2602 * interp.c (sim_info): Delete code printing memory size.
2604 * interp.c (mips_size): Nee sim_size, delete function.
2606 (monitor, monitor_base, monitor_size): Delete global variables.
2607 (sim_open, sim_close): Delete code creating monitor and other
2608 memory regions. Use sim-memopts module, via sim_do_commandf, to
2609 manage memory regions.
2610 (load_memory, store_memory): Use sim-core for memory model.
2612 * interp.c (address_translation): Delete all memory map code
2613 except line forcing 32 bit addresses.
2615 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2617 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2620 * interp.c (logfh, logfile): Delete globals.
2621 (sim_open, sim_close): Delete code opening & closing log file.
2622 (mips_option_handler): Delete -l and -n options.
2623 (OPTION mips_options): Ditto.
2625 * interp.c (OPTION mips_options): Rename option trace to dinero.
2626 (mips_option_handler): Update.
2628 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2630 * interp.c (fetch_str): New function.
2631 (sim_monitor): Rewrite using sim_read & sim_write.
2632 (sim_open): Check magic number.
2633 (sim_open): Write monitor vectors into memory using sim_write.
2634 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2635 (sim_read, sim_write): Simplify - transfer data one byte at a
2637 (load_memory, store_memory): Clarify meaning of parameter RAW.
2639 * sim-main.h (isHOST): Defete definition.
2640 (isTARGET): Mark as depreciated.
2641 (address_translation): Delete parameter HOST.
2643 * interp.c (address_translation): Delete parameter HOST.
2645 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2649 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2650 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2652 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2654 * mips.igen: Add model filter field to records.
2656 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2658 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2660 interp.c (sim_engine_run): Do not compile function sim_engine_run
2661 when WITH_IGEN == 1.
2663 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2664 target architecture.
2666 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2667 igen. Replace with configuration variables sim_igen_flags /
2670 * m16.igen: New file. Copy mips16 insns here.
2671 * mips.igen: From here.
2673 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2675 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2677 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2679 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2681 * gencode.c (build_instruction): Follow sim_write's lead in using
2682 BigEndianMem instead of !ByteSwapMem.
2684 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2686 * configure.in (sim_gen): Dependent on target, select type of
2687 generator. Always select old style generator.
2689 configure: Re-generate.
2691 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2693 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2694 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2695 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2696 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2697 SIM_@sim_gen@_*, set by autoconf.
2699 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2701 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2703 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2704 CURRENT_FLOATING_POINT instead.
2706 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2707 (address_translation): Raise exception InstructionFetch when
2708 translation fails and isINSTRUCTION.
2710 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2711 sim_engine_run): Change type of of vaddr and paddr to
2713 (address_translation, prefetch, load_memory, store_memory,
2714 cache_op): Change type of vAddr and pAddr to address_word.
2716 * gencode.c (build_instruction): Change type of vaddr and paddr to
2719 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2722 macro to obtain result of ALU op.
2724 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * interp.c (sim_info): Call profile_print.
2728 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2732 * sim-main.h (WITH_PROFILE): Do not define, defined in
2733 common/sim-config.h. Use sim-profile module.
2734 (simPROFILE): Delete defintion.
2736 * interp.c (PROFILE): Delete definition.
2737 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2738 (sim_close): Delete code writing profile histogram.
2739 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2741 (sim_engine_run): Delete code profiling the PC.
2743 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2745 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2747 * interp.c (sim_monitor): Make register pointers of type
2750 * sim-main.h: Make registers of type unsigned_word not
2753 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2755 * interp.c (sync_operation): Rename from SyncOperation, make
2756 global, add SD argument.
2757 (prefetch): Rename from Prefetch, make global, add SD argument.
2758 (decode_coproc): Make global.
2760 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2762 * gencode.c (build_instruction): Generate DecodeCoproc not
2763 decode_coproc calls.
2765 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2766 (SizeFGR): Move to sim-main.h
2767 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2768 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2769 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2771 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2772 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2773 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2774 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2775 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2776 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2778 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2780 (sim-alu.h): Include.
2781 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2782 (sim_cia): Typedef to instruction_address.
2784 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2786 * Makefile.in (interp.o): Rename generated file engine.c to
2791 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2795 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2797 * gencode.c (build_instruction): For "FPSQRT", output correct
2798 number of arguments to Recip.
2800 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2802 * Makefile.in (interp.o): Depends on sim-main.h
2804 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2806 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2807 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2808 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2809 STATE, DSSTATE): Define
2810 (GPR, FGRIDX, ..): Define.
2812 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2813 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2814 (GPR, FGRIDX, ...): Delete macros.
2816 * interp.c: Update names to match defines from sim-main.h
2818 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2820 * interp.c (sim_monitor): Add SD argument.
2821 (sim_warning): Delete. Replace calls with calls to
2823 (sim_error): Delete. Replace calls with sim_io_error.
2824 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2825 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2826 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2828 (mips_size): Rename from sim_size. Add SD argument.
2830 * interp.c (simulator): Delete global variable.
2831 (callback): Delete global variable.
2832 (mips_option_handler, sim_open, sim_write, sim_read,
2833 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2834 sim_size,sim_monitor): Use sim_io_* not callback->*.
2835 (sim_open): ZALLOC simulator struct.
2836 (PROFILE): Do not define.
2838 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2840 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2841 support.h with corresponding code.
2843 * sim-main.h (word64, uword64), support.h: Move definition to
2845 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2848 * Makefile.in: Update dependencies
2849 * interp.c: Do not include.
2851 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2853 * interp.c (address_translation, load_memory, store_memory,
2854 cache_op): Rename to from AddressTranslation et.al., make global,
2857 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2860 * interp.c (SignalException): Rename to signal_exception, make
2863 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2865 * sim-main.h (SignalException, SignalExceptionInterrupt,
2866 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2867 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2868 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2871 * interp.c, support.h: Use.
2873 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2875 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2876 to value_fpr / store_fpr. Add SD argument.
2877 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2878 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2880 * sim-main.h (ValueFPR, StoreFPR): Define.
2882 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2884 * interp.c (sim_engine_run): Check consistency between configure
2885 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2888 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2889 (mips_fpu): Configure WITH_FLOATING_POINT.
2890 (mips_endian): Configure WITH_TARGET_ENDIAN.
2891 * configure: Update.
2893 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2895 * configure: Regenerated to track ../common/aclocal.m4 changes.
2897 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2899 * configure: Regenerated.
2901 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2903 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2905 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * gencode.c (print_igen_insn_models): Assume certain architectures
2908 include all mips* instructions.
2909 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2912 * Makefile.in (tmp.igen): Add target. Generate igen input from
2915 * gencode.c (FEATURE_IGEN): Define.
2916 (main): Add --igen option. Generate output in igen format.
2917 (process_instructions): Format output according to igen option.
2918 (print_igen_insn_format): New function.
2919 (print_igen_insn_models): New function.
2920 (process_instructions): Only issue warnings and ignore
2921 instructions when no FEATURE_IGEN.
2923 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2925 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2928 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2930 * configure: Regenerated to track ../common/aclocal.m4 changes.
2932 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2934 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2935 SIM_RESERVED_BITS): Delete, moved to common.
2936 (SIM_EXTRA_CFLAGS): Update.
2938 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2940 * configure.in: Configure non-strict memory alignment.
2941 * configure: Regenerated to track ../common/aclocal.m4 changes.
2943 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2945 * configure: Regenerated to track ../common/aclocal.m4 changes.
2947 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2949 * gencode.c (SDBBP,DERET): Added (3900) insns.
2950 (RFE): Turn on for 3900.
2951 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2952 (dsstate): Made global.
2953 (SUBTARGET_R3900): Added.
2954 (CANCELDELAYSLOT): New.
2955 (SignalException): Ignore SystemCall rather than ignore and
2956 terminate. Add DebugBreakPoint handling.
2957 (decode_coproc): New insns RFE, DERET; and new registers Debug
2958 and DEPC protected by SUBTARGET_R3900.
2959 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2961 * Makefile.in,configure.in: Add mips subtarget option.
2962 * configure: Update.
2964 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2966 * gencode.c: Add r3900 (tx39).
2969 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2971 * gencode.c (build_instruction): Don't need to subtract 4 for
2974 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2976 * interp.c: Correct some HASFPU problems.
2978 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2980 * configure: Regenerated to track ../common/aclocal.m4 changes.
2982 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2984 * interp.c (mips_options): Fix samples option short form, should
2987 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2989 * interp.c (sim_info): Enable info code. Was just returning.
2991 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2993 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2996 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2998 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3000 (build_instruction): Ditto for LL.
3002 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3004 * configure: Regenerated to track ../common/aclocal.m4 changes.
3006 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3008 * configure: Regenerated to track ../common/aclocal.m4 changes.
3011 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3013 * interp.c (sim_open): Add call to sim_analyze_program, update
3016 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3018 * interp.c (sim_kill): Delete.
3019 (sim_create_inferior): Add ABFD argument. Set PC from same.
3020 (sim_load): Move code initializing trap handlers from here.
3021 (sim_open): To here.
3022 (sim_load): Delete, use sim-hload.c.
3024 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3026 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3028 * configure: Regenerated to track ../common/aclocal.m4 changes.
3031 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3033 * interp.c (sim_open): Add ABFD argument.
3034 (sim_load): Move call to sim_config from here.
3035 (sim_open): To here. Check return status.
3037 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3039 * gencode.c (build_instruction): Two arg MADD should
3040 not assign result to $0.
3042 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3044 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3045 * sim/mips/configure.in: Regenerate.
3047 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3049 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3050 signed8, unsigned8 et.al. types.
3052 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3053 hosts when selecting subreg.
3055 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3057 * interp.c (sim_engine_run): Reset the ZERO register to zero
3058 regardless of FEATURE_WARN_ZERO.
3059 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3061 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3063 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3064 (SignalException): For BreakPoints ignore any mode bits and just
3066 (SignalException): Always set the CAUSE register.
3068 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3070 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3071 exception has been taken.
3073 * interp.c: Implement the ERET and mt/f sr instructions.
3075 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3077 * interp.c (SignalException): Don't bother restarting an
3080 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3082 * interp.c (SignalException): Really take an interrupt.
3083 (interrupt_event): Only deliver interrupts when enabled.
3085 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3087 * interp.c (sim_info): Only print info when verbose.
3088 (sim_info) Use sim_io_printf for output.
3090 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3092 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3095 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3097 * interp.c (sim_do_command): Check for common commands if a
3098 simulator specific command fails.
3100 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3102 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3103 and simBE when DEBUG is defined.
3105 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3107 * interp.c (interrupt_event): New function. Pass exception event
3108 onto exception handler.
3110 * configure.in: Check for stdlib.h.
3111 * configure: Regenerate.
3113 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3114 variable declaration.
3115 (build_instruction): Initialize memval1.
3116 (build_instruction): Add UNUSED attribute to byte, bigend,
3118 (build_operands): Ditto.
3120 * interp.c: Fix GCC warnings.
3121 (sim_get_quit_code): Delete.
3123 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3124 * Makefile.in: Ditto.
3125 * configure: Re-generate.
3127 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3129 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3131 * interp.c (mips_option_handler): New function parse argumes using
3133 (myname): Replace with STATE_MY_NAME.
3134 (sim_open): Delete check for host endianness - performed by
3136 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3137 (sim_open): Move much of the initialization from here.
3138 (sim_load): To here. After the image has been loaded and
3140 (sim_open): Move ColdReset from here.
3141 (sim_create_inferior): To here.
3142 (sim_open): Make FP check less dependant on host endianness.
3144 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3146 * interp.c (sim_set_callbacks): Delete.
3148 * interp.c (membank, membank_base, membank_size): Replace with
3149 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3150 (sim_open): Remove call to callback->init. gdb/run do this.
3154 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3156 * interp.c (big_endian_p): Delete, replaced by
3157 current_target_byte_order.
3159 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3161 * interp.c (host_read_long, host_read_word, host_swap_word,
3162 host_swap_long): Delete. Using common sim-endian.
3163 (sim_fetch_register, sim_store_register): Use H2T.
3164 (pipeline_ticks): Delete. Handled by sim-events.
3166 (sim_engine_run): Update.
3168 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3170 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3172 (SignalException): To here. Signal using sim_engine_halt.
3173 (sim_stop_reason): Delete, moved to common.
3175 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3177 * interp.c (sim_open): Add callback argument.
3178 (sim_set_callbacks): Delete SIM_DESC argument.
3181 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3183 * Makefile.in (SIM_OBJS): Add common modules.
3185 * interp.c (sim_set_callbacks): Also set SD callback.
3186 (set_endianness, xfer_*, swap_*): Delete.
3187 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3188 Change to functions using sim-endian macros.
3189 (control_c, sim_stop): Delete, use common version.
3190 (simulate): Convert into.
3191 (sim_engine_run): This function.
3192 (sim_resume): Delete.
3194 * interp.c (simulation): New variable - the simulator object.
3195 (sim_kind): Delete global - merged into simulation.
3196 (sim_load): Cleanup. Move PC assignment from here.
3197 (sim_create_inferior): To here.
3199 * sim-main.h: New file.
3200 * interp.c (sim-main.h): Include.
3202 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3204 * configure: Regenerated to track ../common/aclocal.m4 changes.
3206 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3208 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3210 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3212 * gencode.c (build_instruction): DIV instructions: check
3213 for division by zero and integer overflow before using
3214 host's division operation.
3216 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3218 * Makefile.in (SIM_OBJS): Add sim-load.o.
3219 * interp.c: #include bfd.h.
3220 (target_byte_order): Delete.
3221 (sim_kind, myname, big_endian_p): New static locals.
3222 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3223 after argument parsing. Recognize -E arg, set endianness accordingly.
3224 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3225 load file into simulator. Set PC from bfd.
3226 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3227 (set_endianness): Use big_endian_p instead of target_byte_order.
3229 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3231 * interp.c (sim_size): Delete prototype - conflicts with
3232 definition in remote-sim.h. Correct definition.
3234 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3236 * configure: Regenerated to track ../common/aclocal.m4 changes.
3239 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3241 * interp.c (sim_open): New arg `kind'.
3243 * configure: Regenerated to track ../common/aclocal.m4 changes.
3245 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3247 * configure: Regenerated to track ../common/aclocal.m4 changes.
3249 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3251 * interp.c (sim_open): Set optind to 0 before calling getopt.
3253 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3255 * configure: Regenerated to track ../common/aclocal.m4 changes.
3257 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3259 * interp.c : Replace uses of pr_addr with pr_uword64
3260 where the bit length is always 64 independent of SIM_ADDR.
3261 (pr_uword64) : added.
3263 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3265 * configure: Re-generate.
3267 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3269 * configure: Regenerate to track ../common/aclocal.m4 changes.
3271 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3273 * interp.c (sim_open): New SIM_DESC result. Argument is now
3275 (other sim_*): New SIM_DESC argument.
3277 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3279 * interp.c: Fix printing of addresses for non-64-bit targets.
3280 (pr_addr): Add function to print address based on size.
3282 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3284 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3286 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3288 * gencode.c (build_mips16_operands): Correct computation of base
3289 address for extended PC relative instruction.
3291 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3293 * interp.c (mips16_entry): Add support for floating point cases.
3294 (SignalException): Pass floating point cases to mips16_entry.
3295 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3297 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3299 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3300 and then set the state to fmt_uninterpreted.
3301 (COP_SW): Temporarily set the state to fmt_word while calling
3304 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3306 * gencode.c (build_instruction): The high order may be set in the
3307 comparison flags at any ISA level, not just ISA 4.
3309 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3311 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3312 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3313 * configure.in: sinclude ../common/aclocal.m4.
3314 * configure: Regenerated.
3316 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3318 * configure: Rebuild after change to aclocal.m4.
3320 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3322 * configure configure.in Makefile.in: Update to new configure
3323 scheme which is more compatible with WinGDB builds.
3324 * configure.in: Improve comment on how to run autoconf.
3325 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3326 * Makefile.in: Use autoconf substitution to install common
3329 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3331 * gencode.c (build_instruction): Use BigEndianCPU instead of
3334 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3336 * interp.c (sim_monitor): Make output to stdout visible in
3337 wingdb's I/O log window.
3339 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3341 * support.h: Undo previous change to SIGTRAP
3344 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3346 * interp.c (store_word, load_word): New static functions.
3347 (mips16_entry): New static function.
3348 (SignalException): Look for mips16 entry and exit instructions.
3349 (simulate): Use the correct index when setting fpr_state after
3350 doing a pending move.
3352 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3354 * interp.c: Fix byte-swapping code throughout to work on
3355 both little- and big-endian hosts.
3357 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3359 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3360 with gdb/config/i386/xm-windows.h.
3362 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3364 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3365 that messes up arithmetic shifts.
3367 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3369 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3370 SIGTRAP and SIGQUIT for _WIN32.
3372 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3374 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3375 force a 64 bit multiplication.
3376 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3377 destination register is 0, since that is the default mips16 nop
3380 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3382 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3383 (build_endian_shift): Don't check proc64.
3384 (build_instruction): Always set memval to uword64. Cast op2 to
3385 uword64 when shifting it left in memory instructions. Always use
3386 the same code for stores--don't special case proc64.
3388 * gencode.c (build_mips16_operands): Fix base PC value for PC
3390 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3392 * interp.c (simJALDELAYSLOT): Define.
3393 (JALDELAYSLOT): Define.
3394 (INDELAYSLOT, INJALDELAYSLOT): Define.
3395 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3397 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3399 * interp.c (sim_open): add flush_cache as a PMON routine
3400 (sim_monitor): handle flush_cache by ignoring it
3402 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3404 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3406 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3407 (BigEndianMem): Rename to ByteSwapMem and change sense.
3408 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3409 BigEndianMem references to !ByteSwapMem.
3410 (set_endianness): New function, with prototype.
3411 (sim_open): Call set_endianness.
3412 (sim_info): Use simBE instead of BigEndianMem.
3413 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3414 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3415 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3416 ifdefs, keeping the prototype declaration.
3417 (swap_word): Rewrite correctly.
3418 (ColdReset): Delete references to CONFIG. Delete endianness related
3419 code; moved to set_endianness.
3421 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3423 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3424 * interp.c (CHECKHILO): Define away.
3425 (simSIGINT): New macro.
3426 (membank_size): Increase from 1MB to 2MB.
3427 (control_c): New function.
3428 (sim_resume): Rename parameter signal to signal_number. Add local
3429 variable prev. Call signal before and after simulate.
3430 (sim_stop_reason): Add simSIGINT support.
3431 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3433 (sim_warning): Delete call to SignalException. Do call printf_filtered
3435 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3436 a call to sim_warning.
3438 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3440 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3441 16 bit instructions.
3443 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3445 Add support for mips16 (16 bit MIPS implementation):
3446 * gencode.c (inst_type): Add mips16 instruction encoding types.
3447 (GETDATASIZEINSN): Define.
3448 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3449 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3451 (MIPS16_DECODE): New table, for mips16 instructions.
3452 (bitmap_val): New static function.
3453 (struct mips16_op): Define.
3454 (mips16_op_table): New table, for mips16 operands.
3455 (build_mips16_operands): New static function.
3456 (process_instructions): If PC is odd, decode a mips16
3457 instruction. Break out instruction handling into new
3458 build_instruction function.
3459 (build_instruction): New static function, broken out of
3460 process_instructions. Check modifiers rather than flags for SHIFT
3461 bit count and m[ft]{hi,lo} direction.
3462 (usage): Pass program name to fprintf.
3463 (main): Remove unused variable this_option_optind. Change
3464 ``*loptarg++'' to ``loptarg++''.
3465 (my_strtoul): Parenthesize && within ||.
3466 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3467 (simulate): If PC is odd, fetch a 16 bit instruction, and
3468 increment PC by 2 rather than 4.
3469 * configure.in: Add case for mips16*-*-*.
3470 * configure: Rebuild.
3472 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3474 * interp.c: Allow -t to enable tracing in standalone simulator.
3475 Fix garbage output in trace file and error messages.
3477 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3479 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3480 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3481 * configure.in: Simplify using macros in ../common/aclocal.m4.
3482 * configure: Regenerated.
3483 * tconfig.in: New file.
3485 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3487 * interp.c: Fix bugs in 64-bit port.
3488 Use ansi function declarations for msvc compiler.
3489 Initialize and test file pointer in trace code.
3490 Prevent duplicate definition of LAST_EMED_REGNUM.
3492 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3494 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3496 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3498 * interp.c (SignalException): Check for explicit terminating
3500 * gencode.c: Pass instruction value through SignalException()
3501 calls for Trap, Breakpoint and Syscall.
3503 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3505 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3506 only used on those hosts that provide it.
3507 * configure.in: Add sqrt() to list of functions to be checked for.
3508 * config.in: Re-generated.
3509 * configure: Re-generated.
3511 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3513 * gencode.c (process_instructions): Call build_endian_shift when
3514 expanding STORE RIGHT, to fix swr.
3515 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3516 clear the high bits.
3517 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3518 Fix float to int conversions to produce signed values.
3520 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3522 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3523 (process_instructions): Correct handling of nor instruction.
3524 Correct shift count for 32 bit shift instructions. Correct sign
3525 extension for arithmetic shifts to not shift the number of bits in
3526 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3527 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3529 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3530 It's OK to have a mult follow a mult. What's not OK is to have a
3531 mult follow an mfhi.
3532 (Convert): Comment out incorrect rounding code.
3534 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3536 * interp.c (sim_monitor): Improved monitor printf
3537 simulation. Tidied up simulator warnings, and added "--log" option
3538 for directing warning message output.
3539 * gencode.c: Use sim_warning() rather than WARNING macro.
3541 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3543 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3544 getopt1.o, rather than on gencode.c. Link objects together.
3545 Don't link against -liberty.
3546 (gencode.o, getopt.o, getopt1.o): New targets.
3547 * gencode.c: Include <ctype.h> and "ansidecl.h".
3548 (AND): Undefine after including "ansidecl.h".
3549 (ULONG_MAX): Define if not defined.
3550 (OP_*): Don't define macros; now defined in opcode/mips.h.
3551 (main): Call my_strtoul rather than strtoul.
3552 (my_strtoul): New static function.
3554 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3556 * gencode.c (process_instructions): Generate word64 and uword64
3557 instead of `long long' and `unsigned long long' data types.
3558 * interp.c: #include sysdep.h to get signals, and define default
3560 * (Convert): Work around for Visual-C++ compiler bug with type
3562 * support.h: Make things compile under Visual-C++ by using
3563 __int64 instead of `long long'. Change many refs to long long
3564 into word64/uword64 typedefs.
3566 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3568 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3569 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3571 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3572 (AC_PROG_INSTALL): Added.
3573 (AC_PROG_CC): Moved to before configure.host call.
3574 * configure: Rebuilt.
3576 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3578 * configure.in: Define @SIMCONF@ depending on mips target.
3579 * configure: Rebuild.
3580 * Makefile.in (run): Add @SIMCONF@ to control simulator
3582 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3583 * interp.c: Remove some debugging, provide more detailed error
3584 messages, update memory accesses to use LOADDRMASK.
3586 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3588 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3589 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3591 * configure: Rebuild.
3592 * config.in: New file, generated by autoheader.
3593 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3594 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3595 HAVE_ANINT and HAVE_AINT, as appropriate.
3596 * Makefile.in (run): Use @LIBS@ rather than -lm.
3597 (interp.o): Depend upon config.h.
3598 (Makefile): Just rebuild Makefile.
3599 (clean): Remove stamp-h.
3600 (mostlyclean): Make the same as clean, not as distclean.
3601 (config.h, stamp-h): New targets.
3603 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3605 * interp.c (ColdReset): Fix boolean test. Make all simulator
3608 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3610 * interp.c (xfer_direct_word, xfer_direct_long,
3611 swap_direct_word, swap_direct_long, xfer_big_word,
3612 xfer_big_long, xfer_little_word, xfer_little_long,
3613 swap_word,swap_long): Added.
3614 * interp.c (ColdReset): Provide function indirection to
3615 host<->simulated_target transfer routines.
3616 * interp.c (sim_store_register, sim_fetch_register): Updated to
3617 make use of indirected transfer routines.
3619 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3621 * gencode.c (process_instructions): Ensure FP ABS instruction
3623 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3624 system call support.
3626 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3628 * interp.c (sim_do_command): Complain if callback structure not
3631 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3633 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3634 support for Sun hosts.
3635 * Makefile.in (gencode): Ensure the host compiler and libraries
3636 used for cross-hosted build.
3638 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3640 * interp.c, gencode.c: Some more (TODO) tidying.
3642 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3644 * gencode.c, interp.c: Replaced explicit long long references with
3645 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3646 * support.h (SET64LO, SET64HI): Macros added.
3648 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3650 * configure: Regenerate with autoconf 2.7.
3652 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3654 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3655 * support.h: Remove superfluous "1" from #if.
3656 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3658 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3660 * interp.c (StoreFPR): Control UndefinedResult() call on
3661 WARN_RESULT manifest.
3663 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3665 * gencode.c: Tidied instruction decoding, and added FP instruction
3668 * interp.c: Added dineroIII, and BSD profiling support. Also
3669 run-time FP handling.
3671 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3673 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3674 gencode.c, interp.c, support.h: created.
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