sim/mips/ChangeLog

   1 2021-06-22  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure: Regenerate.
   4
   5 2021-06-21  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * aclocal.m4: Regenerate.
   8         * configure: Regenerate.
   9
  10 2021-06-21  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * Makefile.in (SIM_EXTRA_HW_DEVICES): Define.
  13         * configure.ac (SIM_AC_OPTION_HARDWARE): Delete call.
  14         * configure: Regenerate.
  15
  16 2021-06-20  Mike Frysinger  <vapier@gentoo.org>
  17
  18         * configure.ac (SIM_AC_COMMON): Delete.
  19         * aclocal.m4, configure: Regenerate.
  20
  21 2021-06-20  Mike Frysinger  <vapier@gentoo.org>
  22
  23         * aclocal.m4: Regenerate.
  24         * configure: Regenerate.
  25
  26 2021-06-19  Mike Frysinger  <vapier@gentoo.org>
  27
  28         * aclocal.m4: Regenerate.
  29         * configure: Regenerate.
  30
  31 2021-06-19  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * configure.ac: Delete AC_PATH_X call.
  34         * configure: Regenerate.
  35
  36 2021-06-19  Mike Frysinger  <vapier@gentoo.org>
  37
  38         * configure.ac: Delete AC_CHECK_LIB calls.
  39         * configure: Regenerate.
  40
  41 2021-06-18  Mike Frysinger  <vapier@gentoo.org>
  42
  43         * aclocal.m4, configure: Regenerate.
  44
  45 2021-06-18  Mike Frysinger  <vapier@gentoo.org>
  46
  47         * Makefile.in (SIM_WERROR_CFLAGS): New variable.
  48         * configure.ac: Delete call to SIM_AC_OPTION_WARNINGS.
  49         * configure: Regenerate.
  50
  51 2021-06-18  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * interp.c: Include sim-signal.h.
  54
  55 2021-06-17  Mike Frysinger  <vapier@gentoo.org>
  56
  57         * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
  58         * aclocal.m4, configure: Regenerate.
  59
  60 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  61
  62         * interp.c (dotrace): Make comment const.
  63         * sim-main.h (dotrace):  Likewise.  Add ATTRIBUTE_PRINTF.
  64
  65 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * interp.c (sim_monitor): Change ap type to address_word*.
  68         (_P, P): New macros.  Rewrite dynamic printf logic to use these.
  69
  70 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
  73         unsigned_1.
  74
  75 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  76
  77         * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
  78         register_value to 0.
  79
  80 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  81
  82         * configure: Regenerate.
  83
  84 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  85
  86         * interp.c (sim_open): Change %lx to %x and PRIx macros.
  87
  88 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  89
  90         * configure: Regenerate.
  91         * config.in: Removed.
  92
  93 2021-06-15  Mike Frysinger  <vapier@gentoo.org>
  94
  95         * config.in, configure: Regenerate.
  96
  97 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  98
  99         * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
 100
 101 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
 102
 103         * aclocal.m4, config.in, configure: Regenerate.
 104
 105 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * configure.ac: Delete call to AC_CHECK_FUNCS.
 108         * config.in, configure: Regenerate.
 109
 110 2021-06-08  Mike Frysinger  <vapier@gentoo.org>
 111
 112         * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
 113         with $(IGEN).
 114
 115 2021-05-29  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
 118
 119 2021-05-22  Faraz Shahbazker  <fshahbazker@wavecomp.com>
 120
 121         * interp.c (sim_open): Add shadow mappings from 32-bit
 122         address space to 64-bit sign-extended address space.
 123
 124 2021-05-22  Faraz Shahbazker  <fshahbazker@wavecomp.com>
 125
 126         * interp.c (sim_create_inferior): Only truncate sign extension
 127         bits for 32-bit target models.
 128
 129 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
 130
 131         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
 132
 133 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
 134
 135         * interp.c (sim_open): Switch to sim_state_alloc_extra.
 136         * micromips.igen: Change SD to mips_sim_state.
 137         * micromipsrun.c (sim_engine_run): Likewise.
 138         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
 139         (watch_options_install): Delete.
 140         (struct swatch): Delete.
 141         (struct sim_state): Delete.
 142         (struct mips_sim_state): New struct.
 143         (MIPS_SIM_STATE): Define.
 144
 145 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
 146
 147         * interp.c: Replace config.h include with defs.h.
 148         * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
 149         dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
 150         Include defs.h.
 151
 152 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
 153
 154         * config.in, configure: Regenerate.
 155
 156 2021-05-14  Mike Frysinger  <vapier@gentoo.org>
 157
 158         * interp.c: Update include path.
 159
 160 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 161
 162         * dv-tx3904sio.c: Include stdlib.h.
 163
 164 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * configure.ac (hw_extra_devices): Inline contents into
 167         SIM_AC_OPTION_HARDWARE and delete.
 168         * configure: Regenerate.
 169
 170 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
 173         (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
 174         * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
 175         * configure: Regenerate.
 176
 177 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 178
 179         * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
 180
 181 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 182
 183         * configure: Regenerate.
 184
 185 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * cp1.c (store_fcr): Mark static.
 188
 189 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * config.in, configure: Regenerate.
 192
 193 2021-04-23  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * configure.ac (hw_enabled): Delete.
 196         (SIM_AC_OPTION_HARDWARE): Delete first two args.
 197         * configure: Regenerate.
 198
 199 2021-04-22  Tom Tromey  <tom@tromey.com>
 200
 201         * configure, config.in: Rebuild.
 202
 203 2021-04-22  Tom Tromey  <tom@tromey.com>
 204
 205         * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
 206         Remove.
 207         (SIM_EXTRA_DEPS): New variable.
 208
 209 2021-04-22  Tom Tromey  <tom@tromey.com>
 210
 211         * configure: Rebuild.
 212
 213 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
 214
 215         * aclocal.m4: Regenerate.
 216
 217 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
 218
 219         * configure: Regenerate.
 220
 221 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
 222
 223         * configure: Regenerate.
 224
 225 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
 226
 227         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
 228
 229 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
 230
 231         * Makefile.in: Set ASAN_OPTIONS when running igen.
 232
 233 2021-04-04  Steve Ellcey  <sellcey@mips.com>
 234             Faraz Shahbazker  <fshahbazker@wavecomp.com>
 235
 236         * interp.c (sim_monitor): Add switch entries for unlink (13),
 237         lseek (14), and stat (15).
 238
 239 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 240
 241         * Makefile.in (../igen/igen): Delete rule.
 242         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
 243
 244 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 245
 246         * aclocal.m4, configure: Regenerate.
 247
 248 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
 249
 250         * configure: Regenerate.
 251
 252 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
 253
 254         * Makefile.in (SIM_EXTRA_ALL): Delete.
 255         (all): New target.
 256
 257 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
 260         * aclocal.m4, configure: Regenerate.
 261
 262 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
 263
 264         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
 265         * aclocal.m4, configure: Regenerate.
 266
 267 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 268
 269         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
 270
 271 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 272
 273         * configure: Regenerate.
 274
 275 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
 276
 277         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
 278
 279 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
 280
 281         * config.in, configure: Regenerate.
 282         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
 283         and strings.h include.
 284
 285 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 286
 287         * configure: Regenerate.
 288
 289 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 290
 291         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
 292         * configure: Regenerate.
 293
 294 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
 295
 296         * configure: Regenerate.
 297
 298 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 299
 300         * configure: Regenerate.
 301
 302 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 303
 304         *  sim-main.c: Include <stdlib.h>.
 305
 306 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 307
 308         * cp1.c: Include <stdlib.h>.
 309
 310 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
 311
 312         * configure: Re-generate.
 313
 314 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 315
 316         * configure: Regenerate.
 317
 318 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 319
 320         PR sim/20808
 321         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 322         and SD to sd.
 323
 324 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 325
 326         PR sim/20809
 327         * mips.igen (check_u64): Enable for `r3900'.
 328
 329 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 330
 331         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 332         STATE_PROG_BFD (sd).
 333         * configure: Regenerate.
 334
 335 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 336             Maciej W. Rozycki  <macro@imgtec.com>
 337
 338         PR sim/19441
 339         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 340         `micromips64' and `micromipsdsp' only.
 341         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 342         (do_micromips_jalr, do_micromips_jal): Likewise.
 343         (compute_movep_src_reg): Likewise.
 344         (compute_andi16_imm): Likewise.
 345         (convert_fmt_micromips): Likewise.
 346         (convert_fmt_micromips_cvt_d): Likewise.
 347         (convert_fmt_micromips_cvt_s): Likewise.
 348         (FMT_MICROMIPS): Likewise.
 349         (FMT_MICROMIPS_CVT_D): Likewise.
 350         (FMT_MICROMIPS_CVT_S): Likewise.
 351
 352 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 353
 354         * interp.c: Include elf-bfd.h.
 355         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 356         ELFCLASS32.
 357
 358 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 359
 360         * config.in, configure: Regenerate.
 361
 362 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 363
 364         * configure: Regenerate.
 365
 366 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 367
 368         * configure: Regenerate.
 369
 370 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 371
 372         * configure: Regenerate.
 373
 374 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * configure: Regenerate.
 377
 378 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 379
 380         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 381         * configure: Regenerate.
 382
 383 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 384
 385         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 386         * configure: Regenerate.
 387
 388 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 389
 390         * configure: Regenerate.
 391
 392 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 393
 394         * configure: Regenerate.
 395
 396 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 397
 398         * config.in, configure: Regenerate.
 399
 400 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 401
 402         * interp.c (sim_open): Mark argv const.
 403         (sim_create_inferior): Mark argv and env const.
 404
 405 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 406
 407         * configure: Regenerate.
 408
 409 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 410
 411         * interp.c (sim_open): Update sim_parse_args comment.
 412
 413 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 414
 415         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 416         * configure: Regenerate.
 417
 418 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 419
 420         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 421         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 422         * configure: Regenerate.
 423         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 424
 425 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 426
 427         * dv-tx3904cpu.c (CPU, SD): Delete.
 428
 429 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 430
 431         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 432         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 433         (sim_store_register): Rename to ...
 434         (mips_reg_store): ... this.  Delete local cpu var.
 435         Update sim_io_eprintf calls.
 436         (sim_fetch_register): Rename to ...
 437         (mips_reg_fetch): ... this.  Delete local cpu var.
 438         Update sim_io_eprintf calls.
 439
 440 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 441
 442         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 443
 444 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 445
 446         * config.in, configure: Regenerate.
 447
 448 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 449
 450         * interp.c (sim_write, sim_read): Delete.
 451         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 452         (load_word): Likewise.
 453         * micromips.igen (cache): Likewise.
 454         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 455         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 456         do_store_left, do_store_right, do_load_double, do_store_double):
 457         Likewise.
 458         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 459         (do_prefx): Likewise.
 460         * sim-main.c (address_translation, prefetch): Delete.
 461         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 462         paddr=vaddr.
 463         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 464         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 465         (LoadMemory, StoreMemory): Delete CCA arg.
 466
 467 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 468
 469         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 470         * configure: Regenerated.
 471
 472 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 473
 474         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 475         * tconfig.h: Delete.
 476
 477 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 478
 479         * tconfig.h (SIM_HANDLES_LMA): Delete.
 480
 481 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 482
 483         * sim-main.h (WITH_WATCHPOINTS): Delete.
 484
 485 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 486
 487         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 488
 489 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 490
 491         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 492
 493 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 494
 495         * micromips.igen (process_isa_mode): Fix left shift of negative
 496         value.
 497
 498 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 499
 500         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 501
 502 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 503
 504         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 505
 506 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 507
 508         * interp.c (sim_close): Rename to ...
 509         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 510         sim_io_shutdown.
 511         * sim-main.h (mips_sim_close): Declare.
 512         (SIM_CLOSE_HOOK): Define.
 513
 514 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 515             Ali Lown  <ali.lown@imgtec.com>
 516
 517         * Makefile.in (tmp-micromips): New rule.
 518         (tmp-mach-multi): Add support for micromips.
 519         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 520         that works for both mips64 and micromips64.
 521         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 522         micromips32.
 523         Add build support for micromips.
 524         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 525         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 526         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 527         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 528         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 529         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 530         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 531         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 532         Refactored instruction code to use these functions.
 533         * dsp2.igen: Refactored instruction code to use the new functions.
 534         * interp.c (decode_coproc): Refactored to work with any instruction
 535         encoding.
 536         (isa_mode): New variable
 537         (RSVD_INSTRUCTION): Changed to 0x00000039.
 538         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 539         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 540         * micromips.dc: New file.
 541         * micromips.igen: New file.
 542         * micromips16.dc: New file.
 543         * micromipsdsp.igen: New file.
 544         * micromipsrun.c: New file.
 545         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 546         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 547         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 548         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 549         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 550         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 551         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 552         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 553         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 554         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 555         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 556         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 557         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 558         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 559         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 560         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 561         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 562         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 563         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 564         instructions.
 565         Refactored instruction code to use these functions.
 566         (RSVD): Changed to use new reserved instruction.
 567         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 568         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 569         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 570         do_store_double):  Added micromips32 and micromips64 models.
 571         Added include for micromips.igen and micromipsdsp.igen
 572         Add micromips32 and micromips64 models.
 573         (DecodeCoproc): Updated to use new macro definition.
 574         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 575         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 576         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 577         Refactored instruction code to use these functions.
 578         * sim-main.h (CP0_operation): New enum.
 579         (DecodeCoproc): Updated macro.
 580         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 581         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 582         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 583         ISA_MODE_MICROMIPS): New defines.
 584         (sim_state): Add isa_mode field.
 585
 586 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 587
 588         * configure: Regenerate.
 589
 590 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 591
 592         * configure.ac: Change configure.in to configure.ac.
 593         * configure: Regenerate.
 594
 595 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 596
 597         * configure: Regenerate.
 598
 599 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 600
 601         * interp.c [TRACE]: Delete.
 602         (TRACE): Change to WITH_TRACE_ANY_P.
 603         [!WITH_TRACE_ANY_P] (open_trace): Define.
 604         (mips_option_handler, open_trace, sim_close, dotrace):
 605         Change defined(TRACE) to WITH_TRACE_ANY_P.
 606         (sim_open): Delete TRACE ifdef check.
 607         * sim-main.c (load_memory): Delete TRACE ifdef check.
 608         (store_memory): Likewise.
 609         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 610         [!WITH_TRACE_ANY_P] (dotrace): Define.
 611
 612 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 613
 614         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 615         comments.
 616
 617 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 618
 619         * sim-main.h (SIM_CPU): Delete.
 620
 621 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 622
 623         * sim-main.h (sim_cia): Delete.
 624
 625 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 626
 627         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 628         PU_PC_GET.
 629         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 630         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 631         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 632         CIA_SET to CPU_PC_SET.
 633         * sim-main.h (CIA_GET, CIA_SET): Delete.
 634
 635 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 636
 637         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 638         * sim-main.h (STATE_CPU): Delete.
 639
 640 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 641
 642         * configure: Regenerate.
 643
 644 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 645
 646         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 647         * interp.c (mips_pc_get, mips_pc_set): New functions.
 648         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 649         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 650         (sim_pc_get): Delete.
 651         * sim-main.h (SIM_CPU): Define.
 652         (struct sim_state): Change cpu to an array of pointers.
 653         (STATE_CPU): Drop &.
 654
 655 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 656
 657         * interp.c (mips_option_handler, open_trace, sim_close,
 658         sim_write, sim_read, sim_store_register, sim_fetch_register,
 659         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 660         prototypes.
 661         (sim_open): Convert old style prototype.  Change casts with
 662         sim_write to unsigned char *.
 663         (fetch_str): Change null to unsigned char, and change cast to
 664         unsigned char *.
 665         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 666         unsigned char *.
 667
 668 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 669
 670         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 671
 672 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 673
 674         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 675
 676 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 677
 678         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 679
 680 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 681
 682         * config.in, configure: Regenerate.
 683
 684 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 685
 686         * interp.c (sim_pc_get): New function.
 687
 688 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 689
 690         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 691         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 692
 693 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 694
 695         * configure: Regenerate.
 696
 697 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 698
 699         * configure: Regenerate.
 700
 701 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 702
 703         * configure: Regenerate.
 704         * configure.ac (mips_extra_objs): Delete.
 705         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 706         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 707
 708 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 709
 710         * configure: Regenerate.
 711         * configure.ac: Delete sim_hw checks for dv-sockser.
 712
 713 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 714
 715         * config.in, configure: Regenerate.
 716         * tconfig.in: Rename file ...
 717         * tconfig.h: ... here.
 718
 719 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 720
 721         * tconfig.in: Delete includes.
 722         [HAVE_DV_SOCKSER]: Delete.
 723
 724 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 725
 726         * Makefile.in (SIM_RUN_OBJS): Delete.
 727
 728 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 729
 730         * configure.ac (AC_CHECK_HEADERS): Delete.
 731         * aclocal.m4, configure: Regenerate.
 732
 733 2014-08-19  Alan Modra  <amodra@gmail.com>
 734
 735         * configure: Regenerate.
 736
 737 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 738
 739         * configure: Regenerate.
 740         * config.in: Regenerate.
 741
 742 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 743
 744         * configure: Regenerate.
 745
 746 2013-09-23  Alan Modra  <amodra@gmail.com>
 747
 748         * configure: Regenerate.
 749
 750 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 751
 752         * aclocal.m4, configure: Regenerate.
 753
 754 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 755
 756         * configure: Rebuild.
 757
 758 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 759
 760         * configure: Regenerate.
 761
 762 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 763
 764         * configure.ac: Address use of dv-sockser.o.
 765         * tconfig.in: Conditionalize use of dv_sockser_install.
 766         * configure: Regenerated.
 767         * config.in: Regenerated.
 768
 769 2012-10-04  Chao-ying Fu  <fu@mips.com>
 770             Steve Ellcey  <sellcey@mips.com>
 771
 772         * mips/mips3264r2.igen (rdhwr): New.
 773
 774 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 775
 776         * configure.ac: Always link against dv-sockser.o.
 777         * configure: Regenerate.
 778
 779 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 780
 781         * config.in, configure: Regenerate.
 782
 783 2012-05-18  Nick Clifton  <nickc@redhat.com>
 784
 785         PR 14072
 786         * interp.c: Include config.h before system header files.
 787
 788 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 789
 790         * aclocal.m4, config.in, configure: Regenerate.
 791
 792 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 793
 794         * aclocal.m4: New file.
 795         * configure: Regenerate.
 796
 797 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 798
 799         * configure: Regenerate after common/acinclude.m4 update.
 800
 801 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 802
 803         * configure.ac: Change include to common/acinclude.m4.
 804
 805 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 806
 807         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 808         call.  Replace common.m4 include with SIM_AC_COMMON.
 809         * configure: Regenerate.
 810
 811 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 812
 813         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 814         $(SIM_EXTRA_DEPS).
 815         (tmp-mach-multi): Exit early when igen fails.
 816
 817 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 818
 819         * interp.c (sim_do_command): Delete.
 820
 821 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 822
 823         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 824         (tx3904sio_fifo_reset): Likewise.
 825         * interp.c (sim_monitor): Likewise.
 826
 827 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 828
 829         * interp.c (sim_write): Add const to buffer arg.
 830
 831 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 832
 833         * interp.c: Don't include sysdep.h
 834
 835 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 836
 837         * configure: Regenerate.
 838
 839 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 840
 841         * config.in: Regenerate.
 842         * configure: Likewise.
 843
 844         * configure: Regenerate.
 845
 846 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 847
 848         * configure: Regenerate to track ../common/common.m4 changes.
 849         * config.in: Ditto.
 850
 851 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 852             Daniel Jacobowitz  <dan@codesourcery.com>
 853             Joseph Myers  <joseph@codesourcery.com>
 854
 855         * configure: Regenerate.
 856
 857 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 858
 859         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 860         that unconditionally allows fmt_ps.
 861         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 862         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 863         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 864         filter from 64,f to 32,f.
 865         (PREFX): Change filter from 64 to 32.
 866         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 867         that use do_load_double instead of do_load.  Make both LUXC1
 868         versions unpredictable if SizeFGR () != 64.
 869         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 870         instead of do_store.  Remove unused variable.  Make both SUXC1
 871         versions unpredictable if SizeFGR () != 64.
 872
 873 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 874
 875         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 876         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 877         shifts for that case.
 878
 879 2007-09-04  Nick Clifton  <nickc@redhat.com>
 880
 881         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 882         (display_mem_info): New static variable.
 883         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 884         (mips_options): Add info-memory and memory-info.
 885         (sim_open): After processing the command line and board
 886         specification, check display_mem_info.  If it is set then
 887         call the real handler for the --memory-info command line
 888         switch.
 889
 890 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 891
 892         * configure.ac: Change license of multi-run.c to GPL version 3.
 893         * configure: Regenerate.
 894
 895 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 896
 897         * configure.ac, configure: Revert last patch.
 898
 899 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 900
 901         * configure.ac (sim_mipsisa3264_configs): New variable.
 902         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 903         every configuration support all four targets, using the triplet to
 904         determine the default.
 905         * configure: Regenerate.
 906
 907 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 908
 909         * Makefile.in (m16run.o): New rule.
 910
 911 2007-05-15  Thiemo Seufer  <ths@mips.com>
 912
 913         * mips3264r2.igen (DSHD): Fix compile warning.
 914
 915 2007-05-14  Thiemo Seufer  <ths@mips.com>
 916
 917         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 918         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 919         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 920         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 921         for mips32r2.
 922
 923 2007-03-01  Thiemo Seufer  <ths@mips.com>
 924
 925         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 926         and mips64.
 927
 928 2007-02-20  Thiemo Seufer  <ths@mips.com>
 929
 930         * dsp.igen: Update copyright notice.
 931         * dsp2.igen: Fix copyright notice.
 932
 933 2007-02-20  Thiemo Seufer  <ths@mips.com>
 934             Chao-Ying Fu  <fu@mips.com>
 935
 936         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 937         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 938         Add dsp2 to sim_igen_machine.
 939         * configure: Regenerate.
 940         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 941         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 942         (mulq_rs.ph): Use do_ph_mulq.
 943         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 944         * mips.igen: Add dsp2 model and include dsp2.igen.
 945         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 946         for *mips32r2, *mips64r2, *dsp.
 947         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 948         for *mips32r2, *mips64r2, *dsp2.
 949         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 950
 951 2007-02-19  Thiemo Seufer  <ths@mips.com>
 952             Nigel Stephens  <nigel@mips.com>
 953
 954         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 955         jumps with hazard barrier.
 956
 957 2007-02-19  Thiemo Seufer  <ths@mips.com>
 958             Nigel Stephens  <nigel@mips.com>
 959
 960         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 961         after each call to sim_io_write.
 962
 963 2007-02-19  Thiemo Seufer  <ths@mips.com>
 964             Nigel Stephens  <nigel@mips.com>
 965
 966         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 967         supported by this simulator.
 968         (decode_coproc): Recognise additional CP0 Config registers
 969         correctly.
 970
 971 2007-02-19  Thiemo Seufer  <ths@mips.com>
 972             Nigel Stephens  <nigel@mips.com>
 973             David Ung  <davidu@mips.com>
 974
 975         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 976         uninterpreted formats. If fmt is one of the uninterpreted types
 977         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 978         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 979         (store_fpr): When writing an invalid odd register, set the
 980         matching even register to fmt_unknown, not the following register.
 981         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 982         the the memory window at offset 0 set by --memory-size command
 983         line option.
 984         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 985         point register.
 986         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 987         register.
 988         (sim_monitor): When returning the memory size to the MIPS
 989         application, use the value in STATE_MEM_SIZE, not an arbitrary
 990         hardcoded value.
 991         (cop_lw): Don' mess around with FPR_STATE, just pass
 992         fmt_uninterpreted_32 to StoreFPR.
 993         (cop_sw): Similarly.
 994         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 995         (cop_sd): Similarly.
 996         * mips.igen (not_word_value): Single version for mips32, mips64
 997         and mips16.
 998
 999 2007-02-19  Thiemo Seufer <ths@mips.com>
1000             Nigel Stephens  <nigel@mips.com>
1001
1002         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
1003         MBytes.
1004
1005 2007-02-17  Thiemo Seufer  <ths@mips.com>
1006
1007         * configure.ac (mips*-sde-elf*): Move in front of generic machine
1008         configuration.
1009         * configure: Regenerate.
1010
1011 2007-02-17  Thiemo Seufer  <ths@mips.com>
1012
1013         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
1014         Add mdmx to sim_igen_machine.
1015         (mipsisa64*-*-*): Likewise. Remove dsp.
1016         (mipsisa32*-*-*): Remove dsp.
1017         * configure: Regenerate.
1018
1019 2007-02-13  Thiemo Seufer  <ths@mips.com>
1020
1021         * configure.ac: Add mips*-sde-elf* target.
1022         * configure: Regenerate.
1023
1024 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
1025
1026         * acconfig.h: Remove.
1027         * config.in, configure: Regenerate.
1028
1029 2006-11-07  Thiemo Seufer  <ths@mips.com>
1030
1031         * dsp.igen (do_w_op): Fix compiler warning.
1032
1033 2006-08-29  Thiemo Seufer  <ths@mips.com>
1034             David Ung  <davidu@mips.com>
1035
1036         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
1037         sim_igen_machine.
1038         * configure: Regenerate.
1039         * mips.igen (model): Add smartmips.
1040         (MADDU): Increment ACX if carry.
1041         (do_mult): Clear ACX.
1042         (ROR,RORV): Add smartmips.
1043         (include): Include smartmips.igen.
1044         * sim-main.h (ACX): Set to REGISTERS[89].
1045         * smartmips.igen: New file.
1046
1047 2006-08-29  Thiemo Seufer  <ths@mips.com>
1048             David Ung  <davidu@mips.com>
1049
1050         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
1051         mips3264r2.igen. Add missing dependency rules.
1052         * m16e.igen: Support for mips16e save/restore instructions.
1053
1054 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
1055
1056         * configure: Regenerated.
1057
1058 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
1059
1060         * configure: Regenerated.
1061
1062 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
1063
1064         * configure: Regenerated.
1065
1066 2006-05-15 Chao-ying Fu  <fu@mips.com>
1067
1068         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1069
1070 2006-04-18  Nick Clifton  <nickc@redhat.com>
1071
1072         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1073         statement.
1074
1075 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
1076
1077         * configure: Regenerate.
1078
1079 2005-12-14  Chao-ying Fu  <fu@mips.com>
1080
1081         * Makefile.in (SIM_OBJS): Add dsp.o.
1082         (dsp.o): New dependency.
1083         (IGEN_INCLUDE): Add dsp.igen.
1084         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1085         mipsisa64*-*-*): Add dsp to sim_igen_machine.
1086         * configure: Regenerate.
1087         * mips.igen: Add dsp model and include dsp.igen.
1088         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1089         because these instructions are extended in DSP ASE.
1090         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1091         adding 6 DSP accumulator registers and 1 DSP control register.
1092         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1093         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1094         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1095         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1096         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1097         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1098         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1099         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1100         DSPCR_CCOND_SMASK): New define.
1101         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1102         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1103
1104 2005-07-08  Ian Lance Taylor  <ian@airs.com>
1105
1106         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1107
1108 2005-06-16  David Ung  <davidu@mips.com>
1109             Nigel Stephens  <nigel@mips.com>
1110
1111         * mips.igen: New mips16e model and include m16e.igen.
1112         (check_u64): Add mips16e tag.
1113         * m16e.igen: New file for MIPS16e instructions.
1114         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1115         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1116         models.
1117         * configure: Regenerate.
1118
1119 2005-05-26  David Ung  <davidu@mips.com>
1120
1121         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
1122         tags to all instructions which are applicable to the new ISAs.
1123         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1124         vr.igen.
1125         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1126         instructions.
1127         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1128         to mips.igen.
1129         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1130         * configure: Regenerate.
1131
1132 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
1133
1134         * configure: Regenerate.
1135
1136 2005-01-14  Andrew Cagney  <cagney@gnu.org>
1137
1138         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
1139         explicit call to AC_CONFIG_HEADER.
1140         * configure: Regenerate.
1141
1142 2005-01-12  Andrew Cagney  <cagney@gnu.org>
1143
1144         * configure.ac: Update to use ../common/common.m4.
1145         * configure: Re-generate.
1146
1147 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
1148
1149         * configure: Regenerated to track ../common/aclocal.m4 changes.
1150
1151 2005-01-07  Andrew Cagney  <cagney@gnu.org>
1152
1153         * configure.ac: Rename configure.in, require autoconf 2.59.
1154         * configure: Re-generate.
1155
1156 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
1157
1158         * configure: Regenerate for ../common/aclocal.m4 update.
1159
1160 2004-09-24  Monika Chaddha  <monika@acmet.com>
1161
1162         Committed by Andrew Cagney.
1163         * m16.igen (CMP, CMPI): Fix assembler.
1164
1165 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
1166
1167         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1168         * configure: Regenerate.
1169
1170 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
1171
1172         * configure.in (sim_m16_machine): Include mipsIII.
1173         * configure: Regenerate.
1174
1175 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
1176
1177         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1178         from COP0_BADVADDR.
1179         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1180
1181 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
1182
1183         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1184
1185 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1186
1187         * mips.igen (check_fmt): Remove.
1188         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1189         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1190         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1191         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1192         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1193         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1194         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1195         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1196         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1197         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1198
1199 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1200
1201         * sb1.igen (check_sbx): New function.
1202         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1203
1204 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
1205             Richard Sandiford  <rsandifo@redhat.com>
1206
1207         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1208         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1209         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1210         separate implementations for mipsIV and mipsV.  Use new macros to
1211         determine whether the restrictions apply.
1212
1213 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
1214
1215         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1216         (check_mult_hilo): Improve comments.
1217         (check_div_hilo): Likewise.  Also, fork off a new version
1218         to handle mips32/mips64 (since there are no hazards to check
1219         in MIPS32/MIPS64).
1220
1221 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1222
1223         * mips.igen (do_dmultx): Fix check for negative operands.
1224
1225 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1226
1227         * Makefile.in (SHELL): Make sure this is defined.
1228         (various): Use $(SHELL) whenever we invoke move-if-change.
1229
1230 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1231
1232         * cp1.c: Tweak attribution slightly.
1233         * cp1.h: Likewise.
1234         * mdmx.c: Likewise.
1235         * mdmx.igen: Likewise.
1236         * mips3d.igen: Likewise.
1237         * sb1.igen: Likewise.
1238
1239 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1240
1241         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1242         unsigned operands.
1243
1244 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1245
1246         * interp.c (sim_open): Rename _bfd to bfd.
1247         (sim_create_inferior): Ditto.
1248
1249 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1250
1251         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1252
1253 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1254
1255         * mips.igen (EI, DI): Remove.
1256
1257 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1258
1259         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1260
1261 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1262             Andrew Cagney  <ac131313@redhat.com>
1263             Gavin Romig-Koch  <gavin@redhat.com>
1264             Graydon Hoare  <graydon@redhat.com>
1265             Aldy Hernandez  <aldyh@redhat.com>
1266             Dave Brolley  <brolley@redhat.com>
1267             Chris Demetriou  <cgd@broadcom.com>
1268
1269         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1270         (sim_mach_default): New variable.
1271         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1272         Add a new simulator generator, MULTI.
1273         * configure: Regenerate.
1274         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1275         (multi-run.o): New dependency.
1276         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1277         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1278         (tmp-multi): Combine them.
1279         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1280         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1281         (distclean-extra): New rule.
1282         * sim-main.h: Include bfd.h.
1283         (MIPS_MACH): New macro.
1284         * mips.igen (vr4120, vr5400, vr5500): New models.
1285         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1286         * vr.igen: Replace with new version.
1287
1288 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1289
1290         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1291         * configure: Regenerate.
1292
1293 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1294
1295         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1296         * mips.igen: Remove all invocations of check_branch_bug and
1297         mark_branch_bug.
1298
1299 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1300
1301         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1302
1303 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1304
1305         * mips.igen (do_load_double, do_store_double): New functions.
1306         (LDC1, SDC1): Rename to...
1307         (LDC1b, SDC1b): respectively.
1308         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1309
1310 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1311
1312         * cp1.c (fp_recip2): Modify initialization expression so that
1313         GCC will recognize it as constant.
1314
1315 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1316
1317         * mdmx.c (SD_): Delete.
1318         (Unpredictable): Re-define, for now, to directly invoke
1319         unpredictable_action().
1320         (mdmx_acc_op): Fix error in .ob immediate handling.
1321
1322 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1323
1324         * interp.c (sim_firmware_command): Initialize `address'.
1325
1326 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1327
1328         * configure: Regenerated to track ../common/aclocal.m4 changes.
1329
1330 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1331             Ed Satterthwaite  <ehs@broadcom.com>
1332
1333         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1334         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1335         * mips.igen: Include mips3d.igen.
1336         (mips3d): New model name for MIPS-3D ASE instructions.
1337         (CVT.W.fmt): Don't use this instruction for word (source) format
1338         instructions.
1339         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1340         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1341         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1342         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1343         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1344         (RSquareRoot1, RSquareRoot2): New macros.
1345         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1346         (fp_rsqrt2): New functions.
1347         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1348         * configure: Regenerate.
1349
1350 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1351             Ed Satterthwaite  <ehs@broadcom.com>
1352
1353         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1354         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1355         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1356         (convert): Note that this function is not used for paired-single
1357         format conversions.
1358         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1359         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1360         (check_fmt_p): Enable paired-single support.
1361         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1362         (PUU.PS): New instructions.
1363         (CVT.S.fmt): Don't use this instruction for paired-single format
1364         destinations.
1365         * sim-main.h (FP_formats): New value 'fmt_ps.'
1366         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1367         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1368
1369 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1370
1371         * mips.igen: Fix formatting of function calls in
1372         many FP operations.
1373
1374 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1375
1376         * mips.igen (MOVN, MOVZ): Trace result.
1377         (TNEI): Print "tnei" as the opcode name in traces.
1378         (CEIL.W): Add disassembly string for traces.
1379         (RSQRT.fmt): Make location of disassembly string consistent
1380         with other instructions.
1381
1382 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1383
1384         * mips.igen (X): Delete unused function.
1385
1386 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1387
1388         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1389
1390 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1391             Ed Satterthwaite  <ehs@broadcom.com>
1392
1393         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1394         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1395         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1396         (fp_nmsub): New prototypes.
1397         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1398         (NegMultiplySub): New defines.
1399         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1400         (MADD.D, MADD.S): Replace with...
1401         (MADD.fmt): New instruction.
1402         (MSUB.D, MSUB.S): Replace with...
1403         (MSUB.fmt): New instruction.
1404         (NMADD.D, NMADD.S): Replace with...
1405         (NMADD.fmt): New instruction.
1406         (NMSUB.D, MSUB.S): Replace with...
1407         (NMSUB.fmt): New instruction.
1408
1409 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1410             Ed Satterthwaite  <ehs@broadcom.com>
1411
1412         * cp1.c: Fix more comment spelling and formatting.
1413         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1414         (denorm_mode): New function.
1415         (fpu_unary, fpu_binary): Round results after operation, collect
1416         status from rounding operations, and update the FCSR.
1417         (convert): Collect status from integer conversions and rounding
1418         operations, and update the FCSR.  Adjust NaN values that result
1419         from conversions.  Convert to use sim_io_eprintf rather than
1420         fprintf, and remove some debugging code.
1421         * cp1.h (fenr_FS): New define.
1422
1423 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1424
1425         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1426         rounding mode to sim FP rounding mode flag conversion code into...
1427         (rounding_mode): New function.
1428
1429 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1430
1431         * cp1.c: Clean up formatting of a few comments.
1432         (value_fpr): Reformat switch statement.
1433
1434 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1435             Ed Satterthwaite  <ehs@broadcom.com>
1436
1437         * cp1.h: New file.
1438         * sim-main.h: Include cp1.h.
1439         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1440         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1441         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1442         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1443         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1444         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1445         * cp1.c: Don't include sim-fpu.h; already included by
1446         sim-main.h.  Clean up formatting of some comments.
1447         (NaN, Equal, Less): Remove.
1448         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1449         (fp_cmp): New functions.
1450         * mips.igen (do_c_cond_fmt): Remove.
1451         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1452         Compare.  Add result tracing.
1453         (CxC1): Remove, replace with...
1454         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1455         (DMxC1): Remove, replace with...
1456         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1457         (MxC1): Remove, replace with...
1458         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1459
1460 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1461
1462         * sim-main.h (FGRIDX): Remove, replace all uses with...
1463         (FGR_BASE): New macro.
1464         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1465         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1466         (NR_FGR, FGR): Likewise.
1467         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1468         * mips.igen: Likewise.
1469
1470 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1471
1472         * cp1.c: Add an FSF Copyright notice to this file.
1473
1474 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1475             Ed Satterthwaite  <ehs@broadcom.com>
1476
1477         * cp1.c (Infinity): Remove.
1478         * sim-main.h (Infinity): Likewise.
1479
1480         * cp1.c (fp_unary, fp_binary): New functions.
1481         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1482         (fp_sqrt): New functions, implemented in terms of the above.
1483         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1484         (Recip, SquareRoot): Remove (replaced by functions above).
1485         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1486         (fp_recip, fp_sqrt): New prototypes.
1487         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1488         (Recip, SquareRoot): Replace prototypes with #defines which
1489         invoke the functions above.
1490
1491 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1492
1493         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1494         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1495         file, remove PARAMS from prototypes.
1496         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1497         simulator state arguments.
1498         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1499         pass simulator state arguments.
1500         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1501         (store_fpr, convert): Remove 'sd' argument.
1502         (value_fpr): Likewise.  Convert to use 'SD' instead.
1503
1504 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1505
1506         * cp1.c (Min, Max): Remove #if 0'd functions.
1507         * sim-main.h (Min, Max): Remove.
1508
1509 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1510
1511         * cp1.c: fix formatting of switch case and default labels.
1512         * interp.c: Likewise.
1513         * sim-main.c: Likewise.
1514
1515 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1516
1517         * cp1.c: Clean up comments which describe FP formats.
1518          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1519
1520 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1521             Ed Satterthwaite  <ehs@broadcom.com>
1522
1523         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1524         Broadcom SiByte SB-1 processor configurations.
1525         * configure: Regenerate.
1526         * sb1.igen: New file.
1527         * mips.igen: Include sb1.igen.
1528         (sb1): New model.
1529         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1530         * mdmx.igen: Add "sb1" model to all appropriate functions and
1531         instructions.
1532         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1533         (ob_func, ob_acc): Reference the above.
1534         (qh_acc): Adjust to keep the same size as ob_acc.
1535         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1536         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1537
1538 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1539
1540         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1541
1542 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1543             Ed Satterthwaite  <ehs@broadcom.com>
1544
1545         * mips.igen (mdmx): New (pseudo-)model.
1546         * mdmx.c, mdmx.igen: New files.
1547         * Makefile.in (SIM_OBJS): Add mdmx.o.
1548         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1549         New typedefs.
1550         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1551         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1552         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1553         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1554         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1555         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1556         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1557         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1558         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1559         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1560         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1561         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1562         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1563         (qh_fmtsel): New macros.
1564         (_sim_cpu): New member "acc".
1565         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1566         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1567
1568 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1569
1570         * interp.c: Use 'deprecated' rather than 'depreciated.'
1571         * sim-main.h: Likewise.
1572
1573 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1574
1575         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1576         which wouldn't compile anyway.
1577         * sim-main.h (unpredictable_action): New function prototype.
1578         (Unpredictable): Define to call igen function unpredictable().
1579         (NotWordValue): New macro to call igen function not_word_value().
1580         (UndefinedResult): Remove.
1581         * interp.c (undefined_result): Remove.
1582         (unpredictable_action): New function.
1583         * mips.igen (not_word_value, unpredictable): New functions.
1584         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1585         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1586         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1587         NotWordValue() to check for unpredictable inputs, then
1588         Unpredictable() to handle them.
1589
1590 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1591
1592         * mips.igen: Fix formatting of calls to Unpredictable().
1593
1594 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1595
1596         * interp.c (sim_open): Revert previous change.
1597
1598 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1599
1600         * interp.c (sim_open): Disable chunk of code that wrote code in
1601         vector table entries.
1602
1603 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1604
1605         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1606         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1607         unused definitions.
1608
1609 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1610
1611         * cp1.c: Fix many formatting issues.
1612
1613 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1614
1615         * cp1.c (fpu_format_name): New function to replace...
1616         (DOFMT): This.  Delete, and update all callers.
1617         (fpu_rounding_mode_name): New function to replace...
1618         (RMMODE): This.  Delete, and update all callers.
1619
1620 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1621
1622         * interp.c: Move FPU support routines from here to...
1623         * cp1.c: Here.  New file.
1624         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1625         (cp1.o): New target.
1626
1627 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1628
1629         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1630         * mips.igen (mips32, mips64): New models, add to all instructions
1631         and functions as appropriate.
1632         (loadstore_ea, check_u64): New variant for model mips64.
1633         (check_fmt_p): New variant for models mipsV and mips64, remove
1634         mipsV model marking fro other variant.
1635         (SLL) Rename to...
1636         (SLLa) this.
1637         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1638         for mips32 and mips64.
1639         (DCLO, DCLZ): New instructions for mips64.
1640
1641 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1642
1643         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1644         immediate or code as a hex value with the "%#lx" format.
1645         (ANDI): Likewise, and fix printed instruction name.
1646
1647 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1648
1649         * sim-main.h (UndefinedResult, Unpredictable): New macros
1650         which currently do nothing.
1651
1652 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1653
1654         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1655         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1656         (status_CU3): New definitions.
1657
1658         * sim-main.h (ExceptionCause): Add new values for MIPS32
1659         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1660         for DebugBreakPoint and NMIReset to note their status in
1661         MIPS32 and MIPS64.
1662         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1663         (SignalExceptionCacheErr): New exception macros.
1664
1665 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1666
1667         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1668         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1669         is always enabled.
1670         (SignalExceptionCoProcessorUnusable): Take as argument the
1671         unusable coprocessor number.
1672
1673 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1674
1675         * mips.igen: Fix formatting of all SignalException calls.
1676
1677 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1678
1679         * sim-main.h (SIGNEXTEND): Remove.
1680
1681 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1682
1683         * mips.igen: Remove gencode comment from top of file, fix
1684         spelling in another comment.
1685
1686 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1687
1688         * mips.igen (check_fmt, check_fmt_p): New functions to check
1689         whether specific floating point formats are usable.
1690         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1691         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1692         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1693         Use the new functions.
1694         (do_c_cond_fmt): Remove format checks...
1695         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1696
1697 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1698
1699         * mips.igen: Fix formatting of check_fpu calls.
1700
1701 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1702
1703         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1704
1705 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1706
1707         * mips.igen: Remove whitespace at end of lines.
1708
1709 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1710
1711         * mips.igen (loadstore_ea): New function to do effective
1712         address calculations.
1713         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1714         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1715         CACHE): Use loadstore_ea to do effective address computations.
1716
1717 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1718
1719         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1720         * mips.igen (LL, CxC1, MxC1): Likewise.
1721
1722 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1723
1724         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1725         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1726         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1727         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1728         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1729         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1730         Don't split opcode fields by hand, use the opcode field values
1731         provided by igen.
1732
1733 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1734
1735         * mips.igen (do_divu): Fix spacing.
1736
1737         * mips.igen (do_dsllv): Move to be right before DSLLV,
1738         to match the rest of the do_<shift> functions.
1739
1740 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1741
1742         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1743         DSRL32, do_dsrlv): Trace inputs and results.
1744
1745 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1746
1747         * mips.igen (CACHE): Provide instruction-printing string.
1748
1749         * interp.c (signal_exception): Comment tokens after #endif.
1750
1751 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1752
1753         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1754         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1755         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1756         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1757         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1758         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1759         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1760         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1761
1762 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1763
1764         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1765         instruction-printing string.
1766         (LWU): Use '64' as the filter flag.
1767
1768 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1769
1770         * mips.igen (SDXC1): Fix instruction-printing string.
1771
1772 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1773
1774         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1775         filter flags "32,f".
1776
1777 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1778
1779         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1780         as the filter flag.
1781
1782 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1783
1784         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1785         add a comma) so that it more closely match the MIPS ISA
1786         documentation opcode partitioning.
1787         (PREF): Put useful names on opcode fields, and include
1788         instruction-printing string.
1789
1790 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1791
1792         * mips.igen (check_u64): New function which in the future will
1793         check whether 64-bit instructions are usable and signal an
1794         exception if not.  Currently a no-op.
1795         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1796         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1797         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1798         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1799
1800         * mips.igen (check_fpu): New function which in the future will
1801         check whether FPU instructions are usable and signal an exception
1802         if not.  Currently a no-op.
1803         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1804         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1805         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1806         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1807         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1808         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1809         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1810         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1811
1812 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1813
1814         * mips.igen (do_load_left, do_load_right): Move to be immediately
1815         following do_load.
1816         (do_store_left, do_store_right): Move to be immediately following
1817         do_store.
1818
1819 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1820
1821         * mips.igen (mipsV): New model name.  Also, add it to
1822         all instructions and functions where it is appropriate.
1823
1824 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1825
1826         * mips.igen: For all functions and instructions, list model
1827         names that support that instruction one per line.
1828
1829 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1830
1831         * mips.igen: Add some additional comments about supported
1832         models, and about which instructions go where.
1833         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1834         order as is used in the rest of the file.
1835
1836 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1837
1838         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1839         indicating that ALU32_END or ALU64_END are there to check
1840         for overflow.
1841         (DADD): Likewise, but also remove previous comment about
1842         overflow checking.
1843
1844 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1845
1846         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1847         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1848         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1849         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1850         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1851         fields (i.e., add and move commas) so that they more closely
1852         match the MIPS ISA documentation opcode partitioning.
1853
1854 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1855
1856         * mips.igen (ADDI): Print immediate value.
1857         (BREAK): Print code.
1858         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1859         (SLL): Print "nop" specially, and don't run the code
1860         that does the shift for the "nop" case.
1861
1862 2001-11-17  Fred Fish  <fnf@redhat.com>
1863
1864         * sim-main.h (float_operation): Move enum declaration outside
1865         of _sim_cpu struct declaration.
1866
1867 2001-04-12  Jim Blandy  <jimb@redhat.com>
1868
1869         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1870         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1871         set of the FCSR.
1872         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1873         PENDING_FILL, and you can get the intended effect gracefully by
1874         calling PENDING_SCHED directly.
1875
1876 2001-02-23  Ben Elliston  <bje@redhat.com>
1877
1878         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1879         already defined elsewhere.
1880
1881 2001-02-19  Ben Elliston  <bje@redhat.com>
1882
1883         * sim-main.h (sim_monitor): Return an int.
1884         * interp.c (sim_monitor): Add return values.
1885         (signal_exception): Handle error conditions from sim_monitor.
1886
1887 2001-02-08  Ben Elliston  <bje@redhat.com>
1888
1889         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1890         (store_memory): Likewise, pass cia to sim_core_write*.
1891
1892 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1893
1894         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1895         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1896
1897 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1898
1899         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1900         * Makefile.in: Don't delete *.igen when cleaning directory.
1901
1902 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1903
1904         * m16.igen (break): Call SignalException not sim_engine_halt.
1905
1906 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1907
1908         From Jason Eckhardt:
1909         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1910
1911 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1912
1913         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1914
1915 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1916
1917         * mips.igen (do_dmultx): Fix typo.
1918
1919 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1920
1921         * configure: Regenerated to track ../common/aclocal.m4 changes.
1922
1923 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1924
1925         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1926
1927 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1928
1929         * sim-main.h (GPR_CLEAR): Define macro.
1930
1931 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1932
1933         * interp.c (decode_coproc): Output long using %lx and not %s.
1934
1935 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1936
1937         * interp.c (sim_open): Sort & extend dummy memory regions for
1938         --board=jmr3904 for eCos.
1939
1940 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1941
1942         * configure: Regenerated.
1943
1944 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1945
1946         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1947         calls, conditional on the simulator being in verbose mode.
1948
1949 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1950
1951         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1952         cache don't get ReservedInstruction traps.
1953
1954 1999-11-29  Mark Salter  <msalter@cygnus.com>
1955
1956         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1957         to clear status bits in sdisr register. This is how the hardware works.
1958
1959         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1960         being used by cygmon.
1961
1962 1999-11-11  Andrew Haley  <aph@cygnus.com>
1963
1964         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1965         instructions.
1966
1967 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1968
1969         * mips.igen (MULT): Correct previous mis-applied patch.
1970
1971 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1972
1973         * mips.igen (delayslot32): Handle sequence like
1974         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1975         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1976         (MULT): Actually pass the third register...
1977
1978 1999-09-03  Mark Salter  <msalter@cygnus.com>
1979
1980         * interp.c (sim_open): Added more memory aliases for additional
1981         hardware being touched by cygmon on jmr3904 board.
1982
1983 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1984
1985         * configure: Regenerated to track ../common/aclocal.m4 changes.
1986
1987 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1988
1989         * interp.c (sim_store_register): Handle case where client - GDB -
1990         specifies that a 4 byte register is 8 bytes in size.
1991         (sim_fetch_register): Ditto.
1992
1993 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1994
1995         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1996         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1997         (idt_monitor_base): Base address for IDT monitor traps.
1998         (pmon_monitor_base): Ditto for PMON.
1999         (lsipmon_monitor_base): Ditto for LSI PMON.
2000         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
2001         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
2002         (sim_firmware_command): New function.
2003         (mips_option_handler): Call it for OPTION_FIRMWARE.
2004         (sim_open): Allocate memory for idt_monitor region.  If "--board"
2005         option was given, add no monitor by default.  Add BREAK hooks only if
2006         monitors are also there.
2007
2008 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
2009
2010         * interp.c (sim_monitor): Flush output before reading input.
2011
2012 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
2013
2014         * tconfig.in (SIM_HANDLES_LMA): Always define.
2015
2016 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
2017
2018         From Mark Salter <msalter@cygnus.com>:
2019         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
2020         (sim_open): Add setup for BSP board.
2021
2022 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
2023
2024         * mips.igen (MULT, MULTU): Add syntax for two operand version.
2025         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
2026         them as unimplemented.
2027
2028 1999-05-08  Felix Lee  <flee@cygnus.com>
2029
2030         * configure: Regenerated to track ../common/aclocal.m4 changes.
2031
2032 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
2033
2034         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
2035
2036 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
2037
2038         * configure.in: Any mips64vr5*-*-* target should have
2039         -DTARGET_ENABLE_FR=1.
2040         (default_endian): Any mips64vr*el-*-* target should default to
2041         LITTLE_ENDIAN.
2042         * configure: Re-generate.
2043
2044 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
2045
2046         * mips.igen (ldl): Extend from _16_, not 32.
2047
2048 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
2049
2050         * interp.c (sim_store_register): Force registers written to by GDB
2051         into an un-interpreted state.
2052
2053 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
2054
2055         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2056         CPU, start periodic background I/O polls.
2057         (tx3904sio_poll): New function: periodic I/O poller.
2058
2059 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
2060
2061         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2062
2063 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
2064
2065         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2066         case statement.
2067
2068 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
2069
2070         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2071         (load_word): Call SIM_CORE_SIGNAL hook on error.
2072         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2073         starting.  For exception dispatching, pass PC instead of NULL_CIA.
2074         (decode_coproc): Use COP0_BADVADDR to store faulting address.
2075         * sim-main.h (COP0_BADVADDR): Define.
2076         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2077         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2078         (_sim_cpu): Add exc_* fields to store register value snapshots.
2079         * mips.igen (*): Replace memory-related SignalException* calls
2080         with references to SIM_CORE_SIGNAL hook.
2081
2082         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2083         fix.
2084         * sim-main.c (*): Minor warning cleanups.
2085
2086 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
2087
2088         * m16.igen (DADDIU5): Correct type-o.
2089
2090 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
2091
2092         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2093         variables.
2094
2095 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
2096
2097         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2098         to include path.
2099         (interp.o): Add dependency on itable.h
2100         (oengine.c, gencode): Delete remaining references.
2101         (BUILT_SRC_FROM_GEN): Clean up.
2102
2103 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
2104
2105         * vr4run.c: New.
2106         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2107         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2108         tmp-run-hack) : New.
2109         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2110         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2111         Drop the "64" qualifier to get the HACK generator working.
2112         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
2113         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2114         qualifier to get the hack generator working.
2115         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2116         (DSLL): Use do_dsll.
2117         (DSLLV): Use do_dsllv.
2118         (DSRA): Use do_dsra.
2119         (DSRL): Use do_dsrl.
2120         (DSRLV): Use do_dsrlv.
2121         (BC1): Move *vr4100 to get the HACK generator working.
2122         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2123         get the HACK generator working.
2124         (MACC) Rename to get the HACK generator working.
2125         (DMACC,MACCS,DMACCS): Add the 64.
2126
2127 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
2128
2129         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2130         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2131
2132 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
2133
2134     * mips/interp.c (DEBUG): Cleanups.
2135
2136 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
2137
2138         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2139         (tx3904sio_tickle): fflush after a stdout character output.
2140
2141 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
2142
2143         * interp.c (sim_close): Uninstall modules.
2144
2145 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2146
2147         * sim-main.h, interp.c (sim_monitor): Change to global
2148         function.
2149
2150 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2151
2152         * configure.in (vr4100): Only include vr4100 instructions in
2153         simulator.
2154         * configure: Re-generate.
2155         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2156
2157 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2158
2159         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2160         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2161         true alternative.
2162
2163         * configure.in (sim_default_gen, sim_use_gen): Replace with
2164         sim_gen.
2165         (--enable-sim-igen): Delete config option. Always using IGEN.
2166         * configure: Re-generate.
2167
2168         * Makefile.in (gencode): Kill, kill, kill.
2169         * gencode.c: Ditto.
2170
2171 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2172
2173         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2174         bit mips16 igen simulator.
2175         * configure: Re-generate.
2176
2177         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2178         as part of vr4100 ISA.
2179         * vr.igen: Mark all instructions as 64 bit only.
2180
2181 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2182
2183         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2184         Pacify GCC.
2185
2186 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2187
2188         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2189         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
2190         * configure: Re-generate.
2191
2192         * m16.igen (BREAK): Define breakpoint instruction.
2193         (JALX32): Mark instruction as mips16 and not r3900.
2194         * mips.igen (C.cond.fmt): Fix typo in instruction format.
2195
2196         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2197
2198 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2199
2200         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2201         insn as a debug breakpoint.
2202
2203         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2204         pending.slot_size.
2205         (PENDING_SCHED): Clean up trace statement.
2206         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2207         (PENDING_FILL): Delay write by only one cycle.
2208         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2209
2210         * sim-main.c (pending_tick): Clean up trace statements. Add trace
2211         of pending writes.
2212         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2213         32 & 64.
2214         (pending_tick): Move incrementing of index to FOR statement.
2215         (pending_tick): Only update PENDING_OUT after a write has occured.
2216
2217         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
2218         build simulator.
2219         * configure: Re-generate.
2220
2221         * interp.c (sim_engine_run OLD): Delete explicit call to
2222         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2223
2224 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2225
2226         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2227         interrupt level number to match changed SignalExceptionInterrupt
2228         macro.
2229
2230 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2231
2232         * interp.c: #include "itable.h" if WITH_IGEN.
2233         (get_insn_name): New function.
2234         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2235         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2236
2237 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2238
2239         * configure: Rebuilt to inhale new common/aclocal.m4.
2240
2241 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2242
2243         * dv-tx3904sio.c: Include sim-assert.h.
2244
2245 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2246
2247         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2248         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2249         Reorganize target-specific sim-hardware checks.
2250         * configure: rebuilt.
2251         * interp.c (sim_open): For tx39 target boards, set
2252         OPERATING_ENVIRONMENT, add tx3904sio devices.
2253         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2254         ROM executables.  Install dv-sockser into sim-modules list.
2255
2256         * dv-tx3904irc.c: Compiler warning clean-up.
2257         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2258         frequent hw-trace messages.
2259
2260 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2261
2262         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2263
2264 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2265
2266         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2267
2268         * vr.igen: New file.
2269         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2270         * mips.igen: Define vr4100 model. Include vr.igen.
2271 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2272
2273         * mips.igen (check_mf_hilo): Correct check.
2274
2275 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * sim-main.h (interrupt_event): Add prototype.
2278
2279         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2280         register_ptr, register_value.
2281         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2282
2283         * sim-main.h (tracefh): Make extern.
2284
2285 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2286
2287         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2288         Reduce unnecessarily high timer event frequency.
2289         * dv-tx3904cpu.c: Ditto for interrupt event.
2290
2291 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2292
2293         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2294         to allay warnings.
2295         (interrupt_event): Made non-static.
2296
2297         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2298         interchange of configuration values for external vs. internal
2299         clock dividers.
2300
2301 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2302
2303         * mips.igen (BREAK): Moved code to here for
2304         simulator-reserved break instructions.
2305         * gencode.c (build_instruction): Ditto.
2306         * interp.c (signal_exception): Code moved from here.  Non-
2307         reserved instructions now use exception vector, rather
2308         than halting sim.
2309         * sim-main.h: Moved magic constants to here.
2310
2311 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2312
2313         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2314         register upon non-zero interrupt event level, clear upon zero
2315         event value.
2316         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2317         by passing zero event value.
2318         (*_io_{read,write}_buffer): Endianness fixes.
2319         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2320         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2321
2322         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2323         serial I/O and timer module at base address 0xFFFF0000.
2324
2325 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2326
2327         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2328         and BigEndianCPU.
2329
2330 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2331
2332         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2333         parts.
2334         * configure: Update.
2335
2336 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2337
2338         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2339         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2340         * configure.in: Include tx3904tmr in hw_device list.
2341         * configure: Rebuilt.
2342         * interp.c (sim_open): Instantiate three timer instances.
2343         Fix address typo of tx3904irc instance.
2344
2345 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2346
2347         * interp.c (signal_exception): SystemCall exception now uses
2348         the exception vector.
2349
2350 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2351
2352         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2353         to allay warnings.
2354
2355 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2356
2357         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2358
2359 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2360
2361         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2362
2363         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2364         sim-main.h. Declare a struct hw_descriptor instead of struct
2365         hw_device_descriptor.
2366
2367 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2368
2369         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2370         right bits and then re-align left hand bytes to correct byte
2371         lanes.  Fix incorrect computation in do_store_left when loading
2372         bytes from second word.
2373
2374 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2375
2376         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2377         * interp.c (sim_open): Only create a device tree when HW is
2378         enabled.
2379
2380         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2381         * interp.c (signal_exception): Ditto.
2382
2383 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2384
2385         * gencode.c: Mark BEGEZALL as LIKELY.
2386
2387 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2388
2389         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2390         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2391
2392 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2393
2394         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2395         modules.  Recognize TX39 target with "mips*tx39" pattern.
2396         * configure: Rebuilt.
2397         * sim-main.h (*): Added many macros defining bits in
2398         TX39 control registers.
2399         (SignalInterrupt): Send actual PC instead of NULL.
2400         (SignalNMIReset): New exception type.
2401         * interp.c (board): New variable for future use to identify
2402         a particular board being simulated.
2403         (mips_option_handler,mips_options): Added "--board" option.
2404         (interrupt_event): Send actual PC.
2405         (sim_open): Make memory layout conditional on board setting.
2406         (signal_exception): Initial implementation of hardware interrupt
2407         handling.  Accept another break instruction variant for simulator
2408         exit.
2409         (decode_coproc): Implement RFE instruction for TX39.
2410         (mips.igen): Decode RFE instruction as such.
2411         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2412         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2413         bbegin to implement memory map.
2414         * dv-tx3904cpu.c: New file.
2415         * dv-tx3904irc.c: New file.
2416
2417 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2418
2419         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2420
2421 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2422
2423         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2424         with calls to check_div_hilo.
2425
2426 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2427
2428         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2429         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2430         Add special r3900 version of do_mult_hilo.
2431         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2432         with calls to check_mult_hilo.
2433         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2434         with calls to check_div_hilo.
2435
2436 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2437
2438         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2439         Document a replacement.
2440
2441 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2442
2443         * interp.c (sim_monitor): Make mon_printf work.
2444
2445 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2446
2447         * sim-main.h (INSN_NAME): New arg `cpu'.
2448
2449 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2450
2451         * configure: Regenerated to track ../common/aclocal.m4 changes.
2452
2453 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2454
2455         * configure: Regenerated to track ../common/aclocal.m4 changes.
2456         * config.in: Ditto.
2457
2458 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2459
2460         * acconfig.h: New file.
2461         * configure.in: Reverted change of Apr 24; use sinclude again.
2462
2463 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2464
2465         * configure: Regenerated to track ../common/aclocal.m4 changes.
2466         * config.in: Ditto.
2467
2468 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2469
2470         * configure.in: Don't call sinclude.
2471
2472 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2473
2474         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2475
2476 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2477
2478         * mips.igen (ERET): Implement.
2479
2480         * interp.c (decode_coproc): Return sign-extended EPC.
2481
2482         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2483
2484         * interp.c (signal_exception): Do not ignore Trap.
2485         (signal_exception): On TRAP, restart at exception address.
2486         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2487         (signal_exception): Update.
2488         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2489         so that TRAP instructions are caught.
2490
2491 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2492
2493         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2494         contains HI/LO access history.
2495         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2496         (HIACCESS, LOACCESS): Delete, replace with
2497         (HIHISTORY, LOHISTORY): New macros.
2498         (CHECKHILO): Delete all, moved to mips.igen
2499
2500         * gencode.c (build_instruction): Do not generate checks for
2501         correct HI/LO register usage.
2502
2503         * interp.c (old_engine_run): Delete checks for correct HI/LO
2504         register usage.
2505
2506         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2507         check_mf_cycles): New functions.
2508         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2509         do_divu, domultx, do_mult, do_multu): Use.
2510
2511         * tx.igen ("madd", "maddu"): Use.
2512
2513 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2514
2515         * mips.igen (DSRAV): Use function do_dsrav.
2516         (SRAV): Use new function do_srav.
2517
2518         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2519         (B): Sign extend 11 bit immediate.
2520         (EXT-B*): Shift 16 bit immediate left by 1.
2521         (ADDIU*): Don't sign extend immediate value.
2522
2523 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2524
2525         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2526
2527         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2528         functions.
2529
2530         * mips.igen (delayslot32, nullify_next_insn): New functions.
2531         (m16.igen): Always include.
2532         (do_*): Add more tracing.
2533
2534         * m16.igen (delayslot16): Add NIA argument, could be called by a
2535         32 bit MIPS16 instruction.
2536
2537         * interp.c (ifetch16): Move function from here.
2538         * sim-main.c (ifetch16): To here.
2539
2540         * sim-main.c (ifetch16, ifetch32): Update to match current
2541         implementations of LH, LW.
2542         (signal_exception): Don't print out incorrect hex value of illegal
2543         instruction.
2544
2545 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2546
2547         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2548         instruction.
2549
2550         * m16.igen: Implement MIPS16 instructions.
2551
2552         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2553         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2554         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2555         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2556         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2557         bodies of corresponding code from 32 bit insn to these.  Also used
2558         by MIPS16 versions of functions.
2559
2560         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2561         (IMEM16): Drop NR argument from macro.
2562
2563 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2564
2565         * Makefile.in (SIM_OBJS): Add sim-main.o.
2566
2567         * sim-main.h (address_translation, load_memory, store_memory,
2568         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2569         as INLINE_SIM_MAIN.
2570         (pr_addr, pr_uword64): Declare.
2571         (sim-main.c): Include when H_REVEALS_MODULE_P.
2572
2573         * interp.c (address_translation, load_memory, store_memory,
2574         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2575         from here.
2576         * sim-main.c: To here. Fix compilation problems.
2577
2578         * configure.in: Enable inlining.
2579         * configure: Re-config.
2580
2581 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * configure: Regenerated to track ../common/aclocal.m4 changes.
2584
2585 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2586
2587         * mips.igen: Include tx.igen.
2588         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2589         * tx.igen: New file, contains MADD and MADDU.
2590
2591         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2592         the hardwired constant `7'.
2593         (store_memory): Ditto.
2594         (LOADDRMASK): Move definition to sim-main.h.
2595
2596         mips.igen (MTC0): Enable for r3900.
2597         (ADDU): Add trace.
2598
2599         mips.igen (do_load_byte): Delete.
2600         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2601         do_store_right): New functions.
2602         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2603
2604         configure.in: Let the tx39 use igen again.
2605         configure: Update.
2606
2607 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2608
2609         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2610         not an address sized quantity.  Return zero for cache sizes.
2611
2612 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2613
2614         * mips.igen (r3900): r3900 does not support 64 bit integer
2615         operations.
2616
2617 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2618
2619         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2620         than igen one.
2621         * configure : Rebuild.
2622
2623 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2624
2625         * configure: Regenerated to track ../common/aclocal.m4 changes.
2626
2627 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2628
2629         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2630
2631 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2632
2633         * configure: Regenerated to track ../common/aclocal.m4 changes.
2634         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2635
2636 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2637
2638         * configure: Regenerated to track ../common/aclocal.m4 changes.
2639
2640 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2641
2642         * interp.c (Max, Min): Comment out functions. Not yet used.
2643
2644 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2645
2646         * configure: Regenerated to track ../common/aclocal.m4 changes.
2647
2648 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2649
2650         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2651         configurable settings for stand-alone simulator.
2652
2653         * configure.in: Added X11 search, just in case.
2654
2655         * configure: Regenerated.
2656
2657 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2658
2659         * interp.c (sim_write, sim_read, load_memory, store_memory):
2660         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2661
2662 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2663
2664         * sim-main.h (GETFCC): Return an unsigned value.
2665
2666 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2667
2668         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2669         (DADD): Result destination is RD not RT.
2670
2671 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2672
2673         * sim-main.h (HIACCESS, LOACCESS): Always define.
2674
2675         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2676
2677         * interp.c (sim_info): Delete.
2678
2679 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2680
2681         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2682         (mips_option_handler): New argument `cpu'.
2683         (sim_open): Update call to sim_add_option_table.
2684
2685 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2686
2687         * mips.igen (CxC1): Add tracing.
2688
2689 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * sim-main.h (Max, Min): Declare.
2692
2693         * interp.c (Max, Min): New functions.
2694
2695         * mips.igen (BC1): Add tracing.
2696
2697 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2698
2699         * interp.c Added memory map for stack in vr4100
2700
2701 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2702
2703         * interp.c (load_memory): Add missing "break"'s.
2704
2705 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2706
2707         * interp.c (sim_store_register, sim_fetch_register): Pass in
2708         length parameter.  Return -1.
2709
2710 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2711
2712         * interp.c: Added hardware init hook, fixed warnings.
2713
2714 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2715
2716         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2717
2718 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2719
2720         * interp.c (ifetch16): New function.
2721
2722         * sim-main.h (IMEM32): Rename IMEM.
2723         (IMEM16_IMMED): Define.
2724         (IMEM16): Define.
2725         (DELAY_SLOT): Update.
2726
2727         * m16run.c (sim_engine_run): New file.
2728
2729         * m16.igen: All instructions except LB.
2730         (LB): Call do_load_byte.
2731         * mips.igen (do_load_byte): New function.
2732         (LB): Call do_load_byte.
2733
2734         * mips.igen: Move spec for insn bit size and high bit from here.
2735         * Makefile.in (tmp-igen, tmp-m16): To here.
2736
2737         * m16.dc: New file, decode mips16 instructions.
2738
2739         * Makefile.in (SIM_NO_ALL): Define.
2740         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2741
2742 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2743
2744         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2745         point unit to 32 bit registers.
2746         * configure: Re-generate.
2747
2748 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2749
2750         * configure.in (sim_use_gen): Make IGEN the default simulator
2751         generator for generic 32 and 64 bit mips targets.
2752         * configure: Re-generate.
2753
2754 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2755
2756         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2757         bitsize.
2758
2759         * interp.c (sim_fetch_register, sim_store_register): Read/write
2760         FGR from correct location.
2761         (sim_open): Set size of FGR's according to
2762         WITH_TARGET_FLOATING_POINT_BITSIZE.
2763
2764         * sim-main.h (FGR): Store floating point registers in a separate
2765         array.
2766
2767 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2768
2769         * configure: Regenerated to track ../common/aclocal.m4 changes.
2770
2771 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2772
2773         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2774
2775         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2776
2777         * interp.c (pending_tick): New function.  Deliver pending writes.
2778
2779         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2780         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2781         it can handle mixed sized quantites and single bits.
2782
2783 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2784
2785         * interp.c (oengine.h): Do not include when building with IGEN.
2786         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2787         (sim_info): Ditto for PROCESSOR_64BIT.
2788         (sim_monitor): Replace ut_reg with unsigned_word.
2789         (*): Ditto for t_reg.
2790         (LOADDRMASK): Define.
2791         (sim_open): Remove defunct check that host FP is IEEE compliant,
2792         using software to emulate floating point.
2793         (value_fpr, ...): Always compile, was conditional on HASFPU.
2794
2795 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2796
2797         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2798         size.
2799
2800         * interp.c (SD, CPU): Define.
2801         (mips_option_handler): Set flags in each CPU.
2802         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2803         (sim_close): Do not clear STATE, deleted anyway.
2804         (sim_write, sim_read): Assume CPU zero's vm should be used for
2805         data transfers.
2806         (sim_create_inferior): Set the PC for all processors.
2807         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2808         argument.
2809         (mips16_entry): Pass correct nr of args to store_word, load_word.
2810         (ColdReset): Cold reset all cpu's.
2811         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2812         (sim_monitor, load_memory, store_memory, signal_exception): Use
2813         `CPU' instead of STATE_CPU.
2814
2815
2816         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2817         SD or CPU_.
2818
2819         * sim-main.h (signal_exception): Add sim_cpu arg.
2820         (SignalException*): Pass both SD and CPU to signal_exception.
2821         * interp.c (signal_exception): Update.
2822
2823         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2824         Ditto
2825         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2826         address_translation): Ditto
2827         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2828
2829 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2830
2831         * configure: Regenerated to track ../common/aclocal.m4 changes.
2832
2833 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2834
2835         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2836
2837         * mips.igen (model): Map processor names onto BFD name.
2838
2839         * sim-main.h (CPU_CIA): Delete.
2840         (SET_CIA, GET_CIA): Define
2841
2842 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2843
2844         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2845         regiser.
2846
2847         * configure.in (default_endian): Configure a big-endian simulator
2848         by default.
2849         * configure: Re-generate.
2850
2851 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2852
2853         * configure: Regenerated to track ../common/aclocal.m4 changes.
2854
2855 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2856
2857         * interp.c (sim_monitor): Handle Densan monitor outbyte
2858         and inbyte functions.
2859
2860 1997-12-29  Felix Lee  <flee@cygnus.com>
2861
2862         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2863
2864 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2865
2866         * Makefile.in (tmp-igen): Arrange for $zero to always be
2867         reset to zero after every instruction.
2868
2869 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2870
2871         * configure: Regenerated to track ../common/aclocal.m4 changes.
2872         * config.in: Ditto.
2873
2874 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2875
2876         * mips.igen (MSUB): Fix to work like MADD.
2877         * gencode.c (MSUB): Similarly.
2878
2879 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2880
2881         * configure: Regenerated to track ../common/aclocal.m4 changes.
2882
2883 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2884
2885         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2886
2887 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2888
2889         * sim-main.h (sim-fpu.h): Include.
2890
2891         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2892         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2893         using host independant sim_fpu module.
2894
2895 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2896
2897         * interp.c (signal_exception): Report internal errors with SIGABRT
2898         not SIGQUIT.
2899
2900         * sim-main.h (C0_CONFIG): New register.
2901         (signal.h): No longer include.
2902
2903         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2904
2905 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2906
2907         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2908
2909 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2910
2911         * mips.igen: Tag vr5000 instructions.
2912         (ANDI): Was missing mipsIV model, fix assembler syntax.
2913         (do_c_cond_fmt): New function.
2914         (C.cond.fmt): Handle mips I-III which do not support CC field
2915         separatly.
2916         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2917         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2918         in IV3.2 spec.
2919         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2920         vr5000 which saves LO in a GPR separatly.
2921
2922         * configure.in (enable-sim-igen): For vr5000, select vr5000
2923         specific instructions.
2924         * configure: Re-generate.
2925
2926 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2927
2928         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2929
2930         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2931         fmt_uninterpreted_64 bit cases to switch.  Convert to
2932         fmt_formatted,
2933
2934         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2935
2936         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2937         as specified in IV3.2 spec.
2938         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2939
2940 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2941
2942         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2943         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2944         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2945         PENDING_FILL versions of instructions.  Simplify.
2946         (X): New function.
2947         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2948         instructions.
2949         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2950         a signed value.
2951         (MTHI, MFHI): Disable code checking HI-LO.
2952
2953         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2954         global.
2955         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2956
2957 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2958
2959         * gencode.c (build_mips16_operands): Replace IPC with cia.
2960
2961         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2962         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2963         IPC to `cia'.
2964         (UndefinedResult): Replace function with macro/function
2965         combination.
2966         (sim_engine_run): Don't save PC in IPC.
2967
2968         * sim-main.h (IPC): Delete.
2969
2970
2971         * interp.c (signal_exception, store_word, load_word,
2972         address_translation, load_memory, store_memory, cache_op,
2973         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2974         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2975         current instruction address - cia - argument.
2976         (sim_read, sim_write): Call address_translation directly.
2977         (sim_engine_run): Rename variable vaddr to cia.
2978         (signal_exception): Pass cia to sim_monitor
2979
2980         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2981         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2982         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2983
2984         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2985         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2986         SIM_ASSERT.
2987
2988         * interp.c (signal_exception): Pass restart address to
2989         sim_engine_restart.
2990
2991         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2992         idecode.o): Add dependency.
2993
2994         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2995         Delete definitions
2996         (DELAY_SLOT): Update NIA not PC with branch address.
2997         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2998
2999         * mips.igen: Use CIA not PC in branch calculations.
3000         (illegal): Call SignalException.
3001         (BEQ, ADDIU): Fix assembler.
3002
3003 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3004
3005         * m16.igen (JALX): Was missing.
3006
3007         * configure.in (enable-sim-igen): New configuration option.
3008         * configure: Re-generate.
3009
3010         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
3011
3012         * interp.c (load_memory, store_memory): Delete parameter RAW.
3013         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
3014         bypassing {load,store}_memory.
3015
3016         * sim-main.h (ByteSwapMem): Delete definition.
3017
3018         * Makefile.in (SIM_OBJS): Add sim-memopt module.
3019
3020         * interp.c (sim_do_command, sim_commands): Delete mips specific
3021         commands.  Handled by module sim-options.
3022
3023         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
3024         (WITH_MODULO_MEMORY): Define.
3025
3026         * interp.c (sim_info): Delete code printing memory size.
3027
3028         * interp.c (mips_size): Nee sim_size, delete function.
3029         (power2): Delete.
3030         (monitor, monitor_base, monitor_size): Delete global variables.
3031         (sim_open, sim_close): Delete code creating monitor and other
3032         memory regions.  Use sim-memopts module, via sim_do_commandf, to
3033         manage memory regions.
3034         (load_memory, store_memory): Use sim-core for memory model.
3035
3036         * interp.c (address_translation): Delete all memory map code
3037         except line forcing 32 bit addresses.
3038
3039 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3040
3041         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
3042         trace options.
3043
3044         * interp.c (logfh, logfile): Delete globals.
3045         (sim_open, sim_close): Delete code opening & closing log file.
3046         (mips_option_handler): Delete -l and -n options.
3047         (OPTION mips_options): Ditto.
3048
3049         * interp.c (OPTION mips_options): Rename option trace to dinero.
3050         (mips_option_handler): Update.
3051
3052 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3053
3054         * interp.c (fetch_str): New function.
3055         (sim_monitor): Rewrite using sim_read & sim_write.
3056         (sim_open): Check magic number.
3057         (sim_open): Write monitor vectors into memory using sim_write.
3058         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3059         (sim_read, sim_write): Simplify - transfer data one byte at a
3060         time.
3061         (load_memory, store_memory): Clarify meaning of parameter RAW.
3062
3063         * sim-main.h (isHOST): Defete definition.
3064         (isTARGET): Mark as depreciated.
3065         (address_translation): Delete parameter HOST.
3066
3067         * interp.c (address_translation): Delete parameter HOST.
3068
3069 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3070
3071         * mips.igen:
3072
3073         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3074         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3075
3076 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3077
3078         * mips.igen: Add model filter field to records.
3079
3080 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3081
3082         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
3083
3084         interp.c (sim_engine_run): Do not compile function sim_engine_run
3085         when WITH_IGEN == 1.
3086
3087         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3088         target architecture.
3089
3090         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3091         igen. Replace with configuration variables sim_igen_flags /
3092         sim_m16_flags.
3093
3094         * m16.igen: New file.  Copy mips16 insns here.
3095         * mips.igen: From here.
3096
3097 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3098
3099         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3100         to top.
3101         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3102
3103 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
3104
3105         * gencode.c (build_instruction): Follow sim_write's lead in using
3106         BigEndianMem instead of !ByteSwapMem.
3107
3108 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3109
3110         * configure.in (sim_gen): Dependent on target, select type of
3111         generator.  Always select old style generator.
3112
3113         configure: Re-generate.
3114
3115         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3116         targets.
3117         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3118         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3119         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3120         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3121         SIM_@sim_gen@_*, set by autoconf.
3122
3123 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3124
3125         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3126
3127         * interp.c (ColdReset): Remove #ifdef HASFPU, check
3128         CURRENT_FLOATING_POINT instead.
3129
3130         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3131         (address_translation): Raise exception InstructionFetch when
3132         translation fails and isINSTRUCTION.
3133
3134         * interp.c (sim_open, sim_write, sim_monitor, store_word,
3135         sim_engine_run): Change type of of vaddr and paddr to
3136         address_word.
3137         (address_translation, prefetch, load_memory, store_memory,
3138         cache_op): Change type of vAddr and pAddr to address_word.
3139
3140         * gencode.c (build_instruction): Change type of vaddr and paddr to
3141         address_word.
3142
3143 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3144
3145         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3146         macro to obtain result of ALU op.
3147
3148 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3149
3150         * interp.c (sim_info): Call profile_print.
3151
3152 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3153
3154         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3155
3156         * sim-main.h (WITH_PROFILE): Do not define, defined in
3157         common/sim-config.h.  Use sim-profile module.
3158         (simPROFILE): Delete defintion.
3159
3160         * interp.c (PROFILE): Delete definition.
3161         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3162         (sim_close): Delete code writing profile histogram.
3163         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3164         Delete.
3165         (sim_engine_run): Delete code profiling the PC.
3166
3167 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3168
3169         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3170
3171         * interp.c (sim_monitor): Make register pointers of type
3172         unsigned_word*.
3173
3174         * sim-main.h: Make registers of type unsigned_word not
3175         signed_word.
3176
3177 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3178
3179         * interp.c (sync_operation): Rename from SyncOperation, make
3180         global, add SD argument.
3181         (prefetch): Rename from Prefetch, make global, add SD argument.
3182         (decode_coproc): Make global.
3183
3184         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3185
3186         * gencode.c (build_instruction): Generate DecodeCoproc not
3187         decode_coproc calls.
3188
3189         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3190         (SizeFGR): Move to sim-main.h
3191         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3192         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3193         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3194         sim-main.h.
3195         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3196         FP_RM_TOMINF, GETRM): Move to sim-main.h.
3197         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3198         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3199         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3200         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3201
3202         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3203         exception.
3204         (sim-alu.h): Include.
3205         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3206         (sim_cia): Typedef to instruction_address.
3207
3208 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3209
3210         * Makefile.in (interp.o): Rename generated file engine.c to
3211         oengine.c.
3212
3213         * interp.c: Update.
3214
3215 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3216
3217         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3218
3219 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3220
3221         * gencode.c (build_instruction): For "FPSQRT", output correct
3222         number of arguments to Recip.
3223
3224 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3225
3226         * Makefile.in (interp.o): Depends on sim-main.h
3227
3228         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3229
3230         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3231         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3232         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3233         STATE, DSSTATE): Define
3234         (GPR, FGRIDX, ..): Define.
3235
3236         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3237         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3238         (GPR, FGRIDX, ...): Delete macros.
3239
3240         * interp.c: Update names to match defines from sim-main.h
3241
3242 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3243
3244         * interp.c (sim_monitor): Add SD argument.
3245         (sim_warning): Delete.  Replace calls with calls to
3246         sim_io_eprintf.
3247         (sim_error): Delete. Replace calls with sim_io_error.
3248         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3249         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3250         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3251         argument.
3252         (mips_size): Rename from sim_size. Add SD argument.
3253
3254         * interp.c (simulator): Delete global variable.
3255         (callback): Delete global variable.
3256         (mips_option_handler, sim_open, sim_write, sim_read,
3257         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3258         sim_size,sim_monitor): Use sim_io_* not callback->*.
3259         (sim_open): ZALLOC simulator struct.
3260         (PROFILE): Do not define.
3261
3262 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3263
3264         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3265         support.h with corresponding code.
3266
3267         * sim-main.h (word64, uword64), support.h: Move definition to
3268         sim-main.h.
3269         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3270
3271         * support.h: Delete
3272         * Makefile.in: Update dependencies
3273         * interp.c: Do not include.
3274
3275 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3276
3277         * interp.c (address_translation, load_memory, store_memory,
3278         cache_op): Rename to from AddressTranslation et.al., make global,
3279         add SD argument
3280
3281         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3282         CacheOp): Define.
3283
3284         * interp.c (SignalException): Rename to signal_exception, make
3285         global.
3286
3287         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3288
3289         * sim-main.h (SignalException, SignalExceptionInterrupt,
3290         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3291         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3292         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3293         Define.
3294
3295         * interp.c, support.h: Use.
3296
3297 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3298
3299         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3300         to value_fpr / store_fpr. Add SD argument.
3301         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3302         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3303
3304         * sim-main.h (ValueFPR, StoreFPR): Define.
3305
3306 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3307
3308         * interp.c (sim_engine_run): Check consistency between configure
3309         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3310         and HASFPU.
3311
3312         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3313         (mips_fpu): Configure WITH_FLOATING_POINT.
3314         (mips_endian): Configure WITH_TARGET_ENDIAN.
3315         * configure: Update.
3316
3317 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3318
3319         * configure: Regenerated to track ../common/aclocal.m4 changes.
3320
3321 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3322
3323         * configure: Regenerated.
3324
3325 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3326
3327         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3328
3329 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3330
3331         * gencode.c (print_igen_insn_models): Assume certain architectures
3332         include all mips* instructions.
3333         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3334         instruction.
3335
3336         * Makefile.in (tmp.igen): Add target. Generate igen input from
3337         gencode file.
3338
3339         * gencode.c (FEATURE_IGEN): Define.
3340         (main): Add --igen option.  Generate output in igen format.
3341         (process_instructions): Format output according to igen option.
3342         (print_igen_insn_format): New function.
3343         (print_igen_insn_models): New function.
3344         (process_instructions): Only issue warnings and ignore
3345         instructions when no FEATURE_IGEN.
3346
3347 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3348
3349         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3350         MIPS targets.
3351
3352 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3353
3354         * configure: Regenerated to track ../common/aclocal.m4 changes.
3355
3356 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3357
3358         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3359         SIM_RESERVED_BITS): Delete, moved to common.
3360         (SIM_EXTRA_CFLAGS): Update.
3361
3362 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3363
3364         * configure.in: Configure non-strict memory alignment.
3365         * configure: Regenerated to track ../common/aclocal.m4 changes.
3366
3367 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3368
3369         * configure: Regenerated to track ../common/aclocal.m4 changes.
3370
3371 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3372
3373         * gencode.c (SDBBP,DERET): Added (3900) insns.
3374         (RFE): Turn on for 3900.
3375         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3376         (dsstate): Made global.
3377         (SUBTARGET_R3900): Added.
3378         (CANCELDELAYSLOT): New.
3379         (SignalException): Ignore SystemCall rather than ignore and
3380         terminate.  Add DebugBreakPoint handling.
3381         (decode_coproc): New insns RFE, DERET; and new registers Debug
3382         and DEPC protected by SUBTARGET_R3900.
3383         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3384         bits explicitly.
3385         * Makefile.in,configure.in: Add mips subtarget option.
3386         * configure: Update.
3387
3388 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3389
3390         * gencode.c: Add r3900 (tx39).
3391
3392
3393 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3394
3395         * gencode.c (build_instruction): Don't need to subtract 4 for
3396         JALR, just 2.
3397
3398 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3399
3400         * interp.c: Correct some HASFPU problems.
3401
3402 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3403
3404         * configure: Regenerated to track ../common/aclocal.m4 changes.
3405
3406 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3407
3408         * interp.c (mips_options): Fix samples option short form, should
3409         be `x'.
3410
3411 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3412
3413         * interp.c (sim_info): Enable info code.  Was just returning.
3414
3415 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3416
3417         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3418         MFC0.
3419
3420 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3421
3422         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3423         constants.
3424         (build_instruction): Ditto for LL.
3425
3426 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3427
3428         * configure: Regenerated to track ../common/aclocal.m4 changes.
3429
3430 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3431
3432         * configure: Regenerated to track ../common/aclocal.m4 changes.
3433         * config.in: Ditto.
3434
3435 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3436
3437         * interp.c (sim_open): Add call to sim_analyze_program, update
3438         call to sim_config.
3439
3440 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3441
3442         * interp.c (sim_kill): Delete.
3443         (sim_create_inferior): Add ABFD argument. Set PC from same.
3444         (sim_load): Move code initializing trap handlers from here.
3445         (sim_open): To here.
3446         (sim_load): Delete, use sim-hload.c.
3447
3448         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3449
3450 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3451
3452         * configure: Regenerated to track ../common/aclocal.m4 changes.
3453         * config.in: Ditto.
3454
3455 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3456
3457         * interp.c (sim_open): Add ABFD argument.
3458         (sim_load): Move call to sim_config from here.
3459         (sim_open): To here.  Check return status.
3460
3461 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3462
3463         * gencode.c (build_instruction): Two arg MADD should
3464         not assign result to $0.
3465
3466 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3467
3468         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3469         * sim/mips/configure.in: Regenerate.
3470
3471 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3472
3473         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3474         signed8, unsigned8 et.al. types.
3475
3476         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3477         hosts when selecting subreg.
3478
3479 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3480
3481         * interp.c (sim_engine_run): Reset the ZERO register to zero
3482         regardless of FEATURE_WARN_ZERO.
3483         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3484
3485 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3486
3487         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3488         (SignalException): For BreakPoints ignore any mode bits and just
3489         save the PC.
3490         (SignalException): Always set the CAUSE register.
3491
3492 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3493
3494         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3495         exception has been taken.
3496
3497         * interp.c: Implement the ERET and mt/f sr instructions.
3498
3499 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3500
3501         * interp.c (SignalException): Don't bother restarting an
3502         interrupt.
3503
3504 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3505
3506         * interp.c (SignalException): Really take an interrupt.
3507         (interrupt_event): Only deliver interrupts when enabled.
3508
3509 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3510
3511         * interp.c (sim_info): Only print info when verbose.
3512         (sim_info) Use sim_io_printf for output.
3513
3514 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3515
3516         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3517         mips architectures.
3518
3519 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3520
3521         * interp.c (sim_do_command): Check for common commands if a
3522         simulator specific command fails.
3523
3524 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3525
3526         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3527         and simBE when DEBUG is defined.
3528
3529 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3530
3531         * interp.c (interrupt_event): New function.  Pass exception event
3532         onto exception handler.
3533
3534         * configure.in: Check for stdlib.h.
3535         * configure: Regenerate.
3536
3537         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3538         variable declaration.
3539         (build_instruction): Initialize memval1.
3540         (build_instruction): Add UNUSED attribute to byte, bigend,
3541         reverse.
3542         (build_operands): Ditto.
3543
3544         * interp.c: Fix GCC warnings.
3545         (sim_get_quit_code): Delete.
3546
3547         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3548         * Makefile.in: Ditto.
3549         * configure: Re-generate.
3550
3551         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3552
3553 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3554
3555         * interp.c (mips_option_handler): New function parse argumes using
3556         sim-options.
3557         (myname): Replace with STATE_MY_NAME.
3558         (sim_open): Delete check for host endianness - performed by
3559         sim_config.
3560         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3561         (sim_open): Move much of the initialization from here.
3562         (sim_load): To here.  After the image has been loaded and
3563         endianness set.
3564         (sim_open): Move ColdReset from here.
3565         (sim_create_inferior): To here.
3566         (sim_open): Make FP check less dependant on host endianness.
3567
3568         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3569         run.
3570         * interp.c (sim_set_callbacks): Delete.
3571
3572         * interp.c (membank, membank_base, membank_size): Replace with
3573         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3574         (sim_open): Remove call to callback->init. gdb/run do this.
3575
3576         * interp.c: Update
3577
3578         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3579
3580         * interp.c (big_endian_p): Delete, replaced by
3581         current_target_byte_order.
3582
3583 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3584
3585         * interp.c (host_read_long, host_read_word, host_swap_word,
3586         host_swap_long): Delete. Using common sim-endian.
3587         (sim_fetch_register, sim_store_register): Use H2T.
3588         (pipeline_ticks): Delete.  Handled by sim-events.
3589         (sim_info): Update.
3590         (sim_engine_run): Update.
3591
3592 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3593
3594         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3595         reason from here.
3596         (SignalException): To here. Signal using sim_engine_halt.
3597         (sim_stop_reason): Delete, moved to common.
3598
3599 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3600
3601         * interp.c (sim_open): Add callback argument.
3602         (sim_set_callbacks): Delete SIM_DESC argument.
3603         (sim_size): Ditto.
3604
3605 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3606
3607         * Makefile.in (SIM_OBJS): Add common modules.
3608
3609         * interp.c (sim_set_callbacks): Also set SD callback.
3610         (set_endianness, xfer_*, swap_*): Delete.
3611         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3612         Change to functions using sim-endian macros.
3613         (control_c, sim_stop): Delete, use common version.
3614         (simulate): Convert into.
3615         (sim_engine_run): This function.
3616         (sim_resume): Delete.
3617
3618         * interp.c (simulation): New variable - the simulator object.
3619         (sim_kind): Delete global - merged into simulation.
3620         (sim_load): Cleanup.  Move PC assignment from here.
3621         (sim_create_inferior): To here.
3622
3623         * sim-main.h: New file.
3624         * interp.c (sim-main.h): Include.
3625
3626 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3627
3628         * configure: Regenerated to track ../common/aclocal.m4 changes.
3629
3630 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3631
3632         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3633
3634 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3635
3636         * gencode.c (build_instruction): DIV instructions: check
3637         for division by zero and integer overflow before using
3638         host's division operation.
3639
3640 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3641
3642         * Makefile.in (SIM_OBJS): Add sim-load.o.
3643         * interp.c: #include bfd.h.
3644         (target_byte_order): Delete.
3645         (sim_kind, myname, big_endian_p): New static locals.
3646         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3647         after argument parsing.  Recognize -E arg, set endianness accordingly.
3648         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3649         load file into simulator.  Set PC from bfd.
3650         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3651         (set_endianness): Use big_endian_p instead of target_byte_order.
3652
3653 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3654
3655         * interp.c (sim_size): Delete prototype - conflicts with
3656         definition in remote-sim.h.  Correct definition.
3657
3658 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3659
3660         * configure: Regenerated to track ../common/aclocal.m4 changes.
3661         * config.in: Ditto.
3662
3663 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3664
3665         * interp.c (sim_open): New arg `kind'.
3666
3667         * configure: Regenerated to track ../common/aclocal.m4 changes.
3668
3669 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3670
3671         * configure: Regenerated to track ../common/aclocal.m4 changes.
3672
3673 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3674
3675         * interp.c (sim_open): Set optind to 0 before calling getopt.
3676
3677 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3678
3679         * configure: Regenerated to track ../common/aclocal.m4 changes.
3680
3681 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3682
3683         * interp.c : Replace uses of pr_addr with pr_uword64
3684         where the bit length is always 64 independent of SIM_ADDR.
3685         (pr_uword64) : added.
3686
3687 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3688
3689         * configure: Re-generate.
3690
3691 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3692
3693         * configure: Regenerate to track ../common/aclocal.m4 changes.
3694
3695 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3696
3697         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3698         in argv form.
3699         (other sim_*): New SIM_DESC argument.
3700
3701 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3702
3703         * interp.c: Fix printing of addresses for non-64-bit targets.
3704         (pr_addr): Add function to print address based on size.
3705
3706 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3707
3708         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3709
3710 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3711
3712         * gencode.c (build_mips16_operands): Correct computation of base
3713         address for extended PC relative instruction.
3714
3715 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3716
3717         * interp.c (mips16_entry): Add support for floating point cases.
3718         (SignalException): Pass floating point cases to mips16_entry.
3719         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3720         registers.
3721         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3722         or fmt_word.
3723         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3724         and then set the state to fmt_uninterpreted.
3725         (COP_SW): Temporarily set the state to fmt_word while calling
3726         ValueFPR.
3727
3728 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3729
3730         * gencode.c (build_instruction): The high order may be set in the
3731         comparison flags at any ISA level, not just ISA 4.
3732
3733 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3734
3735         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3736         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3737         * configure.in: sinclude ../common/aclocal.m4.
3738         * configure: Regenerated.
3739
3740 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3741
3742         * configure: Rebuild after change to aclocal.m4.
3743
3744 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3745
3746         * configure configure.in Makefile.in:  Update to new configure
3747         scheme which is more compatible with WinGDB builds.
3748         * configure.in:  Improve comment on how to run autoconf.
3749         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3750         * Makefile.in:  Use autoconf substitution to install common
3751         makefile fragment.
3752
3753 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3754
3755         * gencode.c (build_instruction): Use BigEndianCPU instead of
3756         ByteSwapMem.
3757
3758 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3759
3760         * interp.c (sim_monitor): Make output to stdout visible in
3761         wingdb's I/O log window.
3762
3763 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3764
3765         * support.h: Undo previous change to SIGTRAP
3766         and SIGQUIT values.
3767
3768 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3769
3770         * interp.c (store_word, load_word): New static functions.
3771         (mips16_entry): New static function.
3772         (SignalException): Look for mips16 entry and exit instructions.
3773         (simulate): Use the correct index when setting fpr_state after
3774         doing a pending move.
3775
3776 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3777
3778         * interp.c: Fix byte-swapping code throughout to work on
3779         both little- and big-endian hosts.
3780
3781 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3782
3783         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3784         with gdb/config/i386/xm-windows.h.
3785
3786 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3787
3788         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3789         that messes up arithmetic shifts.
3790
3791 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3792
3793         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3794         SIGTRAP and SIGQUIT for _WIN32.
3795
3796 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3797
3798         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3799         force a 64 bit multiplication.
3800         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3801         destination register is 0, since that is the default mips16 nop
3802         instruction.
3803
3804 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3805
3806         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3807         (build_endian_shift): Don't check proc64.
3808         (build_instruction): Always set memval to uword64.  Cast op2 to
3809         uword64 when shifting it left in memory instructions.  Always use
3810         the same code for stores--don't special case proc64.
3811
3812         * gencode.c (build_mips16_operands): Fix base PC value for PC
3813         relative operands.
3814         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3815         jal instruction.
3816         * interp.c (simJALDELAYSLOT): Define.
3817         (JALDELAYSLOT): Define.
3818         (INDELAYSLOT, INJALDELAYSLOT): Define.
3819         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3820
3821 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3822
3823         * interp.c (sim_open): add flush_cache as a PMON routine
3824         (sim_monitor): handle flush_cache by ignoring it
3825
3826 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3827
3828         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3829         BigEndianMem.
3830         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3831         (BigEndianMem): Rename to ByteSwapMem and change sense.
3832         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3833         BigEndianMem references to !ByteSwapMem.
3834         (set_endianness): New function, with prototype.
3835         (sim_open): Call set_endianness.
3836         (sim_info): Use simBE instead of BigEndianMem.
3837         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3838         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3839         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3840         ifdefs, keeping the prototype declaration.
3841         (swap_word): Rewrite correctly.
3842         (ColdReset): Delete references to CONFIG.  Delete endianness related
3843         code; moved to set_endianness.
3844
3845 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3846
3847         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3848         * interp.c (CHECKHILO): Define away.
3849         (simSIGINT): New macro.
3850         (membank_size): Increase from 1MB to 2MB.
3851         (control_c): New function.
3852         (sim_resume): Rename parameter signal to signal_number.  Add local
3853         variable prev.  Call signal before and after simulate.
3854         (sim_stop_reason): Add simSIGINT support.
3855         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3856         functions always.
3857         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3858         if logfh is NULL.
3859         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3860         a call to sim_warning.
3861
3862 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3863
3864         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3865         16 bit instructions.
3866
3867 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3868
3869         Add support for mips16 (16 bit MIPS implementation):
3870         * gencode.c (inst_type): Add mips16 instruction encoding types.
3871         (GETDATASIZEINSN): Define.
3872         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3873         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3874         mtlo.
3875         (MIPS16_DECODE): New table, for mips16 instructions.
3876         (bitmap_val): New static function.
3877         (struct mips16_op): Define.
3878         (mips16_op_table): New table, for mips16 operands.
3879         (build_mips16_operands): New static function.
3880         (process_instructions): If PC is odd, decode a mips16
3881         instruction.  Break out instruction handling into new
3882         build_instruction function.
3883         (build_instruction): New static function, broken out of
3884         process_instructions.  Check modifiers rather than flags for SHIFT
3885         bit count and m[ft]{hi,lo} direction.
3886         (usage): Pass program name to fprintf.
3887         (main): Remove unused variable this_option_optind.  Change
3888         ``*loptarg++'' to ``loptarg++''.
3889         (my_strtoul): Parenthesize && within ||.
3890         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3891         (simulate): If PC is odd, fetch a 16 bit instruction, and
3892         increment PC by 2 rather than 4.
3893         * configure.in: Add case for mips16*-*-*.
3894         * configure: Rebuild.
3895
3896 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3897
3898         * interp.c: Allow -t to enable tracing in standalone simulator.
3899         Fix garbage output in trace file and error messages.
3900
3901 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3902
3903         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3904         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3905         * configure.in: Simplify using macros in ../common/aclocal.m4.
3906         * configure: Regenerated.
3907         * tconfig.in: New file.
3908
3909 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3910
3911         * interp.c: Fix bugs in 64-bit port.
3912         Use ansi function declarations for msvc compiler.
3913         Initialize and test file pointer in trace code.
3914         Prevent duplicate definition of LAST_EMED_REGNUM.
3915
3916 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3917
3918         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3919
3920 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3921
3922         * interp.c (SignalException): Check for explicit terminating
3923         breakpoint value.
3924         * gencode.c: Pass instruction value through SignalException()
3925         calls for Trap, Breakpoint and Syscall.
3926
3927 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3928
3929         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3930         only used on those hosts that provide it.
3931         * configure.in: Add sqrt() to list of functions to be checked for.
3932         * config.in: Re-generated.
3933         * configure: Re-generated.
3934
3935 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3936
3937         * gencode.c (process_instructions): Call build_endian_shift when
3938         expanding STORE RIGHT, to fix swr.
3939         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3940         clear the high bits.
3941         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3942         Fix float to int conversions to produce signed values.
3943
3944 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3945
3946         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3947         (process_instructions): Correct handling of nor instruction.
3948         Correct shift count for 32 bit shift instructions. Correct sign
3949         extension for arithmetic shifts to not shift the number of bits in
3950         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3951         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3952         Fix madd.
3953         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3954         It's OK to have a mult follow a mult.  What's not OK is to have a
3955         mult follow an mfhi.
3956         (Convert): Comment out incorrect rounding code.
3957
3958 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3959
3960         * interp.c (sim_monitor): Improved monitor printf
3961         simulation. Tidied up simulator warnings, and added "--log" option
3962         for directing warning message output.
3963         * gencode.c: Use sim_warning() rather than WARNING macro.
3964
3965 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3966
3967         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3968         getopt1.o, rather than on gencode.c.  Link objects together.
3969         Don't link against -liberty.
3970         (gencode.o, getopt.o, getopt1.o): New targets.
3971         * gencode.c: Include <ctype.h> and "ansidecl.h".
3972         (AND): Undefine after including "ansidecl.h".
3973         (ULONG_MAX): Define if not defined.
3974         (OP_*): Don't define macros; now defined in opcode/mips.h.
3975         (main): Call my_strtoul rather than strtoul.
3976         (my_strtoul): New static function.
3977
3978 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3979
3980         * gencode.c (process_instructions):  Generate word64 and uword64
3981         instead of `long long' and `unsigned long long' data types.
3982         * interp.c:  #include sysdep.h to get signals, and define default
3983         for SIGBUS.
3984         * (Convert):  Work around for Visual-C++ compiler bug with type
3985         conversion.
3986         * support.h:  Make things compile under Visual-C++ by using
3987         __int64 instead of `long long'.  Change many refs to long long
3988         into word64/uword64 typedefs.
3989
3990 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3991
3992         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3993         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3994         (docdir): Removed.
3995         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3996         (AC_PROG_INSTALL): Added.
3997         (AC_PROG_CC): Moved to before configure.host call.
3998         * configure: Rebuilt.
3999
4000 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
4001
4002         * configure.in: Define @SIMCONF@ depending on mips target.
4003         * configure: Rebuild.
4004         * Makefile.in (run): Add @SIMCONF@ to control simulator
4005         construction.
4006         * gencode.c: Change LOADDRMASK to 64bit memory model only.
4007         * interp.c: Remove some debugging, provide more detailed error
4008         messages, update memory accesses to use LOADDRMASK.
4009
4010 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
4011
4012         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
4013         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
4014         stamp-h.
4015         * configure: Rebuild.
4016         * config.in: New file, generated by autoheader.
4017         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
4018         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
4019         HAVE_ANINT and HAVE_AINT, as appropriate.
4020         * Makefile.in (run): Use @LIBS@ rather than -lm.
4021         (interp.o): Depend upon config.h.
4022         (Makefile): Just rebuild Makefile.
4023         (clean): Remove stamp-h.
4024         (mostlyclean): Make the same as clean, not as distclean.
4025         (config.h, stamp-h): New targets.
4026
4027 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
4028
4029         * interp.c (ColdReset): Fix boolean test. Make all simulator
4030         globals static.
4031
4032 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
4033
4034         * interp.c (xfer_direct_word, xfer_direct_long,
4035         swap_direct_word, swap_direct_long, xfer_big_word,
4036         xfer_big_long, xfer_little_word, xfer_little_long,
4037         swap_word,swap_long): Added.
4038         * interp.c (ColdReset): Provide function indirection to
4039         host<->simulated_target transfer routines.
4040         * interp.c (sim_store_register, sim_fetch_register): Updated to
4041         make use of indirected transfer routines.
4042
4043 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
4044
4045         * gencode.c (process_instructions): Ensure FP ABS instruction
4046         recognised.
4047         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
4048         system call support.
4049
4050 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
4051
4052         * interp.c (sim_do_command): Complain if callback structure not
4053         initialised.
4054
4055 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
4056
4057         * interp.c (Convert): Provide round-to-nearest and round-to-zero
4058         support for Sun hosts.
4059         * Makefile.in (gencode): Ensure the host compiler and libraries
4060         used for cross-hosted build.
4061
4062 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
4063
4064         * interp.c, gencode.c: Some more (TODO) tidying.
4065
4066 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
4067
4068         * gencode.c, interp.c: Replaced explicit long long references with
4069         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4070         * support.h (SET64LO, SET64HI): Macros added.
4071
4072 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
4073
4074         * configure: Regenerate with autoconf 2.7.
4075
4076 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
4077
4078         * interp.c (LoadMemory): Enclose text following #endif in /* */.
4079         * support.h: Remove superfluous "1" from #if.
4080         * support.h (CHECKSIM): Remove stray 'a' at end of line.
4081
4082 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
4083
4084         * interp.c (StoreFPR): Control UndefinedResult() call on
4085         WARN_RESULT manifest.
4086
4087 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
4088
4089         * gencode.c: Tidied instruction decoding, and added FP instruction
4090         support.
4091
4092         * interp.c: Added dineroIII, and BSD profiling support. Also
4093         run-time FP handling.
4094
4095 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
4096
4097         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4098         gencode.c, interp.c, support.h: created.