sim/mips/ChangeLog

   1 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * interp.c (dotrace): Make comment const.
   4         * sim-main.h (dotrace):  Likewise.  Add ATTRIBUTE_PRINTF.
   5
   6 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * interp.c (sim_monitor): Change ap type to address_word*.
   9         (_P, P): New macros.  Rewrite dynamic printf logic to use these.
  10
  11 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  12
  13         * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
  14         unsigned_1.
  15
  16 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  17
  18         * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
  19         register_value to 0.
  20
  21 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  22
  23         * configure: Regenerate.
  24
  25 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  26
  27         * interp.c (sim_open): Change %lx to %x and PRIx macros.
  28
  29 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  30
  31         * configure: Regenerate.
  32         * config.in: Removed.
  33
  34 2021-06-15  Mike Frysinger  <vapier@gentoo.org>
  35
  36         * config.in, configure: Regenerate.
  37
  38 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  39
  40         * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
  41
  42 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * aclocal.m4, config.in, configure: Regenerate.
  45
  46 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * configure.ac: Delete call to AC_CHECK_FUNCS.
  49         * config.in, configure: Regenerate.
  50
  51 2021-06-08  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
  54         with $(IGEN).
  55
  56 2021-05-29  Mike Frysinger  <vapier@gentoo.org>
  57
  58         * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
  59
  60 2021-05-22  Faraz Shahbazker  <fshahbazker@wavecomp.com>
  61
  62         * interp.c (sim_open): Add shadow mappings from 32-bit
  63         address space to 64-bit sign-extended address space.
  64
  65 2021-05-22  Faraz Shahbazker  <fshahbazker@wavecomp.com>
  66
  67         * interp.c (sim_create_inferior): Only truncate sign extension
  68         bits for 32-bit target models.
  69
  70 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
  73
  74 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * interp.c (sim_open): Switch to sim_state_alloc_extra.
  77         * micromips.igen: Change SD to mips_sim_state.
  78         * micromipsrun.c (sim_engine_run): Likewise.
  79         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
  80         (watch_options_install): Delete.
  81         (struct swatch): Delete.
  82         (struct sim_state): Delete.
  83         (struct mips_sim_state): New struct.
  84         (MIPS_SIM_STATE): Define.
  85
  86 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * interp.c: Replace config.h include with defs.h.
  89         * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
  90         dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
  91         Include defs.h.
  92
  93 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  94
  95         * config.in, configure: Regenerate.
  96
  97 2021-05-14  Mike Frysinger  <vapier@gentoo.org>
  98
  99         * interp.c: Update include path.
 100
 101 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 102
 103         * dv-tx3904sio.c: Include stdlib.h.
 104
 105 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * configure.ac (hw_extra_devices): Inline contents into
 108         SIM_AC_OPTION_HARDWARE and delete.
 109         * configure: Regenerate.
 110
 111 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 112
 113         * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
 114         (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
 115         * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
 116         * configure: Regenerate.
 117
 118 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 119
 120         * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
 121
 122 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 123
 124         * configure: Regenerate.
 125
 126 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 127
 128         * cp1.c (store_fcr): Mark static.
 129
 130 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 131
 132         * config.in, configure: Regenerate.
 133
 134 2021-04-23  Mike Frysinger  <vapier@gentoo.org>
 135
 136         * configure.ac (hw_enabled): Delete.
 137         (SIM_AC_OPTION_HARDWARE): Delete first two args.
 138         * configure: Regenerate.
 139
 140 2021-04-22  Tom Tromey  <tom@tromey.com>
 141
 142         * configure, config.in: Rebuild.
 143
 144 2021-04-22  Tom Tromey  <tom@tromey.com>
 145
 146         * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
 147         Remove.
 148         (SIM_EXTRA_DEPS): New variable.
 149
 150 2021-04-22  Tom Tromey  <tom@tromey.com>
 151
 152         * configure: Rebuild.
 153
 154 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * aclocal.m4: Regenerate.
 157
 158 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
 159
 160         * configure: Regenerate.
 161
 162 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * configure: Regenerate.
 165
 166 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
 169
 170 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
 171
 172         * Makefile.in: Set ASAN_OPTIONS when running igen.
 173
 174 2021-04-04  Steve Ellcey  <sellcey@mips.com>
 175             Faraz Shahbazker  <fshahbazker@wavecomp.com>
 176
 177         * interp.c (sim_monitor): Add switch entries for unlink (13),
 178         lseek (14), and stat (15).
 179
 180 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 181
 182         * Makefile.in (../igen/igen): Delete rule.
 183         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
 184
 185 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * aclocal.m4, configure: Regenerate.
 188
 189 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * configure: Regenerate.
 192
 193 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * Makefile.in (SIM_EXTRA_ALL): Delete.
 196         (all): New target.
 197
 198 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
 199
 200         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
 201         * aclocal.m4, configure: Regenerate.
 202
 203 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
 204
 205         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
 206         * aclocal.m4, configure: Regenerate.
 207
 208 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 209
 210         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
 211
 212 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 213
 214         * configure: Regenerate.
 215
 216 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
 219
 220 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * config.in, configure: Regenerate.
 223         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
 224         and strings.h include.
 225
 226 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 227
 228         * configure: Regenerate.
 229
 230 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 231
 232         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
 233         * configure: Regenerate.
 234
 235 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
 236
 237         * configure: Regenerate.
 238
 239 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 240
 241         * configure: Regenerate.
 242
 243 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 244
 245         *  sim-main.c: Include <stdlib.h>.
 246
 247 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 248
 249         * cp1.c: Include <stdlib.h>.
 250
 251 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
 252
 253         * configure: Re-generate.
 254
 255 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 256
 257         * configure: Regenerate.
 258
 259 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 260
 261         PR sim/20808
 262         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 263         and SD to sd.
 264
 265 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 266
 267         PR sim/20809
 268         * mips.igen (check_u64): Enable for `r3900'.
 269
 270 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 271
 272         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 273         STATE_PROG_BFD (sd).
 274         * configure: Regenerate.
 275
 276 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 277             Maciej W. Rozycki  <macro@imgtec.com>
 278
 279         PR sim/19441
 280         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 281         `micromips64' and `micromipsdsp' only.
 282         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 283         (do_micromips_jalr, do_micromips_jal): Likewise.
 284         (compute_movep_src_reg): Likewise.
 285         (compute_andi16_imm): Likewise.
 286         (convert_fmt_micromips): Likewise.
 287         (convert_fmt_micromips_cvt_d): Likewise.
 288         (convert_fmt_micromips_cvt_s): Likewise.
 289         (FMT_MICROMIPS): Likewise.
 290         (FMT_MICROMIPS_CVT_D): Likewise.
 291         (FMT_MICROMIPS_CVT_S): Likewise.
 292
 293 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 294
 295         * interp.c: Include elf-bfd.h.
 296         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 297         ELFCLASS32.
 298
 299 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 300
 301         * config.in, configure: Regenerate.
 302
 303 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 304
 305         * configure: Regenerate.
 306
 307 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 308
 309         * configure: Regenerate.
 310
 311 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 312
 313         * configure: Regenerate.
 314
 315 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 316
 317         * configure: Regenerate.
 318
 319 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 320
 321         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 322         * configure: Regenerate.
 323
 324 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 325
 326         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 327         * configure: Regenerate.
 328
 329 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 330
 331         * configure: Regenerate.
 332
 333 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 334
 335         * configure: Regenerate.
 336
 337 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 338
 339         * config.in, configure: Regenerate.
 340
 341 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 342
 343         * interp.c (sim_open): Mark argv const.
 344         (sim_create_inferior): Mark argv and env const.
 345
 346 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 347
 348         * configure: Regenerate.
 349
 350 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 351
 352         * interp.c (sim_open): Update sim_parse_args comment.
 353
 354 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 355
 356         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 357         * configure: Regenerate.
 358
 359 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 360
 361         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 362         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 363         * configure: Regenerate.
 364         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 365
 366 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 367
 368         * dv-tx3904cpu.c (CPU, SD): Delete.
 369
 370 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 371
 372         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 373         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 374         (sim_store_register): Rename to ...
 375         (mips_reg_store): ... this.  Delete local cpu var.
 376         Update sim_io_eprintf calls.
 377         (sim_fetch_register): Rename to ...
 378         (mips_reg_fetch): ... this.  Delete local cpu var.
 379         Update sim_io_eprintf calls.
 380
 381 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 382
 383         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 384
 385 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 386
 387         * config.in, configure: Regenerate.
 388
 389 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 390
 391         * interp.c (sim_write, sim_read): Delete.
 392         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 393         (load_word): Likewise.
 394         * micromips.igen (cache): Likewise.
 395         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 396         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 397         do_store_left, do_store_right, do_load_double, do_store_double):
 398         Likewise.
 399         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 400         (do_prefx): Likewise.
 401         * sim-main.c (address_translation, prefetch): Delete.
 402         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 403         paddr=vaddr.
 404         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 405         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 406         (LoadMemory, StoreMemory): Delete CCA arg.
 407
 408 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 409
 410         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 411         * configure: Regenerated.
 412
 413 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 414
 415         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 416         * tconfig.h: Delete.
 417
 418 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 419
 420         * tconfig.h (SIM_HANDLES_LMA): Delete.
 421
 422 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 423
 424         * sim-main.h (WITH_WATCHPOINTS): Delete.
 425
 426 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 427
 428         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 429
 430 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 431
 432         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 433
 434 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 435
 436         * micromips.igen (process_isa_mode): Fix left shift of negative
 437         value.
 438
 439 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 440
 441         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 442
 443 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 444
 445         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 446
 447 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 448
 449         * interp.c (sim_close): Rename to ...
 450         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 451         sim_io_shutdown.
 452         * sim-main.h (mips_sim_close): Declare.
 453         (SIM_CLOSE_HOOK): Define.
 454
 455 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 456             Ali Lown  <ali.lown@imgtec.com>
 457
 458         * Makefile.in (tmp-micromips): New rule.
 459         (tmp-mach-multi): Add support for micromips.
 460         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 461         that works for both mips64 and micromips64.
 462         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 463         micromips32.
 464         Add build support for micromips.
 465         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 466         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 467         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 468         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 469         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 470         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 471         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 472         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 473         Refactored instruction code to use these functions.
 474         * dsp2.igen: Refactored instruction code to use the new functions.
 475         * interp.c (decode_coproc): Refactored to work with any instruction
 476         encoding.
 477         (isa_mode): New variable
 478         (RSVD_INSTRUCTION): Changed to 0x00000039.
 479         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 480         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 481         * micromips.dc: New file.
 482         * micromips.igen: New file.
 483         * micromips16.dc: New file.
 484         * micromipsdsp.igen: New file.
 485         * micromipsrun.c: New file.
 486         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 487         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 488         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 489         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 490         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 491         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 492         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 493         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 494         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 495         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 496         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 497         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 498         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 499         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 500         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 501         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 502         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 503         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 504         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 505         instructions.
 506         Refactored instruction code to use these functions.
 507         (RSVD): Changed to use new reserved instruction.
 508         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 509         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 510         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 511         do_store_double):  Added micromips32 and micromips64 models.
 512         Added include for micromips.igen and micromipsdsp.igen
 513         Add micromips32 and micromips64 models.
 514         (DecodeCoproc): Updated to use new macro definition.
 515         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 516         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 517         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 518         Refactored instruction code to use these functions.
 519         * sim-main.h (CP0_operation): New enum.
 520         (DecodeCoproc): Updated macro.
 521         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 522         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 523         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 524         ISA_MODE_MICROMIPS): New defines.
 525         (sim_state): Add isa_mode field.
 526
 527 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 528
 529         * configure: Regenerate.
 530
 531 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 532
 533         * configure.ac: Change configure.in to configure.ac.
 534         * configure: Regenerate.
 535
 536 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 537
 538         * configure: Regenerate.
 539
 540 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 541
 542         * interp.c [TRACE]: Delete.
 543         (TRACE): Change to WITH_TRACE_ANY_P.
 544         [!WITH_TRACE_ANY_P] (open_trace): Define.
 545         (mips_option_handler, open_trace, sim_close, dotrace):
 546         Change defined(TRACE) to WITH_TRACE_ANY_P.
 547         (sim_open): Delete TRACE ifdef check.
 548         * sim-main.c (load_memory): Delete TRACE ifdef check.
 549         (store_memory): Likewise.
 550         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 551         [!WITH_TRACE_ANY_P] (dotrace): Define.
 552
 553 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 554
 555         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 556         comments.
 557
 558 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 559
 560         * sim-main.h (SIM_CPU): Delete.
 561
 562 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 563
 564         * sim-main.h (sim_cia): Delete.
 565
 566 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 567
 568         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 569         PU_PC_GET.
 570         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 571         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 572         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 573         CIA_SET to CPU_PC_SET.
 574         * sim-main.h (CIA_GET, CIA_SET): Delete.
 575
 576 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 577
 578         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 579         * sim-main.h (STATE_CPU): Delete.
 580
 581 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 582
 583         * configure: Regenerate.
 584
 585 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 586
 587         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 588         * interp.c (mips_pc_get, mips_pc_set): New functions.
 589         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 590         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 591         (sim_pc_get): Delete.
 592         * sim-main.h (SIM_CPU): Define.
 593         (struct sim_state): Change cpu to an array of pointers.
 594         (STATE_CPU): Drop &.
 595
 596 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 597
 598         * interp.c (mips_option_handler, open_trace, sim_close,
 599         sim_write, sim_read, sim_store_register, sim_fetch_register,
 600         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 601         prototypes.
 602         (sim_open): Convert old style prototype.  Change casts with
 603         sim_write to unsigned char *.
 604         (fetch_str): Change null to unsigned char, and change cast to
 605         unsigned char *.
 606         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 607         unsigned char *.
 608
 609 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 610
 611         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 612
 613 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 614
 615         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 616
 617 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 618
 619         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 620
 621 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 622
 623         * config.in, configure: Regenerate.
 624
 625 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 626
 627         * interp.c (sim_pc_get): New function.
 628
 629 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 630
 631         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 632         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 633
 634 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 635
 636         * configure: Regenerate.
 637
 638 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 639
 640         * configure: Regenerate.
 641
 642 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 643
 644         * configure: Regenerate.
 645         * configure.ac (mips_extra_objs): Delete.
 646         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 647         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 648
 649 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 650
 651         * configure: Regenerate.
 652         * configure.ac: Delete sim_hw checks for dv-sockser.
 653
 654 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 655
 656         * config.in, configure: Regenerate.
 657         * tconfig.in: Rename file ...
 658         * tconfig.h: ... here.
 659
 660 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 661
 662         * tconfig.in: Delete includes.
 663         [HAVE_DV_SOCKSER]: Delete.
 664
 665 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 666
 667         * Makefile.in (SIM_RUN_OBJS): Delete.
 668
 669 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 670
 671         * configure.ac (AC_CHECK_HEADERS): Delete.
 672         * aclocal.m4, configure: Regenerate.
 673
 674 2014-08-19  Alan Modra  <amodra@gmail.com>
 675
 676         * configure: Regenerate.
 677
 678 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 679
 680         * configure: Regenerate.
 681         * config.in: Regenerate.
 682
 683 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 684
 685         * configure: Regenerate.
 686
 687 2013-09-23  Alan Modra  <amodra@gmail.com>
 688
 689         * configure: Regenerate.
 690
 691 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 692
 693         * aclocal.m4, configure: Regenerate.
 694
 695 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 696
 697         * configure: Rebuild.
 698
 699 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 700
 701         * configure: Regenerate.
 702
 703 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 704
 705         * configure.ac: Address use of dv-sockser.o.
 706         * tconfig.in: Conditionalize use of dv_sockser_install.
 707         * configure: Regenerated.
 708         * config.in: Regenerated.
 709
 710 2012-10-04  Chao-ying Fu  <fu@mips.com>
 711             Steve Ellcey  <sellcey@mips.com>
 712
 713         * mips/mips3264r2.igen (rdhwr): New.
 714
 715 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 716
 717         * configure.ac: Always link against dv-sockser.o.
 718         * configure: Regenerate.
 719
 720 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 721
 722         * config.in, configure: Regenerate.
 723
 724 2012-05-18  Nick Clifton  <nickc@redhat.com>
 725
 726         PR 14072
 727         * interp.c: Include config.h before system header files.
 728
 729 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 730
 731         * aclocal.m4, config.in, configure: Regenerate.
 732
 733 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 734
 735         * aclocal.m4: New file.
 736         * configure: Regenerate.
 737
 738 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 739
 740         * configure: Regenerate after common/acinclude.m4 update.
 741
 742 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 743
 744         * configure.ac: Change include to common/acinclude.m4.
 745
 746 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 747
 748         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 749         call.  Replace common.m4 include with SIM_AC_COMMON.
 750         * configure: Regenerate.
 751
 752 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 753
 754         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 755         $(SIM_EXTRA_DEPS).
 756         (tmp-mach-multi): Exit early when igen fails.
 757
 758 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 759
 760         * interp.c (sim_do_command): Delete.
 761
 762 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 763
 764         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 765         (tx3904sio_fifo_reset): Likewise.
 766         * interp.c (sim_monitor): Likewise.
 767
 768 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 769
 770         * interp.c (sim_write): Add const to buffer arg.
 771
 772 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 773
 774         * interp.c: Don't include sysdep.h
 775
 776 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 777
 778         * configure: Regenerate.
 779
 780 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 781
 782         * config.in: Regenerate.
 783         * configure: Likewise.
 784
 785         * configure: Regenerate.
 786
 787 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 788
 789         * configure: Regenerate to track ../common/common.m4 changes.
 790         * config.in: Ditto.
 791
 792 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 793             Daniel Jacobowitz  <dan@codesourcery.com>
 794             Joseph Myers  <joseph@codesourcery.com>
 795
 796         * configure: Regenerate.
 797
 798 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 799
 800         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 801         that unconditionally allows fmt_ps.
 802         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 803         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 804         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 805         filter from 64,f to 32,f.
 806         (PREFX): Change filter from 64 to 32.
 807         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 808         that use do_load_double instead of do_load.  Make both LUXC1
 809         versions unpredictable if SizeFGR () != 64.
 810         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 811         instead of do_store.  Remove unused variable.  Make both SUXC1
 812         versions unpredictable if SizeFGR () != 64.
 813
 814 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 815
 816         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 817         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 818         shifts for that case.
 819
 820 2007-09-04  Nick Clifton  <nickc@redhat.com>
 821
 822         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 823         (display_mem_info): New static variable.
 824         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 825         (mips_options): Add info-memory and memory-info.
 826         (sim_open): After processing the command line and board
 827         specification, check display_mem_info.  If it is set then
 828         call the real handler for the --memory-info command line
 829         switch.
 830
 831 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 832
 833         * configure.ac: Change license of multi-run.c to GPL version 3.
 834         * configure: Regenerate.
 835
 836 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 837
 838         * configure.ac, configure: Revert last patch.
 839
 840 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 841
 842         * configure.ac (sim_mipsisa3264_configs): New variable.
 843         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 844         every configuration support all four targets, using the triplet to
 845         determine the default.
 846         * configure: Regenerate.
 847
 848 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 849
 850         * Makefile.in (m16run.o): New rule.
 851
 852 2007-05-15  Thiemo Seufer  <ths@mips.com>
 853
 854         * mips3264r2.igen (DSHD): Fix compile warning.
 855
 856 2007-05-14  Thiemo Seufer  <ths@mips.com>
 857
 858         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 859         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 860         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 861         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 862         for mips32r2.
 863
 864 2007-03-01  Thiemo Seufer  <ths@mips.com>
 865
 866         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 867         and mips64.
 868
 869 2007-02-20  Thiemo Seufer  <ths@mips.com>
 870
 871         * dsp.igen: Update copyright notice.
 872         * dsp2.igen: Fix copyright notice.
 873
 874 2007-02-20  Thiemo Seufer  <ths@mips.com>
 875             Chao-Ying Fu  <fu@mips.com>
 876
 877         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 878         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 879         Add dsp2 to sim_igen_machine.
 880         * configure: Regenerate.
 881         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 882         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 883         (mulq_rs.ph): Use do_ph_mulq.
 884         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 885         * mips.igen: Add dsp2 model and include dsp2.igen.
 886         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 887         for *mips32r2, *mips64r2, *dsp.
 888         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 889         for *mips32r2, *mips64r2, *dsp2.
 890         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 891
 892 2007-02-19  Thiemo Seufer  <ths@mips.com>
 893             Nigel Stephens  <nigel@mips.com>
 894
 895         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 896         jumps with hazard barrier.
 897
 898 2007-02-19  Thiemo Seufer  <ths@mips.com>
 899             Nigel Stephens  <nigel@mips.com>
 900
 901         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 902         after each call to sim_io_write.
 903
 904 2007-02-19  Thiemo Seufer  <ths@mips.com>
 905             Nigel Stephens  <nigel@mips.com>
 906
 907         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 908         supported by this simulator.
 909         (decode_coproc): Recognise additional CP0 Config registers
 910         correctly.
 911
 912 2007-02-19  Thiemo Seufer  <ths@mips.com>
 913             Nigel Stephens  <nigel@mips.com>
 914             David Ung  <davidu@mips.com>
 915
 916         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 917         uninterpreted formats. If fmt is one of the uninterpreted types
 918         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 919         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 920         (store_fpr): When writing an invalid odd register, set the
 921         matching even register to fmt_unknown, not the following register.
 922         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 923         the the memory window at offset 0 set by --memory-size command
 924         line option.
 925         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 926         point register.
 927         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 928         register.
 929         (sim_monitor): When returning the memory size to the MIPS
 930         application, use the value in STATE_MEM_SIZE, not an arbitrary
 931         hardcoded value.
 932         (cop_lw): Don' mess around with FPR_STATE, just pass
 933         fmt_uninterpreted_32 to StoreFPR.
 934         (cop_sw): Similarly.
 935         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 936         (cop_sd): Similarly.
 937         * mips.igen (not_word_value): Single version for mips32, mips64
 938         and mips16.
 939
 940 2007-02-19  Thiemo Seufer <ths@mips.com>
 941             Nigel Stephens  <nigel@mips.com>
 942
 943         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 944         MBytes.
 945
 946 2007-02-17  Thiemo Seufer  <ths@mips.com>
 947
 948         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 949         configuration.
 950         * configure: Regenerate.
 951
 952 2007-02-17  Thiemo Seufer  <ths@mips.com>
 953
 954         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 955         Add mdmx to sim_igen_machine.
 956         (mipsisa64*-*-*): Likewise. Remove dsp.
 957         (mipsisa32*-*-*): Remove dsp.
 958         * configure: Regenerate.
 959
 960 2007-02-13  Thiemo Seufer  <ths@mips.com>
 961
 962         * configure.ac: Add mips*-sde-elf* target.
 963         * configure: Regenerate.
 964
 965 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 966
 967         * acconfig.h: Remove.
 968         * config.in, configure: Regenerate.
 969
 970 2006-11-07  Thiemo Seufer  <ths@mips.com>
 971
 972         * dsp.igen (do_w_op): Fix compiler warning.
 973
 974 2006-08-29  Thiemo Seufer  <ths@mips.com>
 975             David Ung  <davidu@mips.com>
 976
 977         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 978         sim_igen_machine.
 979         * configure: Regenerate.
 980         * mips.igen (model): Add smartmips.
 981         (MADDU): Increment ACX if carry.
 982         (do_mult): Clear ACX.
 983         (ROR,RORV): Add smartmips.
 984         (include): Include smartmips.igen.
 985         * sim-main.h (ACX): Set to REGISTERS[89].
 986         * smartmips.igen: New file.
 987
 988 2006-08-29  Thiemo Seufer  <ths@mips.com>
 989             David Ung  <davidu@mips.com>
 990
 991         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 992         mips3264r2.igen. Add missing dependency rules.
 993         * m16e.igen: Support for mips16e save/restore instructions.
 994
 995 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 996
 997         * configure: Regenerated.
 998
 999 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
1000
1001         * configure: Regenerated.
1002
1003 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
1004
1005         * configure: Regenerated.
1006
1007 2006-05-15 Chao-ying Fu  <fu@mips.com>
1008
1009         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1010
1011 2006-04-18  Nick Clifton  <nickc@redhat.com>
1012
1013         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1014         statement.
1015
1016 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
1017
1018         * configure: Regenerate.
1019
1020 2005-12-14  Chao-ying Fu  <fu@mips.com>
1021
1022         * Makefile.in (SIM_OBJS): Add dsp.o.
1023         (dsp.o): New dependency.
1024         (IGEN_INCLUDE): Add dsp.igen.
1025         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1026         mipsisa64*-*-*): Add dsp to sim_igen_machine.
1027         * configure: Regenerate.
1028         * mips.igen: Add dsp model and include dsp.igen.
1029         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1030         because these instructions are extended in DSP ASE.
1031         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1032         adding 6 DSP accumulator registers and 1 DSP control register.
1033         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1034         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1035         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1036         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1037         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1038         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1039         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1040         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1041         DSPCR_CCOND_SMASK): New define.
1042         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1043         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1044
1045 2005-07-08  Ian Lance Taylor  <ian@airs.com>
1046
1047         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1048
1049 2005-06-16  David Ung  <davidu@mips.com>
1050             Nigel Stephens  <nigel@mips.com>
1051
1052         * mips.igen: New mips16e model and include m16e.igen.
1053         (check_u64): Add mips16e tag.
1054         * m16e.igen: New file for MIPS16e instructions.
1055         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1056         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1057         models.
1058         * configure: Regenerate.
1059
1060 2005-05-26  David Ung  <davidu@mips.com>
1061
1062         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
1063         tags to all instructions which are applicable to the new ISAs.
1064         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1065         vr.igen.
1066         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1067         instructions.
1068         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1069         to mips.igen.
1070         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1071         * configure: Regenerate.
1072
1073 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
1074
1075         * configure: Regenerate.
1076
1077 2005-01-14  Andrew Cagney  <cagney@gnu.org>
1078
1079         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
1080         explicit call to AC_CONFIG_HEADER.
1081         * configure: Regenerate.
1082
1083 2005-01-12  Andrew Cagney  <cagney@gnu.org>
1084
1085         * configure.ac: Update to use ../common/common.m4.
1086         * configure: Re-generate.
1087
1088 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
1089
1090         * configure: Regenerated to track ../common/aclocal.m4 changes.
1091
1092 2005-01-07  Andrew Cagney  <cagney@gnu.org>
1093
1094         * configure.ac: Rename configure.in, require autoconf 2.59.
1095         * configure: Re-generate.
1096
1097 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
1098
1099         * configure: Regenerate for ../common/aclocal.m4 update.
1100
1101 2004-09-24  Monika Chaddha  <monika@acmet.com>
1102
1103         Committed by Andrew Cagney.
1104         * m16.igen (CMP, CMPI): Fix assembler.
1105
1106 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
1107
1108         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1109         * configure: Regenerate.
1110
1111 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
1112
1113         * configure.in (sim_m16_machine): Include mipsIII.
1114         * configure: Regenerate.
1115
1116 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
1117
1118         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1119         from COP0_BADVADDR.
1120         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1121
1122 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
1123
1124         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1125
1126 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1127
1128         * mips.igen (check_fmt): Remove.
1129         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1130         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1131         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1132         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1133         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1134         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1135         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1136         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1137         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1138         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1139
1140 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1141
1142         * sb1.igen (check_sbx): New function.
1143         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1144
1145 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
1146             Richard Sandiford  <rsandifo@redhat.com>
1147
1148         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1149         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1150         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1151         separate implementations for mipsIV and mipsV.  Use new macros to
1152         determine whether the restrictions apply.
1153
1154 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
1155
1156         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1157         (check_mult_hilo): Improve comments.
1158         (check_div_hilo): Likewise.  Also, fork off a new version
1159         to handle mips32/mips64 (since there are no hazards to check
1160         in MIPS32/MIPS64).
1161
1162 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1163
1164         * mips.igen (do_dmultx): Fix check for negative operands.
1165
1166 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1167
1168         * Makefile.in (SHELL): Make sure this is defined.
1169         (various): Use $(SHELL) whenever we invoke move-if-change.
1170
1171 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1172
1173         * cp1.c: Tweak attribution slightly.
1174         * cp1.h: Likewise.
1175         * mdmx.c: Likewise.
1176         * mdmx.igen: Likewise.
1177         * mips3d.igen: Likewise.
1178         * sb1.igen: Likewise.
1179
1180 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1181
1182         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1183         unsigned operands.
1184
1185 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1186
1187         * interp.c (sim_open): Rename _bfd to bfd.
1188         (sim_create_inferior): Ditto.
1189
1190 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1191
1192         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1193
1194 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1195
1196         * mips.igen (EI, DI): Remove.
1197
1198 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1199
1200         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1201
1202 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1203             Andrew Cagney  <ac131313@redhat.com>
1204             Gavin Romig-Koch  <gavin@redhat.com>
1205             Graydon Hoare  <graydon@redhat.com>
1206             Aldy Hernandez  <aldyh@redhat.com>
1207             Dave Brolley  <brolley@redhat.com>
1208             Chris Demetriou  <cgd@broadcom.com>
1209
1210         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1211         (sim_mach_default): New variable.
1212         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1213         Add a new simulator generator, MULTI.
1214         * configure: Regenerate.
1215         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1216         (multi-run.o): New dependency.
1217         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1218         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1219         (tmp-multi): Combine them.
1220         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1221         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1222         (distclean-extra): New rule.
1223         * sim-main.h: Include bfd.h.
1224         (MIPS_MACH): New macro.
1225         * mips.igen (vr4120, vr5400, vr5500): New models.
1226         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1227         * vr.igen: Replace with new version.
1228
1229 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1230
1231         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1232         * configure: Regenerate.
1233
1234 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1235
1236         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1237         * mips.igen: Remove all invocations of check_branch_bug and
1238         mark_branch_bug.
1239
1240 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1241
1242         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1243
1244 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1245
1246         * mips.igen (do_load_double, do_store_double): New functions.
1247         (LDC1, SDC1): Rename to...
1248         (LDC1b, SDC1b): respectively.
1249         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1250
1251 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1252
1253         * cp1.c (fp_recip2): Modify initialization expression so that
1254         GCC will recognize it as constant.
1255
1256 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1257
1258         * mdmx.c (SD_): Delete.
1259         (Unpredictable): Re-define, for now, to directly invoke
1260         unpredictable_action().
1261         (mdmx_acc_op): Fix error in .ob immediate handling.
1262
1263 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1264
1265         * interp.c (sim_firmware_command): Initialize `address'.
1266
1267 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1268
1269         * configure: Regenerated to track ../common/aclocal.m4 changes.
1270
1271 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1272             Ed Satterthwaite  <ehs@broadcom.com>
1273
1274         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1275         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1276         * mips.igen: Include mips3d.igen.
1277         (mips3d): New model name for MIPS-3D ASE instructions.
1278         (CVT.W.fmt): Don't use this instruction for word (source) format
1279         instructions.
1280         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1281         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1282         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1283         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1284         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1285         (RSquareRoot1, RSquareRoot2): New macros.
1286         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1287         (fp_rsqrt2): New functions.
1288         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1289         * configure: Regenerate.
1290
1291 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1292             Ed Satterthwaite  <ehs@broadcom.com>
1293
1294         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1295         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1296         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1297         (convert): Note that this function is not used for paired-single
1298         format conversions.
1299         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1300         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1301         (check_fmt_p): Enable paired-single support.
1302         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1303         (PUU.PS): New instructions.
1304         (CVT.S.fmt): Don't use this instruction for paired-single format
1305         destinations.
1306         * sim-main.h (FP_formats): New value 'fmt_ps.'
1307         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1308         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1309
1310 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1311
1312         * mips.igen: Fix formatting of function calls in
1313         many FP operations.
1314
1315 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1316
1317         * mips.igen (MOVN, MOVZ): Trace result.
1318         (TNEI): Print "tnei" as the opcode name in traces.
1319         (CEIL.W): Add disassembly string for traces.
1320         (RSQRT.fmt): Make location of disassembly string consistent
1321         with other instructions.
1322
1323 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1324
1325         * mips.igen (X): Delete unused function.
1326
1327 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1328
1329         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1330
1331 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1332             Ed Satterthwaite  <ehs@broadcom.com>
1333
1334         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1335         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1336         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1337         (fp_nmsub): New prototypes.
1338         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1339         (NegMultiplySub): New defines.
1340         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1341         (MADD.D, MADD.S): Replace with...
1342         (MADD.fmt): New instruction.
1343         (MSUB.D, MSUB.S): Replace with...
1344         (MSUB.fmt): New instruction.
1345         (NMADD.D, NMADD.S): Replace with...
1346         (NMADD.fmt): New instruction.
1347         (NMSUB.D, MSUB.S): Replace with...
1348         (NMSUB.fmt): New instruction.
1349
1350 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1351             Ed Satterthwaite  <ehs@broadcom.com>
1352
1353         * cp1.c: Fix more comment spelling and formatting.
1354         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1355         (denorm_mode): New function.
1356         (fpu_unary, fpu_binary): Round results after operation, collect
1357         status from rounding operations, and update the FCSR.
1358         (convert): Collect status from integer conversions and rounding
1359         operations, and update the FCSR.  Adjust NaN values that result
1360         from conversions.  Convert to use sim_io_eprintf rather than
1361         fprintf, and remove some debugging code.
1362         * cp1.h (fenr_FS): New define.
1363
1364 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1365
1366         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1367         rounding mode to sim FP rounding mode flag conversion code into...
1368         (rounding_mode): New function.
1369
1370 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1371
1372         * cp1.c: Clean up formatting of a few comments.
1373         (value_fpr): Reformat switch statement.
1374
1375 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1376             Ed Satterthwaite  <ehs@broadcom.com>
1377
1378         * cp1.h: New file.
1379         * sim-main.h: Include cp1.h.
1380         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1381         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1382         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1383         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1384         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1385         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1386         * cp1.c: Don't include sim-fpu.h; already included by
1387         sim-main.h.  Clean up formatting of some comments.
1388         (NaN, Equal, Less): Remove.
1389         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1390         (fp_cmp): New functions.
1391         * mips.igen (do_c_cond_fmt): Remove.
1392         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1393         Compare.  Add result tracing.
1394         (CxC1): Remove, replace with...
1395         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1396         (DMxC1): Remove, replace with...
1397         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1398         (MxC1): Remove, replace with...
1399         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1400
1401 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1402
1403         * sim-main.h (FGRIDX): Remove, replace all uses with...
1404         (FGR_BASE): New macro.
1405         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1406         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1407         (NR_FGR, FGR): Likewise.
1408         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1409         * mips.igen: Likewise.
1410
1411 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1412
1413         * cp1.c: Add an FSF Copyright notice to this file.
1414
1415 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1416             Ed Satterthwaite  <ehs@broadcom.com>
1417
1418         * cp1.c (Infinity): Remove.
1419         * sim-main.h (Infinity): Likewise.
1420
1421         * cp1.c (fp_unary, fp_binary): New functions.
1422         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1423         (fp_sqrt): New functions, implemented in terms of the above.
1424         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1425         (Recip, SquareRoot): Remove (replaced by functions above).
1426         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1427         (fp_recip, fp_sqrt): New prototypes.
1428         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1429         (Recip, SquareRoot): Replace prototypes with #defines which
1430         invoke the functions above.
1431
1432 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1433
1434         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1435         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1436         file, remove PARAMS from prototypes.
1437         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1438         simulator state arguments.
1439         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1440         pass simulator state arguments.
1441         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1442         (store_fpr, convert): Remove 'sd' argument.
1443         (value_fpr): Likewise.  Convert to use 'SD' instead.
1444
1445 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1446
1447         * cp1.c (Min, Max): Remove #if 0'd functions.
1448         * sim-main.h (Min, Max): Remove.
1449
1450 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1451
1452         * cp1.c: fix formatting of switch case and default labels.
1453         * interp.c: Likewise.
1454         * sim-main.c: Likewise.
1455
1456 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1457
1458         * cp1.c: Clean up comments which describe FP formats.
1459          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1460
1461 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1462             Ed Satterthwaite  <ehs@broadcom.com>
1463
1464         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1465         Broadcom SiByte SB-1 processor configurations.
1466         * configure: Regenerate.
1467         * sb1.igen: New file.
1468         * mips.igen: Include sb1.igen.
1469         (sb1): New model.
1470         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1471         * mdmx.igen: Add "sb1" model to all appropriate functions and
1472         instructions.
1473         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1474         (ob_func, ob_acc): Reference the above.
1475         (qh_acc): Adjust to keep the same size as ob_acc.
1476         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1477         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1478
1479 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1480
1481         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1482
1483 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1484             Ed Satterthwaite  <ehs@broadcom.com>
1485
1486         * mips.igen (mdmx): New (pseudo-)model.
1487         * mdmx.c, mdmx.igen: New files.
1488         * Makefile.in (SIM_OBJS): Add mdmx.o.
1489         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1490         New typedefs.
1491         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1492         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1493         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1494         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1495         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1496         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1497         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1498         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1499         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1500         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1501         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1502         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1503         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1504         (qh_fmtsel): New macros.
1505         (_sim_cpu): New member "acc".
1506         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1507         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1508
1509 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1510
1511         * interp.c: Use 'deprecated' rather than 'depreciated.'
1512         * sim-main.h: Likewise.
1513
1514 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1515
1516         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1517         which wouldn't compile anyway.
1518         * sim-main.h (unpredictable_action): New function prototype.
1519         (Unpredictable): Define to call igen function unpredictable().
1520         (NotWordValue): New macro to call igen function not_word_value().
1521         (UndefinedResult): Remove.
1522         * interp.c (undefined_result): Remove.
1523         (unpredictable_action): New function.
1524         * mips.igen (not_word_value, unpredictable): New functions.
1525         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1526         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1527         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1528         NotWordValue() to check for unpredictable inputs, then
1529         Unpredictable() to handle them.
1530
1531 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1532
1533         * mips.igen: Fix formatting of calls to Unpredictable().
1534
1535 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1536
1537         * interp.c (sim_open): Revert previous change.
1538
1539 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1540
1541         * interp.c (sim_open): Disable chunk of code that wrote code in
1542         vector table entries.
1543
1544 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1545
1546         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1547         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1548         unused definitions.
1549
1550 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1551
1552         * cp1.c: Fix many formatting issues.
1553
1554 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1555
1556         * cp1.c (fpu_format_name): New function to replace...
1557         (DOFMT): This.  Delete, and update all callers.
1558         (fpu_rounding_mode_name): New function to replace...
1559         (RMMODE): This.  Delete, and update all callers.
1560
1561 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1562
1563         * interp.c: Move FPU support routines from here to...
1564         * cp1.c: Here.  New file.
1565         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1566         (cp1.o): New target.
1567
1568 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1569
1570         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1571         * mips.igen (mips32, mips64): New models, add to all instructions
1572         and functions as appropriate.
1573         (loadstore_ea, check_u64): New variant for model mips64.
1574         (check_fmt_p): New variant for models mipsV and mips64, remove
1575         mipsV model marking fro other variant.
1576         (SLL) Rename to...
1577         (SLLa) this.
1578         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1579         for mips32 and mips64.
1580         (DCLO, DCLZ): New instructions for mips64.
1581
1582 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1583
1584         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1585         immediate or code as a hex value with the "%#lx" format.
1586         (ANDI): Likewise, and fix printed instruction name.
1587
1588 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1589
1590         * sim-main.h (UndefinedResult, Unpredictable): New macros
1591         which currently do nothing.
1592
1593 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1594
1595         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1596         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1597         (status_CU3): New definitions.
1598
1599         * sim-main.h (ExceptionCause): Add new values for MIPS32
1600         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1601         for DebugBreakPoint and NMIReset to note their status in
1602         MIPS32 and MIPS64.
1603         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1604         (SignalExceptionCacheErr): New exception macros.
1605
1606 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1607
1608         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1609         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1610         is always enabled.
1611         (SignalExceptionCoProcessorUnusable): Take as argument the
1612         unusable coprocessor number.
1613
1614 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1615
1616         * mips.igen: Fix formatting of all SignalException calls.
1617
1618 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1619
1620         * sim-main.h (SIGNEXTEND): Remove.
1621
1622 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1623
1624         * mips.igen: Remove gencode comment from top of file, fix
1625         spelling in another comment.
1626
1627 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1628
1629         * mips.igen (check_fmt, check_fmt_p): New functions to check
1630         whether specific floating point formats are usable.
1631         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1632         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1633         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1634         Use the new functions.
1635         (do_c_cond_fmt): Remove format checks...
1636         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1637
1638 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1639
1640         * mips.igen: Fix formatting of check_fpu calls.
1641
1642 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1643
1644         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1645
1646 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1647
1648         * mips.igen: Remove whitespace at end of lines.
1649
1650 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1651
1652         * mips.igen (loadstore_ea): New function to do effective
1653         address calculations.
1654         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1655         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1656         CACHE): Use loadstore_ea to do effective address computations.
1657
1658 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1659
1660         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1661         * mips.igen (LL, CxC1, MxC1): Likewise.
1662
1663 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1664
1665         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1666         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1667         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1668         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1669         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1670         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1671         Don't split opcode fields by hand, use the opcode field values
1672         provided by igen.
1673
1674 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1675
1676         * mips.igen (do_divu): Fix spacing.
1677
1678         * mips.igen (do_dsllv): Move to be right before DSLLV,
1679         to match the rest of the do_<shift> functions.
1680
1681 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1682
1683         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1684         DSRL32, do_dsrlv): Trace inputs and results.
1685
1686 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1687
1688         * mips.igen (CACHE): Provide instruction-printing string.
1689
1690         * interp.c (signal_exception): Comment tokens after #endif.
1691
1692 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1693
1694         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1695         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1696         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1697         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1698         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1699         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1700         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1701         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1702
1703 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1704
1705         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1706         instruction-printing string.
1707         (LWU): Use '64' as the filter flag.
1708
1709 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1710
1711         * mips.igen (SDXC1): Fix instruction-printing string.
1712
1713 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1714
1715         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1716         filter flags "32,f".
1717
1718 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1719
1720         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1721         as the filter flag.
1722
1723 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1724
1725         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1726         add a comma) so that it more closely match the MIPS ISA
1727         documentation opcode partitioning.
1728         (PREF): Put useful names on opcode fields, and include
1729         instruction-printing string.
1730
1731 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1732
1733         * mips.igen (check_u64): New function which in the future will
1734         check whether 64-bit instructions are usable and signal an
1735         exception if not.  Currently a no-op.
1736         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1737         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1738         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1739         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1740
1741         * mips.igen (check_fpu): New function which in the future will
1742         check whether FPU instructions are usable and signal an exception
1743         if not.  Currently a no-op.
1744         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1745         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1746         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1747         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1748         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1749         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1750         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1751         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1752
1753 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1754
1755         * mips.igen (do_load_left, do_load_right): Move to be immediately
1756         following do_load.
1757         (do_store_left, do_store_right): Move to be immediately following
1758         do_store.
1759
1760 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1761
1762         * mips.igen (mipsV): New model name.  Also, add it to
1763         all instructions and functions where it is appropriate.
1764
1765 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1766
1767         * mips.igen: For all functions and instructions, list model
1768         names that support that instruction one per line.
1769
1770 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1771
1772         * mips.igen: Add some additional comments about supported
1773         models, and about which instructions go where.
1774         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1775         order as is used in the rest of the file.
1776
1777 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1778
1779         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1780         indicating that ALU32_END or ALU64_END are there to check
1781         for overflow.
1782         (DADD): Likewise, but also remove previous comment about
1783         overflow checking.
1784
1785 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1786
1787         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1788         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1789         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1790         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1791         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1792         fields (i.e., add and move commas) so that they more closely
1793         match the MIPS ISA documentation opcode partitioning.
1794
1795 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1796
1797         * mips.igen (ADDI): Print immediate value.
1798         (BREAK): Print code.
1799         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1800         (SLL): Print "nop" specially, and don't run the code
1801         that does the shift for the "nop" case.
1802
1803 2001-11-17  Fred Fish  <fnf@redhat.com>
1804
1805         * sim-main.h (float_operation): Move enum declaration outside
1806         of _sim_cpu struct declaration.
1807
1808 2001-04-12  Jim Blandy  <jimb@redhat.com>
1809
1810         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1811         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1812         set of the FCSR.
1813         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1814         PENDING_FILL, and you can get the intended effect gracefully by
1815         calling PENDING_SCHED directly.
1816
1817 2001-02-23  Ben Elliston  <bje@redhat.com>
1818
1819         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1820         already defined elsewhere.
1821
1822 2001-02-19  Ben Elliston  <bje@redhat.com>
1823
1824         * sim-main.h (sim_monitor): Return an int.
1825         * interp.c (sim_monitor): Add return values.
1826         (signal_exception): Handle error conditions from sim_monitor.
1827
1828 2001-02-08  Ben Elliston  <bje@redhat.com>
1829
1830         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1831         (store_memory): Likewise, pass cia to sim_core_write*.
1832
1833 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1834
1835         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1836         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1837
1838 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1839
1840         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1841         * Makefile.in: Don't delete *.igen when cleaning directory.
1842
1843 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1844
1845         * m16.igen (break): Call SignalException not sim_engine_halt.
1846
1847 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1848
1849         From Jason Eckhardt:
1850         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1851
1852 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1853
1854         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1855
1856 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1857
1858         * mips.igen (do_dmultx): Fix typo.
1859
1860 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1861
1862         * configure: Regenerated to track ../common/aclocal.m4 changes.
1863
1864 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1865
1866         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1867
1868 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1869
1870         * sim-main.h (GPR_CLEAR): Define macro.
1871
1872 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1873
1874         * interp.c (decode_coproc): Output long using %lx and not %s.
1875
1876 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1877
1878         * interp.c (sim_open): Sort & extend dummy memory regions for
1879         --board=jmr3904 for eCos.
1880
1881 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1882
1883         * configure: Regenerated.
1884
1885 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1886
1887         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1888         calls, conditional on the simulator being in verbose mode.
1889
1890 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1891
1892         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1893         cache don't get ReservedInstruction traps.
1894
1895 1999-11-29  Mark Salter  <msalter@cygnus.com>
1896
1897         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1898         to clear status bits in sdisr register. This is how the hardware works.
1899
1900         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1901         being used by cygmon.
1902
1903 1999-11-11  Andrew Haley  <aph@cygnus.com>
1904
1905         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1906         instructions.
1907
1908 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1909
1910         * mips.igen (MULT): Correct previous mis-applied patch.
1911
1912 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1913
1914         * mips.igen (delayslot32): Handle sequence like
1915         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1916         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1917         (MULT): Actually pass the third register...
1918
1919 1999-09-03  Mark Salter  <msalter@cygnus.com>
1920
1921         * interp.c (sim_open): Added more memory aliases for additional
1922         hardware being touched by cygmon on jmr3904 board.
1923
1924 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1925
1926         * configure: Regenerated to track ../common/aclocal.m4 changes.
1927
1928 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1929
1930         * interp.c (sim_store_register): Handle case where client - GDB -
1931         specifies that a 4 byte register is 8 bytes in size.
1932         (sim_fetch_register): Ditto.
1933
1934 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1935
1936         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1937         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1938         (idt_monitor_base): Base address for IDT monitor traps.
1939         (pmon_monitor_base): Ditto for PMON.
1940         (lsipmon_monitor_base): Ditto for LSI PMON.
1941         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1942         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1943         (sim_firmware_command): New function.
1944         (mips_option_handler): Call it for OPTION_FIRMWARE.
1945         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1946         option was given, add no monitor by default.  Add BREAK hooks only if
1947         monitors are also there.
1948
1949 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1950
1951         * interp.c (sim_monitor): Flush output before reading input.
1952
1953 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1954
1955         * tconfig.in (SIM_HANDLES_LMA): Always define.
1956
1957 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1958
1959         From Mark Salter <msalter@cygnus.com>:
1960         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1961         (sim_open): Add setup for BSP board.
1962
1963 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1964
1965         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1966         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1967         them as unimplemented.
1968
1969 1999-05-08  Felix Lee  <flee@cygnus.com>
1970
1971         * configure: Regenerated to track ../common/aclocal.m4 changes.
1972
1973 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1974
1975         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1976
1977 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1978
1979         * configure.in: Any mips64vr5*-*-* target should have
1980         -DTARGET_ENABLE_FR=1.
1981         (default_endian): Any mips64vr*el-*-* target should default to
1982         LITTLE_ENDIAN.
1983         * configure: Re-generate.
1984
1985 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1986
1987         * mips.igen (ldl): Extend from _16_, not 32.
1988
1989 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1990
1991         * interp.c (sim_store_register): Force registers written to by GDB
1992         into an un-interpreted state.
1993
1994 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1995
1996         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1997         CPU, start periodic background I/O polls.
1998         (tx3904sio_poll): New function: periodic I/O poller.
1999
2000 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
2001
2002         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2003
2004 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
2005
2006         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2007         case statement.
2008
2009 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
2010
2011         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2012         (load_word): Call SIM_CORE_SIGNAL hook on error.
2013         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2014         starting.  For exception dispatching, pass PC instead of NULL_CIA.
2015         (decode_coproc): Use COP0_BADVADDR to store faulting address.
2016         * sim-main.h (COP0_BADVADDR): Define.
2017         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2018         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2019         (_sim_cpu): Add exc_* fields to store register value snapshots.
2020         * mips.igen (*): Replace memory-related SignalException* calls
2021         with references to SIM_CORE_SIGNAL hook.
2022
2023         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2024         fix.
2025         * sim-main.c (*): Minor warning cleanups.
2026
2027 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
2028
2029         * m16.igen (DADDIU5): Correct type-o.
2030
2031 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
2032
2033         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2034         variables.
2035
2036 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
2037
2038         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2039         to include path.
2040         (interp.o): Add dependency on itable.h
2041         (oengine.c, gencode): Delete remaining references.
2042         (BUILT_SRC_FROM_GEN): Clean up.
2043
2044 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
2045
2046         * vr4run.c: New.
2047         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2048         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2049         tmp-run-hack) : New.
2050         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2051         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2052         Drop the "64" qualifier to get the HACK generator working.
2053         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
2054         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2055         qualifier to get the hack generator working.
2056         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2057         (DSLL): Use do_dsll.
2058         (DSLLV): Use do_dsllv.
2059         (DSRA): Use do_dsra.
2060         (DSRL): Use do_dsrl.
2061         (DSRLV): Use do_dsrlv.
2062         (BC1): Move *vr4100 to get the HACK generator working.
2063         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2064         get the HACK generator working.
2065         (MACC) Rename to get the HACK generator working.
2066         (DMACC,MACCS,DMACCS): Add the 64.
2067
2068 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
2069
2070         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2071         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2072
2073 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
2074
2075     * mips/interp.c (DEBUG): Cleanups.
2076
2077 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
2078
2079         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2080         (tx3904sio_tickle): fflush after a stdout character output.
2081
2082 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
2083
2084         * interp.c (sim_close): Uninstall modules.
2085
2086 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2087
2088         * sim-main.h, interp.c (sim_monitor): Change to global
2089         function.
2090
2091 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2092
2093         * configure.in (vr4100): Only include vr4100 instructions in
2094         simulator.
2095         * configure: Re-generate.
2096         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2097
2098 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2099
2100         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2101         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2102         true alternative.
2103
2104         * configure.in (sim_default_gen, sim_use_gen): Replace with
2105         sim_gen.
2106         (--enable-sim-igen): Delete config option. Always using IGEN.
2107         * configure: Re-generate.
2108
2109         * Makefile.in (gencode): Kill, kill, kill.
2110         * gencode.c: Ditto.
2111
2112 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2113
2114         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2115         bit mips16 igen simulator.
2116         * configure: Re-generate.
2117
2118         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2119         as part of vr4100 ISA.
2120         * vr.igen: Mark all instructions as 64 bit only.
2121
2122 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2123
2124         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2125         Pacify GCC.
2126
2127 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2128
2129         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2130         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
2131         * configure: Re-generate.
2132
2133         * m16.igen (BREAK): Define breakpoint instruction.
2134         (JALX32): Mark instruction as mips16 and not r3900.
2135         * mips.igen (C.cond.fmt): Fix typo in instruction format.
2136
2137         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2138
2139 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2140
2141         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2142         insn as a debug breakpoint.
2143
2144         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2145         pending.slot_size.
2146         (PENDING_SCHED): Clean up trace statement.
2147         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2148         (PENDING_FILL): Delay write by only one cycle.
2149         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2150
2151         * sim-main.c (pending_tick): Clean up trace statements. Add trace
2152         of pending writes.
2153         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2154         32 & 64.
2155         (pending_tick): Move incrementing of index to FOR statement.
2156         (pending_tick): Only update PENDING_OUT after a write has occured.
2157
2158         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
2159         build simulator.
2160         * configure: Re-generate.
2161
2162         * interp.c (sim_engine_run OLD): Delete explicit call to
2163         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2164
2165 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2166
2167         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2168         interrupt level number to match changed SignalExceptionInterrupt
2169         macro.
2170
2171 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2172
2173         * interp.c: #include "itable.h" if WITH_IGEN.
2174         (get_insn_name): New function.
2175         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2176         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2177
2178 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2179
2180         * configure: Rebuilt to inhale new common/aclocal.m4.
2181
2182 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2183
2184         * dv-tx3904sio.c: Include sim-assert.h.
2185
2186 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2187
2188         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2189         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2190         Reorganize target-specific sim-hardware checks.
2191         * configure: rebuilt.
2192         * interp.c (sim_open): For tx39 target boards, set
2193         OPERATING_ENVIRONMENT, add tx3904sio devices.
2194         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2195         ROM executables.  Install dv-sockser into sim-modules list.
2196
2197         * dv-tx3904irc.c: Compiler warning clean-up.
2198         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2199         frequent hw-trace messages.
2200
2201 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2202
2203         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2204
2205 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2206
2207         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2208
2209         * vr.igen: New file.
2210         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2211         * mips.igen: Define vr4100 model. Include vr.igen.
2212 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2213
2214         * mips.igen (check_mf_hilo): Correct check.
2215
2216 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2217
2218         * sim-main.h (interrupt_event): Add prototype.
2219
2220         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2221         register_ptr, register_value.
2222         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2223
2224         * sim-main.h (tracefh): Make extern.
2225
2226 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2227
2228         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2229         Reduce unnecessarily high timer event frequency.
2230         * dv-tx3904cpu.c: Ditto for interrupt event.
2231
2232 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2233
2234         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2235         to allay warnings.
2236         (interrupt_event): Made non-static.
2237
2238         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2239         interchange of configuration values for external vs. internal
2240         clock dividers.
2241
2242 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2243
2244         * mips.igen (BREAK): Moved code to here for
2245         simulator-reserved break instructions.
2246         * gencode.c (build_instruction): Ditto.
2247         * interp.c (signal_exception): Code moved from here.  Non-
2248         reserved instructions now use exception vector, rather
2249         than halting sim.
2250         * sim-main.h: Moved magic constants to here.
2251
2252 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2253
2254         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2255         register upon non-zero interrupt event level, clear upon zero
2256         event value.
2257         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2258         by passing zero event value.
2259         (*_io_{read,write}_buffer): Endianness fixes.
2260         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2261         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2262
2263         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2264         serial I/O and timer module at base address 0xFFFF0000.
2265
2266 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2267
2268         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2269         and BigEndianCPU.
2270
2271 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2272
2273         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2274         parts.
2275         * configure: Update.
2276
2277 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2278
2279         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2280         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2281         * configure.in: Include tx3904tmr in hw_device list.
2282         * configure: Rebuilt.
2283         * interp.c (sim_open): Instantiate three timer instances.
2284         Fix address typo of tx3904irc instance.
2285
2286 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2287
2288         * interp.c (signal_exception): SystemCall exception now uses
2289         the exception vector.
2290
2291 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2292
2293         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2294         to allay warnings.
2295
2296 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2297
2298         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2299
2300 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2301
2302         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2303
2304         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2305         sim-main.h. Declare a struct hw_descriptor instead of struct
2306         hw_device_descriptor.
2307
2308 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2309
2310         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2311         right bits and then re-align left hand bytes to correct byte
2312         lanes.  Fix incorrect computation in do_store_left when loading
2313         bytes from second word.
2314
2315 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2316
2317         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2318         * interp.c (sim_open): Only create a device tree when HW is
2319         enabled.
2320
2321         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2322         * interp.c (signal_exception): Ditto.
2323
2324 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2325
2326         * gencode.c: Mark BEGEZALL as LIKELY.
2327
2328 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2329
2330         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2331         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2332
2333 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2334
2335         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2336         modules.  Recognize TX39 target with "mips*tx39" pattern.
2337         * configure: Rebuilt.
2338         * sim-main.h (*): Added many macros defining bits in
2339         TX39 control registers.
2340         (SignalInterrupt): Send actual PC instead of NULL.
2341         (SignalNMIReset): New exception type.
2342         * interp.c (board): New variable for future use to identify
2343         a particular board being simulated.
2344         (mips_option_handler,mips_options): Added "--board" option.
2345         (interrupt_event): Send actual PC.
2346         (sim_open): Make memory layout conditional on board setting.
2347         (signal_exception): Initial implementation of hardware interrupt
2348         handling.  Accept another break instruction variant for simulator
2349         exit.
2350         (decode_coproc): Implement RFE instruction for TX39.
2351         (mips.igen): Decode RFE instruction as such.
2352         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2353         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2354         bbegin to implement memory map.
2355         * dv-tx3904cpu.c: New file.
2356         * dv-tx3904irc.c: New file.
2357
2358 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2359
2360         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2361
2362 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2363
2364         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2365         with calls to check_div_hilo.
2366
2367 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2368
2369         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2370         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2371         Add special r3900 version of do_mult_hilo.
2372         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2373         with calls to check_mult_hilo.
2374         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2375         with calls to check_div_hilo.
2376
2377 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2378
2379         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2380         Document a replacement.
2381
2382 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2383
2384         * interp.c (sim_monitor): Make mon_printf work.
2385
2386 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2387
2388         * sim-main.h (INSN_NAME): New arg `cpu'.
2389
2390 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2391
2392         * configure: Regenerated to track ../common/aclocal.m4 changes.
2393
2394 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2395
2396         * configure: Regenerated to track ../common/aclocal.m4 changes.
2397         * config.in: Ditto.
2398
2399 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2400
2401         * acconfig.h: New file.
2402         * configure.in: Reverted change of Apr 24; use sinclude again.
2403
2404 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2405
2406         * configure: Regenerated to track ../common/aclocal.m4 changes.
2407         * config.in: Ditto.
2408
2409 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2410
2411         * configure.in: Don't call sinclude.
2412
2413 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2414
2415         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2416
2417 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2418
2419         * mips.igen (ERET): Implement.
2420
2421         * interp.c (decode_coproc): Return sign-extended EPC.
2422
2423         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2424
2425         * interp.c (signal_exception): Do not ignore Trap.
2426         (signal_exception): On TRAP, restart at exception address.
2427         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2428         (signal_exception): Update.
2429         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2430         so that TRAP instructions are caught.
2431
2432 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2433
2434         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2435         contains HI/LO access history.
2436         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2437         (HIACCESS, LOACCESS): Delete, replace with
2438         (HIHISTORY, LOHISTORY): New macros.
2439         (CHECKHILO): Delete all, moved to mips.igen
2440
2441         * gencode.c (build_instruction): Do not generate checks for
2442         correct HI/LO register usage.
2443
2444         * interp.c (old_engine_run): Delete checks for correct HI/LO
2445         register usage.
2446
2447         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2448         check_mf_cycles): New functions.
2449         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2450         do_divu, domultx, do_mult, do_multu): Use.
2451
2452         * tx.igen ("madd", "maddu"): Use.
2453
2454 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2455
2456         * mips.igen (DSRAV): Use function do_dsrav.
2457         (SRAV): Use new function do_srav.
2458
2459         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2460         (B): Sign extend 11 bit immediate.
2461         (EXT-B*): Shift 16 bit immediate left by 1.
2462         (ADDIU*): Don't sign extend immediate value.
2463
2464 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2465
2466         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2467
2468         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2469         functions.
2470
2471         * mips.igen (delayslot32, nullify_next_insn): New functions.
2472         (m16.igen): Always include.
2473         (do_*): Add more tracing.
2474
2475         * m16.igen (delayslot16): Add NIA argument, could be called by a
2476         32 bit MIPS16 instruction.
2477
2478         * interp.c (ifetch16): Move function from here.
2479         * sim-main.c (ifetch16): To here.
2480
2481         * sim-main.c (ifetch16, ifetch32): Update to match current
2482         implementations of LH, LW.
2483         (signal_exception): Don't print out incorrect hex value of illegal
2484         instruction.
2485
2486 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2489         instruction.
2490
2491         * m16.igen: Implement MIPS16 instructions.
2492
2493         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2494         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2495         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2496         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2497         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2498         bodies of corresponding code from 32 bit insn to these.  Also used
2499         by MIPS16 versions of functions.
2500
2501         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2502         (IMEM16): Drop NR argument from macro.
2503
2504 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2505
2506         * Makefile.in (SIM_OBJS): Add sim-main.o.
2507
2508         * sim-main.h (address_translation, load_memory, store_memory,
2509         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2510         as INLINE_SIM_MAIN.
2511         (pr_addr, pr_uword64): Declare.
2512         (sim-main.c): Include when H_REVEALS_MODULE_P.
2513
2514         * interp.c (address_translation, load_memory, store_memory,
2515         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2516         from here.
2517         * sim-main.c: To here. Fix compilation problems.
2518
2519         * configure.in: Enable inlining.
2520         * configure: Re-config.
2521
2522 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * configure: Regenerated to track ../common/aclocal.m4 changes.
2525
2526 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2527
2528         * mips.igen: Include tx.igen.
2529         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2530         * tx.igen: New file, contains MADD and MADDU.
2531
2532         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2533         the hardwired constant `7'.
2534         (store_memory): Ditto.
2535         (LOADDRMASK): Move definition to sim-main.h.
2536
2537         mips.igen (MTC0): Enable for r3900.
2538         (ADDU): Add trace.
2539
2540         mips.igen (do_load_byte): Delete.
2541         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2542         do_store_right): New functions.
2543         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2544
2545         configure.in: Let the tx39 use igen again.
2546         configure: Update.
2547
2548 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2549
2550         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2551         not an address sized quantity.  Return zero for cache sizes.
2552
2553 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2554
2555         * mips.igen (r3900): r3900 does not support 64 bit integer
2556         operations.
2557
2558 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2559
2560         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2561         than igen one.
2562         * configure : Rebuild.
2563
2564 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2565
2566         * configure: Regenerated to track ../common/aclocal.m4 changes.
2567
2568 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2569
2570         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2571
2572 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2573
2574         * configure: Regenerated to track ../common/aclocal.m4 changes.
2575         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2576
2577 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2578
2579         * configure: Regenerated to track ../common/aclocal.m4 changes.
2580
2581 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * interp.c (Max, Min): Comment out functions. Not yet used.
2584
2585 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2586
2587         * configure: Regenerated to track ../common/aclocal.m4 changes.
2588
2589 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2590
2591         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2592         configurable settings for stand-alone simulator.
2593
2594         * configure.in: Added X11 search, just in case.
2595
2596         * configure: Regenerated.
2597
2598 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2599
2600         * interp.c (sim_write, sim_read, load_memory, store_memory):
2601         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2602
2603 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2604
2605         * sim-main.h (GETFCC): Return an unsigned value.
2606
2607 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2608
2609         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2610         (DADD): Result destination is RD not RT.
2611
2612 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2613
2614         * sim-main.h (HIACCESS, LOACCESS): Always define.
2615
2616         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2617
2618         * interp.c (sim_info): Delete.
2619
2620 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2621
2622         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2623         (mips_option_handler): New argument `cpu'.
2624         (sim_open): Update call to sim_add_option_table.
2625
2626 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2627
2628         * mips.igen (CxC1): Add tracing.
2629
2630 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2631
2632         * sim-main.h (Max, Min): Declare.
2633
2634         * interp.c (Max, Min): New functions.
2635
2636         * mips.igen (BC1): Add tracing.
2637
2638 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2639
2640         * interp.c Added memory map for stack in vr4100
2641
2642 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2643
2644         * interp.c (load_memory): Add missing "break"'s.
2645
2646 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2647
2648         * interp.c (sim_store_register, sim_fetch_register): Pass in
2649         length parameter.  Return -1.
2650
2651 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2652
2653         * interp.c: Added hardware init hook, fixed warnings.
2654
2655 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2656
2657         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2658
2659 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2660
2661         * interp.c (ifetch16): New function.
2662
2663         * sim-main.h (IMEM32): Rename IMEM.
2664         (IMEM16_IMMED): Define.
2665         (IMEM16): Define.
2666         (DELAY_SLOT): Update.
2667
2668         * m16run.c (sim_engine_run): New file.
2669
2670         * m16.igen: All instructions except LB.
2671         (LB): Call do_load_byte.
2672         * mips.igen (do_load_byte): New function.
2673         (LB): Call do_load_byte.
2674
2675         * mips.igen: Move spec for insn bit size and high bit from here.
2676         * Makefile.in (tmp-igen, tmp-m16): To here.
2677
2678         * m16.dc: New file, decode mips16 instructions.
2679
2680         * Makefile.in (SIM_NO_ALL): Define.
2681         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2682
2683 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2684
2685         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2686         point unit to 32 bit registers.
2687         * configure: Re-generate.
2688
2689 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * configure.in (sim_use_gen): Make IGEN the default simulator
2692         generator for generic 32 and 64 bit mips targets.
2693         * configure: Re-generate.
2694
2695 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2696
2697         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2698         bitsize.
2699
2700         * interp.c (sim_fetch_register, sim_store_register): Read/write
2701         FGR from correct location.
2702         (sim_open): Set size of FGR's according to
2703         WITH_TARGET_FLOATING_POINT_BITSIZE.
2704
2705         * sim-main.h (FGR): Store floating point registers in a separate
2706         array.
2707
2708 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2709
2710         * configure: Regenerated to track ../common/aclocal.m4 changes.
2711
2712 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2713
2714         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2715
2716         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2717
2718         * interp.c (pending_tick): New function.  Deliver pending writes.
2719
2720         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2721         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2722         it can handle mixed sized quantites and single bits.
2723
2724 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2725
2726         * interp.c (oengine.h): Do not include when building with IGEN.
2727         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2728         (sim_info): Ditto for PROCESSOR_64BIT.
2729         (sim_monitor): Replace ut_reg with unsigned_word.
2730         (*): Ditto for t_reg.
2731         (LOADDRMASK): Define.
2732         (sim_open): Remove defunct check that host FP is IEEE compliant,
2733         using software to emulate floating point.
2734         (value_fpr, ...): Always compile, was conditional on HASFPU.
2735
2736 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2737
2738         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2739         size.
2740
2741         * interp.c (SD, CPU): Define.
2742         (mips_option_handler): Set flags in each CPU.
2743         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2744         (sim_close): Do not clear STATE, deleted anyway.
2745         (sim_write, sim_read): Assume CPU zero's vm should be used for
2746         data transfers.
2747         (sim_create_inferior): Set the PC for all processors.
2748         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2749         argument.
2750         (mips16_entry): Pass correct nr of args to store_word, load_word.
2751         (ColdReset): Cold reset all cpu's.
2752         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2753         (sim_monitor, load_memory, store_memory, signal_exception): Use
2754         `CPU' instead of STATE_CPU.
2755
2756
2757         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2758         SD or CPU_.
2759
2760         * sim-main.h (signal_exception): Add sim_cpu arg.
2761         (SignalException*): Pass both SD and CPU to signal_exception.
2762         * interp.c (signal_exception): Update.
2763
2764         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2765         Ditto
2766         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2767         address_translation): Ditto
2768         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2769
2770 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2771
2772         * configure: Regenerated to track ../common/aclocal.m4 changes.
2773
2774 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2775
2776         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2777
2778         * mips.igen (model): Map processor names onto BFD name.
2779
2780         * sim-main.h (CPU_CIA): Delete.
2781         (SET_CIA, GET_CIA): Define
2782
2783 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2784
2785         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2786         regiser.
2787
2788         * configure.in (default_endian): Configure a big-endian simulator
2789         by default.
2790         * configure: Re-generate.
2791
2792 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2793
2794         * configure: Regenerated to track ../common/aclocal.m4 changes.
2795
2796 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2797
2798         * interp.c (sim_monitor): Handle Densan monitor outbyte
2799         and inbyte functions.
2800
2801 1997-12-29  Felix Lee  <flee@cygnus.com>
2802
2803         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2804
2805 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2806
2807         * Makefile.in (tmp-igen): Arrange for $zero to always be
2808         reset to zero after every instruction.
2809
2810 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2811
2812         * configure: Regenerated to track ../common/aclocal.m4 changes.
2813         * config.in: Ditto.
2814
2815 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2816
2817         * mips.igen (MSUB): Fix to work like MADD.
2818         * gencode.c (MSUB): Similarly.
2819
2820 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2821
2822         * configure: Regenerated to track ../common/aclocal.m4 changes.
2823
2824 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2825
2826         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2827
2828 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2829
2830         * sim-main.h (sim-fpu.h): Include.
2831
2832         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2833         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2834         using host independant sim_fpu module.
2835
2836 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2837
2838         * interp.c (signal_exception): Report internal errors with SIGABRT
2839         not SIGQUIT.
2840
2841         * sim-main.h (C0_CONFIG): New register.
2842         (signal.h): No longer include.
2843
2844         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2845
2846 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2847
2848         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2849
2850 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2851
2852         * mips.igen: Tag vr5000 instructions.
2853         (ANDI): Was missing mipsIV model, fix assembler syntax.
2854         (do_c_cond_fmt): New function.
2855         (C.cond.fmt): Handle mips I-III which do not support CC field
2856         separatly.
2857         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2858         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2859         in IV3.2 spec.
2860         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2861         vr5000 which saves LO in a GPR separatly.
2862
2863         * configure.in (enable-sim-igen): For vr5000, select vr5000
2864         specific instructions.
2865         * configure: Re-generate.
2866
2867 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2868
2869         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2870
2871         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2872         fmt_uninterpreted_64 bit cases to switch.  Convert to
2873         fmt_formatted,
2874
2875         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2876
2877         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2878         as specified in IV3.2 spec.
2879         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2880
2881 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2882
2883         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2884         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2885         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2886         PENDING_FILL versions of instructions.  Simplify.
2887         (X): New function.
2888         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2889         instructions.
2890         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2891         a signed value.
2892         (MTHI, MFHI): Disable code checking HI-LO.
2893
2894         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2895         global.
2896         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2897
2898 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2899
2900         * gencode.c (build_mips16_operands): Replace IPC with cia.
2901
2902         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2903         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2904         IPC to `cia'.
2905         (UndefinedResult): Replace function with macro/function
2906         combination.
2907         (sim_engine_run): Don't save PC in IPC.
2908
2909         * sim-main.h (IPC): Delete.
2910
2911
2912         * interp.c (signal_exception, store_word, load_word,
2913         address_translation, load_memory, store_memory, cache_op,
2914         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2915         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2916         current instruction address - cia - argument.
2917         (sim_read, sim_write): Call address_translation directly.
2918         (sim_engine_run): Rename variable vaddr to cia.
2919         (signal_exception): Pass cia to sim_monitor
2920
2921         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2922         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2923         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2924
2925         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2926         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2927         SIM_ASSERT.
2928
2929         * interp.c (signal_exception): Pass restart address to
2930         sim_engine_restart.
2931
2932         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2933         idecode.o): Add dependency.
2934
2935         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2936         Delete definitions
2937         (DELAY_SLOT): Update NIA not PC with branch address.
2938         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2939
2940         * mips.igen: Use CIA not PC in branch calculations.
2941         (illegal): Call SignalException.
2942         (BEQ, ADDIU): Fix assembler.
2943
2944 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2945
2946         * m16.igen (JALX): Was missing.
2947
2948         * configure.in (enable-sim-igen): New configuration option.
2949         * configure: Re-generate.
2950
2951         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2952
2953         * interp.c (load_memory, store_memory): Delete parameter RAW.
2954         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2955         bypassing {load,store}_memory.
2956
2957         * sim-main.h (ByteSwapMem): Delete definition.
2958
2959         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2960
2961         * interp.c (sim_do_command, sim_commands): Delete mips specific
2962         commands.  Handled by module sim-options.
2963
2964         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2965         (WITH_MODULO_MEMORY): Define.
2966
2967         * interp.c (sim_info): Delete code printing memory size.
2968
2969         * interp.c (mips_size): Nee sim_size, delete function.
2970         (power2): Delete.
2971         (monitor, monitor_base, monitor_size): Delete global variables.
2972         (sim_open, sim_close): Delete code creating monitor and other
2973         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2974         manage memory regions.
2975         (load_memory, store_memory): Use sim-core for memory model.
2976
2977         * interp.c (address_translation): Delete all memory map code
2978         except line forcing 32 bit addresses.
2979
2980 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2981
2982         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2983         trace options.
2984
2985         * interp.c (logfh, logfile): Delete globals.
2986         (sim_open, sim_close): Delete code opening & closing log file.
2987         (mips_option_handler): Delete -l and -n options.
2988         (OPTION mips_options): Ditto.
2989
2990         * interp.c (OPTION mips_options): Rename option trace to dinero.
2991         (mips_option_handler): Update.
2992
2993 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2994
2995         * interp.c (fetch_str): New function.
2996         (sim_monitor): Rewrite using sim_read & sim_write.
2997         (sim_open): Check magic number.
2998         (sim_open): Write monitor vectors into memory using sim_write.
2999         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3000         (sim_read, sim_write): Simplify - transfer data one byte at a
3001         time.
3002         (load_memory, store_memory): Clarify meaning of parameter RAW.
3003
3004         * sim-main.h (isHOST): Defete definition.
3005         (isTARGET): Mark as depreciated.
3006         (address_translation): Delete parameter HOST.
3007
3008         * interp.c (address_translation): Delete parameter HOST.
3009
3010 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3011
3012         * mips.igen:
3013
3014         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3015         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3016
3017 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3018
3019         * mips.igen: Add model filter field to records.
3020
3021 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3022
3023         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
3024
3025         interp.c (sim_engine_run): Do not compile function sim_engine_run
3026         when WITH_IGEN == 1.
3027
3028         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3029         target architecture.
3030
3031         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3032         igen. Replace with configuration variables sim_igen_flags /
3033         sim_m16_flags.
3034
3035         * m16.igen: New file.  Copy mips16 insns here.
3036         * mips.igen: From here.
3037
3038 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3039
3040         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3041         to top.
3042         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3043
3044 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
3045
3046         * gencode.c (build_instruction): Follow sim_write's lead in using
3047         BigEndianMem instead of !ByteSwapMem.
3048
3049 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3050
3051         * configure.in (sim_gen): Dependent on target, select type of
3052         generator.  Always select old style generator.
3053
3054         configure: Re-generate.
3055
3056         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3057         targets.
3058         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3059         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3060         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3061         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3062         SIM_@sim_gen@_*, set by autoconf.
3063
3064 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3065
3066         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3067
3068         * interp.c (ColdReset): Remove #ifdef HASFPU, check
3069         CURRENT_FLOATING_POINT instead.
3070
3071         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3072         (address_translation): Raise exception InstructionFetch when
3073         translation fails and isINSTRUCTION.
3074
3075         * interp.c (sim_open, sim_write, sim_monitor, store_word,
3076         sim_engine_run): Change type of of vaddr and paddr to
3077         address_word.
3078         (address_translation, prefetch, load_memory, store_memory,
3079         cache_op): Change type of vAddr and pAddr to address_word.
3080
3081         * gencode.c (build_instruction): Change type of vaddr and paddr to
3082         address_word.
3083
3084 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3085
3086         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3087         macro to obtain result of ALU op.
3088
3089 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3090
3091         * interp.c (sim_info): Call profile_print.
3092
3093 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3094
3095         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3096
3097         * sim-main.h (WITH_PROFILE): Do not define, defined in
3098         common/sim-config.h.  Use sim-profile module.
3099         (simPROFILE): Delete defintion.
3100
3101         * interp.c (PROFILE): Delete definition.
3102         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3103         (sim_close): Delete code writing profile histogram.
3104         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3105         Delete.
3106         (sim_engine_run): Delete code profiling the PC.
3107
3108 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3109
3110         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3111
3112         * interp.c (sim_monitor): Make register pointers of type
3113         unsigned_word*.
3114
3115         * sim-main.h: Make registers of type unsigned_word not
3116         signed_word.
3117
3118 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3119
3120         * interp.c (sync_operation): Rename from SyncOperation, make
3121         global, add SD argument.
3122         (prefetch): Rename from Prefetch, make global, add SD argument.
3123         (decode_coproc): Make global.
3124
3125         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3126
3127         * gencode.c (build_instruction): Generate DecodeCoproc not
3128         decode_coproc calls.
3129
3130         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3131         (SizeFGR): Move to sim-main.h
3132         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3133         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3134         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3135         sim-main.h.
3136         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3137         FP_RM_TOMINF, GETRM): Move to sim-main.h.
3138         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3139         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3140         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3141         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3142
3143         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3144         exception.
3145         (sim-alu.h): Include.
3146         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3147         (sim_cia): Typedef to instruction_address.
3148
3149 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3150
3151         * Makefile.in (interp.o): Rename generated file engine.c to
3152         oengine.c.
3153
3154         * interp.c: Update.
3155
3156 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3157
3158         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3159
3160 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3161
3162         * gencode.c (build_instruction): For "FPSQRT", output correct
3163         number of arguments to Recip.
3164
3165 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3166
3167         * Makefile.in (interp.o): Depends on sim-main.h
3168
3169         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3170
3171         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3172         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3173         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3174         STATE, DSSTATE): Define
3175         (GPR, FGRIDX, ..): Define.
3176
3177         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3178         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3179         (GPR, FGRIDX, ...): Delete macros.
3180
3181         * interp.c: Update names to match defines from sim-main.h
3182
3183 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3184
3185         * interp.c (sim_monitor): Add SD argument.
3186         (sim_warning): Delete.  Replace calls with calls to
3187         sim_io_eprintf.
3188         (sim_error): Delete. Replace calls with sim_io_error.
3189         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3190         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3191         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3192         argument.
3193         (mips_size): Rename from sim_size. Add SD argument.
3194
3195         * interp.c (simulator): Delete global variable.
3196         (callback): Delete global variable.
3197         (mips_option_handler, sim_open, sim_write, sim_read,
3198         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3199         sim_size,sim_monitor): Use sim_io_* not callback->*.
3200         (sim_open): ZALLOC simulator struct.
3201         (PROFILE): Do not define.
3202
3203 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3204
3205         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3206         support.h with corresponding code.
3207
3208         * sim-main.h (word64, uword64), support.h: Move definition to
3209         sim-main.h.
3210         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3211
3212         * support.h: Delete
3213         * Makefile.in: Update dependencies
3214         * interp.c: Do not include.
3215
3216 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3217
3218         * interp.c (address_translation, load_memory, store_memory,
3219         cache_op): Rename to from AddressTranslation et.al., make global,
3220         add SD argument
3221
3222         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3223         CacheOp): Define.
3224
3225         * interp.c (SignalException): Rename to signal_exception, make
3226         global.
3227
3228         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3229
3230         * sim-main.h (SignalException, SignalExceptionInterrupt,
3231         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3232         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3233         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3234         Define.
3235
3236         * interp.c, support.h: Use.
3237
3238 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3239
3240         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3241         to value_fpr / store_fpr. Add SD argument.
3242         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3243         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3244
3245         * sim-main.h (ValueFPR, StoreFPR): Define.
3246
3247 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3248
3249         * interp.c (sim_engine_run): Check consistency between configure
3250         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3251         and HASFPU.
3252
3253         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3254         (mips_fpu): Configure WITH_FLOATING_POINT.
3255         (mips_endian): Configure WITH_TARGET_ENDIAN.
3256         * configure: Update.
3257
3258 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3259
3260         * configure: Regenerated to track ../common/aclocal.m4 changes.
3261
3262 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3263
3264         * configure: Regenerated.
3265
3266 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3267
3268         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3269
3270 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3271
3272         * gencode.c (print_igen_insn_models): Assume certain architectures
3273         include all mips* instructions.
3274         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3275         instruction.
3276
3277         * Makefile.in (tmp.igen): Add target. Generate igen input from
3278         gencode file.
3279
3280         * gencode.c (FEATURE_IGEN): Define.
3281         (main): Add --igen option.  Generate output in igen format.
3282         (process_instructions): Format output according to igen option.
3283         (print_igen_insn_format): New function.
3284         (print_igen_insn_models): New function.
3285         (process_instructions): Only issue warnings and ignore
3286         instructions when no FEATURE_IGEN.
3287
3288 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3289
3290         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3291         MIPS targets.
3292
3293 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3294
3295         * configure: Regenerated to track ../common/aclocal.m4 changes.
3296
3297 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3298
3299         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3300         SIM_RESERVED_BITS): Delete, moved to common.
3301         (SIM_EXTRA_CFLAGS): Update.
3302
3303 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3304
3305         * configure.in: Configure non-strict memory alignment.
3306         * configure: Regenerated to track ../common/aclocal.m4 changes.
3307
3308 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3309
3310         * configure: Regenerated to track ../common/aclocal.m4 changes.
3311
3312 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3313
3314         * gencode.c (SDBBP,DERET): Added (3900) insns.
3315         (RFE): Turn on for 3900.
3316         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3317         (dsstate): Made global.
3318         (SUBTARGET_R3900): Added.
3319         (CANCELDELAYSLOT): New.
3320         (SignalException): Ignore SystemCall rather than ignore and
3321         terminate.  Add DebugBreakPoint handling.
3322         (decode_coproc): New insns RFE, DERET; and new registers Debug
3323         and DEPC protected by SUBTARGET_R3900.
3324         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3325         bits explicitly.
3326         * Makefile.in,configure.in: Add mips subtarget option.
3327         * configure: Update.
3328
3329 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3330
3331         * gencode.c: Add r3900 (tx39).
3332
3333
3334 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3335
3336         * gencode.c (build_instruction): Don't need to subtract 4 for
3337         JALR, just 2.
3338
3339 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3340
3341         * interp.c: Correct some HASFPU problems.
3342
3343 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3344
3345         * configure: Regenerated to track ../common/aclocal.m4 changes.
3346
3347 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3348
3349         * interp.c (mips_options): Fix samples option short form, should
3350         be `x'.
3351
3352 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3353
3354         * interp.c (sim_info): Enable info code.  Was just returning.
3355
3356 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3357
3358         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3359         MFC0.
3360
3361 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3362
3363         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3364         constants.
3365         (build_instruction): Ditto for LL.
3366
3367 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3368
3369         * configure: Regenerated to track ../common/aclocal.m4 changes.
3370
3371 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3372
3373         * configure: Regenerated to track ../common/aclocal.m4 changes.
3374         * config.in: Ditto.
3375
3376 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3377
3378         * interp.c (sim_open): Add call to sim_analyze_program, update
3379         call to sim_config.
3380
3381 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3382
3383         * interp.c (sim_kill): Delete.
3384         (sim_create_inferior): Add ABFD argument. Set PC from same.
3385         (sim_load): Move code initializing trap handlers from here.
3386         (sim_open): To here.
3387         (sim_load): Delete, use sim-hload.c.
3388
3389         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3390
3391 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3392
3393         * configure: Regenerated to track ../common/aclocal.m4 changes.
3394         * config.in: Ditto.
3395
3396 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3397
3398         * interp.c (sim_open): Add ABFD argument.
3399         (sim_load): Move call to sim_config from here.
3400         (sim_open): To here.  Check return status.
3401
3402 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3403
3404         * gencode.c (build_instruction): Two arg MADD should
3405         not assign result to $0.
3406
3407 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3408
3409         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3410         * sim/mips/configure.in: Regenerate.
3411
3412 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3413
3414         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3415         signed8, unsigned8 et.al. types.
3416
3417         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3418         hosts when selecting subreg.
3419
3420 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3421
3422         * interp.c (sim_engine_run): Reset the ZERO register to zero
3423         regardless of FEATURE_WARN_ZERO.
3424         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3425
3426 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3427
3428         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3429         (SignalException): For BreakPoints ignore any mode bits and just
3430         save the PC.
3431         (SignalException): Always set the CAUSE register.
3432
3433 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3434
3435         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3436         exception has been taken.
3437
3438         * interp.c: Implement the ERET and mt/f sr instructions.
3439
3440 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3441
3442         * interp.c (SignalException): Don't bother restarting an
3443         interrupt.
3444
3445 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3446
3447         * interp.c (SignalException): Really take an interrupt.
3448         (interrupt_event): Only deliver interrupts when enabled.
3449
3450 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3451
3452         * interp.c (sim_info): Only print info when verbose.
3453         (sim_info) Use sim_io_printf for output.
3454
3455 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3456
3457         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3458         mips architectures.
3459
3460 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3461
3462         * interp.c (sim_do_command): Check for common commands if a
3463         simulator specific command fails.
3464
3465 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3466
3467         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3468         and simBE when DEBUG is defined.
3469
3470 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3471
3472         * interp.c (interrupt_event): New function.  Pass exception event
3473         onto exception handler.
3474
3475         * configure.in: Check for stdlib.h.
3476         * configure: Regenerate.
3477
3478         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3479         variable declaration.
3480         (build_instruction): Initialize memval1.
3481         (build_instruction): Add UNUSED attribute to byte, bigend,
3482         reverse.
3483         (build_operands): Ditto.
3484
3485         * interp.c: Fix GCC warnings.
3486         (sim_get_quit_code): Delete.
3487
3488         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3489         * Makefile.in: Ditto.
3490         * configure: Re-generate.
3491
3492         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3493
3494 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3495
3496         * interp.c (mips_option_handler): New function parse argumes using
3497         sim-options.
3498         (myname): Replace with STATE_MY_NAME.
3499         (sim_open): Delete check for host endianness - performed by
3500         sim_config.
3501         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3502         (sim_open): Move much of the initialization from here.
3503         (sim_load): To here.  After the image has been loaded and
3504         endianness set.
3505         (sim_open): Move ColdReset from here.
3506         (sim_create_inferior): To here.
3507         (sim_open): Make FP check less dependant on host endianness.
3508
3509         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3510         run.
3511         * interp.c (sim_set_callbacks): Delete.
3512
3513         * interp.c (membank, membank_base, membank_size): Replace with
3514         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3515         (sim_open): Remove call to callback->init. gdb/run do this.
3516
3517         * interp.c: Update
3518
3519         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3520
3521         * interp.c (big_endian_p): Delete, replaced by
3522         current_target_byte_order.
3523
3524 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3525
3526         * interp.c (host_read_long, host_read_word, host_swap_word,
3527         host_swap_long): Delete. Using common sim-endian.
3528         (sim_fetch_register, sim_store_register): Use H2T.
3529         (pipeline_ticks): Delete.  Handled by sim-events.
3530         (sim_info): Update.
3531         (sim_engine_run): Update.
3532
3533 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3534
3535         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3536         reason from here.
3537         (SignalException): To here. Signal using sim_engine_halt.
3538         (sim_stop_reason): Delete, moved to common.
3539
3540 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3541
3542         * interp.c (sim_open): Add callback argument.
3543         (sim_set_callbacks): Delete SIM_DESC argument.
3544         (sim_size): Ditto.
3545
3546 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3547
3548         * Makefile.in (SIM_OBJS): Add common modules.
3549
3550         * interp.c (sim_set_callbacks): Also set SD callback.
3551         (set_endianness, xfer_*, swap_*): Delete.
3552         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3553         Change to functions using sim-endian macros.
3554         (control_c, sim_stop): Delete, use common version.
3555         (simulate): Convert into.
3556         (sim_engine_run): This function.
3557         (sim_resume): Delete.
3558
3559         * interp.c (simulation): New variable - the simulator object.
3560         (sim_kind): Delete global - merged into simulation.
3561         (sim_load): Cleanup.  Move PC assignment from here.
3562         (sim_create_inferior): To here.
3563
3564         * sim-main.h: New file.
3565         * interp.c (sim-main.h): Include.
3566
3567 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3568
3569         * configure: Regenerated to track ../common/aclocal.m4 changes.
3570
3571 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3572
3573         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3574
3575 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3576
3577         * gencode.c (build_instruction): DIV instructions: check
3578         for division by zero and integer overflow before using
3579         host's division operation.
3580
3581 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3582
3583         * Makefile.in (SIM_OBJS): Add sim-load.o.
3584         * interp.c: #include bfd.h.
3585         (target_byte_order): Delete.
3586         (sim_kind, myname, big_endian_p): New static locals.
3587         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3588         after argument parsing.  Recognize -E arg, set endianness accordingly.
3589         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3590         load file into simulator.  Set PC from bfd.
3591         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3592         (set_endianness): Use big_endian_p instead of target_byte_order.
3593
3594 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3595
3596         * interp.c (sim_size): Delete prototype - conflicts with
3597         definition in remote-sim.h.  Correct definition.
3598
3599 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3600
3601         * configure: Regenerated to track ../common/aclocal.m4 changes.
3602         * config.in: Ditto.
3603
3604 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3605
3606         * interp.c (sim_open): New arg `kind'.
3607
3608         * configure: Regenerated to track ../common/aclocal.m4 changes.
3609
3610 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3611
3612         * configure: Regenerated to track ../common/aclocal.m4 changes.
3613
3614 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3615
3616         * interp.c (sim_open): Set optind to 0 before calling getopt.
3617
3618 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3619
3620         * configure: Regenerated to track ../common/aclocal.m4 changes.
3621
3622 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3623
3624         * interp.c : Replace uses of pr_addr with pr_uword64
3625         where the bit length is always 64 independent of SIM_ADDR.
3626         (pr_uword64) : added.
3627
3628 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3629
3630         * configure: Re-generate.
3631
3632 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3633
3634         * configure: Regenerate to track ../common/aclocal.m4 changes.
3635
3636 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3637
3638         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3639         in argv form.
3640         (other sim_*): New SIM_DESC argument.
3641
3642 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3643
3644         * interp.c: Fix printing of addresses for non-64-bit targets.
3645         (pr_addr): Add function to print address based on size.
3646
3647 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3648
3649         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3650
3651 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3652
3653         * gencode.c (build_mips16_operands): Correct computation of base
3654         address for extended PC relative instruction.
3655
3656 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3657
3658         * interp.c (mips16_entry): Add support for floating point cases.
3659         (SignalException): Pass floating point cases to mips16_entry.
3660         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3661         registers.
3662         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3663         or fmt_word.
3664         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3665         and then set the state to fmt_uninterpreted.
3666         (COP_SW): Temporarily set the state to fmt_word while calling
3667         ValueFPR.
3668
3669 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3670
3671         * gencode.c (build_instruction): The high order may be set in the
3672         comparison flags at any ISA level, not just ISA 4.
3673
3674 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3675
3676         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3677         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3678         * configure.in: sinclude ../common/aclocal.m4.
3679         * configure: Regenerated.
3680
3681 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3682
3683         * configure: Rebuild after change to aclocal.m4.
3684
3685 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3686
3687         * configure configure.in Makefile.in:  Update to new configure
3688         scheme which is more compatible with WinGDB builds.
3689         * configure.in:  Improve comment on how to run autoconf.
3690         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3691         * Makefile.in:  Use autoconf substitution to install common
3692         makefile fragment.
3693
3694 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3695
3696         * gencode.c (build_instruction): Use BigEndianCPU instead of
3697         ByteSwapMem.
3698
3699 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3700
3701         * interp.c (sim_monitor): Make output to stdout visible in
3702         wingdb's I/O log window.
3703
3704 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3705
3706         * support.h: Undo previous change to SIGTRAP
3707         and SIGQUIT values.
3708
3709 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3710
3711         * interp.c (store_word, load_word): New static functions.
3712         (mips16_entry): New static function.
3713         (SignalException): Look for mips16 entry and exit instructions.
3714         (simulate): Use the correct index when setting fpr_state after
3715         doing a pending move.
3716
3717 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3718
3719         * interp.c: Fix byte-swapping code throughout to work on
3720         both little- and big-endian hosts.
3721
3722 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3723
3724         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3725         with gdb/config/i386/xm-windows.h.
3726
3727 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3728
3729         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3730         that messes up arithmetic shifts.
3731
3732 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3733
3734         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3735         SIGTRAP and SIGQUIT for _WIN32.
3736
3737 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3738
3739         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3740         force a 64 bit multiplication.
3741         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3742         destination register is 0, since that is the default mips16 nop
3743         instruction.
3744
3745 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3746
3747         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3748         (build_endian_shift): Don't check proc64.
3749         (build_instruction): Always set memval to uword64.  Cast op2 to
3750         uword64 when shifting it left in memory instructions.  Always use
3751         the same code for stores--don't special case proc64.
3752
3753         * gencode.c (build_mips16_operands): Fix base PC value for PC
3754         relative operands.
3755         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3756         jal instruction.
3757         * interp.c (simJALDELAYSLOT): Define.
3758         (JALDELAYSLOT): Define.
3759         (INDELAYSLOT, INJALDELAYSLOT): Define.
3760         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3761
3762 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3763
3764         * interp.c (sim_open): add flush_cache as a PMON routine
3765         (sim_monitor): handle flush_cache by ignoring it
3766
3767 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3768
3769         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3770         BigEndianMem.
3771         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3772         (BigEndianMem): Rename to ByteSwapMem and change sense.
3773         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3774         BigEndianMem references to !ByteSwapMem.
3775         (set_endianness): New function, with prototype.
3776         (sim_open): Call set_endianness.
3777         (sim_info): Use simBE instead of BigEndianMem.
3778         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3779         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3780         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3781         ifdefs, keeping the prototype declaration.
3782         (swap_word): Rewrite correctly.
3783         (ColdReset): Delete references to CONFIG.  Delete endianness related
3784         code; moved to set_endianness.
3785
3786 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3787
3788         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3789         * interp.c (CHECKHILO): Define away.
3790         (simSIGINT): New macro.
3791         (membank_size): Increase from 1MB to 2MB.
3792         (control_c): New function.
3793         (sim_resume): Rename parameter signal to signal_number.  Add local
3794         variable prev.  Call signal before and after simulate.
3795         (sim_stop_reason): Add simSIGINT support.
3796         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3797         functions always.
3798         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3799         if logfh is NULL.
3800         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3801         a call to sim_warning.
3802
3803 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3804
3805         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3806         16 bit instructions.
3807
3808 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3809
3810         Add support for mips16 (16 bit MIPS implementation):
3811         * gencode.c (inst_type): Add mips16 instruction encoding types.
3812         (GETDATASIZEINSN): Define.
3813         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3814         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3815         mtlo.
3816         (MIPS16_DECODE): New table, for mips16 instructions.
3817         (bitmap_val): New static function.
3818         (struct mips16_op): Define.
3819         (mips16_op_table): New table, for mips16 operands.
3820         (build_mips16_operands): New static function.
3821         (process_instructions): If PC is odd, decode a mips16
3822         instruction.  Break out instruction handling into new
3823         build_instruction function.
3824         (build_instruction): New static function, broken out of
3825         process_instructions.  Check modifiers rather than flags for SHIFT
3826         bit count and m[ft]{hi,lo} direction.
3827         (usage): Pass program name to fprintf.
3828         (main): Remove unused variable this_option_optind.  Change
3829         ``*loptarg++'' to ``loptarg++''.
3830         (my_strtoul): Parenthesize && within ||.
3831         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3832         (simulate): If PC is odd, fetch a 16 bit instruction, and
3833         increment PC by 2 rather than 4.
3834         * configure.in: Add case for mips16*-*-*.
3835         * configure: Rebuild.
3836
3837 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3838
3839         * interp.c: Allow -t to enable tracing in standalone simulator.
3840         Fix garbage output in trace file and error messages.
3841
3842 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3843
3844         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3845         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3846         * configure.in: Simplify using macros in ../common/aclocal.m4.
3847         * configure: Regenerated.
3848         * tconfig.in: New file.
3849
3850 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3851
3852         * interp.c: Fix bugs in 64-bit port.
3853         Use ansi function declarations for msvc compiler.
3854         Initialize and test file pointer in trace code.
3855         Prevent duplicate definition of LAST_EMED_REGNUM.
3856
3857 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3858
3859         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3860
3861 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3862
3863         * interp.c (SignalException): Check for explicit terminating
3864         breakpoint value.
3865         * gencode.c: Pass instruction value through SignalException()
3866         calls for Trap, Breakpoint and Syscall.
3867
3868 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3869
3870         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3871         only used on those hosts that provide it.
3872         * configure.in: Add sqrt() to list of functions to be checked for.
3873         * config.in: Re-generated.
3874         * configure: Re-generated.
3875
3876 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3877
3878         * gencode.c (process_instructions): Call build_endian_shift when
3879         expanding STORE RIGHT, to fix swr.
3880         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3881         clear the high bits.
3882         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3883         Fix float to int conversions to produce signed values.
3884
3885 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3886
3887         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3888         (process_instructions): Correct handling of nor instruction.
3889         Correct shift count for 32 bit shift instructions. Correct sign
3890         extension for arithmetic shifts to not shift the number of bits in
3891         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3892         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3893         Fix madd.
3894         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3895         It's OK to have a mult follow a mult.  What's not OK is to have a
3896         mult follow an mfhi.
3897         (Convert): Comment out incorrect rounding code.
3898
3899 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3900
3901         * interp.c (sim_monitor): Improved monitor printf
3902         simulation. Tidied up simulator warnings, and added "--log" option
3903         for directing warning message output.
3904         * gencode.c: Use sim_warning() rather than WARNING macro.
3905
3906 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3907
3908         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3909         getopt1.o, rather than on gencode.c.  Link objects together.
3910         Don't link against -liberty.
3911         (gencode.o, getopt.o, getopt1.o): New targets.
3912         * gencode.c: Include <ctype.h> and "ansidecl.h".
3913         (AND): Undefine after including "ansidecl.h".
3914         (ULONG_MAX): Define if not defined.
3915         (OP_*): Don't define macros; now defined in opcode/mips.h.
3916         (main): Call my_strtoul rather than strtoul.
3917         (my_strtoul): New static function.
3918
3919 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3920
3921         * gencode.c (process_instructions):  Generate word64 and uword64
3922         instead of `long long' and `unsigned long long' data types.
3923         * interp.c:  #include sysdep.h to get signals, and define default
3924         for SIGBUS.
3925         * (Convert):  Work around for Visual-C++ compiler bug with type
3926         conversion.
3927         * support.h:  Make things compile under Visual-C++ by using
3928         __int64 instead of `long long'.  Change many refs to long long
3929         into word64/uword64 typedefs.
3930
3931 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3932
3933         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3934         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3935         (docdir): Removed.
3936         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3937         (AC_PROG_INSTALL): Added.
3938         (AC_PROG_CC): Moved to before configure.host call.
3939         * configure: Rebuilt.
3940
3941 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3942
3943         * configure.in: Define @SIMCONF@ depending on mips target.
3944         * configure: Rebuild.
3945         * Makefile.in (run): Add @SIMCONF@ to control simulator
3946         construction.
3947         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3948         * interp.c: Remove some debugging, provide more detailed error
3949         messages, update memory accesses to use LOADDRMASK.
3950
3951 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3952
3953         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3954         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3955         stamp-h.
3956         * configure: Rebuild.
3957         * config.in: New file, generated by autoheader.
3958         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3959         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3960         HAVE_ANINT and HAVE_AINT, as appropriate.
3961         * Makefile.in (run): Use @LIBS@ rather than -lm.
3962         (interp.o): Depend upon config.h.
3963         (Makefile): Just rebuild Makefile.
3964         (clean): Remove stamp-h.
3965         (mostlyclean): Make the same as clean, not as distclean.
3966         (config.h, stamp-h): New targets.
3967
3968 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3969
3970         * interp.c (ColdReset): Fix boolean test. Make all simulator
3971         globals static.
3972
3973 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3974
3975         * interp.c (xfer_direct_word, xfer_direct_long,
3976         swap_direct_word, swap_direct_long, xfer_big_word,
3977         xfer_big_long, xfer_little_word, xfer_little_long,
3978         swap_word,swap_long): Added.
3979         * interp.c (ColdReset): Provide function indirection to
3980         host<->simulated_target transfer routines.
3981         * interp.c (sim_store_register, sim_fetch_register): Updated to
3982         make use of indirected transfer routines.
3983
3984 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3985
3986         * gencode.c (process_instructions): Ensure FP ABS instruction
3987         recognised.
3988         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3989         system call support.
3990
3991 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3992
3993         * interp.c (sim_do_command): Complain if callback structure not
3994         initialised.
3995
3996 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3997
3998         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3999         support for Sun hosts.
4000         * Makefile.in (gencode): Ensure the host compiler and libraries
4001         used for cross-hosted build.
4002
4003 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
4004
4005         * interp.c, gencode.c: Some more (TODO) tidying.
4006
4007 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
4008
4009         * gencode.c, interp.c: Replaced explicit long long references with
4010         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4011         * support.h (SET64LO, SET64HI): Macros added.
4012
4013 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
4014
4015         * configure: Regenerate with autoconf 2.7.
4016
4017 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
4018
4019         * interp.c (LoadMemory): Enclose text following #endif in /* */.
4020         * support.h: Remove superfluous "1" from #if.
4021         * support.h (CHECKSIM): Remove stray 'a' at end of line.
4022
4023 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
4024
4025         * interp.c (StoreFPR): Control UndefinedResult() call on
4026         WARN_RESULT manifest.
4027
4028 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
4029
4030         * gencode.c: Tidied instruction decoding, and added FP instruction
4031         support.
4032
4033         * interp.c: Added dineroIII, and BSD profiling support. Also
4034         run-time FP handling.
4035
4036 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
4037
4038         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4039         gencode.c, interp.c, support.h: created.