sim/mips/ChangeLog

   1 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
   2
   3         * configure: Regenerate.
   4
   5 2005-01-14  Andrew Cagney  <cagney@gnu.org>
   6
   7         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
   8         explicit call to AC_CONFIG_HEADER.
   9         * configure: Regenerate.
  10
  11 2005-01-12  Andrew Cagney  <cagney@gnu.org>
  12
  13         * configure.ac: Update to use ../common/common.m4.
  14         * configure: Re-generate.
  15
  16 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
  17
  18         * configure: Regenerated to track ../common/aclocal.m4 changes.
  19
  20 2005-01-07  Andrew Cagney  <cagney@gnu.org>
  21
  22         * configure.ac: Rename configure.in, require autoconf 2.59.
  23         * configure: Re-generate.
  24
  25 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
  26
  27         * configure: Regenerate for ../common/aclocal.m4 update.
  28
  29 2004-09-24  Monika Chaddha  <monika@acmet.com>
  30
  31         Committed by Andrew Cagney.
  32         * m16.igen (CMP, CMPI): Fix assembler.
  33
  34 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
  35
  36         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
  37         * configure: Regenerate.
  38
  39 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
  40
  41         * configure.in (sim_m16_machine): Include mipsIII.
  42         * configure: Regenerate.
  43
  44 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
  45
  46         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
  47         from COP0_BADVADDR.
  48         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
  49
  50 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
  51
  52         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
  53
  54 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
  55
  56         * mips.igen (check_fmt): Remove.
  57         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
  58         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
  59         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
  60         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
  61         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
  62         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
  63         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
  64         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
  65         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
  66         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
  67
  68 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
  69
  70         * sb1.igen (check_sbx): New function.
  71         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
  72
  73 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
  74             Richard Sandiford  <rsandifo@redhat.com>
  75
  76         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
  77         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
  78         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
  79         separate implementations for mipsIV and mipsV.  Use new macros to
  80         determine whether the restrictions apply.
  81
  82 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
  83
  84         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
  85         (check_mult_hilo): Improve comments.
  86         (check_div_hilo): Likewise.  Also, fork off a new version
  87         to handle mips32/mips64 (since there are no hazards to check
  88         in MIPS32/MIPS64).
  89
  90 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
  91
  92         * mips.igen (do_dmultx): Fix check for negative operands.
  93
  94 2003-05-16  Ian Lance Taylor  <ian@airs.com>
  95
  96         * Makefile.in (SHELL): Make sure this is defined.
  97         (various): Use $(SHELL) whenever we invoke move-if-change.
  98
  99 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 100
 101         * cp1.c: Tweak attribution slightly.
 102         * cp1.h: Likewise.
 103         * mdmx.c: Likewise.
 104         * mdmx.igen: Likewise.
 105         * mips3d.igen: Likewise.
 106         * sb1.igen: Likewise.
 107
 108 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 109
 110         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 111         unsigned operands.
 112
 113 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 114
 115         * interp.c (sim_open): Rename _bfd to bfd.
 116         (sim_create_inferior): Ditto.
 117
 118 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 119
 120         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 121
 122 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 123
 124         * mips.igen (EI, DI): Remove.
 125
 126 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 127
 128         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 129
 130 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 131             Andrew Cagney  <ac131313@redhat.com>
 132             Gavin Romig-Koch  <gavin@redhat.com>
 133             Graydon Hoare  <graydon@redhat.com>
 134             Aldy Hernandez  <aldyh@redhat.com>
 135             Dave Brolley  <brolley@redhat.com>
 136             Chris Demetriou  <cgd@broadcom.com>
 137
 138         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 139         (sim_mach_default): New variable.
 140         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 141         Add a new simulator generator, MULTI.
 142         * configure: Regenerate.
 143         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 144         (multi-run.o): New dependency.
 145         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 146         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 147         (tmp-multi): Combine them.
 148         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 149         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 150         (distclean-extra): New rule.
 151         * sim-main.h: Include bfd.h.
 152         (MIPS_MACH): New macro.
 153         * mips.igen (vr4120, vr5400, vr5500): New models.
 154         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 155         * vr.igen: Replace with new version.
 156
 157 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 158
 159         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 160         * configure: Regenerate.
 161
 162 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 163
 164         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 165         * mips.igen: Remove all invocations of check_branch_bug and
 166         mark_branch_bug.
 167
 168 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 169
 170         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 171
 172 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 173
 174         * mips.igen (do_load_double, do_store_double): New functions.
 175         (LDC1, SDC1): Rename to...
 176         (LDC1b, SDC1b): respectively.
 177         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 178
 179 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 180
 181         * cp1.c (fp_recip2): Modify initialization expression so that
 182         GCC will recognize it as constant.
 183
 184 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 185
 186         * mdmx.c (SD_): Delete.
 187         (Unpredictable): Re-define, for now, to directly invoke
 188         unpredictable_action().
 189         (mdmx_acc_op): Fix error in .ob immediate handling.
 190
 191 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 192
 193         * interp.c (sim_firmware_command): Initialize `address'.
 194
 195 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 196
 197         * configure: Regenerated to track ../common/aclocal.m4 changes.
 198
 199 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 200             Ed Satterthwaite  <ehs@broadcom.com>
 201
 202         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 203         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 204         * mips.igen: Include mips3d.igen.
 205         (mips3d): New model name for MIPS-3D ASE instructions.
 206         (CVT.W.fmt): Don't use this instruction for word (source) format
 207         instructions.
 208         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 209         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 210         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 211         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 212         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 213         (RSquareRoot1, RSquareRoot2): New macros.
 214         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 215         (fp_rsqrt2): New functions.
 216         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 217         * configure: Regenerate.
 218
 219 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 220             Ed Satterthwaite  <ehs@broadcom.com>
 221
 222         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 223         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 224         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 225         (convert): Note that this function is not used for paired-single
 226         format conversions.
 227         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 228         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 229         (check_fmt_p): Enable paired-single support.
 230         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 231         (PUU.PS): New instructions.
 232         (CVT.S.fmt): Don't use this instruction for paired-single format
 233         destinations.
 234         * sim-main.h (FP_formats): New value 'fmt_ps.'
 235         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 236         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 237
 238 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 239
 240         * mips.igen: Fix formatting of function calls in
 241         many FP operations.
 242
 243 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 244
 245         * mips.igen (MOVN, MOVZ): Trace result.
 246         (TNEI): Print "tnei" as the opcode name in traces.
 247         (CEIL.W): Add disassembly string for traces.
 248         (RSQRT.fmt): Make location of disassembly string consistent
 249         with other instructions.
 250
 251 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 252
 253         * mips.igen (X): Delete unused function.
 254
 255 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 256
 257         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 258
 259 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 260             Ed Satterthwaite  <ehs@broadcom.com>
 261
 262         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 263         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 264         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 265         (fp_nmsub): New prototypes.
 266         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 267         (NegMultiplySub): New defines.
 268         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 269         (MADD.D, MADD.S): Replace with...
 270         (MADD.fmt): New instruction.
 271         (MSUB.D, MSUB.S): Replace with...
 272         (MSUB.fmt): New instruction.
 273         (NMADD.D, NMADD.S): Replace with...
 274         (NMADD.fmt): New instruction.
 275         (NMSUB.D, MSUB.S): Replace with...
 276         (NMSUB.fmt): New instruction.
 277
 278 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 279             Ed Satterthwaite  <ehs@broadcom.com>
 280
 281         * cp1.c: Fix more comment spelling and formatting.
 282         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 283         (denorm_mode): New function.
 284         (fpu_unary, fpu_binary): Round results after operation, collect
 285         status from rounding operations, and update the FCSR.
 286         (convert): Collect status from integer conversions and rounding
 287         operations, and update the FCSR.  Adjust NaN values that result
 288         from conversions.  Convert to use sim_io_eprintf rather than
 289         fprintf, and remove some debugging code.
 290         * cp1.h (fenr_FS): New define.
 291
 292 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 293
 294         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 295         rounding mode to sim FP rounding mode flag conversion code into...
 296         (rounding_mode): New function.
 297
 298 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 299
 300         * cp1.c: Clean up formatting of a few comments.
 301         (value_fpr): Reformat switch statement.
 302
 303 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 304             Ed Satterthwaite  <ehs@broadcom.com>
 305
 306         * cp1.h: New file.
 307         * sim-main.h: Include cp1.h.
 308         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 309         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 310         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 311         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 312         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 313         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 314         * cp1.c: Don't include sim-fpu.h; already included by
 315         sim-main.h.  Clean up formatting of some comments.
 316         (NaN, Equal, Less): Remove.
 317         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 318         (fp_cmp): New functions.
 319         * mips.igen (do_c_cond_fmt): Remove.
 320         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 321         Compare.  Add result tracing.
 322         (CxC1): Remove, replace with...
 323         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 324         (DMxC1): Remove, replace with...
 325         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 326         (MxC1): Remove, replace with...
 327         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 328
 329 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 330
 331         * sim-main.h (FGRIDX): Remove, replace all uses with...
 332         (FGR_BASE): New macro.
 333         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 334         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 335         (NR_FGR, FGR): Likewise.
 336         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 337         * mips.igen: Likewise.
 338
 339 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 340
 341         * cp1.c: Add an FSF Copyright notice to this file.
 342
 343 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 344             Ed Satterthwaite  <ehs@broadcom.com>
 345
 346         * cp1.c (Infinity): Remove.
 347         * sim-main.h (Infinity): Likewise.
 348
 349         * cp1.c (fp_unary, fp_binary): New functions.
 350         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 351         (fp_sqrt): New functions, implemented in terms of the above.
 352         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 353         (Recip, SquareRoot): Remove (replaced by functions above).
 354         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 355         (fp_recip, fp_sqrt): New prototypes.
 356         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 357         (Recip, SquareRoot): Replace prototypes with #defines which
 358         invoke the functions above.
 359
 360 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 361
 362         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 363         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 364         file, remove PARAMS from prototypes.
 365         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 366         simulator state arguments.
 367         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 368         pass simulator state arguments.
 369         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 370         (store_fpr, convert): Remove 'sd' argument.
 371         (value_fpr): Likewise.  Convert to use 'SD' instead.
 372
 373 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 374
 375         * cp1.c (Min, Max): Remove #if 0'd functions.
 376         * sim-main.h (Min, Max): Remove.
 377
 378 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 379
 380         * cp1.c: fix formatting of switch case and default labels.
 381         * interp.c: Likewise.
 382         * sim-main.c: Likewise.
 383
 384 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 385
 386         * cp1.c: Clean up comments which describe FP formats.
 387          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 388
 389 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 390             Ed Satterthwaite  <ehs@broadcom.com>
 391
 392         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 393         Broadcom SiByte SB-1 processor configurations.
 394         * configure: Regenerate.
 395         * sb1.igen: New file.
 396         * mips.igen: Include sb1.igen.
 397         (sb1): New model.
 398         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 399         * mdmx.igen: Add "sb1" model to all appropriate functions and
 400         instructions.
 401         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 402         (ob_func, ob_acc): Reference the above.
 403         (qh_acc): Adjust to keep the same size as ob_acc.
 404         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 405         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 406
 407 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 408
 409         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 410
 411 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 412             Ed Satterthwaite  <ehs@broadcom.com>
 413
 414         * mips.igen (mdmx): New (pseudo-)model.
 415         * mdmx.c, mdmx.igen: New files.
 416         * Makefile.in (SIM_OBJS): Add mdmx.o.
 417         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 418         New typedefs.
 419         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 420         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 421         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 422         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 423         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 424         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 425         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 426         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 427         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 428         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 429         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 430         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 431         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 432         (qh_fmtsel): New macros.
 433         (_sim_cpu): New member "acc".
 434         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 435         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 436
 437 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 438
 439         * interp.c: Use 'deprecated' rather than 'depreciated.'
 440         * sim-main.h: Likewise.
 441
 442 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 443
 444         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 445         which wouldn't compile anyway.
 446         * sim-main.h (unpredictable_action): New function prototype.
 447         (Unpredictable): Define to call igen function unpredictable().
 448         (NotWordValue): New macro to call igen function not_word_value().
 449         (UndefinedResult): Remove.
 450         * interp.c (undefined_result): Remove.
 451         (unpredictable_action): New function.
 452         * mips.igen (not_word_value, unpredictable): New functions.
 453         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 454         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 455         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 456         NotWordValue() to check for unpredictable inputs, then
 457         Unpredictable() to handle them.
 458
 459 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 460
 461         * mips.igen: Fix formatting of calls to Unpredictable().
 462
 463 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 464
 465         * interp.c (sim_open): Revert previous change.
 466
 467 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 468
 469         * interp.c (sim_open): Disable chunk of code that wrote code in
 470         vector table entries.
 471
 472 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 473
 474         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 475         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 476         unused definitions.
 477
 478 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 479
 480         * cp1.c: Fix many formatting issues.
 481
 482 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 483
 484         * cp1.c (fpu_format_name): New function to replace...
 485         (DOFMT): This.  Delete, and update all callers.
 486         (fpu_rounding_mode_name): New function to replace...
 487         (RMMODE): This.  Delete, and update all callers.
 488
 489 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 490
 491         * interp.c: Move FPU support routines from here to...
 492         * cp1.c: Here.  New file.
 493         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 494         (cp1.o): New target.
 495
 496 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 497
 498         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 499         * mips.igen (mips32, mips64): New models, add to all instructions
 500         and functions as appropriate.
 501         (loadstore_ea, check_u64): New variant for model mips64.
 502         (check_fmt_p): New variant for models mipsV and mips64, remove
 503         mipsV model marking fro other variant.
 504         (SLL) Rename to...
 505         (SLLa) this.
 506         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 507         for mips32 and mips64.
 508         (DCLO, DCLZ): New instructions for mips64.
 509
 510 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 511
 512         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 513         immediate or code as a hex value with the "%#lx" format.
 514         (ANDI): Likewise, and fix printed instruction name.
 515
 516 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 517
 518         * sim-main.h (UndefinedResult, Unpredictable): New macros
 519         which currently do nothing.
 520
 521 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 522
 523         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 524         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 525         (status_CU3): New definitions.
 526
 527         * sim-main.h (ExceptionCause): Add new values for MIPS32
 528         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 529         for DebugBreakPoint and NMIReset to note their status in
 530         MIPS32 and MIPS64.
 531         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 532         (SignalExceptionCacheErr): New exception macros.
 533
 534 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 535
 536         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 537         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 538         is always enabled.
 539         (SignalExceptionCoProcessorUnusable): Take as argument the
 540         unusable coprocessor number.
 541
 542 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 543
 544         * mips.igen: Fix formatting of all SignalException calls.
 545
 546 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 547
 548         * sim-main.h (SIGNEXTEND): Remove.
 549
 550 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 551
 552         * mips.igen: Remove gencode comment from top of file, fix
 553         spelling in another comment.
 554
 555 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 556
 557         * mips.igen (check_fmt, check_fmt_p): New functions to check
 558         whether specific floating point formats are usable.
 559         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 560         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 561         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 562         Use the new functions.
 563         (do_c_cond_fmt): Remove format checks...
 564         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 565
 566 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 567
 568         * mips.igen: Fix formatting of check_fpu calls.
 569
 570 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 571
 572         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 573
 574 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 575
 576         * mips.igen: Remove whitespace at end of lines.
 577
 578 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 579
 580         * mips.igen (loadstore_ea): New function to do effective
 581         address calculations.
 582         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 583         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 584         CACHE): Use loadstore_ea to do effective address computations.
 585
 586 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 587
 588         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 589         * mips.igen (LL, CxC1, MxC1): Likewise.
 590
 591 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 592
 593         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 594         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 595         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 596         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 597         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 598         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 599         Don't split opcode fields by hand, use the opcode field values
 600         provided by igen.
 601
 602 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 603
 604         * mips.igen (do_divu): Fix spacing.
 605
 606         * mips.igen (do_dsllv): Move to be right before DSLLV,
 607         to match the rest of the do_<shift> functions.
 608
 609 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 610
 611         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 612         DSRL32, do_dsrlv): Trace inputs and results.
 613
 614 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 615
 616         * mips.igen (CACHE): Provide instruction-printing string.
 617
 618         * interp.c (signal_exception): Comment tokens after #endif.
 619
 620 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 621
 622         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 623         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 624         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 625         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 626         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 627         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 628         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 629         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 630
 631 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 632
 633         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 634         instruction-printing string.
 635         (LWU): Use '64' as the filter flag.
 636
 637 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 638
 639         * mips.igen (SDXC1): Fix instruction-printing string.
 640
 641 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 642
 643         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 644         filter flags "32,f".
 645
 646 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 647
 648         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 649         as the filter flag.
 650
 651 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 652
 653         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 654         add a comma) so that it more closely match the MIPS ISA
 655         documentation opcode partitioning.
 656         (PREF): Put useful names on opcode fields, and include
 657         instruction-printing string.
 658
 659 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 660
 661         * mips.igen (check_u64): New function which in the future will
 662         check whether 64-bit instructions are usable and signal an
 663         exception if not.  Currently a no-op.
 664         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 665         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 666         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 667         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 668
 669         * mips.igen (check_fpu): New function which in the future will
 670         check whether FPU instructions are usable and signal an exception
 671         if not.  Currently a no-op.
 672         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 673         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 674         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 675         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 676         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 677         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 678         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 679         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 680
 681 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 682
 683         * mips.igen (do_load_left, do_load_right): Move to be immediately
 684         following do_load.
 685         (do_store_left, do_store_right): Move to be immediately following
 686         do_store.
 687
 688 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 689
 690         * mips.igen (mipsV): New model name.  Also, add it to
 691         all instructions and functions where it is appropriate.
 692
 693 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 694
 695         * mips.igen: For all functions and instructions, list model
 696         names that support that instruction one per line.
 697
 698 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 699
 700         * mips.igen: Add some additional comments about supported
 701         models, and about which instructions go where.
 702         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 703         order as is used in the rest of the file.
 704
 705 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 706
 707         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 708         indicating that ALU32_END or ALU64_END are there to check
 709         for overflow.
 710         (DADD): Likewise, but also remove previous comment about
 711         overflow checking.
 712
 713 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 714
 715         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
 716         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
 717         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
 718         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
 719         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
 720         fields (i.e., add and move commas) so that they more closely
 721         match the MIPS ISA documentation opcode partitioning.
 722
 723 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 724
 725         * mips.igen (ADDI): Print immediate value.
 726         (BREAK): Print code.
 727         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
 728         (SLL): Print "nop" specially, and don't run the code
 729         that does the shift for the "nop" case.
 730
 731 2001-11-17  Fred Fish  <fnf@redhat.com>
 732
 733         * sim-main.h (float_operation): Move enum declaration outside
 734         of _sim_cpu struct declaration.
 735
 736 2001-04-12  Jim Blandy  <jimb@redhat.com>
 737
 738         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
 739         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
 740         set of the FCSR.
 741         * sim-main.h (COCIDX): Remove definition; this isn't supported by
 742         PENDING_FILL, and you can get the intended effect gracefully by
 743         calling PENDING_SCHED directly.
 744
 745 2001-02-23  Ben Elliston  <bje@redhat.com>
 746
 747         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
 748         already defined elsewhere.
 749
 750 2001-02-19  Ben Elliston  <bje@redhat.com>
 751
 752         * sim-main.h (sim_monitor): Return an int.
 753         * interp.c (sim_monitor): Add return values.
 754         (signal_exception): Handle error conditions from sim_monitor.
 755
 756 2001-02-08  Ben Elliston  <bje@redhat.com>
 757
 758         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
 759         (store_memory): Likewise, pass cia to sim_core_write*.
 760
 761 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
 762
 763         On advice from Chris G. Demetriou <cgd@sibyte.com>:
 764         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
 765
 766 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 767
 768         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
 769         * Makefile.in: Don't delete *.igen when cleaning directory.
 770
 771 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 772
 773         * m16.igen (break): Call SignalException not sim_engine_halt.
 774
 775 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 776
 777         From Jason Eckhardt:
 778         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
 779
 780 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 781
 782         * mips.igen (MxC1, DMxC1): Fix printf formatting.
 783
 784 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
 785
 786         * mips.igen (do_dmultx): Fix typo.
 787
 788 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 789
 790         * configure: Regenerated to track ../common/aclocal.m4 changes.
 791
 792 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 793
 794         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
 795
 796 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
 797
 798         * sim-main.h (GPR_CLEAR): Define macro.
 799
 800 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 801
 802         * interp.c (decode_coproc): Output long using %lx and not %s.
 803
 804 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
 805
 806         * interp.c (sim_open): Sort & extend dummy memory regions for
 807         --board=jmr3904 for eCos.
 808
 809 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
 810
 811         * configure: Regenerated.
 812
 813 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 814
 815         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
 816         calls, conditional on the simulator being in verbose mode.
 817
 818 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
 819
 820         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
 821         cache don't get ReservedInstruction traps.
 822
 823 1999-11-29  Mark Salter  <msalter@cygnus.com>
 824
 825         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
 826         to clear status bits in sdisr register. This is how the hardware works.
 827
 828         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
 829         being used by cygmon.
 830
 831 1999-11-11  Andrew Haley  <aph@cygnus.com>
 832
 833         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
 834         instructions.
 835
 836 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
 837
 838         * mips.igen (MULT): Correct previous mis-applied patch.
 839
 840 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
 841
 842         * mips.igen (delayslot32): Handle sequence like
 843         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
 844         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
 845         (MULT): Actually pass the third register...
 846
 847 1999-09-03  Mark Salter  <msalter@cygnus.com>
 848
 849         * interp.c (sim_open): Added more memory aliases for additional
 850         hardware being touched by cygmon on jmr3904 board.
 851
 852 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 853
 854         * configure: Regenerated to track ../common/aclocal.m4 changes.
 855
 856 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 857
 858         * interp.c (sim_store_register): Handle case where client - GDB -
 859         specifies that a 4 byte register is 8 bytes in size.
 860         (sim_fetch_register): Ditto.
 861
 862 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
 863
 864         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
 865         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
 866         (idt_monitor_base): Base address for IDT monitor traps.
 867         (pmon_monitor_base): Ditto for PMON.
 868         (lsipmon_monitor_base): Ditto for LSI PMON.
 869         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
 870         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
 871         (sim_firmware_command): New function.
 872         (mips_option_handler): Call it for OPTION_FIRMWARE.
 873         (sim_open): Allocate memory for idt_monitor region.  If "--board"
 874         option was given, add no monitor by default.  Add BREAK hooks only if
 875         monitors are also there.
 876
 877 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 878
 879         * interp.c (sim_monitor): Flush output before reading input.
 880
 881 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 882
 883         * tconfig.in (SIM_HANDLES_LMA): Always define.
 884
 885 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 886
 887         From Mark Salter <msalter@cygnus.com>:
 888         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
 889         (sim_open): Add setup for BSP board.
 890
 891 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 892
 893         * mips.igen (MULT, MULTU): Add syntax for two operand version.
 894         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
 895         them as unimplemented.
 896
 897 1999-05-08  Felix Lee  <flee@cygnus.com>
 898
 899         * configure: Regenerated to track ../common/aclocal.m4 changes.
 900
 901 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
 902
 903         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
 904
 905 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 906
 907         * configure.in: Any mips64vr5*-*-* target should have
 908         -DTARGET_ENABLE_FR=1.
 909         (default_endian): Any mips64vr*el-*-* target should default to
 910         LITTLE_ENDIAN.
 911         * configure: Re-generate.
 912
 913 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
 914
 915         * mips.igen (ldl): Extend from _16_, not 32.
 916
 917 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
 918
 919         * interp.c (sim_store_register): Force registers written to by GDB
 920         into an un-interpreted state.
 921
 922 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
 923
 924         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
 925         CPU, start periodic background I/O polls.
 926         (tx3904sio_poll): New function: periodic I/O poller.
 927
 928 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
 929
 930         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
 931
 932 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
 933
 934         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
 935         case statement.
 936
 937 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
 938
 939         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
 940         (load_word): Call SIM_CORE_SIGNAL hook on error.
 941         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
 942         starting.  For exception dispatching, pass PC instead of NULL_CIA.
 943         (decode_coproc): Use COP0_BADVADDR to store faulting address.
 944         * sim-main.h (COP0_BADVADDR): Define.
 945         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
 946         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
 947         (_sim_cpu): Add exc_* fields to store register value snapshots.
 948         * mips.igen (*): Replace memory-related SignalException* calls
 949         with references to SIM_CORE_SIGNAL hook.
 950
 951         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
 952         fix.
 953         * sim-main.c (*): Minor warning cleanups.
 954
 955 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
 956
 957         * m16.igen (DADDIU5): Correct type-o.
 958
 959 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
 960
 961         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
 962         variables.
 963
 964 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
 965
 966         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
 967         to include path.
 968         (interp.o): Add dependency on itable.h
 969         (oengine.c, gencode): Delete remaining references.
 970         (BUILT_SRC_FROM_GEN): Clean up.
 971
 972 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
 973
 974         * vr4run.c: New.
 975         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
 976         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
 977         tmp-run-hack) : New.
 978         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
 979         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
 980         Drop the "64" qualifier to get the HACK generator working.
 981         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
 982         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
 983         qualifier to get the hack generator working.
 984         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
 985         (DSLL): Use do_dsll.
 986         (DSLLV): Use do_dsllv.
 987         (DSRA): Use do_dsra.
 988         (DSRL): Use do_dsrl.
 989         (DSRLV): Use do_dsrlv.
 990         (BC1): Move *vr4100 to get the HACK generator working.
 991         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
 992         get the HACK generator working.
 993         (MACC) Rename to get the HACK generator working.
 994         (DMACC,MACCS,DMACCS): Add the 64.
 995
 996 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
 997
 998         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
 999         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1000
1001 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1002
1003     * mips/interp.c (DEBUG): Cleanups.
1004
1005 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1006
1007         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1008         (tx3904sio_tickle): fflush after a stdout character output.
1009
1010 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1011
1012         * interp.c (sim_close): Uninstall modules.
1013
1014 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1015
1016         * sim-main.h, interp.c (sim_monitor): Change to global
1017         function.
1018
1019 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1020
1021         * configure.in (vr4100): Only include vr4100 instructions in
1022         simulator.
1023         * configure: Re-generate.
1024         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1025
1026 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1027
1028         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1029         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1030         true alternative.
1031
1032         * configure.in (sim_default_gen, sim_use_gen): Replace with
1033         sim_gen.
1034         (--enable-sim-igen): Delete config option. Always using IGEN.
1035         * configure: Re-generate.
1036
1037         * Makefile.in (gencode): Kill, kill, kill.
1038         * gencode.c: Ditto.
1039
1040 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1041
1042         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1043         bit mips16 igen simulator.
1044         * configure: Re-generate.
1045
1046         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1047         as part of vr4100 ISA.
1048         * vr.igen: Mark all instructions as 64 bit only.
1049
1050 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1051
1052         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1053         Pacify GCC.
1054
1055 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1056
1057         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1058         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1059         * configure: Re-generate.
1060
1061         * m16.igen (BREAK): Define breakpoint instruction.
1062         (JALX32): Mark instruction as mips16 and not r3900.
1063         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1064
1065         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1066
1067 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1068
1069         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1070         insn as a debug breakpoint.
1071
1072         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1073         pending.slot_size.
1074         (PENDING_SCHED): Clean up trace statement.
1075         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1076         (PENDING_FILL): Delay write by only one cycle.
1077         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1078
1079         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1080         of pending writes.
1081         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1082         32 & 64.
1083         (pending_tick): Move incrementing of index to FOR statement.
1084         (pending_tick): Only update PENDING_OUT after a write has occured.
1085
1086         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1087         build simulator.
1088         * configure: Re-generate.
1089
1090         * interp.c (sim_engine_run OLD): Delete explicit call to
1091         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1092
1093 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1094
1095         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1096         interrupt level number to match changed SignalExceptionInterrupt
1097         macro.
1098
1099 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1100
1101         * interp.c: #include "itable.h" if WITH_IGEN.
1102         (get_insn_name): New function.
1103         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1104         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1105
1106 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1107
1108         * configure: Rebuilt to inhale new common/aclocal.m4.
1109
1110 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1111
1112         * dv-tx3904sio.c: Include sim-assert.h.
1113
1114 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1115
1116         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1117         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1118         Reorganize target-specific sim-hardware checks.
1119         * configure: rebuilt.
1120         * interp.c (sim_open): For tx39 target boards, set
1121         OPERATING_ENVIRONMENT, add tx3904sio devices.
1122         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1123         ROM executables.  Install dv-sockser into sim-modules list.
1124
1125         * dv-tx3904irc.c: Compiler warning clean-up.
1126         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1127         frequent hw-trace messages.
1128
1129 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1130
1131         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1132
1133 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1134
1135         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1136
1137         * vr.igen: New file.
1138         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1139         * mips.igen: Define vr4100 model. Include vr.igen.
1140 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1141
1142         * mips.igen (check_mf_hilo): Correct check.
1143
1144 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1145
1146         * sim-main.h (interrupt_event): Add prototype.
1147
1148         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1149         register_ptr, register_value.
1150         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1151
1152         * sim-main.h (tracefh): Make extern.
1153
1154 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1155
1156         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1157         Reduce unnecessarily high timer event frequency.
1158         * dv-tx3904cpu.c: Ditto for interrupt event.
1159
1160 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1161
1162         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1163         to allay warnings.
1164         (interrupt_event): Made non-static.
1165
1166         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1167         interchange of configuration values for external vs. internal
1168         clock dividers.
1169
1170 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1171
1172         * mips.igen (BREAK): Moved code to here for
1173         simulator-reserved break instructions.
1174         * gencode.c (build_instruction): Ditto.
1175         * interp.c (signal_exception): Code moved from here.  Non-
1176         reserved instructions now use exception vector, rather
1177         than halting sim.
1178         * sim-main.h: Moved magic constants to here.
1179
1180 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1181
1182         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1183         register upon non-zero interrupt event level, clear upon zero
1184         event value.
1185         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1186         by passing zero event value.
1187         (*_io_{read,write}_buffer): Endianness fixes.
1188         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1189         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1190
1191         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1192         serial I/O and timer module at base address 0xFFFF0000.
1193
1194 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1195
1196         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1197         and BigEndianCPU.
1198
1199 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1200
1201         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1202         parts.
1203         * configure: Update.
1204
1205 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1206
1207         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1208         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1209         * configure.in: Include tx3904tmr in hw_device list.
1210         * configure: Rebuilt.
1211         * interp.c (sim_open): Instantiate three timer instances.
1212         Fix address typo of tx3904irc instance.
1213
1214 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1215
1216         * interp.c (signal_exception): SystemCall exception now uses
1217         the exception vector.
1218
1219 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1220
1221         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1222         to allay warnings.
1223
1224 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1225
1226         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1227
1228 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1229
1230         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1231
1232         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1233         sim-main.h. Declare a struct hw_descriptor instead of struct
1234         hw_device_descriptor.
1235
1236 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1237
1238         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1239         right bits and then re-align left hand bytes to correct byte
1240         lanes.  Fix incorrect computation in do_store_left when loading
1241         bytes from second word.
1242
1243 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1244
1245         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1246         * interp.c (sim_open): Only create a device tree when HW is
1247         enabled.
1248
1249         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1250         * interp.c (signal_exception): Ditto.
1251
1252 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1253
1254         * gencode.c: Mark BEGEZALL as LIKELY.
1255
1256 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1257
1258         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1259         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1260
1261 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1262
1263         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1264         modules.  Recognize TX39 target with "mips*tx39" pattern.
1265         * configure: Rebuilt.
1266         * sim-main.h (*): Added many macros defining bits in
1267         TX39 control registers.
1268         (SignalInterrupt): Send actual PC instead of NULL.
1269         (SignalNMIReset): New exception type.
1270         * interp.c (board): New variable for future use to identify
1271         a particular board being simulated.
1272         (mips_option_handler,mips_options): Added "--board" option.
1273         (interrupt_event): Send actual PC.
1274         (sim_open): Make memory layout conditional on board setting.
1275         (signal_exception): Initial implementation of hardware interrupt
1276         handling.  Accept another break instruction variant for simulator
1277         exit.
1278         (decode_coproc): Implement RFE instruction for TX39.
1279         (mips.igen): Decode RFE instruction as such.
1280         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1281         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1282         bbegin to implement memory map.
1283         * dv-tx3904cpu.c: New file.
1284         * dv-tx3904irc.c: New file.
1285
1286 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1287
1288         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1289
1290 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1291
1292         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1293         with calls to check_div_hilo.
1294
1295 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1296
1297         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1298         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1299         Add special r3900 version of do_mult_hilo.
1300         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1301         with calls to check_mult_hilo.
1302         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1303         with calls to check_div_hilo.
1304
1305 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1306
1307         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1308         Document a replacement.
1309
1310 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1311
1312         * interp.c (sim_monitor): Make mon_printf work.
1313
1314 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1315
1316         * sim-main.h (INSN_NAME): New arg `cpu'.
1317
1318 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1319
1320         * configure: Regenerated to track ../common/aclocal.m4 changes.
1321
1322 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1323
1324         * configure: Regenerated to track ../common/aclocal.m4 changes.
1325         * config.in: Ditto.
1326
1327 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1328
1329         * acconfig.h: New file.
1330         * configure.in: Reverted change of Apr 24; use sinclude again.
1331
1332 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1333
1334         * configure: Regenerated to track ../common/aclocal.m4 changes.
1335         * config.in: Ditto.
1336
1337 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1338
1339         * configure.in: Don't call sinclude.
1340
1341 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1342
1343         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1344
1345 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1346
1347         * mips.igen (ERET): Implement.
1348
1349         * interp.c (decode_coproc): Return sign-extended EPC.
1350
1351         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1352
1353         * interp.c (signal_exception): Do not ignore Trap.
1354         (signal_exception): On TRAP, restart at exception address.
1355         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1356         (signal_exception): Update.
1357         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1358         so that TRAP instructions are caught.
1359
1360 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1361
1362         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1363         contains HI/LO access history.
1364         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1365         (HIACCESS, LOACCESS): Delete, replace with
1366         (HIHISTORY, LOHISTORY): New macros.
1367         (CHECKHILO): Delete all, moved to mips.igen
1368
1369         * gencode.c (build_instruction): Do not generate checks for
1370         correct HI/LO register usage.
1371
1372         * interp.c (old_engine_run): Delete checks for correct HI/LO
1373         register usage.
1374
1375         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1376         check_mf_cycles): New functions.
1377         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1378         do_divu, domultx, do_mult, do_multu): Use.
1379
1380         * tx.igen ("madd", "maddu"): Use.
1381
1382 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1383
1384         * mips.igen (DSRAV): Use function do_dsrav.
1385         (SRAV): Use new function do_srav.
1386
1387         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1388         (B): Sign extend 11 bit immediate.
1389         (EXT-B*): Shift 16 bit immediate left by 1.
1390         (ADDIU*): Don't sign extend immediate value.
1391
1392 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1393
1394         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1395
1396         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1397         functions.
1398
1399         * mips.igen (delayslot32, nullify_next_insn): New functions.
1400         (m16.igen): Always include.
1401         (do_*): Add more tracing.
1402
1403         * m16.igen (delayslot16): Add NIA argument, could be called by a
1404         32 bit MIPS16 instruction.
1405
1406         * interp.c (ifetch16): Move function from here.
1407         * sim-main.c (ifetch16): To here.
1408
1409         * sim-main.c (ifetch16, ifetch32): Update to match current
1410         implementations of LH, LW.
1411         (signal_exception): Don't print out incorrect hex value of illegal
1412         instruction.
1413
1414 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1415
1416         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1417         instruction.
1418
1419         * m16.igen: Implement MIPS16 instructions.
1420
1421         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1422         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1423         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1424         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1425         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1426         bodies of corresponding code from 32 bit insn to these.  Also used
1427         by MIPS16 versions of functions.
1428
1429         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1430         (IMEM16): Drop NR argument from macro.
1431
1432 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1433
1434         * Makefile.in (SIM_OBJS): Add sim-main.o.
1435
1436         * sim-main.h (address_translation, load_memory, store_memory,
1437         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1438         as INLINE_SIM_MAIN.
1439         (pr_addr, pr_uword64): Declare.
1440         (sim-main.c): Include when H_REVEALS_MODULE_P.
1441
1442         * interp.c (address_translation, load_memory, store_memory,
1443         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1444         from here.
1445         * sim-main.c: To here. Fix compilation problems.
1446
1447         * configure.in: Enable inlining.
1448         * configure: Re-config.
1449
1450 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1451
1452         * configure: Regenerated to track ../common/aclocal.m4 changes.
1453
1454 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1455
1456         * mips.igen: Include tx.igen.
1457         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1458         * tx.igen: New file, contains MADD and MADDU.
1459
1460         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1461         the hardwired constant `7'.
1462         (store_memory): Ditto.
1463         (LOADDRMASK): Move definition to sim-main.h.
1464
1465         mips.igen (MTC0): Enable for r3900.
1466         (ADDU): Add trace.
1467
1468         mips.igen (do_load_byte): Delete.
1469         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1470         do_store_right): New functions.
1471         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1472
1473         configure.in: Let the tx39 use igen again.
1474         configure: Update.
1475
1476 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1477
1478         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1479         not an address sized quantity.  Return zero for cache sizes.
1480
1481 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1482
1483         * mips.igen (r3900): r3900 does not support 64 bit integer
1484         operations.
1485
1486 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1487
1488         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1489         than igen one.
1490         * configure : Rebuild.
1491
1492 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1493
1494         * configure: Regenerated to track ../common/aclocal.m4 changes.
1495
1496 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1497
1498         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1499
1500 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1501
1502         * configure: Regenerated to track ../common/aclocal.m4 changes.
1503         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1504
1505 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1506
1507         * configure: Regenerated to track ../common/aclocal.m4 changes.
1508
1509 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1510
1511         * interp.c (Max, Min): Comment out functions. Not yet used.
1512
1513 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1514
1515         * configure: Regenerated to track ../common/aclocal.m4 changes.
1516
1517 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1518
1519         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1520         configurable settings for stand-alone simulator.
1521
1522         * configure.in: Added X11 search, just in case.
1523
1524         * configure: Regenerated.
1525
1526 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1527
1528         * interp.c (sim_write, sim_read, load_memory, store_memory):
1529         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1530
1531 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1532
1533         * sim-main.h (GETFCC): Return an unsigned value.
1534
1535 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1536
1537         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1538         (DADD): Result destination is RD not RT.
1539
1540 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1541
1542         * sim-main.h (HIACCESS, LOACCESS): Always define.
1543
1544         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1545
1546         * interp.c (sim_info): Delete.
1547
1548 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1549
1550         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1551         (mips_option_handler): New argument `cpu'.
1552         (sim_open): Update call to sim_add_option_table.
1553
1554 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1555
1556         * mips.igen (CxC1): Add tracing.
1557
1558 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1559
1560         * sim-main.h (Max, Min): Declare.
1561
1562         * interp.c (Max, Min): New functions.
1563
1564         * mips.igen (BC1): Add tracing.
1565
1566 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1567
1568         * interp.c Added memory map for stack in vr4100
1569
1570 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1571
1572         * interp.c (load_memory): Add missing "break"'s.
1573
1574 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1575
1576         * interp.c (sim_store_register, sim_fetch_register): Pass in
1577         length parameter.  Return -1.
1578
1579 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1580
1581         * interp.c: Added hardware init hook, fixed warnings.
1582
1583 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1584
1585         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1586
1587 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1588
1589         * interp.c (ifetch16): New function.
1590
1591         * sim-main.h (IMEM32): Rename IMEM.
1592         (IMEM16_IMMED): Define.
1593         (IMEM16): Define.
1594         (DELAY_SLOT): Update.
1595
1596         * m16run.c (sim_engine_run): New file.
1597
1598         * m16.igen: All instructions except LB.
1599         (LB): Call do_load_byte.
1600         * mips.igen (do_load_byte): New function.
1601         (LB): Call do_load_byte.
1602
1603         * mips.igen: Move spec for insn bit size and high bit from here.
1604         * Makefile.in (tmp-igen, tmp-m16): To here.
1605
1606         * m16.dc: New file, decode mips16 instructions.
1607
1608         * Makefile.in (SIM_NO_ALL): Define.
1609         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1610
1611 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1612
1613         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1614         point unit to 32 bit registers.
1615         * configure: Re-generate.
1616
1617 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1618
1619         * configure.in (sim_use_gen): Make IGEN the default simulator
1620         generator for generic 32 and 64 bit mips targets.
1621         * configure: Re-generate.
1622
1623 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1624
1625         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1626         bitsize.
1627
1628         * interp.c (sim_fetch_register, sim_store_register): Read/write
1629         FGR from correct location.
1630         (sim_open): Set size of FGR's according to
1631         WITH_TARGET_FLOATING_POINT_BITSIZE.
1632
1633         * sim-main.h (FGR): Store floating point registers in a separate
1634         array.
1635
1636 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1637
1638         * configure: Regenerated to track ../common/aclocal.m4 changes.
1639
1640 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1641
1642         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1643
1644         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1645
1646         * interp.c (pending_tick): New function.  Deliver pending writes.
1647
1648         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1649         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1650         it can handle mixed sized quantites and single bits.
1651
1652 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1653
1654         * interp.c (oengine.h): Do not include when building with IGEN.
1655         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1656         (sim_info): Ditto for PROCESSOR_64BIT.
1657         (sim_monitor): Replace ut_reg with unsigned_word.
1658         (*): Ditto for t_reg.
1659         (LOADDRMASK): Define.
1660         (sim_open): Remove defunct check that host FP is IEEE compliant,
1661         using software to emulate floating point.
1662         (value_fpr, ...): Always compile, was conditional on HASFPU.
1663
1664 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1665
1666         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1667         size.
1668
1669         * interp.c (SD, CPU): Define.
1670         (mips_option_handler): Set flags in each CPU.
1671         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1672         (sim_close): Do not clear STATE, deleted anyway.
1673         (sim_write, sim_read): Assume CPU zero's vm should be used for
1674         data transfers.
1675         (sim_create_inferior): Set the PC for all processors.
1676         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1677         argument.
1678         (mips16_entry): Pass correct nr of args to store_word, load_word.
1679         (ColdReset): Cold reset all cpu's.
1680         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1681         (sim_monitor, load_memory, store_memory, signal_exception): Use
1682         `CPU' instead of STATE_CPU.
1683
1684
1685         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1686         SD or CPU_.
1687
1688         * sim-main.h (signal_exception): Add sim_cpu arg.
1689         (SignalException*): Pass both SD and CPU to signal_exception.
1690         * interp.c (signal_exception): Update.
1691
1692         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1693         Ditto
1694         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1695         address_translation): Ditto
1696         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1697
1698 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1699
1700         * configure: Regenerated to track ../common/aclocal.m4 changes.
1701
1702 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1703
1704         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1705
1706         * mips.igen (model): Map processor names onto BFD name.
1707
1708         * sim-main.h (CPU_CIA): Delete.
1709         (SET_CIA, GET_CIA): Define
1710
1711 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1712
1713         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1714         regiser.
1715
1716         * configure.in (default_endian): Configure a big-endian simulator
1717         by default.
1718         * configure: Re-generate.
1719
1720 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1721
1722         * configure: Regenerated to track ../common/aclocal.m4 changes.
1723
1724 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1725
1726         * interp.c (sim_monitor): Handle Densan monitor outbyte
1727         and inbyte functions.
1728
1729 1997-12-29  Felix Lee  <flee@cygnus.com>
1730
1731         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1732
1733 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1734
1735         * Makefile.in (tmp-igen): Arrange for $zero to always be
1736         reset to zero after every instruction.
1737
1738 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1739
1740         * configure: Regenerated to track ../common/aclocal.m4 changes.
1741         * config.in: Ditto.
1742
1743 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1744
1745         * mips.igen (MSUB): Fix to work like MADD.
1746         * gencode.c (MSUB): Similarly.
1747
1748 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1749
1750         * configure: Regenerated to track ../common/aclocal.m4 changes.
1751
1752 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1753
1754         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1755
1756 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1757
1758         * sim-main.h (sim-fpu.h): Include.
1759
1760         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1761         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1762         using host independant sim_fpu module.
1763
1764 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1765
1766         * interp.c (signal_exception): Report internal errors with SIGABRT
1767         not SIGQUIT.
1768
1769         * sim-main.h (C0_CONFIG): New register.
1770         (signal.h): No longer include.
1771
1772         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1773
1774 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1775
1776         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1777
1778 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1779
1780         * mips.igen: Tag vr5000 instructions.
1781         (ANDI): Was missing mipsIV model, fix assembler syntax.
1782         (do_c_cond_fmt): New function.
1783         (C.cond.fmt): Handle mips I-III which do not support CC field
1784         separatly.
1785         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1786         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1787         in IV3.2 spec.
1788         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1789         vr5000 which saves LO in a GPR separatly.
1790
1791         * configure.in (enable-sim-igen): For vr5000, select vr5000
1792         specific instructions.
1793         * configure: Re-generate.
1794
1795 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1796
1797         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1798
1799         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1800         fmt_uninterpreted_64 bit cases to switch.  Convert to
1801         fmt_formatted,
1802
1803         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1804
1805         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1806         as specified in IV3.2 spec.
1807         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1808
1809 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1810
1811         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1812         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1813         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1814         PENDING_FILL versions of instructions.  Simplify.
1815         (X): New function.
1816         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1817         instructions.
1818         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1819         a signed value.
1820         (MTHI, MFHI): Disable code checking HI-LO.
1821
1822         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1823         global.
1824         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1825
1826 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1827
1828         * gencode.c (build_mips16_operands): Replace IPC with cia.
1829
1830         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1831         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1832         IPC to `cia'.
1833         (UndefinedResult): Replace function with macro/function
1834         combination.
1835         (sim_engine_run): Don't save PC in IPC.
1836
1837         * sim-main.h (IPC): Delete.
1838
1839
1840         * interp.c (signal_exception, store_word, load_word,
1841         address_translation, load_memory, store_memory, cache_op,
1842         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1843         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1844         current instruction address - cia - argument.
1845         (sim_read, sim_write): Call address_translation directly.
1846         (sim_engine_run): Rename variable vaddr to cia.
1847         (signal_exception): Pass cia to sim_monitor
1848
1849         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1850         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1851         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1852
1853         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1854         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1855         SIM_ASSERT.
1856
1857         * interp.c (signal_exception): Pass restart address to
1858         sim_engine_restart.
1859
1860         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1861         idecode.o): Add dependency.
1862
1863         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1864         Delete definitions
1865         (DELAY_SLOT): Update NIA not PC with branch address.
1866         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1867
1868         * mips.igen: Use CIA not PC in branch calculations.
1869         (illegal): Call SignalException.
1870         (BEQ, ADDIU): Fix assembler.
1871
1872 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1873
1874         * m16.igen (JALX): Was missing.
1875
1876         * configure.in (enable-sim-igen): New configuration option.
1877         * configure: Re-generate.
1878
1879         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1880
1881         * interp.c (load_memory, store_memory): Delete parameter RAW.
1882         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1883         bypassing {load,store}_memory.
1884
1885         * sim-main.h (ByteSwapMem): Delete definition.
1886
1887         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1888
1889         * interp.c (sim_do_command, sim_commands): Delete mips specific
1890         commands.  Handled by module sim-options.
1891
1892         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1893         (WITH_MODULO_MEMORY): Define.
1894
1895         * interp.c (sim_info): Delete code printing memory size.
1896
1897         * interp.c (mips_size): Nee sim_size, delete function.
1898         (power2): Delete.
1899         (monitor, monitor_base, monitor_size): Delete global variables.
1900         (sim_open, sim_close): Delete code creating monitor and other
1901         memory regions.  Use sim-memopts module, via sim_do_commandf, to
1902         manage memory regions.
1903         (load_memory, store_memory): Use sim-core for memory model.
1904
1905         * interp.c (address_translation): Delete all memory map code
1906         except line forcing 32 bit addresses.
1907
1908 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1909
1910         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
1911         trace options.
1912
1913         * interp.c (logfh, logfile): Delete globals.
1914         (sim_open, sim_close): Delete code opening & closing log file.
1915         (mips_option_handler): Delete -l and -n options.
1916         (OPTION mips_options): Ditto.
1917
1918         * interp.c (OPTION mips_options): Rename option trace to dinero.
1919         (mips_option_handler): Update.
1920
1921 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1922
1923         * interp.c (fetch_str): New function.
1924         (sim_monitor): Rewrite using sim_read & sim_write.
1925         (sim_open): Check magic number.
1926         (sim_open): Write monitor vectors into memory using sim_write.
1927         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1928         (sim_read, sim_write): Simplify - transfer data one byte at a
1929         time.
1930         (load_memory, store_memory): Clarify meaning of parameter RAW.
1931
1932         * sim-main.h (isHOST): Defete definition.
1933         (isTARGET): Mark as depreciated.
1934         (address_translation): Delete parameter HOST.
1935
1936         * interp.c (address_translation): Delete parameter HOST.
1937
1938 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1939
1940         * mips.igen:
1941
1942         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1943         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1944
1945 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1946
1947         * mips.igen: Add model filter field to records.
1948
1949 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1950
1951         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1952
1953         interp.c (sim_engine_run): Do not compile function sim_engine_run
1954         when WITH_IGEN == 1.
1955
1956         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1957         target architecture.
1958
1959         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1960         igen. Replace with configuration variables sim_igen_flags /
1961         sim_m16_flags.
1962
1963         * m16.igen: New file.  Copy mips16 insns here.
1964         * mips.igen: From here.
1965
1966 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1967
1968         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1969         to top.
1970         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1971
1972 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1973
1974         * gencode.c (build_instruction): Follow sim_write's lead in using
1975         BigEndianMem instead of !ByteSwapMem.
1976
1977 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1978
1979         * configure.in (sim_gen): Dependent on target, select type of
1980         generator.  Always select old style generator.
1981
1982         configure: Re-generate.
1983
1984         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1985         targets.
1986         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1987         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1988         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1989         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1990         SIM_@sim_gen@_*, set by autoconf.
1991
1992 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1993
1994         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1995
1996         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1997         CURRENT_FLOATING_POINT instead.
1998
1999         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2000         (address_translation): Raise exception InstructionFetch when
2001         translation fails and isINSTRUCTION.
2002
2003         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2004         sim_engine_run): Change type of of vaddr and paddr to
2005         address_word.
2006         (address_translation, prefetch, load_memory, store_memory,
2007         cache_op): Change type of vAddr and pAddr to address_word.
2008
2009         * gencode.c (build_instruction): Change type of vaddr and paddr to
2010         address_word.
2011
2012 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2013
2014         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2015         macro to obtain result of ALU op.
2016
2017 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2018
2019         * interp.c (sim_info): Call profile_print.
2020
2021 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2022
2023         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2024
2025         * sim-main.h (WITH_PROFILE): Do not define, defined in
2026         common/sim-config.h.  Use sim-profile module.
2027         (simPROFILE): Delete defintion.
2028
2029         * interp.c (PROFILE): Delete definition.
2030         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2031         (sim_close): Delete code writing profile histogram.
2032         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2033         Delete.
2034         (sim_engine_run): Delete code profiling the PC.
2035
2036 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2037
2038         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2039
2040         * interp.c (sim_monitor): Make register pointers of type
2041         unsigned_word*.
2042
2043         * sim-main.h: Make registers of type unsigned_word not
2044         signed_word.
2045
2046 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * interp.c (sync_operation): Rename from SyncOperation, make
2049         global, add SD argument.
2050         (prefetch): Rename from Prefetch, make global, add SD argument.
2051         (decode_coproc): Make global.
2052
2053         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2054
2055         * gencode.c (build_instruction): Generate DecodeCoproc not
2056         decode_coproc calls.
2057
2058         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2059         (SizeFGR): Move to sim-main.h
2060         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2061         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2062         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2063         sim-main.h.
2064         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2065         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2066         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2067         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2068         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2069         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2070
2071         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2072         exception.
2073         (sim-alu.h): Include.
2074         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2075         (sim_cia): Typedef to instruction_address.
2076
2077 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2078
2079         * Makefile.in (interp.o): Rename generated file engine.c to
2080         oengine.c.
2081
2082         * interp.c: Update.
2083
2084 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2085
2086         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2087
2088 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2089
2090         * gencode.c (build_instruction): For "FPSQRT", output correct
2091         number of arguments to Recip.
2092
2093 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2094
2095         * Makefile.in (interp.o): Depends on sim-main.h
2096
2097         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2098
2099         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2100         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2101         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2102         STATE, DSSTATE): Define
2103         (GPR, FGRIDX, ..): Define.
2104
2105         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2106         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2107         (GPR, FGRIDX, ...): Delete macros.
2108
2109         * interp.c: Update names to match defines from sim-main.h
2110
2111 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2112
2113         * interp.c (sim_monitor): Add SD argument.
2114         (sim_warning): Delete.  Replace calls with calls to
2115         sim_io_eprintf.
2116         (sim_error): Delete. Replace calls with sim_io_error.
2117         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2118         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2119         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2120         argument.
2121         (mips_size): Rename from sim_size. Add SD argument.
2122
2123         * interp.c (simulator): Delete global variable.
2124         (callback): Delete global variable.
2125         (mips_option_handler, sim_open, sim_write, sim_read,
2126         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2127         sim_size,sim_monitor): Use sim_io_* not callback->*.
2128         (sim_open): ZALLOC simulator struct.
2129         (PROFILE): Do not define.
2130
2131 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2132
2133         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2134         support.h with corresponding code.
2135
2136         * sim-main.h (word64, uword64), support.h: Move definition to
2137         sim-main.h.
2138         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2139
2140         * support.h: Delete
2141         * Makefile.in: Update dependencies
2142         * interp.c: Do not include.
2143
2144 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2145
2146         * interp.c (address_translation, load_memory, store_memory,
2147         cache_op): Rename to from AddressTranslation et.al., make global,
2148         add SD argument
2149
2150         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2151         CacheOp): Define.
2152
2153         * interp.c (SignalException): Rename to signal_exception, make
2154         global.
2155
2156         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2157
2158         * sim-main.h (SignalException, SignalExceptionInterrupt,
2159         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2160         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2161         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2162         Define.
2163
2164         * interp.c, support.h: Use.
2165
2166 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2167
2168         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2169         to value_fpr / store_fpr. Add SD argument.
2170         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2171         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2172
2173         * sim-main.h (ValueFPR, StoreFPR): Define.
2174
2175 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2176
2177         * interp.c (sim_engine_run): Check consistency between configure
2178         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2179         and HASFPU.
2180
2181         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2182         (mips_fpu): Configure WITH_FLOATING_POINT.
2183         (mips_endian): Configure WITH_TARGET_ENDIAN.
2184         * configure: Update.
2185
2186 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2187
2188         * configure: Regenerated to track ../common/aclocal.m4 changes.
2189
2190 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2191
2192         * configure: Regenerated.
2193
2194 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2195
2196         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2197
2198 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2199
2200         * gencode.c (print_igen_insn_models): Assume certain architectures
2201         include all mips* instructions.
2202         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2203         instruction.
2204
2205         * Makefile.in (tmp.igen): Add target. Generate igen input from
2206         gencode file.
2207
2208         * gencode.c (FEATURE_IGEN): Define.
2209         (main): Add --igen option.  Generate output in igen format.
2210         (process_instructions): Format output according to igen option.
2211         (print_igen_insn_format): New function.
2212         (print_igen_insn_models): New function.
2213         (process_instructions): Only issue warnings and ignore
2214         instructions when no FEATURE_IGEN.
2215
2216 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2217
2218         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2219         MIPS targets.
2220
2221 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2222
2223         * configure: Regenerated to track ../common/aclocal.m4 changes.
2224
2225 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2226
2227         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2228         SIM_RESERVED_BITS): Delete, moved to common.
2229         (SIM_EXTRA_CFLAGS): Update.
2230
2231 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2232
2233         * configure.in: Configure non-strict memory alignment.
2234         * configure: Regenerated to track ../common/aclocal.m4 changes.
2235
2236 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2237
2238         * configure: Regenerated to track ../common/aclocal.m4 changes.
2239
2240 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2241
2242         * gencode.c (SDBBP,DERET): Added (3900) insns.
2243         (RFE): Turn on for 3900.
2244         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2245         (dsstate): Made global.
2246         (SUBTARGET_R3900): Added.
2247         (CANCELDELAYSLOT): New.
2248         (SignalException): Ignore SystemCall rather than ignore and
2249         terminate.  Add DebugBreakPoint handling.
2250         (decode_coproc): New insns RFE, DERET; and new registers Debug
2251         and DEPC protected by SUBTARGET_R3900.
2252         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2253         bits explicitly.
2254         * Makefile.in,configure.in: Add mips subtarget option.
2255         * configure: Update.
2256
2257 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2258
2259         * gencode.c: Add r3900 (tx39).
2260
2261
2262 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2263
2264         * gencode.c (build_instruction): Don't need to subtract 4 for
2265         JALR, just 2.
2266
2267 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2268
2269         * interp.c: Correct some HASFPU problems.
2270
2271 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2272
2273         * configure: Regenerated to track ../common/aclocal.m4 changes.
2274
2275 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * interp.c (mips_options): Fix samples option short form, should
2278         be `x'.
2279
2280 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2281
2282         * interp.c (sim_info): Enable info code.  Was just returning.
2283
2284 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2285
2286         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2287         MFC0.
2288
2289 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2290
2291         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2292         constants.
2293         (build_instruction): Ditto for LL.
2294
2295 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2296
2297         * configure: Regenerated to track ../common/aclocal.m4 changes.
2298
2299 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2300
2301         * configure: Regenerated to track ../common/aclocal.m4 changes.
2302         * config.in: Ditto.
2303
2304 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2305
2306         * interp.c (sim_open): Add call to sim_analyze_program, update
2307         call to sim_config.
2308
2309 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2310
2311         * interp.c (sim_kill): Delete.
2312         (sim_create_inferior): Add ABFD argument. Set PC from same.
2313         (sim_load): Move code initializing trap handlers from here.
2314         (sim_open): To here.
2315         (sim_load): Delete, use sim-hload.c.
2316
2317         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2318
2319 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2320
2321         * configure: Regenerated to track ../common/aclocal.m4 changes.
2322         * config.in: Ditto.
2323
2324 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2325
2326         * interp.c (sim_open): Add ABFD argument.
2327         (sim_load): Move call to sim_config from here.
2328         (sim_open): To here.  Check return status.
2329
2330 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2331
2332         * gencode.c (build_instruction): Two arg MADD should
2333         not assign result to $0.
2334
2335 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2336
2337         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2338         * sim/mips/configure.in: Regenerate.
2339
2340 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2341
2342         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2343         signed8, unsigned8 et.al. types.
2344
2345         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2346         hosts when selecting subreg.
2347
2348 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2349
2350         * interp.c (sim_engine_run): Reset the ZERO register to zero
2351         regardless of FEATURE_WARN_ZERO.
2352         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2353
2354 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2355
2356         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2357         (SignalException): For BreakPoints ignore any mode bits and just
2358         save the PC.
2359         (SignalException): Always set the CAUSE register.
2360
2361 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2362
2363         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2364         exception has been taken.
2365
2366         * interp.c: Implement the ERET and mt/f sr instructions.
2367
2368 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2369
2370         * interp.c (SignalException): Don't bother restarting an
2371         interrupt.
2372
2373 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2374
2375         * interp.c (SignalException): Really take an interrupt.
2376         (interrupt_event): Only deliver interrupts when enabled.
2377
2378 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2379
2380         * interp.c (sim_info): Only print info when verbose.
2381         (sim_info) Use sim_io_printf for output.
2382
2383 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2384
2385         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2386         mips architectures.
2387
2388 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2389
2390         * interp.c (sim_do_command): Check for common commands if a
2391         simulator specific command fails.
2392
2393 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2394
2395         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2396         and simBE when DEBUG is defined.
2397
2398 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2399
2400         * interp.c (interrupt_event): New function.  Pass exception event
2401         onto exception handler.
2402
2403         * configure.in: Check for stdlib.h.
2404         * configure: Regenerate.
2405
2406         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2407         variable declaration.
2408         (build_instruction): Initialize memval1.
2409         (build_instruction): Add UNUSED attribute to byte, bigend,
2410         reverse.
2411         (build_operands): Ditto.
2412
2413         * interp.c: Fix GCC warnings.
2414         (sim_get_quit_code): Delete.
2415
2416         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2417         * Makefile.in: Ditto.
2418         * configure: Re-generate.
2419
2420         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2421
2422 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2423
2424         * interp.c (mips_option_handler): New function parse argumes using
2425         sim-options.
2426         (myname): Replace with STATE_MY_NAME.
2427         (sim_open): Delete check for host endianness - performed by
2428         sim_config.
2429         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2430         (sim_open): Move much of the initialization from here.
2431         (sim_load): To here.  After the image has been loaded and
2432         endianness set.
2433         (sim_open): Move ColdReset from here.
2434         (sim_create_inferior): To here.
2435         (sim_open): Make FP check less dependant on host endianness.
2436
2437         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2438         run.
2439         * interp.c (sim_set_callbacks): Delete.
2440
2441         * interp.c (membank, membank_base, membank_size): Replace with
2442         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2443         (sim_open): Remove call to callback->init. gdb/run do this.
2444
2445         * interp.c: Update
2446
2447         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2448
2449         * interp.c (big_endian_p): Delete, replaced by
2450         current_target_byte_order.
2451
2452 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2453
2454         * interp.c (host_read_long, host_read_word, host_swap_word,
2455         host_swap_long): Delete. Using common sim-endian.
2456         (sim_fetch_register, sim_store_register): Use H2T.
2457         (pipeline_ticks): Delete.  Handled by sim-events.
2458         (sim_info): Update.
2459         (sim_engine_run): Update.
2460
2461 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2462
2463         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2464         reason from here.
2465         (SignalException): To here. Signal using sim_engine_halt.
2466         (sim_stop_reason): Delete, moved to common.
2467
2468 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2469
2470         * interp.c (sim_open): Add callback argument.
2471         (sim_set_callbacks): Delete SIM_DESC argument.
2472         (sim_size): Ditto.
2473
2474 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2475
2476         * Makefile.in (SIM_OBJS): Add common modules.
2477
2478         * interp.c (sim_set_callbacks): Also set SD callback.
2479         (set_endianness, xfer_*, swap_*): Delete.
2480         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2481         Change to functions using sim-endian macros.
2482         (control_c, sim_stop): Delete, use common version.
2483         (simulate): Convert into.
2484         (sim_engine_run): This function.
2485         (sim_resume): Delete.
2486
2487         * interp.c (simulation): New variable - the simulator object.
2488         (sim_kind): Delete global - merged into simulation.
2489         (sim_load): Cleanup.  Move PC assignment from here.
2490         (sim_create_inferior): To here.
2491
2492         * sim-main.h: New file.
2493         * interp.c (sim-main.h): Include.
2494
2495 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2496
2497         * configure: Regenerated to track ../common/aclocal.m4 changes.
2498
2499 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2500
2501         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2502
2503 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2504
2505         * gencode.c (build_instruction): DIV instructions: check
2506         for division by zero and integer overflow before using
2507         host's division operation.
2508
2509 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2510
2511         * Makefile.in (SIM_OBJS): Add sim-load.o.
2512         * interp.c: #include bfd.h.
2513         (target_byte_order): Delete.
2514         (sim_kind, myname, big_endian_p): New static locals.
2515         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2516         after argument parsing.  Recognize -E arg, set endianness accordingly.
2517         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2518         load file into simulator.  Set PC from bfd.
2519         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2520         (set_endianness): Use big_endian_p instead of target_byte_order.
2521
2522 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * interp.c (sim_size): Delete prototype - conflicts with
2525         definition in remote-sim.h.  Correct definition.
2526
2527 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2528
2529         * configure: Regenerated to track ../common/aclocal.m4 changes.
2530         * config.in: Ditto.
2531
2532 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2533
2534         * interp.c (sim_open): New arg `kind'.
2535
2536         * configure: Regenerated to track ../common/aclocal.m4 changes.
2537
2538 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2539
2540         * configure: Regenerated to track ../common/aclocal.m4 changes.
2541
2542 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2543
2544         * interp.c (sim_open): Set optind to 0 before calling getopt.
2545
2546 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2547
2548         * configure: Regenerated to track ../common/aclocal.m4 changes.
2549
2550 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2551
2552         * interp.c : Replace uses of pr_addr with pr_uword64
2553         where the bit length is always 64 independent of SIM_ADDR.
2554         (pr_uword64) : added.
2555
2556 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2557
2558         * configure: Re-generate.
2559
2560 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2561
2562         * configure: Regenerate to track ../common/aclocal.m4 changes.
2563
2564 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2565
2566         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2567         in argv form.
2568         (other sim_*): New SIM_DESC argument.
2569
2570 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2571
2572         * interp.c: Fix printing of addresses for non-64-bit targets.
2573         (pr_addr): Add function to print address based on size.
2574
2575 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2576
2577         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2578
2579 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2580
2581         * gencode.c (build_mips16_operands): Correct computation of base
2582         address for extended PC relative instruction.
2583
2584 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2585
2586         * interp.c (mips16_entry): Add support for floating point cases.
2587         (SignalException): Pass floating point cases to mips16_entry.
2588         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2589         registers.
2590         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2591         or fmt_word.
2592         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2593         and then set the state to fmt_uninterpreted.
2594         (COP_SW): Temporarily set the state to fmt_word while calling
2595         ValueFPR.
2596
2597 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2598
2599         * gencode.c (build_instruction): The high order may be set in the
2600         comparison flags at any ISA level, not just ISA 4.
2601
2602 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2603
2604         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2605         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2606         * configure.in: sinclude ../common/aclocal.m4.
2607         * configure: Regenerated.
2608
2609 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2610
2611         * configure: Rebuild after change to aclocal.m4.
2612
2613 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2614
2615         * configure configure.in Makefile.in:  Update to new configure
2616         scheme which is more compatible with WinGDB builds.
2617         * configure.in:  Improve comment on how to run autoconf.
2618         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2619         * Makefile.in:  Use autoconf substitution to install common
2620         makefile fragment.
2621
2622 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2623
2624         * gencode.c (build_instruction): Use BigEndianCPU instead of
2625         ByteSwapMem.
2626
2627 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2628
2629         * interp.c (sim_monitor): Make output to stdout visible in
2630         wingdb's I/O log window.
2631
2632 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2633
2634         * support.h: Undo previous change to SIGTRAP
2635         and SIGQUIT values.
2636
2637 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2638
2639         * interp.c (store_word, load_word): New static functions.
2640         (mips16_entry): New static function.
2641         (SignalException): Look for mips16 entry and exit instructions.
2642         (simulate): Use the correct index when setting fpr_state after
2643         doing a pending move.
2644
2645 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2646
2647         * interp.c: Fix byte-swapping code throughout to work on
2648         both little- and big-endian hosts.
2649
2650 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2651
2652         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2653         with gdb/config/i386/xm-windows.h.
2654
2655 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2656
2657         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2658         that messes up arithmetic shifts.
2659
2660 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2661
2662         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2663         SIGTRAP and SIGQUIT for _WIN32.
2664
2665 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2666
2667         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2668         force a 64 bit multiplication.
2669         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2670         destination register is 0, since that is the default mips16 nop
2671         instruction.
2672
2673 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2674
2675         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2676         (build_endian_shift): Don't check proc64.
2677         (build_instruction): Always set memval to uword64.  Cast op2 to
2678         uword64 when shifting it left in memory instructions.  Always use
2679         the same code for stores--don't special case proc64.
2680
2681         * gencode.c (build_mips16_operands): Fix base PC value for PC
2682         relative operands.
2683         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2684         jal instruction.
2685         * interp.c (simJALDELAYSLOT): Define.
2686         (JALDELAYSLOT): Define.
2687         (INDELAYSLOT, INJALDELAYSLOT): Define.
2688         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2689
2690 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2691
2692         * interp.c (sim_open): add flush_cache as a PMON routine
2693         (sim_monitor): handle flush_cache by ignoring it
2694
2695 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2696
2697         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2698         BigEndianMem.
2699         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2700         (BigEndianMem): Rename to ByteSwapMem and change sense.
2701         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2702         BigEndianMem references to !ByteSwapMem.
2703         (set_endianness): New function, with prototype.
2704         (sim_open): Call set_endianness.
2705         (sim_info): Use simBE instead of BigEndianMem.
2706         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2707         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2708         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2709         ifdefs, keeping the prototype declaration.
2710         (swap_word): Rewrite correctly.
2711         (ColdReset): Delete references to CONFIG.  Delete endianness related
2712         code; moved to set_endianness.
2713
2714 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2715
2716         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2717         * interp.c (CHECKHILO): Define away.
2718         (simSIGINT): New macro.
2719         (membank_size): Increase from 1MB to 2MB.
2720         (control_c): New function.
2721         (sim_resume): Rename parameter signal to signal_number.  Add local
2722         variable prev.  Call signal before and after simulate.
2723         (sim_stop_reason): Add simSIGINT support.
2724         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2725         functions always.
2726         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2727         if logfh is NULL.
2728         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2729         a call to sim_warning.
2730
2731 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2732
2733         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2734         16 bit instructions.
2735
2736 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2737
2738         Add support for mips16 (16 bit MIPS implementation):
2739         * gencode.c (inst_type): Add mips16 instruction encoding types.
2740         (GETDATASIZEINSN): Define.
2741         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2742         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2743         mtlo.
2744         (MIPS16_DECODE): New table, for mips16 instructions.
2745         (bitmap_val): New static function.
2746         (struct mips16_op): Define.
2747         (mips16_op_table): New table, for mips16 operands.
2748         (build_mips16_operands): New static function.
2749         (process_instructions): If PC is odd, decode a mips16
2750         instruction.  Break out instruction handling into new
2751         build_instruction function.
2752         (build_instruction): New static function, broken out of
2753         process_instructions.  Check modifiers rather than flags for SHIFT
2754         bit count and m[ft]{hi,lo} direction.
2755         (usage): Pass program name to fprintf.
2756         (main): Remove unused variable this_option_optind.  Change
2757         ``*loptarg++'' to ``loptarg++''.
2758         (my_strtoul): Parenthesize && within ||.
2759         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2760         (simulate): If PC is odd, fetch a 16 bit instruction, and
2761         increment PC by 2 rather than 4.
2762         * configure.in: Add case for mips16*-*-*.
2763         * configure: Rebuild.
2764
2765 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2766
2767         * interp.c: Allow -t to enable tracing in standalone simulator.
2768         Fix garbage output in trace file and error messages.
2769
2770 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2771
2772         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2773         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2774         * configure.in: Simplify using macros in ../common/aclocal.m4.
2775         * configure: Regenerated.
2776         * tconfig.in: New file.
2777
2778 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2779
2780         * interp.c: Fix bugs in 64-bit port.
2781         Use ansi function declarations for msvc compiler.
2782         Initialize and test file pointer in trace code.
2783         Prevent duplicate definition of LAST_EMED_REGNUM.
2784
2785 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2786
2787         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2788
2789 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2790
2791         * interp.c (SignalException): Check for explicit terminating
2792         breakpoint value.
2793         * gencode.c: Pass instruction value through SignalException()
2794         calls for Trap, Breakpoint and Syscall.
2795
2796 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2797
2798         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2799         only used on those hosts that provide it.
2800         * configure.in: Add sqrt() to list of functions to be checked for.
2801         * config.in: Re-generated.
2802         * configure: Re-generated.
2803
2804 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2805
2806         * gencode.c (process_instructions): Call build_endian_shift when
2807         expanding STORE RIGHT, to fix swr.
2808         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2809         clear the high bits.
2810         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2811         Fix float to int conversions to produce signed values.
2812
2813 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2814
2815         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2816         (process_instructions): Correct handling of nor instruction.
2817         Correct shift count for 32 bit shift instructions. Correct sign
2818         extension for arithmetic shifts to not shift the number of bits in
2819         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2820         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2821         Fix madd.
2822         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2823         It's OK to have a mult follow a mult.  What's not OK is to have a
2824         mult follow an mfhi.
2825         (Convert): Comment out incorrect rounding code.
2826
2827 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2828
2829         * interp.c (sim_monitor): Improved monitor printf
2830         simulation. Tidied up simulator warnings, and added "--log" option
2831         for directing warning message output.
2832         * gencode.c: Use sim_warning() rather than WARNING macro.
2833
2834 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2835
2836         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2837         getopt1.o, rather than on gencode.c.  Link objects together.
2838         Don't link against -liberty.
2839         (gencode.o, getopt.o, getopt1.o): New targets.
2840         * gencode.c: Include <ctype.h> and "ansidecl.h".
2841         (AND): Undefine after including "ansidecl.h".
2842         (ULONG_MAX): Define if not defined.
2843         (OP_*): Don't define macros; now defined in opcode/mips.h.
2844         (main): Call my_strtoul rather than strtoul.
2845         (my_strtoul): New static function.
2846
2847 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2848
2849         * gencode.c (process_instructions):  Generate word64 and uword64
2850         instead of `long long' and `unsigned long long' data types.
2851         * interp.c:  #include sysdep.h to get signals, and define default
2852         for SIGBUS.
2853         * (Convert):  Work around for Visual-C++ compiler bug with type
2854         conversion.
2855         * support.h:  Make things compile under Visual-C++ by using
2856         __int64 instead of `long long'.  Change many refs to long long
2857         into word64/uword64 typedefs.
2858
2859 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2860
2861         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2862         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2863         (docdir): Removed.
2864         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2865         (AC_PROG_INSTALL): Added.
2866         (AC_PROG_CC): Moved to before configure.host call.
2867         * configure: Rebuilt.
2868
2869 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2870
2871         * configure.in: Define @SIMCONF@ depending on mips target.
2872         * configure: Rebuild.
2873         * Makefile.in (run): Add @SIMCONF@ to control simulator
2874         construction.
2875         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2876         * interp.c: Remove some debugging, provide more detailed error
2877         messages, update memory accesses to use LOADDRMASK.
2878
2879 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2880
2881         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2882         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2883         stamp-h.
2884         * configure: Rebuild.
2885         * config.in: New file, generated by autoheader.
2886         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2887         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2888         HAVE_ANINT and HAVE_AINT, as appropriate.
2889         * Makefile.in (run): Use @LIBS@ rather than -lm.
2890         (interp.o): Depend upon config.h.
2891         (Makefile): Just rebuild Makefile.
2892         (clean): Remove stamp-h.
2893         (mostlyclean): Make the same as clean, not as distclean.
2894         (config.h, stamp-h): New targets.
2895
2896 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2897
2898         * interp.c (ColdReset): Fix boolean test. Make all simulator
2899         globals static.
2900
2901 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2902
2903         * interp.c (xfer_direct_word, xfer_direct_long,
2904         swap_direct_word, swap_direct_long, xfer_big_word,
2905         xfer_big_long, xfer_little_word, xfer_little_long,
2906         swap_word,swap_long): Added.
2907         * interp.c (ColdReset): Provide function indirection to
2908         host<->simulated_target transfer routines.
2909         * interp.c (sim_store_register, sim_fetch_register): Updated to
2910         make use of indirected transfer routines.
2911
2912 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2913
2914         * gencode.c (process_instructions): Ensure FP ABS instruction
2915         recognised.
2916         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2917         system call support.
2918
2919 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2920
2921         * interp.c (sim_do_command): Complain if callback structure not
2922         initialised.
2923
2924 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2925
2926         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2927         support for Sun hosts.
2928         * Makefile.in (gencode): Ensure the host compiler and libraries
2929         used for cross-hosted build.
2930
2931 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2932
2933         * interp.c, gencode.c: Some more (TODO) tidying.
2934
2935 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2936
2937         * gencode.c, interp.c: Replaced explicit long long references with
2938         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2939         * support.h (SET64LO, SET64HI): Macros added.
2940
2941 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2942
2943         * configure: Regenerate with autoconf 2.7.
2944
2945 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2946
2947         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2948         * support.h: Remove superfluous "1" from #if.
2949         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2950
2951 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2952
2953         * interp.c (StoreFPR): Control UndefinedResult() call on
2954         WARN_RESULT manifest.
2955
2956 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2957
2958         * gencode.c: Tidied instruction decoding, and added FP instruction
2959         support.
2960
2961         * interp.c: Added dineroIII, and BSD profiling support. Also
2962         run-time FP handling.
2963
2964 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2965
2966         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2967         gencode.c, interp.c, support.h: created.