sim/mips/Makefile.in

   1 #    Makefile template for Configure for the MIPS simulator.
   2 #    Written by Cygnus Support.
   3
   4 ## COMMON_PRE_CONFIG_FRAG
   5
   6 srcdir=@srcdir@
   7 srcroot=$(srcdir)/../../
   8
   9 SIM_NO_OBJ =
  10
  11 # start-sanitize-sky
  12 SIM_SKY_OBJS = \
  13         sky-console.o \
  14         sky-device.o \
  15         sky-dma.o \
  16         sky-engine.o \
  17         sky-interact.o \
  18         sky-gpuif.o \
  19         sky-hardware.o \
  20         sky-indebug.o \
  21         sky-libvpe.o \
  22         sky-vif.o \
  23         sky-psio.o \
  24         sky-vu.o \
  25         sky-vudis.o \
  26         sky-gs.o \
  27         sky-gdb.o
  28 # end-sanitize-sky
  29
  30 SIM_IGEN_OBJ = \
  31         support.o \
  32         itable.o \
  33         semantics.o \
  34         idecode.o \
  35         icache.o \
  36         @mips_igen_engine@ \
  37         irun.o \
  38
  39 SIM_M16_OBJ = \
  40         m16_support.o \
  41         m16_semantics.o \
  42         m16_idecode.o \
  43         m16_icache.o \
  44         \
  45         m32_support.o \
  46         m32_semantics.o \
  47         m32_idecode.o \
  48         m32_icache.o \
  49         \
  50         itable.o \
  51         m16run.o \
  52
  53 MIPS_EXTRA_OBJS = @mips_extra_objs@
  54 MIPS_EXTRA_LIBS = @mips_extra_libs@
  55
  56 SIM_OBJS = \
  57         $(SIM_@sim_gen@_OBJ) \
  58         $(SIM_NEW_COMMON_OBJS) \
  59         $(MIPS_EXTRA_OBJS) \
  60         interp.o \
  61         sim-main.o \
  62         sim-hload.o \
  63         sim-engine.o \
  64         sim-stop.o \
  65         sim-resume.o \
  66         sim-reason.o \
  67
  68
  69 # List of flags to always pass to $(CC).
  70 SIM_SUBTARGET=@SIM_SUBTARGET@
  71
  72 # FIXME: Hack to find syscall.h?  Better support for syscall.h
  73 # is in progress.
  74 SIM_EXTRA_CFLAGS = \
  75         $(SIM_SUBTARGET) \
  76         -I$(srcdir)/../../newlib/libc/sys/idt
  77
  78 SIM_EXTRA_CLEAN = clean-extra
  79
  80 SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
  81
  82 SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
  83
  84 # List of main object files for `run'.
  85 SIM_RUN_OBJS = nrun.o
  86
  87
  88
  89 ## COMMON_POST_CONFIG_FRAG
  90
  91 SIM_NO_INTERP = oengine.c
  92 interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
  93
  94
  95 ../igen/igen:
  96         cd ../igen && $(MAKE)
  97
  98 IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
  99 IGEN_INSN=$(srcdir)/mips.igen
 100 IGEN_DC=$(srcdir)/mips.dc
 101 M16_DC=$(srcdir)/m16.dc
 102 IGEN_INCLUDE=\
 103         $(start-sanitize-r5900) \
 104         $(srcdir)/r5900.igen \
 105         $(end-sanitize-r5900) \
 106         $(start-sanitize-cygnus) \
 107         $(srcdir)/mdmx.igen \
 108         $(end-sanitize-cygnus) \
 109         $(srcdir)/m16.igen \
 110         $(srcdir)/tx.igen \
 111         $(srcdir)/vr.igen \
 112
 113 SIM_IGEN_ALL = tmp-igen
 114
 115 BUILT_SRC_FROM_IGEN = \
 116         icache.h \
 117         icache.c \
 118         idecode.h \
 119         idecode.c \
 120         semantics.h \
 121         semantics.c \
 122         model.h \
 123         model.c \
 124         support.h \
 125         support.c \
 126         engine.h \
 127         engine.c \
 128         irun.c \
 129
 130 # NB:   Since these can be built by either tmp-igen or tmp-m16
 131 #       they are explicitly marked as being dependant on the
 132 #       dependant on the selected generator.
 133 BUILT_SRC_FROM_GEN = \
 134         itable.h \
 135         itable.c \
 136
 137 $(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
 138
 139 $(BUILT_SRC_FROM_IGEN): tmp-igen
 140
 141 tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
 142         cd ../igen && $(MAKE)
 143         ../igen/igen \
 144                 $(IGEN_TRACE) \
 145                 -I $(srcdir) \
 146                 -Werror \
 147                 -Wnodiscard \
 148                 @sim_igen_flags@ \
 149                 -G gen-direct-access \
 150                 -G gen-zero-r0 \
 151                 -B 32 \
 152                 -H 31 \
 153                 -i $(IGEN_INSN) \
 154                 -o $(IGEN_DC) \
 155                 -x \
 156                 -n icache.h    -hc tmp-icache.h \
 157                 -n icache.c    -c  tmp-icache.c \
 158                 -n semantics.h -hs tmp-semantics.h \
 159                 -n semantics.c -s  tmp-semantics.c \
 160                 -n idecode.h   -hd tmp-idecode.h \
 161                 -n idecode.c   -d  tmp-idecode.c \
 162                 -n model.h     -hm tmp-model.h \
 163                 -n model.c     -m  tmp-model.c \
 164                 -n support.h   -hf tmp-support.h \
 165                 -n support.c   -f  tmp-support.c \
 166                 -n itable.h    -ht tmp-itable.h \
 167                 -n itable.c    -t  tmp-itable.c \
 168                 -n engine.h    -he tmp-engine.h \
 169                 -n engine.c    -e  tmp-engine.c \
 170                 -n irun.c      -r  tmp-irun.c
 171         $(srcdir)/../../move-if-change tmp-icache.h icache.h
 172         $(srcdir)/../../move-if-change tmp-icache.c icache.c
 173         $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
 174         $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
 175         $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
 176         $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
 177         $(srcdir)/../../move-if-change tmp-model.h model.h
 178         $(srcdir)/../../move-if-change tmp-model.c model.c
 179         $(srcdir)/../../move-if-change tmp-support.h support.h
 180         $(srcdir)/../../move-if-change tmp-support.c support.c
 181         $(srcdir)/../../move-if-change tmp-itable.h itable.h
 182         $(srcdir)/../../move-if-change tmp-itable.c itable.c
 183         $(srcdir)/../../move-if-change tmp-engine.h engine.h
 184         $(srcdir)/../../move-if-change tmp-engine.c engine.c
 185         $(srcdir)/../../move-if-change tmp-irun.c irun.c
 186         touch tmp-igen
 187
 188 semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
 189 engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
 190 support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
 191 idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
 192 itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
 193
 194
 195
 196 SIM_M16_ALL = tmp-m16
 197
 198 BUILT_SRC_FROM_M16 = \
 199         m16_icache.h \
 200         m16_icache.c \
 201         m16_idecode.h \
 202         m16_idecode.c \
 203         m16_semantics.h \
 204         m16_semantics.c \
 205         m16_model.h \
 206         m16_model.c \
 207         m16_support.h \
 208         m16_support.c \
 209         \
 210         m32_icache.h \
 211         m32_icache.c \
 212         m32_idecode.h \
 213         m32_idecode.c \
 214         m32_semantics.h \
 215         m32_semantics.c \
 216         m32_model.h \
 217         m32_model.c \
 218         m32_support.h \
 219         m32_support.c \
 220
 221 $(BUILT_SRC_FROM_M16): tmp-m16
 222
 223 tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
 224         cd ../igen && $(MAKE)
 225         ../igen/igen \
 226                 $(IGEN_TRACE) \
 227                 -I $(srcdir) \
 228                 -Werror \
 229                 -Wnodiscard \
 230                 @sim_m16_flags@ \
 231                 -G gen-direct-access \
 232                 -G gen-zero-r0 \
 233                 -B 16 \
 234                 -H 15 \
 235                 -i $(IGEN_INSN) \
 236                 -o $(M16_DC) \
 237                 -P m16_ \
 238                 -x \
 239                 -n m16_icache.h    -hc tmp-icache.h \
 240                 -n m16_icache.c    -c  tmp-icache.c \
 241                 -n m16_semantics.h -hs tmp-semantics.h \
 242                 -n m16_semantics.c -s  tmp-semantics.c \
 243                 -n m16_idecode.h   -hd tmp-idecode.h \
 244                 -n m16_idecode.c   -d  tmp-idecode.c \
 245                 -n m16_model.h     -hm tmp-model.h \
 246                 -n m16_model.c     -m  tmp-model.c \
 247                 -n m16_support.h   -hf tmp-support.h \
 248                 -n m16_support.c   -f  tmp-support.c \
 249                 #
 250         $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
 251         $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
 252         $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
 253         $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
 254         $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
 255         $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
 256         $(srcdir)/../../move-if-change tmp-model.h m16_model.h
 257         $(srcdir)/../../move-if-change tmp-model.c m16_model.c
 258         $(srcdir)/../../move-if-change tmp-support.h m16_support.h
 259         $(srcdir)/../../move-if-change tmp-support.c m16_support.c
 260         ../igen/igen \
 261                 $(IGEN_TRACE) \
 262                 -I $(srcdir) \
 263                 -Werror \
 264                 -Wnodiscard \
 265                 @sim_igen_flags@ \
 266                 -G gen-direct-access \
 267                 -G gen-zero-r0 \
 268                 -B 32 \
 269                 -H 31 \
 270                 -i $(IGEN_INSN) \
 271                 -o $(IGEN_DC) \
 272                 -P m32_ \
 273                 -x \
 274                 -n m32_icache.h    -hc tmp-icache.h \
 275                 -n m32_icache.c    -c  tmp-icache.c \
 276                 -n m32_semantics.h -hs tmp-semantics.h \
 277                 -n m32_semantics.c -s  tmp-semantics.c \
 278                 -n m32_idecode.h   -hd tmp-idecode.h \
 279                 -n m32_idecode.c   -d  tmp-idecode.c \
 280                 -n m32_model.h     -hm tmp-model.h \
 281                 -n m32_model.c     -m  tmp-model.c \
 282                 -n m32_support.h   -hf tmp-support.h \
 283                 -n m32_support.c   -f  tmp-support.c \
 284                 #
 285         $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
 286         $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
 287         $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
 288         $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
 289         $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
 290         $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
 291         $(srcdir)/../../move-if-change tmp-model.h m32_model.h
 292         $(srcdir)/../../move-if-change tmp-model.c m32_model.c
 293         $(srcdir)/../../move-if-change tmp-support.h m32_support.h
 294         $(srcdir)/../../move-if-change tmp-support.c m32_support.c
 295         ../igen/igen \
 296                 $(IGEN_TRACE) \
 297                 -I $(srcdir) \
 298                 -Werror \
 299                 -Wnodiscard \
 300                 -Wnowidth \
 301                 @sim_igen_flags@ @sim_m16_flags@ \
 302                 -G gen-direct-access \
 303                 -G gen-zero-r0 \
 304                 -i $(IGEN_INSN) \
 305                 -n itable.h    -ht tmp-itable.h \
 306                 -n itable.c    -t  tmp-itable.c \
 307                 #
 308         $(srcdir)/../../move-if-change tmp-itable.h itable.h
 309         $(srcdir)/../../move-if-change tmp-itable.c itable.c
 310         touch tmp-m16
 311
 312
 313 clean-extra:
 314         rm -f gencode oengine.c tmp.igen
 315         rm -f $(BUILT_SRC_FROM_GEN)
 316         rm -f $(BUILT_SRC_FROM_IGEN)
 317         rm -f $(BUILT_SRC_FROM_M16)
 318         rm -f tmp-*
 319         rm -f libhack.a hack
 320         rm -f m16* m32* itable*
 321
 322 # start-sanitize-vr4xxx
 323 # HACK ....
 324
 325 SIM_HACK_OBJ = \
 326         itable.o \
 327         m16vr4111_icache.o m16vr4111_idecode.o m16vr4111_model.o \
 328         m16vr4111_run.o m16vr4111_semantics.o m16vr4111_support.o \
 329         m16vr4121_icache.o m16vr4121_idecode.o m16vr4121_model.o \
 330         m16vr4121_run.o m16vr4121_semantics.o m16vr4121_support.o \
 331         m32mipsIV_engine.o m32mipsIV_icache.o m32mipsIV_idecode.o \
 332         m32mipsIV_model.o m32mipsIV_semantics.o m32mipsIV_support.o \
 333         m32vr4100_engine.o m32vr4100_icache.o m32vr4100_idecode.o \
 334         m32vr4100_model.o m32vr4100_semantics.o m32vr4100_support.o \
 335         m32vr4111_engine.o m32vr4111_icache.o m32vr4111_idecode.o \
 336         m32vr4111_model.o m32vr4111_semantics.o m32vr4111_support.o \
 337         m32vr4320_engine.o m32vr4320_icache.o m32vr4320_idecode.o \
 338         m32vr4320_model.o m32vr4320_semantics.o m32vr4320_support.o \
 339         m32vr4121_engine.o m32vr4121_icache.o m32vr4121_idecode.o \
 340         m32vr4121_model.o m32vr4121_semantics.o m32vr4121_support.o \
 341         vr4run.o
 342
 343 HACK_OBJS = \
 344         itable.o m16vr4111_icache.o m16vr4111_idecode.o \
 345         m16vr4111_model.o m16vr4111_run.o m16vr4111_semantics.o \
 346         m16vr4111_support.o m16vr4121_icache.o m16vr4121_idecode.o \
 347         m16vr4121_model.o m16vr4121_run.o m16vr4121_semantics.o \
 348         m16vr4121_support.o m32mipsIV_engine.o m32mipsIV_icache.o \
 349         m32mipsIV_idecode.o m32mipsIV_model.o m32mipsIV_semantics.o \
 350         m32mipsIV_support.o m32vr4100_engine.o m32vr4100_icache.o \
 351         m32vr4100_idecode.o m32vr4100_model.o m32vr4100_semantics.o \
 352         m32vr4100_support.o m32vr4111_engine.o m32vr4111_icache.o \
 353         m32vr4111_idecode.o m32vr4111_model.o m32vr4111_semantics.o \
 354         m32vr4111_support.o m32vr4320_engine.o m32vr4320_icache.o \
 355         m32vr4320_idecode.o m32vr4320_model.o m32vr4320_semantics.o \
 356         m32vr4320_support.o m32vr4121_engine.o m32vr4121_icache.o \
 357         m32vr4121_idecode.o m32vr4121_model.o m32vr4121_semantics.o \
 358         m32vr4121_support.o \
 359         $(SIM_NEW_COMMON_OBJS) \
 360         $(MIPS_EXTRA_OBJS) \
 361         interp.o \
 362         sim-main.o \
 363         sim-hload.o \
 364         sim-engine.o \
 365         sim-stop.o \
 366         sim-resume.o \
 367         sim-reason.o \
 368         callback.o syscall.o targ-map.o \
 369         vr4run.o
 370
 371 HACK_GEN_SRCS = \
 372         itable.c \
 373         m16vr4111_icache.c m16vr4111_idecode.c m16vr4111_model.c \
 374         m16vr4111_run.c m16vr4111_semantics.c m16vr4111_support.c \
 375         m16vr4121_icache.c m16vr4121_idecode.c m16vr4121_model.c \
 376         m16vr4121_run.c m16vr4121_semantics.c m16vr4121_support.c \
 377         m32mipsIV_engine.c m32mipsIV_icache.c m32mipsIV_idecode.c \
 378         m32mipsIV_model.c m32mipsIV_semantics.c m32mipsIV_support.c \
 379         m32vr4100_engine.c m32vr4100_icache.c m32vr4100_idecode.c \
 380         m32vr4100_model.c m32vr4100_semantics.c m32vr4100_support.c \
 381         m32vr4111_engine.c m32vr4111_icache.c m32vr4111_idecode.c \
 382         m32vr4111_model.c m32vr4111_semantics.c m32vr4111_support.c \
 383         m32vr4320_engine.c m32vr4320_icache.c m32vr4320_idecode.c \
 384         m32vr4320_model.c m32vr4320_semantics.c m32vr4320_support.c \
 385         m32vr4121_engine.c m32vr4121_icache.c m32vr4121_idecode.c \
 386         m32vr4121_model.c m32vr4121_semantics.c m32vr4121_support.c
 387
 388 $(HACK_GEN_SRCS): tmp-hack
 389
 390 libhack.a: $(HACK_OBJS)
 391         rm -f libhack.a
 392         $(AR) $(AR_FLAGS) libhack.a $(HACK_OBJS)
 393         $(RANLIB) libhack.a
 394 hack: tmp-hack $(SIM_RUN_OBJS) libhack.a
 395         $(CC) $(ALL_CFLAGS) -o hack$(EXEEXT) \
 396           $(SIM_RUN_OBJS) libhack.a $(EXTRA_LIBS)
 397
 398 tmp-hack: tmp-m16-hack tmp-m32-hack tmp-itable-hack tmp-run-hack targ-vals.h
 399 tmp-m32-hack: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
 400         for t in m32mipsIV:mipsIV m32vr4100:vr4100 m32vr4111:vr4100 m32vr4320:vr4320 m32vr4121:vr4121 ; \
 401         do \
 402           p=`echo $${t} | sed -e 's/:.*//'` ; \
 403           m=`echo $${t} | sed -e 's/.*://'` ; \
 404           ../igen/igen \
 405                 $(IGEN_TRACE) \
 406                 -I $(srcdir) \
 407                 -Werror \
 408                 -Wnodiscard \
 409                 -N 0 \
 410                 -M $${m} -F 32,64,f \
 411                 -G gen-direct-access \
 412                 -G gen-zero-r0 \
 413                 -B 32 \
 414                 -H 31 \
 415                 -i $(IGEN_INSN) \
 416                 -o $(IGEN_DC) \
 417                 -P $${p}_ \
 418                 -x \
 419                 -n $${p}_icache.h    -hc tmp-icache.h \
 420                 -n $${p}_icache.c    -c  tmp-icache.c \
 421                 -n $${p}_semantics.h -hs tmp-semantics.h \
 422                 -n $${p}_semantics.c -s  tmp-semantics.c \
 423                 -n $${p}_idecode.h   -hd tmp-idecode.h \
 424                 -n $${p}_idecode.c   -d  tmp-idecode.c \
 425                 -n $${p}_model.h     -hm tmp-model.h \
 426                 -n $${p}_model.c     -m  tmp-model.c \
 427                 -n $${p}_support.h   -hf tmp-support.h \
 428                 -n $${p}_support.c   -f  tmp-support.c \
 429                 -n $${p}_engine.h    -he tmp-engine.h \
 430                 -n $${p}_engine.c    -e  tmp-engine.c \
 431                 ; \
 432           $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
 433           $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
 434           $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
 435           $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
 436           $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
 437           $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
 438           $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
 439           $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
 440           $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
 441           $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
 442           $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
 443           $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
 444         done
 445         touch tmp-m32-hack
 446 tmp-m16-hack: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
 447         for t in m16vr4111:vr4100 m16vr4121:vr4121 ; \
 448         do \
 449           p=`echo $${t} | sed -e 's/:.*//'` ; \
 450           m=`echo $${t} | sed -e 's/.*://'` ; \
 451           ../igen/igen \
 452                 $(IGEN_TRACE) \
 453                 -I $(srcdir) \
 454                 -Werror \
 455                 -Wnodiscard \
 456                 -N 0 \
 457                 -M $${m},mips16 -F 16 \
 458                 -G gen-direct-access \
 459                 -G gen-zero-r0 \
 460                 -B 16 \
 461                 -H 15 \
 462                 -i $(IGEN_INSN) \
 463                 -o $(M16_DC) \
 464                 -P $${p}_ \
 465                 -x \
 466                 -n $${p}_icache.h    -hc tmp-icache.h \
 467                 -n $${p}_icache.c    -c  tmp-icache.c \
 468                 -n $${p}_semantics.h -hs tmp-semantics.h \
 469                 -n $${p}_semantics.c -s  tmp-semantics.c \
 470                 -n $${p}_idecode.h   -hd tmp-idecode.h \
 471                 -n $${p}_idecode.c   -d  tmp-idecode.c \
 472                 -n $${p}_model.h     -hm tmp-model.h \
 473                 -n $${p}_model.c     -m  tmp-model.c \
 474                 -n $${p}_support.h   -hf tmp-support.h \
 475                 -n $${p}_support.c   -f  tmp-support.c \
 476                 -n $${p}_engine.h    -he tmp-engine.h \
 477                 ; \
 478           $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
 479           $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
 480           $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
 481           $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
 482           $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
 483           $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
 484           $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
 485           $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
 486           $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
 487           $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
 488           $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
 489         done
 490         touch tmp-m16-hack
 491 tmp-itable-hack: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
 492         ../igen/igen \
 493                 $(IGEN_TRACE) \
 494                 -I $(srcdir) \
 495                 -Werror \
 496                 -Wnodiscard \
 497                 -Wnowidth \
 498                 -N 0 \
 499                 -F 32,64,f -M vr4100,vr4320,mipsIV,vr4121 -F 16 -M mips16 \
 500                 -G gen-direct-access \
 501                 -G gen-zero-r0 \
 502                 -i $(IGEN_INSN) \
 503                 -n itable.h    -ht tmp-itable.h \
 504                 -n itable.c    -t  tmp-itable.c \
 505                 #
 506         $(srcdir)/../../move-if-change tmp-itable.h itable.h
 507         $(srcdir)/../../move-if-change tmp-itable.c itable.c
 508         touch tmp-itable-hack
 509 tmp-run-hack: $(srcdir)/m16run.c
 510         for m in vr4111 vr4121 ; \
 511         do \
 512           sed <  $(srcdir)/m16run.c > tmp-run \
 513                 -e "s/^sim_/m16$${m}_/" \
 514                 -e "s/m16_/m16$${m}_/" \
 515                 -e "s/m32_/m32$${m}_/" ; \
 516           $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
 517         done
 518         touch tmp-run-hack
 519
 520 # end-sanitize-vr4xxx