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sim: mips: hoist "single" igen rules up to common builds
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1 dnl Copyright (C) 2005-2022 Free Software Foundation, Inc.
2 dnl
3 dnl This program is free software; you can redistribute it and/or modify
4 dnl it under the terms of the GNU General Public License as published by
5 dnl the Free Software Foundation; either version 3 of the License, or
6 dnl (at your option) any later version.
7 dnl
8 dnl This program is distributed in the hope that it will be useful,
9 dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
10 dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 dnl GNU General Public License for more details.
12 dnl
13 dnl You should have received a copy of the GNU General Public License
14 dnl along with this program. If not, see <http://www.gnu.org/licenses/>.
15 dnl
16 dnl NB: This file is included in sim/configure, so keep settings namespaced.
17
18 dnl DEPRECATED
19 dnl
20 dnl Instead of defining a `subtarget' macro, code should be checking the value
21 dnl of {STATE,CPU}_ARCHITECTURE to identify the architecture dnl in question.
22 AC_MSG_CHECKING([mips subtarget])
23 SIM_MIPS_SUBTARGET=
24 AS_CASE([${target}],
25 [mips64vr*-*-*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
26 [mips*tx39*], [SIM_MIPS_SUBTARGET="-DSUBTARGET_R3900=1"],
27 [mips*-sde-elf*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
28 [mips*-mti-elf*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
29 [mipsisa32*-*-*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
30 [mipsisa64*-*-*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"])
31 AC_MSG_RESULT([${SIM_MIPS_SUBTARGET:-none}])
32 AC_SUBST(SIM_MIPS_SUBTARGET)
33
34 dnl Select the bitsize of the target.
35 AC_MSG_CHECKING([mips bitsize])
36 SIM_MIPS_BITSIZE=64
37 AS_CASE([${target}],
38 [mips*-sde-elf*], [SIM_MIPS_BITSIZE=64],
39 [mips*-mti-elf*], [SIM_MIPS_BITSIZE=64],
40 [mips64*-*-*], [SIM_MIPS_BITSIZE=64],
41 [mips16*-*-*], [SIM_MIPS_BITSIZE=64],
42 [mipsisa32*-*-*], [SIM_MIPS_BITSIZE=32],
43 [mipsisa64*-*-*], [SIM_MIPS_BITSIZE=64],
44 [mips*-*-*], [SIM_MIPS_BITSIZE=32])
45 AC_MSG_RESULT([$SIM_MIPS_BITSIZE])
46 AC_SUBST(SIM_MIPS_BITSIZE)
47
48 dnl Select the floating hardware support of the target.
49 AC_MSG_CHECKING([mips fpu bitsize])
50 SIM_MIPS_FPU_BITSIZE=64
51 AS_CASE([${target}],
52 [mips*tx39*], [SIM_MIPS_FPU_BITSIZE=32],
53 [mips*-sde-elf*], [SIM_MIPS_FPU_BITSIZE=64],
54 [mips*-mti-elf*], [SIM_MIPS_FPU_BITSIZE=64],
55 [mipsisa32*-*-*], [SIM_MIPS_FPU_BITSIZE=64],
56 [mipsisa64*-*-*], [SIM_MIPS_FPU_BITSIZE=64],
57 [mips*-*-*], [SIM_MIPS_FPU_BITSIZE=32])
58 AC_MSG_RESULT([$SIM_MIPS_FPU_BITSIZE])
59 AC_SUBST(SIM_MIPS_FPU_BITSIZE)
60
61 dnl Select the IGEN architecture.
62 SIM_MIPS_GEN=SINGLE
63 sim_mips_single_machine="-M mipsIV"
64 sim_mips_m16_machine="-M mips16,mipsIII"
65 sim_mips_single_filter="32,64,f"
66 sim_mips_m16_filter="16"
67 AS_CASE([${target}],
68 [mips*tx39*], [dnl
69 SIM_MIPS_GEN=SINGLE
70 sim_mips_single_filter="32,f"
71 sim_mips_single_machine="-M r3900"],
72 [mips64vr41*], [dnl
73 SIM_MIPS_GEN=M16
74 sim_mips_single_machine="-M vr4100"
75 sim_mips_m16_machine="-M vr4100"],
76 [mips64*], [dnl
77 SIM_MIPS_GEN=MULTI
78 sim_mips_multi_configs="\
79 vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
80 vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
81 vr5000:mipsIV:32,64,f:mips4300,mips5000,mips8000\
82 vr5400:mipsIV,vr5400:32,64,f:mips5400\
83 vr5500:mipsIV,vr5500:32,64,f:mips5500"
84 sim_mips_multi_default=mips5000],
85 [mips*-sde-elf* | mips*-mti-elf*], [dnl
86 SIM_MIPS_GEN=MULTI
87 sim_mips_multi_configs="\
88 micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
89 mipsisa64r2:mips64r2,mips16,mips16e,mdmx,dsp,dsp2,mips3d,smartmips:32,64,f:mipsisa32r2,mipsisa64r2,mipsisa32r5,mipsisa64r5\
90 mipsisa64r6:mips64r6:32,64,f:mipsisa32r6,mipsisa64r6"
91 sim_mips_multi_default=mipsisa64r2],
92 [mips16*], [dnl
93 SIM_MIPS_GEN=M16],
94 [mipsisa32r2*], [dnl
95 SIM_MIPS_GEN=MULTI
96 sim_mips_multi_configs="\
97 micromips:micromips32,micromipsdsp:32,f:mips_micromips\
98 mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
99 sim_mips_multi_default=mipsisa32r2],
100 [mipsisa32r6*], [dnl
101 SIM_MIPS_GEN=SINGLE
102 sim_mips_single_machine="-M mips32r6"
103 sim_mips_single_filter="32,f"],
104 [mipsisa32*], [dnl
105 SIM_MIPS_GEN=M16
106 sim_mips_single_machine="-M mips32,mips16,mips16e,smartmips"
107 sim_mips_m16_machine="-M mips16,mips16e,mips32"
108 sim_mips_single_filter="32,f"],
109 [mipsisa64r2*], [dnl
110 SIM_MIPS_GEN=M16
111 sim_mips_single_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
112 sim_mips_m16_machine="-M mips16,mips16e,mips64r2"],
113 [mipsisa64r6*], [dnl
114 SIM_MIPS_GEN=SINGLE
115 sim_mips_single_machine="-M mips64r6"],
116 [mipsisa64sb1*], [dnl
117 SIM_MIPS_GEN=SINGLE
118 sim_mips_single_machine="-M mips64,mips3d,sb1"],
119 [mipsisa64*], [dnl
120 SIM_MIPS_GEN=M16
121 sim_mips_single_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
122 sim_mips_m16_machine="-M mips16,mips16e,mips64"],
123 [mips*lsi*], [dnl
124 SIM_MIPS_GEN=M16
125 sim_mips_single_machine="-M mipsIII,mips16"
126 sim_mips_m16_machine="-M mips16,mipsIII"
127 sim_mips_single_filter="32,f"],
128 [mips*], [dnl
129 SIM_MIPS_GEN=SINGLE
130 sim_mips_single_filter="32,f"])
131
132 dnl The MULTI generator can combine several simulation engines into one.
133 dnl executable. A configuration which uses the MULTI should set two
134 dnl variables: ${sim_mips_multi_configs} and ${sim_mips_multi_default}.
135 dnl
136 dnl ${sim_mips_multi_configs} is the list of engines to build. Each
137 dnl space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
138 dnl where:
139 dnl
140 dnl - NAME is a C-compatible prefix for the engine,
141 dnl - MACHINE is a -M argument,
142 dnl - FILTER is a -F argument, and
143 dnl - BFDMACHS is a comma-separated list of bfd machines that the
144 dnl simulator can run.
145 dnl
146 dnl Each entry will have a separate simulation engine whose prefix is
147 dnl m32<NAME>. If the machine list includes "mips16", there will also
148 dnl be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
149 dnl generated using the same machine list as the 32-bit version,
150 dnl but the filter will be "16" instead of FILTER.
151 dnl
152 dnl The simulator compares the bfd mach against BFDMACHS to decide
153 dnl which engine to use. Entries in BFDMACHS should be bfd_mach
154 dnl values with "bfd_mach_" removed. ${sim_mips_multi_default} says
155 dnl which entry should be the default.
156 SIM_MIPS_IGEN_ITABLE_FLAGS=
157 SIM_MIPS_MULTI_SRC=
158 SIM_MIPS_MULTI_OBJ=
159 SIM_MIPS_MULTI_IGEN_CONFIGS=
160 AS_VAR_IF([SIM_MIPS_GEN], ["MULTI"], [dnl
161 dnl Verify the AS_CASE logic above is setup correctly.
162 AS_IF([test -z "${sim_mips_multi_configs}" || test -z "${sim_mips_multi_default}"], [dnl
163 AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)])
164
165 dnl Start in a known state.
166 AS_MKDIR_P([mips])
167 rm -f mips/multi-include.h mips/multi-run.c
168 sim_mips_seen_default=no
169
170 cat << __EOF__ > mips/multi-run.c
171 /* Main entry point for MULTI simulators.
172 Copyright (C) 2003-2022 Free Software Foundation, Inc.
173
174 This program is free software; you can redistribute it and/or modify
175 it under the terms of the GNU General Public License as published by
176 the Free Software Foundation; either version 3 of the License, or
177 (at your option) any later version.
178
179 This program is distributed in the hope that it will be useful,
180 but WITHOUT ANY WARRANTY; without even the implied warranty of
181 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
182 GNU General Public License for more details.
183
184 You should have received a copy of the GNU General Public License
185 along with this program. If not, see <http://www.gnu.org/licenses/>.
186
187 --
188
189 This file was generated by sim/mips/configure. */
190
191 #include "sim-main.h"
192 #include "multi-include.h"
193 #include "elf-bfd.h"
194 #include "elfxx-mips.h"
195 #include "elf/mips.h"
196
197 #define SD sd
198 #define CPU cpu
199
200 void
201 sim_engine_run (SIM_DESC sd,
202 int next_cpu_nr,
203 int nr_cpus,
204 int signal) /* ignore */
205 {
206 int mach;
207
208 if (STATE_ARCHITECTURE (sd) == NULL)
209 mach = bfd_mach_${sim_mips_multi_default};
210 else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
211 & EF_MIPS_ARCH_ASE_MICROMIPS)
212 mach = bfd_mach_mips_micromips;
213 else
214 {
215 mach = _bfd_elf_mips_mach (elf_elfheader (STATE_PROG_BFD (sd))->e_flags);
216 if (!mach)
217 mach = STATE_ARCHITECTURE (SD)->mach;
218 }
219
220 switch (mach)
221 {
222 __EOF__
223
224 for fc in ${sim_mips_multi_configs}; do
225
226 dnl Split up the entry. ${c} contains the first three elements.
227 dnl Note: outer sqaure brackets are m4 quotes.
228 c=`echo ${fc} | sed ['s/:[^:]*$//']`
229 bfdmachs=`echo ${fc} | sed 's/.*://'`
230 name=`echo ${c} | sed 's/:.*//'`
231 machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
232 filter=`echo ${c} | sed 's/.*://'`
233
234 dnl Build the following lists:
235 dnl
236 dnl SIM_MIPS_IGEN_ITABLE_FLAGS: all -M and -F flags used by the simulator
237 dnl SIM_MIPS_MULTI_SRC: all makefile-generated source files
238 dnl SIM_MIPS_MULTI_OBJ: the objects for ${SIM_MIPS_MULTI_SRC}
239 dnl SIM_MIPS_MULTI_IGEN_CONFIGS: igen configuration strings.
240 dnl
241 dnl Each entry in ${SIM_MIPS_MULTI_IGEN_CONFIGS} is a prefix (m32
242 dnl or m16) followed by the NAME, MACHINE and FILTER part of
243 dnl the ${sim_mips_multi_configs} entry.
244 AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F ${filter} -M ${machine}"])
245
246 dnl Check whether special handling is needed.
247 AS_CASE([${c}],
248 [*:*mips16*:*], [dnl
249 dnl Run igen twice, once for normal mode and once for mips16.
250 ws="m32 m16"
251
252 dnl The top-level function for the mips16 simulator is
253 dnl in a file m16${name}_run.c, generated by the
254 dnl tmp-run-multi Makefile rule.
255 AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" m16${name}_run.c"])
256 AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" m16${name}_run.o"])
257 AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F 16"])
258 ],
259 [*:*micromips32*:*], [dnl
260 dnl Run igen thrice, once for micromips32, once for micromips16,
261 dnl and once for m32.
262 ws="micromips_m32 micromips16 micromips32"
263
264 dnl The top-level function for the micromips simulator is
265 dnl in a file micromips${name}_run.c, generated by the
266 dnl tmp-run-multi Makefile rule.
267 AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" micromips${name}_run.c"])
268 AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" micromips${name}_run.o"])
269 AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F 16,32"])
270 ],
271 [*:*micromips64*:*], [dnl
272 dnl Run igen thrice, once for micromips64, once for micromips16,
273 dnl and once for m64.
274 ws="micromips_m64 micromips16 micromips64"
275
276 dnl The top-level function for the micromips simulator is
277 dnl in a file micromips${name}_run.c, generated by the
278 dnl tmp-run-multi Makefile rule.
279 AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" micromips${name}_run.c"])
280 AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" micromips${name}_run.o"])
281 AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F 16,32,64"])
282 ],
283 [ws=m32])
284
285 dnl Now add the list of igen-generated files to ${SIM_MIPS_MULTI_SRC}
286 dnl and ${SIM_MIPS_MULTI_OBJ}.
287 for w in ${ws}; do
288 for base in engine icache idecode model semantics support; do
289 AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" ${w}${name}_${base}.c"])
290 AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" ${w}${name}_${base}.h"])
291 AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" ${w}${name}_${base}.o"])
292 done
293 AS_VAR_APPEND([SIM_MIPS_MULTI_IGEN_CONFIGS], [" ${w}${c}"])
294 done
295
296 dnl Add an include for the engine.h file. This file declares the
297 dnl top-level foo_engine_run() function.
298 echo "#include \"${w}${name}_engine.h\"" >> mips/multi-include.h
299
300 dnl Add case statements for this engine to sim_engine_run().
301 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
302 echo " case bfd_mach_${mach}:" >> mips/multi-run.c
303 AS_VAR_IF([mach], ["${sim_mips_multi_default}"], [dnl
304 echo " default:" >> mips/multi-run.c
305 sim_mips_seen_default=yes
306 ])
307 done
308 echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
309 >> mips/multi-run.c
310 echo " break;" >> mips/multi-run.c
311 done
312
313 dnl Check whether we added a 'default:' label.
314 AS_VAR_IF([sim_mips_seen_default], [no], [dnl
315 AC_MSG_ERROR(Error in configure.ac: \${sim_mips_multi_configs} doesn't have an entry for \${sim_mips_multi_default})])
316
317 cat << __EOF__ >> mips/multi-run.c
318 }
319 }
320 __EOF__
321 ], [dnl
322 dnl For clean-extra target.
323 SIM_MIPS_MULTI_SRC=doesnt-exist.c
324 SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_SINGLE_FLAGS)'
325 AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])])
326 ])
327 SIM_MIPS_SINGLE_FLAGS="-F ${sim_mips_single_filter} ${sim_mips_single_machine}"
328 SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"
329 AC_SUBST(SIM_MIPS_SINGLE_FLAGS)
330 AC_SUBST(SIM_MIPS_M16_FLAGS)
331 AC_SUBST(SIM_MIPS_GEN)
332 AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS)
333 AC_SUBST(SIM_MIPS_MULTI_IGEN_CONFIGS)
334 AC_SUBST(SIM_MIPS_MULTI_SRC)
335 AC_SUBST(SIM_MIPS_MULTI_OBJ)
336 AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])