sim/rx/gdb-if.c

   1 /* gdb-if.c -- sim interface to GDB.
   2
   3 Copyright (C) 2008-2021 Free Software Foundation, Inc.
   4 Contributed by Red Hat, Inc.
   5
   6 This file is part of the GNU simulators.
   7
   8 This program is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 3 of the License, or
  11 (at your option) any later version.
  12
  13 This program is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "config.h"
  22 #include <stdio.h>
  23 #include <assert.h>
  24 #include <signal.h>
  25 #include <string.h>
  26 #include <ctype.h>
  27 #include <stdlib.h>
  28
  29 #include "ansidecl.h"
  30 #include "libiberty.h"
  31 #include "sim/callback.h"
  32 #include "sim/sim.h"
  33 #include "gdb/signals.h"
  34 #include "gdb/sim-rx.h"
  35
  36 #include "cpu.h"
  37 #include "mem.h"
  38 #include "load.h"
  39 #include "syscalls.h"
  40 #include "err.h"
  41 #include "trace.h"
  42
  43 /* Ideally, we'd wrap up all the minisim's data structures in an
  44    object and pass that around.  However, neither GDB nor run needs
  45    that ability.
  46
  47    So we just have one instance, that lives in global variables, and
  48    each time we open it, we re-initialize it.  */
  49 struct sim_state
  50 {
  51   const char *message;
  52 };
  53
  54 static struct sim_state the_minisim = {
  55   "This is the sole rx minisim instance.  See libsim.a's global variables."
  56 };
  57
  58 static int rx_sim_is_open;
  59
  60 SIM_DESC
  61 sim_open (SIM_OPEN_KIND kind,
  62           struct host_callback_struct *callback,
  63           struct bfd *abfd, char * const *argv)
  64 {
  65   if (rx_sim_is_open)
  66     fprintf (stderr, "rx minisim: re-opened sim\n");
  67
  68   /* The 'run' interface doesn't use this function, so we don't care
  69      about KIND; it's always SIM_OPEN_DEBUG.  */
  70   if (kind != SIM_OPEN_DEBUG)
  71     fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
  72              kind);
  73
  74   set_callbacks (callback);
  75
  76   /* We don't expect any command-line arguments.  */
  77
  78   init_mem ();
  79   init_regs ();
  80   execution_error_init_debugger ();
  81
  82   sim_disasm_init (abfd);
  83   rx_sim_is_open = 1;
  84   return &the_minisim;
  85 }
  86
  87 static void
  88 check_desc (SIM_DESC sd)
  89 {
  90   if (sd != &the_minisim)
  91     fprintf (stderr, "rx minisim: desc != &the_minisim\n");
  92 }
  93
  94 void
  95 sim_close (SIM_DESC sd, int quitting)
  96 {
  97   check_desc (sd);
  98
  99   /* Not much to do.  At least free up our memory.  */
 100   init_mem ();
 101
 102   rx_sim_is_open = 0;
 103 }
 104
 105 static bfd *
 106 open_objfile (const char *filename)
 107 {
 108   bfd *prog = bfd_openr (filename, 0);
 109
 110   if (!prog)
 111     {
 112       fprintf (stderr, "Can't read %s\n", filename);
 113       return 0;
 114     }
 115
 116   if (!bfd_check_format (prog, bfd_object))
 117     {
 118       fprintf (stderr, "%s not a rx program\n", filename);
 119       return 0;
 120     }
 121
 122   return prog;
 123 }
 124
 125 static struct swap_list
 126 {
 127   bfd_vma start, end;
 128   struct swap_list *next;
 129 } *swap_list = NULL;
 130
 131 static void
 132 free_swap_list (void)
 133 {
 134   while (swap_list)
 135     {
 136       struct swap_list *next = swap_list->next;
 137       free (swap_list);
 138       swap_list = next;
 139     }
 140 }
 141
 142 /* When running in big endian mode, we must do an additional
 143    byte swap of memory areas used to hold instructions.  See
 144    the comment preceding rx_load in load.c to see why this is
 145    so.
 146
 147    Construct a list of memory areas that must be byte swapped.
 148    This list will be consulted when either reading or writing
 149    memory.  */
 150
 151 static void
 152 build_swap_list (struct bfd *abfd)
 153 {
 154   asection *s;
 155   free_swap_list ();
 156
 157   /* Nothing to do when in little endian mode.  */
 158   if (!rx_big_endian)
 159     return;
 160
 161   for (s = abfd->sections; s; s = s->next)
 162     {
 163       if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
 164         {
 165           struct swap_list *sl;
 166           bfd_size_type size;
 167
 168           size = bfd_section_size (s);
 169           if (size <= 0)
 170             continue;
 171
 172           sl = malloc (sizeof (struct swap_list));
 173           assert (sl != NULL);
 174           sl->next = swap_list;
 175           sl->start = bfd_section_lma (s);
 176           sl->end = sl->start + size;
 177           swap_list = sl;
 178         }
 179     }
 180 }
 181
 182 static int
 183 addr_in_swap_list (bfd_vma addr)
 184 {
 185   struct swap_list *s;
 186
 187   for (s = swap_list; s; s = s->next)
 188     {
 189       if (s->start <= addr && addr < s->end)
 190         return 1;
 191     }
 192   return 0;
 193 }
 194
 195 SIM_RC
 196 sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty)
 197 {
 198   check_desc (sd);
 199
 200   if (!abfd)
 201     abfd = open_objfile (prog);
 202   if (!abfd)
 203     return SIM_RC_FAIL;
 204
 205   rx_load (abfd, get_callbacks ());
 206   build_swap_list (abfd);
 207
 208   return SIM_RC_OK;
 209 }
 210
 211 SIM_RC
 212 sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
 213                      char * const *argv, char * const *env)
 214 {
 215   check_desc (sd);
 216
 217   if (abfd)
 218     {
 219       rx_load (abfd, NULL);
 220       build_swap_list (abfd);
 221     }
 222
 223   return SIM_RC_OK;
 224 }
 225
 226 int
 227 sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
 228 {
 229   int i;
 230
 231   check_desc (sd);
 232
 233   if (mem == 0)
 234     return 0;
 235
 236   execution_error_clear_last_error ();
 237
 238   for (i = 0; i < length; i++)
 239     {
 240       bfd_vma addr = mem + i;
 241       int do_swap = addr_in_swap_list (addr);
 242       buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
 243
 244       if (execution_error_get_last_error () != SIM_ERR_NONE)
 245         return i;
 246     }
 247
 248   return length;
 249 }
 250
 251 int
 252 sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
 253 {
 254   int i;
 255
 256   check_desc (sd);
 257
 258   execution_error_clear_last_error ();
 259
 260   for (i = 0; i < length; i++)
 261     {
 262       bfd_vma addr = mem + i;
 263       int do_swap = addr_in_swap_list (addr);
 264       mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
 265
 266       if (execution_error_get_last_error () != SIM_ERR_NONE)
 267         return i;
 268     }
 269
 270   return length;
 271 }
 272
 273 /* Read the LENGTH bytes at BUF as an little-endian value.  */
 274 static DI
 275 get_le (unsigned char *buf, int length)
 276 {
 277   DI acc = 0;
 278   while (--length >= 0)
 279     acc = (acc << 8) + buf[length];
 280
 281   return acc;
 282 }
 283
 284 /* Read the LENGTH bytes at BUF as a big-endian value.  */
 285 static DI
 286 get_be (unsigned char *buf, int length)
 287 {
 288   DI acc = 0;
 289   while (length-- > 0)
 290     acc = (acc << 8) + *buf++;
 291
 292   return acc;
 293 }
 294
 295 /* Store VAL as a little-endian value in the LENGTH bytes at BUF.  */
 296 static void
 297 put_le (unsigned char *buf, int length, DI val)
 298 {
 299   int i;
 300
 301   for (i = 0; i < length; i++)
 302     {
 303       buf[i] = val & 0xff;
 304       val >>= 8;
 305     }
 306 }
 307
 308 /* Store VAL as a big-endian value in the LENGTH bytes at BUF.  */
 309 static void
 310 put_be (unsigned char *buf, int length, DI val)
 311 {
 312   int i;
 313
 314   for (i = length-1; i >= 0; i--)
 315     {
 316       buf[i] = val & 0xff;
 317       val >>= 8;
 318     }
 319 }
 320
 321
 322 static int
 323 check_regno (enum sim_rx_regnum regno)
 324 {
 325   return 0 <= regno && regno < sim_rx_num_regs;
 326 }
 327
 328 static size_t
 329 reg_size (enum sim_rx_regnum regno)
 330 {
 331   size_t size;
 332
 333   switch (regno)
 334     {
 335     case sim_rx_r0_regnum:
 336       size = sizeof (regs.r[0]);
 337       break;
 338     case sim_rx_r1_regnum:
 339       size = sizeof (regs.r[1]);
 340       break;
 341     case sim_rx_r2_regnum:
 342       size = sizeof (regs.r[2]);
 343       break;
 344     case sim_rx_r3_regnum:
 345       size = sizeof (regs.r[3]);
 346       break;
 347     case sim_rx_r4_regnum:
 348       size = sizeof (regs.r[4]);
 349       break;
 350     case sim_rx_r5_regnum:
 351       size = sizeof (regs.r[5]);
 352       break;
 353     case sim_rx_r6_regnum:
 354       size = sizeof (regs.r[6]);
 355       break;
 356     case sim_rx_r7_regnum:
 357       size = sizeof (regs.r[7]);
 358       break;
 359     case sim_rx_r8_regnum:
 360       size = sizeof (regs.r[8]);
 361       break;
 362     case sim_rx_r9_regnum:
 363       size = sizeof (regs.r[9]);
 364       break;
 365     case sim_rx_r10_regnum:
 366       size = sizeof (regs.r[10]);
 367       break;
 368     case sim_rx_r11_regnum:
 369       size = sizeof (regs.r[11]);
 370       break;
 371     case sim_rx_r12_regnum:
 372       size = sizeof (regs.r[12]);
 373       break;
 374     case sim_rx_r13_regnum:
 375       size = sizeof (regs.r[13]);
 376       break;
 377     case sim_rx_r14_regnum:
 378       size = sizeof (regs.r[14]);
 379       break;
 380     case sim_rx_r15_regnum:
 381       size = sizeof (regs.r[15]);
 382       break;
 383     case sim_rx_isp_regnum:
 384       size = sizeof (regs.r_isp);
 385       break;
 386     case sim_rx_usp_regnum:
 387       size = sizeof (regs.r_usp);
 388       break;
 389     case sim_rx_intb_regnum:
 390       size = sizeof (regs.r_intb);
 391       break;
 392     case sim_rx_pc_regnum:
 393       size = sizeof (regs.r_pc);
 394       break;
 395     case sim_rx_ps_regnum:
 396       size = sizeof (regs.r_psw);
 397       break;
 398     case sim_rx_bpc_regnum:
 399       size = sizeof (regs.r_bpc);
 400       break;
 401     case sim_rx_bpsw_regnum:
 402       size = sizeof (regs.r_bpsw);
 403       break;
 404     case sim_rx_fintv_regnum:
 405       size = sizeof (regs.r_fintv);
 406       break;
 407     case sim_rx_fpsw_regnum:
 408       size = sizeof (regs.r_fpsw);
 409       break;
 410     case sim_rx_acc_regnum:
 411       size = sizeof (regs.r_acc);
 412       break;
 413     default:
 414       size = 0;
 415       break;
 416     }
 417   return size;
 418 }
 419
 420 int
 421 sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
 422 {
 423   size_t size;
 424   DI val;
 425
 426   check_desc (sd);
 427
 428   if (!check_regno (regno))
 429     return 0;
 430
 431   size = reg_size (regno);
 432
 433   if (length != size)
 434     return 0;
 435
 436   switch (regno)
 437     {
 438     case sim_rx_r0_regnum:
 439       val = get_reg (0);
 440       break;
 441     case sim_rx_r1_regnum:
 442       val = get_reg (1);
 443       break;
 444     case sim_rx_r2_regnum:
 445       val = get_reg (2);
 446       break;
 447     case sim_rx_r3_regnum:
 448       val = get_reg (3);
 449       break;
 450     case sim_rx_r4_regnum:
 451       val = get_reg (4);
 452       break;
 453     case sim_rx_r5_regnum:
 454       val = get_reg (5);
 455       break;
 456     case sim_rx_r6_regnum:
 457       val = get_reg (6);
 458       break;
 459     case sim_rx_r7_regnum:
 460       val = get_reg (7);
 461       break;
 462     case sim_rx_r8_regnum:
 463       val = get_reg (8);
 464       break;
 465     case sim_rx_r9_regnum:
 466       val = get_reg (9);
 467       break;
 468     case sim_rx_r10_regnum:
 469       val = get_reg (10);
 470       break;
 471     case sim_rx_r11_regnum:
 472       val = get_reg (11);
 473       break;
 474     case sim_rx_r12_regnum:
 475       val = get_reg (12);
 476       break;
 477     case sim_rx_r13_regnum:
 478       val = get_reg (13);
 479       break;
 480     case sim_rx_r14_regnum:
 481       val = get_reg (14);
 482       break;
 483     case sim_rx_r15_regnum:
 484       val = get_reg (15);
 485       break;
 486     case sim_rx_isp_regnum:
 487       val = get_reg (isp);
 488       break;
 489     case sim_rx_usp_regnum:
 490       val = get_reg (usp);
 491       break;
 492     case sim_rx_intb_regnum:
 493       val = get_reg (intb);
 494       break;
 495     case sim_rx_pc_regnum:
 496       val = get_reg (pc);
 497       break;
 498     case sim_rx_ps_regnum:
 499       val = get_reg (psw);
 500       break;
 501     case sim_rx_bpc_regnum:
 502       val = get_reg (bpc);
 503       break;
 504     case sim_rx_bpsw_regnum:
 505       val = get_reg (bpsw);
 506       break;
 507     case sim_rx_fintv_regnum:
 508       val = get_reg (fintv);
 509       break;
 510     case sim_rx_fpsw_regnum:
 511       val = get_reg (fpsw);
 512       break;
 513     case sim_rx_acc_regnum:
 514       val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
 515       break;
 516     default:
 517       fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
 518                regno);
 519       return -1;
 520     }
 521
 522   if (rx_big_endian)
 523     put_be (buf, length, val);
 524   else
 525     put_le (buf, length, val);
 526
 527   return size;
 528 }
 529
 530 int
 531 sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
 532 {
 533   size_t size;
 534   DI val;
 535
 536   check_desc (sd);
 537
 538   if (!check_regno (regno))
 539     return -1;
 540
 541   size = reg_size (regno);
 542
 543   if (length != size)
 544     return -1;
 545
 546   if (rx_big_endian)
 547     val = get_be (buf, length);
 548   else
 549     val = get_le (buf, length);
 550
 551   switch (regno)
 552     {
 553     case sim_rx_r0_regnum:
 554       put_reg (0, val);
 555       break;
 556     case sim_rx_r1_regnum:
 557       put_reg (1, val);
 558       break;
 559     case sim_rx_r2_regnum:
 560       put_reg (2, val);
 561       break;
 562     case sim_rx_r3_regnum:
 563       put_reg (3, val);
 564       break;
 565     case sim_rx_r4_regnum:
 566       put_reg (4, val);
 567       break;
 568     case sim_rx_r5_regnum:
 569       put_reg (5, val);
 570       break;
 571     case sim_rx_r6_regnum:
 572       put_reg (6, val);
 573       break;
 574     case sim_rx_r7_regnum:
 575       put_reg (7, val);
 576       break;
 577     case sim_rx_r8_regnum:
 578       put_reg (8, val);
 579       break;
 580     case sim_rx_r9_regnum:
 581       put_reg (9, val);
 582       break;
 583     case sim_rx_r10_regnum:
 584       put_reg (10, val);
 585       break;
 586     case sim_rx_r11_regnum:
 587       put_reg (11, val);
 588       break;
 589     case sim_rx_r12_regnum:
 590       put_reg (12, val);
 591       break;
 592     case sim_rx_r13_regnum:
 593       put_reg (13, val);
 594       break;
 595     case sim_rx_r14_regnum:
 596       put_reg (14, val);
 597       break;
 598     case sim_rx_r15_regnum:
 599       put_reg (15, val);
 600       break;
 601     case sim_rx_isp_regnum:
 602       put_reg (isp, val);
 603       break;
 604     case sim_rx_usp_regnum:
 605       put_reg (usp, val);
 606       break;
 607     case sim_rx_intb_regnum:
 608       put_reg (intb, val);
 609       break;
 610     case sim_rx_pc_regnum:
 611       put_reg (pc, val);
 612       break;
 613     case sim_rx_ps_regnum:
 614       put_reg (psw, val);
 615       break;
 616     case sim_rx_bpc_regnum:
 617       put_reg (bpc, val);
 618       break;
 619     case sim_rx_bpsw_regnum:
 620       put_reg (bpsw, val);
 621       break;
 622     case sim_rx_fintv_regnum:
 623       put_reg (fintv, val);
 624       break;
 625     case sim_rx_fpsw_regnum:
 626       put_reg (fpsw, val);
 627       break;
 628     case sim_rx_acc_regnum:
 629       put_reg (acclo, val & 0xffffffff);
 630       put_reg (acchi, (val >> 32) & 0xffffffff);
 631       break;
 632     default:
 633       fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
 634                regno);
 635       return 0;
 636     }
 637
 638   return size;
 639 }
 640
 641 void
 642 sim_info (SIM_DESC sd, int verbose)
 643 {
 644   check_desc (sd);
 645
 646   printf ("The rx minisim doesn't collect any statistics.\n");
 647 }
 648
 649 static volatile int stop;
 650 static enum sim_stop reason;
 651 int siggnal;
 652
 653
 654 /* Given a signal number used by the RX bsp (that is, newlib),
 655    return a target signal number used by GDB.  */
 656 static int
 657 rx_signal_to_gdb_signal (int rx)
 658 {
 659   switch (rx)
 660     {
 661     case 4:
 662       return GDB_SIGNAL_ILL;
 663
 664     case 5:
 665       return GDB_SIGNAL_TRAP;
 666
 667     case 10:
 668       return GDB_SIGNAL_BUS;
 669
 670     case 11:
 671       return GDB_SIGNAL_SEGV;
 672
 673     case 24:
 674       return GDB_SIGNAL_XCPU;
 675
 676     case 2:
 677       return GDB_SIGNAL_INT;
 678
 679     case 8:
 680       return GDB_SIGNAL_FPE;
 681
 682     case 6:
 683       return GDB_SIGNAL_ABRT;
 684     }
 685
 686   return 0;
 687 }
 688
 689
 690 /* Take a step return code RC and set up the variables consulted by
 691    sim_stop_reason appropriately.  */
 692 static void
 693 handle_step (int rc)
 694 {
 695   if (execution_error_get_last_error () != SIM_ERR_NONE)
 696     {
 697       reason = sim_stopped;
 698       siggnal = GDB_SIGNAL_SEGV;
 699     }
 700   if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
 701     {
 702       reason = sim_stopped;
 703       siggnal = GDB_SIGNAL_TRAP;
 704     }
 705   else if (RX_STOPPED (rc))
 706     {
 707       reason = sim_stopped;
 708       siggnal = rx_signal_to_gdb_signal (RX_STOP_SIG (rc));
 709     }
 710   else
 711     {
 712       assert (RX_EXITED (rc));
 713       reason = sim_exited;
 714       siggnal = RX_EXIT_STATUS (rc);
 715     }
 716 }
 717
 718
 719 void
 720 sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
 721 {
 722   int rc;
 723
 724   check_desc (sd);
 725
 726   if (sig_to_deliver != 0)
 727     {
 728       fprintf (stderr,
 729                "Warning: the rx minisim does not implement "
 730                "signal delivery yet.\n" "Resuming with no signal.\n");
 731     }
 732
 733   execution_error_clear_last_error ();
 734
 735   if (step)
 736     {
 737       rc = setjmp (decode_jmp_buf);
 738       if (rc == 0)
 739         rc = decode_opcode ();
 740       handle_step (rc);
 741     }
 742   else
 743     {
 744       /* We don't clear 'stop' here, because then we would miss
 745          interrupts that arrived on the way here.  Instead, we clear
 746          the flag in sim_stop_reason, after GDB has disabled the
 747          interrupt signal handler.  */
 748       for (;;)
 749         {
 750           if (stop)
 751             {
 752               stop = 0;
 753               reason = sim_stopped;
 754               siggnal = GDB_SIGNAL_INT;
 755               break;
 756             }
 757
 758           rc = setjmp (decode_jmp_buf);
 759           if (rc == 0)
 760             rc = decode_opcode ();
 761
 762           if (execution_error_get_last_error () != SIM_ERR_NONE)
 763             {
 764               reason = sim_stopped;
 765               siggnal = GDB_SIGNAL_SEGV;
 766               break;
 767             }
 768
 769           if (!RX_STEPPED (rc))
 770             {
 771               handle_step (rc);
 772               break;
 773             }
 774         }
 775     }
 776 }
 777
 778 int
 779 sim_stop (SIM_DESC sd)
 780 {
 781   stop = 1;
 782
 783   return 1;
 784 }
 785
 786 void
 787 sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
 788 {
 789   check_desc (sd);
 790
 791   *reason_p = reason;
 792   *sigrc_p = siggnal;
 793 }
 794
 795 void
 796 sim_do_command (SIM_DESC sd, const char *cmd)
 797 {
 798   const char *arg;
 799   char **argv = buildargv (cmd);
 800
 801   check_desc (sd);
 802
 803   cmd = arg = "";
 804   if (argv != NULL)
 805     {
 806       if (argv[0] != NULL)
 807         cmd = argv[0];
 808       if (argv[1] != NULL)
 809         arg = argv[1];
 810     }
 811
 812   if (strcmp (cmd, "trace") == 0)
 813     {
 814       if (strcmp (arg, "on") == 0)
 815         trace = 1;
 816       else if (strcmp (arg, "off") == 0)
 817         trace = 0;
 818       else
 819         printf ("The 'sim trace' command expects 'on' or 'off' "
 820                 "as an argument.\n");
 821     }
 822   else if (strcmp (cmd, "verbose") == 0)
 823     {
 824       if (strcmp (arg, "on") == 0)
 825         verbose = 1;
 826       else if (strcmp (arg, "noisy") == 0)
 827         verbose = 2;
 828       else if (strcmp (arg, "off") == 0)
 829         verbose = 0;
 830       else
 831         printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'"
 832                 " as an argument.\n");
 833     }
 834   else
 835     printf ("The 'sim' command expects either 'trace' or 'verbose'"
 836             " as a subcommand.\n");
 837
 838   freeargv (argv);
 839 }
 840
 841 char **
 842 sim_complete_command (SIM_DESC sd, const char *text, const char *word)
 843 {
 844   return NULL;
 845 }
 846
 847 /* Stub this out for now.  */
 848
 849 char *
 850 sim_memory_map (SIM_DESC sd)
 851 {
 852   return NULL;
 853 }