sim/sh64/sh64-sim.h

   1 /* collection of junk waiting time to sort out
   2    Copyright (C) 2000-2013 Free Software Foundation, Inc.
   3    Contributed by Red Hat, Inc.
   4
   5 This file is part of the GNU Simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef SH64_SIM_H
  21 #define SH64_SIM_H
  22
  23 #define GETTWI GETTSI
  24 #define SETTWI SETTSI
  25 \f
  26
  27 enum {
  28   ISM_COMPACT, ISM_MEDIA
  29 };
  30
  31 /* Hardware/device support.  */
  32 extern device sh5_devices;
  33
  34 /* FIXME: Temporary, until device support ready.  */
  35 struct _device { int foo; };
  36
  37 extern IDESC * sh64_idesc_media;
  38 extern IDESC * sh64_idesc_compact;
  39
  40 /* Function prototypes from sh64.c.  */
  41
  42 BI sh64_endian (SIM_CPU *);
  43 VOID sh64_break (SIM_CPU *, PCADDR);
  44 SI sh64_movua (SIM_CPU *, PCADDR, SI);
  45 VOID sh64_trapa (SIM_CPU *, DI, PCADDR);
  46 VOID sh64_compact_trapa (SIM_CPU *, UQI, PCADDR);
  47
  48 SF sh64_fldi0 (SIM_CPU *);
  49 SF sh64_fldi1 (SIM_CPU *);
  50 DF sh64_fcnvsd (SIM_CPU *, SF);
  51 SF sh64_fcnvds (SIM_CPU *, DF);
  52
  53 DF sh64_fabsd (SIM_CPU *, DF);
  54 SF sh64_fabss (SIM_CPU *, SF);
  55 DF sh64_faddd (SIM_CPU *, DF, DF);
  56 SF sh64_fadds (SIM_CPU *, SF, SF);
  57 DF sh64_fdivd (SIM_CPU *, DF, DF);
  58 SF sh64_fdivs (SIM_CPU *, SF, SF);
  59 DF sh64_floatld (SIM_CPU *, SF);
  60 SF sh64_floatls (SIM_CPU *, SF);
  61 DF sh64_floatqd (SIM_CPU *, DF);
  62 SF sh64_floatqs (SIM_CPU *, DF);
  63 SF sh64_fmacs(SIM_CPU *, SF, SF, SF);
  64 DF sh64_fmuld (SIM_CPU *, DF, DF);
  65 SF sh64_fmuls (SIM_CPU *, SF, SF);
  66 DF sh64_fnegd (SIM_CPU *, DF);
  67 SF sh64_fnegs (SIM_CPU *, SF);
  68 DF sh64_fsqrtd (SIM_CPU *, DF);
  69 SF sh64_fsqrts (SIM_CPU *, SF);
  70 DF sh64_fsubd (SIM_CPU *, DF, DF);
  71 SF sh64_fsubs (SIM_CPU *, SF, SF);
  72 SF sh64_ftrcdl (SIM_CPU *, DF);
  73 DF sh64_ftrcdq (SIM_CPU *, DF);
  74 SF sh64_ftrcsl (SIM_CPU *, SF);
  75 DF sh64_ftrcsq (SIM_CPU *, SF);
  76 VOID sh64_ftrvs (SIM_CPU *, unsigned, unsigned, unsigned);
  77 VOID sh64_fipr (SIM_CPU *cpu, unsigned m, unsigned n);
  78 SF sh64_fiprs (SIM_CPU *cpu, unsigned g, unsigned h);
  79 VOID sh64_fldp (SIM_CPU *cpu, PCADDR pc, DI rm, DI rn, unsigned f);
  80 VOID sh64_fstp (SIM_CPU *cpu, PCADDR pc, DI rm, DI rn, unsigned f);
  81 VOID sh64_ftrv (SIM_CPU *cpu, UINT ignored);
  82 VOID sh64_pref (SIM_CPU *cpu, SI addr);
  83 BI sh64_fcmpeqs (SIM_CPU *, SF, SF);
  84 BI sh64_fcmpeqd (SIM_CPU *, DF, DF);
  85 BI sh64_fcmpges (SIM_CPU *, SF, SF);
  86 BI sh64_fcmpged (SIM_CPU *, DF, DF);
  87 BI sh64_fcmpgts (SIM_CPU *, SF, SF);
  88 BI sh64_fcmpgtd (SIM_CPU *, DF, DF);
  89 BI sh64_fcmpund (SIM_CPU *, DF, DF);
  90 BI sh64_fcmpuns (SIM_CPU *, SF, SF);
  91
  92 DI sh64_nsb (SIM_CPU *, DI);
  93
  94 #endif /* SH64_SIM_H */