1 /* Simulator instruction decoder for sparc64.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1999 Cygnus Solutions, Inc.
7 This file is part of the Cygnus Simulators.
12 #define WANT_CPU sparc64
13 #define WANT_CPU_SPARC64
16 #include "sim-assert.h"
18 /* FIXME: Need to review choices for the following. */
20 #if WITH_SEM_SWITCH_FULL
23 #define FULL(fn) CONCAT3 (sparc64,_sem_,fn) ,
27 #if WITH_SEM_SWITCH_FAST
30 #define FAST(fn) CONCAT3 (sparc64,_semf_,fn) , /* f for fast */
36 /* The instruction descriptor array.
37 This is computed at runtime. Space for it is not malloc'd to save a
38 teensy bit of cpu in the decoder. Moving it to malloc space is trivial
39 but won't be done until necessary (we don't currently support the runtime
40 addition of instructions nor an SMP machine with different cpus). */
41 static IDESC sparc64_insn_data
[SPARC64_INSN_MAX
];
43 /* The INSN_ prefix is not here and is instead part of the `insn' argument
44 to avoid collisions with header files (e.g. `AND' in ansidecl.h). */
45 #define IDX(insn) CONCAT2 (SPARC64_,insn)
46 #define TYPE(insn) CONCAT2 (SPARC_,insn)
48 /* Commas between elements are contained in the macros.
49 Some of these are conditionally compiled out. */
51 static const struct insn_sem sparc64_insn_sem
[] =
53 { VIRTUAL_INSN_X_INVALID
, IDX (INSN_X_INVALID
), FULL (x_invalid
) FAST (x_invalid
) },
54 { VIRTUAL_INSN_X_AFTER
, IDX (INSN_X_AFTER
), FULL (x_after
) FAST (x_after
) },
55 { VIRTUAL_INSN_X_BEFORE
, IDX (INSN_X_BEFORE
), FULL (x_before
) FAST (x_before
) },
56 { VIRTUAL_INSN_X_CTI_CHAIN
, IDX (INSN_X_CTI_CHAIN
), FULL (x_cti_chain
) FAST (x_cti_chain
) },
57 { VIRTUAL_INSN_X_CHAIN
, IDX (INSN_X_CHAIN
), FULL (x_chain
) FAST (x_chain
) },
58 { VIRTUAL_INSN_X_BEGIN
, IDX (INSN_X_BEGIN
), FULL (x_begin
) FAST (x_begin
) },
59 { TYPE (INSN_BEQZ
), IDX (INSN_BEQZ
), FULL (beqz
) FAST (beqz
) },
60 { TYPE (INSN_BGEZ
), IDX (INSN_BGEZ
), FULL (bgez
) FAST (bgez
) },
61 { TYPE (INSN_BGTZ
), IDX (INSN_BGTZ
), FULL (bgtz
) FAST (bgtz
) },
62 { TYPE (INSN_BLEZ
), IDX (INSN_BLEZ
), FULL (blez
) FAST (blez
) },
63 { TYPE (INSN_BLTZ
), IDX (INSN_BLTZ
), FULL (bltz
) FAST (bltz
) },
64 { TYPE (INSN_BNEZ
), IDX (INSN_BNEZ
), FULL (bnez
) FAST (bnez
) },
65 { TYPE (INSN_BPCC_BA
), IDX (INSN_BPCC_BA
), FULL (bpcc_ba
) FAST (bpcc_ba
) },
66 { TYPE (INSN_BPCC_BN
), IDX (INSN_BPCC_BN
), FULL (bpcc_bn
) FAST (bpcc_bn
) },
67 { TYPE (INSN_BPCC_BNE
), IDX (INSN_BPCC_BNE
), FULL (bpcc_bne
) FAST (bpcc_bne
) },
68 { TYPE (INSN_BPCC_BE
), IDX (INSN_BPCC_BE
), FULL (bpcc_be
) FAST (bpcc_be
) },
69 { TYPE (INSN_BPCC_BG
), IDX (INSN_BPCC_BG
), FULL (bpcc_bg
) FAST (bpcc_bg
) },
70 { TYPE (INSN_BPCC_BLE
), IDX (INSN_BPCC_BLE
), FULL (bpcc_ble
) FAST (bpcc_ble
) },
71 { TYPE (INSN_BPCC_BGE
), IDX (INSN_BPCC_BGE
), FULL (bpcc_bge
) FAST (bpcc_bge
) },
72 { TYPE (INSN_BPCC_BL
), IDX (INSN_BPCC_BL
), FULL (bpcc_bl
) FAST (bpcc_bl
) },
73 { TYPE (INSN_BPCC_BGU
), IDX (INSN_BPCC_BGU
), FULL (bpcc_bgu
) FAST (bpcc_bgu
) },
74 { TYPE (INSN_BPCC_BLEU
), IDX (INSN_BPCC_BLEU
), FULL (bpcc_bleu
) FAST (bpcc_bleu
) },
75 { TYPE (INSN_BPCC_BCC
), IDX (INSN_BPCC_BCC
), FULL (bpcc_bcc
) FAST (bpcc_bcc
) },
76 { TYPE (INSN_BPCC_BCS
), IDX (INSN_BPCC_BCS
), FULL (bpcc_bcs
) FAST (bpcc_bcs
) },
77 { TYPE (INSN_BPCC_BPOS
), IDX (INSN_BPCC_BPOS
), FULL (bpcc_bpos
) FAST (bpcc_bpos
) },
78 { TYPE (INSN_BPCC_BNEG
), IDX (INSN_BPCC_BNEG
), FULL (bpcc_bneg
) FAST (bpcc_bneg
) },
79 { TYPE (INSN_BPCC_BVC
), IDX (INSN_BPCC_BVC
), FULL (bpcc_bvc
) FAST (bpcc_bvc
) },
80 { TYPE (INSN_BPCC_BVS
), IDX (INSN_BPCC_BVS
), FULL (bpcc_bvs
) FAST (bpcc_bvs
) },
81 { TYPE (INSN_DONE
), IDX (INSN_DONE
), FULL (done
) FAST (done
) },
82 { TYPE (INSN_RETRY
), IDX (INSN_RETRY
), FULL (retry
) FAST (retry
) },
83 { TYPE (INSN_FLUSH
), IDX (INSN_FLUSH
), FULL (flush
) FAST (flush
) },
84 { TYPE (INSN_FLUSH_IMM
), IDX (INSN_FLUSH_IMM
), FULL (flush_imm
) FAST (flush_imm
) },
85 { TYPE (INSN_FLUSHW
), IDX (INSN_FLUSHW
), FULL (flushw
) FAST (flushw
) },
86 { TYPE (INSN_IMPDEP1
), IDX (INSN_IMPDEP1
), FULL (impdep1
) FAST (impdep1
) },
87 { TYPE (INSN_IMPDEP2
), IDX (INSN_IMPDEP2
), FULL (impdep2
) FAST (impdep2
) },
88 { TYPE (INSN_MEMBAR
), IDX (INSN_MEMBAR
), FULL (membar
) FAST (membar
) },
89 { TYPE (INSN_MOVA_ICC_ICC
), IDX (INSN_MOVA_ICC_ICC
), FULL (mova_icc_icc
) FAST (mova_icc_icc
) },
90 { TYPE (INSN_MOVA_IMM_ICC_ICC
), IDX (INSN_MOVA_IMM_ICC_ICC
), FULL (mova_imm_icc_icc
) FAST (mova_imm_icc_icc
) },
91 { TYPE (INSN_MOVA_XCC_XCC
), IDX (INSN_MOVA_XCC_XCC
), FULL (mova_xcc_xcc
) FAST (mova_xcc_xcc
) },
92 { TYPE (INSN_MOVA_IMM_XCC_XCC
), IDX (INSN_MOVA_IMM_XCC_XCC
), FULL (mova_imm_xcc_xcc
) FAST (mova_imm_xcc_xcc
) },
93 { TYPE (INSN_MOVN_ICC_ICC
), IDX (INSN_MOVN_ICC_ICC
), FULL (movn_icc_icc
) FAST (movn_icc_icc
) },
94 { TYPE (INSN_MOVN_IMM_ICC_ICC
), IDX (INSN_MOVN_IMM_ICC_ICC
), FULL (movn_imm_icc_icc
) FAST (movn_imm_icc_icc
) },
95 { TYPE (INSN_MOVN_XCC_XCC
), IDX (INSN_MOVN_XCC_XCC
), FULL (movn_xcc_xcc
) FAST (movn_xcc_xcc
) },
96 { TYPE (INSN_MOVN_IMM_XCC_XCC
), IDX (INSN_MOVN_IMM_XCC_XCC
), FULL (movn_imm_xcc_xcc
) FAST (movn_imm_xcc_xcc
) },
97 { TYPE (INSN_MOVNE_ICC_ICC
), IDX (INSN_MOVNE_ICC_ICC
), FULL (movne_icc_icc
) FAST (movne_icc_icc
) },
98 { TYPE (INSN_MOVNE_IMM_ICC_ICC
), IDX (INSN_MOVNE_IMM_ICC_ICC
), FULL (movne_imm_icc_icc
) FAST (movne_imm_icc_icc
) },
99 { TYPE (INSN_MOVNE_XCC_XCC
), IDX (INSN_MOVNE_XCC_XCC
), FULL (movne_xcc_xcc
) FAST (movne_xcc_xcc
) },
100 { TYPE (INSN_MOVNE_IMM_XCC_XCC
), IDX (INSN_MOVNE_IMM_XCC_XCC
), FULL (movne_imm_xcc_xcc
) FAST (movne_imm_xcc_xcc
) },
101 { TYPE (INSN_MOVE_ICC_ICC
), IDX (INSN_MOVE_ICC_ICC
), FULL (move_icc_icc
) FAST (move_icc_icc
) },
102 { TYPE (INSN_MOVE_IMM_ICC_ICC
), IDX (INSN_MOVE_IMM_ICC_ICC
), FULL (move_imm_icc_icc
) FAST (move_imm_icc_icc
) },
103 { TYPE (INSN_MOVE_XCC_XCC
), IDX (INSN_MOVE_XCC_XCC
), FULL (move_xcc_xcc
) FAST (move_xcc_xcc
) },
104 { TYPE (INSN_MOVE_IMM_XCC_XCC
), IDX (INSN_MOVE_IMM_XCC_XCC
), FULL (move_imm_xcc_xcc
) FAST (move_imm_xcc_xcc
) },
105 { TYPE (INSN_MOVG_ICC_ICC
), IDX (INSN_MOVG_ICC_ICC
), FULL (movg_icc_icc
) FAST (movg_icc_icc
) },
106 { TYPE (INSN_MOVG_IMM_ICC_ICC
), IDX (INSN_MOVG_IMM_ICC_ICC
), FULL (movg_imm_icc_icc
) FAST (movg_imm_icc_icc
) },
107 { TYPE (INSN_MOVG_XCC_XCC
), IDX (INSN_MOVG_XCC_XCC
), FULL (movg_xcc_xcc
) FAST (movg_xcc_xcc
) },
108 { TYPE (INSN_MOVG_IMM_XCC_XCC
), IDX (INSN_MOVG_IMM_XCC_XCC
), FULL (movg_imm_xcc_xcc
) FAST (movg_imm_xcc_xcc
) },
109 { TYPE (INSN_MOVLE_ICC_ICC
), IDX (INSN_MOVLE_ICC_ICC
), FULL (movle_icc_icc
) FAST (movle_icc_icc
) },
110 { TYPE (INSN_MOVLE_IMM_ICC_ICC
), IDX (INSN_MOVLE_IMM_ICC_ICC
), FULL (movle_imm_icc_icc
) FAST (movle_imm_icc_icc
) },
111 { TYPE (INSN_MOVLE_XCC_XCC
), IDX (INSN_MOVLE_XCC_XCC
), FULL (movle_xcc_xcc
) FAST (movle_xcc_xcc
) },
112 { TYPE (INSN_MOVLE_IMM_XCC_XCC
), IDX (INSN_MOVLE_IMM_XCC_XCC
), FULL (movle_imm_xcc_xcc
) FAST (movle_imm_xcc_xcc
) },
113 { TYPE (INSN_MOVGE_ICC_ICC
), IDX (INSN_MOVGE_ICC_ICC
), FULL (movge_icc_icc
) FAST (movge_icc_icc
) },
114 { TYPE (INSN_MOVGE_IMM_ICC_ICC
), IDX (INSN_MOVGE_IMM_ICC_ICC
), FULL (movge_imm_icc_icc
) FAST (movge_imm_icc_icc
) },
115 { TYPE (INSN_MOVGE_XCC_XCC
), IDX (INSN_MOVGE_XCC_XCC
), FULL (movge_xcc_xcc
) FAST (movge_xcc_xcc
) },
116 { TYPE (INSN_MOVGE_IMM_XCC_XCC
), IDX (INSN_MOVGE_IMM_XCC_XCC
), FULL (movge_imm_xcc_xcc
) FAST (movge_imm_xcc_xcc
) },
117 { TYPE (INSN_MOVL_ICC_ICC
), IDX (INSN_MOVL_ICC_ICC
), FULL (movl_icc_icc
) FAST (movl_icc_icc
) },
118 { TYPE (INSN_MOVL_IMM_ICC_ICC
), IDX (INSN_MOVL_IMM_ICC_ICC
), FULL (movl_imm_icc_icc
) FAST (movl_imm_icc_icc
) },
119 { TYPE (INSN_MOVL_XCC_XCC
), IDX (INSN_MOVL_XCC_XCC
), FULL (movl_xcc_xcc
) FAST (movl_xcc_xcc
) },
120 { TYPE (INSN_MOVL_IMM_XCC_XCC
), IDX (INSN_MOVL_IMM_XCC_XCC
), FULL (movl_imm_xcc_xcc
) FAST (movl_imm_xcc_xcc
) },
121 { TYPE (INSN_MOVGU_ICC_ICC
), IDX (INSN_MOVGU_ICC_ICC
), FULL (movgu_icc_icc
) FAST (movgu_icc_icc
) },
122 { TYPE (INSN_MOVGU_IMM_ICC_ICC
), IDX (INSN_MOVGU_IMM_ICC_ICC
), FULL (movgu_imm_icc_icc
) FAST (movgu_imm_icc_icc
) },
123 { TYPE (INSN_MOVGU_XCC_XCC
), IDX (INSN_MOVGU_XCC_XCC
), FULL (movgu_xcc_xcc
) FAST (movgu_xcc_xcc
) },
124 { TYPE (INSN_MOVGU_IMM_XCC_XCC
), IDX (INSN_MOVGU_IMM_XCC_XCC
), FULL (movgu_imm_xcc_xcc
) FAST (movgu_imm_xcc_xcc
) },
125 { TYPE (INSN_MOVLEU_ICC_ICC
), IDX (INSN_MOVLEU_ICC_ICC
), FULL (movleu_icc_icc
) FAST (movleu_icc_icc
) },
126 { TYPE (INSN_MOVLEU_IMM_ICC_ICC
), IDX (INSN_MOVLEU_IMM_ICC_ICC
), FULL (movleu_imm_icc_icc
) FAST (movleu_imm_icc_icc
) },
127 { TYPE (INSN_MOVLEU_XCC_XCC
), IDX (INSN_MOVLEU_XCC_XCC
), FULL (movleu_xcc_xcc
) FAST (movleu_xcc_xcc
) },
128 { TYPE (INSN_MOVLEU_IMM_XCC_XCC
), IDX (INSN_MOVLEU_IMM_XCC_XCC
), FULL (movleu_imm_xcc_xcc
) FAST (movleu_imm_xcc_xcc
) },
129 { TYPE (INSN_MOVCC_ICC_ICC
), IDX (INSN_MOVCC_ICC_ICC
), FULL (movcc_icc_icc
) FAST (movcc_icc_icc
) },
130 { TYPE (INSN_MOVCC_IMM_ICC_ICC
), IDX (INSN_MOVCC_IMM_ICC_ICC
), FULL (movcc_imm_icc_icc
) FAST (movcc_imm_icc_icc
) },
131 { TYPE (INSN_MOVCC_XCC_XCC
), IDX (INSN_MOVCC_XCC_XCC
), FULL (movcc_xcc_xcc
) FAST (movcc_xcc_xcc
) },
132 { TYPE (INSN_MOVCC_IMM_XCC_XCC
), IDX (INSN_MOVCC_IMM_XCC_XCC
), FULL (movcc_imm_xcc_xcc
) FAST (movcc_imm_xcc_xcc
) },
133 { TYPE (INSN_MOVCS_ICC_ICC
), IDX (INSN_MOVCS_ICC_ICC
), FULL (movcs_icc_icc
) FAST (movcs_icc_icc
) },
134 { TYPE (INSN_MOVCS_IMM_ICC_ICC
), IDX (INSN_MOVCS_IMM_ICC_ICC
), FULL (movcs_imm_icc_icc
) FAST (movcs_imm_icc_icc
) },
135 { TYPE (INSN_MOVCS_XCC_XCC
), IDX (INSN_MOVCS_XCC_XCC
), FULL (movcs_xcc_xcc
) FAST (movcs_xcc_xcc
) },
136 { TYPE (INSN_MOVCS_IMM_XCC_XCC
), IDX (INSN_MOVCS_IMM_XCC_XCC
), FULL (movcs_imm_xcc_xcc
) FAST (movcs_imm_xcc_xcc
) },
137 { TYPE (INSN_MOVPOS_ICC_ICC
), IDX (INSN_MOVPOS_ICC_ICC
), FULL (movpos_icc_icc
) FAST (movpos_icc_icc
) },
138 { TYPE (INSN_MOVPOS_IMM_ICC_ICC
), IDX (INSN_MOVPOS_IMM_ICC_ICC
), FULL (movpos_imm_icc_icc
) FAST (movpos_imm_icc_icc
) },
139 { TYPE (INSN_MOVPOS_XCC_XCC
), IDX (INSN_MOVPOS_XCC_XCC
), FULL (movpos_xcc_xcc
) FAST (movpos_xcc_xcc
) },
140 { TYPE (INSN_MOVPOS_IMM_XCC_XCC
), IDX (INSN_MOVPOS_IMM_XCC_XCC
), FULL (movpos_imm_xcc_xcc
) FAST (movpos_imm_xcc_xcc
) },
141 { TYPE (INSN_MOVNEG_ICC_ICC
), IDX (INSN_MOVNEG_ICC_ICC
), FULL (movneg_icc_icc
) FAST (movneg_icc_icc
) },
142 { TYPE (INSN_MOVNEG_IMM_ICC_ICC
), IDX (INSN_MOVNEG_IMM_ICC_ICC
), FULL (movneg_imm_icc_icc
) FAST (movneg_imm_icc_icc
) },
143 { TYPE (INSN_MOVNEG_XCC_XCC
), IDX (INSN_MOVNEG_XCC_XCC
), FULL (movneg_xcc_xcc
) FAST (movneg_xcc_xcc
) },
144 { TYPE (INSN_MOVNEG_IMM_XCC_XCC
), IDX (INSN_MOVNEG_IMM_XCC_XCC
), FULL (movneg_imm_xcc_xcc
) FAST (movneg_imm_xcc_xcc
) },
145 { TYPE (INSN_MOVVC_ICC_ICC
), IDX (INSN_MOVVC_ICC_ICC
), FULL (movvc_icc_icc
) FAST (movvc_icc_icc
) },
146 { TYPE (INSN_MOVVC_IMM_ICC_ICC
), IDX (INSN_MOVVC_IMM_ICC_ICC
), FULL (movvc_imm_icc_icc
) FAST (movvc_imm_icc_icc
) },
147 { TYPE (INSN_MOVVC_XCC_XCC
), IDX (INSN_MOVVC_XCC_XCC
), FULL (movvc_xcc_xcc
) FAST (movvc_xcc_xcc
) },
148 { TYPE (INSN_MOVVC_IMM_XCC_XCC
), IDX (INSN_MOVVC_IMM_XCC_XCC
), FULL (movvc_imm_xcc_xcc
) FAST (movvc_imm_xcc_xcc
) },
149 { TYPE (INSN_MOVVS_ICC_ICC
), IDX (INSN_MOVVS_ICC_ICC
), FULL (movvs_icc_icc
) FAST (movvs_icc_icc
) },
150 { TYPE (INSN_MOVVS_IMM_ICC_ICC
), IDX (INSN_MOVVS_IMM_ICC_ICC
), FULL (movvs_imm_icc_icc
) FAST (movvs_imm_icc_icc
) },
151 { TYPE (INSN_MOVVS_XCC_XCC
), IDX (INSN_MOVVS_XCC_XCC
), FULL (movvs_xcc_xcc
) FAST (movvs_xcc_xcc
) },
152 { TYPE (INSN_MOVVS_IMM_XCC_XCC
), IDX (INSN_MOVVS_IMM_XCC_XCC
), FULL (movvs_imm_xcc_xcc
) FAST (movvs_imm_xcc_xcc
) },
153 { TYPE (INSN_LDSB_REG_REG
), IDX (INSN_LDSB_REG_REG
), FULL (ldsb_reg_reg
) FAST (ldsb_reg_reg
) },
154 { TYPE (INSN_LDSB_REG_IMM
), IDX (INSN_LDSB_REG_IMM
), FULL (ldsb_reg_imm
) FAST (ldsb_reg_imm
) },
155 { TYPE (INSN_LDSB_REG_REG_ASI
), IDX (INSN_LDSB_REG_REG_ASI
), FULL (ldsb_reg_reg_asi
) FAST (ldsb_reg_reg_asi
) },
156 { TYPE (INSN_LDUB_REG_REG
), IDX (INSN_LDUB_REG_REG
), FULL (ldub_reg_reg
) FAST (ldub_reg_reg
) },
157 { TYPE (INSN_LDUB_REG_IMM
), IDX (INSN_LDUB_REG_IMM
), FULL (ldub_reg_imm
) FAST (ldub_reg_imm
) },
158 { TYPE (INSN_LDUB_REG_REG_ASI
), IDX (INSN_LDUB_REG_REG_ASI
), FULL (ldub_reg_reg_asi
) FAST (ldub_reg_reg_asi
) },
159 { TYPE (INSN_LDSH_REG_REG
), IDX (INSN_LDSH_REG_REG
), FULL (ldsh_reg_reg
) FAST (ldsh_reg_reg
) },
160 { TYPE (INSN_LDSH_REG_IMM
), IDX (INSN_LDSH_REG_IMM
), FULL (ldsh_reg_imm
) FAST (ldsh_reg_imm
) },
161 { TYPE (INSN_LDSH_REG_REG_ASI
), IDX (INSN_LDSH_REG_REG_ASI
), FULL (ldsh_reg_reg_asi
) FAST (ldsh_reg_reg_asi
) },
162 { TYPE (INSN_LDUH_REG_REG
), IDX (INSN_LDUH_REG_REG
), FULL (lduh_reg_reg
) FAST (lduh_reg_reg
) },
163 { TYPE (INSN_LDUH_REG_IMM
), IDX (INSN_LDUH_REG_IMM
), FULL (lduh_reg_imm
) FAST (lduh_reg_imm
) },
164 { TYPE (INSN_LDUH_REG_REG_ASI
), IDX (INSN_LDUH_REG_REG_ASI
), FULL (lduh_reg_reg_asi
) FAST (lduh_reg_reg_asi
) },
165 { TYPE (INSN_LDSW_REG_REG
), IDX (INSN_LDSW_REG_REG
), FULL (ldsw_reg_reg
) FAST (ldsw_reg_reg
) },
166 { TYPE (INSN_LDSW_REG_IMM
), IDX (INSN_LDSW_REG_IMM
), FULL (ldsw_reg_imm
) FAST (ldsw_reg_imm
) },
167 { TYPE (INSN_LDSW_REG_REG_ASI
), IDX (INSN_LDSW_REG_REG_ASI
), FULL (ldsw_reg_reg_asi
) FAST (ldsw_reg_reg_asi
) },
168 { TYPE (INSN_LDUW_REG_REG
), IDX (INSN_LDUW_REG_REG
), FULL (lduw_reg_reg
) FAST (lduw_reg_reg
) },
169 { TYPE (INSN_LDUW_REG_IMM
), IDX (INSN_LDUW_REG_IMM
), FULL (lduw_reg_imm
) FAST (lduw_reg_imm
) },
170 { TYPE (INSN_LDUW_REG_REG_ASI
), IDX (INSN_LDUW_REG_REG_ASI
), FULL (lduw_reg_reg_asi
) FAST (lduw_reg_reg_asi
) },
171 { TYPE (INSN_LDX_REG_REG
), IDX (INSN_LDX_REG_REG
), FULL (ldx_reg_reg
) FAST (ldx_reg_reg
) },
172 { TYPE (INSN_LDX_REG_IMM
), IDX (INSN_LDX_REG_IMM
), FULL (ldx_reg_imm
) FAST (ldx_reg_imm
) },
173 { TYPE (INSN_LDX_REG_REG_ASI
), IDX (INSN_LDX_REG_REG_ASI
), FULL (ldx_reg_reg_asi
) FAST (ldx_reg_reg_asi
) },
174 { TYPE (INSN_LDD_REG_REG
), IDX (INSN_LDD_REG_REG
), FULL (ldd_reg_reg
) FAST (ldd_reg_reg
) },
175 { TYPE (INSN_LDD_REG_IMM
), IDX (INSN_LDD_REG_IMM
), FULL (ldd_reg_imm
) FAST (ldd_reg_imm
) },
176 { TYPE (INSN_LDD_REG_REG_ASI
), IDX (INSN_LDD_REG_REG_ASI
), FULL (ldd_reg_reg_asi
) FAST (ldd_reg_reg_asi
) },
177 { TYPE (INSN_STB_REG_REG
), IDX (INSN_STB_REG_REG
), FULL (stb_reg_reg
) FAST (stb_reg_reg
) },
178 { TYPE (INSN_STB_REG_IMM
), IDX (INSN_STB_REG_IMM
), FULL (stb_reg_imm
) FAST (stb_reg_imm
) },
179 { TYPE (INSN_STB_REG_REG_ASI
), IDX (INSN_STB_REG_REG_ASI
), FULL (stb_reg_reg_asi
) FAST (stb_reg_reg_asi
) },
180 { TYPE (INSN_STH_REG_REG
), IDX (INSN_STH_REG_REG
), FULL (sth_reg_reg
) FAST (sth_reg_reg
) },
181 { TYPE (INSN_STH_REG_IMM
), IDX (INSN_STH_REG_IMM
), FULL (sth_reg_imm
) FAST (sth_reg_imm
) },
182 { TYPE (INSN_STH_REG_REG_ASI
), IDX (INSN_STH_REG_REG_ASI
), FULL (sth_reg_reg_asi
) FAST (sth_reg_reg_asi
) },
183 { TYPE (INSN_ST_REG_REG
), IDX (INSN_ST_REG_REG
), FULL (st_reg_reg
) FAST (st_reg_reg
) },
184 { TYPE (INSN_ST_REG_IMM
), IDX (INSN_ST_REG_IMM
), FULL (st_reg_imm
) FAST (st_reg_imm
) },
185 { TYPE (INSN_ST_REG_REG_ASI
), IDX (INSN_ST_REG_REG_ASI
), FULL (st_reg_reg_asi
) FAST (st_reg_reg_asi
) },
186 { TYPE (INSN_STX_REG_REG
), IDX (INSN_STX_REG_REG
), FULL (stx_reg_reg
) FAST (stx_reg_reg
) },
187 { TYPE (INSN_STX_REG_IMM
), IDX (INSN_STX_REG_IMM
), FULL (stx_reg_imm
) FAST (stx_reg_imm
) },
188 { TYPE (INSN_STX_REG_REG_ASI
), IDX (INSN_STX_REG_REG_ASI
), FULL (stx_reg_reg_asi
) FAST (stx_reg_reg_asi
) },
189 { TYPE (INSN_STD_REG_REG
), IDX (INSN_STD_REG_REG
), FULL (std_reg_reg
) FAST (std_reg_reg
) },
190 { TYPE (INSN_STD_REG_IMM
), IDX (INSN_STD_REG_IMM
), FULL (std_reg_imm
) FAST (std_reg_imm
) },
191 { TYPE (INSN_STD_REG_REG_ASI
), IDX (INSN_STD_REG_REG_ASI
), FULL (std_reg_reg_asi
) FAST (std_reg_reg_asi
) },
192 { TYPE (INSN_FP_LD_REG_REG
), IDX (INSN_FP_LD_REG_REG
), FULL (fp_ld_reg_reg
) FAST (fp_ld_reg_reg
) },
193 { TYPE (INSN_FP_LD_REG_IMM
), IDX (INSN_FP_LD_REG_IMM
), FULL (fp_ld_reg_imm
) FAST (fp_ld_reg_imm
) },
194 { TYPE (INSN_FP_LD_REG_REG_ASI
), IDX (INSN_FP_LD_REG_REG_ASI
), FULL (fp_ld_reg_reg_asi
) FAST (fp_ld_reg_reg_asi
) },
195 { TYPE (INSN_SETHI
), IDX (INSN_SETHI
), FULL (sethi
) FAST (sethi
) },
196 { TYPE (INSN_ADD
), IDX (INSN_ADD
), FULL (add
) FAST (add
) },
197 { TYPE (INSN_ADD_IMM
), IDX (INSN_ADD_IMM
), FULL (add_imm
) FAST (add_imm
) },
198 { TYPE (INSN_SUB
), IDX (INSN_SUB
), FULL (sub
) FAST (sub
) },
199 { TYPE (INSN_SUB_IMM
), IDX (INSN_SUB_IMM
), FULL (sub_imm
) FAST (sub_imm
) },
200 { TYPE (INSN_ADDCC
), IDX (INSN_ADDCC
), FULL (addcc
) FAST (addcc
) },
201 { TYPE (INSN_ADDCC_IMM
), IDX (INSN_ADDCC_IMM
), FULL (addcc_imm
) FAST (addcc_imm
) },
202 { TYPE (INSN_SUBCC
), IDX (INSN_SUBCC
), FULL (subcc
) FAST (subcc
) },
203 { TYPE (INSN_SUBCC_IMM
), IDX (INSN_SUBCC_IMM
), FULL (subcc_imm
) FAST (subcc_imm
) },
204 { TYPE (INSN_ADDC
), IDX (INSN_ADDC
), FULL (addc
) FAST (addc
) },
205 { TYPE (INSN_ADDC_IMM
), IDX (INSN_ADDC_IMM
), FULL (addc_imm
) FAST (addc_imm
) },
206 { TYPE (INSN_SUBC
), IDX (INSN_SUBC
), FULL (subc
) FAST (subc
) },
207 { TYPE (INSN_SUBC_IMM
), IDX (INSN_SUBC_IMM
), FULL (subc_imm
) FAST (subc_imm
) },
208 { TYPE (INSN_ADDCCC
), IDX (INSN_ADDCCC
), FULL (addccc
) FAST (addccc
) },
209 { TYPE (INSN_ADDCCC_IMM
), IDX (INSN_ADDCCC_IMM
), FULL (addccc_imm
) FAST (addccc_imm
) },
210 { TYPE (INSN_SUBCCC
), IDX (INSN_SUBCCC
), FULL (subccc
) FAST (subccc
) },
211 { TYPE (INSN_SUBCCC_IMM
), IDX (INSN_SUBCCC_IMM
), FULL (subccc_imm
) FAST (subccc_imm
) },
212 { TYPE (INSN_AND
), IDX (INSN_AND
), FULL (and) FAST (and) },
213 { TYPE (INSN_AND_IMM
), IDX (INSN_AND_IMM
), FULL (and_imm
) FAST (and_imm
) },
214 { TYPE (INSN_ANDCC
), IDX (INSN_ANDCC
), FULL (andcc
) FAST (andcc
) },
215 { TYPE (INSN_ANDCC_IMM
), IDX (INSN_ANDCC_IMM
), FULL (andcc_imm
) FAST (andcc_imm
) },
216 { TYPE (INSN_OR
), IDX (INSN_OR
), FULL (or) FAST (or) },
217 { TYPE (INSN_OR_IMM
), IDX (INSN_OR_IMM
), FULL (or_imm
) FAST (or_imm
) },
218 { TYPE (INSN_ORCC
), IDX (INSN_ORCC
), FULL (orcc
) FAST (orcc
) },
219 { TYPE (INSN_ORCC_IMM
), IDX (INSN_ORCC_IMM
), FULL (orcc_imm
) FAST (orcc_imm
) },
220 { TYPE (INSN_XOR
), IDX (INSN_XOR
), FULL (xor) FAST (xor) },
221 { TYPE (INSN_XOR_IMM
), IDX (INSN_XOR_IMM
), FULL (xor_imm
) FAST (xor_imm
) },
222 { TYPE (INSN_XORCC
), IDX (INSN_XORCC
), FULL (xorcc
) FAST (xorcc
) },
223 { TYPE (INSN_XORCC_IMM
), IDX (INSN_XORCC_IMM
), FULL (xorcc_imm
) FAST (xorcc_imm
) },
224 { TYPE (INSN_ANDN
), IDX (INSN_ANDN
), FULL (andn
) FAST (andn
) },
225 { TYPE (INSN_ANDN_IMM
), IDX (INSN_ANDN_IMM
), FULL (andn_imm
) FAST (andn_imm
) },
226 { TYPE (INSN_ANDNCC
), IDX (INSN_ANDNCC
), FULL (andncc
) FAST (andncc
) },
227 { TYPE (INSN_ANDNCC_IMM
), IDX (INSN_ANDNCC_IMM
), FULL (andncc_imm
) FAST (andncc_imm
) },
228 { TYPE (INSN_ORN
), IDX (INSN_ORN
), FULL (orn
) FAST (orn
) },
229 { TYPE (INSN_ORN_IMM
), IDX (INSN_ORN_IMM
), FULL (orn_imm
) FAST (orn_imm
) },
230 { TYPE (INSN_ORNCC
), IDX (INSN_ORNCC
), FULL (orncc
) FAST (orncc
) },
231 { TYPE (INSN_ORNCC_IMM
), IDX (INSN_ORNCC_IMM
), FULL (orncc_imm
) FAST (orncc_imm
) },
232 { TYPE (INSN_XNOR
), IDX (INSN_XNOR
), FULL (xnor
) FAST (xnor
) },
233 { TYPE (INSN_XNOR_IMM
), IDX (INSN_XNOR_IMM
), FULL (xnor_imm
) FAST (xnor_imm
) },
234 { TYPE (INSN_XNORCC
), IDX (INSN_XNORCC
), FULL (xnorcc
) FAST (xnorcc
) },
235 { TYPE (INSN_XNORCC_IMM
), IDX (INSN_XNORCC_IMM
), FULL (xnorcc_imm
) FAST (xnorcc_imm
) },
236 { TYPE (INSN_SLL
), IDX (INSN_SLL
), FULL (sll
) FAST (sll
) },
237 { TYPE (INSN_SLL_IMM
), IDX (INSN_SLL_IMM
), FULL (sll_imm
) FAST (sll_imm
) },
238 { TYPE (INSN_SRL
), IDX (INSN_SRL
), FULL (srl
) FAST (srl
) },
239 { TYPE (INSN_SRL_IMM
), IDX (INSN_SRL_IMM
), FULL (srl_imm
) FAST (srl_imm
) },
240 { TYPE (INSN_SRA
), IDX (INSN_SRA
), FULL (sra
) FAST (sra
) },
241 { TYPE (INSN_SRA_IMM
), IDX (INSN_SRA_IMM
), FULL (sra_imm
) FAST (sra_imm
) },
242 { TYPE (INSN_SMUL
), IDX (INSN_SMUL
), FULL (smul
) FAST (smul
) },
243 { TYPE (INSN_SMUL_IMM
), IDX (INSN_SMUL_IMM
), FULL (smul_imm
) FAST (smul_imm
) },
244 { TYPE (INSN_SMUL_CC
), IDX (INSN_SMUL_CC
), FULL (smul_cc
) FAST (smul_cc
) },
245 { TYPE (INSN_SMUL_CC_IMM
), IDX (INSN_SMUL_CC_IMM
), FULL (smul_cc_imm
) FAST (smul_cc_imm
) },
246 { TYPE (INSN_UMUL
), IDX (INSN_UMUL
), FULL (umul
) FAST (umul
) },
247 { TYPE (INSN_UMUL_IMM
), IDX (INSN_UMUL_IMM
), FULL (umul_imm
) FAST (umul_imm
) },
248 { TYPE (INSN_UMUL_CC
), IDX (INSN_UMUL_CC
), FULL (umul_cc
) FAST (umul_cc
) },
249 { TYPE (INSN_UMUL_CC_IMM
), IDX (INSN_UMUL_CC_IMM
), FULL (umul_cc_imm
) FAST (umul_cc_imm
) },
250 { TYPE (INSN_MULSCC
), IDX (INSN_MULSCC
), FULL (mulscc
) FAST (mulscc
) },
251 { TYPE (INSN_SAVE
), IDX (INSN_SAVE
), FULL (save
) FAST (save
) },
252 { TYPE (INSN_SAVE_IMM
), IDX (INSN_SAVE_IMM
), FULL (save_imm
) FAST (save_imm
) },
253 { TYPE (INSN_RESTORE
), IDX (INSN_RESTORE
), FULL (restore
) FAST (restore
) },
254 { TYPE (INSN_RESTORE_IMM
), IDX (INSN_RESTORE_IMM
), FULL (restore_imm
) FAST (restore_imm
) },
255 { TYPE (INSN_RETT
), IDX (INSN_RETT
), FULL (rett
) FAST (rett
) },
256 { TYPE (INSN_RETT_IMM
), IDX (INSN_RETT_IMM
), FULL (rett_imm
) FAST (rett_imm
) },
257 { TYPE (INSN_UNIMP
), IDX (INSN_UNIMP
), FULL (unimp
) FAST (unimp
) },
258 { TYPE (INSN_CALL
), IDX (INSN_CALL
), FULL (call
) FAST (call
) },
259 { TYPE (INSN_JMPL
), IDX (INSN_JMPL
), FULL (jmpl
) FAST (jmpl
) },
260 { TYPE (INSN_JMPL_IMM
), IDX (INSN_JMPL_IMM
), FULL (jmpl_imm
) FAST (jmpl_imm
) },
261 { TYPE (INSN_BA
), IDX (INSN_BA
), FULL (ba
) FAST (ba
) },
262 { TYPE (INSN_TA
), IDX (INSN_TA
), FULL (ta
) FAST (ta
) },
263 { TYPE (INSN_TA_IMM
), IDX (INSN_TA_IMM
), FULL (ta_imm
) FAST (ta_imm
) },
264 { TYPE (INSN_BN
), IDX (INSN_BN
), FULL (bn
) FAST (bn
) },
265 { TYPE (INSN_TN
), IDX (INSN_TN
), FULL (tn
) FAST (tn
) },
266 { TYPE (INSN_TN_IMM
), IDX (INSN_TN_IMM
), FULL (tn_imm
) FAST (tn_imm
) },
267 { TYPE (INSN_BNE
), IDX (INSN_BNE
), FULL (bne
) FAST (bne
) },
268 { TYPE (INSN_TNE
), IDX (INSN_TNE
), FULL (tne
) FAST (tne
) },
269 { TYPE (INSN_TNE_IMM
), IDX (INSN_TNE_IMM
), FULL (tne_imm
) FAST (tne_imm
) },
270 { TYPE (INSN_BE
), IDX (INSN_BE
), FULL (be
) FAST (be
) },
271 { TYPE (INSN_TE
), IDX (INSN_TE
), FULL (te
) FAST (te
) },
272 { TYPE (INSN_TE_IMM
), IDX (INSN_TE_IMM
), FULL (te_imm
) FAST (te_imm
) },
273 { TYPE (INSN_BG
), IDX (INSN_BG
), FULL (bg
) FAST (bg
) },
274 { TYPE (INSN_TG
), IDX (INSN_TG
), FULL (tg
) FAST (tg
) },
275 { TYPE (INSN_TG_IMM
), IDX (INSN_TG_IMM
), FULL (tg_imm
) FAST (tg_imm
) },
276 { TYPE (INSN_BLE
), IDX (INSN_BLE
), FULL (ble
) FAST (ble
) },
277 { TYPE (INSN_TLE
), IDX (INSN_TLE
), FULL (tle
) FAST (tle
) },
278 { TYPE (INSN_TLE_IMM
), IDX (INSN_TLE_IMM
), FULL (tle_imm
) FAST (tle_imm
) },
279 { TYPE (INSN_BGE
), IDX (INSN_BGE
), FULL (bge
) FAST (bge
) },
280 { TYPE (INSN_TGE
), IDX (INSN_TGE
), FULL (tge
) FAST (tge
) },
281 { TYPE (INSN_TGE_IMM
), IDX (INSN_TGE_IMM
), FULL (tge_imm
) FAST (tge_imm
) },
282 { TYPE (INSN_BL
), IDX (INSN_BL
), FULL (bl
) FAST (bl
) },
283 { TYPE (INSN_TL
), IDX (INSN_TL
), FULL (tl
) FAST (tl
) },
284 { TYPE (INSN_TL_IMM
), IDX (INSN_TL_IMM
), FULL (tl_imm
) FAST (tl_imm
) },
285 { TYPE (INSN_BGU
), IDX (INSN_BGU
), FULL (bgu
) FAST (bgu
) },
286 { TYPE (INSN_TGU
), IDX (INSN_TGU
), FULL (tgu
) FAST (tgu
) },
287 { TYPE (INSN_TGU_IMM
), IDX (INSN_TGU_IMM
), FULL (tgu_imm
) FAST (tgu_imm
) },
288 { TYPE (INSN_BLEU
), IDX (INSN_BLEU
), FULL (bleu
) FAST (bleu
) },
289 { TYPE (INSN_TLEU
), IDX (INSN_TLEU
), FULL (tleu
) FAST (tleu
) },
290 { TYPE (INSN_TLEU_IMM
), IDX (INSN_TLEU_IMM
), FULL (tleu_imm
) FAST (tleu_imm
) },
291 { TYPE (INSN_BCC
), IDX (INSN_BCC
), FULL (bcc
) FAST (bcc
) },
292 { TYPE (INSN_TCC
), IDX (INSN_TCC
), FULL (tcc
) FAST (tcc
) },
293 { TYPE (INSN_TCC_IMM
), IDX (INSN_TCC_IMM
), FULL (tcc_imm
) FAST (tcc_imm
) },
294 { TYPE (INSN_BCS
), IDX (INSN_BCS
), FULL (bcs
) FAST (bcs
) },
295 { TYPE (INSN_TCS
), IDX (INSN_TCS
), FULL (tcs
) FAST (tcs
) },
296 { TYPE (INSN_TCS_IMM
), IDX (INSN_TCS_IMM
), FULL (tcs_imm
) FAST (tcs_imm
) },
297 { TYPE (INSN_BPOS
), IDX (INSN_BPOS
), FULL (bpos
) FAST (bpos
) },
298 { TYPE (INSN_TPOS
), IDX (INSN_TPOS
), FULL (tpos
) FAST (tpos
) },
299 { TYPE (INSN_TPOS_IMM
), IDX (INSN_TPOS_IMM
), FULL (tpos_imm
) FAST (tpos_imm
) },
300 { TYPE (INSN_BNEG
), IDX (INSN_BNEG
), FULL (bneg
) FAST (bneg
) },
301 { TYPE (INSN_TNEG
), IDX (INSN_TNEG
), FULL (tneg
) FAST (tneg
) },
302 { TYPE (INSN_TNEG_IMM
), IDX (INSN_TNEG_IMM
), FULL (tneg_imm
) FAST (tneg_imm
) },
303 { TYPE (INSN_BVC
), IDX (INSN_BVC
), FULL (bvc
) FAST (bvc
) },
304 { TYPE (INSN_TVC
), IDX (INSN_TVC
), FULL (tvc
) FAST (tvc
) },
305 { TYPE (INSN_TVC_IMM
), IDX (INSN_TVC_IMM
), FULL (tvc_imm
) FAST (tvc_imm
) },
306 { TYPE (INSN_BVS
), IDX (INSN_BVS
), FULL (bvs
) FAST (bvs
) },
307 { TYPE (INSN_TVS
), IDX (INSN_TVS
), FULL (tvs
) FAST (tvs
) },
308 { TYPE (INSN_TVS_IMM
), IDX (INSN_TVS_IMM
), FULL (tvs_imm
) FAST (tvs_imm
) },
309 { TYPE (INSN_LDSTUB_REG_REG
), IDX (INSN_LDSTUB_REG_REG
), FULL (ldstub_reg_reg
) FAST (ldstub_reg_reg
) },
310 { TYPE (INSN_LDSTUB_REG_IMM
), IDX (INSN_LDSTUB_REG_IMM
), FULL (ldstub_reg_imm
) FAST (ldstub_reg_imm
) },
311 { TYPE (INSN_LDSTUB_REG_REG_ASI
), IDX (INSN_LDSTUB_REG_REG_ASI
), FULL (ldstub_reg_reg_asi
) FAST (ldstub_reg_reg_asi
) },
312 { TYPE (INSN_SWAP_REG_REG
), IDX (INSN_SWAP_REG_REG
), FULL (swap_reg_reg
) FAST (swap_reg_reg
) },
313 { TYPE (INSN_SWAP_REG_IMM
), IDX (INSN_SWAP_REG_IMM
), FULL (swap_reg_imm
) FAST (swap_reg_imm
) },
314 { TYPE (INSN_SWAP_REG_REG_ASI
), IDX (INSN_SWAP_REG_REG_ASI
), FULL (swap_reg_reg_asi
) FAST (swap_reg_reg_asi
) },
317 static const struct insn_sem sparc64_insn_sem_invalid
=
319 VIRTUAL_INSN_X_INVALID
, IDX (INSN_X_INVALID
), FULL (x_invalid
) FAST (x_invalid
)
325 /* Initialize an IDESC from the compile-time computable parts. */
328 init_idesc (SIM_CPU
*cpu
, IDESC
*id
, const struct insn_sem
*t
)
330 const CGEN_INSN
*insn_table
= CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu
))->init_entries
;
333 if ((int) t
->type
<= 0)
334 id
->idata
= & cgen_virtual_insn_table
[- (int) t
->type
];
336 id
->idata
= & insn_table
[t
->type
];
337 id
->attrs
= CGEN_INSN_ATTRS (id
->idata
);
338 /* Oh my god, a magic number. */
339 id
->length
= CGEN_INSN_BITSIZE (id
->idata
) / 8;
340 #if ! WITH_SEM_SWITCH_FULL
341 id
->sem_full
= t
->sem_full
;
343 #if WITH_FAST && ! WITH_SEM_SWITCH_FAST
344 id
->sem_fast
= t
->sem_fast
;
346 #if WITH_PROFILE_MODEL_P
347 id
->timing
= & MODEL_TIMING (CPU_MODEL (cpu
)) [t
->index
];
349 SIM_DESC sd
= CPU_STATE (cpu
);
350 SIM_ASSERT (t
->index
== id
->timing
->num
);
355 /* Initialize the instruction descriptor table. */
358 sparc64_init_idesc_table (SIM_CPU
*cpu
)
361 const struct insn_sem
*t
,*tend
;
362 int tabsize
= SPARC64_INSN_MAX
;
363 IDESC
*table
= sparc64_insn_data
;
365 memset (table
, 0, tabsize
* sizeof (IDESC
));
367 /* First set all entries to the `invalid insn'. */
368 t
= & sparc64_insn_sem_invalid
;
369 for (id
= table
, tabend
= table
+ tabsize
; id
< tabend
; ++id
)
370 init_idesc (cpu
, id
, t
);
372 /* Now fill in the values for the chosen cpu. */
373 for (t
= sparc64_insn_sem
, tend
= t
+ sizeof (sparc64_insn_sem
) / sizeof (*t
);
376 init_idesc (cpu
, & table
[t
->index
], t
);
379 /* Link the IDESC table into the cpu. */
380 CPU_IDESC (cpu
) = table
;
383 #define GOTO_EXTRACT(id) goto extract
385 /* The decoder needs a slightly different computed goto switch control. */
387 #define DECODE_SWITCH(N, X) goto *labels_##N[X];
389 #define DECODE_SWITCH(N, X) switch (X)
392 /* Given an instruction, return a pointer to its IDESC entry. */
395 sparc64_decode (SIM_CPU
*current_cpu
, IADDR pc
,
396 CGEN_INSN_INT base_insn
, CGEN_INSN_INT entire_insn
,
400 const IDESC
*idecode
;
403 #define I(insn) & sparc64_insn_data[CONCAT2 (SPARC64_,insn)]
404 CGEN_INSN_INT insn
= base_insn
;
405 static const IDESC
*idecode_invalid
= I (INSN_X_INVALID
);
409 static const void *labels_0
[256] = {
410 && default_0
, && default_0
, && default_0
, && default_0
,
411 && default_0
, && default_0
, && default_0
, && default_0
,
412 && default_0
, && default_0
, && default_0
, && default_0
,
413 && case_0_12
, && case_0_13
, && default_0
, && default_0
,
414 && case_0_16
, && case_0_17
, && case_0_18
, && case_0_19
,
415 && case_0_20
, && case_0_21
, && case_0_22
, && case_0_23
,
416 && case_0_24
, && case_0_25
, && case_0_26
, && case_0_27
,
417 && case_0_28
, && case_0_29
, && case_0_30
, && case_0_31
,
418 && default_0
, && default_0
, && default_0
, && default_0
,
419 && default_0
, && default_0
, && default_0
, && default_0
,
420 && default_0
, && default_0
, && default_0
, && default_0
,
421 && default_0
, && default_0
, && default_0
, && default_0
,
422 && default_0
, && default_0
, && default_0
, && default_0
,
423 && default_0
, && default_0
, && default_0
, && default_0
,
424 && default_0
, && default_0
, && default_0
, && default_0
,
425 && default_0
, && default_0
, && default_0
, && default_0
,
426 && default_0
, && default_0
, && default_0
, && default_0
,
427 && default_0
, && default_0
, && default_0
, && default_0
,
428 && default_0
, && default_0
, && default_0
, && default_0
,
429 && default_0
, && default_0
, && default_0
, && default_0
,
430 && default_0
, && default_0
, && default_0
, && default_0
,
431 && default_0
, && default_0
, && default_0
, && default_0
,
432 && default_0
, && default_0
, && default_0
, && default_0
,
433 && default_0
, && default_0
, && default_0
, && default_0
,
434 && default_0
, && default_0
, && default_0
, && default_0
,
435 && default_0
, && default_0
, && default_0
, && default_0
,
436 && default_0
, && default_0
, && default_0
, && default_0
,
437 && default_0
, && default_0
, && default_0
, && default_0
,
438 && default_0
, && default_0
, && default_0
, && default_0
,
439 && default_0
, && default_0
, && default_0
, && default_0
,
440 && default_0
, && default_0
, && default_0
, && default_0
,
441 && default_0
, && default_0
, && default_0
, && default_0
,
442 && case_0_128
, && case_0_129
, && case_0_130
, && case_0_131
,
443 && case_0_132
, && case_0_133
, && case_0_134
, && case_0_135
,
444 && case_0_136
, && default_0
, && case_0_138
, && case_0_139
,
445 && case_0_140
, && default_0
, && default_0
, && default_0
,
446 && case_0_144
, && case_0_145
, && case_0_146
, && case_0_147
,
447 && case_0_148
, && case_0_149
, && case_0_150
, && case_0_151
,
448 && case_0_152
, && default_0
, && case_0_154
, && case_0_155
,
449 && case_0_156
, && default_0
, && default_0
, && default_0
,
450 && default_0
, && default_0
, && default_0
, && default_0
,
451 && default_0
, && case_0_165
, && case_0_166
, && case_0_167
,
452 && default_0
, && default_0
, && default_0
, && default_0
,
453 && case_0_172
, && default_0
, && default_0
, && default_0
,
454 && default_0
, && default_0
, && default_0
, && default_0
,
455 && default_0
, && default_0
, && default_0
, && default_0
,
456 && case_0_184
, && case_0_185
, && case_0_186
, && case_0_187
,
457 && case_0_188
, && case_0_189
, && case_0_190
, && default_0
,
458 && case_0_192
, && case_0_193
, && case_0_194
, && case_0_195
,
459 && case_0_196
, && case_0_197
, && case_0_198
, && case_0_199
,
460 && case_0_200
, && case_0_201
, && case_0_202
, && case_0_203
,
461 && default_0
, && case_0_205
, && case_0_206
, && case_0_207
,
462 && default_0
, && default_0
, && default_0
, && default_0
,
463 && default_0
, && default_0
, && default_0
, && default_0
,
464 && default_0
, && default_0
, && default_0
, && default_0
,
465 && default_0
, && default_0
, && default_0
, && default_0
,
466 && case_0_224
, && default_0
, && default_0
, && default_0
,
467 && default_0
, && default_0
, && default_0
, && default_0
,
468 && default_0
, && default_0
, && default_0
, && default_0
,
469 && default_0
, && default_0
, && default_0
, && default_0
,
470 && default_0
, && default_0
, && default_0
, && default_0
,
471 && default_0
, && default_0
, && default_0
, && default_0
,
472 && default_0
, && default_0
, && default_0
, && default_0
,
473 && default_0
, && default_0
, && default_0
, && default_0
,
476 static const IDESC
* insns
[256] = {
477 I (INSN_UNIMP
), I (INSN_UNIMP
),
478 I (INSN_UNIMP
), I (INSN_UNIMP
),
479 I (INSN_UNIMP
), I (INSN_UNIMP
),
480 I (INSN_UNIMP
), I (INSN_UNIMP
),
481 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
482 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
484 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
493 I (INSN_SETHI
), I (INSN_SETHI
),
494 I (INSN_SETHI
), I (INSN_SETHI
),
495 I (INSN_SETHI
), I (INSN_SETHI
),
496 I (INSN_SETHI
), I (INSN_SETHI
),
497 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
498 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
499 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
500 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
501 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
502 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
503 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
504 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
505 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
506 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
507 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
508 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
509 I (INSN_CALL
), I (INSN_CALL
),
510 I (INSN_CALL
), I (INSN_CALL
),
511 I (INSN_CALL
), I (INSN_CALL
),
512 I (INSN_CALL
), I (INSN_CALL
),
513 I (INSN_CALL
), I (INSN_CALL
),
514 I (INSN_CALL
), I (INSN_CALL
),
515 I (INSN_CALL
), I (INSN_CALL
),
516 I (INSN_CALL
), I (INSN_CALL
),
517 I (INSN_CALL
), I (INSN_CALL
),
518 I (INSN_CALL
), I (INSN_CALL
),
519 I (INSN_CALL
), I (INSN_CALL
),
520 I (INSN_CALL
), I (INSN_CALL
),
521 I (INSN_CALL
), I (INSN_CALL
),
522 I (INSN_CALL
), I (INSN_CALL
),
523 I (INSN_CALL
), I (INSN_CALL
),
524 I (INSN_CALL
), I (INSN_CALL
),
525 I (INSN_CALL
), I (INSN_CALL
),
526 I (INSN_CALL
), I (INSN_CALL
),
527 I (INSN_CALL
), I (INSN_CALL
),
528 I (INSN_CALL
), I (INSN_CALL
),
529 I (INSN_CALL
), I (INSN_CALL
),
530 I (INSN_CALL
), I (INSN_CALL
),
531 I (INSN_CALL
), I (INSN_CALL
),
532 I (INSN_CALL
), I (INSN_CALL
),
533 I (INSN_CALL
), I (INSN_CALL
),
534 I (INSN_CALL
), I (INSN_CALL
),
535 I (INSN_CALL
), I (INSN_CALL
),
536 I (INSN_CALL
), I (INSN_CALL
),
537 I (INSN_CALL
), I (INSN_CALL
),
538 I (INSN_CALL
), I (INSN_CALL
),
539 I (INSN_CALL
), I (INSN_CALL
),
540 I (INSN_CALL
), I (INSN_CALL
),
545 0, I (INSN_X_INVALID
),
547 0, I (INSN_X_INVALID
),
548 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
553 0, I (INSN_X_INVALID
),
555 0, I (INSN_X_INVALID
),
556 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
557 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
558 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
561 I (INSN_MEMBAR
), I (INSN_X_INVALID
),
562 I (INSN_X_INVALID
), I (INSN_FLUSHW
),
563 0, I (INSN_X_INVALID
),
564 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
565 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
566 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
567 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
568 I (INSN_IMPDEP1
), I (INSN_IMPDEP2
),
572 0, I (INSN_X_INVALID
),
579 I (INSN_X_INVALID
), 0,
581 I (INSN_LDUW_REG_REG_ASI
), I (INSN_LDUB_REG_REG_ASI
),
582 I (INSN_LDUH_REG_REG_ASI
), I (INSN_LDD_REG_REG_ASI
),
583 I (INSN_ST_REG_REG_ASI
), I (INSN_STB_REG_REG_ASI
),
584 I (INSN_STH_REG_REG_ASI
), I (INSN_STD_REG_REG_ASI
),
585 I (INSN_LDSW_REG_REG_ASI
), I (INSN_LDSB_REG_REG_ASI
),
586 I (INSN_LDSH_REG_REG_ASI
), I (INSN_LDX_REG_REG_ASI
),
587 I (INSN_X_INVALID
), I (INSN_LDSTUB_REG_REG_ASI
),
588 I (INSN_STX_REG_REG_ASI
), I (INSN_SWAP_REG_REG_ASI
),
589 0, I (INSN_X_INVALID
),
590 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
591 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
592 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
593 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
594 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
595 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
596 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
597 I (INSN_FP_LD_REG_REG_ASI
), I (INSN_X_INVALID
),
598 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
599 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
600 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
601 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
602 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
603 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
604 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
607 val
= (((insn
>> 24) & (3 << 6)) | ((insn
>> 19) & (63 << 0)));
608 DECODE_SWITCH (0, val
)
610 CASE (0, 12) : /* fall through */
613 static const IDESC
* insns
[16] = {
614 I (INSN_BPCC_BN
), I (INSN_BPCC_BE
),
615 I (INSN_BPCC_BLE
), I (INSN_BPCC_BL
),
616 I (INSN_BPCC_BLEU
), I (INSN_BPCC_BCS
),
617 I (INSN_BPCC_BNEG
), I (INSN_BPCC_BVS
),
618 I (INSN_BPCC_BA
), I (INSN_BPCC_BNE
),
619 I (INSN_BPCC_BG
), I (INSN_BPCC_BGE
),
620 I (INSN_BPCC_BGU
), I (INSN_BPCC_BCC
),
621 I (INSN_BPCC_BPOS
), I (INSN_BPCC_BVC
),
623 unsigned int val
= (((insn
>> 25) & (15 << 0)));
624 idecode
= insns
[val
];
625 GOTO_EXTRACT (idecode
);
627 CASE (0, 16) : /* fall through */
628 CASE (0, 17) : /* fall through */
629 CASE (0, 18) : /* fall through */
630 CASE (0, 19) : /* fall through */
631 CASE (0, 20) : /* fall through */
632 CASE (0, 21) : /* fall through */
633 CASE (0, 22) : /* fall through */
636 static const IDESC
* insns
[16] = {
637 I (INSN_BN
), I (INSN_BE
),
638 I (INSN_BLE
), I (INSN_BL
),
639 I (INSN_BLEU
), I (INSN_BCS
),
640 I (INSN_BNEG
), I (INSN_BVS
),
641 I (INSN_BA
), I (INSN_BNE
),
642 I (INSN_BG
), I (INSN_BGE
),
643 I (INSN_BGU
), I (INSN_BCC
),
644 I (INSN_BPOS
), I (INSN_BVC
),
646 unsigned int val
= (((insn
>> 25) & (15 << 0)));
647 idecode
= insns
[val
];
648 GOTO_EXTRACT (idecode
);
650 CASE (0, 24) : /* fall through */
651 CASE (0, 25) : /* fall through */
652 CASE (0, 26) : /* fall through */
653 CASE (0, 27) : /* fall through */
654 CASE (0, 28) : /* fall through */
655 CASE (0, 29) : /* fall through */
656 CASE (0, 30) : /* fall through */
659 static const IDESC
* insns
[8] = {
660 I (INSN_X_INVALID
), I (INSN_BEQZ
),
661 I (INSN_BLEZ
), I (INSN_BLTZ
),
662 I (INSN_X_INVALID
), I (INSN_BNEZ
),
663 I (INSN_BGTZ
), I (INSN_BGEZ
),
665 unsigned int val
= (((insn
>> 25) & (7 << 0)));
666 idecode
= insns
[val
];
667 GOTO_EXTRACT (idecode
);
671 static const IDESC
* insns
[2] = {
672 I (INSN_ADD
), I (INSN_ADD_IMM
),
674 unsigned int val
= (((insn
>> 13) & (1 << 0)));
675 idecode
= insns
[val
];
676 GOTO_EXTRACT (idecode
);
680 static const IDESC
* insns
[2] = {
681 I (INSN_AND
), I (INSN_AND_IMM
),
683 unsigned int val
= (((insn
>> 13) & (1 << 0)));
684 idecode
= insns
[val
];
685 GOTO_EXTRACT (idecode
);
689 static const IDESC
* insns
[2] = {
690 I (INSN_OR
), I (INSN_OR_IMM
),
692 unsigned int val
= (((insn
>> 13) & (1 << 0)));
693 idecode
= insns
[val
];
694 GOTO_EXTRACT (idecode
);
698 static const IDESC
* insns
[2] = {
699 I (INSN_XOR
), I (INSN_XOR_IMM
),
701 unsigned int val
= (((insn
>> 13) & (1 << 0)));
702 idecode
= insns
[val
];
703 GOTO_EXTRACT (idecode
);
707 static const IDESC
* insns
[2] = {
708 I (INSN_SUB
), I (INSN_SUB_IMM
),
710 unsigned int val
= (((insn
>> 13) & (1 << 0)));
711 idecode
= insns
[val
];
712 GOTO_EXTRACT (idecode
);
716 static const IDESC
* insns
[2] = {
717 I (INSN_ANDN
), I (INSN_ANDN_IMM
),
719 unsigned int val
= (((insn
>> 13) & (1 << 0)));
720 idecode
= insns
[val
];
721 GOTO_EXTRACT (idecode
);
725 static const IDESC
* insns
[2] = {
726 I (INSN_ORN
), I (INSN_ORN_IMM
),
728 unsigned int val
= (((insn
>> 13) & (1 << 0)));
729 idecode
= insns
[val
];
730 GOTO_EXTRACT (idecode
);
734 static const IDESC
* insns
[2] = {
735 I (INSN_XNOR
), I (INSN_XNOR_IMM
),
737 unsigned int val
= (((insn
>> 13) & (1 << 0)));
738 idecode
= insns
[val
];
739 GOTO_EXTRACT (idecode
);
743 static const IDESC
* insns
[2] = {
744 I (INSN_ADDC
), I (INSN_ADDC_IMM
),
746 unsigned int val
= (((insn
>> 13) & (1 << 0)));
747 idecode
= insns
[val
];
748 GOTO_EXTRACT (idecode
);
752 static const IDESC
* insns
[2] = {
753 I (INSN_UMUL
), I (INSN_UMUL_IMM
),
755 unsigned int val
= (((insn
>> 13) & (1 << 0)));
756 idecode
= insns
[val
];
757 GOTO_EXTRACT (idecode
);
761 static const IDESC
* insns
[2] = {
762 I (INSN_SMUL
), I (INSN_SMUL_IMM
),
764 unsigned int val
= (((insn
>> 13) & (1 << 0)));
765 idecode
= insns
[val
];
766 GOTO_EXTRACT (idecode
);
770 static const IDESC
* insns
[2] = {
771 I (INSN_SUBC
), I (INSN_SUBC_IMM
),
773 unsigned int val
= (((insn
>> 13) & (1 << 0)));
774 idecode
= insns
[val
];
775 GOTO_EXTRACT (idecode
);
779 static const IDESC
* insns
[2] = {
780 I (INSN_ADDCC
), I (INSN_ADDCC_IMM
),
782 unsigned int val
= (((insn
>> 13) & (1 << 0)));
783 idecode
= insns
[val
];
784 GOTO_EXTRACT (idecode
);
788 static const IDESC
* insns
[2] = {
789 I (INSN_ANDCC
), I (INSN_ANDCC_IMM
),
791 unsigned int val
= (((insn
>> 13) & (1 << 0)));
792 idecode
= insns
[val
];
793 GOTO_EXTRACT (idecode
);
797 static const IDESC
* insns
[2] = {
798 I (INSN_ORCC
), I (INSN_ORCC_IMM
),
800 unsigned int val
= (((insn
>> 13) & (1 << 0)));
801 idecode
= insns
[val
];
802 GOTO_EXTRACT (idecode
);
806 static const IDESC
* insns
[2] = {
807 I (INSN_XORCC
), I (INSN_XORCC_IMM
),
809 unsigned int val
= (((insn
>> 13) & (1 << 0)));
810 idecode
= insns
[val
];
811 GOTO_EXTRACT (idecode
);
815 static const IDESC
* insns
[2] = {
816 I (INSN_SUBCC
), I (INSN_SUBCC_IMM
),
818 unsigned int val
= (((insn
>> 13) & (1 << 0)));
819 idecode
= insns
[val
];
820 GOTO_EXTRACT (idecode
);
824 static const IDESC
* insns
[2] = {
825 I (INSN_ANDNCC
), I (INSN_ANDNCC_IMM
),
827 unsigned int val
= (((insn
>> 13) & (1 << 0)));
828 idecode
= insns
[val
];
829 GOTO_EXTRACT (idecode
);
833 static const IDESC
* insns
[2] = {
834 I (INSN_ORNCC
), I (INSN_ORNCC_IMM
),
836 unsigned int val
= (((insn
>> 13) & (1 << 0)));
837 idecode
= insns
[val
];
838 GOTO_EXTRACT (idecode
);
842 static const IDESC
* insns
[2] = {
843 I (INSN_XNORCC
), I (INSN_XNORCC_IMM
),
845 unsigned int val
= (((insn
>> 13) & (1 << 0)));
846 idecode
= insns
[val
];
847 GOTO_EXTRACT (idecode
);
851 static const IDESC
* insns
[2] = {
852 I (INSN_ADDCCC
), I (INSN_ADDCCC_IMM
),
854 unsigned int val
= (((insn
>> 13) & (1 << 0)));
855 idecode
= insns
[val
];
856 GOTO_EXTRACT (idecode
);
860 static const IDESC
* insns
[2] = {
861 I (INSN_UMUL_CC
), I (INSN_UMUL_CC_IMM
),
863 unsigned int val
= (((insn
>> 13) & (1 << 0)));
864 idecode
= insns
[val
];
865 GOTO_EXTRACT (idecode
);
869 static const IDESC
* insns
[2] = {
870 I (INSN_SMUL_CC
), I (INSN_SMUL_CC_IMM
),
872 unsigned int val
= (((insn
>> 13) & (1 << 0)));
873 idecode
= insns
[val
];
874 GOTO_EXTRACT (idecode
);
878 static const IDESC
* insns
[2] = {
879 I (INSN_SUBCCC
), I (INSN_SUBCCC_IMM
),
881 unsigned int val
= (((insn
>> 13) & (1 << 0)));
882 idecode
= insns
[val
];
883 GOTO_EXTRACT (idecode
);
887 static const IDESC
* insns
[2] = {
888 I (INSN_SLL
), I (INSN_SLL_IMM
),
890 unsigned int val
= (((insn
>> 13) & (1 << 0)));
891 idecode
= insns
[val
];
892 GOTO_EXTRACT (idecode
);
896 static const IDESC
* insns
[2] = {
897 I (INSN_SRL
), I (INSN_SRL_IMM
),
899 unsigned int val
= (((insn
>> 13) & (1 << 0)));
900 idecode
= insns
[val
];
901 GOTO_EXTRACT (idecode
);
905 static const IDESC
* insns
[2] = {
906 I (INSN_SRA
), I (INSN_SRA_IMM
),
908 unsigned int val
= (((insn
>> 13) & (1 << 0)));
909 idecode
= insns
[val
];
910 GOTO_EXTRACT (idecode
);
915 static const void *labels_0_172
[16] = {
916 && case_0_172_0
, && case_0_172_1
, && case_0_172_2
, && case_0_172_3
,
917 && case_0_172_4
, && case_0_172_5
, && case_0_172_6
, && case_0_172_7
,
918 && case_0_172_8
, && case_0_172_9
, && case_0_172_10
, && case_0_172_11
,
919 && case_0_172_12
, && case_0_172_13
, && case_0_172_14
, && case_0_172_15
,
923 val
= (((insn
>> 25) & (15 << 0)));
924 DECODE_SWITCH (0_172
, val
)
928 static const IDESC
* insns
[16] = {
929 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
930 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
931 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
932 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
933 I (INSN_MOVN_ICC_ICC
), I (INSN_X_INVALID
),
934 I (INSN_MOVN_XCC_XCC
), I (INSN_X_INVALID
),
935 I (INSN_MOVN_IMM_ICC_ICC
), I (INSN_X_INVALID
),
936 I (INSN_MOVN_IMM_XCC_XCC
), I (INSN_X_INVALID
),
938 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
939 idecode
= insns
[val
];
940 GOTO_EXTRACT (idecode
);
944 static const IDESC
* insns
[16] = {
945 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
946 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
947 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
948 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
949 I (INSN_MOVE_ICC_ICC
), I (INSN_X_INVALID
),
950 I (INSN_MOVE_XCC_XCC
), I (INSN_X_INVALID
),
951 I (INSN_MOVE_IMM_ICC_ICC
), I (INSN_X_INVALID
),
952 I (INSN_MOVE_IMM_XCC_XCC
), I (INSN_X_INVALID
),
954 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
955 idecode
= insns
[val
];
956 GOTO_EXTRACT (idecode
);
960 static const IDESC
* insns
[16] = {
961 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
962 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
963 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
964 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
965 I (INSN_MOVLE_ICC_ICC
), I (INSN_X_INVALID
),
966 I (INSN_MOVLE_XCC_XCC
), I (INSN_X_INVALID
),
967 I (INSN_MOVLE_IMM_ICC_ICC
), I (INSN_X_INVALID
),
968 I (INSN_MOVLE_IMM_XCC_XCC
), I (INSN_X_INVALID
),
970 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
971 idecode
= insns
[val
];
972 GOTO_EXTRACT (idecode
);
976 static const IDESC
* insns
[16] = {
977 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
978 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
979 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
980 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
981 I (INSN_MOVL_ICC_ICC
), I (INSN_X_INVALID
),
982 I (INSN_MOVL_XCC_XCC
), I (INSN_X_INVALID
),
983 I (INSN_MOVL_IMM_ICC_ICC
), I (INSN_X_INVALID
),
984 I (INSN_MOVL_IMM_XCC_XCC
), I (INSN_X_INVALID
),
986 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
987 idecode
= insns
[val
];
988 GOTO_EXTRACT (idecode
);
992 static const IDESC
* insns
[16] = {
993 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
994 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
995 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
996 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
997 I (INSN_MOVLEU_ICC_ICC
), I (INSN_X_INVALID
),
998 I (INSN_MOVLEU_XCC_XCC
), I (INSN_X_INVALID
),
999 I (INSN_MOVLEU_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1000 I (INSN_MOVLEU_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1002 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1003 idecode
= insns
[val
];
1004 GOTO_EXTRACT (idecode
);
1008 static const IDESC
* insns
[16] = {
1009 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1010 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1011 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1012 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1013 I (INSN_MOVCS_ICC_ICC
), I (INSN_X_INVALID
),
1014 I (INSN_MOVCS_XCC_XCC
), I (INSN_X_INVALID
),
1015 I (INSN_MOVCS_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1016 I (INSN_MOVCS_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1018 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1019 idecode
= insns
[val
];
1020 GOTO_EXTRACT (idecode
);
1024 static const IDESC
* insns
[16] = {
1025 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1026 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1027 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1028 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1029 I (INSN_MOVNEG_ICC_ICC
), I (INSN_X_INVALID
),
1030 I (INSN_MOVNEG_XCC_XCC
), I (INSN_X_INVALID
),
1031 I (INSN_MOVNEG_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1032 I (INSN_MOVNEG_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1034 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1035 idecode
= insns
[val
];
1036 GOTO_EXTRACT (idecode
);
1040 static const IDESC
* insns
[16] = {
1041 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1042 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1043 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1044 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1045 I (INSN_MOVVS_ICC_ICC
), I (INSN_X_INVALID
),
1046 I (INSN_MOVVS_XCC_XCC
), I (INSN_X_INVALID
),
1047 I (INSN_MOVVS_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1048 I (INSN_MOVVS_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1050 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1051 idecode
= insns
[val
];
1052 GOTO_EXTRACT (idecode
);
1056 static const IDESC
* insns
[16] = {
1057 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1058 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1059 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1060 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1061 I (INSN_MOVA_ICC_ICC
), I (INSN_X_INVALID
),
1062 I (INSN_MOVA_XCC_XCC
), I (INSN_X_INVALID
),
1063 I (INSN_MOVA_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1064 I (INSN_MOVA_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1066 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1067 idecode
= insns
[val
];
1068 GOTO_EXTRACT (idecode
);
1072 static const IDESC
* insns
[16] = {
1073 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1074 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1075 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1076 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1077 I (INSN_MOVNE_ICC_ICC
), I (INSN_X_INVALID
),
1078 I (INSN_MOVNE_XCC_XCC
), I (INSN_X_INVALID
),
1079 I (INSN_MOVNE_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1080 I (INSN_MOVNE_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1082 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1083 idecode
= insns
[val
];
1084 GOTO_EXTRACT (idecode
);
1088 static const IDESC
* insns
[16] = {
1089 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1090 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1091 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1092 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1093 I (INSN_MOVG_ICC_ICC
), I (INSN_X_INVALID
),
1094 I (INSN_MOVG_XCC_XCC
), I (INSN_X_INVALID
),
1095 I (INSN_MOVG_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1096 I (INSN_MOVG_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1098 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1099 idecode
= insns
[val
];
1100 GOTO_EXTRACT (idecode
);
1104 static const IDESC
* insns
[16] = {
1105 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1106 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1107 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1108 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1109 I (INSN_MOVGE_ICC_ICC
), I (INSN_X_INVALID
),
1110 I (INSN_MOVGE_XCC_XCC
), I (INSN_X_INVALID
),
1111 I (INSN_MOVGE_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1112 I (INSN_MOVGE_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1114 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1115 idecode
= insns
[val
];
1116 GOTO_EXTRACT (idecode
);
1120 static const IDESC
* insns
[16] = {
1121 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1122 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1123 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1124 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1125 I (INSN_MOVGU_ICC_ICC
), I (INSN_X_INVALID
),
1126 I (INSN_MOVGU_XCC_XCC
), I (INSN_X_INVALID
),
1127 I (INSN_MOVGU_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1128 I (INSN_MOVGU_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1130 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1131 idecode
= insns
[val
];
1132 GOTO_EXTRACT (idecode
);
1136 static const IDESC
* insns
[16] = {
1137 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1138 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1139 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1140 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1141 I (INSN_MOVCC_ICC_ICC
), I (INSN_X_INVALID
),
1142 I (INSN_MOVCC_XCC_XCC
), I (INSN_X_INVALID
),
1143 I (INSN_MOVCC_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1144 I (INSN_MOVCC_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1146 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1147 idecode
= insns
[val
];
1148 GOTO_EXTRACT (idecode
);
1152 static const IDESC
* insns
[16] = {
1153 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1154 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1155 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1156 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1157 I (INSN_MOVPOS_ICC_ICC
), I (INSN_X_INVALID
),
1158 I (INSN_MOVPOS_XCC_XCC
), I (INSN_X_INVALID
),
1159 I (INSN_MOVPOS_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1160 I (INSN_MOVPOS_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1162 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1163 idecode
= insns
[val
];
1164 GOTO_EXTRACT (idecode
);
1168 static const IDESC
* insns
[16] = {
1169 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1170 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1171 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1172 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1173 I (INSN_MOVVC_ICC_ICC
), I (INSN_X_INVALID
),
1174 I (INSN_MOVVC_XCC_XCC
), I (INSN_X_INVALID
),
1175 I (INSN_MOVVC_IMM_ICC_ICC
), I (INSN_X_INVALID
),
1176 I (INSN_MOVVC_IMM_XCC_XCC
), I (INSN_X_INVALID
),
1178 unsigned int val
= (((insn
>> 15) & (1 << 3)) | ((insn
>> 11) & (7 << 0)));
1179 idecode
= insns
[val
];
1180 GOTO_EXTRACT (idecode
);
1183 idecode
= idecode_invalid
;
1184 GOTO_EXTRACT (idecode
);
1190 static const IDESC
* insns
[2] = {
1191 I (INSN_JMPL
), I (INSN_JMPL_IMM
),
1193 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1194 idecode
= insns
[val
];
1195 GOTO_EXTRACT (idecode
);
1200 static const void *labels_0_185
[16] = {
1201 && case_0_185_0
, && default_0_185
, && default_0_185
, && default_0_185
,
1202 && default_0_185
, && default_0_185
, && default_0_185
, && default_0_185
,
1203 && default_0_185
, && default_0_185
, && default_0_185
, && default_0_185
,
1204 && default_0_185
, && default_0_185
, && default_0_185
, && default_0_185
,
1207 static const IDESC
* insns
[16] = {
1208 0, I (INSN_X_INVALID
),
1209 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1210 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1211 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1212 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1213 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1214 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1215 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1218 val
= (((insn
>> 26) & (15 << 0)));
1219 DECODE_SWITCH (0_185
, val
)
1223 static const IDESC
* insns
[4] = {
1224 I (INSN_RETT
), I (INSN_RETT_IMM
),
1225 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1227 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1228 idecode
= insns
[val
];
1229 GOTO_EXTRACT (idecode
);
1232 idecode
= insns
[val
];
1233 GOTO_EXTRACT (idecode
);
1240 static const void *labels_0_186
[16] = {
1241 && case_0_186_0
, && case_0_186_1
, && case_0_186_2
, && case_0_186_3
,
1242 && case_0_186_4
, && case_0_186_5
, && case_0_186_6
, && case_0_186_7
,
1243 && default_0_186
, && default_0_186
, && default_0_186
, && default_0_186
,
1244 && default_0_186
, && default_0_186
, && default_0_186
, && default_0_186
,
1247 static const IDESC
* insns
[16] = {
1252 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1253 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1254 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1255 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1258 val
= (((insn
>> 26) & (15 << 0)));
1259 DECODE_SWITCH (0_186
, val
)
1263 static const IDESC
* insns
[4] = {
1264 I (INSN_TN
), I (INSN_TN_IMM
),
1265 I (INSN_TE
), I (INSN_TE_IMM
),
1267 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1268 idecode
= insns
[val
];
1269 GOTO_EXTRACT (idecode
);
1273 static const IDESC
* insns
[4] = {
1274 I (INSN_TLE
), I (INSN_TLE_IMM
),
1275 I (INSN_TL
), I (INSN_TL_IMM
),
1277 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1278 idecode
= insns
[val
];
1279 GOTO_EXTRACT (idecode
);
1283 static const IDESC
* insns
[4] = {
1284 I (INSN_TLEU
), I (INSN_TLEU_IMM
),
1285 I (INSN_TCS
), I (INSN_TCS_IMM
),
1287 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1288 idecode
= insns
[val
];
1289 GOTO_EXTRACT (idecode
);
1293 static const IDESC
* insns
[4] = {
1294 I (INSN_TNEG
), I (INSN_TNEG_IMM
),
1295 I (INSN_TVS
), I (INSN_TVS_IMM
),
1297 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1298 idecode
= insns
[val
];
1299 GOTO_EXTRACT (idecode
);
1303 static const IDESC
* insns
[4] = {
1304 I (INSN_TA
), I (INSN_TA_IMM
),
1305 I (INSN_TNE
), I (INSN_TNE_IMM
),
1307 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1308 idecode
= insns
[val
];
1309 GOTO_EXTRACT (idecode
);
1313 static const IDESC
* insns
[4] = {
1314 I (INSN_TG
), I (INSN_TG_IMM
),
1315 I (INSN_TGE
), I (INSN_TGE_IMM
),
1317 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1318 idecode
= insns
[val
];
1319 GOTO_EXTRACT (idecode
);
1323 static const IDESC
* insns
[4] = {
1324 I (INSN_TGU
), I (INSN_TGU_IMM
),
1325 I (INSN_TCC
), I (INSN_TCC_IMM
),
1327 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1328 idecode
= insns
[val
];
1329 GOTO_EXTRACT (idecode
);
1333 static const IDESC
* insns
[4] = {
1334 I (INSN_TPOS
), I (INSN_TPOS_IMM
),
1335 I (INSN_TVC
), I (INSN_TVC_IMM
),
1337 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1338 idecode
= insns
[val
];
1339 GOTO_EXTRACT (idecode
);
1342 idecode
= insns
[val
];
1343 GOTO_EXTRACT (idecode
);
1350 static const void *labels_0_187
[16] = {
1351 && case_0_187_0
, && default_0_187
, && default_0_187
, && default_0_187
,
1352 && default_0_187
, && default_0_187
, && default_0_187
, && default_0_187
,
1353 && default_0_187
, && default_0_187
, && default_0_187
, && default_0_187
,
1354 && default_0_187
, && default_0_187
, && default_0_187
, && default_0_187
,
1357 static const IDESC
* insns
[16] = {
1358 0, I (INSN_X_INVALID
),
1359 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1360 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1361 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1362 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1363 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1364 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1365 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1368 val
= (((insn
>> 26) & (15 << 0)));
1369 DECODE_SWITCH (0_187
, val
)
1373 static const IDESC
* insns
[4] = {
1374 I (INSN_FLUSH
), I (INSN_FLUSH_IMM
),
1375 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1377 unsigned int val
= (((insn
>> 24) & (1 << 1)) | ((insn
>> 13) & (1 << 0)));
1378 idecode
= insns
[val
];
1379 GOTO_EXTRACT (idecode
);
1382 idecode
= insns
[val
];
1383 GOTO_EXTRACT (idecode
);
1389 static const IDESC
* insns
[2] = {
1390 I (INSN_SAVE
), I (INSN_SAVE_IMM
),
1392 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1393 idecode
= insns
[val
];
1394 GOTO_EXTRACT (idecode
);
1398 static const IDESC
* insns
[2] = {
1399 I (INSN_RESTORE
), I (INSN_RESTORE_IMM
),
1401 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1402 idecode
= insns
[val
];
1403 GOTO_EXTRACT (idecode
);
1408 static const void *labels_0_190
[16] = {
1409 && case_0_190_0
, && default_0_190
, && default_0_190
, && default_0_190
,
1410 && default_0_190
, && default_0_190
, && default_0_190
, && default_0_190
,
1411 && default_0_190
, && default_0_190
, && default_0_190
, && default_0_190
,
1412 && default_0_190
, && default_0_190
, && default_0_190
, && default_0_190
,
1415 static const IDESC
* insns
[16] = {
1416 0, I (INSN_X_INVALID
),
1417 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1418 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1419 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1420 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1421 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1422 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1423 I (INSN_X_INVALID
), I (INSN_X_INVALID
),
1426 val
= (((insn
>> 26) & (15 << 0)));
1427 DECODE_SWITCH (0_190
, val
)
1431 static const IDESC
* insns
[2] = {
1432 I (INSN_DONE
), I (INSN_RETRY
),
1434 unsigned int val
= (((insn
>> 25) & (1 << 0)));
1435 idecode
= insns
[val
];
1436 GOTO_EXTRACT (idecode
);
1439 idecode
= insns
[val
];
1440 GOTO_EXTRACT (idecode
);
1446 static const IDESC
* insns
[2] = {
1447 I (INSN_LDUW_REG_REG
), I (INSN_LDUW_REG_IMM
),
1449 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1450 idecode
= insns
[val
];
1451 GOTO_EXTRACT (idecode
);
1455 static const IDESC
* insns
[2] = {
1456 I (INSN_LDUB_REG_REG
), I (INSN_LDUB_REG_IMM
),
1458 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1459 idecode
= insns
[val
];
1460 GOTO_EXTRACT (idecode
);
1464 static const IDESC
* insns
[2] = {
1465 I (INSN_LDUH_REG_REG
), I (INSN_LDUH_REG_IMM
),
1467 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1468 idecode
= insns
[val
];
1469 GOTO_EXTRACT (idecode
);
1473 static const IDESC
* insns
[2] = {
1474 I (INSN_LDD_REG_REG
), I (INSN_LDD_REG_IMM
),
1476 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1477 idecode
= insns
[val
];
1478 GOTO_EXTRACT (idecode
);
1482 static const IDESC
* insns
[2] = {
1483 I (INSN_ST_REG_REG
), I (INSN_ST_REG_IMM
),
1485 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1486 idecode
= insns
[val
];
1487 GOTO_EXTRACT (idecode
);
1491 static const IDESC
* insns
[2] = {
1492 I (INSN_STB_REG_REG
), I (INSN_STB_REG_IMM
),
1494 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1495 idecode
= insns
[val
];
1496 GOTO_EXTRACT (idecode
);
1500 static const IDESC
* insns
[2] = {
1501 I (INSN_STH_REG_REG
), I (INSN_STH_REG_IMM
),
1503 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1504 idecode
= insns
[val
];
1505 GOTO_EXTRACT (idecode
);
1509 static const IDESC
* insns
[2] = {
1510 I (INSN_STD_REG_REG
), I (INSN_STD_REG_IMM
),
1512 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1513 idecode
= insns
[val
];
1514 GOTO_EXTRACT (idecode
);
1518 static const IDESC
* insns
[2] = {
1519 I (INSN_LDSW_REG_REG
), I (INSN_LDSW_REG_IMM
),
1521 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1522 idecode
= insns
[val
];
1523 GOTO_EXTRACT (idecode
);
1527 static const IDESC
* insns
[2] = {
1528 I (INSN_LDSB_REG_REG
), I (INSN_LDSB_REG_IMM
),
1530 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1531 idecode
= insns
[val
];
1532 GOTO_EXTRACT (idecode
);
1536 static const IDESC
* insns
[2] = {
1537 I (INSN_LDSH_REG_REG
), I (INSN_LDSH_REG_IMM
),
1539 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1540 idecode
= insns
[val
];
1541 GOTO_EXTRACT (idecode
);
1545 static const IDESC
* insns
[2] = {
1546 I (INSN_LDX_REG_REG
), I (INSN_LDX_REG_IMM
),
1548 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1549 idecode
= insns
[val
];
1550 GOTO_EXTRACT (idecode
);
1554 static const IDESC
* insns
[2] = {
1555 I (INSN_LDSTUB_REG_REG
), I (INSN_LDSTUB_REG_IMM
),
1557 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1558 idecode
= insns
[val
];
1559 GOTO_EXTRACT (idecode
);
1563 static const IDESC
* insns
[2] = {
1564 I (INSN_STX_REG_REG
), I (INSN_STX_REG_IMM
),
1566 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1567 idecode
= insns
[val
];
1568 GOTO_EXTRACT (idecode
);
1572 static const IDESC
* insns
[2] = {
1573 I (INSN_SWAP_REG_REG
), I (INSN_SWAP_REG_IMM
),
1575 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1576 idecode
= insns
[val
];
1577 GOTO_EXTRACT (idecode
);
1581 static const IDESC
* insns
[2] = {
1582 I (INSN_FP_LD_REG_REG
), I (INSN_FP_LD_REG_IMM
),
1584 unsigned int val
= (((insn
>> 13) & (1 << 0)));
1585 idecode
= insns
[val
];
1586 GOTO_EXTRACT (idecode
);
1589 idecode
= insns
[val
];
1590 GOTO_EXTRACT (idecode
);
1598 /* Extraction is defered until the semantic code. */
projects / thirdparty / binutils-gdb.git / blob