sim/sparc/sem64.c

   1 /* Simulator instruction semantics for sparc64.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1999 Cygnus Solutions, Inc.
   6
   7 This file is part of the Cygnus Simulators.
   8
   9
  10 */
  11
  12 #define WANT_CPU sparc64
  13 #define WANT_CPU_SPARC64
  14
  15 #include "sim-main.h"
  16 #include "cgen-mem.h"
  17 #include "cgen-ops.h"
  18
  19 #undef GET_ATTR
  20 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
  21
  22 /* x-invalid: --invalid-- */
  23
  24 SEM_STATUS
  25 SEM_FN_NAME (sparc64,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  26 {
  27   SEM_STATUS status = 0;
  28   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  29   int UNUSED written = 0;
  30   IADDR UNUSED pc = GET_H_PC ();
  31   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  32   EXTRACT_IFMT_EMPTY_VARS /* */
  33   EXTRACT_IFMT_EMPTY_CODE
  34
  35   {
  36 #if WITH_SCACHE
  37     /* Update the recorded pc in the cpu state struct.  */
  38     SET_H_PC (pc);
  39 #endif
  40     sim_engine_invalid_insn (current_cpu, pc);
  41     sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
  42     /* NOTREACHED */
  43   }
  44
  45   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
  46   return status;
  47 }
  48
  49 /* x-after: --after-- */
  50
  51 SEM_STATUS
  52 SEM_FN_NAME (sparc64,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  53 {
  54   SEM_STATUS status = 0;
  55   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  56   int UNUSED written = 0;
  57   IADDR UNUSED pc = GET_H_PC ();
  58   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  59   EXTRACT_IFMT_EMPTY_VARS /* */
  60   EXTRACT_IFMT_EMPTY_CODE
  61
  62   {
  63 #if WITH_SCACHE_PBB_SPARC64
  64     sparc64_pbb_after (current_cpu, sem_arg);
  65 #endif
  66   }
  67
  68   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
  69   return status;
  70 }
  71
  72 /* x-before: --before-- */
  73
  74 SEM_STATUS
  75 SEM_FN_NAME (sparc64,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  76 {
  77   SEM_STATUS status = 0;
  78   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  79   int UNUSED written = 0;
  80   IADDR UNUSED pc = GET_H_PC ();
  81   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  82   EXTRACT_IFMT_EMPTY_VARS /* */
  83   EXTRACT_IFMT_EMPTY_CODE
  84
  85   {
  86 #if WITH_SCACHE_PBB_SPARC64
  87     sparc64_pbb_before (current_cpu, sem_arg);
  88 #endif
  89   }
  90
  91   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
  92   return status;
  93 }
  94
  95 /* x-cti-chain: --cti-chain-- */
  96
  97 SEM_STATUS
  98 SEM_FN_NAME (sparc64,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  99 {
 100   SEM_STATUS status = 0;
 101   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 102   int UNUSED written = 0;
 103   IADDR UNUSED pc = GET_H_PC ();
 104   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 105   EXTRACT_IFMT_EMPTY_VARS /* */
 106   EXTRACT_IFMT_EMPTY_CODE
 107
 108   {
 109 #if WITH_SCACHE_PBB_SPARC64
 110 #ifdef DEFINE_SWITCH
 111     vpc = sparc64_pbb_cti_chain (current_cpu, sem_arg,
 112                                pbb_br_npc_ptr, pbb_br_npc);
 113     BREAK (sem);
 114 #else
 115     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 116     vpc = sparc64_pbb_cti_chain (current_cpu, sem_arg,
 117                                CPU_PBB_BR_NPC_PTR (current_cpu),
 118                                CPU_PBB_BR_NPC (current_cpu));
 119 #endif
 120 #endif
 121   }
 122
 123   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
 124   return status;
 125 }
 126
 127 /* x-chain: --chain-- */
 128
 129 SEM_STATUS
 130 SEM_FN_NAME (sparc64,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 131 {
 132   SEM_STATUS status = 0;
 133   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 134   int UNUSED written = 0;
 135   IADDR UNUSED pc = GET_H_PC ();
 136   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 137   EXTRACT_IFMT_EMPTY_VARS /* */
 138   EXTRACT_IFMT_EMPTY_CODE
 139
 140   {
 141 #if WITH_SCACHE_PBB_SPARC64
 142     vpc = sparc64_pbb_chain (current_cpu, sem_arg);
 143 #ifdef DEFINE_SWITCH
 144     BREAK (sem);
 145 #endif
 146 #endif
 147   }
 148
 149   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
 150   return status;
 151 }
 152
 153 /* x-begin: --begin-- */
 154
 155 SEM_STATUS
 156 SEM_FN_NAME (sparc64,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 157 {
 158   SEM_STATUS status = 0;
 159   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 160   int UNUSED written = 0;
 161   IADDR UNUSED pc = GET_H_PC ();
 162   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 163   EXTRACT_IFMT_EMPTY_VARS /* */
 164   EXTRACT_IFMT_EMPTY_CODE
 165
 166   {
 167 #if WITH_SCACHE_PBB_SPARC64
 168 #ifdef DEFINE_SWITCH
 169     /* In the switch case FAST_P is a constant, allowing several optimizations
 170        in any called inline functions.  */
 171     vpc = sparc64_pbb_begin (current_cpu, FAST_P);
 172 #else
 173     vpc = sparc64_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 174 #endif
 175 #endif
 176   }
 177
 178   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
 179   return status;
 180 }
 181
 182 /* beqz: beqz$a$p $rs1,$disp16 */
 183
 184 SEM_STATUS
 185 SEM_FN_NAME (sparc64,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 186 {
 187   SEM_STATUS status = 0;
 188   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 189   int UNUSED written = 0;
 190   IADDR UNUSED pc = GET_H_PC ();
 191   SEM_BRANCH_INIT
 192   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 193   EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
 194       IADDR i_disp16;
 195   EXTRACT_IFMT_BEQZ_CODE
 196   i_disp16 = f_disp16;
 197
 198 do {
 199 if (EQSI (GET_H_GR (f_rs1), 0)) {
 200   {
 201     USI opval = i_disp16;
 202     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 203     written |= (1 << 3);
 204     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 205   }
 206 } else {
 207 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 208 }
 209 } while (0);
 210
 211   abuf->written = written;
 212   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 213   return status;
 214 }
 215
 216 /* bgez: bgez$a$p $rs1,$disp16 */
 217
 218 SEM_STATUS
 219 SEM_FN_NAME (sparc64,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 220 {
 221   SEM_STATUS status = 0;
 222   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 223   int UNUSED written = 0;
 224   IADDR UNUSED pc = GET_H_PC ();
 225   SEM_BRANCH_INIT
 226   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 227   EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
 228       IADDR i_disp16;
 229   EXTRACT_IFMT_BEQZ_CODE
 230   i_disp16 = f_disp16;
 231
 232 do {
 233 if (GESI (GET_H_GR (f_rs1), 0)) {
 234   {
 235     USI opval = i_disp16;
 236     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 237     written |= (1 << 3);
 238     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 239   }
 240 } else {
 241 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 242 }
 243 } while (0);
 244
 245   abuf->written = written;
 246   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 247   return status;
 248 }
 249
 250 /* bgtz: bgtz$a$p $rs1,$disp16 */
 251
 252 SEM_STATUS
 253 SEM_FN_NAME (sparc64,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 254 {
 255   SEM_STATUS status = 0;
 256   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 257   int UNUSED written = 0;
 258   IADDR UNUSED pc = GET_H_PC ();
 259   SEM_BRANCH_INIT
 260   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 261   EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
 262       IADDR i_disp16;
 263   EXTRACT_IFMT_BEQZ_CODE
 264   i_disp16 = f_disp16;
 265
 266 do {
 267 if (GTSI (GET_H_GR (f_rs1), 0)) {
 268   {
 269     USI opval = i_disp16;
 270     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 271     written |= (1 << 3);
 272     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 273   }
 274 } else {
 275 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 276 }
 277 } while (0);
 278
 279   abuf->written = written;
 280   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 281   return status;
 282 }
 283
 284 /* blez: blez$a$p $rs1,$disp16 */
 285
 286 SEM_STATUS
 287 SEM_FN_NAME (sparc64,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 288 {
 289   SEM_STATUS status = 0;
 290   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 291   int UNUSED written = 0;
 292   IADDR UNUSED pc = GET_H_PC ();
 293   SEM_BRANCH_INIT
 294   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 295   EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
 296       IADDR i_disp16;
 297   EXTRACT_IFMT_BEQZ_CODE
 298   i_disp16 = f_disp16;
 299
 300 do {
 301 if (LESI (GET_H_GR (f_rs1), 0)) {
 302   {
 303     USI opval = i_disp16;
 304     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 305     written |= (1 << 3);
 306     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 307   }
 308 } else {
 309 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 310 }
 311 } while (0);
 312
 313   abuf->written = written;
 314   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 315   return status;
 316 }
 317
 318 /* bltz: bltz$a$p $rs1,$disp16 */
 319
 320 SEM_STATUS
 321 SEM_FN_NAME (sparc64,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 322 {
 323   SEM_STATUS status = 0;
 324   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 325   int UNUSED written = 0;
 326   IADDR UNUSED pc = GET_H_PC ();
 327   SEM_BRANCH_INIT
 328   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 329   EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
 330       IADDR i_disp16;
 331   EXTRACT_IFMT_BEQZ_CODE
 332   i_disp16 = f_disp16;
 333
 334 do {
 335 if (LTSI (GET_H_GR (f_rs1), 0)) {
 336   {
 337     USI opval = i_disp16;
 338     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 339     written |= (1 << 3);
 340     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 341   }
 342 } else {
 343 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 344 }
 345 } while (0);
 346
 347   abuf->written = written;
 348   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 349   return status;
 350 }
 351
 352 /* bnez: bnez$a$p $rs1,$disp16 */
 353
 354 SEM_STATUS
 355 SEM_FN_NAME (sparc64,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 356 {
 357   SEM_STATUS status = 0;
 358   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 359   int UNUSED written = 0;
 360   IADDR UNUSED pc = GET_H_PC ();
 361   SEM_BRANCH_INIT
 362   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 363   EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
 364       IADDR i_disp16;
 365   EXTRACT_IFMT_BEQZ_CODE
 366   i_disp16 = f_disp16;
 367
 368 do {
 369 if (NESI (GET_H_GR (f_rs1), 0)) {
 370   {
 371     USI opval = i_disp16;
 372     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 373     written |= (1 << 3);
 374     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 375   }
 376 } else {
 377 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 378 }
 379 } while (0);
 380
 381   abuf->written = written;
 382   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 383   return status;
 384 }
 385
 386 /* bpcc-ba: ba$a$p %xcc,$disp19 */
 387
 388 SEM_STATUS
 389 SEM_FN_NAME (sparc64,bpcc_ba) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 390 {
 391   SEM_STATUS status = 0;
 392   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 393   int UNUSED written = 0;
 394   IADDR UNUSED pc = GET_H_PC ();
 395   SEM_BRANCH_INIT
 396   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 397   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 398       IADDR i_disp22;
 399   EXTRACT_IFMT_BPCC_BA_CODE
 400   i_disp22 = f_disp22;
 401
 402 do {
 403 do {
 404   {
 405     USI opval = i_disp22;
 406     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 407     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 408   }
 409 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 410 } while (0);
 411 } while (0);
 412
 413   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 414   return status;
 415 }
 416
 417 /* bpcc-bn: bn$a$p %xcc,$disp19 */
 418
 419 SEM_STATUS
 420 SEM_FN_NAME (sparc64,bpcc_bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 421 {
 422   SEM_STATUS status = 0;
 423   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 424   int UNUSED written = 0;
 425   IADDR UNUSED pc = GET_H_PC ();
 426   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 427   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 428   EXTRACT_IFMT_BPCC_BA_CODE
 429
 430 do {
 431 do {
 432 do { } while (0); /*nop*/
 433 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 434 } while (0);
 435 } while (0);
 436
 437   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 438   return status;
 439 }
 440
 441 /* bpcc-bne: bne$a$p %xcc,$disp19 */
 442
 443 SEM_STATUS
 444 SEM_FN_NAME (sparc64,bpcc_bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 445 {
 446   SEM_STATUS status = 0;
 447   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 448   int UNUSED written = 0;
 449   IADDR UNUSED pc = GET_H_PC ();
 450   SEM_BRANCH_INIT
 451   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 452   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 453       IADDR i_disp22;
 454   EXTRACT_IFMT_BPCC_BA_CODE
 455   i_disp22 = f_disp22;
 456
 457 do {
 458 if (NOTBI (CPU (h_xcc_z))) {
 459   {
 460     USI opval = i_disp22;
 461     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 462     written |= (1 << 3);
 463     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 464   }
 465 } else {
 466 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 467 }
 468 } while (0);
 469
 470   abuf->written = written;
 471   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 472   return status;
 473 }
 474
 475 /* bpcc-be: be$a$p %xcc,$disp19 */
 476
 477 SEM_STATUS
 478 SEM_FN_NAME (sparc64,bpcc_be) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 479 {
 480   SEM_STATUS status = 0;
 481   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 482   int UNUSED written = 0;
 483   IADDR UNUSED pc = GET_H_PC ();
 484   SEM_BRANCH_INIT
 485   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 486   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 487       IADDR i_disp22;
 488   EXTRACT_IFMT_BPCC_BA_CODE
 489   i_disp22 = f_disp22;
 490
 491 do {
 492 if (CPU (h_xcc_z)) {
 493   {
 494     USI opval = i_disp22;
 495     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 496     written |= (1 << 3);
 497     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 498   }
 499 } else {
 500 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 501 }
 502 } while (0);
 503
 504   abuf->written = written;
 505   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 506   return status;
 507 }
 508
 509 /* bpcc-bg: bg$a$p %xcc,$disp19 */
 510
 511 SEM_STATUS
 512 SEM_FN_NAME (sparc64,bpcc_bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 513 {
 514   SEM_STATUS status = 0;
 515   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 516   int UNUSED written = 0;
 517   IADDR UNUSED pc = GET_H_PC ();
 518   SEM_BRANCH_INIT
 519   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 520   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 521       IADDR i_disp22;
 522   EXTRACT_IFMT_BPCC_BA_CODE
 523   i_disp22 = f_disp22;
 524
 525 do {
 526 if (NOTBI (ORBI (CPU (h_xcc_z), XORBI (CPU (h_xcc_n), CPU (h_xcc_v))))) {
 527   {
 528     USI opval = i_disp22;
 529     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 530     written |= (1 << 5);
 531     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 532   }
 533 } else {
 534 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 535 }
 536 } while (0);
 537
 538   abuf->written = written;
 539   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 540   return status;
 541 }
 542
 543 /* bpcc-ble: ble$a$p %xcc,$disp19 */
 544
 545 SEM_STATUS
 546 SEM_FN_NAME (sparc64,bpcc_ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 547 {
 548   SEM_STATUS status = 0;
 549   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 550   int UNUSED written = 0;
 551   IADDR UNUSED pc = GET_H_PC ();
 552   SEM_BRANCH_INIT
 553   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 554   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 555       IADDR i_disp22;
 556   EXTRACT_IFMT_BPCC_BA_CODE
 557   i_disp22 = f_disp22;
 558
 559 do {
 560 if (ORBI (CPU (h_xcc_z), XORBI (CPU (h_xcc_n), CPU (h_xcc_v)))) {
 561   {
 562     USI opval = i_disp22;
 563     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 564     written |= (1 << 5);
 565     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 566   }
 567 } else {
 568 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 569 }
 570 } while (0);
 571
 572   abuf->written = written;
 573   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 574   return status;
 575 }
 576
 577 /* bpcc-bge: bge$a$p %xcc,$disp19 */
 578
 579 SEM_STATUS
 580 SEM_FN_NAME (sparc64,bpcc_bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 581 {
 582   SEM_STATUS status = 0;
 583   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 584   int UNUSED written = 0;
 585   IADDR UNUSED pc = GET_H_PC ();
 586   SEM_BRANCH_INIT
 587   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 588   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 589       IADDR i_disp22;
 590   EXTRACT_IFMT_BPCC_BA_CODE
 591   i_disp22 = f_disp22;
 592
 593 do {
 594 if (NOTBI (XORBI (CPU (h_xcc_n), CPU (h_xcc_v)))) {
 595   {
 596     USI opval = i_disp22;
 597     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 598     written |= (1 << 4);
 599     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 600   }
 601 } else {
 602 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 603 }
 604 } while (0);
 605
 606   abuf->written = written;
 607   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 608   return status;
 609 }
 610
 611 /* bpcc-bl: bl$a$p %xcc,$disp19 */
 612
 613 SEM_STATUS
 614 SEM_FN_NAME (sparc64,bpcc_bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 615 {
 616   SEM_STATUS status = 0;
 617   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 618   int UNUSED written = 0;
 619   IADDR UNUSED pc = GET_H_PC ();
 620   SEM_BRANCH_INIT
 621   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 622   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 623       IADDR i_disp22;
 624   EXTRACT_IFMT_BPCC_BA_CODE
 625   i_disp22 = f_disp22;
 626
 627 do {
 628 if (XORBI (CPU (h_xcc_n), CPU (h_xcc_v))) {
 629   {
 630     USI opval = i_disp22;
 631     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 632     written |= (1 << 4);
 633     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 634   }
 635 } else {
 636 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 637 }
 638 } while (0);
 639
 640   abuf->written = written;
 641   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 642   return status;
 643 }
 644
 645 /* bpcc-bgu: bgu$a$p %xcc,$disp19 */
 646
 647 SEM_STATUS
 648 SEM_FN_NAME (sparc64,bpcc_bgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 649 {
 650   SEM_STATUS status = 0;
 651   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 652   int UNUSED written = 0;
 653   IADDR UNUSED pc = GET_H_PC ();
 654   SEM_BRANCH_INIT
 655   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 656   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 657       IADDR i_disp22;
 658   EXTRACT_IFMT_BPCC_BA_CODE
 659   i_disp22 = f_disp22;
 660
 661 do {
 662 if (NOTBI (ORBI (CPU (h_xcc_c), CPU (h_xcc_z)))) {
 663   {
 664     USI opval = i_disp22;
 665     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 666     written |= (1 << 4);
 667     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 668   }
 669 } else {
 670 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 671 }
 672 } while (0);
 673
 674   abuf->written = written;
 675   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 676   return status;
 677 }
 678
 679 /* bpcc-bleu: bleu$a$p %xcc,$disp19 */
 680
 681 SEM_STATUS
 682 SEM_FN_NAME (sparc64,bpcc_bleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 683 {
 684   SEM_STATUS status = 0;
 685   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 686   int UNUSED written = 0;
 687   IADDR UNUSED pc = GET_H_PC ();
 688   SEM_BRANCH_INIT
 689   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 690   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 691       IADDR i_disp22;
 692   EXTRACT_IFMT_BPCC_BA_CODE
 693   i_disp22 = f_disp22;
 694
 695 do {
 696 if (ORBI (CPU (h_xcc_c), CPU (h_xcc_z))) {
 697   {
 698     USI opval = i_disp22;
 699     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 700     written |= (1 << 4);
 701     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 702   }
 703 } else {
 704 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 705 }
 706 } while (0);
 707
 708   abuf->written = written;
 709   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 710   return status;
 711 }
 712
 713 /* bpcc-bcc: bcc$a$p %xcc,$disp19 */
 714
 715 SEM_STATUS
 716 SEM_FN_NAME (sparc64,bpcc_bcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 717 {
 718   SEM_STATUS status = 0;
 719   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 720   int UNUSED written = 0;
 721   IADDR UNUSED pc = GET_H_PC ();
 722   SEM_BRANCH_INIT
 723   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 724   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 725       IADDR i_disp22;
 726   EXTRACT_IFMT_BPCC_BA_CODE
 727   i_disp22 = f_disp22;
 728
 729 do {
 730 if (NOTBI (CPU (h_xcc_c))) {
 731   {
 732     USI opval = i_disp22;
 733     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 734     written |= (1 << 3);
 735     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 736   }
 737 } else {
 738 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 739 }
 740 } while (0);
 741
 742   abuf->written = written;
 743   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 744   return status;
 745 }
 746
 747 /* bpcc-bcs: bcs$a$p %xcc,$disp19 */
 748
 749 SEM_STATUS
 750 SEM_FN_NAME (sparc64,bpcc_bcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 751 {
 752   SEM_STATUS status = 0;
 753   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 754   int UNUSED written = 0;
 755   IADDR UNUSED pc = GET_H_PC ();
 756   SEM_BRANCH_INIT
 757   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 758   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 759       IADDR i_disp22;
 760   EXTRACT_IFMT_BPCC_BA_CODE
 761   i_disp22 = f_disp22;
 762
 763 do {
 764 if (CPU (h_xcc_c)) {
 765   {
 766     USI opval = i_disp22;
 767     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 768     written |= (1 << 3);
 769     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 770   }
 771 } else {
 772 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 773 }
 774 } while (0);
 775
 776   abuf->written = written;
 777   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 778   return status;
 779 }
 780
 781 /* bpcc-bpos: bpos$a$p %xcc,$disp19 */
 782
 783 SEM_STATUS
 784 SEM_FN_NAME (sparc64,bpcc_bpos) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 785 {
 786   SEM_STATUS status = 0;
 787   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 788   int UNUSED written = 0;
 789   IADDR UNUSED pc = GET_H_PC ();
 790   SEM_BRANCH_INIT
 791   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 792   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 793       IADDR i_disp22;
 794   EXTRACT_IFMT_BPCC_BA_CODE
 795   i_disp22 = f_disp22;
 796
 797 do {
 798 if (NOTBI (CPU (h_xcc_n))) {
 799   {
 800     USI opval = i_disp22;
 801     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 802     written |= (1 << 3);
 803     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 804   }
 805 } else {
 806 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 807 }
 808 } while (0);
 809
 810   abuf->written = written;
 811   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 812   return status;
 813 }
 814
 815 /* bpcc-bneg: bneg$a$p %xcc,$disp19 */
 816
 817 SEM_STATUS
 818 SEM_FN_NAME (sparc64,bpcc_bneg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 819 {
 820   SEM_STATUS status = 0;
 821   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 822   int UNUSED written = 0;
 823   IADDR UNUSED pc = GET_H_PC ();
 824   SEM_BRANCH_INIT
 825   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 826   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 827       IADDR i_disp22;
 828   EXTRACT_IFMT_BPCC_BA_CODE
 829   i_disp22 = f_disp22;
 830
 831 do {
 832 if (CPU (h_xcc_n)) {
 833   {
 834     USI opval = i_disp22;
 835     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 836     written |= (1 << 3);
 837     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 838   }
 839 } else {
 840 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 841 }
 842 } while (0);
 843
 844   abuf->written = written;
 845   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 846   return status;
 847 }
 848
 849 /* bpcc-bvc: bvc$a$p %xcc,$disp19 */
 850
 851 SEM_STATUS
 852 SEM_FN_NAME (sparc64,bpcc_bvc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 853 {
 854   SEM_STATUS status = 0;
 855   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 856   int UNUSED written = 0;
 857   IADDR UNUSED pc = GET_H_PC ();
 858   SEM_BRANCH_INIT
 859   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 860   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 861       IADDR i_disp22;
 862   EXTRACT_IFMT_BPCC_BA_CODE
 863   i_disp22 = f_disp22;
 864
 865 do {
 866 if (NOTBI (CPU (h_xcc_v))) {
 867   {
 868     USI opval = i_disp22;
 869     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 870     written |= (1 << 3);
 871     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 872   }
 873 } else {
 874 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 875 }
 876 } while (0);
 877
 878   abuf->written = written;
 879   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 880   return status;
 881 }
 882
 883 /* bpcc-bvs: bvs$a$p %xcc,$disp19 */
 884
 885 SEM_STATUS
 886 SEM_FN_NAME (sparc64,bpcc_bvs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 887 {
 888   SEM_STATUS status = 0;
 889   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 890   int UNUSED written = 0;
 891   IADDR UNUSED pc = GET_H_PC ();
 892   SEM_BRANCH_INIT
 893   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 894   EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
 895       IADDR i_disp22;
 896   EXTRACT_IFMT_BPCC_BA_CODE
 897   i_disp22 = f_disp22;
 898
 899 do {
 900 if (CPU (h_xcc_v)) {
 901   {
 902     USI opval = i_disp22;
 903     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 904     written |= (1 << 3);
 905     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 906   }
 907 } else {
 908 SEM_ANNUL_INSN (current_cpu, pc, f_a);
 909 }
 910 } while (0);
 911
 912   abuf->written = written;
 913   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
 914   return status;
 915 }
 916
 917 /* done: done */
 918
 919 SEM_STATUS
 920 SEM_FN_NAME (sparc64,done) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 921 {
 922   SEM_STATUS status = 0;
 923   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 924   int UNUSED written = 0;
 925   IADDR UNUSED pc = GET_H_PC ();
 926   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 927   EXTRACT_IFMT_DONE_VARS /* f-res-18-19 f-op3 f-fcn f-op */
 928   EXTRACT_IFMT_DONE_CODE
 929
 930 sparc64_done (current_cpu, pc);
 931
 932   SEM_NBRANCH_FINI (vpc, 0);
 933   return status;
 934 }
 935
 936 /* retry: done */
 937
 938 SEM_STATUS
 939 SEM_FN_NAME (sparc64,retry) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 940 {
 941   SEM_STATUS status = 0;
 942   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 943   int UNUSED written = 0;
 944   IADDR UNUSED pc = GET_H_PC ();
 945   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 946   EXTRACT_IFMT_DONE_VARS /* f-res-18-19 f-op3 f-fcn f-op */
 947   EXTRACT_IFMT_DONE_CODE
 948
 949 sparc64_retry (current_cpu, pc);
 950
 951   SEM_NBRANCH_FINI (vpc, 0);
 952   return status;
 953 }
 954
 955 /* flush: flush */
 956
 957 SEM_STATUS
 958 SEM_FN_NAME (sparc64,flush) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 959 {
 960   SEM_STATUS status = 0;
 961   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 962   int UNUSED written = 0;
 963   IADDR UNUSED pc = GET_H_PC ();
 964   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 965   EXTRACT_IFMT_FLUSH_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 966   EXTRACT_IFMT_FLUSH_CODE
 967
 968 sparc64_flush (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 969
 970   SEM_NBRANCH_FINI (vpc, 0);
 971   return status;
 972 }
 973
 974 /* flush-imm: flush */
 975
 976 SEM_STATUS
 977 SEM_FN_NAME (sparc64,flush_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 978 {
 979   SEM_STATUS status = 0;
 980   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 981   int UNUSED written = 0;
 982   IADDR UNUSED pc = GET_H_PC ();
 983   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 984   EXTRACT_IFMT_FLUSH_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 985   EXTRACT_IFMT_FLUSH_IMM_CODE
 986
 987 sparc64_flush (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 988
 989   SEM_NBRANCH_FINI (vpc, 0);
 990   return status;
 991 }
 992
 993 /* flushw: flushw */
 994
 995 SEM_STATUS
 996 SEM_FN_NAME (sparc64,flushw) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 997 {
 998   SEM_STATUS status = 0;
 999   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1000   int UNUSED written = 0;
1001   IADDR UNUSED pc = GET_H_PC ();
1002   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1003   EXTRACT_IFMT_FLUSHW_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1004   EXTRACT_IFMT_FLUSHW_CODE
1005
1006 sparc64_flushw (current_cpu, pc);
1007
1008   SEM_NBRANCH_FINI (vpc, 0);
1009   return status;
1010 }
1011
1012 /* impdep1: impdep1 $impdep5,$impdep19 */
1013
1014 SEM_STATUS
1015 SEM_FN_NAME (sparc64,impdep1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1016 {
1017   SEM_STATUS status = 0;
1018   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1019   int UNUSED written = 0;
1020   IADDR UNUSED pc = GET_H_PC ();
1021   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1022   EXTRACT_IFMT_IMPDEP1_VARS /* f-impdep19 f-op3 f-impdep5 f-op */
1023   EXTRACT_IFMT_IMPDEP1_CODE
1024
1025 sparc64_impdep1 (current_cpu, pc, f_impdep5, f_impdep19);
1026
1027   SEM_NBRANCH_FINI (vpc, 0);
1028   return status;
1029 }
1030
1031 /* impdep2: impdep2 $impdep5,$impdep19 */
1032
1033 SEM_STATUS
1034 SEM_FN_NAME (sparc64,impdep2) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1035 {
1036   SEM_STATUS status = 0;
1037   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1038   int UNUSED written = 0;
1039   IADDR UNUSED pc = GET_H_PC ();
1040   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1041   EXTRACT_IFMT_IMPDEP1_VARS /* f-impdep19 f-op3 f-impdep5 f-op */
1042   EXTRACT_IFMT_IMPDEP1_CODE
1043
1044 sparc64_impdep2 (current_cpu, pc, f_impdep5, f_impdep19);
1045
1046   SEM_NBRANCH_FINI (vpc, 0);
1047   return status;
1048 }
1049
1050 /* membar: member $membarmask */
1051
1052 SEM_STATUS
1053 SEM_FN_NAME (sparc64,membar) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1054 {
1055   SEM_STATUS status = 0;
1056   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1057   int UNUSED written = 0;
1058   IADDR UNUSED pc = GET_H_PC ();
1059   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1060   EXTRACT_IFMT_MEMBAR_VARS /* f-membarmask f-membar-res12-6 f-i f-rs1 f-op3 f-rd f-op */
1061   EXTRACT_IFMT_MEMBAR_CODE
1062
1063 sparc64_membar (current_cpu, pc, f_membarmask);
1064
1065   SEM_NBRANCH_FINI (vpc, 0);
1066   return status;
1067 }
1068
1069 /* mova-icc-icc: mova-icc %icc,$rs2,$rd */
1070
1071 SEM_STATUS
1072 SEM_FN_NAME (sparc64,mova_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1073 {
1074   SEM_STATUS status = 0;
1075   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1076   int UNUSED written = 0;
1077   IADDR UNUSED pc = GET_H_PC ();
1078   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1079   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1080   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1081
1082   {
1083     SI opval = GET_H_GR (f_rs2);
1084     SET_H_GR (f_rd, opval);
1085     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1086   }
1087
1088   SEM_NBRANCH_FINI (vpc, 0);
1089   return status;
1090 }
1091
1092 /* mova-imm-icc-icc: mova-imm-icc %icc,$simm11,$rd */
1093
1094 SEM_STATUS
1095 SEM_FN_NAME (sparc64,mova_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1096 {
1097   SEM_STATUS status = 0;
1098   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1099   int UNUSED written = 0;
1100   IADDR UNUSED pc = GET_H_PC ();
1101   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1102   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1103   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1104
1105   {
1106     SI opval = f_simm11;
1107     SET_H_GR (f_rd, opval);
1108     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1109   }
1110
1111   SEM_NBRANCH_FINI (vpc, 0);
1112   return status;
1113 }
1114
1115 /* mova-xcc-xcc: mova-xcc %xcc,$rs2,$rd */
1116
1117 SEM_STATUS
1118 SEM_FN_NAME (sparc64,mova_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1119 {
1120   SEM_STATUS status = 0;
1121   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1122   int UNUSED written = 0;
1123   IADDR UNUSED pc = GET_H_PC ();
1124   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1125   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1126   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1127
1128   {
1129     SI opval = GET_H_GR (f_rs2);
1130     SET_H_GR (f_rd, opval);
1131     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1132   }
1133
1134   SEM_NBRANCH_FINI (vpc, 0);
1135   return status;
1136 }
1137
1138 /* mova-imm-xcc-xcc: mova-imm-xcc %xcc,$simm11,$rd */
1139
1140 SEM_STATUS
1141 SEM_FN_NAME (sparc64,mova_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1142 {
1143   SEM_STATUS status = 0;
1144   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1145   int UNUSED written = 0;
1146   IADDR UNUSED pc = GET_H_PC ();
1147   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1148   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1149   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1150
1151   {
1152     SI opval = f_simm11;
1153     SET_H_GR (f_rd, opval);
1154     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1155   }
1156
1157   SEM_NBRANCH_FINI (vpc, 0);
1158   return status;
1159 }
1160
1161 /* movn-icc-icc: movn-icc %icc,$rs2,$rd */
1162
1163 SEM_STATUS
1164 SEM_FN_NAME (sparc64,movn_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1165 {
1166   SEM_STATUS status = 0;
1167   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1168   int UNUSED written = 0;
1169   IADDR UNUSED pc = GET_H_PC ();
1170   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1171   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1172   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1173
1174 do { } while (0); /*nop*/
1175
1176   SEM_NBRANCH_FINI (vpc, 0);
1177   return status;
1178 }
1179
1180 /* movn-imm-icc-icc: movn-imm-icc %icc,$simm11,$rd */
1181
1182 SEM_STATUS
1183 SEM_FN_NAME (sparc64,movn_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1184 {
1185   SEM_STATUS status = 0;
1186   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1187   int UNUSED written = 0;
1188   IADDR UNUSED pc = GET_H_PC ();
1189   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1190   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1191   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1192
1193 do { } while (0); /*nop*/
1194
1195   SEM_NBRANCH_FINI (vpc, 0);
1196   return status;
1197 }
1198
1199 /* movn-xcc-xcc: movn-xcc %xcc,$rs2,$rd */
1200
1201 SEM_STATUS
1202 SEM_FN_NAME (sparc64,movn_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1203 {
1204   SEM_STATUS status = 0;
1205   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1206   int UNUSED written = 0;
1207   IADDR UNUSED pc = GET_H_PC ();
1208   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1209   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1210   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1211
1212 do { } while (0); /*nop*/
1213
1214   SEM_NBRANCH_FINI (vpc, 0);
1215   return status;
1216 }
1217
1218 /* movn-imm-xcc-xcc: movn-imm-xcc %xcc,$simm11,$rd */
1219
1220 SEM_STATUS
1221 SEM_FN_NAME (sparc64,movn_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1222 {
1223   SEM_STATUS status = 0;
1224   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1225   int UNUSED written = 0;
1226   IADDR UNUSED pc = GET_H_PC ();
1227   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1228   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1229   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1230
1231 do { } while (0); /*nop*/
1232
1233   SEM_NBRANCH_FINI (vpc, 0);
1234   return status;
1235 }
1236
1237 /* movne-icc-icc: movne-icc %icc,$rs2,$rd */
1238
1239 SEM_STATUS
1240 SEM_FN_NAME (sparc64,movne_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1241 {
1242   SEM_STATUS status = 0;
1243   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1244   int UNUSED written = 0;
1245   IADDR UNUSED pc = GET_H_PC ();
1246   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1247   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1248   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1249
1250 if (NOTBI (CPU (h_icc_z))) {
1251   {
1252     SI opval = GET_H_GR (f_rs2);
1253     SET_H_GR (f_rd, opval);
1254     written |= (1 << 2);
1255     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1256   }
1257 }
1258
1259   abuf->written = written;
1260   SEM_NBRANCH_FINI (vpc, 0);
1261   return status;
1262 }
1263
1264 /* movne-imm-icc-icc: movne-imm-icc %icc,$simm11,$rd */
1265
1266 SEM_STATUS
1267 SEM_FN_NAME (sparc64,movne_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1268 {
1269   SEM_STATUS status = 0;
1270   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1271   int UNUSED written = 0;
1272   IADDR UNUSED pc = GET_H_PC ();
1273   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1274   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1275   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1276
1277 if (NOTBI (CPU (h_icc_z))) {
1278   {
1279     SI opval = f_simm11;
1280     SET_H_GR (f_rd, opval);
1281     written |= (1 << 2);
1282     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1283   }
1284 }
1285
1286   abuf->written = written;
1287   SEM_NBRANCH_FINI (vpc, 0);
1288   return status;
1289 }
1290
1291 /* movne-xcc-xcc: movne-xcc %xcc,$rs2,$rd */
1292
1293 SEM_STATUS
1294 SEM_FN_NAME (sparc64,movne_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1295 {
1296   SEM_STATUS status = 0;
1297   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1298   int UNUSED written = 0;
1299   IADDR UNUSED pc = GET_H_PC ();
1300   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1301   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1302   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1303
1304 if (NOTBI (CPU (h_xcc_z))) {
1305   {
1306     SI opval = GET_H_GR (f_rs2);
1307     SET_H_GR (f_rd, opval);
1308     written |= (1 << 2);
1309     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1310   }
1311 }
1312
1313   abuf->written = written;
1314   SEM_NBRANCH_FINI (vpc, 0);
1315   return status;
1316 }
1317
1318 /* movne-imm-xcc-xcc: movne-imm-xcc %xcc,$simm11,$rd */
1319
1320 SEM_STATUS
1321 SEM_FN_NAME (sparc64,movne_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1322 {
1323   SEM_STATUS status = 0;
1324   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1325   int UNUSED written = 0;
1326   IADDR UNUSED pc = GET_H_PC ();
1327   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1328   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1329   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1330
1331 if (NOTBI (CPU (h_xcc_z))) {
1332   {
1333     SI opval = f_simm11;
1334     SET_H_GR (f_rd, opval);
1335     written |= (1 << 2);
1336     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1337   }
1338 }
1339
1340   abuf->written = written;
1341   SEM_NBRANCH_FINI (vpc, 0);
1342   return status;
1343 }
1344
1345 /* move-icc-icc: move-icc %icc,$rs2,$rd */
1346
1347 SEM_STATUS
1348 SEM_FN_NAME (sparc64,move_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1349 {
1350   SEM_STATUS status = 0;
1351   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1352   int UNUSED written = 0;
1353   IADDR UNUSED pc = GET_H_PC ();
1354   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1355   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1356   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1357
1358 if (CPU (h_icc_z)) {
1359   {
1360     SI opval = GET_H_GR (f_rs2);
1361     SET_H_GR (f_rd, opval);
1362     written |= (1 << 2);
1363     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1364   }
1365 }
1366
1367   abuf->written = written;
1368   SEM_NBRANCH_FINI (vpc, 0);
1369   return status;
1370 }
1371
1372 /* move-imm-icc-icc: move-imm-icc %icc,$simm11,$rd */
1373
1374 SEM_STATUS
1375 SEM_FN_NAME (sparc64,move_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1376 {
1377   SEM_STATUS status = 0;
1378   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1379   int UNUSED written = 0;
1380   IADDR UNUSED pc = GET_H_PC ();
1381   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1382   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1383   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1384
1385 if (CPU (h_icc_z)) {
1386   {
1387     SI opval = f_simm11;
1388     SET_H_GR (f_rd, opval);
1389     written |= (1 << 2);
1390     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1391   }
1392 }
1393
1394   abuf->written = written;
1395   SEM_NBRANCH_FINI (vpc, 0);
1396   return status;
1397 }
1398
1399 /* move-xcc-xcc: move-xcc %xcc,$rs2,$rd */
1400
1401 SEM_STATUS
1402 SEM_FN_NAME (sparc64,move_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1403 {
1404   SEM_STATUS status = 0;
1405   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1406   int UNUSED written = 0;
1407   IADDR UNUSED pc = GET_H_PC ();
1408   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1409   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1410   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1411
1412 if (CPU (h_xcc_z)) {
1413   {
1414     SI opval = GET_H_GR (f_rs2);
1415     SET_H_GR (f_rd, opval);
1416     written |= (1 << 2);
1417     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1418   }
1419 }
1420
1421   abuf->written = written;
1422   SEM_NBRANCH_FINI (vpc, 0);
1423   return status;
1424 }
1425
1426 /* move-imm-xcc-xcc: move-imm-xcc %xcc,$simm11,$rd */
1427
1428 SEM_STATUS
1429 SEM_FN_NAME (sparc64,move_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1430 {
1431   SEM_STATUS status = 0;
1432   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1433   int UNUSED written = 0;
1434   IADDR UNUSED pc = GET_H_PC ();
1435   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1436   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1437   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1438
1439 if (CPU (h_xcc_z)) {
1440   {
1441     SI opval = f_simm11;
1442     SET_H_GR (f_rd, opval);
1443     written |= (1 << 2);
1444     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1445   }
1446 }
1447
1448   abuf->written = written;
1449   SEM_NBRANCH_FINI (vpc, 0);
1450   return status;
1451 }
1452
1453 /* movg-icc-icc: movg-icc %icc,$rs2,$rd */
1454
1455 SEM_STATUS
1456 SEM_FN_NAME (sparc64,movg_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1457 {
1458   SEM_STATUS status = 0;
1459   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1460   int UNUSED written = 0;
1461   IADDR UNUSED pc = GET_H_PC ();
1462   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1463   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1464   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1465
1466 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
1467   {
1468     SI opval = GET_H_GR (f_rs2);
1469     SET_H_GR (f_rd, opval);
1470     written |= (1 << 4);
1471     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1472   }
1473 }
1474
1475   abuf->written = written;
1476   SEM_NBRANCH_FINI (vpc, 0);
1477   return status;
1478 }
1479
1480 /* movg-imm-icc-icc: movg-imm-icc %icc,$simm11,$rd */
1481
1482 SEM_STATUS
1483 SEM_FN_NAME (sparc64,movg_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1484 {
1485   SEM_STATUS status = 0;
1486   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1487   int UNUSED written = 0;
1488   IADDR UNUSED pc = GET_H_PC ();
1489   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1490   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1491   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1492
1493 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
1494   {
1495     SI opval = f_simm11;
1496     SET_H_GR (f_rd, opval);
1497     written |= (1 << 4);
1498     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1499   }
1500 }
1501
1502   abuf->written = written;
1503   SEM_NBRANCH_FINI (vpc, 0);
1504   return status;
1505 }
1506
1507 /* movg-xcc-xcc: movg-xcc %xcc,$rs2,$rd */
1508
1509 SEM_STATUS
1510 SEM_FN_NAME (sparc64,movg_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1511 {
1512   SEM_STATUS status = 0;
1513   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1514   int UNUSED written = 0;
1515   IADDR UNUSED pc = GET_H_PC ();
1516   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1517   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1518   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1519
1520 if (NOTBI (ORBI (CPU (h_xcc_z), XORBI (CPU (h_xcc_n), CPU (h_xcc_v))))) {
1521   {
1522     SI opval = GET_H_GR (f_rs2);
1523     SET_H_GR (f_rd, opval);
1524     written |= (1 << 4);
1525     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1526   }
1527 }
1528
1529   abuf->written = written;
1530   SEM_NBRANCH_FINI (vpc, 0);
1531   return status;
1532 }
1533
1534 /* movg-imm-xcc-xcc: movg-imm-xcc %xcc,$simm11,$rd */
1535
1536 SEM_STATUS
1537 SEM_FN_NAME (sparc64,movg_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1538 {
1539   SEM_STATUS status = 0;
1540   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1541   int UNUSED written = 0;
1542   IADDR UNUSED pc = GET_H_PC ();
1543   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1544   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1545   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1546
1547 if (NOTBI (ORBI (CPU (h_xcc_z), XORBI (CPU (h_xcc_n), CPU (h_xcc_v))))) {
1548   {
1549     SI opval = f_simm11;
1550     SET_H_GR (f_rd, opval);
1551     written |= (1 << 4);
1552     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1553   }
1554 }
1555
1556   abuf->written = written;
1557   SEM_NBRANCH_FINI (vpc, 0);
1558   return status;
1559 }
1560
1561 /* movle-icc-icc: movle-icc %icc,$rs2,$rd */
1562
1563 SEM_STATUS
1564 SEM_FN_NAME (sparc64,movle_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1565 {
1566   SEM_STATUS status = 0;
1567   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1568   int UNUSED written = 0;
1569   IADDR UNUSED pc = GET_H_PC ();
1570   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1571   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1572   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1573
1574 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
1575   {
1576     SI opval = GET_H_GR (f_rs2);
1577     SET_H_GR (f_rd, opval);
1578     written |= (1 << 4);
1579     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1580   }
1581 }
1582
1583   abuf->written = written;
1584   SEM_NBRANCH_FINI (vpc, 0);
1585   return status;
1586 }
1587
1588 /* movle-imm-icc-icc: movle-imm-icc %icc,$simm11,$rd */
1589
1590 SEM_STATUS
1591 SEM_FN_NAME (sparc64,movle_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1592 {
1593   SEM_STATUS status = 0;
1594   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1595   int UNUSED written = 0;
1596   IADDR UNUSED pc = GET_H_PC ();
1597   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1598   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1599   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1600
1601 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
1602   {
1603     SI opval = f_simm11;
1604     SET_H_GR (f_rd, opval);
1605     written |= (1 << 4);
1606     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1607   }
1608 }
1609
1610   abuf->written = written;
1611   SEM_NBRANCH_FINI (vpc, 0);
1612   return status;
1613 }
1614
1615 /* movle-xcc-xcc: movle-xcc %xcc,$rs2,$rd */
1616
1617 SEM_STATUS
1618 SEM_FN_NAME (sparc64,movle_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1619 {
1620   SEM_STATUS status = 0;
1621   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1622   int UNUSED written = 0;
1623   IADDR UNUSED pc = GET_H_PC ();
1624   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1625   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1626   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1627
1628 if (ORBI (CPU (h_xcc_z), XORBI (CPU (h_xcc_n), CPU (h_xcc_v)))) {
1629   {
1630     SI opval = GET_H_GR (f_rs2);
1631     SET_H_GR (f_rd, opval);
1632     written |= (1 << 4);
1633     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1634   }
1635 }
1636
1637   abuf->written = written;
1638   SEM_NBRANCH_FINI (vpc, 0);
1639   return status;
1640 }
1641
1642 /* movle-imm-xcc-xcc: movle-imm-xcc %xcc,$simm11,$rd */
1643
1644 SEM_STATUS
1645 SEM_FN_NAME (sparc64,movle_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1646 {
1647   SEM_STATUS status = 0;
1648   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1649   int UNUSED written = 0;
1650   IADDR UNUSED pc = GET_H_PC ();
1651   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1652   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1653   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1654
1655 if (ORBI (CPU (h_xcc_z), XORBI (CPU (h_xcc_n), CPU (h_xcc_v)))) {
1656   {
1657     SI opval = f_simm11;
1658     SET_H_GR (f_rd, opval);
1659     written |= (1 << 4);
1660     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1661   }
1662 }
1663
1664   abuf->written = written;
1665   SEM_NBRANCH_FINI (vpc, 0);
1666   return status;
1667 }
1668
1669 /* movge-icc-icc: movge-icc %icc,$rs2,$rd */
1670
1671 SEM_STATUS
1672 SEM_FN_NAME (sparc64,movge_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1673 {
1674   SEM_STATUS status = 0;
1675   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1676   int UNUSED written = 0;
1677   IADDR UNUSED pc = GET_H_PC ();
1678   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1679   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1680   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1681
1682 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
1683   {
1684     SI opval = GET_H_GR (f_rs2);
1685     SET_H_GR (f_rd, opval);
1686     written |= (1 << 3);
1687     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1688   }
1689 }
1690
1691   abuf->written = written;
1692   SEM_NBRANCH_FINI (vpc, 0);
1693   return status;
1694 }
1695
1696 /* movge-imm-icc-icc: movge-imm-icc %icc,$simm11,$rd */
1697
1698 SEM_STATUS
1699 SEM_FN_NAME (sparc64,movge_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1700 {
1701   SEM_STATUS status = 0;
1702   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1703   int UNUSED written = 0;
1704   IADDR UNUSED pc = GET_H_PC ();
1705   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1706   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1707   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1708
1709 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
1710   {
1711     SI opval = f_simm11;
1712     SET_H_GR (f_rd, opval);
1713     written |= (1 << 3);
1714     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1715   }
1716 }
1717
1718   abuf->written = written;
1719   SEM_NBRANCH_FINI (vpc, 0);
1720   return status;
1721 }
1722
1723 /* movge-xcc-xcc: movge-xcc %xcc,$rs2,$rd */
1724
1725 SEM_STATUS
1726 SEM_FN_NAME (sparc64,movge_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1727 {
1728   SEM_STATUS status = 0;
1729   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1730   int UNUSED written = 0;
1731   IADDR UNUSED pc = GET_H_PC ();
1732   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1733   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1734   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1735
1736 if (NOTBI (XORBI (CPU (h_xcc_n), CPU (h_xcc_v)))) {
1737   {
1738     SI opval = GET_H_GR (f_rs2);
1739     SET_H_GR (f_rd, opval);
1740     written |= (1 << 3);
1741     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1742   }
1743 }
1744
1745   abuf->written = written;
1746   SEM_NBRANCH_FINI (vpc, 0);
1747   return status;
1748 }
1749
1750 /* movge-imm-xcc-xcc: movge-imm-xcc %xcc,$simm11,$rd */
1751
1752 SEM_STATUS
1753 SEM_FN_NAME (sparc64,movge_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1754 {
1755   SEM_STATUS status = 0;
1756   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1757   int UNUSED written = 0;
1758   IADDR UNUSED pc = GET_H_PC ();
1759   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1760   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1761   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1762
1763 if (NOTBI (XORBI (CPU (h_xcc_n), CPU (h_xcc_v)))) {
1764   {
1765     SI opval = f_simm11;
1766     SET_H_GR (f_rd, opval);
1767     written |= (1 << 3);
1768     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1769   }
1770 }
1771
1772   abuf->written = written;
1773   SEM_NBRANCH_FINI (vpc, 0);
1774   return status;
1775 }
1776
1777 /* movl-icc-icc: movl-icc %icc,$rs2,$rd */
1778
1779 SEM_STATUS
1780 SEM_FN_NAME (sparc64,movl_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1781 {
1782   SEM_STATUS status = 0;
1783   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1784   int UNUSED written = 0;
1785   IADDR UNUSED pc = GET_H_PC ();
1786   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1787   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1788   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1789
1790 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
1791   {
1792     SI opval = GET_H_GR (f_rs2);
1793     SET_H_GR (f_rd, opval);
1794     written |= (1 << 3);
1795     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1796   }
1797 }
1798
1799   abuf->written = written;
1800   SEM_NBRANCH_FINI (vpc, 0);
1801   return status;
1802 }
1803
1804 /* movl-imm-icc-icc: movl-imm-icc %icc,$simm11,$rd */
1805
1806 SEM_STATUS
1807 SEM_FN_NAME (sparc64,movl_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1808 {
1809   SEM_STATUS status = 0;
1810   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1811   int UNUSED written = 0;
1812   IADDR UNUSED pc = GET_H_PC ();
1813   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1814   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1815   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1816
1817 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
1818   {
1819     SI opval = f_simm11;
1820     SET_H_GR (f_rd, opval);
1821     written |= (1 << 3);
1822     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1823   }
1824 }
1825
1826   abuf->written = written;
1827   SEM_NBRANCH_FINI (vpc, 0);
1828   return status;
1829 }
1830
1831 /* movl-xcc-xcc: movl-xcc %xcc,$rs2,$rd */
1832
1833 SEM_STATUS
1834 SEM_FN_NAME (sparc64,movl_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1835 {
1836   SEM_STATUS status = 0;
1837   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1838   int UNUSED written = 0;
1839   IADDR UNUSED pc = GET_H_PC ();
1840   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1841   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1842   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1843
1844 if (XORBI (CPU (h_xcc_n), CPU (h_xcc_v))) {
1845   {
1846     SI opval = GET_H_GR (f_rs2);
1847     SET_H_GR (f_rd, opval);
1848     written |= (1 << 3);
1849     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1850   }
1851 }
1852
1853   abuf->written = written;
1854   SEM_NBRANCH_FINI (vpc, 0);
1855   return status;
1856 }
1857
1858 /* movl-imm-xcc-xcc: movl-imm-xcc %xcc,$simm11,$rd */
1859
1860 SEM_STATUS
1861 SEM_FN_NAME (sparc64,movl_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1862 {
1863   SEM_STATUS status = 0;
1864   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1865   int UNUSED written = 0;
1866   IADDR UNUSED pc = GET_H_PC ();
1867   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1868   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1869   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1870
1871 if (XORBI (CPU (h_xcc_n), CPU (h_xcc_v))) {
1872   {
1873     SI opval = f_simm11;
1874     SET_H_GR (f_rd, opval);
1875     written |= (1 << 3);
1876     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1877   }
1878 }
1879
1880   abuf->written = written;
1881   SEM_NBRANCH_FINI (vpc, 0);
1882   return status;
1883 }
1884
1885 /* movgu-icc-icc: movgu-icc %icc,$rs2,$rd */
1886
1887 SEM_STATUS
1888 SEM_FN_NAME (sparc64,movgu_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1889 {
1890   SEM_STATUS status = 0;
1891   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1892   int UNUSED written = 0;
1893   IADDR UNUSED pc = GET_H_PC ();
1894   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1895   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1896   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1897
1898 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
1899   {
1900     SI opval = GET_H_GR (f_rs2);
1901     SET_H_GR (f_rd, opval);
1902     written |= (1 << 3);
1903     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1904   }
1905 }
1906
1907   abuf->written = written;
1908   SEM_NBRANCH_FINI (vpc, 0);
1909   return status;
1910 }
1911
1912 /* movgu-imm-icc-icc: movgu-imm-icc %icc,$simm11,$rd */
1913
1914 SEM_STATUS
1915 SEM_FN_NAME (sparc64,movgu_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1916 {
1917   SEM_STATUS status = 0;
1918   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1919   int UNUSED written = 0;
1920   IADDR UNUSED pc = GET_H_PC ();
1921   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1922   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1923   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1924
1925 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
1926   {
1927     SI opval = f_simm11;
1928     SET_H_GR (f_rd, opval);
1929     written |= (1 << 3);
1930     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1931   }
1932 }
1933
1934   abuf->written = written;
1935   SEM_NBRANCH_FINI (vpc, 0);
1936   return status;
1937 }
1938
1939 /* movgu-xcc-xcc: movgu-xcc %xcc,$rs2,$rd */
1940
1941 SEM_STATUS
1942 SEM_FN_NAME (sparc64,movgu_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1943 {
1944   SEM_STATUS status = 0;
1945   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1946   int UNUSED written = 0;
1947   IADDR UNUSED pc = GET_H_PC ();
1948   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1949   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1950   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1951
1952 if (NOTBI (ORBI (CPU (h_xcc_c), CPU (h_xcc_z)))) {
1953   {
1954     SI opval = GET_H_GR (f_rs2);
1955     SET_H_GR (f_rd, opval);
1956     written |= (1 << 3);
1957     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1958   }
1959 }
1960
1961   abuf->written = written;
1962   SEM_NBRANCH_FINI (vpc, 0);
1963   return status;
1964 }
1965
1966 /* movgu-imm-xcc-xcc: movgu-imm-xcc %xcc,$simm11,$rd */
1967
1968 SEM_STATUS
1969 SEM_FN_NAME (sparc64,movgu_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1970 {
1971   SEM_STATUS status = 0;
1972   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1973   int UNUSED written = 0;
1974   IADDR UNUSED pc = GET_H_PC ();
1975   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1976   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1977   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1978
1979 if (NOTBI (ORBI (CPU (h_xcc_c), CPU (h_xcc_z)))) {
1980   {
1981     SI opval = f_simm11;
1982     SET_H_GR (f_rd, opval);
1983     written |= (1 << 3);
1984     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1985   }
1986 }
1987
1988   abuf->written = written;
1989   SEM_NBRANCH_FINI (vpc, 0);
1990   return status;
1991 }
1992
1993 /* movleu-icc-icc: movleu-icc %icc,$rs2,$rd */
1994
1995 SEM_STATUS
1996 SEM_FN_NAME (sparc64,movleu_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1997 {
1998   SEM_STATUS status = 0;
1999   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2000   int UNUSED written = 0;
2001   IADDR UNUSED pc = GET_H_PC ();
2002   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2003   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2004   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2005
2006 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
2007   {
2008     SI opval = GET_H_GR (f_rs2);
2009     SET_H_GR (f_rd, opval);
2010     written |= (1 << 3);
2011     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2012   }
2013 }
2014
2015   abuf->written = written;
2016   SEM_NBRANCH_FINI (vpc, 0);
2017   return status;
2018 }
2019
2020 /* movleu-imm-icc-icc: movleu-imm-icc %icc,$simm11,$rd */
2021
2022 SEM_STATUS
2023 SEM_FN_NAME (sparc64,movleu_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2024 {
2025   SEM_STATUS status = 0;
2026   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2027   int UNUSED written = 0;
2028   IADDR UNUSED pc = GET_H_PC ();
2029   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2030   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2031   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2032
2033 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
2034   {
2035     SI opval = f_simm11;
2036     SET_H_GR (f_rd, opval);
2037     written |= (1 << 3);
2038     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2039   }
2040 }
2041
2042   abuf->written = written;
2043   SEM_NBRANCH_FINI (vpc, 0);
2044   return status;
2045 }
2046
2047 /* movleu-xcc-xcc: movleu-xcc %xcc,$rs2,$rd */
2048
2049 SEM_STATUS
2050 SEM_FN_NAME (sparc64,movleu_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2051 {
2052   SEM_STATUS status = 0;
2053   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2054   int UNUSED written = 0;
2055   IADDR UNUSED pc = GET_H_PC ();
2056   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2057   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2058   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2059
2060 if (ORBI (CPU (h_xcc_c), CPU (h_xcc_z))) {
2061   {
2062     SI opval = GET_H_GR (f_rs2);
2063     SET_H_GR (f_rd, opval);
2064     written |= (1 << 3);
2065     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2066   }
2067 }
2068
2069   abuf->written = written;
2070   SEM_NBRANCH_FINI (vpc, 0);
2071   return status;
2072 }
2073
2074 /* movleu-imm-xcc-xcc: movleu-imm-xcc %xcc,$simm11,$rd */
2075
2076 SEM_STATUS
2077 SEM_FN_NAME (sparc64,movleu_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2078 {
2079   SEM_STATUS status = 0;
2080   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2081   int UNUSED written = 0;
2082   IADDR UNUSED pc = GET_H_PC ();
2083   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2084   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2085   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2086
2087 if (ORBI (CPU (h_xcc_c), CPU (h_xcc_z))) {
2088   {
2089     SI opval = f_simm11;
2090     SET_H_GR (f_rd, opval);
2091     written |= (1 << 3);
2092     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2093   }
2094 }
2095
2096   abuf->written = written;
2097   SEM_NBRANCH_FINI (vpc, 0);
2098   return status;
2099 }
2100
2101 /* movcc-icc-icc: movcc-icc %icc,$rs2,$rd */
2102
2103 SEM_STATUS
2104 SEM_FN_NAME (sparc64,movcc_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2105 {
2106   SEM_STATUS status = 0;
2107   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2108   int UNUSED written = 0;
2109   IADDR UNUSED pc = GET_H_PC ();
2110   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2111   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2112   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2113
2114 if (NOTBI (CPU (h_icc_c))) {
2115   {
2116     SI opval = GET_H_GR (f_rs2);
2117     SET_H_GR (f_rd, opval);
2118     written |= (1 << 2);
2119     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2120   }
2121 }
2122
2123   abuf->written = written;
2124   SEM_NBRANCH_FINI (vpc, 0);
2125   return status;
2126 }
2127
2128 /* movcc-imm-icc-icc: movcc-imm-icc %icc,$simm11,$rd */
2129
2130 SEM_STATUS
2131 SEM_FN_NAME (sparc64,movcc_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2132 {
2133   SEM_STATUS status = 0;
2134   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2135   int UNUSED written = 0;
2136   IADDR UNUSED pc = GET_H_PC ();
2137   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2138   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2139   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2140
2141 if (NOTBI (CPU (h_icc_c))) {
2142   {
2143     SI opval = f_simm11;
2144     SET_H_GR (f_rd, opval);
2145     written |= (1 << 2);
2146     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2147   }
2148 }
2149
2150   abuf->written = written;
2151   SEM_NBRANCH_FINI (vpc, 0);
2152   return status;
2153 }
2154
2155 /* movcc-xcc-xcc: movcc-xcc %xcc,$rs2,$rd */
2156
2157 SEM_STATUS
2158 SEM_FN_NAME (sparc64,movcc_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2159 {
2160   SEM_STATUS status = 0;
2161   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2162   int UNUSED written = 0;
2163   IADDR UNUSED pc = GET_H_PC ();
2164   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2165   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2166   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2167
2168 if (NOTBI (CPU (h_xcc_c))) {
2169   {
2170     SI opval = GET_H_GR (f_rs2);
2171     SET_H_GR (f_rd, opval);
2172     written |= (1 << 2);
2173     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2174   }
2175 }
2176
2177   abuf->written = written;
2178   SEM_NBRANCH_FINI (vpc, 0);
2179   return status;
2180 }
2181
2182 /* movcc-imm-xcc-xcc: movcc-imm-xcc %xcc,$simm11,$rd */
2183
2184 SEM_STATUS
2185 SEM_FN_NAME (sparc64,movcc_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2186 {
2187   SEM_STATUS status = 0;
2188   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2189   int UNUSED written = 0;
2190   IADDR UNUSED pc = GET_H_PC ();
2191   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2192   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2193   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2194
2195 if (NOTBI (CPU (h_xcc_c))) {
2196   {
2197     SI opval = f_simm11;
2198     SET_H_GR (f_rd, opval);
2199     written |= (1 << 2);
2200     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2201   }
2202 }
2203
2204   abuf->written = written;
2205   SEM_NBRANCH_FINI (vpc, 0);
2206   return status;
2207 }
2208
2209 /* movcs-icc-icc: movcs-icc %icc,$rs2,$rd */
2210
2211 SEM_STATUS
2212 SEM_FN_NAME (sparc64,movcs_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2213 {
2214   SEM_STATUS status = 0;
2215   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2216   int UNUSED written = 0;
2217   IADDR UNUSED pc = GET_H_PC ();
2218   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2219   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2220   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2221
2222 if (CPU (h_icc_c)) {
2223   {
2224     SI opval = GET_H_GR (f_rs2);
2225     SET_H_GR (f_rd, opval);
2226     written |= (1 << 2);
2227     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2228   }
2229 }
2230
2231   abuf->written = written;
2232   SEM_NBRANCH_FINI (vpc, 0);
2233   return status;
2234 }
2235
2236 /* movcs-imm-icc-icc: movcs-imm-icc %icc,$simm11,$rd */
2237
2238 SEM_STATUS
2239 SEM_FN_NAME (sparc64,movcs_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2240 {
2241   SEM_STATUS status = 0;
2242   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2243   int UNUSED written = 0;
2244   IADDR UNUSED pc = GET_H_PC ();
2245   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2246   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2247   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2248
2249 if (CPU (h_icc_c)) {
2250   {
2251     SI opval = f_simm11;
2252     SET_H_GR (f_rd, opval);
2253     written |= (1 << 2);
2254     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2255   }
2256 }
2257
2258   abuf->written = written;
2259   SEM_NBRANCH_FINI (vpc, 0);
2260   return status;
2261 }
2262
2263 /* movcs-xcc-xcc: movcs-xcc %xcc,$rs2,$rd */
2264
2265 SEM_STATUS
2266 SEM_FN_NAME (sparc64,movcs_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2267 {
2268   SEM_STATUS status = 0;
2269   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2270   int UNUSED written = 0;
2271   IADDR UNUSED pc = GET_H_PC ();
2272   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2273   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2274   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2275
2276 if (CPU (h_xcc_c)) {
2277   {
2278     SI opval = GET_H_GR (f_rs2);
2279     SET_H_GR (f_rd, opval);
2280     written |= (1 << 2);
2281     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2282   }
2283 }
2284
2285   abuf->written = written;
2286   SEM_NBRANCH_FINI (vpc, 0);
2287   return status;
2288 }
2289
2290 /* movcs-imm-xcc-xcc: movcs-imm-xcc %xcc,$simm11,$rd */
2291
2292 SEM_STATUS
2293 SEM_FN_NAME (sparc64,movcs_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2294 {
2295   SEM_STATUS status = 0;
2296   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2297   int UNUSED written = 0;
2298   IADDR UNUSED pc = GET_H_PC ();
2299   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2300   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2301   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2302
2303 if (CPU (h_xcc_c)) {
2304   {
2305     SI opval = f_simm11;
2306     SET_H_GR (f_rd, opval);
2307     written |= (1 << 2);
2308     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2309   }
2310 }
2311
2312   abuf->written = written;
2313   SEM_NBRANCH_FINI (vpc, 0);
2314   return status;
2315 }
2316
2317 /* movpos-icc-icc: movpos-icc %icc,$rs2,$rd */
2318
2319 SEM_STATUS
2320 SEM_FN_NAME (sparc64,movpos_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2321 {
2322   SEM_STATUS status = 0;
2323   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2324   int UNUSED written = 0;
2325   IADDR UNUSED pc = GET_H_PC ();
2326   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2327   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2328   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2329
2330 if (NOTBI (CPU (h_icc_n))) {
2331   {
2332     SI opval = GET_H_GR (f_rs2);
2333     SET_H_GR (f_rd, opval);
2334     written |= (1 << 2);
2335     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2336   }
2337 }
2338
2339   abuf->written = written;
2340   SEM_NBRANCH_FINI (vpc, 0);
2341   return status;
2342 }
2343
2344 /* movpos-imm-icc-icc: movpos-imm-icc %icc,$simm11,$rd */
2345
2346 SEM_STATUS
2347 SEM_FN_NAME (sparc64,movpos_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2348 {
2349   SEM_STATUS status = 0;
2350   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2351   int UNUSED written = 0;
2352   IADDR UNUSED pc = GET_H_PC ();
2353   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2354   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2355   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2356
2357 if (NOTBI (CPU (h_icc_n))) {
2358   {
2359     SI opval = f_simm11;
2360     SET_H_GR (f_rd, opval);
2361     written |= (1 << 2);
2362     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2363   }
2364 }
2365
2366   abuf->written = written;
2367   SEM_NBRANCH_FINI (vpc, 0);
2368   return status;
2369 }
2370
2371 /* movpos-xcc-xcc: movpos-xcc %xcc,$rs2,$rd */
2372
2373 SEM_STATUS
2374 SEM_FN_NAME (sparc64,movpos_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2375 {
2376   SEM_STATUS status = 0;
2377   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2378   int UNUSED written = 0;
2379   IADDR UNUSED pc = GET_H_PC ();
2380   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2381   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2382   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2383
2384 if (NOTBI (CPU (h_xcc_n))) {
2385   {
2386     SI opval = GET_H_GR (f_rs2);
2387     SET_H_GR (f_rd, opval);
2388     written |= (1 << 2);
2389     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2390   }
2391 }
2392
2393   abuf->written = written;
2394   SEM_NBRANCH_FINI (vpc, 0);
2395   return status;
2396 }
2397
2398 /* movpos-imm-xcc-xcc: movpos-imm-xcc %xcc,$simm11,$rd */
2399
2400 SEM_STATUS
2401 SEM_FN_NAME (sparc64,movpos_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2402 {
2403   SEM_STATUS status = 0;
2404   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2405   int UNUSED written = 0;
2406   IADDR UNUSED pc = GET_H_PC ();
2407   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2408   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2409   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2410
2411 if (NOTBI (CPU (h_xcc_n))) {
2412   {
2413     SI opval = f_simm11;
2414     SET_H_GR (f_rd, opval);
2415     written |= (1 << 2);
2416     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2417   }
2418 }
2419
2420   abuf->written = written;
2421   SEM_NBRANCH_FINI (vpc, 0);
2422   return status;
2423 }
2424
2425 /* movneg-icc-icc: movneg-icc %icc,$rs2,$rd */
2426
2427 SEM_STATUS
2428 SEM_FN_NAME (sparc64,movneg_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2429 {
2430   SEM_STATUS status = 0;
2431   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2432   int UNUSED written = 0;
2433   IADDR UNUSED pc = GET_H_PC ();
2434   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2435   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2436   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2437
2438 if (CPU (h_icc_n)) {
2439   {
2440     SI opval = GET_H_GR (f_rs2);
2441     SET_H_GR (f_rd, opval);
2442     written |= (1 << 2);
2443     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2444   }
2445 }
2446
2447   abuf->written = written;
2448   SEM_NBRANCH_FINI (vpc, 0);
2449   return status;
2450 }
2451
2452 /* movneg-imm-icc-icc: movneg-imm-icc %icc,$simm11,$rd */
2453
2454 SEM_STATUS
2455 SEM_FN_NAME (sparc64,movneg_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2456 {
2457   SEM_STATUS status = 0;
2458   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2459   int UNUSED written = 0;
2460   IADDR UNUSED pc = GET_H_PC ();
2461   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2462   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2463   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2464
2465 if (CPU (h_icc_n)) {
2466   {
2467     SI opval = f_simm11;
2468     SET_H_GR (f_rd, opval);
2469     written |= (1 << 2);
2470     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2471   }
2472 }
2473
2474   abuf->written = written;
2475   SEM_NBRANCH_FINI (vpc, 0);
2476   return status;
2477 }
2478
2479 /* movneg-xcc-xcc: movneg-xcc %xcc,$rs2,$rd */
2480
2481 SEM_STATUS
2482 SEM_FN_NAME (sparc64,movneg_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2483 {
2484   SEM_STATUS status = 0;
2485   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2486   int UNUSED written = 0;
2487   IADDR UNUSED pc = GET_H_PC ();
2488   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2489   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2490   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2491
2492 if (CPU (h_xcc_n)) {
2493   {
2494     SI opval = GET_H_GR (f_rs2);
2495     SET_H_GR (f_rd, opval);
2496     written |= (1 << 2);
2497     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2498   }
2499 }
2500
2501   abuf->written = written;
2502   SEM_NBRANCH_FINI (vpc, 0);
2503   return status;
2504 }
2505
2506 /* movneg-imm-xcc-xcc: movneg-imm-xcc %xcc,$simm11,$rd */
2507
2508 SEM_STATUS
2509 SEM_FN_NAME (sparc64,movneg_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2510 {
2511   SEM_STATUS status = 0;
2512   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2513   int UNUSED written = 0;
2514   IADDR UNUSED pc = GET_H_PC ();
2515   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2516   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2517   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2518
2519 if (CPU (h_xcc_n)) {
2520   {
2521     SI opval = f_simm11;
2522     SET_H_GR (f_rd, opval);
2523     written |= (1 << 2);
2524     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2525   }
2526 }
2527
2528   abuf->written = written;
2529   SEM_NBRANCH_FINI (vpc, 0);
2530   return status;
2531 }
2532
2533 /* movvc-icc-icc: movvc-icc %icc,$rs2,$rd */
2534
2535 SEM_STATUS
2536 SEM_FN_NAME (sparc64,movvc_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2537 {
2538   SEM_STATUS status = 0;
2539   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2540   int UNUSED written = 0;
2541   IADDR UNUSED pc = GET_H_PC ();
2542   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2543   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2544   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2545
2546 if (NOTBI (CPU (h_icc_v))) {
2547   {
2548     SI opval = GET_H_GR (f_rs2);
2549     SET_H_GR (f_rd, opval);
2550     written |= (1 << 2);
2551     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2552   }
2553 }
2554
2555   abuf->written = written;
2556   SEM_NBRANCH_FINI (vpc, 0);
2557   return status;
2558 }
2559
2560 /* movvc-imm-icc-icc: movvc-imm-icc %icc,$simm11,$rd */
2561
2562 SEM_STATUS
2563 SEM_FN_NAME (sparc64,movvc_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2564 {
2565   SEM_STATUS status = 0;
2566   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2567   int UNUSED written = 0;
2568   IADDR UNUSED pc = GET_H_PC ();
2569   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2570   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2571   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2572
2573 if (NOTBI (CPU (h_icc_v))) {
2574   {
2575     SI opval = f_simm11;
2576     SET_H_GR (f_rd, opval);
2577     written |= (1 << 2);
2578     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2579   }
2580 }
2581
2582   abuf->written = written;
2583   SEM_NBRANCH_FINI (vpc, 0);
2584   return status;
2585 }
2586
2587 /* movvc-xcc-xcc: movvc-xcc %xcc,$rs2,$rd */
2588
2589 SEM_STATUS
2590 SEM_FN_NAME (sparc64,movvc_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2591 {
2592   SEM_STATUS status = 0;
2593   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2594   int UNUSED written = 0;
2595   IADDR UNUSED pc = GET_H_PC ();
2596   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2597   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2598   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2599
2600 if (NOTBI (CPU (h_xcc_v))) {
2601   {
2602     SI opval = GET_H_GR (f_rs2);
2603     SET_H_GR (f_rd, opval);
2604     written |= (1 << 2);
2605     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2606   }
2607 }
2608
2609   abuf->written = written;
2610   SEM_NBRANCH_FINI (vpc, 0);
2611   return status;
2612 }
2613
2614 /* movvc-imm-xcc-xcc: movvc-imm-xcc %xcc,$simm11,$rd */
2615
2616 SEM_STATUS
2617 SEM_FN_NAME (sparc64,movvc_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2618 {
2619   SEM_STATUS status = 0;
2620   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2621   int UNUSED written = 0;
2622   IADDR UNUSED pc = GET_H_PC ();
2623   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2624   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2625   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2626
2627 if (NOTBI (CPU (h_xcc_v))) {
2628   {
2629     SI opval = f_simm11;
2630     SET_H_GR (f_rd, opval);
2631     written |= (1 << 2);
2632     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2633   }
2634 }
2635
2636   abuf->written = written;
2637   SEM_NBRANCH_FINI (vpc, 0);
2638   return status;
2639 }
2640
2641 /* movvs-icc-icc: movvs-icc %icc,$rs2,$rd */
2642
2643 SEM_STATUS
2644 SEM_FN_NAME (sparc64,movvs_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2645 {
2646   SEM_STATUS status = 0;
2647   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2648   int UNUSED written = 0;
2649   IADDR UNUSED pc = GET_H_PC ();
2650   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2651   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2652   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2653
2654 if (CPU (h_icc_v)) {
2655   {
2656     SI opval = GET_H_GR (f_rs2);
2657     SET_H_GR (f_rd, opval);
2658     written |= (1 << 2);
2659     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2660   }
2661 }
2662
2663   abuf->written = written;
2664   SEM_NBRANCH_FINI (vpc, 0);
2665   return status;
2666 }
2667
2668 /* movvs-imm-icc-icc: movvs-imm-icc %icc,$simm11,$rd */
2669
2670 SEM_STATUS
2671 SEM_FN_NAME (sparc64,movvs_imm_icc_icc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2672 {
2673   SEM_STATUS status = 0;
2674   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2675   int UNUSED written = 0;
2676   IADDR UNUSED pc = GET_H_PC ();
2677   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2678   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2679   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2680
2681 if (CPU (h_icc_v)) {
2682   {
2683     SI opval = f_simm11;
2684     SET_H_GR (f_rd, opval);
2685     written |= (1 << 2);
2686     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2687   }
2688 }
2689
2690   abuf->written = written;
2691   SEM_NBRANCH_FINI (vpc, 0);
2692   return status;
2693 }
2694
2695 /* movvs-xcc-xcc: movvs-xcc %xcc,$rs2,$rd */
2696
2697 SEM_STATUS
2698 SEM_FN_NAME (sparc64,movvs_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2699 {
2700   SEM_STATUS status = 0;
2701   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2702   int UNUSED written = 0;
2703   IADDR UNUSED pc = GET_H_PC ();
2704   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2705   EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2706   EXTRACT_IFMT_MOVA_ICC_ICC_CODE
2707
2708 if (CPU (h_xcc_v)) {
2709   {
2710     SI opval = GET_H_GR (f_rs2);
2711     SET_H_GR (f_rd, opval);
2712     written |= (1 << 2);
2713     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2714   }
2715 }
2716
2717   abuf->written = written;
2718   SEM_NBRANCH_FINI (vpc, 0);
2719   return status;
2720 }
2721
2722 /* movvs-imm-xcc-xcc: movvs-imm-xcc %xcc,$simm11,$rd */
2723
2724 SEM_STATUS
2725 SEM_FN_NAME (sparc64,movvs_imm_xcc_xcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2726 {
2727   SEM_STATUS status = 0;
2728   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2729   int UNUSED written = 0;
2730   IADDR UNUSED pc = GET_H_PC ();
2731   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2732   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
2733   EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
2734
2735 if (CPU (h_xcc_v)) {
2736   {
2737     SI opval = f_simm11;
2738     SET_H_GR (f_rd, opval);
2739     written |= (1 << 2);
2740     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2741   }
2742 }
2743
2744   abuf->written = written;
2745   SEM_NBRANCH_FINI (vpc, 0);
2746   return status;
2747 }
2748
2749 /* ldsb-reg+reg: ldsb [$rs1+$rs2],$rd */
2750
2751 SEM_STATUS
2752 SEM_FN_NAME (sparc64,ldsb_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2753 {
2754   SEM_STATUS status = 0;
2755   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2756   int UNUSED written = 0;
2757   IADDR UNUSED pc = GET_H_PC ();
2758   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2759   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2760   EXTRACT_IFMT_LDSB_REG_REG_CODE
2761
2762   {
2763     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2764     SET_H_GR (f_rd, opval);
2765     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2766   }
2767
2768   SEM_NBRANCH_FINI (vpc, 0);
2769   return status;
2770 }
2771
2772 /* ldsb-reg+imm: ldsb [$rs1+$simm13],$rd */
2773
2774 SEM_STATUS
2775 SEM_FN_NAME (sparc64,ldsb_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2776 {
2777   SEM_STATUS status = 0;
2778   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2779   int UNUSED written = 0;
2780   IADDR UNUSED pc = GET_H_PC ();
2781   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2782   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2783   EXTRACT_IFMT_LDSB_REG_IMM_CODE
2784
2785   {
2786     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
2787     SET_H_GR (f_rd, opval);
2788     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2789   }
2790
2791   SEM_NBRANCH_FINI (vpc, 0);
2792   return status;
2793 }
2794
2795 /* ldsb-reg+reg/asi: ldsb [$rs1+$rs2]$asi,$rd */
2796
2797 SEM_STATUS
2798 SEM_FN_NAME (sparc64,ldsb_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2799 {
2800   SEM_STATUS status = 0;
2801   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2802   int UNUSED written = 0;
2803   IADDR UNUSED pc = GET_H_PC ();
2804   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2805   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2806   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2807
2808   {
2809     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2810     SET_H_GR (f_rd, opval);
2811     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2812   }
2813
2814   SEM_NBRANCH_FINI (vpc, 0);
2815   return status;
2816 }
2817
2818 /* ldub-reg+reg: ldub [$rs1+$rs2],$rd */
2819
2820 SEM_STATUS
2821 SEM_FN_NAME (sparc64,ldub_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2822 {
2823   SEM_STATUS status = 0;
2824   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2825   int UNUSED written = 0;
2826   IADDR UNUSED pc = GET_H_PC ();
2827   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2828   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2829   EXTRACT_IFMT_LDSB_REG_REG_CODE
2830
2831   {
2832     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2833     SET_H_GR (f_rd, opval);
2834     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2835   }
2836
2837   SEM_NBRANCH_FINI (vpc, 0);
2838   return status;
2839 }
2840
2841 /* ldub-reg+imm: ldub [$rs1+$simm13],$rd */
2842
2843 SEM_STATUS
2844 SEM_FN_NAME (sparc64,ldub_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2845 {
2846   SEM_STATUS status = 0;
2847   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2848   int UNUSED written = 0;
2849   IADDR UNUSED pc = GET_H_PC ();
2850   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2851   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2852   EXTRACT_IFMT_LDSB_REG_IMM_CODE
2853
2854   {
2855     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
2856     SET_H_GR (f_rd, opval);
2857     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2858   }
2859
2860   SEM_NBRANCH_FINI (vpc, 0);
2861   return status;
2862 }
2863
2864 /* ldub-reg+reg/asi: ldub [$rs1+$rs2]$asi,$rd */
2865
2866 SEM_STATUS
2867 SEM_FN_NAME (sparc64,ldub_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2868 {
2869   SEM_STATUS status = 0;
2870   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2871   int UNUSED written = 0;
2872   IADDR UNUSED pc = GET_H_PC ();
2873   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2874   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2875   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2876
2877   {
2878     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2879     SET_H_GR (f_rd, opval);
2880     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2881   }
2882
2883   SEM_NBRANCH_FINI (vpc, 0);
2884   return status;
2885 }
2886
2887 /* ldsh-reg+reg: ldsh [$rs1+$rs2],$rd */
2888
2889 SEM_STATUS
2890 SEM_FN_NAME (sparc64,ldsh_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2891 {
2892   SEM_STATUS status = 0;
2893   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2894   int UNUSED written = 0;
2895   IADDR UNUSED pc = GET_H_PC ();
2896   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2897   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2898   EXTRACT_IFMT_LDSB_REG_REG_CODE
2899
2900   {
2901     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2902     SET_H_GR (f_rd, opval);
2903     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2904   }
2905
2906   SEM_NBRANCH_FINI (vpc, 0);
2907   return status;
2908 }
2909
2910 /* ldsh-reg+imm: ldsh [$rs1+$simm13],$rd */
2911
2912 SEM_STATUS
2913 SEM_FN_NAME (sparc64,ldsh_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2914 {
2915   SEM_STATUS status = 0;
2916   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2917   int UNUSED written = 0;
2918   IADDR UNUSED pc = GET_H_PC ();
2919   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2920   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2921   EXTRACT_IFMT_LDSB_REG_IMM_CODE
2922
2923   {
2924     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
2925     SET_H_GR (f_rd, opval);
2926     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2927   }
2928
2929   SEM_NBRANCH_FINI (vpc, 0);
2930   return status;
2931 }
2932
2933 /* ldsh-reg+reg/asi: ldsh [$rs1+$rs2]$asi,$rd */
2934
2935 SEM_STATUS
2936 SEM_FN_NAME (sparc64,ldsh_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2937 {
2938   SEM_STATUS status = 0;
2939   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2940   int UNUSED written = 0;
2941   IADDR UNUSED pc = GET_H_PC ();
2942   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2943   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2944   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2945
2946   {
2947     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2948     SET_H_GR (f_rd, opval);
2949     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2950   }
2951
2952   SEM_NBRANCH_FINI (vpc, 0);
2953   return status;
2954 }
2955
2956 /* lduh-reg+reg: lduh [$rs1+$rs2],$rd */
2957
2958 SEM_STATUS
2959 SEM_FN_NAME (sparc64,lduh_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2960 {
2961   SEM_STATUS status = 0;
2962   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2963   int UNUSED written = 0;
2964   IADDR UNUSED pc = GET_H_PC ();
2965   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2966   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2967   EXTRACT_IFMT_LDSB_REG_REG_CODE
2968
2969   {
2970     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
2971     SET_H_GR (f_rd, opval);
2972     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2973   }
2974
2975   SEM_NBRANCH_FINI (vpc, 0);
2976   return status;
2977 }
2978
2979 /* lduh-reg+imm: lduh [$rs1+$simm13],$rd */
2980
2981 SEM_STATUS
2982 SEM_FN_NAME (sparc64,lduh_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2983 {
2984   SEM_STATUS status = 0;
2985   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2986   int UNUSED written = 0;
2987   IADDR UNUSED pc = GET_H_PC ();
2988   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2989   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2990   EXTRACT_IFMT_LDSB_REG_IMM_CODE
2991
2992   {
2993     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
2994     SET_H_GR (f_rd, opval);
2995     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2996   }
2997
2998   SEM_NBRANCH_FINI (vpc, 0);
2999   return status;
3000 }
3001
3002 /* lduh-reg+reg/asi: lduh [$rs1+$rs2]$asi,$rd */
3003
3004 SEM_STATUS
3005 SEM_FN_NAME (sparc64,lduh_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3006 {
3007   SEM_STATUS status = 0;
3008   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3009   int UNUSED written = 0;
3010   IADDR UNUSED pc = GET_H_PC ();
3011   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3012   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3013   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3014
3015   {
3016     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3017     SET_H_GR (f_rd, opval);
3018     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3019   }
3020
3021   SEM_NBRANCH_FINI (vpc, 0);
3022   return status;
3023 }
3024
3025 /* ldsw-reg+reg: ldsw [$rs1+$rs2],$rd */
3026
3027 SEM_STATUS
3028 SEM_FN_NAME (sparc64,ldsw_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3029 {
3030   SEM_STATUS status = 0;
3031   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3032   int UNUSED written = 0;
3033   IADDR UNUSED pc = GET_H_PC ();
3034   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3035   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3036   EXTRACT_IFMT_LDSB_REG_REG_CODE
3037
3038   {
3039     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3040     SET_H_GR (f_rd, opval);
3041     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3042   }
3043
3044   SEM_NBRANCH_FINI (vpc, 0);
3045   return status;
3046 }
3047
3048 /* ldsw-reg+imm: ldsw [$rs1+$simm13],$rd */
3049
3050 SEM_STATUS
3051 SEM_FN_NAME (sparc64,ldsw_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3052 {
3053   SEM_STATUS status = 0;
3054   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3055   int UNUSED written = 0;
3056   IADDR UNUSED pc = GET_H_PC ();
3057   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3058   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3059   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3060
3061   {
3062     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
3063     SET_H_GR (f_rd, opval);
3064     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3065   }
3066
3067   SEM_NBRANCH_FINI (vpc, 0);
3068   return status;
3069 }
3070
3071 /* ldsw-reg+reg/asi: ldsw [$rs1+$rs2]$asi,$rd */
3072
3073 SEM_STATUS
3074 SEM_FN_NAME (sparc64,ldsw_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3075 {
3076   SEM_STATUS status = 0;
3077   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3078   int UNUSED written = 0;
3079   IADDR UNUSED pc = GET_H_PC ();
3080   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3081   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3082   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3083
3084   {
3085     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3086     SET_H_GR (f_rd, opval);
3087     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3088   }
3089
3090   SEM_NBRANCH_FINI (vpc, 0);
3091   return status;
3092 }
3093
3094 /* lduw-reg+reg: lduw [$rs1+$rs2],$rd */
3095
3096 SEM_STATUS
3097 SEM_FN_NAME (sparc64,lduw_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3098 {
3099   SEM_STATUS status = 0;
3100   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3101   int UNUSED written = 0;
3102   IADDR UNUSED pc = GET_H_PC ();
3103   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3104   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3105   EXTRACT_IFMT_LDSB_REG_REG_CODE
3106
3107   {
3108     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3109     SET_H_GR (f_rd, opval);
3110     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3111   }
3112
3113   SEM_NBRANCH_FINI (vpc, 0);
3114   return status;
3115 }
3116
3117 /* lduw-reg+imm: lduw [$rs1+$simm13],$rd */
3118
3119 SEM_STATUS
3120 SEM_FN_NAME (sparc64,lduw_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3121 {
3122   SEM_STATUS status = 0;
3123   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3124   int UNUSED written = 0;
3125   IADDR UNUSED pc = GET_H_PC ();
3126   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3127   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3128   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3129
3130   {
3131     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
3132     SET_H_GR (f_rd, opval);
3133     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3134   }
3135
3136   SEM_NBRANCH_FINI (vpc, 0);
3137   return status;
3138 }
3139
3140 /* lduw-reg+reg/asi: lduw [$rs1+$rs2]$asi,$rd */
3141
3142 SEM_STATUS
3143 SEM_FN_NAME (sparc64,lduw_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3144 {
3145   SEM_STATUS status = 0;
3146   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3147   int UNUSED written = 0;
3148   IADDR UNUSED pc = GET_H_PC ();
3149   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3150   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3151   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3152
3153   {
3154     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3155     SET_H_GR (f_rd, opval);
3156     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3157   }
3158
3159   SEM_NBRANCH_FINI (vpc, 0);
3160   return status;
3161 }
3162
3163 /* ldx-reg+reg: ldx [$rs1+$rs2],$rd */
3164
3165 SEM_STATUS
3166 SEM_FN_NAME (sparc64,ldx_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3167 {
3168   SEM_STATUS status = 0;
3169   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3170   int UNUSED written = 0;
3171   IADDR UNUSED pc = GET_H_PC ();
3172   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3173   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3174   EXTRACT_IFMT_LDSB_REG_REG_CODE
3175
3176   {
3177     DI opval = GETMEMDI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3178     SET_H_GR (f_rd, opval);
3179     TRACE_RESULT (current_cpu, abuf, "rd", 'D', opval);
3180   }
3181
3182   SEM_NBRANCH_FINI (vpc, 0);
3183   return status;
3184 }
3185
3186 /* ldx-reg+imm: ldx [$rs1+$simm13],$rd */
3187
3188 SEM_STATUS
3189 SEM_FN_NAME (sparc64,ldx_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3190 {
3191   SEM_STATUS status = 0;
3192   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3193   int UNUSED written = 0;
3194   IADDR UNUSED pc = GET_H_PC ();
3195   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3196   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3197   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3198
3199   {
3200     DI opval = GETMEMDI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
3201     SET_H_GR (f_rd, opval);
3202     TRACE_RESULT (current_cpu, abuf, "rd", 'D', opval);
3203   }
3204
3205   SEM_NBRANCH_FINI (vpc, 0);
3206   return status;
3207 }
3208
3209 /* ldx-reg+reg/asi: ldx [$rs1+$rs2]$asi,$rd */
3210
3211 SEM_STATUS
3212 SEM_FN_NAME (sparc64,ldx_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3213 {
3214   SEM_STATUS status = 0;
3215   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3216   int UNUSED written = 0;
3217   IADDR UNUSED pc = GET_H_PC ();
3218   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3219   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3220   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3221
3222   {
3223     DI opval = GETMEMDI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3224     SET_H_GR (f_rd, opval);
3225     TRACE_RESULT (current_cpu, abuf, "rd", 'D', opval);
3226   }
3227
3228   SEM_NBRANCH_FINI (vpc, 0);
3229   return status;
3230 }
3231
3232 /* ldd-reg+reg: ldd [$rs1+$rs2],$rdd */
3233
3234 SEM_STATUS
3235 SEM_FN_NAME (sparc64,ldd_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3236 {
3237   SEM_STATUS status = 0;
3238   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3239   int UNUSED written = 0;
3240   IADDR UNUSED pc = GET_H_PC ();
3241   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3242   EXTRACT_IFMT_LDD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3243   EXTRACT_IFMT_LDD_REG_REG_CODE
3244
3245 do {
3246   {
3247     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3248     SET_H_GR (f_rd, opval);
3249     TRACE_RESULT (current_cpu, abuf, "rdd", 'x', opval);
3250   }
3251   {
3252     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)));
3253     SET_H_GR (((f_rd) + (1)), opval);
3254     TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-regno-rdd-const:-WI-1", 'x', opval);
3255   }
3256 } while (0);
3257
3258   SEM_NBRANCH_FINI (vpc, 0);
3259   return status;
3260 }
3261
3262 /* ldd-reg+imm: ldd [$rs1+$simm13],$rdd */
3263
3264 SEM_STATUS
3265 SEM_FN_NAME (sparc64,ldd_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3266 {
3267   SEM_STATUS status = 0;
3268   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3269   int UNUSED written = 0;
3270   IADDR UNUSED pc = GET_H_PC ();
3271   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3272   EXTRACT_IFMT_LDD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3273   EXTRACT_IFMT_LDD_REG_IMM_CODE
3274
3275 do {
3276   {
3277     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
3278     SET_H_GR (f_rd, opval);
3279     TRACE_RESULT (current_cpu, abuf, "rdd", 'x', opval);
3280   }
3281   {
3282     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDHI (f_simm13, 4)));
3283     SET_H_GR (((f_rd) + (1)), opval);
3284     TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-regno-rdd-const:-WI-1", 'x', opval);
3285   }
3286 } while (0);
3287
3288   SEM_NBRANCH_FINI (vpc, 0);
3289   return status;
3290 }
3291
3292 /* ldd-reg+reg/asi: ldd [$rs1+$rs2]$asi,$rdd */
3293
3294 SEM_STATUS
3295 SEM_FN_NAME (sparc64,ldd_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3296 {
3297   SEM_STATUS status = 0;
3298   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3299   int UNUSED written = 0;
3300   IADDR UNUSED pc = GET_H_PC ();
3301   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3302   EXTRACT_IFMT_LDD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3303   EXTRACT_IFMT_LDD_REG_REG_ASI_CODE
3304
3305 do {
3306   {
3307     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3308     SET_H_GR (f_rd, opval);
3309     TRACE_RESULT (current_cpu, abuf, "rdd", 'x', opval);
3310   }
3311   {
3312     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)));
3313     SET_H_GR (((f_rd) + (1)), opval);
3314     TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-regno-rdd-const:-WI-1", 'x', opval);
3315   }
3316 } while (0);
3317
3318   SEM_NBRANCH_FINI (vpc, 0);
3319   return status;
3320 }
3321
3322 /* stb-reg+reg: stb $rd,[$rs1+$rs2] */
3323
3324 SEM_STATUS
3325 SEM_FN_NAME (sparc64,stb_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3326 {
3327   SEM_STATUS status = 0;
3328   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3329   int UNUSED written = 0;
3330   IADDR UNUSED pc = GET_H_PC ();
3331   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3332   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3333   EXTRACT_IFMT_LDSB_REG_REG_CODE
3334
3335   {
3336     QI opval = GET_H_GR (f_rd);
3337     SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3338     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3339   }
3340
3341   SEM_NBRANCH_FINI (vpc, 0);
3342   return status;
3343 }
3344
3345 /* stb-reg+imm: stb $rd,[$rs1+$simm13] */
3346
3347 SEM_STATUS
3348 SEM_FN_NAME (sparc64,stb_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3349 {
3350   SEM_STATUS status = 0;
3351   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3352   int UNUSED written = 0;
3353   IADDR UNUSED pc = GET_H_PC ();
3354   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3355   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3356   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3357
3358   {
3359     QI opval = GET_H_GR (f_rd);
3360     SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
3361     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3362   }
3363
3364   SEM_NBRANCH_FINI (vpc, 0);
3365   return status;
3366 }
3367
3368 /* stb-reg+reg/asi: stb $rd,[$rs1+$rs2]$asi */
3369
3370 SEM_STATUS
3371 SEM_FN_NAME (sparc64,stb_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3372 {
3373   SEM_STATUS status = 0;
3374   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3375   int UNUSED written = 0;
3376   IADDR UNUSED pc = GET_H_PC ();
3377   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3378   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3379   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3380
3381   {
3382     QI opval = GET_H_GR (f_rd);
3383     SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3384     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3385   }
3386
3387   SEM_NBRANCH_FINI (vpc, 0);
3388   return status;
3389 }
3390
3391 /* sth-reg+reg: sth $rd,[$rs1+$rs2] */
3392
3393 SEM_STATUS
3394 SEM_FN_NAME (sparc64,sth_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3395 {
3396   SEM_STATUS status = 0;
3397   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3398   int UNUSED written = 0;
3399   IADDR UNUSED pc = GET_H_PC ();
3400   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3401   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3402   EXTRACT_IFMT_LDSB_REG_REG_CODE
3403
3404   {
3405     HI opval = GET_H_GR (f_rd);
3406     SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3407     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3408   }
3409
3410   SEM_NBRANCH_FINI (vpc, 0);
3411   return status;
3412 }
3413
3414 /* sth-reg+imm: sth $rd,[$rs1+$simm13] */
3415
3416 SEM_STATUS
3417 SEM_FN_NAME (sparc64,sth_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3418 {
3419   SEM_STATUS status = 0;
3420   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3421   int UNUSED written = 0;
3422   IADDR UNUSED pc = GET_H_PC ();
3423   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3424   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3425   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3426
3427   {
3428     HI opval = GET_H_GR (f_rd);
3429     SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
3430     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3431   }
3432
3433   SEM_NBRANCH_FINI (vpc, 0);
3434   return status;
3435 }
3436
3437 /* sth-reg+reg/asi: sth $rd,[$rs1+$rs2]$asi */
3438
3439 SEM_STATUS
3440 SEM_FN_NAME (sparc64,sth_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3441 {
3442   SEM_STATUS status = 0;
3443   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3444   int UNUSED written = 0;
3445   IADDR UNUSED pc = GET_H_PC ();
3446   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3447   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3448   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3449
3450   {
3451     HI opval = GET_H_GR (f_rd);
3452     SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3453     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3454   }
3455
3456   SEM_NBRANCH_FINI (vpc, 0);
3457   return status;
3458 }
3459
3460 /* st-reg+reg: st $rd,[$rs1+$rs2] */
3461
3462 SEM_STATUS
3463 SEM_FN_NAME (sparc64,st_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3464 {
3465   SEM_STATUS status = 0;
3466   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3467   int UNUSED written = 0;
3468   IADDR UNUSED pc = GET_H_PC ();
3469   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3470   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3471   EXTRACT_IFMT_LDSB_REG_REG_CODE
3472
3473   {
3474     SI opval = GET_H_GR (f_rd);
3475     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3476     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3477   }
3478
3479   SEM_NBRANCH_FINI (vpc, 0);
3480   return status;
3481 }
3482
3483 /* st-reg+imm: st $rd,[$rs1+$simm13] */
3484
3485 SEM_STATUS
3486 SEM_FN_NAME (sparc64,st_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3487 {
3488   SEM_STATUS status = 0;
3489   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3490   int UNUSED written = 0;
3491   IADDR UNUSED pc = GET_H_PC ();
3492   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3493   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3494   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3495
3496   {
3497     SI opval = GET_H_GR (f_rd);
3498     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
3499     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3500   }
3501
3502   SEM_NBRANCH_FINI (vpc, 0);
3503   return status;
3504 }
3505
3506 /* st-reg+reg/asi: st $rd,[$rs1+$rs2]$asi */
3507
3508 SEM_STATUS
3509 SEM_FN_NAME (sparc64,st_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3510 {
3511   SEM_STATUS status = 0;
3512   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3513   int UNUSED written = 0;
3514   IADDR UNUSED pc = GET_H_PC ();
3515   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3516   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3517   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3518
3519   {
3520     SI opval = GET_H_GR (f_rd);
3521     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3522     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3523   }
3524
3525   SEM_NBRANCH_FINI (vpc, 0);
3526   return status;
3527 }
3528
3529 /* stx-reg+reg: stx $rd,[$rs1+$rs2] */
3530
3531 SEM_STATUS
3532 SEM_FN_NAME (sparc64,stx_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3533 {
3534   SEM_STATUS status = 0;
3535   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3536   int UNUSED written = 0;
3537   IADDR UNUSED pc = GET_H_PC ();
3538   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3539   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3540   EXTRACT_IFMT_LDSB_REG_REG_CODE
3541
3542   {
3543     DI opval = GET_H_GR (f_rd);
3544     SETMEMDI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3545     TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval);
3546   }
3547
3548   SEM_NBRANCH_FINI (vpc, 0);
3549   return status;
3550 }
3551
3552 /* stx-reg+imm: stx $rd,[$rs1+$simm13] */
3553
3554 SEM_STATUS
3555 SEM_FN_NAME (sparc64,stx_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3556 {
3557   SEM_STATUS status = 0;
3558   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3559   int UNUSED written = 0;
3560   IADDR UNUSED pc = GET_H_PC ();
3561   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3562   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3563   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3564
3565   {
3566     DI opval = GET_H_GR (f_rd);
3567     SETMEMDI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
3568     TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval);
3569   }
3570
3571   SEM_NBRANCH_FINI (vpc, 0);
3572   return status;
3573 }
3574
3575 /* stx-reg+reg/asi: stx $rd,[$rs1+$rs2]$asi */
3576
3577 SEM_STATUS
3578 SEM_FN_NAME (sparc64,stx_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3579 {
3580   SEM_STATUS status = 0;
3581   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3582   int UNUSED written = 0;
3583   IADDR UNUSED pc = GET_H_PC ();
3584   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3585   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3586   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
3587
3588   {
3589     DI opval = GET_H_GR (f_rd);
3590     SETMEMDI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3591     TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval);
3592   }
3593
3594   SEM_NBRANCH_FINI (vpc, 0);
3595   return status;
3596 }
3597
3598 /* std-reg+reg: std $rdd,[$rs1+$rs2] */
3599
3600 SEM_STATUS
3601 SEM_FN_NAME (sparc64,std_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3602 {
3603   SEM_STATUS status = 0;
3604   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3605   int UNUSED written = 0;
3606   IADDR UNUSED pc = GET_H_PC ();
3607   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3608   EXTRACT_IFMT_LDD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3609   EXTRACT_IFMT_LDD_REG_REG_CODE
3610
3611 do {
3612   {
3613     SI opval = GET_H_GR (f_rd);
3614     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3615     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3616   }
3617   {
3618     SI opval = GET_H_GR (((f_rd) + (1)));
3619     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)), opval);
3620     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3621   }
3622 } while (0);
3623
3624   SEM_NBRANCH_FINI (vpc, 0);
3625   return status;
3626 }
3627
3628 /* std-reg+imm: std $rdd,[$rs1+$simm13] */
3629
3630 SEM_STATUS
3631 SEM_FN_NAME (sparc64,std_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3632 {
3633   SEM_STATUS status = 0;
3634   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3635   int UNUSED written = 0;
3636   IADDR UNUSED pc = GET_H_PC ();
3637   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3638   EXTRACT_IFMT_LDD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3639   EXTRACT_IFMT_LDD_REG_IMM_CODE
3640
3641 do {
3642   {
3643     SI opval = GET_H_GR (f_rd);
3644     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
3645     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3646   }
3647   {
3648     SI opval = GET_H_GR (((f_rd) + (1)));
3649     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDHI (f_simm13, 4)), opval);
3650     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3651   }
3652 } while (0);
3653
3654   SEM_NBRANCH_FINI (vpc, 0);
3655   return status;
3656 }
3657
3658 /* std-reg+reg/asi: std $rdd,[$rs1+$rs2]$asi */
3659
3660 SEM_STATUS
3661 SEM_FN_NAME (sparc64,std_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3662 {
3663   SEM_STATUS status = 0;
3664   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3665   int UNUSED written = 0;
3666   IADDR UNUSED pc = GET_H_PC ();
3667   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3668   EXTRACT_IFMT_LDD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3669   EXTRACT_IFMT_LDD_REG_REG_ASI_CODE
3670
3671 do {
3672   {
3673     SI opval = GET_H_GR (f_rd);
3674     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
3675     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3676   }
3677   {
3678     SI opval = GET_H_GR (((f_rd) + (1)));
3679     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)), opval);
3680     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3681   }
3682 } while (0);
3683
3684   SEM_NBRANCH_FINI (vpc, 0);
3685   return status;
3686 }
3687
3688 /* fp-ld-reg+reg: ld [$rs1+$rs2],$frd */
3689
3690 SEM_STATUS
3691 SEM_FN_NAME (sparc64,fp_ld_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3692 {
3693   SEM_STATUS status = 0;
3694   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3695   int UNUSED written = 0;
3696   IADDR UNUSED pc = GET_H_PC ();
3697   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3698   EXTRACT_IFMT_FP_LD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3699   EXTRACT_IFMT_FP_LD_REG_REG_CODE
3700
3701 do {
3702 sparc64_hw_trap (current_cpu, pc, TRAP32_FP_DIS);
3703   {
3704     SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3705     CPU (h_fr[f_rd]) = opval;
3706     TRACE_RESULT (current_cpu, abuf, "frd", 'f', opval);
3707   }
3708 } while (0);
3709
3710   SEM_NBRANCH_FINI (vpc, 0);
3711   return status;
3712 }
3713
3714 /* fp-ld-reg+imm: ld [$rs1+$simm13],$frd */
3715
3716 SEM_STATUS
3717 SEM_FN_NAME (sparc64,fp_ld_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3718 {
3719   SEM_STATUS status = 0;
3720   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3721   int UNUSED written = 0;
3722   IADDR UNUSED pc = GET_H_PC ();
3723   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3724   EXTRACT_IFMT_FP_LD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3725   EXTRACT_IFMT_FP_LD_REG_IMM_CODE
3726
3727 do {
3728 sparc64_hw_trap (current_cpu, pc, TRAP32_FP_DIS);
3729   {
3730     SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
3731     CPU (h_fr[f_rd]) = opval;
3732     TRACE_RESULT (current_cpu, abuf, "frd", 'f', opval);
3733   }
3734 } while (0);
3735
3736   SEM_NBRANCH_FINI (vpc, 0);
3737   return status;
3738 }
3739
3740 /* fp-ld-reg+reg/asi: ld [$rs1+$rs2]$asi,$frd */
3741
3742 SEM_STATUS
3743 SEM_FN_NAME (sparc64,fp_ld_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3744 {
3745   SEM_STATUS status = 0;
3746   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3747   int UNUSED written = 0;
3748   IADDR UNUSED pc = GET_H_PC ();
3749   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3750   EXTRACT_IFMT_FP_LD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
3751   EXTRACT_IFMT_FP_LD_REG_REG_ASI_CODE
3752
3753 do {
3754 sparc64_hw_trap (current_cpu, pc, TRAP32_FP_DIS);
3755   {
3756     SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
3757     CPU (h_fr[f_rd]) = opval;
3758     TRACE_RESULT (current_cpu, abuf, "frd", 'f', opval);
3759   }
3760 } while (0);
3761
3762   SEM_NBRANCH_FINI (vpc, 0);
3763   return status;
3764 }
3765
3766 /* sethi: sethi $hi22,$rd */
3767
3768 SEM_STATUS
3769 SEM_FN_NAME (sparc64,sethi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3770 {
3771   SEM_STATUS status = 0;
3772   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3773   int UNUSED written = 0;
3774   IADDR UNUSED pc = GET_H_PC ();
3775   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3776   EXTRACT_IFMT_SETHI_VARS /* f-hi22 f-op2 f-rd f-op */
3777   EXTRACT_IFMT_SETHI_CODE
3778
3779   {
3780     SI opval = SLLSI (f_hi22, 10);
3781     SET_H_GR (f_rd, opval);
3782     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3783   }
3784
3785   SEM_NBRANCH_FINI (vpc, 0);
3786   return status;
3787 }
3788
3789 /* add: add $rs1,$rs2,$rd */
3790
3791 SEM_STATUS
3792 SEM_FN_NAME (sparc64,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3793 {
3794   SEM_STATUS status = 0;
3795   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3796   int UNUSED written = 0;
3797   IADDR UNUSED pc = GET_H_PC ();
3798   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3799   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3800   EXTRACT_IFMT_LDSB_REG_REG_CODE
3801
3802   {
3803     SI opval = ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3804     SET_H_GR (f_rd, opval);
3805     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3806   }
3807
3808   SEM_NBRANCH_FINI (vpc, 0);
3809   return status;
3810 }
3811
3812 /* add-imm: add $rs1,$simm13,$rd */
3813
3814 SEM_STATUS
3815 SEM_FN_NAME (sparc64,add_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3816 {
3817   SEM_STATUS status = 0;
3818   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3819   int UNUSED written = 0;
3820   IADDR UNUSED pc = GET_H_PC ();
3821   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3822   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3823   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3824
3825   {
3826     SI opval = ADDSI (GET_H_GR (f_rs1), f_simm13);
3827     SET_H_GR (f_rd, opval);
3828     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3829   }
3830
3831   SEM_NBRANCH_FINI (vpc, 0);
3832   return status;
3833 }
3834
3835 /* sub: sub $rs1,$rs2,$rd */
3836
3837 SEM_STATUS
3838 SEM_FN_NAME (sparc64,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3839 {
3840   SEM_STATUS status = 0;
3841   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3842   int UNUSED written = 0;
3843   IADDR UNUSED pc = GET_H_PC ();
3844   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3845   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3846   EXTRACT_IFMT_LDSB_REG_REG_CODE
3847
3848   {
3849     SI opval = SUBSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3850     SET_H_GR (f_rd, opval);
3851     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3852   }
3853
3854   SEM_NBRANCH_FINI (vpc, 0);
3855   return status;
3856 }
3857
3858 /* sub-imm: sub $rs1,$simm13,$rd */
3859
3860 SEM_STATUS
3861 SEM_FN_NAME (sparc64,sub_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3862 {
3863   SEM_STATUS status = 0;
3864   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3865   int UNUSED written = 0;
3866   IADDR UNUSED pc = GET_H_PC ();
3867   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3868   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3869   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3870
3871   {
3872     SI opval = SUBSI (GET_H_GR (f_rs1), f_simm13);
3873     SET_H_GR (f_rd, opval);
3874     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3875   }
3876
3877   SEM_NBRANCH_FINI (vpc, 0);
3878   return status;
3879 }
3880
3881 /* addcc: addcc $rs1,$rs2,$rd */
3882
3883 SEM_STATUS
3884 SEM_FN_NAME (sparc64,addcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3885 {
3886   SEM_STATUS status = 0;
3887   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3888   int UNUSED written = 0;
3889   IADDR UNUSED pc = GET_H_PC ();
3890   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3891   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3892   EXTRACT_IFMT_LDSB_REG_REG_CODE
3893
3894 do {
3895 do {
3896   SI tmp_x;
3897   tmp_x = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
3898   {
3899     BI opval = ADDCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
3900     CPU (h_icc_c) = opval;
3901     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3902   }
3903   {
3904     BI opval = ADDOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
3905     CPU (h_icc_v) = opval;
3906     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3907   }
3908   {
3909     BI opval = LTSI (tmp_x, 0);
3910     CPU (h_icc_n) = opval;
3911     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3912   }
3913   {
3914     BI opval = EQSI (tmp_x, 0);
3915     CPU (h_icc_z) = opval;
3916     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3917   }
3918 } while (0);
3919   {
3920     SI opval = ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3921     SET_H_GR (f_rd, opval);
3922     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3923   }
3924 } while (0);
3925
3926   SEM_NBRANCH_FINI (vpc, 0);
3927   return status;
3928 }
3929
3930 /* addcc-imm: addcc $rs1,$simm13,$rd */
3931
3932 SEM_STATUS
3933 SEM_FN_NAME (sparc64,addcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3934 {
3935   SEM_STATUS status = 0;
3936   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3937   int UNUSED written = 0;
3938   IADDR UNUSED pc = GET_H_PC ();
3939   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3940   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3941   EXTRACT_IFMT_LDSB_REG_IMM_CODE
3942
3943 do {
3944 do {
3945   SI tmp_x;
3946   tmp_x = ADDCSI (GET_H_GR (f_rs1), f_simm13, 0);
3947   {
3948     BI opval = ADDCFSI (GET_H_GR (f_rs1), f_simm13, 0);
3949     CPU (h_icc_c) = opval;
3950     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3951   }
3952   {
3953     BI opval = ADDOFSI (GET_H_GR (f_rs1), f_simm13, 0);
3954     CPU (h_icc_v) = opval;
3955     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3956   }
3957   {
3958     BI opval = LTSI (tmp_x, 0);
3959     CPU (h_icc_n) = opval;
3960     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3961   }
3962   {
3963     BI opval = EQSI (tmp_x, 0);
3964     CPU (h_icc_z) = opval;
3965     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3966   }
3967 } while (0);
3968   {
3969     SI opval = ADDSI (GET_H_GR (f_rs1), f_simm13);
3970     SET_H_GR (f_rd, opval);
3971     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3972   }
3973 } while (0);
3974
3975   SEM_NBRANCH_FINI (vpc, 0);
3976   return status;
3977 }
3978
3979 /* subcc: subcc $rs1,$rs2,$rd */
3980
3981 SEM_STATUS
3982 SEM_FN_NAME (sparc64,subcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3983 {
3984   SEM_STATUS status = 0;
3985   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3986   int UNUSED written = 0;
3987   IADDR UNUSED pc = GET_H_PC ();
3988   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3989   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3990   EXTRACT_IFMT_LDSB_REG_REG_CODE
3991
3992 do {
3993 do {
3994   SI tmp_x;
3995   tmp_x = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
3996   {
3997     BI opval = SUBCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
3998     CPU (h_icc_c) = opval;
3999     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4000   }
4001   {
4002     BI opval = SUBOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
4003     CPU (h_icc_v) = opval;
4004     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4005   }
4006   {
4007     BI opval = LTSI (tmp_x, 0);
4008     CPU (h_icc_n) = opval;
4009     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4010   }
4011   {
4012     BI opval = EQSI (tmp_x, 0);
4013     CPU (h_icc_z) = opval;
4014     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4015   }
4016 } while (0);
4017   {
4018     SI opval = SUBSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4019     SET_H_GR (f_rd, opval);
4020     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4021   }
4022 } while (0);
4023
4024   SEM_NBRANCH_FINI (vpc, 0);
4025   return status;
4026 }
4027
4028 /* subcc-imm: subcc $rs1,$simm13,$rd */
4029
4030 SEM_STATUS
4031 SEM_FN_NAME (sparc64,subcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4032 {
4033   SEM_STATUS status = 0;
4034   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4035   int UNUSED written = 0;
4036   IADDR UNUSED pc = GET_H_PC ();
4037   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4038   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4039   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4040
4041 do {
4042 do {
4043   SI tmp_x;
4044   tmp_x = SUBCSI (GET_H_GR (f_rs1), f_simm13, 0);
4045   {
4046     BI opval = SUBCFSI (GET_H_GR (f_rs1), f_simm13, 0);
4047     CPU (h_icc_c) = opval;
4048     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4049   }
4050   {
4051     BI opval = SUBOFSI (GET_H_GR (f_rs1), f_simm13, 0);
4052     CPU (h_icc_v) = opval;
4053     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4054   }
4055   {
4056     BI opval = LTSI (tmp_x, 0);
4057     CPU (h_icc_n) = opval;
4058     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4059   }
4060   {
4061     BI opval = EQSI (tmp_x, 0);
4062     CPU (h_icc_z) = opval;
4063     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4064   }
4065 } while (0);
4066   {
4067     SI opval = SUBSI (GET_H_GR (f_rs1), f_simm13);
4068     SET_H_GR (f_rd, opval);
4069     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4070   }
4071 } while (0);
4072
4073   SEM_NBRANCH_FINI (vpc, 0);
4074   return status;
4075 }
4076
4077 /* addc: addc $rs1,$rs2,$rd */
4078
4079 SEM_STATUS
4080 SEM_FN_NAME (sparc64,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4081 {
4082   SEM_STATUS status = 0;
4083   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4084   int UNUSED written = 0;
4085   IADDR UNUSED pc = GET_H_PC ();
4086   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4087   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4088   EXTRACT_IFMT_LDSB_REG_REG_CODE
4089
4090   {
4091     SI opval = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4092     SET_H_GR (f_rd, opval);
4093     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4094   }
4095
4096   SEM_NBRANCH_FINI (vpc, 0);
4097   return status;
4098 }
4099
4100 /* addc-imm: addc $rs1,$simm13,$rd */
4101
4102 SEM_STATUS
4103 SEM_FN_NAME (sparc64,addc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4104 {
4105   SEM_STATUS status = 0;
4106   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4107   int UNUSED written = 0;
4108   IADDR UNUSED pc = GET_H_PC ();
4109   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4110   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4111   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4112
4113   {
4114     SI opval = ADDCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4115     SET_H_GR (f_rd, opval);
4116     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4117   }
4118
4119   SEM_NBRANCH_FINI (vpc, 0);
4120   return status;
4121 }
4122
4123 /* subc: subc $rs1,$rs2,$rd */
4124
4125 SEM_STATUS
4126 SEM_FN_NAME (sparc64,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4127 {
4128   SEM_STATUS status = 0;
4129   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4130   int UNUSED written = 0;
4131   IADDR UNUSED pc = GET_H_PC ();
4132   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4133   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4134   EXTRACT_IFMT_LDSB_REG_REG_CODE
4135
4136   {
4137     SI opval = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4138     SET_H_GR (f_rd, opval);
4139     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4140   }
4141
4142   SEM_NBRANCH_FINI (vpc, 0);
4143   return status;
4144 }
4145
4146 /* subc-imm: subc $rs1,$simm13,$rd */
4147
4148 SEM_STATUS
4149 SEM_FN_NAME (sparc64,subc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4150 {
4151   SEM_STATUS status = 0;
4152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4153   int UNUSED written = 0;
4154   IADDR UNUSED pc = GET_H_PC ();
4155   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4156   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4157   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4158
4159   {
4160     SI opval = SUBCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4161     SET_H_GR (f_rd, opval);
4162     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4163   }
4164
4165   SEM_NBRANCH_FINI (vpc, 0);
4166   return status;
4167 }
4168
4169 /* addccc: addccc $rs1,$rs2,$rd */
4170
4171 SEM_STATUS
4172 SEM_FN_NAME (sparc64,addccc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4173 {
4174   SEM_STATUS status = 0;
4175   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4176   int UNUSED written = 0;
4177   IADDR UNUSED pc = GET_H_PC ();
4178   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4179   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4180   EXTRACT_IFMT_LDSB_REG_REG_CODE
4181
4182 do {
4183 do {
4184   SI tmp_x;
4185   tmp_x = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4186   {
4187     BI opval = ADDCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4188     CPU (h_icc_c) = opval;
4189     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4190   }
4191   {
4192     BI opval = ADDOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4193     CPU (h_icc_v) = opval;
4194     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4195   }
4196   {
4197     BI opval = LTSI (tmp_x, 0);
4198     CPU (h_icc_n) = opval;
4199     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4200   }
4201   {
4202     BI opval = EQSI (tmp_x, 0);
4203     CPU (h_icc_z) = opval;
4204     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4205   }
4206 } while (0);
4207   {
4208     SI opval = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4209     SET_H_GR (f_rd, opval);
4210     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4211   }
4212 } while (0);
4213
4214   SEM_NBRANCH_FINI (vpc, 0);
4215   return status;
4216 }
4217
4218 /* addccc-imm: addccc $rs1,$simm13,$rd */
4219
4220 SEM_STATUS
4221 SEM_FN_NAME (sparc64,addccc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4222 {
4223   SEM_STATUS status = 0;
4224   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4225   int UNUSED written = 0;
4226   IADDR UNUSED pc = GET_H_PC ();
4227   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4228   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4229   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4230
4231 do {
4232 do {
4233   SI tmp_x;
4234   tmp_x = ADDCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4235   {
4236     BI opval = ADDCFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4237     CPU (h_icc_c) = opval;
4238     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4239   }
4240   {
4241     BI opval = ADDOFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4242     CPU (h_icc_v) = opval;
4243     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4244   }
4245   {
4246     BI opval = LTSI (tmp_x, 0);
4247     CPU (h_icc_n) = opval;
4248     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4249   }
4250   {
4251     BI opval = EQSI (tmp_x, 0);
4252     CPU (h_icc_z) = opval;
4253     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4254   }
4255 } while (0);
4256   {
4257     SI opval = ADDCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4258     SET_H_GR (f_rd, opval);
4259     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4260   }
4261 } while (0);
4262
4263   SEM_NBRANCH_FINI (vpc, 0);
4264   return status;
4265 }
4266
4267 /* subccc: subccc $rs1,$rs2,$rd */
4268
4269 SEM_STATUS
4270 SEM_FN_NAME (sparc64,subccc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4271 {
4272   SEM_STATUS status = 0;
4273   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4274   int UNUSED written = 0;
4275   IADDR UNUSED pc = GET_H_PC ();
4276   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4277   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4278   EXTRACT_IFMT_LDSB_REG_REG_CODE
4279
4280 do {
4281 do {
4282   SI tmp_x;
4283   tmp_x = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4284   {
4285     BI opval = SUBCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4286     CPU (h_icc_c) = opval;
4287     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4288   }
4289   {
4290     BI opval = SUBOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4291     CPU (h_icc_v) = opval;
4292     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4293   }
4294   {
4295     BI opval = LTSI (tmp_x, 0);
4296     CPU (h_icc_n) = opval;
4297     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4298   }
4299   {
4300     BI opval = EQSI (tmp_x, 0);
4301     CPU (h_icc_z) = opval;
4302     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4303   }
4304 } while (0);
4305   {
4306     SI opval = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
4307     SET_H_GR (f_rd, opval);
4308     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4309   }
4310 } while (0);
4311
4312   SEM_NBRANCH_FINI (vpc, 0);
4313   return status;
4314 }
4315
4316 /* subccc-imm: subccc $rs1,$simm13,$rd */
4317
4318 SEM_STATUS
4319 SEM_FN_NAME (sparc64,subccc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4320 {
4321   SEM_STATUS status = 0;
4322   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4323   int UNUSED written = 0;
4324   IADDR UNUSED pc = GET_H_PC ();
4325   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4326   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4327   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4328
4329 do {
4330 do {
4331   SI tmp_x;
4332   tmp_x = SUBCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4333   {
4334     BI opval = SUBCFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4335     CPU (h_icc_c) = opval;
4336     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4337   }
4338   {
4339     BI opval = SUBOFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4340     CPU (h_icc_v) = opval;
4341     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4342   }
4343   {
4344     BI opval = LTSI (tmp_x, 0);
4345     CPU (h_icc_n) = opval;
4346     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4347   }
4348   {
4349     BI opval = EQSI (tmp_x, 0);
4350     CPU (h_icc_z) = opval;
4351     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4352   }
4353 } while (0);
4354   {
4355     SI opval = SUBCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
4356     SET_H_GR (f_rd, opval);
4357     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4358   }
4359 } while (0);
4360
4361   SEM_NBRANCH_FINI (vpc, 0);
4362   return status;
4363 }
4364
4365 /* and: and $rs1,$rs2,$rd */
4366
4367 SEM_STATUS
4368 SEM_FN_NAME (sparc64,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4369 {
4370   SEM_STATUS status = 0;
4371   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4372   int UNUSED written = 0;
4373   IADDR UNUSED pc = GET_H_PC ();
4374   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4375   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4376   EXTRACT_IFMT_LDSB_REG_REG_CODE
4377
4378   {
4379     SI opval = ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4380     SET_H_GR (f_rd, opval);
4381     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4382   }
4383
4384   SEM_NBRANCH_FINI (vpc, 0);
4385   return status;
4386 }
4387
4388 /* and-imm: and $rs1,$simm13,$rd */
4389
4390 SEM_STATUS
4391 SEM_FN_NAME (sparc64,and_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4392 {
4393   SEM_STATUS status = 0;
4394   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4395   int UNUSED written = 0;
4396   IADDR UNUSED pc = GET_H_PC ();
4397   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4398   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4399   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4400
4401   {
4402     SI opval = ANDSI (GET_H_GR (f_rs1), f_simm13);
4403     SET_H_GR (f_rd, opval);
4404     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4405   }
4406
4407   SEM_NBRANCH_FINI (vpc, 0);
4408   return status;
4409 }
4410
4411 /* andcc: andcc $rs1,$rs2,$rd */
4412
4413 SEM_STATUS
4414 SEM_FN_NAME (sparc64,andcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4415 {
4416   SEM_STATUS status = 0;
4417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4418   int UNUSED written = 0;
4419   IADDR UNUSED pc = GET_H_PC ();
4420   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4421   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4422   EXTRACT_IFMT_LDSB_REG_REG_CODE
4423
4424 do {
4425 do {
4426   {
4427     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
4428     CPU (h_icc_z) = opval;
4429     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4430   }
4431   {
4432     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
4433     CPU (h_icc_n) = opval;
4434     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4435   }
4436   {
4437     BI opval = 0;
4438     CPU (h_icc_c) = opval;
4439     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4440   }
4441   {
4442     BI opval = 0;
4443     CPU (h_icc_v) = opval;
4444     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4445   }
4446 } while (0);
4447   {
4448     SI opval = ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4449     SET_H_GR (f_rd, opval);
4450     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4451   }
4452 } while (0);
4453
4454   SEM_NBRANCH_FINI (vpc, 0);
4455   return status;
4456 }
4457
4458 /* andcc-imm: andcc $rs1,$simm13,$rd */
4459
4460 SEM_STATUS
4461 SEM_FN_NAME (sparc64,andcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4462 {
4463   SEM_STATUS status = 0;
4464   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4465   int UNUSED written = 0;
4466   IADDR UNUSED pc = GET_H_PC ();
4467   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4468   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4469   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4470
4471 do {
4472 do {
4473   {
4474     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), f_simm13), 0);
4475     CPU (h_icc_z) = opval;
4476     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4477   }
4478   {
4479     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), f_simm13), 0);
4480     CPU (h_icc_n) = opval;
4481     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4482   }
4483   {
4484     BI opval = 0;
4485     CPU (h_icc_c) = opval;
4486     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4487   }
4488   {
4489     BI opval = 0;
4490     CPU (h_icc_v) = opval;
4491     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4492   }
4493 } while (0);
4494   {
4495     SI opval = ANDSI (GET_H_GR (f_rs1), f_simm13);
4496     SET_H_GR (f_rd, opval);
4497     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4498   }
4499 } while (0);
4500
4501   SEM_NBRANCH_FINI (vpc, 0);
4502   return status;
4503 }
4504
4505 /* or: or $rs1,$rs2,$rd */
4506
4507 SEM_STATUS
4508 SEM_FN_NAME (sparc64,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4509 {
4510   SEM_STATUS status = 0;
4511   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4512   int UNUSED written = 0;
4513   IADDR UNUSED pc = GET_H_PC ();
4514   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4515   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4516   EXTRACT_IFMT_LDSB_REG_REG_CODE
4517
4518   {
4519     SI opval = ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4520     SET_H_GR (f_rd, opval);
4521     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4522   }
4523
4524   SEM_NBRANCH_FINI (vpc, 0);
4525   return status;
4526 }
4527
4528 /* or-imm: or $rs1,$simm13,$rd */
4529
4530 SEM_STATUS
4531 SEM_FN_NAME (sparc64,or_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4532 {
4533   SEM_STATUS status = 0;
4534   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4535   int UNUSED written = 0;
4536   IADDR UNUSED pc = GET_H_PC ();
4537   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4538   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4539   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4540
4541   {
4542     SI opval = ORSI (GET_H_GR (f_rs1), f_simm13);
4543     SET_H_GR (f_rd, opval);
4544     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4545   }
4546
4547   SEM_NBRANCH_FINI (vpc, 0);
4548   return status;
4549 }
4550
4551 /* orcc: orcc $rs1,$rs2,$rd */
4552
4553 SEM_STATUS
4554 SEM_FN_NAME (sparc64,orcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4555 {
4556   SEM_STATUS status = 0;
4557   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4558   int UNUSED written = 0;
4559   IADDR UNUSED pc = GET_H_PC ();
4560   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4561   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4562   EXTRACT_IFMT_LDSB_REG_REG_CODE
4563
4564 do {
4565 do {
4566   {
4567     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
4568     CPU (h_icc_z) = opval;
4569     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4570   }
4571   {
4572     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
4573     CPU (h_icc_n) = opval;
4574     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4575   }
4576   {
4577     BI opval = 0;
4578     CPU (h_icc_c) = opval;
4579     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4580   }
4581   {
4582     BI opval = 0;
4583     CPU (h_icc_v) = opval;
4584     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4585   }
4586 } while (0);
4587   {
4588     SI opval = ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4589     SET_H_GR (f_rd, opval);
4590     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4591   }
4592 } while (0);
4593
4594   SEM_NBRANCH_FINI (vpc, 0);
4595   return status;
4596 }
4597
4598 /* orcc-imm: orcc $rs1,$simm13,$rd */
4599
4600 SEM_STATUS
4601 SEM_FN_NAME (sparc64,orcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4602 {
4603   SEM_STATUS status = 0;
4604   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4605   int UNUSED written = 0;
4606   IADDR UNUSED pc = GET_H_PC ();
4607   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4608   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4609   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4610
4611 do {
4612 do {
4613   {
4614     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), f_simm13), 0);
4615     CPU (h_icc_z) = opval;
4616     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4617   }
4618   {
4619     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), f_simm13), 0);
4620     CPU (h_icc_n) = opval;
4621     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4622   }
4623   {
4624     BI opval = 0;
4625     CPU (h_icc_c) = opval;
4626     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4627   }
4628   {
4629     BI opval = 0;
4630     CPU (h_icc_v) = opval;
4631     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4632   }
4633 } while (0);
4634   {
4635     SI opval = ORSI (GET_H_GR (f_rs1), f_simm13);
4636     SET_H_GR (f_rd, opval);
4637     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4638   }
4639 } while (0);
4640
4641   SEM_NBRANCH_FINI (vpc, 0);
4642   return status;
4643 }
4644
4645 /* xor: xor $rs1,$rs2,$rd */
4646
4647 SEM_STATUS
4648 SEM_FN_NAME (sparc64,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4649 {
4650   SEM_STATUS status = 0;
4651   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4652   int UNUSED written = 0;
4653   IADDR UNUSED pc = GET_H_PC ();
4654   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4655   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4656   EXTRACT_IFMT_LDSB_REG_REG_CODE
4657
4658   {
4659     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4660     SET_H_GR (f_rd, opval);
4661     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4662   }
4663
4664   SEM_NBRANCH_FINI (vpc, 0);
4665   return status;
4666 }
4667
4668 /* xor-imm: xor $rs1,$simm13,$rd */
4669
4670 SEM_STATUS
4671 SEM_FN_NAME (sparc64,xor_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4672 {
4673   SEM_STATUS status = 0;
4674   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4675   int UNUSED written = 0;
4676   IADDR UNUSED pc = GET_H_PC ();
4677   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4678   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4679   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4680
4681   {
4682     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
4683     SET_H_GR (f_rd, opval);
4684     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4685   }
4686
4687   SEM_NBRANCH_FINI (vpc, 0);
4688   return status;
4689 }
4690
4691 /* xorcc: xorcc $rs1,$rs2,$rd */
4692
4693 SEM_STATUS
4694 SEM_FN_NAME (sparc64,xorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4695 {
4696   SEM_STATUS status = 0;
4697   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4698   int UNUSED written = 0;
4699   IADDR UNUSED pc = GET_H_PC ();
4700   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4701   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4702   EXTRACT_IFMT_LDSB_REG_REG_CODE
4703
4704 do {
4705 do {
4706   {
4707     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
4708     CPU (h_icc_z) = opval;
4709     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4710   }
4711   {
4712     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
4713     CPU (h_icc_n) = opval;
4714     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4715   }
4716   {
4717     BI opval = 0;
4718     CPU (h_icc_c) = opval;
4719     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4720   }
4721   {
4722     BI opval = 0;
4723     CPU (h_icc_v) = opval;
4724     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4725   }
4726 } while (0);
4727   {
4728     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4729     SET_H_GR (f_rd, opval);
4730     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4731   }
4732 } while (0);
4733
4734   SEM_NBRANCH_FINI (vpc, 0);
4735   return status;
4736 }
4737
4738 /* xorcc-imm: xorcc $rs1,$simm13,$rd */
4739
4740 SEM_STATUS
4741 SEM_FN_NAME (sparc64,xorcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4742 {
4743   SEM_STATUS status = 0;
4744   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4745   int UNUSED written = 0;
4746   IADDR UNUSED pc = GET_H_PC ();
4747   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4748   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4749   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4750
4751 do {
4752 do {
4753   {
4754     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), f_simm13), 0);
4755     CPU (h_icc_z) = opval;
4756     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4757   }
4758   {
4759     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), f_simm13), 0);
4760     CPU (h_icc_n) = opval;
4761     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4762   }
4763   {
4764     BI opval = 0;
4765     CPU (h_icc_c) = opval;
4766     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4767   }
4768   {
4769     BI opval = 0;
4770     CPU (h_icc_v) = opval;
4771     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4772   }
4773 } while (0);
4774   {
4775     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
4776     SET_H_GR (f_rd, opval);
4777     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4778   }
4779 } while (0);
4780
4781   SEM_NBRANCH_FINI (vpc, 0);
4782   return status;
4783 }
4784
4785 /* andn: andn $rs1,$rs2,$rd */
4786
4787 SEM_STATUS
4788 SEM_FN_NAME (sparc64,andn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4789 {
4790   SEM_STATUS status = 0;
4791   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4792   int UNUSED written = 0;
4793   IADDR UNUSED pc = GET_H_PC ();
4794   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4795   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4796   EXTRACT_IFMT_LDSB_REG_REG_CODE
4797
4798   {
4799     SI opval = ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
4800     SET_H_GR (f_rd, opval);
4801     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4802   }
4803
4804   SEM_NBRANCH_FINI (vpc, 0);
4805   return status;
4806 }
4807
4808 /* andn-imm: andn $rs1,$simm13,$rd */
4809
4810 SEM_STATUS
4811 SEM_FN_NAME (sparc64,andn_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4812 {
4813   SEM_STATUS status = 0;
4814   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4815   int UNUSED written = 0;
4816   IADDR UNUSED pc = GET_H_PC ();
4817   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4818   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4819   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4820
4821   {
4822     SI opval = ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13));
4823     SET_H_GR (f_rd, opval);
4824     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4825   }
4826
4827   SEM_NBRANCH_FINI (vpc, 0);
4828   return status;
4829 }
4830
4831 /* andncc: andncc $rs1,$rs2,$rd */
4832
4833 SEM_STATUS
4834 SEM_FN_NAME (sparc64,andncc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4835 {
4836   SEM_STATUS status = 0;
4837   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4838   int UNUSED written = 0;
4839   IADDR UNUSED pc = GET_H_PC ();
4840   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4841   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4842   EXTRACT_IFMT_LDSB_REG_REG_CODE
4843
4844 do {
4845 do {
4846   {
4847     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
4848     CPU (h_icc_z) = opval;
4849     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4850   }
4851   {
4852     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
4853     CPU (h_icc_n) = opval;
4854     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4855   }
4856   {
4857     BI opval = 0;
4858     CPU (h_icc_c) = opval;
4859     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4860   }
4861   {
4862     BI opval = 0;
4863     CPU (h_icc_v) = opval;
4864     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4865   }
4866 } while (0);
4867   {
4868     SI opval = ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
4869     SET_H_GR (f_rd, opval);
4870     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4871   }
4872 } while (0);
4873
4874   SEM_NBRANCH_FINI (vpc, 0);
4875   return status;
4876 }
4877
4878 /* andncc-imm: andncc $rs1,$simm13,$rd */
4879
4880 SEM_STATUS
4881 SEM_FN_NAME (sparc64,andncc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4882 {
4883   SEM_STATUS status = 0;
4884   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4885   int UNUSED written = 0;
4886   IADDR UNUSED pc = GET_H_PC ();
4887   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4888   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4889   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4890
4891 do {
4892 do {
4893   {
4894     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
4895     CPU (h_icc_z) = opval;
4896     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4897   }
4898   {
4899     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
4900     CPU (h_icc_n) = opval;
4901     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4902   }
4903   {
4904     BI opval = 0;
4905     CPU (h_icc_c) = opval;
4906     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
4907   }
4908   {
4909     BI opval = 0;
4910     CPU (h_icc_v) = opval;
4911     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
4912   }
4913 } while (0);
4914   {
4915     SI opval = ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13));
4916     SET_H_GR (f_rd, opval);
4917     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4918   }
4919 } while (0);
4920
4921   SEM_NBRANCH_FINI (vpc, 0);
4922   return status;
4923 }
4924
4925 /* orn: orn $rs1,$rs2,$rd */
4926
4927 SEM_STATUS
4928 SEM_FN_NAME (sparc64,orn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4929 {
4930   SEM_STATUS status = 0;
4931   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4932   int UNUSED written = 0;
4933   IADDR UNUSED pc = GET_H_PC ();
4934   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4935   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4936   EXTRACT_IFMT_LDSB_REG_REG_CODE
4937
4938   {
4939     SI opval = ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
4940     SET_H_GR (f_rd, opval);
4941     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4942   }
4943
4944   SEM_NBRANCH_FINI (vpc, 0);
4945   return status;
4946 }
4947
4948 /* orn-imm: orn $rs1,$simm13,$rd */
4949
4950 SEM_STATUS
4951 SEM_FN_NAME (sparc64,orn_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4952 {
4953   SEM_STATUS status = 0;
4954   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4955   int UNUSED written = 0;
4956   IADDR UNUSED pc = GET_H_PC ();
4957   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4958   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4959   EXTRACT_IFMT_LDSB_REG_IMM_CODE
4960
4961   {
4962     SI opval = ORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
4963     SET_H_GR (f_rd, opval);
4964     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4965   }
4966
4967   SEM_NBRANCH_FINI (vpc, 0);
4968   return status;
4969 }
4970
4971 /* orncc: orncc $rs1,$rs2,$rd */
4972
4973 SEM_STATUS
4974 SEM_FN_NAME (sparc64,orncc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4975 {
4976   SEM_STATUS status = 0;
4977   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4978   int UNUSED written = 0;
4979   IADDR UNUSED pc = GET_H_PC ();
4980   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4981   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4982   EXTRACT_IFMT_LDSB_REG_REG_CODE
4983
4984 do {
4985 do {
4986   {
4987     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
4988     CPU (h_icc_z) = opval;
4989     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
4990   }
4991   {
4992     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
4993     CPU (h_icc_n) = opval;
4994     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
4995   }
4996   {
4997     BI opval = 0;
4998     CPU (h_icc_c) = opval;
4999     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5000   }
5001   {
5002     BI opval = 0;
5003     CPU (h_icc_v) = opval;
5004     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5005   }
5006 } while (0);
5007   {
5008     SI opval = ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
5009     SET_H_GR (f_rd, opval);
5010     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5011   }
5012 } while (0);
5013
5014   SEM_NBRANCH_FINI (vpc, 0);
5015   return status;
5016 }
5017
5018 /* orncc-imm: orncc $rs1,$simm13,$rd */
5019
5020 SEM_STATUS
5021 SEM_FN_NAME (sparc64,orncc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5022 {
5023   SEM_STATUS status = 0;
5024   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5025   int UNUSED written = 0;
5026   IADDR UNUSED pc = GET_H_PC ();
5027   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5028   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5029   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5030
5031 do {
5032 do {
5033   {
5034     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
5035     CPU (h_icc_z) = opval;
5036     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5037   }
5038   {
5039     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
5040     CPU (h_icc_n) = opval;
5041     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5042   }
5043   {
5044     BI opval = 0;
5045     CPU (h_icc_c) = opval;
5046     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5047   }
5048   {
5049     BI opval = 0;
5050     CPU (h_icc_v) = opval;
5051     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5052   }
5053 } while (0);
5054   {
5055     SI opval = ORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
5056     SET_H_GR (f_rd, opval);
5057     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5058   }
5059 } while (0);
5060
5061   SEM_NBRANCH_FINI (vpc, 0);
5062   return status;
5063 }
5064
5065 /* xnor: xnor $rs1,$rs2,$rd */
5066
5067 SEM_STATUS
5068 SEM_FN_NAME (sparc64,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5069 {
5070   SEM_STATUS status = 0;
5071   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5072   int UNUSED written = 0;
5073   IADDR UNUSED pc = GET_H_PC ();
5074   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5075   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5076   EXTRACT_IFMT_LDSB_REG_REG_CODE
5077
5078   {
5079     SI opval = XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
5080     SET_H_GR (f_rd, opval);
5081     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5082   }
5083
5084   SEM_NBRANCH_FINI (vpc, 0);
5085   return status;
5086 }
5087
5088 /* xnor-imm: xnor $rs1,$simm13,$rd */
5089
5090 SEM_STATUS
5091 SEM_FN_NAME (sparc64,xnor_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5092 {
5093   SEM_STATUS status = 0;
5094   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5095   int UNUSED written = 0;
5096   IADDR UNUSED pc = GET_H_PC ();
5097   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5098   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5099   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5100
5101   {
5102     SI opval = XORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
5103     SET_H_GR (f_rd, opval);
5104     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5105   }
5106
5107   SEM_NBRANCH_FINI (vpc, 0);
5108   return status;
5109 }
5110
5111 /* xnorcc: xnorcc $rs1,$rs2,$rd */
5112
5113 SEM_STATUS
5114 SEM_FN_NAME (sparc64,xnorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5115 {
5116   SEM_STATUS status = 0;
5117   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5118   int UNUSED written = 0;
5119   IADDR UNUSED pc = GET_H_PC ();
5120   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5121   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5122   EXTRACT_IFMT_LDSB_REG_REG_CODE
5123
5124 do {
5125 do {
5126   {
5127     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
5128     CPU (h_icc_z) = opval;
5129     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5130   }
5131   {
5132     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
5133     CPU (h_icc_n) = opval;
5134     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5135   }
5136   {
5137     BI opval = 0;
5138     CPU (h_icc_c) = opval;
5139     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5140   }
5141   {
5142     BI opval = 0;
5143     CPU (h_icc_v) = opval;
5144     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5145   }
5146 } while (0);
5147   {
5148     SI opval = XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
5149     SET_H_GR (f_rd, opval);
5150     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5151   }
5152 } while (0);
5153
5154   SEM_NBRANCH_FINI (vpc, 0);
5155   return status;
5156 }
5157
5158 /* xnorcc-imm: xnorcc $rs1,$simm13,$rd */
5159
5160 SEM_STATUS
5161 SEM_FN_NAME (sparc64,xnorcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5162 {
5163   SEM_STATUS status = 0;
5164   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5165   int UNUSED written = 0;
5166   IADDR UNUSED pc = GET_H_PC ();
5167   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5168   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5169   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5170
5171 do {
5172 do {
5173   {
5174     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
5175     CPU (h_icc_z) = opval;
5176     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5177   }
5178   {
5179     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
5180     CPU (h_icc_n) = opval;
5181     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5182   }
5183   {
5184     BI opval = 0;
5185     CPU (h_icc_c) = opval;
5186     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5187   }
5188   {
5189     BI opval = 0;
5190     CPU (h_icc_v) = opval;
5191     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5192   }
5193 } while (0);
5194   {
5195     SI opval = XORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
5196     SET_H_GR (f_rd, opval);
5197     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5198   }
5199 } while (0);
5200
5201   SEM_NBRANCH_FINI (vpc, 0);
5202   return status;
5203 }
5204
5205 /* sll: sll $rs1,$rs2,$rd */
5206
5207 SEM_STATUS
5208 SEM_FN_NAME (sparc64,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5209 {
5210   SEM_STATUS status = 0;
5211   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5212   int UNUSED written = 0;
5213   IADDR UNUSED pc = GET_H_PC ();
5214   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5215   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5216   EXTRACT_IFMT_LDSB_REG_REG_CODE
5217
5218   {
5219     SI opval = SLLSI (GET_H_GR (f_rs1), ANDSI (GET_H_GR (f_rs2), 31));
5220     SET_H_GR (f_rd, opval);
5221     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5222   }
5223
5224   SEM_NBRANCH_FINI (vpc, 0);
5225   return status;
5226 }
5227
5228 /* sll-imm: sll $rs1,$simm13,$rd */
5229
5230 SEM_STATUS
5231 SEM_FN_NAME (sparc64,sll_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5232 {
5233   SEM_STATUS status = 0;
5234   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5235   int UNUSED written = 0;
5236   IADDR UNUSED pc = GET_H_PC ();
5237   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5238   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5239   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5240
5241   {
5242     SI opval = SLLSI (GET_H_GR (f_rs1), ANDHI (f_simm13, 31));
5243     SET_H_GR (f_rd, opval);
5244     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5245   }
5246
5247   SEM_NBRANCH_FINI (vpc, 0);
5248   return status;
5249 }
5250
5251 /* srl: srl $rs1,$rs2,$rd */
5252
5253 SEM_STATUS
5254 SEM_FN_NAME (sparc64,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5255 {
5256   SEM_STATUS status = 0;
5257   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5258   int UNUSED written = 0;
5259   IADDR UNUSED pc = GET_H_PC ();
5260   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5261   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5262   EXTRACT_IFMT_LDSB_REG_REG_CODE
5263
5264   {
5265     SI opval = SRLSI (GET_H_GR (f_rs1), ANDSI (GET_H_GR (f_rs2), 31));
5266     SET_H_GR (f_rd, opval);
5267     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5268   }
5269
5270   SEM_NBRANCH_FINI (vpc, 0);
5271   return status;
5272 }
5273
5274 /* srl-imm: srl $rs1,$simm13,$rd */
5275
5276 SEM_STATUS
5277 SEM_FN_NAME (sparc64,srl_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5278 {
5279   SEM_STATUS status = 0;
5280   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5281   int UNUSED written = 0;
5282   IADDR UNUSED pc = GET_H_PC ();
5283   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5284   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5285   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5286
5287   {
5288     SI opval = SRLSI (GET_H_GR (f_rs1), ANDHI (f_simm13, 31));
5289     SET_H_GR (f_rd, opval);
5290     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5291   }
5292
5293   SEM_NBRANCH_FINI (vpc, 0);
5294   return status;
5295 }
5296
5297 /* sra: sra $rs1,$rs2,$rd */
5298
5299 SEM_STATUS
5300 SEM_FN_NAME (sparc64,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5301 {
5302   SEM_STATUS status = 0;
5303   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5304   int UNUSED written = 0;
5305   IADDR UNUSED pc = GET_H_PC ();
5306   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5307   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5308   EXTRACT_IFMT_LDSB_REG_REG_CODE
5309
5310   {
5311     SI opval = SRASI (GET_H_GR (f_rs1), ANDSI (GET_H_GR (f_rs2), 31));
5312     SET_H_GR (f_rd, opval);
5313     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5314   }
5315
5316   SEM_NBRANCH_FINI (vpc, 0);
5317   return status;
5318 }
5319
5320 /* sra-imm: sra $rs1,$simm13,$rd */
5321
5322 SEM_STATUS
5323 SEM_FN_NAME (sparc64,sra_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5324 {
5325   SEM_STATUS status = 0;
5326   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5327   int UNUSED written = 0;
5328   IADDR UNUSED pc = GET_H_PC ();
5329   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5330   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5331   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5332
5333   {
5334     SI opval = SRASI (GET_H_GR (f_rs1), ANDHI (f_simm13, 31));
5335     SET_H_GR (f_rd, opval);
5336     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5337   }
5338
5339   SEM_NBRANCH_FINI (vpc, 0);
5340   return status;
5341 }
5342
5343 /* smul: smul $rs1,$rs2,$rd */
5344
5345 SEM_STATUS
5346 SEM_FN_NAME (sparc64,smul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5347 {
5348   SEM_STATUS status = 0;
5349   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5350   int UNUSED written = 0;
5351   IADDR UNUSED pc = GET_H_PC ();
5352   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5353   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5354   EXTRACT_IFMT_LDSB_REG_REG_CODE
5355
5356 do {
5357   DI tmp_res;
5358   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTSIDI (GET_H_GR (f_rs2)));
5359   {
5360     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5361     SET_H_Y (opval);
5362     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5363   }
5364   {
5365     SI opval = TRUNCDISI (tmp_res);
5366     SET_H_GR (f_rd, opval);
5367     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5368   }
5369 } while (0);
5370
5371   SEM_NBRANCH_FINI (vpc, 0);
5372   return status;
5373 }
5374
5375 /* smul-imm: smul $rs1,$simm13,$rd */
5376
5377 SEM_STATUS
5378 SEM_FN_NAME (sparc64,smul_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5379 {
5380   SEM_STATUS status = 0;
5381   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5382   int UNUSED written = 0;
5383   IADDR UNUSED pc = GET_H_PC ();
5384   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5385   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5386   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5387
5388 do {
5389   DI tmp_res;
5390   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTHIDI (f_simm13));
5391   {
5392     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5393     SET_H_Y (opval);
5394     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5395   }
5396   {
5397     SI opval = TRUNCDISI (tmp_res);
5398     SET_H_GR (f_rd, opval);
5399     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5400   }
5401 } while (0);
5402
5403   SEM_NBRANCH_FINI (vpc, 0);
5404   return status;
5405 }
5406
5407 /* smul-cc: smulcc $rs1,$rs2,$rd */
5408
5409 SEM_STATUS
5410 SEM_FN_NAME (sparc64,smul_cc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5411 {
5412   SEM_STATUS status = 0;
5413   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5414   int UNUSED written = 0;
5415   IADDR UNUSED pc = GET_H_PC ();
5416   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5417   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5418   EXTRACT_IFMT_LDSB_REG_REG_CODE
5419
5420 do {
5421   DI tmp_res;
5422   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTSIDI (GET_H_GR (f_rs2)));
5423   {
5424     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5425     SET_H_Y (opval);
5426     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5427   }
5428   {
5429     SI opval = TRUNCDISI (tmp_res);
5430     SET_H_GR (f_rd, opval);
5431     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5432   }
5433 do {
5434   {
5435     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
5436     CPU (h_icc_z) = opval;
5437     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5438   }
5439   {
5440     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
5441     CPU (h_icc_n) = opval;
5442     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5443   }
5444   {
5445     BI opval = 0;
5446     CPU (h_icc_c) = opval;
5447     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5448   }
5449   {
5450     BI opval = 0;
5451     CPU (h_icc_v) = opval;
5452     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5453   }
5454 } while (0);
5455 } while (0);
5456
5457   SEM_NBRANCH_FINI (vpc, 0);
5458   return status;
5459 }
5460
5461 /* smul-cc-imm: smulcc $rs1,$simm13,$rd */
5462
5463 SEM_STATUS
5464 SEM_FN_NAME (sparc64,smul_cc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5465 {
5466   SEM_STATUS status = 0;
5467   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5468   int UNUSED written = 0;
5469   IADDR UNUSED pc = GET_H_PC ();
5470   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5471   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5472   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5473
5474 do {
5475   DI tmp_res;
5476   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTHIDI (f_simm13));
5477   {
5478     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5479     SET_H_Y (opval);
5480     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5481   }
5482   {
5483     SI opval = TRUNCDISI (tmp_res);
5484     SET_H_GR (f_rd, opval);
5485     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5486   }
5487 do {
5488   {
5489     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
5490     CPU (h_icc_z) = opval;
5491     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5492   }
5493   {
5494     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
5495     CPU (h_icc_n) = opval;
5496     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5497   }
5498   {
5499     BI opval = 0;
5500     CPU (h_icc_c) = opval;
5501     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5502   }
5503   {
5504     BI opval = 0;
5505     CPU (h_icc_v) = opval;
5506     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5507   }
5508 } while (0);
5509 } while (0);
5510
5511   SEM_NBRANCH_FINI (vpc, 0);
5512   return status;
5513 }
5514
5515 /* umul: umul $rs1,$rs2,$rd */
5516
5517 SEM_STATUS
5518 SEM_FN_NAME (sparc64,umul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5519 {
5520   SEM_STATUS status = 0;
5521   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5522   int UNUSED written = 0;
5523   IADDR UNUSED pc = GET_H_PC ();
5524   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5525   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5526   EXTRACT_IFMT_LDSB_REG_REG_CODE
5527
5528 do {
5529   DI tmp_res;
5530   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTSIDI (GET_H_GR (f_rs2)));
5531   {
5532     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5533     SET_H_Y (opval);
5534     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5535   }
5536   {
5537     SI opval = TRUNCDISI (tmp_res);
5538     SET_H_GR (f_rd, opval);
5539     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5540   }
5541 } while (0);
5542
5543   SEM_NBRANCH_FINI (vpc, 0);
5544   return status;
5545 }
5546
5547 /* umul-imm: umul $rs1,$simm13,$rd */
5548
5549 SEM_STATUS
5550 SEM_FN_NAME (sparc64,umul_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5551 {
5552   SEM_STATUS status = 0;
5553   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5554   int UNUSED written = 0;
5555   IADDR UNUSED pc = GET_H_PC ();
5556   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5557   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5558   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5559
5560 do {
5561   DI tmp_res;
5562   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTHIDI (f_simm13));
5563   {
5564     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5565     SET_H_Y (opval);
5566     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5567   }
5568   {
5569     SI opval = TRUNCDISI (tmp_res);
5570     SET_H_GR (f_rd, opval);
5571     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5572   }
5573 } while (0);
5574
5575   SEM_NBRANCH_FINI (vpc, 0);
5576   return status;
5577 }
5578
5579 /* umul-cc: umulcc $rs1,$rs2,$rd */
5580
5581 SEM_STATUS
5582 SEM_FN_NAME (sparc64,umul_cc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5583 {
5584   SEM_STATUS status = 0;
5585   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5586   int UNUSED written = 0;
5587   IADDR UNUSED pc = GET_H_PC ();
5588   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5589   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5590   EXTRACT_IFMT_LDSB_REG_REG_CODE
5591
5592 do {
5593   DI tmp_res;
5594   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTSIDI (GET_H_GR (f_rs2)));
5595   {
5596     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5597     SET_H_Y (opval);
5598     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5599   }
5600   {
5601     SI opval = TRUNCDISI (tmp_res);
5602     SET_H_GR (f_rd, opval);
5603     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5604   }
5605 do {
5606   {
5607     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
5608     CPU (h_icc_z) = opval;
5609     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5610   }
5611   {
5612     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
5613     CPU (h_icc_n) = opval;
5614     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5615   }
5616   {
5617     BI opval = 0;
5618     CPU (h_icc_c) = opval;
5619     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5620   }
5621   {
5622     BI opval = 0;
5623     CPU (h_icc_v) = opval;
5624     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5625   }
5626 } while (0);
5627 } while (0);
5628
5629   SEM_NBRANCH_FINI (vpc, 0);
5630   return status;
5631 }
5632
5633 /* umul-cc-imm: umulcc $rs1,$simm13,$rd */
5634
5635 SEM_STATUS
5636 SEM_FN_NAME (sparc64,umul_cc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5637 {
5638   SEM_STATUS status = 0;
5639   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5640   int UNUSED written = 0;
5641   IADDR UNUSED pc = GET_H_PC ();
5642   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5643   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5644   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5645
5646 do {
5647   DI tmp_res;
5648   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTHIDI (f_simm13));
5649   {
5650     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
5651     SET_H_Y (opval);
5652     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5653   }
5654   {
5655     SI opval = TRUNCDISI (tmp_res);
5656     SET_H_GR (f_rd, opval);
5657     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5658   }
5659 do {
5660   {
5661     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
5662     CPU (h_icc_z) = opval;
5663     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5664   }
5665   {
5666     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
5667     CPU (h_icc_n) = opval;
5668     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5669   }
5670   {
5671     BI opval = 0;
5672     CPU (h_icc_c) = opval;
5673     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5674   }
5675   {
5676     BI opval = 0;
5677     CPU (h_icc_v) = opval;
5678     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5679   }
5680 } while (0);
5681 } while (0);
5682
5683   SEM_NBRANCH_FINI (vpc, 0);
5684   return status;
5685 }
5686
5687 /* mulscc: mulscc $rs1,$rs2,$rd */
5688
5689 SEM_STATUS
5690 SEM_FN_NAME (sparc64,mulscc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5691 {
5692   SEM_STATUS status = 0;
5693   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5694   int UNUSED written = 0;
5695   IADDR UNUSED pc = GET_H_PC ();
5696   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5697   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5698   EXTRACT_IFMT_LDSB_REG_REG_CODE
5699
5700 do {
5701   SI tmp_rd_tmp;
5702   SI tmp_add_tmp;
5703   SI tmp_tmp;
5704   tmp_tmp = SRLSI (GET_H_GR (f_rs1), 1);
5705 if (NEBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)), 0)) {
5706   tmp_tmp = ORSI (tmp_tmp, 0x80000000);
5707 }
5708 if (NESI (ANDSI (GET_H_Y (), 1), 0)) {
5709   tmp_add_tmp = GET_H_GR (f_rs2);
5710 } else {
5711   tmp_add_tmp = 0;
5712 }
5713   tmp_rd_tmp = ADDSI (tmp_tmp, tmp_add_tmp);
5714 do {
5715   SI tmp_x;
5716   tmp_x = ADDCSI (tmp_tmp, tmp_add_tmp, 0);
5717   {
5718     BI opval = ADDCFSI (tmp_tmp, tmp_add_tmp, 0);
5719     CPU (h_icc_c) = opval;
5720     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
5721   }
5722   {
5723     BI opval = ADDOFSI (tmp_tmp, tmp_add_tmp, 0);
5724     CPU (h_icc_v) = opval;
5725     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
5726   }
5727   {
5728     BI opval = LTSI (tmp_x, 0);
5729     CPU (h_icc_n) = opval;
5730     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
5731   }
5732   {
5733     BI opval = EQSI (tmp_x, 0);
5734     CPU (h_icc_z) = opval;
5735     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
5736   }
5737 } while (0);
5738   {
5739     SI opval = SRLSI (GET_H_Y (), 1);
5740     SET_H_Y (opval);
5741     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5742   }
5743 if (NESI (ANDSI (GET_H_GR (f_rs1), 1), 0)) {
5744   {
5745     SI opval = ORSI (GET_H_Y (), 0x80000000);
5746     SET_H_Y (opval);
5747     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
5748   }
5749 }
5750   {
5751     SI opval = tmp_rd_tmp;
5752     SET_H_GR (f_rd, opval);
5753     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5754   }
5755 } while (0);
5756
5757   SEM_NBRANCH_FINI (vpc, 0);
5758   return status;
5759 }
5760
5761 /* save: save $rs1,$rs2,$rd */
5762
5763 SEM_STATUS
5764 SEM_FN_NAME (sparc64,save) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5765 {
5766   SEM_STATUS status = 0;
5767   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5768   int UNUSED written = 0;
5769   IADDR UNUSED pc = GET_H_PC ();
5770   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5771   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5772   EXTRACT_IFMT_LDSB_REG_REG_CODE
5773
5774   {
5775     SI opval = sparc64_do_save (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5776     SET_H_GR (f_rd, opval);
5777     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5778   }
5779
5780   SEM_NBRANCH_FINI (vpc, 0);
5781   return status;
5782 }
5783
5784 /* save-imm: save $rs1,$simm13,$rd */
5785
5786 SEM_STATUS
5787 SEM_FN_NAME (sparc64,save_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5788 {
5789   SEM_STATUS status = 0;
5790   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5791   int UNUSED written = 0;
5792   IADDR UNUSED pc = GET_H_PC ();
5793   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5794   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5795   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5796
5797   {
5798     SI opval = sparc64_do_save (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5799     SET_H_GR (f_rd, opval);
5800     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5801   }
5802
5803   SEM_NBRANCH_FINI (vpc, 0);
5804   return status;
5805 }
5806
5807 /* restore: restore $rs1,$rs2,$rd */
5808
5809 SEM_STATUS
5810 SEM_FN_NAME (sparc64,restore) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5811 {
5812   SEM_STATUS status = 0;
5813   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5814   int UNUSED written = 0;
5815   IADDR UNUSED pc = GET_H_PC ();
5816   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5817   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5818   EXTRACT_IFMT_LDSB_REG_REG_CODE
5819
5820   {
5821     SI opval = sparc64_do_restore (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5822     SET_H_GR (f_rd, opval);
5823     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5824   }
5825
5826   SEM_NBRANCH_FINI (vpc, 0);
5827   return status;
5828 }
5829
5830 /* restore-imm: restore $rs1,$simm13,$rd */
5831
5832 SEM_STATUS
5833 SEM_FN_NAME (sparc64,restore_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5834 {
5835   SEM_STATUS status = 0;
5836   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5837   int UNUSED written = 0;
5838   IADDR UNUSED pc = GET_H_PC ();
5839   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5840   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5841   EXTRACT_IFMT_LDSB_REG_IMM_CODE
5842
5843   {
5844     SI opval = sparc64_do_restore (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5845     SET_H_GR (f_rd, opval);
5846     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5847   }
5848
5849   SEM_NBRANCH_FINI (vpc, 0);
5850   return status;
5851 }
5852
5853 /* rett: rett $rs1,$rs2 */
5854
5855 SEM_STATUS
5856 SEM_FN_NAME (sparc64,rett) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5857 {
5858   SEM_STATUS status = 0;
5859   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5860   int UNUSED written = 0;
5861   IADDR UNUSED pc = GET_H_PC ();
5862   SEM_BRANCH_INIT
5863   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5864   EXTRACT_IFMT_FLUSH_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5865   EXTRACT_IFMT_FLUSH_CODE
5866
5867 do {
5868   {
5869     USI opval = sparc64_do_rett (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5870     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5871     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5872   }
5873 } while (0);
5874
5875   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5876   return status;
5877 }
5878
5879 /* rett-imm: rett $rs1,$simm13 */
5880
5881 SEM_STATUS
5882 SEM_FN_NAME (sparc64,rett_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5883 {
5884   SEM_STATUS status = 0;
5885   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5886   int UNUSED written = 0;
5887   IADDR UNUSED pc = GET_H_PC ();
5888   SEM_BRANCH_INIT
5889   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5890   EXTRACT_IFMT_FLUSH_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
5891   EXTRACT_IFMT_FLUSH_IMM_CODE
5892
5893 do {
5894   {
5895     USI opval = sparc64_do_rett (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5896     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5897     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5898   }
5899 } while (0);
5900
5901   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5902   return status;
5903 }
5904
5905 /* unimp: unimp $imm22 */
5906
5907 SEM_STATUS
5908 SEM_FN_NAME (sparc64,unimp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5909 {
5910   SEM_STATUS status = 0;
5911   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5912   int UNUSED written = 0;
5913   IADDR UNUSED pc = GET_H_PC ();
5914   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5915   EXTRACT_IFMT_UNIMP_VARS /* f-imm22 f-op2 f-rd-res f-op */
5916   EXTRACT_IFMT_UNIMP_CODE
5917
5918 sparc_do_unimp (current_cpu, pc, f_imm22);
5919
5920   SEM_NBRANCH_FINI (vpc, 0);
5921   return status;
5922 }
5923
5924 /* call: call $disp30 */
5925
5926 SEM_STATUS
5927 SEM_FN_NAME (sparc64,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5928 {
5929   SEM_STATUS status = 0;
5930   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5931   int UNUSED written = 0;
5932   IADDR UNUSED pc = GET_H_PC ();
5933   SEM_BRANCH_INIT
5934   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5935   EXTRACT_IFMT_CALL_VARS /* f-disp30 f-op */
5936       IADDR i_disp30;
5937   EXTRACT_IFMT_CALL_CODE
5938   i_disp30 = f_disp30;
5939
5940 do {
5941   {
5942     SI opval = pc;
5943     SET_H_GR (((UINT) 15), opval);
5944     TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5945   }
5946 do {
5947   {
5948     USI opval = i_disp30;
5949     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5950     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5951   }
5952 } while (0);
5953 } while (0);
5954
5955   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5956   return status;
5957 }
5958
5959 /* jmpl: jmpl $rs1+$rs2,$rd */
5960
5961 SEM_STATUS
5962 SEM_FN_NAME (sparc64,jmpl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5963 {
5964   SEM_STATUS status = 0;
5965   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5966   int UNUSED written = 0;
5967   IADDR UNUSED pc = GET_H_PC ();
5968   SEM_BRANCH_INIT
5969   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5970   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
5971   EXTRACT_IFMT_LDSB_REG_REG_CODE
5972
5973 do {
5974   {
5975     SI opval = pc;
5976     SET_H_GR (f_rd, opval);
5977     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
5978   }
5979 do {
5980   {
5981     USI opval = ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5982     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5983     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5984   }
5985 } while (0);
5986 } while (0);
5987
5988   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5989   return status;
5990 }
5991
5992 /* jmpl-imm: jmpl $rs1+$simm13,$rd */
5993
5994 SEM_STATUS
5995 SEM_FN_NAME (sparc64,jmpl_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5996 {
5997   SEM_STATUS status = 0;
5998   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5999   int UNUSED written = 0;
6000   IADDR UNUSED pc = GET_H_PC ();
6001   SEM_BRANCH_INIT
6002   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6003   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
6004   EXTRACT_IFMT_LDSB_REG_IMM_CODE
6005
6006 do {
6007   {
6008     SI opval = pc;
6009     SET_H_GR (f_rd, opval);
6010     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
6011   }
6012 do {
6013   {
6014     USI opval = ADDSI (GET_H_GR (f_rs1), f_simm13);
6015     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6016     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6017   }
6018 } while (0);
6019 } while (0);
6020
6021   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6022   return status;
6023 }
6024
6025 /* ba: ba$a $disp22 */
6026
6027 SEM_STATUS
6028 SEM_FN_NAME (sparc64,ba) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6029 {
6030   SEM_STATUS status = 0;
6031   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6032   int UNUSED written = 0;
6033   IADDR UNUSED pc = GET_H_PC ();
6034   SEM_BRANCH_INIT
6035   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6036   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6037       IADDR i_disp22;
6038   EXTRACT_IFMT_BA_CODE
6039   i_disp22 = f_disp22;
6040
6041 do {
6042 do {
6043   {
6044     USI opval = i_disp22;
6045     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6046     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6047   }
6048 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6049 } while (0);
6050 } while (0);
6051
6052   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6053   return status;
6054 }
6055
6056 /* ta: ta $rs1,$rs2 */
6057
6058 SEM_STATUS
6059 SEM_FN_NAME (sparc64,ta) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6060 {
6061   SEM_STATUS status = 0;
6062   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6063   int UNUSED written = 0;
6064   IADDR UNUSED pc = GET_H_PC ();
6065   SEM_BRANCH_INIT
6066   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6067   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6068   EXTRACT_IFMT_TA_CODE
6069
6070   {
6071     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6072 ;
6073     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6074     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6075   }
6076
6077   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6078   return status;
6079 }
6080
6081 /* ta-imm: ta $rs1,$simm13 */
6082
6083 SEM_STATUS
6084 SEM_FN_NAME (sparc64,ta_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6085 {
6086   SEM_STATUS status = 0;
6087   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6088   int UNUSED written = 0;
6089   IADDR UNUSED pc = GET_H_PC ();
6090   SEM_BRANCH_INIT
6091   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6092   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6093   EXTRACT_IFMT_TA_IMM_CODE
6094
6095   {
6096     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6097 ;
6098     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6099     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6100   }
6101
6102   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6103   return status;
6104 }
6105
6106 /* bn: bn$a $disp22 */
6107
6108 SEM_STATUS
6109 SEM_FN_NAME (sparc64,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6110 {
6111   SEM_STATUS status = 0;
6112   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6113   int UNUSED written = 0;
6114   IADDR UNUSED pc = GET_H_PC ();
6115   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6116   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6117   EXTRACT_IFMT_BA_CODE
6118
6119 do {
6120 do {
6121 do { } while (0); /*nop*/
6122 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6123 } while (0);
6124 } while (0);
6125
6126   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6127   return status;
6128 }
6129
6130 /* tn: tn $rs1,$rs2 */
6131
6132 SEM_STATUS
6133 SEM_FN_NAME (sparc64,tn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6134 {
6135   SEM_STATUS status = 0;
6136   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6137   int UNUSED written = 0;
6138   IADDR UNUSED pc = GET_H_PC ();
6139   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6140   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6141   EXTRACT_IFMT_TA_CODE
6142
6143 do { } while (0); /*nop*/
6144
6145   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET)));
6146   return status;
6147 }
6148
6149 /* tn-imm: tn $rs1,$simm13 */
6150
6151 SEM_STATUS
6152 SEM_FN_NAME (sparc64,tn_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6153 {
6154   SEM_STATUS status = 0;
6155   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6156   int UNUSED written = 0;
6157   IADDR UNUSED pc = GET_H_PC ();
6158   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6159   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6160   EXTRACT_IFMT_TA_IMM_CODE
6161
6162 do { } while (0); /*nop*/
6163
6164   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET)));
6165   return status;
6166 }
6167
6168 /* bne: bne$a $disp22 */
6169
6170 SEM_STATUS
6171 SEM_FN_NAME (sparc64,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6172 {
6173   SEM_STATUS status = 0;
6174   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6175   int UNUSED written = 0;
6176   IADDR UNUSED pc = GET_H_PC ();
6177   SEM_BRANCH_INIT
6178   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6179   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6180       IADDR i_disp22;
6181   EXTRACT_IFMT_BA_CODE
6182   i_disp22 = f_disp22;
6183
6184 do {
6185 if (NOTBI (CPU (h_icc_z))) {
6186   {
6187     USI opval = i_disp22;
6188     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6189     written |= (1 << 3);
6190     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6191   }
6192 } else {
6193 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6194 }
6195 } while (0);
6196
6197   abuf->written = written;
6198   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6199   return status;
6200 }
6201
6202 /* tne: tne $rs1,$rs2 */
6203
6204 SEM_STATUS
6205 SEM_FN_NAME (sparc64,tne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6206 {
6207   SEM_STATUS status = 0;
6208   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6209   int UNUSED written = 0;
6210   IADDR UNUSED pc = GET_H_PC ();
6211   SEM_BRANCH_INIT
6212   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6213   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6214   EXTRACT_IFMT_TA_CODE
6215
6216 if (NOTBI (CPU (h_icc_z))) {
6217   {
6218     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6219 ;
6220     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6221     written |= (1 << 4);
6222     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6223   }
6224 }
6225
6226   abuf->written = written;
6227   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6228   return status;
6229 }
6230
6231 /* tne-imm: tne $rs1,$simm13 */
6232
6233 SEM_STATUS
6234 SEM_FN_NAME (sparc64,tne_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6235 {
6236   SEM_STATUS status = 0;
6237   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6238   int UNUSED written = 0;
6239   IADDR UNUSED pc = GET_H_PC ();
6240   SEM_BRANCH_INIT
6241   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6242   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6243   EXTRACT_IFMT_TA_IMM_CODE
6244
6245 if (NOTBI (CPU (h_icc_z))) {
6246   {
6247     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6248 ;
6249     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6250     written |= (1 << 4);
6251     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6252   }
6253 }
6254
6255   abuf->written = written;
6256   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6257   return status;
6258 }
6259
6260 /* be: be$a $disp22 */
6261
6262 SEM_STATUS
6263 SEM_FN_NAME (sparc64,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6264 {
6265   SEM_STATUS status = 0;
6266   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6267   int UNUSED written = 0;
6268   IADDR UNUSED pc = GET_H_PC ();
6269   SEM_BRANCH_INIT
6270   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6271   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6272       IADDR i_disp22;
6273   EXTRACT_IFMT_BA_CODE
6274   i_disp22 = f_disp22;
6275
6276 do {
6277 if (CPU (h_icc_z)) {
6278   {
6279     USI opval = i_disp22;
6280     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6281     written |= (1 << 3);
6282     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6283   }
6284 } else {
6285 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6286 }
6287 } while (0);
6288
6289   abuf->written = written;
6290   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6291   return status;
6292 }
6293
6294 /* te: te $rs1,$rs2 */
6295
6296 SEM_STATUS
6297 SEM_FN_NAME (sparc64,te) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6298 {
6299   SEM_STATUS status = 0;
6300   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6301   int UNUSED written = 0;
6302   IADDR UNUSED pc = GET_H_PC ();
6303   SEM_BRANCH_INIT
6304   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6305   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6306   EXTRACT_IFMT_TA_CODE
6307
6308 if (CPU (h_icc_z)) {
6309   {
6310     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6311 ;
6312     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6313     written |= (1 << 4);
6314     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6315   }
6316 }
6317
6318   abuf->written = written;
6319   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6320   return status;
6321 }
6322
6323 /* te-imm: te $rs1,$simm13 */
6324
6325 SEM_STATUS
6326 SEM_FN_NAME (sparc64,te_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6327 {
6328   SEM_STATUS status = 0;
6329   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6330   int UNUSED written = 0;
6331   IADDR UNUSED pc = GET_H_PC ();
6332   SEM_BRANCH_INIT
6333   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6334   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6335   EXTRACT_IFMT_TA_IMM_CODE
6336
6337 if (CPU (h_icc_z)) {
6338   {
6339     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6340 ;
6341     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6342     written |= (1 << 4);
6343     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6344   }
6345 }
6346
6347   abuf->written = written;
6348   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6349   return status;
6350 }
6351
6352 /* bg: bg$a $disp22 */
6353
6354 SEM_STATUS
6355 SEM_FN_NAME (sparc64,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6356 {
6357   SEM_STATUS status = 0;
6358   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6359   int UNUSED written = 0;
6360   IADDR UNUSED pc = GET_H_PC ();
6361   SEM_BRANCH_INIT
6362   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6363   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6364       IADDR i_disp22;
6365   EXTRACT_IFMT_BA_CODE
6366   i_disp22 = f_disp22;
6367
6368 do {
6369 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
6370   {
6371     USI opval = i_disp22;
6372     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6373     written |= (1 << 5);
6374     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6375   }
6376 } else {
6377 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6378 }
6379 } while (0);
6380
6381   abuf->written = written;
6382   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6383   return status;
6384 }
6385
6386 /* tg: tg $rs1,$rs2 */
6387
6388 SEM_STATUS
6389 SEM_FN_NAME (sparc64,tg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6390 {
6391   SEM_STATUS status = 0;
6392   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6393   int UNUSED written = 0;
6394   IADDR UNUSED pc = GET_H_PC ();
6395   SEM_BRANCH_INIT
6396   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6397   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6398   EXTRACT_IFMT_TA_CODE
6399
6400 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
6401   {
6402     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6403 ;
6404     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6405     written |= (1 << 6);
6406     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6407   }
6408 }
6409
6410   abuf->written = written;
6411   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6412   return status;
6413 }
6414
6415 /* tg-imm: tg $rs1,$simm13 */
6416
6417 SEM_STATUS
6418 SEM_FN_NAME (sparc64,tg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6419 {
6420   SEM_STATUS status = 0;
6421   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6422   int UNUSED written = 0;
6423   IADDR UNUSED pc = GET_H_PC ();
6424   SEM_BRANCH_INIT
6425   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6426   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6427   EXTRACT_IFMT_TA_IMM_CODE
6428
6429 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
6430   {
6431     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6432 ;
6433     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6434     written |= (1 << 6);
6435     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6436   }
6437 }
6438
6439   abuf->written = written;
6440   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6441   return status;
6442 }
6443
6444 /* ble: ble$a $disp22 */
6445
6446 SEM_STATUS
6447 SEM_FN_NAME (sparc64,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6448 {
6449   SEM_STATUS status = 0;
6450   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6451   int UNUSED written = 0;
6452   IADDR UNUSED pc = GET_H_PC ();
6453   SEM_BRANCH_INIT
6454   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6455   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6456       IADDR i_disp22;
6457   EXTRACT_IFMT_BA_CODE
6458   i_disp22 = f_disp22;
6459
6460 do {
6461 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
6462   {
6463     USI opval = i_disp22;
6464     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6465     written |= (1 << 5);
6466     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6467   }
6468 } else {
6469 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6470 }
6471 } while (0);
6472
6473   abuf->written = written;
6474   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6475   return status;
6476 }
6477
6478 /* tle: tle $rs1,$rs2 */
6479
6480 SEM_STATUS
6481 SEM_FN_NAME (sparc64,tle) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6482 {
6483   SEM_STATUS status = 0;
6484   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6485   int UNUSED written = 0;
6486   IADDR UNUSED pc = GET_H_PC ();
6487   SEM_BRANCH_INIT
6488   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6489   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6490   EXTRACT_IFMT_TA_CODE
6491
6492 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
6493   {
6494     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6495 ;
6496     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6497     written |= (1 << 6);
6498     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6499   }
6500 }
6501
6502   abuf->written = written;
6503   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6504   return status;
6505 }
6506
6507 /* tle-imm: tle $rs1,$simm13 */
6508
6509 SEM_STATUS
6510 SEM_FN_NAME (sparc64,tle_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6511 {
6512   SEM_STATUS status = 0;
6513   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6514   int UNUSED written = 0;
6515   IADDR UNUSED pc = GET_H_PC ();
6516   SEM_BRANCH_INIT
6517   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6518   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6519   EXTRACT_IFMT_TA_IMM_CODE
6520
6521 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
6522   {
6523     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6524 ;
6525     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6526     written |= (1 << 6);
6527     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6528   }
6529 }
6530
6531   abuf->written = written;
6532   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6533   return status;
6534 }
6535
6536 /* bge: bge$a $disp22 */
6537
6538 SEM_STATUS
6539 SEM_FN_NAME (sparc64,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6540 {
6541   SEM_STATUS status = 0;
6542   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6543   int UNUSED written = 0;
6544   IADDR UNUSED pc = GET_H_PC ();
6545   SEM_BRANCH_INIT
6546   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6547   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6548       IADDR i_disp22;
6549   EXTRACT_IFMT_BA_CODE
6550   i_disp22 = f_disp22;
6551
6552 do {
6553 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
6554   {
6555     USI opval = i_disp22;
6556     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6557     written |= (1 << 4);
6558     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6559   }
6560 } else {
6561 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6562 }
6563 } while (0);
6564
6565   abuf->written = written;
6566   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6567   return status;
6568 }
6569
6570 /* tge: tge $rs1,$rs2 */
6571
6572 SEM_STATUS
6573 SEM_FN_NAME (sparc64,tge) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6574 {
6575   SEM_STATUS status = 0;
6576   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6577   int UNUSED written = 0;
6578   IADDR UNUSED pc = GET_H_PC ();
6579   SEM_BRANCH_INIT
6580   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6581   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6582   EXTRACT_IFMT_TA_CODE
6583
6584 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
6585   {
6586     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6587 ;
6588     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6589     written |= (1 << 5);
6590     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6591   }
6592 }
6593
6594   abuf->written = written;
6595   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6596   return status;
6597 }
6598
6599 /* tge-imm: tge $rs1,$simm13 */
6600
6601 SEM_STATUS
6602 SEM_FN_NAME (sparc64,tge_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6603 {
6604   SEM_STATUS status = 0;
6605   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6606   int UNUSED written = 0;
6607   IADDR UNUSED pc = GET_H_PC ();
6608   SEM_BRANCH_INIT
6609   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6610   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6611   EXTRACT_IFMT_TA_IMM_CODE
6612
6613 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
6614   {
6615     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6616 ;
6617     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6618     written |= (1 << 5);
6619     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6620   }
6621 }
6622
6623   abuf->written = written;
6624   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6625   return status;
6626 }
6627
6628 /* bl: bl$a $disp22 */
6629
6630 SEM_STATUS
6631 SEM_FN_NAME (sparc64,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6632 {
6633   SEM_STATUS status = 0;
6634   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6635   int UNUSED written = 0;
6636   IADDR UNUSED pc = GET_H_PC ();
6637   SEM_BRANCH_INIT
6638   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6639   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6640       IADDR i_disp22;
6641   EXTRACT_IFMT_BA_CODE
6642   i_disp22 = f_disp22;
6643
6644 do {
6645 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
6646   {
6647     USI opval = i_disp22;
6648     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6649     written |= (1 << 4);
6650     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6651   }
6652 } else {
6653 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6654 }
6655 } while (0);
6656
6657   abuf->written = written;
6658   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6659   return status;
6660 }
6661
6662 /* tl: tl $rs1,$rs2 */
6663
6664 SEM_STATUS
6665 SEM_FN_NAME (sparc64,tl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6666 {
6667   SEM_STATUS status = 0;
6668   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6669   int UNUSED written = 0;
6670   IADDR UNUSED pc = GET_H_PC ();
6671   SEM_BRANCH_INIT
6672   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6673   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6674   EXTRACT_IFMT_TA_CODE
6675
6676 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
6677   {
6678     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6679 ;
6680     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6681     written |= (1 << 5);
6682     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6683   }
6684 }
6685
6686   abuf->written = written;
6687   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6688   return status;
6689 }
6690
6691 /* tl-imm: tl $rs1,$simm13 */
6692
6693 SEM_STATUS
6694 SEM_FN_NAME (sparc64,tl_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6695 {
6696   SEM_STATUS status = 0;
6697   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6698   int UNUSED written = 0;
6699   IADDR UNUSED pc = GET_H_PC ();
6700   SEM_BRANCH_INIT
6701   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6702   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6703   EXTRACT_IFMT_TA_IMM_CODE
6704
6705 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
6706   {
6707     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6708 ;
6709     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6710     written |= (1 << 5);
6711     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6712   }
6713 }
6714
6715   abuf->written = written;
6716   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6717   return status;
6718 }
6719
6720 /* bgu: bgu$a $disp22 */
6721
6722 SEM_STATUS
6723 SEM_FN_NAME (sparc64,bgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6724 {
6725   SEM_STATUS status = 0;
6726   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6727   int UNUSED written = 0;
6728   IADDR UNUSED pc = GET_H_PC ();
6729   SEM_BRANCH_INIT
6730   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6731   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6732       IADDR i_disp22;
6733   EXTRACT_IFMT_BA_CODE
6734   i_disp22 = f_disp22;
6735
6736 do {
6737 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
6738   {
6739     USI opval = i_disp22;
6740     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6741     written |= (1 << 4);
6742     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6743   }
6744 } else {
6745 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6746 }
6747 } while (0);
6748
6749   abuf->written = written;
6750   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6751   return status;
6752 }
6753
6754 /* tgu: tgu $rs1,$rs2 */
6755
6756 SEM_STATUS
6757 SEM_FN_NAME (sparc64,tgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6758 {
6759   SEM_STATUS status = 0;
6760   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6761   int UNUSED written = 0;
6762   IADDR UNUSED pc = GET_H_PC ();
6763   SEM_BRANCH_INIT
6764   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6765   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6766   EXTRACT_IFMT_TA_CODE
6767
6768 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
6769   {
6770     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6771 ;
6772     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6773     written |= (1 << 5);
6774     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6775   }
6776 }
6777
6778   abuf->written = written;
6779   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6780   return status;
6781 }
6782
6783 /* tgu-imm: tgu $rs1,$simm13 */
6784
6785 SEM_STATUS
6786 SEM_FN_NAME (sparc64,tgu_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6787 {
6788   SEM_STATUS status = 0;
6789   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6790   int UNUSED written = 0;
6791   IADDR UNUSED pc = GET_H_PC ();
6792   SEM_BRANCH_INIT
6793   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6794   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6795   EXTRACT_IFMT_TA_IMM_CODE
6796
6797 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
6798   {
6799     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6800 ;
6801     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6802     written |= (1 << 5);
6803     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6804   }
6805 }
6806
6807   abuf->written = written;
6808   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6809   return status;
6810 }
6811
6812 /* bleu: bleu$a $disp22 */
6813
6814 SEM_STATUS
6815 SEM_FN_NAME (sparc64,bleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6816 {
6817   SEM_STATUS status = 0;
6818   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6819   int UNUSED written = 0;
6820   IADDR UNUSED pc = GET_H_PC ();
6821   SEM_BRANCH_INIT
6822   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6823   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6824       IADDR i_disp22;
6825   EXTRACT_IFMT_BA_CODE
6826   i_disp22 = f_disp22;
6827
6828 do {
6829 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
6830   {
6831     USI opval = i_disp22;
6832     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6833     written |= (1 << 4);
6834     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6835   }
6836 } else {
6837 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6838 }
6839 } while (0);
6840
6841   abuf->written = written;
6842   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6843   return status;
6844 }
6845
6846 /* tleu: tleu $rs1,$rs2 */
6847
6848 SEM_STATUS
6849 SEM_FN_NAME (sparc64,tleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6850 {
6851   SEM_STATUS status = 0;
6852   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6853   int UNUSED written = 0;
6854   IADDR UNUSED pc = GET_H_PC ();
6855   SEM_BRANCH_INIT
6856   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6857   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6858   EXTRACT_IFMT_TA_CODE
6859
6860 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
6861   {
6862     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6863 ;
6864     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6865     written |= (1 << 5);
6866     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6867   }
6868 }
6869
6870   abuf->written = written;
6871   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6872   return status;
6873 }
6874
6875 /* tleu-imm: tleu $rs1,$simm13 */
6876
6877 SEM_STATUS
6878 SEM_FN_NAME (sparc64,tleu_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6879 {
6880   SEM_STATUS status = 0;
6881   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6882   int UNUSED written = 0;
6883   IADDR UNUSED pc = GET_H_PC ();
6884   SEM_BRANCH_INIT
6885   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6886   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6887   EXTRACT_IFMT_TA_IMM_CODE
6888
6889 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
6890   {
6891     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6892 ;
6893     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6894     written |= (1 << 5);
6895     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6896   }
6897 }
6898
6899   abuf->written = written;
6900   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6901   return status;
6902 }
6903
6904 /* bcc: bcc$a $disp22 */
6905
6906 SEM_STATUS
6907 SEM_FN_NAME (sparc64,bcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6908 {
6909   SEM_STATUS status = 0;
6910   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6911   int UNUSED written = 0;
6912   IADDR UNUSED pc = GET_H_PC ();
6913   SEM_BRANCH_INIT
6914   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6915   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
6916       IADDR i_disp22;
6917   EXTRACT_IFMT_BA_CODE
6918   i_disp22 = f_disp22;
6919
6920 do {
6921 if (NOTBI (CPU (h_icc_c))) {
6922   {
6923     USI opval = i_disp22;
6924     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6925     written |= (1 << 3);
6926     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6927   }
6928 } else {
6929 SEM_ANNUL_INSN (current_cpu, pc, f_a);
6930 }
6931 } while (0);
6932
6933   abuf->written = written;
6934   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
6935   return status;
6936 }
6937
6938 /* tcc: tcc $rs1,$rs2 */
6939
6940 SEM_STATUS
6941 SEM_FN_NAME (sparc64,tcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6942 {
6943   SEM_STATUS status = 0;
6944   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6945   int UNUSED written = 0;
6946   IADDR UNUSED pc = GET_H_PC ();
6947   SEM_BRANCH_INIT
6948   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6949   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6950   EXTRACT_IFMT_TA_CODE
6951
6952 if (NOTBI (CPU (h_icc_c))) {
6953   {
6954     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
6955 ;
6956     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6957     written |= (1 << 4);
6958     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6959   }
6960 }
6961
6962   abuf->written = written;
6963   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6964   return status;
6965 }
6966
6967 /* tcc-imm: tcc $rs1,$simm13 */
6968
6969 SEM_STATUS
6970 SEM_FN_NAME (sparc64,tcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
6971 {
6972   SEM_STATUS status = 0;
6973   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6974   int UNUSED written = 0;
6975   IADDR UNUSED pc = GET_H_PC ();
6976   SEM_BRANCH_INIT
6977   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6978   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
6979   EXTRACT_IFMT_TA_IMM_CODE
6980
6981 if (NOTBI (CPU (h_icc_c))) {
6982   {
6983     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
6984 ;
6985     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6986     written |= (1 << 4);
6987     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6988   }
6989 }
6990
6991   abuf->written = written;
6992   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
6993   return status;
6994 }
6995
6996 /* bcs: bcs$a $disp22 */
6997
6998 SEM_STATUS
6999 SEM_FN_NAME (sparc64,bcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7000 {
7001   SEM_STATUS status = 0;
7002   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7003   int UNUSED written = 0;
7004   IADDR UNUSED pc = GET_H_PC ();
7005   SEM_BRANCH_INIT
7006   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7007   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
7008       IADDR i_disp22;
7009   EXTRACT_IFMT_BA_CODE
7010   i_disp22 = f_disp22;
7011
7012 do {
7013 if (CPU (h_icc_c)) {
7014   {
7015     USI opval = i_disp22;
7016     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7017     written |= (1 << 3);
7018     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7019   }
7020 } else {
7021 SEM_ANNUL_INSN (current_cpu, pc, f_a);
7022 }
7023 } while (0);
7024
7025   abuf->written = written;
7026   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
7027   return status;
7028 }
7029
7030 /* tcs: tcs $rs1,$rs2 */
7031
7032 SEM_STATUS
7033 SEM_FN_NAME (sparc64,tcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7034 {
7035   SEM_STATUS status = 0;
7036   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7037   int UNUSED written = 0;
7038   IADDR UNUSED pc = GET_H_PC ();
7039   SEM_BRANCH_INIT
7040   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7041   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7042   EXTRACT_IFMT_TA_CODE
7043
7044 if (CPU (h_icc_c)) {
7045   {
7046     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
7047 ;
7048     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7049     written |= (1 << 4);
7050     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7051   }
7052 }
7053
7054   abuf->written = written;
7055   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7056   return status;
7057 }
7058
7059 /* tcs-imm: tcs $rs1,$simm13 */
7060
7061 SEM_STATUS
7062 SEM_FN_NAME (sparc64,tcs_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7063 {
7064   SEM_STATUS status = 0;
7065   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7066   int UNUSED written = 0;
7067   IADDR UNUSED pc = GET_H_PC ();
7068   SEM_BRANCH_INIT
7069   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7070   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7071   EXTRACT_IFMT_TA_IMM_CODE
7072
7073 if (CPU (h_icc_c)) {
7074   {
7075     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
7076 ;
7077     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7078     written |= (1 << 4);
7079     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7080   }
7081 }
7082
7083   abuf->written = written;
7084   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7085   return status;
7086 }
7087
7088 /* bpos: bpos$a $disp22 */
7089
7090 SEM_STATUS
7091 SEM_FN_NAME (sparc64,bpos) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7092 {
7093   SEM_STATUS status = 0;
7094   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7095   int UNUSED written = 0;
7096   IADDR UNUSED pc = GET_H_PC ();
7097   SEM_BRANCH_INIT
7098   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7099   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
7100       IADDR i_disp22;
7101   EXTRACT_IFMT_BA_CODE
7102   i_disp22 = f_disp22;
7103
7104 do {
7105 if (NOTBI (CPU (h_icc_n))) {
7106   {
7107     USI opval = i_disp22;
7108     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7109     written |= (1 << 3);
7110     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7111   }
7112 } else {
7113 SEM_ANNUL_INSN (current_cpu, pc, f_a);
7114 }
7115 } while (0);
7116
7117   abuf->written = written;
7118   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
7119   return status;
7120 }
7121
7122 /* tpos: tpos $rs1,$rs2 */
7123
7124 SEM_STATUS
7125 SEM_FN_NAME (sparc64,tpos) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7126 {
7127   SEM_STATUS status = 0;
7128   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7129   int UNUSED written = 0;
7130   IADDR UNUSED pc = GET_H_PC ();
7131   SEM_BRANCH_INIT
7132   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7133   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7134   EXTRACT_IFMT_TA_CODE
7135
7136 if (NOTBI (CPU (h_icc_n))) {
7137   {
7138     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
7139 ;
7140     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7141     written |= (1 << 4);
7142     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7143   }
7144 }
7145
7146   abuf->written = written;
7147   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7148   return status;
7149 }
7150
7151 /* tpos-imm: tpos $rs1,$simm13 */
7152
7153 SEM_STATUS
7154 SEM_FN_NAME (sparc64,tpos_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7155 {
7156   SEM_STATUS status = 0;
7157   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7158   int UNUSED written = 0;
7159   IADDR UNUSED pc = GET_H_PC ();
7160   SEM_BRANCH_INIT
7161   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7162   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7163   EXTRACT_IFMT_TA_IMM_CODE
7164
7165 if (NOTBI (CPU (h_icc_n))) {
7166   {
7167     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
7168 ;
7169     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7170     written |= (1 << 4);
7171     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7172   }
7173 }
7174
7175   abuf->written = written;
7176   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7177   return status;
7178 }
7179
7180 /* bneg: bneg$a $disp22 */
7181
7182 SEM_STATUS
7183 SEM_FN_NAME (sparc64,bneg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7184 {
7185   SEM_STATUS status = 0;
7186   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7187   int UNUSED written = 0;
7188   IADDR UNUSED pc = GET_H_PC ();
7189   SEM_BRANCH_INIT
7190   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7191   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
7192       IADDR i_disp22;
7193   EXTRACT_IFMT_BA_CODE
7194   i_disp22 = f_disp22;
7195
7196 do {
7197 if (CPU (h_icc_n)) {
7198   {
7199     USI opval = i_disp22;
7200     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7201     written |= (1 << 3);
7202     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7203   }
7204 } else {
7205 SEM_ANNUL_INSN (current_cpu, pc, f_a);
7206 }
7207 } while (0);
7208
7209   abuf->written = written;
7210   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
7211   return status;
7212 }
7213
7214 /* tneg: tneg $rs1,$rs2 */
7215
7216 SEM_STATUS
7217 SEM_FN_NAME (sparc64,tneg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7218 {
7219   SEM_STATUS status = 0;
7220   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7221   int UNUSED written = 0;
7222   IADDR UNUSED pc = GET_H_PC ();
7223   SEM_BRANCH_INIT
7224   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7225   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7226   EXTRACT_IFMT_TA_CODE
7227
7228 if (CPU (h_icc_n)) {
7229   {
7230     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
7231 ;
7232     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7233     written |= (1 << 4);
7234     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7235   }
7236 }
7237
7238   abuf->written = written;
7239   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7240   return status;
7241 }
7242
7243 /* tneg-imm: tneg $rs1,$simm13 */
7244
7245 SEM_STATUS
7246 SEM_FN_NAME (sparc64,tneg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7247 {
7248   SEM_STATUS status = 0;
7249   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7250   int UNUSED written = 0;
7251   IADDR UNUSED pc = GET_H_PC ();
7252   SEM_BRANCH_INIT
7253   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7254   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7255   EXTRACT_IFMT_TA_IMM_CODE
7256
7257 if (CPU (h_icc_n)) {
7258   {
7259     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
7260 ;
7261     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7262     written |= (1 << 4);
7263     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7264   }
7265 }
7266
7267   abuf->written = written;
7268   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7269   return status;
7270 }
7271
7272 /* bvc: bvc$a $disp22 */
7273
7274 SEM_STATUS
7275 SEM_FN_NAME (sparc64,bvc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7276 {
7277   SEM_STATUS status = 0;
7278   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7279   int UNUSED written = 0;
7280   IADDR UNUSED pc = GET_H_PC ();
7281   SEM_BRANCH_INIT
7282   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7283   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
7284       IADDR i_disp22;
7285   EXTRACT_IFMT_BA_CODE
7286   i_disp22 = f_disp22;
7287
7288 do {
7289 if (NOTBI (CPU (h_icc_v))) {
7290   {
7291     USI opval = i_disp22;
7292     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7293     written |= (1 << 3);
7294     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7295   }
7296 } else {
7297 SEM_ANNUL_INSN (current_cpu, pc, f_a);
7298 }
7299 } while (0);
7300
7301   abuf->written = written;
7302   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
7303   return status;
7304 }
7305
7306 /* tvc: tvc $rs1,$rs2 */
7307
7308 SEM_STATUS
7309 SEM_FN_NAME (sparc64,tvc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7310 {
7311   SEM_STATUS status = 0;
7312   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7313   int UNUSED written = 0;
7314   IADDR UNUSED pc = GET_H_PC ();
7315   SEM_BRANCH_INIT
7316   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7317   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7318   EXTRACT_IFMT_TA_CODE
7319
7320 if (NOTBI (CPU (h_icc_v))) {
7321   {
7322     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
7323 ;
7324     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7325     written |= (1 << 4);
7326     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7327   }
7328 }
7329
7330   abuf->written = written;
7331   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7332   return status;
7333 }
7334
7335 /* tvc-imm: tvc $rs1,$simm13 */
7336
7337 SEM_STATUS
7338 SEM_FN_NAME (sparc64,tvc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7339 {
7340   SEM_STATUS status = 0;
7341   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7342   int UNUSED written = 0;
7343   IADDR UNUSED pc = GET_H_PC ();
7344   SEM_BRANCH_INIT
7345   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7346   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7347   EXTRACT_IFMT_TA_IMM_CODE
7348
7349 if (NOTBI (CPU (h_icc_v))) {
7350   {
7351     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
7352 ;
7353     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7354     written |= (1 << 4);
7355     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7356   }
7357 }
7358
7359   abuf->written = written;
7360   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7361   return status;
7362 }
7363
7364 /* bvs: bvs$a $disp22 */
7365
7366 SEM_STATUS
7367 SEM_FN_NAME (sparc64,bvs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7368 {
7369   SEM_STATUS status = 0;
7370   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7371   int UNUSED written = 0;
7372   IADDR UNUSED pc = GET_H_PC ();
7373   SEM_BRANCH_INIT
7374   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7375   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
7376       IADDR i_disp22;
7377   EXTRACT_IFMT_BA_CODE
7378   i_disp22 = f_disp22;
7379
7380 do {
7381 if (CPU (h_icc_v)) {
7382   {
7383     USI opval = i_disp22;
7384     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7385     written |= (1 << 3);
7386     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7387   }
7388 } else {
7389 SEM_ANNUL_INSN (current_cpu, pc, f_a);
7390 }
7391 } while (0);
7392
7393   abuf->written = written;
7394   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
7395   return status;
7396 }
7397
7398 /* tvs: tvs $rs1,$rs2 */
7399
7400 SEM_STATUS
7401 SEM_FN_NAME (sparc64,tvs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7402 {
7403   SEM_STATUS status = 0;
7404   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7405   int UNUSED written = 0;
7406   IADDR UNUSED pc = GET_H_PC ();
7407   SEM_BRANCH_INIT
7408   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7409   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7410   EXTRACT_IFMT_TA_CODE
7411
7412 if (CPU (h_icc_v)) {
7413   {
7414     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
7415 ;
7416     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7417     written |= (1 << 4);
7418     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7419   }
7420 }
7421
7422   abuf->written = written;
7423   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7424   return status;
7425 }
7426
7427 /* tvs-imm: tvs $rs1,$simm13 */
7428
7429 SEM_STATUS
7430 SEM_FN_NAME (sparc64,tvs_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7431 {
7432   SEM_STATUS status = 0;
7433   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7434   int UNUSED written = 0;
7435   IADDR UNUSED pc = GET_H_PC ();
7436   SEM_BRANCH_INIT
7437   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7438   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
7439   EXTRACT_IFMT_TA_IMM_CODE
7440
7441 if (CPU (h_icc_v)) {
7442   {
7443     USI opval = sparc64_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
7444 ;
7445     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
7446     written |= (1 << 4);
7447     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
7448   }
7449 }
7450
7451   abuf->written = written;
7452   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
7453   return status;
7454 }
7455
7456 /* ldstub-reg+reg: ldstub [$rs1+$rs2],$rd */
7457
7458 SEM_STATUS
7459 SEM_FN_NAME (sparc64,ldstub_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7460 {
7461   SEM_STATUS status = 0;
7462   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7463   int UNUSED written = 0;
7464   IADDR UNUSED pc = GET_H_PC ();
7465   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7466   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
7467   EXTRACT_IFMT_LDSB_REG_REG_CODE
7468
7469 sparc64_do_ldstub (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), -1);
7470
7471   SEM_NBRANCH_FINI (vpc, 0);
7472   return status;
7473 }
7474
7475 /* ldstub-reg+imm: ldstub [$rs1+$simm13],$rd */
7476
7477 SEM_STATUS
7478 SEM_FN_NAME (sparc64,ldstub_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7479 {
7480   SEM_STATUS status = 0;
7481   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7482   int UNUSED written = 0;
7483   IADDR UNUSED pc = GET_H_PC ();
7484   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7485   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
7486   EXTRACT_IFMT_LDSB_REG_IMM_CODE
7487
7488 sparc64_do_ldstub (current_cpu, pc, f_rd, GET_H_GR (f_rs1), f_simm13, -1);
7489
7490   SEM_NBRANCH_FINI (vpc, 0);
7491   return status;
7492 }
7493
7494 /* ldstub-reg+reg/asi: ldstub [$rs1+$rs2]$asi,$rd */
7495
7496 SEM_STATUS
7497 SEM_FN_NAME (sparc64,ldstub_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7498 {
7499   SEM_STATUS status = 0;
7500   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7501   int UNUSED written = 0;
7502   IADDR UNUSED pc = GET_H_PC ();
7503   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7504   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
7505   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
7506
7507 sparc64_do_ldstub (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), f_asi);
7508
7509   SEM_NBRANCH_FINI (vpc, 0);
7510   return status;
7511 }
7512
7513 /* swap-reg+reg: swap [$rs1+$rs2],$rd */
7514
7515 SEM_STATUS
7516 SEM_FN_NAME (sparc64,swap_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7517 {
7518   SEM_STATUS status = 0;
7519   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7520   int UNUSED written = 0;
7521   IADDR UNUSED pc = GET_H_PC ();
7522   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7523   EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
7524   EXTRACT_IFMT_LDSB_REG_REG_CODE
7525
7526 sparc64_do_swap (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), -1);
7527
7528   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET)));
7529   return status;
7530 }
7531
7532 /* swap-reg+imm: swap [$rs1+$simm13],$rd */
7533
7534 SEM_STATUS
7535 SEM_FN_NAME (sparc64,swap_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7536 {
7537   SEM_STATUS status = 0;
7538   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7539   int UNUSED written = 0;
7540   IADDR UNUSED pc = GET_H_PC ();
7541   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7542   EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
7543   EXTRACT_IFMT_LDSB_REG_IMM_CODE
7544
7545 sparc64_do_swap (current_cpu, pc, f_rd, GET_H_GR (f_rs1), f_simm13, -1);
7546
7547   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET)));
7548   return status;
7549 }
7550
7551 /* swap-reg+reg/asi: swap [$rs1+$rs2]$asi,$rd */
7552
7553 SEM_STATUS
7554 SEM_FN_NAME (sparc64,swap_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
7555 {
7556   SEM_STATUS status = 0;
7557   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7558   int UNUSED written = 0;
7559   IADDR UNUSED pc = GET_H_PC ();
7560   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7561   EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
7562   EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
7563
7564 sparc64_do_swap (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), f_asi);
7565
7566   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET)));
7567   return status;
7568 }
7569