sim/testsuite/ChangeLog

   1 1999-09-06  Doug Evans  <devans@casey.cygnus.com>
   2
   3         * sim/arm/testutils.inc: Testsuite utilities.
   4         * sim/arm/adc.cgs: New testcase.
   5
   6 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
   7
   8         * configure: Regenerated to track ../common/aclocal.m4 changes.
   9
  10 1999-08-30  Doug Evans  <devans@casey.cygnus.com>
  11
  12         * sim/arm/thumb/allthumb.exp: New driver for thumb testcases.
  13         * sim/arm/allinsn.exp: New driver for arm testcases.
  14
  15         * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
  16         requested_machs, now is list of machs to run tests for.
  17         Delete locals AS,ASFLAGS,LD,LDFLAGS.  Use target_assemble
  18         and target_link instead.
  19
  20 1999-07-16  Ben Elliston  <bje@cygnus.com>
  21
  22         * sim/arm/misaligned1.ms: New test case.
  23         * sim/arm/misaligned2.ms: Likewise.
  24         * sim/arm/misaligned3.ms: Likewise.
  25
  26 1999-07-16  Ben Elliston  <bje@cygnus.com>
  27
  28         * sim/arm/misc.exp: Enable basic tests.
  29
  30 1999-04-21  Doug Evans  <devans@casey.cygnus.com>
  31
  32         * sim/m32r/nop.cgs: Add missing nop insn.
  33
  34 Mon Mar 22 13:28:56 1999  Dave Brolley  <brolley@cygnus.com>
  35
  36         * sim/fr30/stb.cgs: Correct for unaligned access.
  37         * sim/fr30/sth.cgs: Correct for unaligned access.
  38         * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
  39         for unaligned access.
  40         * sim/fr30/and.cgs: Test unaligned access.
  41
  42 Fri Feb  5 12:41:11 1999  Doug Evans  <devans@canuck.cygnus.com>
  43
  44         * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
  45
  46 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
  47
  48         * lib/sim-defs.exp (run_sim_test): New arg all_machs.
  49         * sim/fr30/allinsn.exp: Update.
  50         * sim/fr30/misc.exp: Update.
  51         * sim/m32r/allinsn.exp: Update.
  52         * sim/m32r/misc.exp: Update.
  53
  54 Fri Dec 18 17:19:34 1998  Dave Brolley  <brolley@cygnus.com>
  55
  56         * sim/fr30/ldres.cgs: New testcase.
  57         * sim/fr30/copld.cgs: New testcase.
  58         * sim/fr30/copst.cgs: New testcase.
  59         * sim/fr30/copsv.cgs: New testcase.
  60         * sim/fr30/nop.cgs: New testcase.
  61         * sim/fr30/andccr.cgs: New testcase.
  62         * sim/fr30/orccr.cgs: New testcase.
  63         * sim/fr30/addsp.cgs: New testcase.
  64         * sim/fr30/stilm.cgs: New testcase.
  65         * sim/fr30/extsb.cgs: New testcase.
  66         * sim/fr30/extub.cgs: New testcase.
  67         * sim/fr30/extsh.cgs: New testcase.
  68         * sim/fr30/extuh.cgs: New testcase.
  69         * sim/fr30/enter.cgs: New testcase.
  70         * sim/fr30/leave.cgs: New testcase.
  71         * sim/fr30/xchb.cgs: New testcase.
  72         * sim/fr30/dmovb.cgs: New testcase.
  73         * sim/fr30/dmov.cgs: New testcase.
  74         * sim/fr30/dmovh.cgs: New testcase.
  75
  76 Thu Dec 17 17:18:43 1998  Dave Brolley  <brolley@cygnus.com>
  77
  78         * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
  79         * sim/fr30/ret.cgs: Add tests fir ret:d.
  80         * sim/fr30/inte.cgs: New testcase.
  81         * sim/fr30/reti.cgs: New testcase.
  82         * sim/fr30/bra.cgs: New testcase.
  83         * sim/fr30/bno.cgs: New testcase.
  84         * sim/fr30/beq.cgs: New testcase.
  85         * sim/fr30/bne.cgs: New testcase.
  86         * sim/fr30/bc.cgs: New testcase.
  87         * sim/fr30/bnc.cgs: New testcase.
  88         * sim/fr30/bn.cgs: New testcase.
  89         * sim/fr30/bp.cgs: New testcase.
  90         * sim/fr30/bv.cgs: New testcase.
  91         * sim/fr30/bnv.cgs: New testcase.
  92         * sim/fr30/blt.cgs: New testcase.
  93         * sim/fr30/bge.cgs: New testcase.
  94         * sim/fr30/ble.cgs: New testcase.
  95         * sim/fr30/bgt.cgs: New testcase.
  96         * sim/fr30/bls.cgs: New testcase.
  97         * sim/fr30/bhi.cgs: New testcase.
  98
  99 Tue Dec 15 17:47:13 1998  Dave Brolley  <brolley@cygnus.com>
 100
 101         * sim/fr30/div.cgs (int): Add signed division scenario.
 102         * sim/fr30/int.cgs (int): Complete testcase.
 103         * sim/fr30/testutils.inc (_start): Initialize tbr.
 104         (test_s_user,test_s_system,set_i,test_i): New macros.
 105
 106 1998-12-14  Doug Evans  <devans@casey.cygnus.com>
 107
 108         * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
 109         errors.  Translate \n sequences in expected output to newline char.
 110         (slurp_options): Make parentheses optional.
 111         (sim_run): Look for board_info sim,options.
 112         * sim/fr30/hello.ms: Add trailing \n to expected output.
 113         * sim/m32r/hello.ms: Ditto.
 114         * sim/m32r/hw-trap.ms: Ditto.
 115
 116         * sim/m32r/trap.cgs: Properly align trap2_handler.
 117
 118         * sim/m32r/uread16.ms: New testcase.
 119         * sim/m32r/uread32.ms: New testcase.
 120         * sim/m32r/uwrite16.ms: New testcase.
 121         * sim/m32r/uwrite32.ms: New testcase.
 122
 123 1998-12-14  Dave Brolley  <brolley@cygnus.com>
 124
 125         * sim/fr30/call.cgs: Test ret here as well.
 126         * sim/fr30/ld.cgs: Remove bogus comment.
 127         * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
 128         * sim/fr30/div.ms: New testcase.
 129         * sim/fr30/st.cgs: New testcase.
 130         * sim/fr30/sth.cgs: New testcase.
 131         * sim/fr30/stb.cgs: New testcase.
 132         * sim/fr30/mov.cgs: New testcase.
 133         * sim/fr30/jmp.cgs: New testcase.
 134         * sim/fr30/ret.cgs: New testcase.
 135         * sim/fr30/int.cgs: New testcase.
 136
 137 Thu Dec 10 18:46:25 1998  Dave Brolley  <brolley@cygnus.com>
 138
 139         * sim/fr30/div0s.cgs: New testcase.
 140         * sim/fr30/div0u.cgs: New testcase.
 141         * sim/fr30/div1.cgs: New testcase.
 142         * sim/fr30/div2.cgs: New testcase.
 143         * sim/fr30/div3.cgs: New testcase.
 144         * sim/fr30/div4s.cgs: New testcase.
 145         * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
 146
 147 Tue Dec  8 13:16:53 1998  Dave Brolley  <brolley@cygnus.com>
 148
 149         * sim/fr30/testutils.inc (set_s_user): Correct Mask.
 150         (set_s_system): Correct Mask.
 151         * sim/fr30/ld.cgs (ld): Move previously failing test back
 152         into place.
 153         * sim/fr30/ldm0.cgs: New testcase.
 154         * sim/fr30/ldm1.cgs: New testcase.
 155         * sim/fr30/stm0.cgs: New testcase.
 156         * sim/fr30/stm1.cgs: New testcase.
 157
 158 Thu Dec  3 14:20:03 1998  Dave Brolley  <brolley@cygnus.com>
 159
 160         * sim/fr30/ld.cgs: Implement more loads.
 161         * sim/fr30/call.cgs: New testcase.
 162         * sim/fr30/testutils.inc (testr_h_dr): New macro.
 163         (set_s_user,set_s_system): New macros.
 164
 165         * sim/fr30: New Directory.
 166
 167 Wed Nov 18 10:50:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 168
 169         * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
 170         recent sim/common/sim-basics.h changes.
 171         * common/Makefile.in: Update.
 172
 173 Fri Oct 30 00:37:31 1998  Felix Lee  <flee@cygnus.com>
 174
 175         * lib/sim-defs.exp (sim_run): download target program to remote
 176         host, if necessary.  for unix-driven win32 testing.
 177
 178 Tue Sep 15 14:56:22 1998  Doug Evans  <devans@canuck.cygnus.com>
 179
 180         * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
 181         * sim/m32r/rte.cgs: Test bbpc,bbpsw.
 182         * sim/m32r/trap.cgs: Test bbpc,bbpsw.
 183
 184 Fri Jul 31 17:49:13 1998  Felix Lee  <flee@cygnus.com>
 185
 186         * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
 187         writeonly.
 188
 189 Fri Jul 24 09:40:34 1998  Doug Evans  <devans@canuck.cygnus.com>
 190
 191         * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
 192
 193 Wed Jul  1 15:57:54 1998  Doug Evans  <devans@seba.cygnus.com>
 194
 195         * sim/m32r/hw-trap.ms: New testcase.
 196
 197 Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
 198
 199         * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
 200
 201 Thu Jun 11 15:24:53 1998  Doug Evans  <devans@canuck.cygnus.com>
 202
 203         * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
 204         which is now a list of options controlling the behaviour of sim_run.
 205
 206 Wed Jun 10 10:53:20 1998  Doug Evans  <devans@seba.cygnus.com>
 207
 208         * sim/m32r/addx.cgs: Add another test.
 209         * sim/m32r/jmp.cgs: Add another test.
 210
 211 Mon Jun  8 16:08:27 1998  Doug Evans  <devans@canuck.cygnus.com>
 212
 213         * sim/m32r/trap.cgs: Test trap 2.
 214
 215 Mon Jun  1 18:54:22 1998  Frank Ch. Eigler  <fche@cygnus.com>
 216
 217         * lib/sim-defs.exp (sim_run): Add possible environment variable
 218         list to simulator run.
 219
 220 Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
 221
 222         * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
 223                        so that make check can be invoked recursively.
 224
 225 Thu May 14 11:48:35 1998  Doug Evans  <devans@canuck.cygnus.com>
 226
 227         * config/default.exp (CC,SIM): Delete.
 228
 229         * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
 230         New arg prog_opts.  All callers updated.
 231
 232 Fri May  8 18:10:28 1998  Jillian Ye <jillian@cygnus.com>
 233
 234         * Makefile.in: Made "check" the target of two
 235           dependencies (test1, test2) so that test2 get a chance to
 236           run even when test1 failed if "make -k check" is used.
 237
 238 Fri May  8 14:41:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 239
 240         * lib/sim-defs.exp (sim_version): Simplify.
 241         (sim_run): Implement.
 242         (run_sim_test): Use sim_run.
 243         (sim_compile): New proc.
 244
 245 Mon May  4 17:59:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
 246
 247         * config/default.exp: Added C compiler settings.
 248
 249 Wed Apr 22 12:26:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 250
 251         * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
 252
 253 Tue Apr 21 10:49:03 1998  Doug Evans  <devans@canuck.cygnus.com>
 254
 255         * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
 256         try all machs.
 257
 258         * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
 259
 260 Fri Apr 17 16:00:52 1998  Doug Evans  <devans@canuck.cygnus.com>
 261
 262         * sim/m32r/mv[ft]achi.cgs: Fix expected result
 263         (sign extension of top 8 bits).
 264
 265 Wed Feb 25 11:01:17 1998  Doug Evans  <devans@canuck.cygnus.com>
 266
 267         * Makefile.in (RUNTEST): Fix path to runtest.
 268
 269
 270 Fri Feb 20 11:00:02 1998  Nick Clifton  <nickc@cygnus.com>
 271
 272         * sim/m32r/unlock.cgs: Fixed test.
 273         * sim/m32r/mvfc.cgs: Fixed test.
 274         * sim/m32r/remu.cgs: Fixed test.
 275
 276         * sim/m32r/bnc24.cgs: Test long BNC instruction.
 277         * sim/m32r/bnc8.cgs: Test short BNC instruction.
 278         * sim/m32r/ld-plus.cgs: Test LD instruction.
 279         * sim/m32r/macwhi.cgs: Test MACWHI instruction.
 280         * sim/m32r/macwlo.cgs: Test MACWLO instruction.
 281         * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
 282         * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
 283         * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
 284         * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
 285         * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
 286         * sim/m32r/addv.cgs: Test ADDV instruction.
 287         * sim/m32r/addv3.cgs: Test ADDV3 instruction.
 288         * sim/m32r/addx.cgs: Test ADDX instruction.
 289         * sim/m32r/lock.cgs: Test LOCK instruction.
 290         * sim/m32r/neg.cgs: Test NEG instruction.
 291         * sim/m32r/not.cgs: Test NOT instruction.
 292         * sim/m32r/unlock.cgs: Test UNLOCK instruction.
 293 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
 294
 295         * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
 296         address into a general register.
 297
 298         * sim/m32r/or3.cgs: Test OR3 instruction.
 299         * sim/m32r/rach.cgs: Test RACH instruction.
 300         * sim/m32r/rem.cgs: Test REM instruction.
 301         * sim/m32r/sub.cgs: Test SUB instruction.
 302         * sim/m32r/mv.cgs: Test MV instruction.
 303         * sim/m32r/mul.cgs: Test MUL instruction.
 304         * sim/m32r/bl24.cgs: Test long BL instruction.
 305         * sim/m32r/bl8.cgs: Test short BL instruction.
 306         * sim/m32r/blez.cgs: Test BLEZ instruction.
 307         * sim/m32r/bltz.cgs: Test BLTZ instruction.
 308         * sim/m32r/bne.cgs: Test BNE instruction.
 309         * sim/m32r/bnez.cgs: Test BNEZ instruction.
 310         * sim/m32r/bra24.cgs: Test long BRA instruction.
 311         * sim/m32r/bra8.cgs: Test short BRA instruction.
 312         * sim/m32r/jl.cgs: Test JL instruction.
 313         * sim/m32r/or.cgs: Test OR instruction.
 314         * sim/m32r/jmp.cgs: Test JMP instruction.
 315         * sim/m32r/and.cgs: Test AND instruction.
 316         * sim/m32r/and3.cgs: Test AND3 instruction.
 317         * sim/m32r/beq.cgs: Test BEQ instruction.
 318         * sim/m32r/beqz.cgs: Test BEQZ instruction.
 319         * sim/m32r/bgez.cgs: Test BGEZ instruction.
 320         * sim/m32r/bgtz.cgs: Test BGTZ instruction.
 321         * sim/m32r/cmp.cgs: Test CMP instruction.
 322         * sim/m32r/cmpi.cgs: Test CMPI instruction.
 323         * sim/m32r/cmpu.cgs: Test CMPU instruction.
 324         * sim/m32r/cmpui.cgs: Test CMPUI instruction.
 325         * sim/m32r/div.cgs: Test DIV instruction.
 326         * sim/m32r/divu.cgs: Test DIVU instruction.
 327         * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
 328         * sim/m32r/sll.cgs: Test SLL instruction.
 329         * sim/m32r/sll3.cgs: Test SLL3 instruction.
 330         * sim/m32r/slli.cgs: Test SLLI instruction.
 331         * sim/m32r/sra.cgs: Test SRA instruction.
 332         * sim/m32r/sra3.cgs: Test SRA3 instruction.
 333         * sim/m32r/srai.cgs: Test SRAI instruction.
 334         * sim/m32r/srl.cgs: Test SRL instruction.
 335         * sim/m32r/srl3.cgs: Test SRL3 instruction.
 336         * sim/m32r/srli.cgs: Test SRLI instruction.
 337         * sim/m32r/xor3.cgs: Test XOR3 instruction.
 338         * sim/m32r/xor.cgs: Test XOR instruction.
 339 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 340
 341         * config/default.exp: New file.
 342         * lib/sim-defs.exp: New file.
 343         * sim/m32r/*: m32r dejagnu simulator testsuite.
 344
 345         * Makefile.in (build_alias): Define.
 346         (arch): Define.
 347         (RUNTEST_FOR_TARGET): Delete.
 348         (RUNTEST): Fix.
 349         (check): Depend on site.exp.  Run dejagnu.
 350         (site.exp): New target.
 351         * configure.in (arch): Define from target_cpu.
 352         * configure: Regenerate.
 353
 354 Wed Sep 17 10:21:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 355
 356         * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
 357         (gen_mask): Ditto.
 358
 359         * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
 360         (calc): Add support for 8 bit version of macros.
 361         (main): Add tests for 8 bit versions of macros.
 362         (check_sext): Check SEXT of zero clears bits.
 363
 364         * common/bits-gen.c (main): Generate tests for 8 bit versions of
 365         macros.
 366
 367 Thu Sep 11 13:04:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * common/Make-common.in: New file, provide generic rules for
 370         running checks.
 371
 372 Mon Sep  1 16:43:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 373
 374         * configure.in (configdirs): Test for the target directory instead
 375         of matching on a target.
 376