9 mvfc r0, PSW || ldi.s r14, #0
10 ldi.l r2, 0x100 ; MOD_E
11 ldi.l r3, 0x108 ; MOD_S
14 mvtc r2, MOD_E || bseti r0, #7
16 mvtc r0, PSW ; modulo mode enable
18 ld r4, @r1- || nop ; r1=0x106
19 ld r4, @r1- || nop ; r1=0x104
20 ld r4, @r1- || nop ; r1=0x102
21 ld r4, @r1- || nop ; r1=0x100
22 ld r4, @r1- || nop ; r1=0x108
23 ld r4, @r1- || nop ; r1=0x106
26 brf0f _ERR ; branch to error
32 ld r4, @r1+ || nop ; r1=0x102
33 ld r4, @r1+ || nop ; r1=0x104
34 ld r4, @r1+ || nop ; r1=0x106
35 ld r4, @r1+ || nop ; r1=0x108
36 ld r4, @r1+ || nop ; r1=0x100
37 ld r4, @r1+ || nop ; r1=0x102
46 ld2W r4, @r1- || nop ; r1=0x104
47 ld2W r4, @r1- || nop ; r1=0x100
48 ld2W r4, @r1- || nop ; r1=0x108
49 ld2W r4, @r1- || nop ; r1=0x104
52 brf0f _ERR ; <= branch to error
56 mvtc r3, MOD_E || BCLRI r0, #7
58 ld2W r4, @r1+ || nop ; r1=0x104
59 ld2W r4, @r1+ || nop ; r1=0x108
60 ld2W r4, @r1+ || nop ; r1=0x100
61 ld2W r4, @r1+ || nop ; r1=0x104
67 mvtc r0, PSW ; modulo mode disable
71 ld r4, @r1- || nop ; r1=0x106
72 ld r4, @r1- || nop ; r1=0x104
73 ld r4, @r1- || nop ; r1=0x102
74 ld r4, @r1- || nop ; r1=0x100
75 ld r4, @r1- || nop ; r1=0xFE
76 ld r4, @r1- || nop ; r1=0xFC
85 ld r4, @r1+ || nop ; r1=0x102
86 ld r4, @r1+ || nop ; r1=0x104
87 ld r4, @r1+ || nop ; r1=0x106
88 ld r4, @r1+ || nop ; r1=0x108
89 ld r4, @r1+ || nop ; r1=0x10A
90 ld r4, @r1+ || nop ; r1=0x10C
95 test_mod_dec_ld2w_dis:
99 ld2W r4, @r1- || nop ; r1=0x104
100 ld2W r4, @r1- || nop ; r1=0x100
101 ld2W r4, @r1- || nop ; r1=0xFC
102 ld2W r4, @r1- || nop ; r1=0xF8
107 test_mod_inc_ld2w_dis:
111 ld2W r4, @r1+ || nop ; r1=0x104
112 ld2W r4, @r1+ || nop ; r1=0x108
113 ld2W r4, @r1+ || nop ; r1=0x10C
114 ld2W r4, @r1+ || nop ; r1=0x110