sim/testsuite/sim/fr30/dmov.cgs

   1 # fr30 testcase for dmov
   2 # mach(): fr30
   3
   4         .include "testutils.inc"
   5         START
   6
   7         .text
   8         .global dmov
   9 dmov:
  10         ; Test dmov @$dir10,$R13
  11         mvi_h_gr        0xdeadbeef,r1
  12         mvi_h_gr        0x200,r2
  13         mvr_h_mem       r1,r2
  14         set_cc          0x0f            ; Condition codes shouldn't change
  15         dmov            @0x200,r13
  16         test_cc         1 1 1 1
  17         test_h_gr       0xdeadbeef,r13
  18
  19         ; Test dmov $R13,@$dir10
  20         mvi_h_gr        0xbeefdead,r13
  21         set_cc          0x0e            ; Condition codes shouldn't change
  22         dmov            r13,@0x200
  23         test_cc         1 1 1 0
  24         test_h_mem      0xbeefdead,r2
  25
  26         ; Test dmov @$dir10,@R13+
  27         mvi_h_gr        0x1fc,r13
  28         set_cc          0x0d            ; Condition codes shouldn't change
  29         dmov            @0x200,@r13+
  30         test_cc         1 1 0 1
  31         mvi_h_gr        0x1fc,r2
  32         test_h_mem      0xbeefdead,r2
  33         inci_h_gr       4,r2
  34         test_h_mem      0xbeefdead,r2
  35         test_h_gr       0x200,r13
  36
  37         ; Test dmov @$R13+,@$dir10
  38         mvi_h_gr        0x1fc,r13
  39         mvi_h_mem       0xdeadbeef,r13
  40         set_cc          0x0c            ; Condition codes shouldn't change
  41         dmov            @r13+,@0x200
  42         test_cc         1 1 0 0
  43         mvi_h_gr        0x1fc,r2
  44         test_h_mem      0xdeadbeef,r2
  45         inci_h_gr       4,r2
  46         test_h_mem      0xdeadbeef,r2
  47         test_h_gr       0x200,r13
  48
  49         ; Test dmov @$dir10,@-R15
  50         mvi_h_gr        0x200,r15
  51         mvi_h_mem       0xdeadbeef,r15
  52         set_cc          0x0b            ; Condition codes shouldn't change
  53         dmov            @0x200,@-r15
  54         test_cc         1 0 1 1
  55         mvi_h_gr        0x1fc,r2
  56         test_h_mem      0xdeadbeef,r2
  57         inci_h_gr       4,r2
  58         test_h_mem      0xdeadbeef,r2
  59         test_h_gr       0x1fc,r15
  60
  61         ; Test dmov @$R15+,@$dir10
  62         mvi_h_gr        0x1fc,r15
  63         mvi_h_mem       0xbeefdead,r15
  64         set_cc          0x0a            ; Condition codes shouldn't change
  65         dmov            @r15+,@0x200
  66         test_cc         1 0 1 0
  67         mvi_h_gr        0x1fc,r2
  68         test_h_mem      0xbeefdead,r2
  69         inci_h_gr       4,r2
  70         test_h_mem      0xbeefdead,r2
  71         test_h_gr       0x200,r15
  72
  73         pass