sim/testsuite/sim/fr30/mov.cgs

   1 # fr30 testcase for mov $Rj,$Ri
   2 # mach(): fr30
   3
   4         .include "testutils.inc"
   5
   6         START
   7
   8         .text
   9         .global mov
  10 mov:
  11         ; Test mov $Rj,$Ri
  12         mvi_h_gr        1,r7
  13         mvi_h_dr        0xa,tbr
  14         mvi_h_dr        0xb,rp
  15         mvi_h_dr        0xc,mdh
  16         mvi_h_dr        0xd,mdl
  17         mvr_h_gr        sp,ssp
  18         mvr_h_gr        sp,usp
  19
  20         mov             r7,r7
  21         set_cc          0x0f            ; Condition codes should not change
  22         test_cc         1 1 1 1
  23         test_h_gr       1,r7
  24
  25         mov             r7,r8
  26         set_cc          0x0e            ; Condition codes should not change
  27         test_cc         1 1 1 0
  28         test_h_gr       1,r7
  29         test_h_gr       1,r8
  30
  31         ; Test mov $Rs,$Ri
  32         set_cc          0x0d            ; Condition codes should not change
  33         mov             tbr,r7
  34         test_cc         1 1 0 1
  35         test_h_gr       0xa,r7
  36
  37         set_cc          0x0c            ; Condition codes should not change
  38         mov             rp,r7
  39         test_cc         1 1 0 0
  40         test_h_gr       0xb,r7
  41
  42         set_cc          0x0b            ; Condition codes should not change
  43         mov             mdh,r7
  44         test_cc         1 0 1 1
  45         test_h_gr       0xc,r7
  46
  47         set_cc          0x0a            ; Condition codes should not change
  48         mov             mdl,r7
  49         test_cc         1 0 1 0
  50         test_h_gr       0xd,r7
  51
  52         set_cc          0x09            ; Condition codes should not change
  53         mov             usp,r7
  54         test_cc         1 0 0 1
  55         testr_h_gr      sp,r7
  56
  57         set_cc          0x08            ; Condition codes should not change
  58         mov             ssp,r7
  59         test_cc         1 0 0 0
  60         testr_h_gr      sp,r7
  61
  62         ; Test mov $Ri,$Rs
  63         set_cc          0x07            ; Condition codes should not change
  64         mov             r8,tbr
  65         test_cc         0 1 1 1
  66         test_h_dr       0x1,tbr
  67
  68         set_cc          0x06            ; Condition codes should not change
  69         mov             r8,rp
  70         test_cc         0 1 1 0
  71         test_h_dr       0x1,rp
  72
  73         set_cc          0x05            ; Condition codes should not change
  74         mov             r8,mdh
  75         test_cc         0 1 0 1
  76         test_h_dr       0x1,mdh
  77
  78         set_cc          0x04            ; Condition codes should not change
  79         mov             r8,mdl
  80         test_cc         0 1 0 0
  81         test_h_dr       0x1,mdl
  82
  83         set_cc          0x03            ; Condition codes should not change
  84         mov             r8,ssp
  85         test_cc         0 0 1 1
  86         test_h_dr       0x1,ssp
  87
  88         set_cc          0x02            ; Condition codes should not change
  89         mov             r8,usp
  90         test_cc         0 0 1 0
  91         test_h_dr       0x1,usp
  92
  93         ; Test mov $PS,$Ri
  94         set_cc          0x01            ; Condition codes affect result
  95         set_dbits       0x3
  96         mov             ps,r7
  97         test_cc         0 0 0 1
  98         test_h_gr       0x00000601,r7
  99
 100         ; Test mov $Ri,PS
 101         set_cc          0x01            ; Set opposite of expected
 102         set_dbits       0x1             ; Set opposite of expected
 103         mvi_h_gr        0x0000040e,r7
 104         mov             r7,PS
 105         test_cc         1 1 1 0
 106         test_dbits      0x2
 107
 108         pass