sim/testsuite/sim/fr30/stb.cgs

   1 # fr30 testcase for
   2 # mach(): fr30
   3 #  stb $Ri,@$Rj
   4
   5         .include "testutils.inc"
   6
   7         START
   8
   9         .text
  10         .global stb
  11 stb:
  12         mvr_h_gr        sp,r9           ; Save stack pointer
  13         ; Test stb $Ri,@Rj
  14         mvi_h_mem       0xdeadbeef,sp
  15         mvi_h_gr        0xaaaaaafe,r8
  16         set_cc          0x0f            ; Condition codes should not change
  17         stb             r8,@sp
  18         test_cc         1 1 1 1
  19         test_h_mem      0xfeadbeef,sp
  20         test_h_gr       0xaaaaaafe,r8
  21
  22         ; Test stb $Ri,@(R13,Rj)
  23         mvi_h_mem       0xbeefdead,sp
  24         mvi_h_gr        0xaaaaaade,r8
  25         mvr_h_gr        sp,r1
  26         inci_h_gr       -8,sp
  27         mvr_h_gr        sp,r2
  28         mvi_h_mem       0xbeefdead,sp
  29         inci_h_gr       4,sp
  30         mvi_h_mem       0xbeefdead,sp
  31
  32         mvi_h_gr        4,r13
  33         set_cc          0x0e            ; Condition codes should not change
  34         stb             r8,@(r13,sp)
  35         test_cc         1 1 1 0
  36         test_h_mem      0xdeefdead,r1
  37         test_h_gr       0xaaaaaade,r8
  38
  39         mvi_h_gr        0,r13
  40         set_cc          0x0d            ; Condition codes should not change
  41         stb             r8,@(r13,sp)
  42         test_cc         1 1 0 1
  43         test_h_mem      0xdeefdead,sp
  44         test_h_gr       0xaaaaaade,r8
  45
  46         mvi_h_gr        -4,r13
  47         set_cc          0x0c            ; Condition codes should not change
  48         stb             r8,@(r13,sp)
  49         test_cc         1 1 0 0
  50         test_h_mem      0xdeefdead,r2
  51         test_h_gr       0xaaaaaade,r8
  52
  53         ; Test stb $Ri,@(R14,$disp8
  54         mvr_h_gr        r9,sp           ; Restore stack pointer
  55         mvi_h_gr        0xaaaaaafe,r8
  56         mvi_h_mem       0xdeadbeef,sp
  57         mvr_h_gr        sp,r14
  58         inci_h_gr       -127,r14
  59         mvr_h_gr        r14,r2
  60         mvi_h_mem       0xdeadbeef,r14
  61         inci_h_gr       -128,r14
  62         mvr_h_gr        r14,r3
  63         mvi_h_mem       0xdeadbeef,r14
  64         inci_h_gr       128,r14
  65
  66         set_cc          0x0b            ; Condition codes should not change
  67         stb             r8,@(r14,127)
  68         test_cc         1 0 1 1
  69         test_h_mem      0xfeadbeef,r1
  70         test_h_gr       0xaaaaaafe,r8
  71
  72         set_cc          0x0a            ; Condition codes should not change
  73         stb             r8,@(r14,0)
  74         test_cc         1 0 1 0
  75         test_h_mem      0xfeadbeef,r2
  76         test_h_gr       0xaaaaaafe,r8
  77
  78         set_cc          0x09            ; Condition codes should not change
  79         stb             r8,@(r14,-128)
  80         test_cc         1 0 0 1
  81         test_h_mem      0xfeadbeef,r3
  82         test_h_gr       0xaaaaaafe,r8
  83
  84         pass