]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commitdiff
MIPS: Set r6 as default arch if vendor is img
authorYunQiang Su <yunqiang.su@cipunited.com>
Fri, 24 Nov 2023 09:39:55 +0000 (17:39 +0800)
committerNick Clifton <nickc@redhat.com>
Thu, 30 Nov 2023 13:51:17 +0000 (13:51 +0000)
This behavior is used by downstream toolchain since 2014,
and has been in GCC since the same year.

We don't support mips64*-img* due to GCC doesn't support it,
and we believe that the multilib should be used for this case.

bfd/config.bfd
gas/configure
gas/configure.ac
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/module-defer-warn2.d

index 08129e6a8cb4d8e2ace0daa98b0cd74593976040..8c9637ae2b0d0d7a8809ee2ade740b9fb2099b28 100644 (file)
@@ -1550,7 +1550,7 @@ case "${targ_defvec} ${targ_selvecs}" in
 esac
 
 case "${targ}" in
-  mipsisa32r6* | mipsisa64r6*)
+  mipsisa32r6* | mipsisa64r6* | mips*-img-*)
     targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
     ;;
 esac
index 6a2f56f928af62a971635bc3dcd00ef3331a8c15..ace1a17365fe31ca0f69ca2cfb41b39a1f6fe896 100755 (executable)
@@ -12264,6 +12264,12 @@ _ACEOF
            use_ef_mips_abi_o32=1
            ;;
        esac
+       # If Vendor is IMG, then MIPSr6 is used
+       case ${target} in
+         mips*-img-*)
+           mips_cpu=mips32r6
+           ;;
+       esac
        # Decide whether to generate 32-bit or 64-bit code by default.
        # Used to resolve -march=from-abi when an embedded ABI is selected.
        case ${target} in
index d0b4cfb0310c2d0a7c201e705d674629c1459302..7dac22144d9867ddf7a046d3e1760ca0e6eb16c9 100644 (file)
@@ -382,6 +382,12 @@ changequote([,])dnl
            use_ef_mips_abi_o32=1
            ;;
        esac
+       # If Vendor is IMG, then MIPSr6 is used
+       case ${target} in
+         mips*-img-*)
+           mips_cpu=mips32r6
+           ;;
+       esac
        # Decide whether to generate 32-bit or 64-bit code by default.
        # Used to resolve -march=from-abi when an embedded ABI is selected.
        case ${target} in
index 777ae6536f043c464b51dd0a20bd77e4e24f954c..9238b26800d72b103c5477beee7c743831f7e8a3 100644 (file)
@@ -473,7 +473,7 @@ mips_arch_create mips32r5 32        mips32r3 { fpisa3 fpisa4 fpisa5 ror } \
 mips_arch_create mips32r6 32   mips32r5 { fpisa3 fpisa4 fpisa5 ror } \
                        { -march=mips32r6 -mtune=mips32r6 --defsym r6=} \
                        { -mmips:isa32r6 } \
-                       { mipsisa32r6-*-* mipsisa32r6el-*-* }
+                       { mipsisa32r6-*-* mipsisa32r6el-*-* mips*-img-* }
 mips_arch_create mips64        64      mips5   { mips32 } \
                        { -march=mips64 -mtune=mips64 } { -mmips:isa64 } \
                        { mipsisa64-*-* mipsisa64el-*-* }
index 5c2d1d7fa8e22476e26be370e7d701f6f8502230..1ff4fefecf725046459d4bbaeda762f263506782 100644 (file)
@@ -1,5 +1,5 @@
 #name: .module deferred warnings 2 (pre-R2)
 #source: module-defer-warn2.s
 #as: -32
-#skip: mipsisa32r?* mipsisa64r?*
+#skip: mipsisa32r?* mipsisa64r?* mips*-img-*
 #error_output: module-defer-warn2.l