]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commitdiff
Update RISC-V documentation and make sure that it is included in the gas info file.
authorPalmer Dabbelt <palmer@dabbelt.com>
Fri, 4 Nov 2016 14:18:06 +0000 (14:18 +0000)
committerNick Clifton <nickc@redhat.com>
Fri, 4 Nov 2016 14:18:06 +0000 (14:18 +0000)
* Makefile.am (CPU_DOCS): Add c-riscv.texi.
* Makefile.in: Regenerate.
* doc/all.texi: Set RISCV.
* doc/as.texinfo: Add RISCV options.
Add RISC-V-Dependent node.
Include c-riscv.texi.
* doc/c-riscv.texi: Rename RISC-V Options to RISC-V-Opts.

gas/ChangeLog
gas/doc/Makefile.am
gas/doc/Makefile.in
gas/doc/all.texi
gas/doc/as.texinfo
gas/doc/c-riscv.texi

index d6416722b94c3a65f70b94a9bd27ba04f642806b..1c73f4c5cd21352353b180f5b687b390d88090b1 100644 (file)
@@ -1,3 +1,14 @@
+2016-11-04  Palmer Dabbelt  <palmer@dabbelt.com>
+           Andrew Waterman <andrew@sifive.com>
+
+       * Makefile.am (CPU_DOCS): Add c-riscv.texi.
+       * Makefile.in: Regenerate.
+       * doc/all.texi: Set RISCV.
+       * doc/as.texinfo: Add RISCV options.
+       Add RISC-V-Dependent node.
+       Include c-riscv.texi.
+       * doc/c-riscv.texi: Rename RISC-V Options to RISC-V-Opts.
+
 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
 
        * testsuite/gas/arc/nps400-6.s: Change ldbit tests so that limm
index 88fa6029f55f9e81af9813f628efd950ee277dff..54d7ef1b5cad47eabb6824096c2ebfcfecd9a52f 100644 (file)
@@ -81,6 +81,7 @@ CPU_DOCS = \
        c-pj.texi \
        c-ppc.texi \
        c-rl78.texi \
+       c-riscv.texi \
        c-rx.texi \
        c-s390.texi \
        c-score.texi \
index 5f09b6c5812038fed057212717f3d108b7f53ce1..474bd481cd52fbc1acd36cfb7877e1e10770e22f 100644 (file)
@@ -355,6 +355,7 @@ CPU_DOCS = \
        c-pj.texi \
        c-ppc.texi \
        c-rl78.texi \
+       c-riscv.texi \
        c-rx.texi \
        c-s390.texi \
        c-score.texi \
index abbca2ff321760ffa44ec0b5b7893b47d52e6cd4..3c25d397965e1715ca5548578857d2d597425c61 100644 (file)
@@ -63,6 +63,7 @@
 @set PJ
 @set PPC
 @set RL78
+@set RISCV
 @set RX
 @set S390
 @set SCORE
index b1d94d5414e93f1aa59564c3e5922e455a5f6aa0..2b00accc1f231ac33a87c7d3d37ee541f5d990b5 100644 (file)
@@ -511,6 +511,13 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{-mint-register=@var{number}}]
    [@b{-mgcc-abi}|@b{-mrx-abi}]
 @end ifset
+@ifset RISCV
+
+@emph{Target RISC-V options:}
+   [@b{-m32}|@b{-m64}]
+   [@b{-mrvc}]
+   [@b{-mhard-float}|@b{-msoft-float}]
+@end ifset
 @ifset S390
 
 @emph{Target s390 options:}
@@ -7592,6 +7599,9 @@ subject, see the hardware manufacturer's manual.
 @ifset RL78
 * RL78-Dependent::              RL78 Dependent Features
 @end ifset
+@ifset RISCV
+* RISC-V-Dependent::            RISC-V Dependent Features
+@end ifset
 @ifset RX
 * RX-Dependent::                RX Dependent Features
 @end ifset
@@ -7819,6 +7829,10 @@ family.
 @include c-rl78.texi
 @end ifset
 
+@ifset RISCV
+@include c-riscv.texi
+@end ifset
+
 @ifset RX
 @include c-rx.texi
 @end ifset
index 984b75c68fd7a8cc5f7cd46ead915b80707d3987..8674ff2eb96c235147c3bdde3983e20d611dbf08 100644 (file)
 
 @cindex RISC-V support
 @menu
-* RISC-V Options::      RISC-V Options
+* RISC-V-Opts::      RISC-V Options
 @end menu
 
-@node RISC-V Options
+@node RISC-V-Opts
 @section Options
 
 The following table lists all availiable RISC-V specific options
@@ -40,8 +40,8 @@ Enables the C ISA subset for compressed instructions.
 Select the floating-point ABI, hard-float has F registers while soft-float
 doesn't.
 
-@cindex @samp{-march=RV{32,64}{G,I}{M,}{A,}{F,}{D,}{C,}} option, RISC-V
-@item -march=RV{32,64}{G,I}{M,}{A,}{F,}{D,}{C,}
+@cindex @samp{-march=ISA} option, RISC-V
+@item -march=ISA
 Select the base isa, as specified by ISA.  For example -march=RV32IMA.
 
 @end table