2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

	* config/tc-arm.c: Change condition code insertion for
	lds[hb] instructions from after the 2nd character to after the 3rd.
	(tCM): Remove macro.
	(TxCM): Likewise.
	(TxCM_): Likewise.
	(TCM): Likewise.

2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gas/arm/ldgesb-bad.d: New file.
	* gas/arm/ldgesb-bad.l: Likewise.
	* gas/arm/ldgesb-bad.s: Likewise.
	* gas/arm/ldgesh-bad.d: Likewise.
	* gas/arm/ldgesh-bad.l: Likewise.
	* gas/arm/ldgesh-bad.s: Likewise.
	* gas/arm/ldsgeb.d: Likewise.
	* gas/arm/ldsgeb.s: Likewise.
	* gas/arm/ldsgeb.l: Likewise.
	* gas/arm/ldsgeh.d: Likewise.
	* gas/arm/ldsgeh.s: Likewise.
	* gas/arm/ldsgeh.l: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9628a042af5c32f733ec703b3788beb49702f816..af9baf114e307e4aaaa08a23fd7b82a92eccf6c6 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/tc-arm.c: Change condition code insertion for
+       lds[hb] instructions from after the 2nd character to after the 3rd.
+       (tCM): Remove macro.
+       (TxCM): Likewise.
+       (TxCM_): Likewise.
+       (TCM): Likewise.
+
 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 
        * config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 91b29ac3c2f20d9943405121b6c251514866a0c6..1ce545929666d6645081e5b40a5666f366baa2e2 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -17778,38 +17778,6 @@ static struct asm_barrier_opt barrier_opt_names[] =
 #define tC3w(mnem, aop, top, nops, ops, ae, te) \
       TxC3w (mnem, aop, T_MNEM##top, nops, ops, ae, te)
 
-/* Mnemonic with a conditional infix in an unusual place.  Each and every variant has to
-   appear in the condition table.  */
-#define TxCM_(m1, m2, m3, op, top, nops, ops, ae, te)  \
-  { m1 #m2 m3, OPS##nops ops, sizeof (#m2) == 1 ? OT_odd_infix_unc : OT_odd_infix_0 + sizeof (m1) - 1, \
-    0x##op, top, ARM_VARIANT, THUMB_VARIANT, do_##ae, do_##te }
-
-#define TxCM(m1, m2, op, top, nops, ops, ae, te)       \
-  TxCM_ (m1,   , m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, eq, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, ne, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, cs, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, hs, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, cc, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, ul, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, lo, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, mi, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, pl, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, vs, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, vc, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, hi, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, ls, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, ge, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, lt, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, gt, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, le, m2, op, top, nops, ops, ae, te),      \
-  TxCM_ (m1, al, m2, op, top, nops, ops, ae, te)
-
-#define TCM(m1,m2, aop, top, nops, ops, ae, te)                \
-      TxCM (m1,m2, aop, 0x##top, nops, ops, ae, te)
-#define tCM(m1,m2, aop, top, nops, ops, ae, te)                \
-      TxCM (m1,m2, aop, T_MNEM##top, nops, ops, ae, te)
-
 /* Mnemonic that cannot be conditionalized.  The ARM condition-code
    field is still 0xE.  Many of the Thumb variants can be executed
    conditionally, so this is checked separately.  */
@@ -18101,8 +18069,8 @@ static const struct asm_opcode insns[] =
  tC3("strh",   00000b0, _strh,     2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
  tC3("ldrsh",  01000f0, _ldrsh,    2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
  tC3("ldrsb",  01000d0, _ldrsb,    2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
- tCM("ld","sh",        01000f0, _ldrsh,    2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
- tCM("ld","sb",        01000d0, _ldrsb,    2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
+ tC3("ldsh",   01000f0, _ldrsh,    2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
+ tC3("ldsb",   01000d0, _ldrsb,    2, (RRnpc_npcsp, ADDRGLDRS), ldstv4, t_ldst),
 
 #undef  ARM_VARIANT
 #define ARM_VARIANT  & arm_ext_v4t_5
@@ -19781,7 +19749,6 @@ static const struct asm_opcode insns[] =
 #undef ARM_VARIANT
 #undef THUMB_VARIANT
 #undef TCE
-#undef TCM
 #undef TUE
 #undef TUF
 #undef TCC

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index a7e169665a33cc0522a0aa8fc736bb7b523bf656..37632e5c9d0c639309be83e1de1e07795fa42aca 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * gas/arm/ldgesb-bad.d: New file.
+       * gas/arm/ldgesb-bad.l: Likewise.
+       * gas/arm/ldgesb-bad.s: Likewise.
+       * gas/arm/ldgesh-bad.d: Likewise.
+       * gas/arm/ldgesh-bad.l: Likewise.
+       * gas/arm/ldgesh-bad.s: Likewise.
+       * gas/arm/ldsgeb.d: Likewise.
+       * gas/arm/ldsgeb.s: Likewise.
+       * gas/arm/ldsgeb.l: Likewise.
+       * gas/arm/ldsgeh.d: Likewise.
+       * gas/arm/ldsgeh.s: Likewise.
+       * gas/arm/ldsgeh.l: Likewise.
+
 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 
        * gas/i386/i386.exp: Run bdver3 test cases.

diff --git a/gas/testsuite/gas/arm/ldgesb-bad.d b/gas/testsuite/gas/arm/ldgesb-bad.d
new file mode 100644 (file)
index 0000000..f11df79
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldgesb-bad.d
@@ -0,0 +1,3 @@
+# name: Reject ld<cc>sb instructions
+# as: -march=armv7-a
+# error-output: ldgesb-bad.l

diff --git a/gas/testsuite/gas/arm/ldgesb-bad.l b/gas/testsuite/gas/arm/ldgesb-bad.l
new file mode 100644 (file)
index 0000000..71beeeb
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldgesb-bad.l
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*Error: bad instruction `ldgesb r1,\[r11,#4\]'
+.*Warning: section '.text' finished with an open IT block.

diff --git a/gas/testsuite/gas/arm/ldgesb-bad.s b/gas/testsuite/gas/arm/ldgesb-bad.s
new file mode 100644 (file)
index 0000000..d40b6f8
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldgesb-bad.s
@@ -0,0 +1,7 @@
+.syntax unified
+.arch armv7-a
+.thumb
+       .global foo
+foo:
+       it ge
+       ldgesb r1, [r11, #4]

diff --git a/gas/testsuite/gas/arm/ldgesh-bad.d b/gas/testsuite/gas/arm/ldgesh-bad.d
new file mode 100644 (file)
index 0000000..e7c93c3
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldgesh-bad.d
@@ -0,0 +1,3 @@
+# name: Reject ld<cc>sh instructions
+# as: -march=armv7-a
+# error-output: ldgesh-bad.l

diff --git a/gas/testsuite/gas/arm/ldgesh-bad.l b/gas/testsuite/gas/arm/ldgesh-bad.l
new file mode 100644 (file)
index 0000000..9cb9d4b
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldgesh-bad.l
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*Error: bad instruction `ldgesh r1,\[r11,#4\]'
+.*Warning: section '.text' finished with an open IT block.

diff --git a/gas/testsuite/gas/arm/ldgesh-bad.s b/gas/testsuite/gas/arm/ldgesh-bad.s
new file mode 100644 (file)
index 0000000..c51fa3d
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldgesh-bad.s
@@ -0,0 +1,7 @@
+.syntax unified
+.arch armv7-a
+.thumb
+       .global foo
+foo:
+       it ge
+       ldgesh r1, [r11, #4]

diff --git a/gas/testsuite/gas/arm/ldsgeb.d b/gas/testsuite/gas/arm/ldsgeb.d
new file mode 100644 (file)
index 0000000..2c674aa
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldsgeb.d
@@ -0,0 +1,2 @@
+# name: Accept lds<cc>sb mnemonics
+# error-output: ldsgeb.l

diff --git a/gas/testsuite/gas/arm/ldsgeb.l b/gas/testsuite/gas/arm/ldsgeb.l
new file mode 100644 (file)
index 0000000..bcc175b
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldsgeb.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: conditional infixes are deprecated in unified syntax

diff --git a/gas/testsuite/gas/arm/ldsgeb.s b/gas/testsuite/gas/arm/ldsgeb.s
new file mode 100644 (file)
index 0000000..15587bd
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldsgeb.s
@@ -0,0 +1,7 @@
+.syntax unified
+.arch armv7-a
+.thumb
+        .global foo
+foo:
+        it ge
+        ldsgeb r1, [r11, #4]

diff --git a/gas/testsuite/gas/arm/ldsgeh.d b/gas/testsuite/gas/arm/ldsgeh.d
new file mode 100644 (file)
index 0000000..293d761
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldsgeh.d
@@ -0,0 +1,2 @@
+# name: Accept lds<cc>sh mnemonics
+# error-output: ldsgeh.l

diff --git a/gas/testsuite/gas/arm/ldsgeh.l b/gas/testsuite/gas/arm/ldsgeh.l
new file mode 100644 (file)
index 0000000..bcc175b
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldsgeh.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: conditional infixes are deprecated in unified syntax

diff --git a/gas/testsuite/gas/arm/ldsgeh.s b/gas/testsuite/gas/arm/ldsgeh.s
new file mode 100644 (file)
index 0000000..b33b32b
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldsgeh.s
@@ -0,0 +1,7 @@
+.syntax unified
+.arch armv7-a
+.thumb
+        .global foo
+foo:
+        it ge
+        ldsgeh r1, [r11, #4]