sim: frv: fix -Wincompatible-function-pointer-types warnings [PR sim/29752]

Some compilers warn in the frv code:
sem.c:24343:41: error: incompatible function pointer types passing
  'void (SIM_CPU *, UINT, UDI)' (aka 'void (struct _sim_cpu *, unsigned int, unsigned long)')
  to parameter of type
  'void (*)(SIM_CPU *, UINT, DI)' (aka 'void (*)(struct _sim_cpu *, unsigned int, long)') [-Wincompatible-function-pointer-types]

This is due to frvbf_h_acc40U_set using UDI for setting the new value,
but using the common sim_queue_fn_di_write API which uses DI.  The same
size, but different sign.  We could change frvbf_h_acc40U_set to take a
DI without changing behavior in practice: the UDI is already passed via
the queue function which accepts a DI, and frvbf_h_acc40U_set already
casts the input to UDI before running any operations on it.  However,
these files are all generated, so manual changes here would be reverted.

Seems like we can only change the register type for all APIs in the cpu
definition.  This builds cleanly, and passes sim unittests.  Not sure if
it's 100% the answer, but seems to be the best we have currently.

Bug: https://sourceware.org/PR29752

diff --git a/cpu/frv.cpu b/cpu/frv.cpu
index d2fe7c602cc320d8a528dec7e4076968371e30c7..fb637a6151a8ca818bf0fab0636cd1c6889d4fec 100644 (file)
--- a/cpu/frv.cpu
+++ b/cpu/frv.cpu
@@ -2933,7 +2933,7 @@
   (name h-acc40U)
   (comment "40 bit unsigned accumulator")
   (attrs PROFILE VIRTUAL)
-  (type register UDI (64))
+  (type register DI (64))
   (indices extern-keyword acc-names)
   ; The accumlator is made up of two 32 bit registers, accgi/acci.
   ; We want to extract this as a combined 40 unsigned bits

diff --git a/sim/Makefile.in b/sim/Makefile.in
index e655ae395e3499ce409012d72ec13e1056778a9c..40cc9dc187176431ed801f55aec3546525ebf805 100644 (file)
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -2373,7 +2373,6 @@ testsuite_common_CPPFLAGS = \
 @SIM_ENABLE_ARCH_examples_TRUE@        $(SIM_COMMON_LIBS)
 
 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
-@SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES = \
 @SIM_ENABLE_ARCH_frv_TRUE@     frv/modules.c
 

diff --git a/sim/frv/cpu.c b/sim/frv/cpu.c
index b28bcd72d6651e2d4600e9f8fafe4b7fd8931bca..58404522d15d193f5fea8942d643119f9107bede 100644 (file)
--- a/sim/frv/cpu.c
+++ b/sim/frv/cpu.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996-2024 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -622,7 +622,7 @@ frvbf_h_acc40S_set (SIM_CPU *current_cpu, UINT regno, DI newval)
 
 /* Get the value of h-acc40U.  */
 
-UDI
+DI
 frvbf_h_acc40U_get (SIM_CPU *current_cpu, UINT regno)
 {
   return GET_H_ACC40U (regno);
@@ -631,7 +631,7 @@ frvbf_h_acc40U_get (SIM_CPU *current_cpu, UINT regno)
 /* Set a value for h-acc40U.  */
 
 void
-frvbf_h_acc40U_set (SIM_CPU *current_cpu, UINT regno, UDI newval)
+frvbf_h_acc40U_set (SIM_CPU *current_cpu, UINT regno, DI newval)
 {
   SET_H_ACC40U (regno, newval);
 }

diff --git a/sim/frv/cpu.h b/sim/frv/cpu.h
index ab5f2d1b53998bd7c9dc3304ba49ecb8862b9cd7..6a021e7a61dfc84abdc932c36f4db68c3ee1f3b7 100644 (file)
--- a/sim/frv/cpu.h
+++ b/sim/frv/cpu.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996-2024 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -351,8 +351,8 @@ USI frvbf_h_accg_get (SIM_CPU *, UINT);
 void frvbf_h_accg_set (SIM_CPU *, UINT, USI);
 DI frvbf_h_acc40S_get (SIM_CPU *, UINT);
 void frvbf_h_acc40S_set (SIM_CPU *, UINT, DI);
-UDI frvbf_h_acc40U_get (SIM_CPU *, UINT);
-void frvbf_h_acc40U_set (SIM_CPU *, UINT, UDI);
+DI frvbf_h_acc40U_get (SIM_CPU *, UINT);
+void frvbf_h_acc40U_set (SIM_CPU *, UINT, DI);
 DI frvbf_h_iacc0_get (SIM_CPU *, UINT);
 void frvbf_h_iacc0_set (SIM_CPU *, UINT, DI);
 UQI frvbf_h_iccr_get (SIM_CPU *, UINT);
@@ -1330,13 +1330,13 @@ union sem_fields {
     unsigned char in_CCi;
     unsigned char in_FRinti;
     unsigned char in_FRintj;
-    unsigned char in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1;
+    unsigned char in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1;
     unsigned char in_h_fr_hi_UHI_add__INT_index_of__INT_FRinti_0;
     unsigned char in_h_fr_hi_UHI_add__INT_index_of__INT_FRintj_0;
     unsigned char in_h_fr_lo_UHI_add__INT_index_of__INT_FRinti_0;
     unsigned char in_h_fr_lo_UHI_add__INT_index_of__INT_FRintj_0;
     unsigned char out_ACC40Uk;
-    unsigned char out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1;
+    unsigned char out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1;
   } sfmt_cmmachu;
   struct { /*  */
     UINT f_ACC40Sk;
@@ -1490,9 +1490,9 @@ union sem_fields {
     unsigned char in_CCi;
     unsigned char in_FRintieven;
     unsigned char in_FRintjeven;
-    unsigned char in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1;
-    unsigned char in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_2;
-    unsigned char in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_3;
+    unsigned char in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1;
+    unsigned char in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_2;
+    unsigned char in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_3;
     unsigned char in_h_fr_hi_UHI_add__INT_index_of__INT_FRintieven_0;
     unsigned char in_h_fr_hi_UHI_add__INT_index_of__INT_FRintieven_1;
     unsigned char in_h_fr_hi_UHI_add__INT_index_of__INT_FRintjeven_0;
@@ -1502,9 +1502,9 @@ union sem_fields {
     unsigned char in_h_fr_lo_UHI_add__INT_index_of__INT_FRintjeven_0;
     unsigned char in_h_fr_lo_UHI_add__INT_index_of__INT_FRintjeven_1;
     unsigned char out_ACC40Uk;
-    unsigned char out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1;
-    unsigned char out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_2;
-    unsigned char out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_3;
+    unsigned char out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1;
+    unsigned char out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_2;
+    unsigned char out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_3;
   } sfmt_cmqmachu;
   struct { /*  */
     UINT f_ACC40Sk;

diff --git a/sim/frv/decode.c b/sim/frv/decode.c
index 5db4b94006c6ebcf2ea1dece68526d3072630a79..fa3bea7675a6bd723f76fe4f3e9031b9b24bcc4a 100644 (file)
--- a/sim/frv/decode.c
+++ b/sim/frv/decode.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996-2024 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -11216,13 +11216,13 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
       FLD (in_ACC40Uk) = f_ACC40Uk;
       FLD (in_FRinti) = f_FRi;
       FLD (in_FRintj) = f_FRj;
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRinti_0) = ((FLD (f_FRi)) + (0));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintj_0) = ((FLD (f_FRj)) + (0));
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRinti_0) = ((FLD (f_FRi)) + (0));
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRintj_0) = ((FLD (f_FRj)) + (0));
       FLD (out_ACC40Uk) = f_ACC40Uk;
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
     }
 #endif
 #undef FLD
@@ -11308,13 +11308,13 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
       FLD (in_CCi) = f_CCi;
       FLD (in_FRinti) = f_FRi;
       FLD (in_FRintj) = f_FRj;
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRinti_0) = ((FLD (f_FRi)) + (0));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintj_0) = ((FLD (f_FRj)) + (0));
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRinti_0) = ((FLD (f_FRi)) + (0));
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRintj_0) = ((FLD (f_FRj)) + (0));
       FLD (out_ACC40Uk) = f_ACC40Uk;
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
     }
 #endif
 #undef FLD
@@ -11394,9 +11394,9 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
       FLD (in_ACC40Uk) = f_ACC40Uk;
       FLD (in_FRintieven) = f_FRi;
       FLD (in_FRintjeven) = f_FRj;
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintieven_0) = ((FLD (f_FRi)) + (0));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintieven_1) = ((FLD (f_FRi)) + (1));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintjeven_0) = ((FLD (f_FRj)) + (0));
@@ -11406,9 +11406,9 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRintjeven_0) = ((FLD (f_FRj)) + (0));
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRintjeven_1) = ((FLD (f_FRj)) + (1));
       FLD (out_ACC40Uk) = f_ACC40Uk;
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
     }
 #endif
 #undef FLD
@@ -11502,9 +11502,9 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
       FLD (in_CCi) = f_CCi;
       FLD (in_FRintieven) = f_FRi;
       FLD (in_FRintjeven) = f_FRj;
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
-      FLD (in_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
+      FLD (in_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintieven_0) = ((FLD (f_FRi)) + (0));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintieven_1) = ((FLD (f_FRi)) + (1));
       FLD (in_h_fr_hi_UHI_add__INT_index_of__INT_FRintjeven_0) = ((FLD (f_FRj)) + (0));
@@ -11514,9 +11514,9 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRintjeven_0) = ((FLD (f_FRj)) + (0));
       FLD (in_h_fr_lo_UHI_add__INT_index_of__INT_FRintjeven_1) = ((FLD (f_FRj)) + (1));
       FLD (out_ACC40Uk) = f_ACC40Uk;
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
-      FLD (out_h_acc40U_UDI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_1) = ((FLD (f_ACC40Uk)) + (1));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_2) = ((FLD (f_ACC40Uk)) + (2));
+      FLD (out_h_acc40U_DI_add__INT_index_of__INT_ACC40Uk_3) = ((FLD (f_ACC40Uk)) + (3));
     }
 #endif
 #undef FLD

diff --git a/sim/frv/local.mk b/sim/frv/local.mk
index b708ce7deab9c6ed15cb0a627ff6f374d56c4932..0c34afc2bb3dd22fd70071d23ef710eafac6fae7 100644 (file)
--- a/sim/frv/local.mk
+++ b/sim/frv/local.mk
@@ -18,9 +18,6 @@
 
 AM_CPPFLAGS_%C% = $(SIM_FRV_TRAPDUMP_FLAGS)
 
-## Some modules don't build cleanly yet.
-AM_CFLAGS_%C%_sem.o = -Wno-error
-
 nodist_%C%_libsim_a_SOURCES = \
        %D%/modules.c
 %C%_libsim_a_SOURCES = \

diff --git a/sim/frv/sem.c b/sim/frv/sem.c
index 6fa847b827d7a672ccb7d7a5bcea502bccfa1923..a18f892f43d98a4803531d896ab24aead2dab29b 100644 (file)
--- a/sim/frv/sem.c
+++ b/sim/frv/sem.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996-2024 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -24375,7 +24375,7 @@ frvbf_media_overflow (current_cpu, 8);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 12);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24386,7 +24386,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 12);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24395,7 +24395,7 @@ frvbf_media_overflow (current_cpu, 4);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 12);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24581,7 +24581,7 @@ frvbf_media_overflow (current_cpu, 8);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 12);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24592,7 +24592,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 12);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24601,7 +24601,7 @@ frvbf_media_overflow (current_cpu, 4);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 12);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24790,7 +24790,7 @@ frvbf_media_overflow (current_cpu, 8);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 14);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24801,7 +24801,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 14);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -24810,7 +24810,7 @@ frvbf_media_overflow (current_cpu, 4);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 14);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25078,7 +25078,7 @@ frvbf_media_overflow (current_cpu, 8);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 18);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25089,7 +25089,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 18);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25098,7 +25098,7 @@ frvbf_media_overflow (current_cpu, 4);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 18);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25118,7 +25118,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 2), opval);
     written |= (1 << 19);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25129,7 +25129,7 @@ frvbf_media_overflow (current_cpu, 2);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 2), opval);
     written |= (1 << 19);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25138,7 +25138,7 @@ frvbf_media_overflow (current_cpu, 2);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 2), opval);
     written |= (1 << 19);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25152,7 +25152,7 @@ frvbf_media_overflow (current_cpu, 2);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 3), opval);
     written |= (1 << 20);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25163,7 +25163,7 @@ frvbf_media_overflow (current_cpu, 1);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 3), opval);
     written |= (1 << 20);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25172,7 +25172,7 @@ frvbf_media_overflow (current_cpu, 1);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 3), opval);
     written |= (1 << 20);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25443,7 +25443,7 @@ frvbf_media_overflow (current_cpu, 8);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 20);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25454,7 +25454,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 20);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25463,7 +25463,7 @@ frvbf_media_overflow (current_cpu, 4);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 1), opval);
     written |= (1 << 20);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25483,7 +25483,7 @@ frvbf_media_overflow (current_cpu, 4);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 2), opval);
     written |= (1 << 21);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25494,7 +25494,7 @@ frvbf_media_overflow (current_cpu, 2);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 2), opval);
     written |= (1 << 21);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25503,7 +25503,7 @@ frvbf_media_overflow (current_cpu, 2);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 2), opval);
     written |= (1 << 21);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25517,7 +25517,7 @@ frvbf_media_overflow (current_cpu, 2);
 if (GTDI (tmp_tmp, MAKEDI (255, 0xffffffff))) {
 {
   {
-    UDI opval = MAKEDI (255, 0xffffffff);
+    DI opval = MAKEDI (255, 0xffffffff);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 3), opval);
     written |= (1 << 22);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25528,7 +25528,7 @@ frvbf_media_overflow (current_cpu, 1);
 if (LTDI (tmp_tmp, MAKEDI (0, 0))) {
 {
   {
-    UDI opval = MAKEDI (0, 0);
+    DI opval = MAKEDI (0, 0);
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 3), opval);
     written |= (1 << 22);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);
@@ -25537,7 +25537,7 @@ frvbf_media_overflow (current_cpu, 1);
 }
 } else {
   {
-    UDI opval = tmp_tmp;
+    DI opval = tmp_tmp;
     sim_queue_fn_di_write (current_cpu, frvbf_h_acc40U_set, ADDSI (FLD (f_ACC40Uk), 3), opval);
     written |= (1 << 22);
     CGEN_TRACE_RESULT (current_cpu, abuf, "acc40U", 'D', opval);