Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>

	* simops.c (OP_2600, OP_2601): Changed min and max comparisons
	to use signed register values.

diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 32381d854e6949a1fca3489d32a69c5279cc1a2d..57f9f1ae300b644d715523d42fd6e185f8178a79 100644 (file)
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,8 @@
+Fri Sep  6 17:56:17 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
+
+       * simops.c (OP_2600, OP_2601): Changed min and max comparisons
+       to use signed register values.
+
 Wed Sep  4 11:35:17 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 
        * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug

diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index faf7d7da9bf4ced9825f6a4e65984a4309bc4fc3..dc05f5e936cb7dd9d73c75e897df22e6654d75ec 100644 (file)
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -1223,7 +1223,7 @@ OP_2600 ()
 {
   trace_input ("max", OP_REG, OP_REG, OP_VOID);
   State.F1 = State.F0;
-  if (State.regs[OP[1]] > State.regs[OP[0]])
+  if ((int16)State.regs[OP[1]] > (int16)State.regs[OP[0]])
     {
       State.regs[OP[0]] = State.regs[OP[1]];
       State.F0 = 1;
@@ -1275,7 +1275,7 @@ OP_2601 ()
 {
   trace_input ("min", OP_REG, OP_REG, OP_VOID);
   State.F1 = State.F0;
-  if (State.regs[OP[1]] < State.regs[OP[0]])
+  if ((int16)State.regs[OP[1]] < (int16)State.regs[OP[0]])
     {
       State.regs[OP[0]] = State.regs[OP[1]];
       State.F0 = 1;