+2023-11-15 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/78904
+ * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
+ (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
+ (*subqi_ext<mode>_2_slp): Ditto.
+ (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
+
+2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
+
+ * common/config/riscv/riscv-common.cc
+ (riscv_subset_list::parse_std_ext): Emit an error and skip to
+ the next extension when a non-canonical ordering is detected.
+
+2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
+ Revert using the macro CAN_HAVE_LOCATION_P.
+
+2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112447
+ * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
+ local vsetvl info before LCM suggested one.
+ Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
+ Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
+
+2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
+
+ * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
+ * (riscv_extend_comparands): Call New function on operands.
+
+2023-11-15 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*addqi_ext<mode>_1_slp):
+ Add "&& " before "reload_completed" in split condition.
+ (*subqi_ext<mode>_1_slp): Ditto.
+ (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
+
+2023-11-15 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/112540
+ * config/i386/i386.md (*addqi_ext<mode>_1_slp):
+ Correct operand numbers in split pattern. Replace !Q constraint
+ of operand 1 with !qm. Add insn constrain.
+ (*subqi_ext<mode>_1_slp): Ditto.
+ (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
+
+2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
+
+ * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
+ copy'n'paste-o in '__builtin_nvptx_brev' description.
+
+2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+
+ * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
+ (bitrev<mode>2): Represent using bitreverse.
+
+2023-11-15 Andrew Stubbs <ams@codesourcery.com>
+ Andrew Jenner <andrew@codesourcery.com>
+
+ * config/gcn/constraints.md: Add "a" AVGPR constraint.
+ * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
+ (*mov<mode>_4reg): Likewise.
+ (@mov<mode>_sgprbase): Likewise.
+ (gather<mode>_insn_1offset<exec>): Likewise.
+ (gather<mode>_insn_1offset_ds<exec>): Likewise.
+ (gather<mode>_insn_2offsets<exec>): Likewise.
+ (scatter<mode>_expr<exec_scatter>): Likewise.
+ (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
+ (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
+ * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
+ (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
+ (gcn_hard_regno_mode_ok): Likewise.
+ (gcn_regno_reg_class): Likewise.
+ (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
+ (gcn_sgpr_move_p): Handle AVGPRs.
+ (gcn_secondary_reload): Reload AVGPRs via VGPRs.
+ (gcn_conditional_register_usage): Handle AVGPRs.
+ (gcn_vgpr_equivalent_register_operand): New function.
+ (gcn_valid_move_p): Check for validity of AVGPR moves.
+ (gcn_compute_frame_offsets): Handle AVGPRs.
+ (gcn_memory_move_cost): Likewise.
+ (gcn_register_move_cost): Likewise.
+ (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
+ (gcn_md_reorg): Handle AVGPRs.
+ (gcn_hsa_declare_function_name): Likewise.
+ (print_reg): Likewise.
+ (gcn_dwarf_register_number): Likewise.
+ * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
+ (AVGPR_REGNO): Define.
+ (LAST_AVGPR_REG): Define.
+ (SOFT_ARG_REG): Update.
+ (FRAME_POINTER_REGNUM): Update.
+ (DWARF_LINK_REGISTER): Update.
+ (FIRST_PSEUDO_REGISTER): Update.
+ (AVGPR_REGNO_P): Define.
+ (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
+ (REG_CLASS_CONTENTS): Add new register classes and add entries for
+ AVGPRs to all classes.
+ (REGISTER_NAMES): Add AVGPRs.
+ * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
+ (AP_REGNUM, FP_REGNUM): Update.
+ (define_attr "type"): Add vop3p_mai.
+ (define_attr "unit"): Handle vop3p_mai.
+ (define_attr "gcn_version"): Add "cdna2".
+ (define_attr "enabled"): Handle cdna2.
+ (*mov<mode>_insn): Add AVGPR alternatives.
+ (*movti_insn): Likewise.
+ * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
+ (process_asm): Process avgpr_count.
+ * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
+ (gcn_avgpr_hard_register_operand): New.
+ * doc/md.texi: Document the "a" constraint.
+
+2023-11-15 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
+ (reload_in<mode>): Delete.
+ (reload_out<mode>): Delete.
+ * config/gcn/gcn.cc (CODE_FOR): Delete.
+ (get_code_for_##PREFIX##vN##SUFFIX): Delete.
+ (CODE_FOR_OP): Delete.
+ (get_code_for_##PREFIX): Delete.
+ (gcn_secondary_reload): Replace "get_code_for" with "code_for".
+
+2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/t-s390: Generate s390-gen-builtins.h without
+ linemarkers.
+
+2023-11-15 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112282
+ * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
+ the loop header.
+
+2023-11-15 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
+ we skipped an instance due to -fdbg-cnt.
+
+2023-11-15 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch.cc
+ (loongarch_memmodel_needs_release_fence): Remove.
+ (loongarch_cas_failure_memorder_needs_acquire): New static
+ function.
+ (loongarch_print_operand): Redefine 'G' for the barrier on CAS
+ failure.
+ * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
+ Remove the redundant barrier before the LL instruction, and
+ emit an acquire barrier on failure if needed by
+ failure_memorder.
+ (atomic_cas_value_cmp_and_7_<mode>): Likewise.
+ (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
+ before the LL instruction.
+ (atomic_cas_value_sub_7_<mode>): Likewise.
+ (atomic_cas_value_and_7_<mode>): Likewise.
+ (atomic_cas_value_xor_7_<mode>): Likewise.
+ (atomic_cas_value_or_7_<mode>): Likewise.
+ (atomic_cas_value_nand_7_<mode>): Likewise.
+ (atomic_cas_value_exchange_7_<mode>): Likewise.
+
+2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
+ (expand_vec_init): Add trailing optimization.
+
+2023-11-15 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
+ Add inner_mode mask arg for mask int mode.
+ (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
+ to get the good enough vector int mode on precision.
+ (expand_vector_init_merge_repeating_sequence): Pass required args
+ to above func.
+
+2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112535
+ * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
+
+2023-11-15 David Malcolm <dmalcolm@redhat.com>
+
+ * json.cc (selftest::assert_print_eq): Add "loc" param and use
+ ASSERT_STREQ_AT.
+ (ASSERT_PRINT_EQ): New macro.
+ (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
+ source location of assertion.
+ (selftest::test_writing_arrays): Likewise.
+ (selftest::test_writing_float_numbers): Likewise.
+ (selftest::test_writing_integer_numbers): Likewise.
+ (selftest::test_writing_strings): Likewise.
+ (selftest::test_writing_literals): Likewise.
+
2023-11-14 David Malcolm <dmalcolm@redhat.com>
PR analyzer/103533
+2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * tree.cc (build_cplus_array_type): Revert using the macro
+ CAN_HAVE_LOCATION_P.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/112515
+ * decl.cc (is_direct_enum_init): Check type-dependence of the
+ single element.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/101043
+ * tree.cc (strip_typedefs_expr) <case TREE_LIST>: Handle
+ non-empty TREE_PURPOSE.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/112427
+ * tree.cc (build_min_non_dep): Propagate TREE_SIDE_EFFECTS from
+ the original arguments.
+ (build_min_non_dep_call_vec): Likewise.
+ * typeck2.cc (build_m_component_ref): Use cp_convert, build2 and
+ cp_fully_fold instead of fold_build_pointer_plus and fold_convert.
+ Don't build the POINTER_PLUS_EXPR in a template context.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/111703
+ PR c++/112269
+ * constexpr.cc (potential_constant_expression_1) <case VAR_DECL>:
+ Only consider var_in_maybe_constexpr_fn if 'now' is false.
+ <case INDIRECT_REF>: Likewise.
+
+2023-11-15 Jakub Jelinek <jakub@redhat.com>
+
+ * typeck.cc: Implement C++26 P2864R2 - Remove Deprecated Arithmetic
+ Conversion on Enumerations From C++26.
+ (do_warn_enum_conversions): Return bool rather than void, add COMPLAIN
+ argument. Use pedwarn rather than warning_at for C++26 and remove
+ " is deprecated" part of the diagnostics in that case. For SFINAE
+ in C++26 return true on newly erroneous cases.
+ (cp_build_binary_op): For C++26 call do_warn_enum_conversions
+ unconditionally, pass complain argument to it and if it returns true,
+ return error_mark_node.
+ * call.cc (build_conditional_expr): Use pedwarn rather than warning_at
+ for C++26 and remove " is deprecated" part of the diagnostics in that
+ case and check for complain & tf_warning_or_error. Use emit_diagnostic
+ with cxx_dialect >= cxx26 ? DK_PEDWARN : DK_WARNING. For SFINAE in
+ C++26 return error_mark_node on newly erroneous cases.
+ (build_new_op): Use emit_diagnostic with cxx_dialect >= cxx26
+ ? DK_PEDWARN : DK_WARNING and complain & tf_warning_or_error check
+ for C++26. For SFINAE in C++26 return error_mark_node on newly
+ erroneous cases.
+
2023-11-14 Nathaniel Shead <nathanieloshead@gmail.com>
PR c++/103499
+2023-11-15 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/78904
+ * gcc.target/i386/pr78904-8.c: New test.
+ * gcc.target/i386/pr78904-8a.c: New test.
+ * gcc.target/i386/pr78904-8b.c: New test.
+ * gcc.target/i386/pr78904-9.c: New test.
+ * gcc.target/i386/pr78904-9a.c: New test.
+ * gcc.target/i386/pr78904-9b.c: New test.
+
+2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
+
+ * gcc.target/riscv/arch-27.c: New test.
+ * gcc.target/riscv/arch-28.c: New test.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/112515
+ * g++.dg/template/non-dependent30.C: New test.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/101043
+ * g++.dg/cpp2a/concepts-requires37.C: New test.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/112427
+ * g++.dg/template/non-dependent29.C: New test.
+
+2023-11-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/111703
+ PR c++/112269
+ * g++.dg/cpp2a/concepts-fn8.C: New test.
+
+2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
+ Thomas Schwinge <thomas@codesourcery.com>
+
+ * gcc.target/nvptx/brev-2-O2.c: Adjust.
+ * gcc.target/nvptx/brevll-2-O2.c: Likewise.
+
+2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
+
+ * gcc.target/nvptx/brev-1.c: Extend.
+ * gcc.target/nvptx/brev-2.c: Rename to...
+ * gcc.target/nvptx/brev-2-O2.c: ... this, and extend. Copy to...
+ * gcc.target/nvptx/brev-2-O0.c: ... this, and adapt for '-O0'.
+ * gcc.target/nvptx/brevll-1.c: Extend.
+ * gcc.target/nvptx/brevll-2.c: Rename to...
+ * gcc.target/nvptx/brevll-2-O2.c: ... this, and extend. Copy to...
+ * gcc.target/nvptx/brevll-2-O0.c: ... this, and adapt for '-O0'.
+
+2023-11-15 Andrew Stubbs <ams@codesourcery.com>
+ Andrew Jenner <andrew@codesourcery.com>
+
+ * gcc.target/gcn/avgpr-mem-double.c: New test.
+ * gcc.target/gcn/avgpr-mem-int.c: New test.
+ * gcc.target/gcn/avgpr-mem-long.c: New test.
+ * gcc.target/gcn/avgpr-mem-short.c: New test.
+ * gcc.target/gcn/avgpr-spill-double.c: New test.
+ * gcc.target/gcn/avgpr-spill-int.c: New test.
+ * gcc.target/gcn/avgpr-spill-long.c: New test.
+ * gcc.target/gcn/avgpr-spill-short.c: New test.
+
+2023-11-15 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112282
+ * gcc.dg/torture/pr112282.c: New testcase.
+
+2023-11-15 Jakub Jelinek <jakub@redhat.com>
+
+ * c-c++-common/asan/sanity-check-pure-c-1.c: Adjust for interceptor_
+ or wrap_ substrings possibly not being emitted in newer libasan.
+
+2023-11-15 Xi Ruoyao <xry111@xry111.site>
+
+ * gcc.target/loongarch/cas-acquire.c: New test.
+
+2023-11-15 Richard Earnshaw <rearnsha@arm.com>
+
+ * lib/target-supports.exp (check_effective_target_arm_arch_v6t2_hw_ok):
+ Rename to...
+ (check_effective_target_arm_arch_v6t2_hw): ... this. Fix checks.
+ * gcc.target/arm/acle/data-intrinsics-armv6.c: Update pre-check.
+ * gcc.target/arm/acle/data-intrinsics-rbit.c: Likewise.
+
+2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/autovec/vls/def.h: Add trailing tests.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-1.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-2.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-3.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-4.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-5.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-6.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/trailing-7.c: New test.
+
+2023-11-15 Jakub Jelinek <jakub@redhat.com>
+
+ * gcc.dg/cpp/if-2.c: Adjust expected diagnostics for 16-bit targets.
+
+2023-11-15 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-10.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-11.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-12.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-13.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-14.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-15.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-6.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-7.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-8.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-9.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c: New test.
+ * gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c: New test.
+
+2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112535
+ * gcc.target/riscv/rvv/autovec/pr112535.c: New test.
+
+2023-11-15 Jakub Jelinek <jakub@redhat.com>
+
+ * g++.dg/cpp26/enum-conv1.C: New test.
+ * g++.dg/cpp2a/enum-conv1.C: Adjust expected diagnostics in C++26.
+ * g++.dg/diagnostic/enum3.C: Likewise.
+ * g++.dg/parse/attr3.C: Likewise.
+ * g++.dg/cpp0x/linkage2.C: Likewise.
+
+2023-11-15 Alexandre Oliva <oliva@adacore.com>
+
+ * g++.dg/tsan/pthread_cond_clockwait.C: Add fallback overload.
+
+2023-11-15 Alexandre Oliva <oliva@adacore.com>
+
+ * gcc.target/i386/pr95126-m32-3.c: Add
+ -mno-accumulate-outgoing-args.
+ * gcc.target/i386/pr95126-m32-4.c: Likewise.
+
2023-11-14 Lewis Hyatt <lhyatt@gmail.com>
PR pch/9471
+2023-11-15 Andrew Stubbs <ams@codesourcery.com>
+ Andrew Jenner <andrew@codesourcery.com>
+
+ * plugin/plugin-gcn.c (max_isa_vgprs): New.
+ (run_kernel): CDNA2 devices have more VGPRs.
+
2023-11-10 Tobias Burnus <tobias@codesourcery.com>
* libgomp.texi (OpenMP Impl. Status): Update for OpenMP TR12;
+2023-11-15 Mark Wielaard <mjw@redhat.com>
+
+ * aclocal.m4: Rebuild.
+
2023-11-10 Brendan Shanks <bshanks@codeweavers.com>
* configure.ac (AC_CHECK_HEADERS): Add spawn.h.
+2023-11-15 Jakub Jelinek <jakub@redhat.com>
+
+ * LOCAL_PATCHES: Update revisions.
+
+2023-11-15 Jakub Jelinek <jakub@redhat.com>
+
+ * ubsan/ubsan_handlers_cxx.h (FunctionTypeMismatchData): Forward
+ declare.
+ (__ubsan_handle_function_type_mismatch_v1,
+ __ubsan_handle_function_type_mismatch_v1_abort): Declare.
+ * ubsan/ubsan_handlers_cxx.cpp (handleFunctionTypeMismatch,
+ __ubsan_handle_function_type_mismatch_v1,
+ __ubsan_handle_function_type_mismatch_v1_abort): New functions readded
+ for backwards compatibility from older ubsan.
+ * ubsan/ubsan_interface.inc (__ubsan_handle_function_type_mismatch_v1,
+ __ubsan_handle_function_type_mismatch_v1_abort): Readd.
+
2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
* asan/Makefile.am: Handle Darwin rpaths.
+2023-11-15 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/112491
+ * python/libstdcxx/v6/xmethods.py (DequeWorkerBase.index):
+ Correctly handle unused capacity at the start of the first node.
+ * testsuite/libstdc++-xmethods/deque.cc: Check index operator
+ when elements have been removed from the front.
+
+2023-11-15 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/stacktrace (basic_stacktrace::at): Fix class name
+ in exception message.
+ * testsuite/19_diagnostics/stacktrace/hash.cc: Do not fail if
+ current() returns a non-empty stacktrace.
+
+2023-11-15 Alexandre Oliva <oliva@gnu.org>
+
+ Revert:
+ 2023-11-15 Alexandre Oliva <oliva@adacore.com>
+
+ * include/bits/stl_bvector.h (_GLIBCXX_ALWAYS_INLINE): Undef.
+
+2023-11-15 Alexandre Oliva <oliva@adacore.com>
+
+ * include/bits/stl_bvector.h (_GLIBCXX_ALWAYS_INLINE): Undef.
+
2023-11-14 Cassio Neri <cassio.neri@gmail.com>
* include/std/chrono (operator-(const weekday&, const weekday&)):
projects / thirdparty / gcc.git / commitdiff
