sysdeps/aarch64/fpu/sinh_advsimd.c

   1 /* Double-precision vector (Advanced SIMD) sinh function
   2
   3    Copyright (C) 2024 Free Software Foundation, Inc.
   4    This file is part of the GNU C Library.
   5
   6    The GNU C Library is free software; you can redistribute it and/or
   7    modify it under the terms of the GNU Lesser General Public
   8    License as published by the Free Software Foundation; either
   9    version 2.1 of the License, or (at your option) any later version.
  10
  11    The GNU C Library is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    Lesser General Public License for more details.
  15
  16    You should have received a copy of the GNU Lesser General Public
  17    License along with the GNU C Library; if not, see
  18    <https://www.gnu.org/licenses/>.  */
  19
  20 #include "v_math.h"
  21 #include "poly_advsimd_f64.h"
  22
  23 static const struct data
  24 {
  25   float64x2_t poly[11];
  26   float64x2_t inv_ln2, m_ln2, shift;
  27   uint64x2_t halff;
  28   int64x2_t onef;
  29 #if WANT_SIMD_EXCEPT
  30   uint64x2_t tiny_bound, thresh;
  31 #else
  32   uint64x2_t large_bound;
  33 #endif
  34 } data = {
  35   /* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2].  */
  36   .poly = { V2 (0x1p-1), V2 (0x1.5555555555559p-3), V2 (0x1.555555555554bp-5),
  37             V2 (0x1.111111110f663p-7), V2 (0x1.6c16c16c1b5f3p-10),
  38             V2 (0x1.a01a01affa35dp-13), V2 (0x1.a01a018b4ecbbp-16),
  39             V2 (0x1.71ddf82db5bb4p-19), V2 (0x1.27e517fc0d54bp-22),
  40             V2 (0x1.af5eedae67435p-26), V2 (0x1.1f143d060a28ap-29), },
  41
  42   .inv_ln2 = V2 (0x1.71547652b82fep0),
  43   .m_ln2 = (float64x2_t) {-0x1.62e42fefa39efp-1, -0x1.abc9e3b39803fp-56},
  44   .shift = V2 (0x1.8p52),
  45
  46   .halff = V2 (0x3fe0000000000000),
  47   .onef = V2 (0x3ff0000000000000),
  48 #if WANT_SIMD_EXCEPT
  49   /* 2^-26, below which sinh(x) rounds to x.  */
  50   .tiny_bound = V2 (0x3e50000000000000),
  51   /* asuint(large_bound) - asuint(tiny_bound).  */
  52   .thresh = V2 (0x0230000000000000),
  53 #else
  54 /* 2^9. expm1 helper overflows for large input.  */
  55   .large_bound = V2 (0x4080000000000000),
  56 #endif
  57 };
  58
  59 static inline float64x2_t
  60 expm1_inline (float64x2_t x)
  61 {
  62   const struct data *d = ptr_barrier (&data);
  63
  64   /* Reduce argument:
  65      exp(x) - 1 = 2^i * (expm1(f) + 1) - 1
  66      where i = round(x / ln2)
  67      and   f = x - i * ln2 (f in [-ln2/2, ln2/2]).  */
  68   float64x2_t j = vsubq_f64 (vfmaq_f64 (d->shift, d->inv_ln2, x), d->shift);
  69   int64x2_t i = vcvtq_s64_f64 (j);
  70   float64x2_t f = vfmaq_laneq_f64 (x, j, d->m_ln2, 0);
  71   f = vfmaq_laneq_f64 (f, j, d->m_ln2, 1);
  72   /* Approximate expm1(f) using polynomial.  */
  73   float64x2_t f2 = vmulq_f64 (f, f);
  74   float64x2_t f4 = vmulq_f64 (f2, f2);
  75   float64x2_t f8 = vmulq_f64 (f4, f4);
  76   float64x2_t p = vfmaq_f64 (f, f2, v_estrin_10_f64 (f, f2, f4, f8, d->poly));
  77   /* t = 2^i.  */
  78   float64x2_t t = vreinterpretq_f64_u64 (
  79       vreinterpretq_u64_s64 (vaddq_s64 (vshlq_n_s64 (i, 52), d->onef)));
  80   /* expm1(x) ~= p * t + (t - 1).  */
  81   return vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t);
  82 }
  83
  84 static float64x2_t NOINLINE VPCS_ATTR
  85 special_case (float64x2_t x)
  86 {
  87   return v_call_f64 (sinh, x, x, v_u64 (-1));
  88 }
  89
  90 /* Approximation for vector double-precision sinh(x) using expm1.
  91    sinh(x) = (exp(x) - exp(-x)) / 2.
  92    The greatest observed error is 2.57 ULP:
  93    _ZGVnN2v_sinh (0x1.9fb1d49d1d58bp-2) got 0x1.ab34e59d678dcp-2
  94                                        want 0x1.ab34e59d678d9p-2.  */
  95 float64x2_t VPCS_ATTR V_NAME_D1 (sinh) (float64x2_t x)
  96 {
  97   const struct data *d = ptr_barrier (&data);
  98
  99   float64x2_t ax = vabsq_f64 (x);
 100   uint64x2_t sign
 101       = veorq_u64 (vreinterpretq_u64_f64 (x), vreinterpretq_u64_f64 (ax));
 102   float64x2_t halfsign = vreinterpretq_f64_u64 (vorrq_u64 (sign, d->halff));
 103
 104 #if WANT_SIMD_EXCEPT
 105   uint64x2_t special = vcgeq_u64 (
 106       vsubq_u64 (vreinterpretq_u64_f64 (ax), d->tiny_bound), d->thresh);
 107 #else
 108   uint64x2_t special = vcgeq_u64 (vreinterpretq_u64_f64 (ax), d->large_bound);
 109 #endif
 110
 111   /* Fall back to scalar variant for all lanes if any of them are special.  */
 112   if (__glibc_unlikely (v_any_u64 (special)))
 113     return special_case (x);
 114
 115   /* Up to the point that expm1 overflows, we can use it to calculate sinh
 116      using a slight rearrangement of the definition of sinh. This allows us to
 117      retain acceptable accuracy for very small inputs.  */
 118   float64x2_t t = expm1_inline (ax);
 119   t = vaddq_f64 (t, vdivq_f64 (t, vaddq_f64 (t, v_f64 (1.0))));
 120   return vmulq_f64 (t, halfsign);
 121 }