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[thirdparty/kernel/stable-queue.git] / queue-6.1 / net-dsa-mt7530-set-all-cpu-ports-in-mt7531_cpu_pmap.patch
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GKH
1From ff221029a51fd54cacac66e193e0c75e4de940e7 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3Date: Sat, 17 Jun 2023 09:26:44 +0300
4Subject: net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9From: Arınç ÜNAL <arinc.unal@arinc9.com>
10
11commit ff221029a51fd54cacac66e193e0c75e4de940e7 upstream.
12
13MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU
14frames (further restricted by PCR_MATRIX).
15
16Currently the driver sets the first CPU port as the single port in this bit
17mask, which works fine regardless of whether the device tree defines port
185, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's
19logic of picking the first CPU port as the CPU port that all user ports are
20affine to, by default.
21
22An upcoming change would like to influence DSA's selection of the default
23CPU port to no longer be the first one, and in that case, this logic needs
24adaptation.
25
26Since there is no observed leakage or duplication of frames if all CPU
27ports are defined in this bit mask, simply include them all.
28
29Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
30Suggested-by: Vladimir Oltean <olteanv@gmail.com>
31Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
32Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
33Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
34Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
35Signed-off-by: David S. Miller <davem@davemloft.net>
36Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
37Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
38---
39 drivers/net/dsa/mt7530.c | 15 +++++++--------
40 drivers/net/dsa/mt7530.h | 1 +
41 2 files changed, 8 insertions(+), 8 deletions(-)
42
43--- a/drivers/net/dsa/mt7530.c
44+++ b/drivers/net/dsa/mt7530.c
45@@ -1236,6 +1236,13 @@ mt753x_cpu_port_enable(struct dsa_switch
46 if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
47 mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
48
49+ /* Add the CPU port to the CPU port bitmap for MT7531. Trapped frames
50+ * will be forwarded to the CPU port that is affine to the inbound user
51+ * port.
52+ */
53+ if (priv->id == ID_MT7531)
54+ mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
55+
56 /* CPU port gets connected to all user ports of
57 * the switch.
58 */
59@@ -2534,16 +2541,8 @@ static int
60 mt7531_setup_common(struct dsa_switch *ds)
61 {
62 struct mt7530_priv *priv = ds->priv;
63- struct dsa_port *cpu_dp;
64 int ret, i;
65
66- /* BPDU to CPU port */
67- dsa_switch_for_each_cpu_port(cpu_dp, ds) {
68- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
69- BIT(cpu_dp->index));
70- break;
71- }
72-
73 mt753x_trap_frames(priv);
74
75 /* Enable and reset MIB counters */
76--- a/drivers/net/dsa/mt7530.h
77+++ b/drivers/net/dsa/mt7530.h
78@@ -57,6 +57,7 @@ enum mt753x_id {
79 #define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK)
80 #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16)
81 #define MT7531_CPU_PMAP_MASK GENMASK(7, 0)
82+#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
83
84 #define MT753X_MIRROR_REG(id) (((id) == ID_MT7531) ? \
85 MT7531_CFC : MT7530_MFC)