crypto/rc4/asm/rc4-x86_64.pl

   1 #! /usr/bin/env perl
   2 # Copyright 2005-2020 The OpenSSL Project Authors. All Rights Reserved.
   3 #
   4 # Licensed under the Apache License 2.0 (the "License").  You may not use
   5 # this file except in compliance with the License.  You can obtain a copy
   6 # in the file LICENSE in the source distribution or at
   7 # https://www.openssl.org/source/license.html
   8
   9 #
  10 # ====================================================================
  11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  12 # project. The module is, however, dual licensed under OpenSSL and
  13 # CRYPTOGAMS licenses depending on where you obtain it. For further
  14 # details see http://www.openssl.org/~appro/cryptogams/.
  15 # ====================================================================
  16 #
  17 # July 2004
  18 #
  19 # 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
  20 # "hand-coded assembler"] doesn't stand for the whole improvement
  21 # coefficient. It turned out that eliminating RC4_CHAR from config
  22 # line results in ~40% improvement (yes, even for C implementation).
  23 # Presumably it has everything to do with AMD cache architecture and
  24 # RAW or whatever penalties. Once again! The module *requires* config
  25 # line *without* RC4_CHAR! As for coding "secret," I bet on partial
  26 # register arithmetics. For example instead of 'inc %r8; and $255,%r8'
  27 # I simply 'inc %r8b'. Even though optimization manual discourages
  28 # to operate on partial registers, it turned out to be the best bet.
  29 # At least for AMD... How IA32E would perform remains to be seen...
  30
  31 # November 2004
  32 #
  33 # As was shown by Marc Bevand reordering of couple of load operations
  34 # results in even higher performance gain of 3.3x:-) At least on
  35 # Opteron... For reference, 1x in this case is RC4_CHAR C-code
  36 # compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
  37 # Latter means that if you want to *estimate* what to expect from
  38 # *your* Opteron, then multiply 54 by 3.3 and clock frequency in GHz.
  39
  40 # November 2004
  41 #
  42 # Intel P4 EM64T core was found to run the AMD64 code really slow...
  43 # The only way to achieve comparable performance on P4 was to keep
  44 # RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
  45 # compose blended code, which would perform even within 30% marginal
  46 # on either AMD and Intel platforms, I implement both cases. See
  47 # rc4_skey.c for further details...
  48
  49 # April 2005
  50 #
  51 # P4 EM64T core appears to be "allergic" to 64-bit inc/dec. Replacing
  52 # those with add/sub results in 50% performance improvement of folded
  53 # loop...
  54
  55 # May 2005
  56 #
  57 # As was shown by Zou Nanhai loop unrolling can improve Intel EM64T
  58 # performance by >30% [unlike P4 32-bit case that is]. But this is
  59 # provided that loads are reordered even more aggressively! Both code
  60 # paths, AMD64 and EM64T, reorder loads in essentially same manner
  61 # as my IA-64 implementation. On Opteron this resulted in modest 5%
  62 # improvement [I had to test it], while final Intel P4 performance
  63 # achieves respectful 432MBps on 2.8GHz processor now. For reference.
  64 # If executed on Xeon, current RC4_CHAR code-path is 2.7x faster than
  65 # RC4_INT code-path. While if executed on Opteron, it's only 25%
  66 # slower than the RC4_INT one [meaning that if CPU µ-arch detection
  67 # is not implemented, then this final RC4_CHAR code-path should be
  68 # preferred, as it provides better *all-round* performance].
  69
  70 # March 2007
  71 #
  72 # Intel Core2 was observed to perform poorly on both code paths:-( It
  73 # apparently suffers from some kind of partial register stall, which
  74 # occurs in 64-bit mode only [as virtually identical 32-bit loop was
  75 # observed to outperform 64-bit one by almost 50%]. Adding two movzb to
  76 # cloop1 boosts its performance by 80%! This loop appears to be optimal
  77 # fit for Core2 and therefore the code was modified to skip cloop8 on
  78 # this CPU.
  79
  80 # May 2010
  81 #
  82 # Intel Westmere was observed to perform suboptimally. Adding yet
  83 # another movzb to cloop1 improved performance by almost 50%! Core2
  84 # performance is improved too, but nominally...
  85
  86 # May 2011
  87 #
  88 # The only code path that was not modified is P4-specific one. Non-P4
  89 # Intel code path optimization is heavily based on submission by Maxim
  90 # Perminov, Maxim Locktyukhin and Jim Guilford of Intel. I've used
  91 # some of the ideas even in attempt to optimize the original RC4_INT
  92 # code path... Current performance in cycles per processed byte (less
  93 # is better) and improvement coefficients relative to previous
  94 # version of this module are:
  95 #
  96 # Opteron       5.3/+0%(*)
  97 # P4            6.5
  98 # Core2         6.2/+15%(**)
  99 # Westmere      4.2/+60%
 100 # Sandy Bridge  4.2/+120%
 101 # Atom          9.3/+80%
 102 # VIA Nano      6.4/+4%
 103 # Ivy Bridge    4.1/+30%
 104 # Bulldozer     4.5/+30%(*)
 105 #
 106 # (*)   But corresponding loop has less instructions, which should have
 107 #       positive effect on upcoming Bulldozer, which has one less ALU.
 108 #       For reference, Intel code runs at 6.8 cpb rate on Opteron.
 109 # (**)  Note that Core2 result is ~15% lower than corresponding result
 110 #       for 32-bit code, meaning that it's possible to improve it,
 111 #       but more than likely at the cost of the others (see rc4-586.pl
 112 #       to get the idea)...
 113
 114 # $output is the last argument if it looks like a file (it has an extension)
 115 # $flavour is the first argument if it doesn't look like a file
 116 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
 117 $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
 118
 119 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
 120
 121 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
 122 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
 123 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
 124 die "can't locate x86_64-xlate.pl";
 125
 126 open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\""
 127     or die "can't call $xlate: $!";
 128 *STDOUT=*OUT;
 129
 130 $dat="%rdi";        # arg1
 131 $len="%rsi";        # arg2
 132 $inp="%rdx";        # arg3
 133 $out="%rcx";        # arg4
 134
 135 {
 136 $code=<<___;
 137 .text
 138 .extern OPENSSL_ia32cap_P
 139
 140 .globl  RC4
 141 .type   RC4,\@function,4
 142 .align  16
 143 RC4:
 144 .cfi_startproc
 145         endbranch
 146         or      $len,$len
 147         jne     .Lentry
 148         ret
 149 .Lentry:
 150         push    %rbx
 151 .cfi_push       %rbx
 152         push    %r12
 153 .cfi_push       %r12
 154         push    %r13
 155 .cfi_push       %r13
 156 .Lprologue:
 157         mov     $len,%r11
 158         mov     $inp,%r12
 159         mov     $out,%r13
 160 ___
 161 my $len="%r11";         # reassign input arguments
 162 my $inp="%r12";
 163 my $out="%r13";
 164
 165 my @XX=("%r10","%rsi");
 166 my @TX=("%rax","%rbx");
 167 my $YY="%rcx";
 168 my $TY="%rdx";
 169
 170 $code.=<<___;
 171         xor     $XX[0],$XX[0]
 172         xor     $YY,$YY
 173
 174         lea     8($dat),$dat
 175         mov     -8($dat),$XX[0]#b
 176         mov     -4($dat),$YY#b
 177         cmpl    \$-1,256($dat)
 178         je      .LRC4_CHAR
 179         mov     OPENSSL_ia32cap_P(%rip),%r8d
 180         xor     $TX[1],$TX[1]
 181         inc     $XX[0]#b
 182         sub     $XX[0],$TX[1]
 183         sub     $inp,$out
 184         movl    ($dat,$XX[0],4),$TX[0]#d
 185         test    \$-16,$len
 186         jz      .Lloop1
 187         bt      \$30,%r8d       # Intel CPU?
 188         jc      .Lintel
 189         and     \$7,$TX[1]
 190         lea     1($XX[0]),$XX[1]
 191         jz      .Loop8
 192         sub     $TX[1],$len
 193 .Loop8_warmup:
 194         add     $TX[0]#b,$YY#b
 195         movl    ($dat,$YY,4),$TY#d
 196         movl    $TX[0]#d,($dat,$YY,4)
 197         movl    $TY#d,($dat,$XX[0],4)
 198         add     $TY#b,$TX[0]#b
 199         inc     $XX[0]#b
 200         movl    ($dat,$TX[0],4),$TY#d
 201         movl    ($dat,$XX[0],4),$TX[0]#d
 202         xorb    ($inp),$TY#b
 203         movb    $TY#b,($out,$inp)
 204         lea     1($inp),$inp
 205         dec     $TX[1]
 206         jnz     .Loop8_warmup
 207
 208         lea     1($XX[0]),$XX[1]
 209         jmp     .Loop8
 210 .align  16
 211 .Loop8:
 212 ___
 213 for ($i=0;$i<8;$i++) {
 214 $code.=<<___ if ($i==7);
 215         add     \$8,$XX[1]#b
 216 ___
 217 $code.=<<___;
 218         add     $TX[0]#b,$YY#b
 219         movl    ($dat,$YY,4),$TY#d
 220         movl    $TX[0]#d,($dat,$YY,4)
 221         movl    `4*($i==7?-1:$i)`($dat,$XX[1],4),$TX[1]#d
 222         ror     \$8,%r8                         # ror is redundant when $i=0
 223         movl    $TY#d,4*$i($dat,$XX[0],4)
 224         add     $TX[0]#b,$TY#b
 225         movb    ($dat,$TY,4),%r8b
 226 ___
 227 push(@TX,shift(@TX)); #push(@XX,shift(@XX));    # "rotate" registers
 228 }
 229 $code.=<<___;
 230         add     \$8,$XX[0]#b
 231         ror     \$8,%r8
 232         sub     \$8,$len
 233
 234         xor     ($inp),%r8
 235         mov     %r8,($out,$inp)
 236         lea     8($inp),$inp
 237
 238         test    \$-8,$len
 239         jnz     .Loop8
 240         cmp     \$0,$len
 241         jne     .Lloop1
 242         jmp     .Lexit
 243
 244 .align  16
 245 .Lintel:
 246         test    \$-32,$len
 247         jz      .Lloop1
 248         and     \$15,$TX[1]
 249         jz      .Loop16_is_hot
 250         sub     $TX[1],$len
 251 .Loop16_warmup:
 252         add     $TX[0]#b,$YY#b
 253         movl    ($dat,$YY,4),$TY#d
 254         movl    $TX[0]#d,($dat,$YY,4)
 255         movl    $TY#d,($dat,$XX[0],4)
 256         add     $TY#b,$TX[0]#b
 257         inc     $XX[0]#b
 258         movl    ($dat,$TX[0],4),$TY#d
 259         movl    ($dat,$XX[0],4),$TX[0]#d
 260         xorb    ($inp),$TY#b
 261         movb    $TY#b,($out,$inp)
 262         lea     1($inp),$inp
 263         dec     $TX[1]
 264         jnz     .Loop16_warmup
 265
 266         mov     $YY,$TX[1]
 267         xor     $YY,$YY
 268         mov     $TX[1]#b,$YY#b
 269
 270 .Loop16_is_hot:
 271         lea     ($dat,$XX[0],4),$XX[1]
 272 ___
 273 sub RC4_loop {
 274   my $i=shift;
 275   my $j=$i<0?0:$i;
 276   my $xmm="%xmm".($j&1);
 277
 278     $code.="    add     \$16,$XX[0]#b\n"                if ($i==15);
 279     $code.="    movdqu  ($inp),%xmm2\n"                 if ($i==15);
 280     $code.="    add     $TX[0]#b,$YY#b\n"               if ($i<=0);
 281     $code.="    movl    ($dat,$YY,4),$TY#d\n";
 282     $code.="    pxor    %xmm0,%xmm2\n"                  if ($i==0);
 283     $code.="    psllq   \$8,%xmm1\n"                    if ($i==0);
 284     $code.="    pxor    $xmm,$xmm\n"                    if ($i<=1);
 285     $code.="    movl    $TX[0]#d,($dat,$YY,4)\n";
 286     $code.="    add     $TY#b,$TX[0]#b\n";
 287     $code.="    movl    `4*($j+1)`($XX[1]),$TX[1]#d\n"  if ($i<15);
 288     $code.="    movz    $TX[0]#b,$TX[0]#d\n";
 289     $code.="    movl    $TY#d,4*$j($XX[1])\n";
 290     $code.="    pxor    %xmm1,%xmm2\n"                  if ($i==0);
 291     $code.="    lea     ($dat,$XX[0],4),$XX[1]\n"       if ($i==15);
 292     $code.="    add     $TX[1]#b,$YY#b\n"               if ($i<15);
 293     $code.="    pinsrw  \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n";
 294     $code.="    movdqu  %xmm2,($out,$inp)\n"            if ($i==0);
 295     $code.="    lea     16($inp),$inp\n"                if ($i==0);
 296     $code.="    movl    ($XX[1]),$TX[1]#d\n"            if ($i==15);
 297 }
 298         RC4_loop(-1);
 299 $code.=<<___;
 300         jmp     .Loop16_enter
 301 .align  16
 302 .Loop16:
 303 ___
 304
 305 for ($i=0;$i<16;$i++) {
 306     $code.=".Loop16_enter:\n"           if ($i==1);
 307         RC4_loop($i);
 308         push(@TX,shift(@TX));           # "rotate" registers
 309 }
 310 $code.=<<___;
 311         mov     $YY,$TX[1]
 312         xor     $YY,$YY                 # keyword to partial register
 313         sub     \$16,$len
 314         mov     $TX[1]#b,$YY#b
 315         test    \$-16,$len
 316         jnz     .Loop16
 317
 318         psllq   \$8,%xmm1
 319         pxor    %xmm0,%xmm2
 320         pxor    %xmm1,%xmm2
 321         movdqu  %xmm2,($out,$inp)
 322         lea     16($inp),$inp
 323
 324         cmp     \$0,$len
 325         jne     .Lloop1
 326         jmp     .Lexit
 327
 328 .align  16
 329 .Lloop1:
 330         add     $TX[0]#b,$YY#b
 331         movl    ($dat,$YY,4),$TY#d
 332         movl    $TX[0]#d,($dat,$YY,4)
 333         movl    $TY#d,($dat,$XX[0],4)
 334         add     $TY#b,$TX[0]#b
 335         inc     $XX[0]#b
 336         movl    ($dat,$TX[0],4),$TY#d
 337         movl    ($dat,$XX[0],4),$TX[0]#d
 338         xorb    ($inp),$TY#b
 339         movb    $TY#b,($out,$inp)
 340         lea     1($inp),$inp
 341         dec     $len
 342         jnz     .Lloop1
 343         jmp     .Lexit
 344
 345 .align  16
 346 .LRC4_CHAR:
 347         add     \$1,$XX[0]#b
 348         movzb   ($dat,$XX[0]),$TX[0]#d
 349         test    \$-8,$len
 350         jz      .Lcloop1
 351         jmp     .Lcloop8
 352 .align  16
 353 .Lcloop8:
 354         mov     ($inp),%r8d
 355         mov     4($inp),%r9d
 356 ___
 357 # unroll 2x4-wise, because 64-bit rotates kill Intel P4...
 358 for ($i=0;$i<4;$i++) {
 359 $code.=<<___;
 360         add     $TX[0]#b,$YY#b
 361         lea     1($XX[0]),$XX[1]
 362         movzb   ($dat,$YY),$TY#d
 363         movzb   $XX[1]#b,$XX[1]#d
 364         movzb   ($dat,$XX[1]),$TX[1]#d
 365         movb    $TX[0]#b,($dat,$YY)
 366         cmp     $XX[1],$YY
 367         movb    $TY#b,($dat,$XX[0])
 368         jne     .Lcmov$i                        # Intel cmov is sloooow...
 369         mov     $TX[0],$TX[1]
 370 .Lcmov$i:
 371         add     $TX[0]#b,$TY#b
 372         xor     ($dat,$TY),%r8b
 373         ror     \$8,%r8d
 374 ___
 375 push(@TX,shift(@TX)); push(@XX,shift(@XX));     # "rotate" registers
 376 }
 377 for ($i=4;$i<8;$i++) {
 378 $code.=<<___;
 379         add     $TX[0]#b,$YY#b
 380         lea     1($XX[0]),$XX[1]
 381         movzb   ($dat,$YY),$TY#d
 382         movzb   $XX[1]#b,$XX[1]#d
 383         movzb   ($dat,$XX[1]),$TX[1]#d
 384         movb    $TX[0]#b,($dat,$YY)
 385         cmp     $XX[1],$YY
 386         movb    $TY#b,($dat,$XX[0])
 387         jne     .Lcmov$i                        # Intel cmov is sloooow...
 388         mov     $TX[0],$TX[1]
 389 .Lcmov$i:
 390         add     $TX[0]#b,$TY#b
 391         xor     ($dat,$TY),%r9b
 392         ror     \$8,%r9d
 393 ___
 394 push(@TX,shift(@TX)); push(@XX,shift(@XX));     # "rotate" registers
 395 }
 396 $code.=<<___;
 397         lea     -8($len),$len
 398         mov     %r8d,($out)
 399         lea     8($inp),$inp
 400         mov     %r9d,4($out)
 401         lea     8($out),$out
 402
 403         test    \$-8,$len
 404         jnz     .Lcloop8
 405         cmp     \$0,$len
 406         jne     .Lcloop1
 407         jmp     .Lexit
 408 ___
 409 $code.=<<___;
 410 .align  16
 411 .Lcloop1:
 412         add     $TX[0]#b,$YY#b
 413         movzb   $YY#b,$YY#d
 414         movzb   ($dat,$YY),$TY#d
 415         movb    $TX[0]#b,($dat,$YY)
 416         movb    $TY#b,($dat,$XX[0])
 417         add     $TX[0]#b,$TY#b
 418         add     \$1,$XX[0]#b
 419         movzb   $TY#b,$TY#d
 420         movzb   $XX[0]#b,$XX[0]#d
 421         movzb   ($dat,$TY),$TY#d
 422         movzb   ($dat,$XX[0]),$TX[0]#d
 423         xorb    ($inp),$TY#b
 424         lea     1($inp),$inp
 425         movb    $TY#b,($out)
 426         lea     1($out),$out
 427         sub     \$1,$len
 428         jnz     .Lcloop1
 429         jmp     .Lexit
 430
 431 .align  16
 432 .Lexit:
 433         sub     \$1,$XX[0]#b
 434         movl    $XX[0]#d,-8($dat)
 435         movl    $YY#d,-4($dat)
 436
 437         mov     (%rsp),%r13
 438 .cfi_restore    %r13
 439         mov     8(%rsp),%r12
 440 .cfi_restore    %r12
 441         mov     16(%rsp),%rbx
 442 .cfi_restore    %rbx
 443         add     \$24,%rsp
 444 .cfi_adjust_cfa_offset  -24
 445 .Lepilogue:
 446         ret
 447 .cfi_endproc
 448 .size   RC4,.-RC4
 449 ___
 450 }
 451
 452 $idx="%r8";
 453 $ido="%r9";
 454
 455 $code.=<<___;
 456 .globl  RC4_set_key
 457 .type   RC4_set_key,\@function,3
 458 .align  16
 459 RC4_set_key:
 460 .cfi_startproc
 461         endbranch
 462         lea     8($dat),$dat
 463         lea     ($inp,$len),$inp
 464         neg     $len
 465         mov     $len,%rcx
 466         xor     %eax,%eax
 467         xor     $ido,$ido
 468         xor     %r10,%r10
 469         xor     %r11,%r11
 470
 471         mov     OPENSSL_ia32cap_P(%rip),$idx#d
 472         bt      \$20,$idx#d     # RC4_CHAR?
 473         jc      .Lc1stloop
 474         jmp     .Lw1stloop
 475
 476 .align  16
 477 .Lw1stloop:
 478         mov     %eax,($dat,%rax,4)
 479         add     \$1,%al
 480         jnc     .Lw1stloop
 481
 482         xor     $ido,$ido
 483         xor     $idx,$idx
 484 .align  16
 485 .Lw2ndloop:
 486         mov     ($dat,$ido,4),%r10d
 487         add     ($inp,$len,1),$idx#b
 488         add     %r10b,$idx#b
 489         add     \$1,$len
 490         mov     ($dat,$idx,4),%r11d
 491         cmovz   %rcx,$len
 492         mov     %r10d,($dat,$idx,4)
 493         mov     %r11d,($dat,$ido,4)
 494         add     \$1,$ido#b
 495         jnc     .Lw2ndloop
 496         jmp     .Lexit_key
 497
 498 .align  16
 499 .Lc1stloop:
 500         mov     %al,($dat,%rax)
 501         add     \$1,%al
 502         jnc     .Lc1stloop
 503
 504         xor     $ido,$ido
 505         xor     $idx,$idx
 506 .align  16
 507 .Lc2ndloop:
 508         mov     ($dat,$ido),%r10b
 509         add     ($inp,$len),$idx#b
 510         add     %r10b,$idx#b
 511         add     \$1,$len
 512         mov     ($dat,$idx),%r11b
 513         jnz     .Lcnowrap
 514         mov     %rcx,$len
 515 .Lcnowrap:
 516         mov     %r10b,($dat,$idx)
 517         mov     %r11b,($dat,$ido)
 518         add     \$1,$ido#b
 519         jnc     .Lc2ndloop
 520         movl    \$-1,256($dat)
 521
 522 .align  16
 523 .Lexit_key:
 524         xor     %eax,%eax
 525         mov     %eax,-8($dat)
 526         mov     %eax,-4($dat)
 527         ret
 528 .cfi_endproc
 529 .size   RC4_set_key,.-RC4_set_key
 530
 531 .globl  RC4_options
 532 .type   RC4_options,\@abi-omnipotent
 533 .align  16
 534 RC4_options:
 535 .cfi_startproc
 536         endbranch
 537         lea     .Lopts(%rip),%rax
 538         mov     OPENSSL_ia32cap_P(%rip),%edx
 539         bt      \$20,%edx
 540         jc      .L8xchar
 541         bt      \$30,%edx
 542         jnc     .Ldone
 543         add     \$25,%rax
 544         ret
 545 .L8xchar:
 546         add     \$12,%rax
 547 .Ldone:
 548         ret
 549 .cfi_endproc
 550 .align  64
 551 .Lopts:
 552 .asciz  "rc4(8x,int)"
 553 .asciz  "rc4(8x,char)"
 554 .asciz  "rc4(16x,int)"
 555 .asciz  "RC4 for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
 556 .align  64
 557 .size   RC4_options,.-RC4_options
 558 ___
 559
 560 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
 561 #               CONTEXT *context,DISPATCHER_CONTEXT *disp)
 562 if ($win64) {
 563 $rec="%rcx";
 564 $frame="%rdx";
 565 $context="%r8";
 566 $disp="%r9";
 567
 568 $code.=<<___;
 569 .extern __imp_RtlVirtualUnwind
 570 .type   stream_se_handler,\@abi-omnipotent
 571 .align  16
 572 stream_se_handler:
 573         push    %rsi
 574         push    %rdi
 575         push    %rbx
 576         push    %rbp
 577         push    %r12
 578         push    %r13
 579         push    %r14
 580         push    %r15
 581         pushfq
 582         sub     \$64,%rsp
 583
 584         mov     120($context),%rax      # pull context->Rax
 585         mov     248($context),%rbx      # pull context->Rip
 586
 587         lea     .Lprologue(%rip),%r10
 588         cmp     %r10,%rbx               # context->Rip<prologue label
 589         jb      .Lin_prologue
 590
 591         mov     152($context),%rax      # pull context->Rsp
 592
 593         lea     .Lepilogue(%rip),%r10
 594         cmp     %r10,%rbx               # context->Rip>=epilogue label
 595         jae     .Lin_prologue
 596
 597         lea     24(%rax),%rax
 598
 599         mov     -8(%rax),%rbx
 600         mov     -16(%rax),%r12
 601         mov     -24(%rax),%r13
 602         mov     %rbx,144($context)      # restore context->Rbx
 603         mov     %r12,216($context)      # restore context->R12
 604         mov     %r13,224($context)      # restore context->R13
 605
 606 .Lin_prologue:
 607         mov     8(%rax),%rdi
 608         mov     16(%rax),%rsi
 609         mov     %rax,152($context)      # restore context->Rsp
 610         mov     %rsi,168($context)      # restore context->Rsi
 611         mov     %rdi,176($context)      # restore context->Rdi
 612
 613         jmp     .Lcommon_seh_exit
 614 .size   stream_se_handler,.-stream_se_handler
 615
 616 .type   key_se_handler,\@abi-omnipotent
 617 .align  16
 618 key_se_handler:
 619         push    %rsi
 620         push    %rdi
 621         push    %rbx
 622         push    %rbp
 623         push    %r12
 624         push    %r13
 625         push    %r14
 626         push    %r15
 627         pushfq
 628         sub     \$64,%rsp
 629
 630         mov     152($context),%rax      # pull context->Rsp
 631         mov     8(%rax),%rdi
 632         mov     16(%rax),%rsi
 633         mov     %rsi,168($context)      # restore context->Rsi
 634         mov     %rdi,176($context)      # restore context->Rdi
 635
 636 .Lcommon_seh_exit:
 637
 638         mov     40($disp),%rdi          # disp->ContextRecord
 639         mov     $context,%rsi           # context
 640         mov     \$154,%ecx              # sizeof(CONTEXT)
 641         .long   0xa548f3fc              # cld; rep movsq
 642
 643         mov     $disp,%rsi
 644         xor     %rcx,%rcx               # arg1, UNW_FLAG_NHANDLER
 645         mov     8(%rsi),%rdx            # arg2, disp->ImageBase
 646         mov     0(%rsi),%r8             # arg3, disp->ControlPc
 647         mov     16(%rsi),%r9            # arg4, disp->FunctionEntry
 648         mov     40(%rsi),%r10           # disp->ContextRecord
 649         lea     56(%rsi),%r11           # &disp->HandlerData
 650         lea     24(%rsi),%r12           # &disp->EstablisherFrame
 651         mov     %r10,32(%rsp)           # arg5
 652         mov     %r11,40(%rsp)           # arg6
 653         mov     %r12,48(%rsp)           # arg7
 654         mov     %rcx,56(%rsp)           # arg8, (NULL)
 655         call    *__imp_RtlVirtualUnwind(%rip)
 656
 657         mov     \$1,%eax                # ExceptionContinueSearch
 658         add     \$64,%rsp
 659         popfq
 660         pop     %r15
 661         pop     %r14
 662         pop     %r13
 663         pop     %r12
 664         pop     %rbp
 665         pop     %rbx
 666         pop     %rdi
 667         pop     %rsi
 668         ret
 669 .size   key_se_handler,.-key_se_handler
 670
 671 .section        .pdata
 672 .align  4
 673         .rva    .LSEH_begin_RC4
 674         .rva    .LSEH_end_RC4
 675         .rva    .LSEH_info_RC4
 676
 677         .rva    .LSEH_begin_RC4_set_key
 678         .rva    .LSEH_end_RC4_set_key
 679         .rva    .LSEH_info_RC4_set_key
 680
 681 .section        .xdata
 682 .align  8
 683 .LSEH_info_RC4:
 684         .byte   9,0,0,0
 685         .rva    stream_se_handler
 686 .LSEH_info_RC4_set_key:
 687         .byte   9,0,0,0
 688         .rva    key_se_handler
 689 ___
 690 }
 691
 692 sub reg_part {
 693 my ($reg,$conv)=@_;
 694     if ($reg =~ /%r[0-9]+/)     { $reg .= $conv; }
 695     elsif ($conv eq "b")        { $reg =~ s/%[er]([^x]+)x?/%$1l/;       }
 696     elsif ($conv eq "w")        { $reg =~ s/%[er](.+)/%$1/;             }
 697     elsif ($conv eq "d")        { $reg =~ s/%[er](.+)/%e$1/;            }
 698     return $reg;
 699 }
 700
 701 $code =~ s/(%[a-z0-9]+)#([bwd])/reg_part($1,$2)/gem;
 702 $code =~ s/\`([^\`]*)\`/eval $1/gem;
 703
 704 print $code;
 705
 706 close STDOUT or die "error closing STDOUT: $!";