regtest arm64: fixes for arm64 clang, part 3

clang assembler refuses to accept scvtf with q regs where v regs
should be used (again the arm manual agrees).

diff --git a/none/tests/arm64/cvtf_imm.c b/none/tests/arm64/cvtf_imm.c
index ba58941b7b49290f91fe264dce99b4de1d666fe0..cb2bdd99a76e0707becf1d04f6d515b53c187e62 100644 (file)
--- a/none/tests/arm64/cvtf_imm.c
+++ b/none/tests/arm64/cvtf_imm.c
@@ -17,7 +17,7 @@ __attribute__((noinline)) double do_scvtf_d_x_imm1 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf d18,x13,#1;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_scvtf_d_x_imm32 ( Long x )
@@ -25,7 +25,7 @@ __attribute__((noinline)) double do_scvtf_d_x_imm32 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf d18,x13,#32;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_scvtf_d_x_imm64 ( Long x )
@@ -33,7 +33,7 @@ __attribute__((noinline)) double do_scvtf_d_x_imm64 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf d18,x13,#64;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 
@@ -42,7 +42,7 @@ __attribute__((noinline)) double do_ucvtf_d_x_imm1 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf d18,x13,#1;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_ucvtf_d_x_imm32 ( Long x )
@@ -50,7 +50,7 @@ __attribute__((noinline)) double do_ucvtf_d_x_imm32 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf d18,x13,#32;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_ucvtf_d_x_imm64 ( Long x )
@@ -58,7 +58,7 @@ __attribute__((noinline)) double do_ucvtf_d_x_imm64 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf d18,x13,#64;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 
@@ -70,7 +70,7 @@ __attribute__((noinline)) double do_scvtf_d_w_imm1 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf d18,w13,#1;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_scvtf_d_w_imm16 ( Int x )
@@ -78,7 +78,7 @@ __attribute__((noinline)) double do_scvtf_d_w_imm16 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf d18,w13,#16;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_scvtf_d_w_imm32 ( Int x )
@@ -86,7 +86,7 @@ __attribute__((noinline)) double do_scvtf_d_w_imm32 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf d18,w13,#32;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 
@@ -95,7 +95,7 @@ __attribute__((noinline)) double do_ucvtf_d_w_imm1 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf d18,w13,#1;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_ucvtf_d_w_imm16 ( Int x )
@@ -103,7 +103,7 @@ __attribute__((noinline)) double do_ucvtf_d_w_imm16 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf d18,w13,#16;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 __attribute__((noinline)) double do_ucvtf_d_w_imm32 ( Int x )
@@ -111,7 +111,7 @@ __attribute__((noinline)) double do_ucvtf_d_w_imm32 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf d18,w13,#32;  str d18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return block[1].d64;
 }
 
@@ -123,7 +123,7 @@ __attribute__((noinline)) double do_scvtf_s_x_imm1 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf s18,x13,#1;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_scvtf_s_x_imm32 ( Long x )
@@ -131,7 +131,7 @@ __attribute__((noinline)) double do_scvtf_s_x_imm32 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf s18,x13,#32;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_scvtf_s_x_imm64 ( Long x )
@@ -139,7 +139,7 @@ __attribute__((noinline)) double do_scvtf_s_x_imm64 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf s18,x13,#64;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 
@@ -148,7 +148,7 @@ __attribute__((noinline)) double do_ucvtf_s_x_imm1 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf s18,x13,#1;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_ucvtf_s_x_imm32 ( Long x )
@@ -156,7 +156,7 @@ __attribute__((noinline)) double do_ucvtf_s_x_imm32 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf s18,x13,#32;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_ucvtf_s_x_imm64 ( Long x )
@@ -164,7 +164,7 @@ __attribute__((noinline)) double do_ucvtf_s_x_imm64 ( Long x )
    U block[2]; block[0].i64 = x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf s18,x13,#64;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 
@@ -176,7 +176,7 @@ __attribute__((noinline)) double do_scvtf_s_w_imm1 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf s18,w13,#1;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_scvtf_s_w_imm16 ( Int x )
@@ -184,7 +184,7 @@ __attribute__((noinline)) double do_scvtf_s_w_imm16 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf s18,w13,#16;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_scvtf_s_w_imm32 ( Int x )
@@ -192,7 +192,7 @@ __attribute__((noinline)) double do_scvtf_s_w_imm32 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  scvtf s18,w13,#32;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 
@@ -201,7 +201,7 @@ __attribute__((noinline)) double do_ucvtf_s_w_imm1 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf s18,w13,#1;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_ucvtf_s_w_imm16 ( Int x )
@@ -209,7 +209,7 @@ __attribute__((noinline)) double do_ucvtf_s_w_imm16 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf s18,w13,#16;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }
 __attribute__((noinline)) double do_ucvtf_s_w_imm32 ( Int x )
@@ -217,7 +217,7 @@ __attribute__((noinline)) double do_ucvtf_s_w_imm32 ( Int x )
    U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
    __asm__ __volatile__(
       "ldr x13,[%0,#0];  ucvtf s18,w13,#32;  str s18, [%0,#8]"
-      ::"r"(&block[0]) : "memory", "x13","q18");
+      ::"r"(&block[0]) : "memory", "x13","v18");
    return (double)block[1].f32[0];
 }