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Commit | Line | Data |
---|---|---|
6710b5b5 SG |
1 | /dts-v1/; |
2 | ||
6c5be646 | 3 | #include "tegra20.dtsi" |
6710b5b5 SG |
4 | |
5 | / { | |
6 | model = "NVIDIA Seaboard"; | |
7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; | |
8 | ||
9 | chosen { | |
10 | bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; | |
11 | }; | |
12 | ||
c3691392 SG |
13 | chosen { |
14 | stdout-path = &uartd; | |
15 | }; | |
16 | ||
1920172e | 17 | aliases { |
126685ad | 18 | /* This defines the order of our ports */ |
1920172e SG |
19 | usb0 = "/usb@c5008000"; |
20 | usb1 = "/usb@c5000000"; | |
3682cc3d SG |
21 | i2c0 = "/i2c@7000d000"; |
22 | i2c1 = "/i2c@7000c000"; | |
23 | i2c2 = "/i2c@7000c400"; | |
24 | i2c3 = "/i2c@7000c500"; | |
126685ad TW |
25 | sdhci0 = "/sdhci@c8000600"; |
26 | sdhci1 = "/sdhci@c8000400"; | |
1920172e SG |
27 | }; |
28 | ||
6710b5b5 SG |
29 | memory { |
30 | device_type = "memory"; | |
31 | reg = < 0x00000000 0x40000000 >; | |
32 | }; | |
33 | ||
36068ae7 AM |
34 | host1x { |
35 | status = "okay"; | |
36 | dc@54200000 { | |
37 | status = "okay"; | |
38 | rgb { | |
39 | status = "okay"; | |
40 | nvidia,panel = <&lcd_panel>; | |
41 | }; | |
42 | }; | |
43 | }; | |
44 | ||
cd474cba SG |
45 | /* This is not used in U-Boot, but is expected to be in kernel .dts */ |
46 | i2c@7000d000 { | |
3682cc3d | 47 | clock-frequency = <100000>; |
cd474cba SG |
48 | pmic@34 { |
49 | compatible = "ti,tps6586x"; | |
50 | reg = <0x34>; | |
51 | ||
52 | clk_32k: clock { | |
53 | compatible = "fixed-clock"; | |
54 | /* | |
55 | * leave out for now due to CPP: | |
56 | * #clock-cells = <0>; | |
57 | */ | |
58 | clock-frequency = <32768>; | |
59 | }; | |
60 | }; | |
61 | }; | |
62 | ||
6710b5b5 SG |
63 | serial@70006300 { |
64 | clock-frequency = < 216000000 >; | |
65 | }; | |
66 | ||
b7723f3f | 67 | nand-controller@70008000 { |
2b2b50bc | 68 | nvidia,wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; |
b7723f3f AM |
69 | nvidia,width = <8>; |
70 | nvidia,timing = <26 100 20 80 20 10 12 10 70>; | |
71 | nand@0 { | |
72 | reg = <0>; | |
73 | compatible = "hynix,hy27uf4g2b", "nand-flash"; | |
74 | }; | |
6710b5b5 | 75 | }; |
3682cc3d SG |
76 | |
77 | i2c@7000c000 { | |
78 | clock-frequency = <100000>; | |
79 | }; | |
80 | ||
81 | i2c@7000c400 { | |
82 | status = "disabled"; | |
83 | }; | |
84 | ||
85 | i2c@7000c500 { | |
86 | clock-frequency = <100000>; | |
87 | }; | |
d376e8d2 | 88 | |
b7723f3f AM |
89 | kbc@7000e200 { |
90 | linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c | |
91 | 0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006 | |
92 | 0x03010005 0x03020013 0x03030012 0x03040021 0x03050020 | |
93 | 0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023 | |
94 | 0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a | |
95 | 0x05010009 0x05020016 0x05030015 0x05040024 0x05050031 | |
96 | 0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018 | |
97 | 0x06030017 0x06040026 0x06050025 0x06060033 0x06070032 | |
98 | 0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036 | |
99 | 0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019 | |
100 | 0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044 | |
101 | 0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067 | |
102 | 0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068 | |
103 | 0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057 | |
104 | 0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d | |
105 | 0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f | |
106 | 0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040 | |
107 | 0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f | |
108 | 0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050 | |
109 | 0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053 | |
110 | 0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072 | |
111 | 0x1d0700e1 0x1e000045 0x1e010046 0x1e020071 | |
112 | 0x1f04008a>; | |
113 | linux,fn-keymap = <0x05040002>; | |
114 | }; | |
115 | ||
d376e8d2 SG |
116 | emc@7000f400 { |
117 | emc-table@190000 { | |
118 | reg = < 190000 >; | |
119 | compatible = "nvidia,tegra20-emc-table"; | |
120 | clock-frequency = < 190000 >; | |
121 | nvidia,emc-registers = < 0x0000000c 0x00000026 | |
122 | 0x00000009 0x00000003 0x00000004 0x00000004 | |
123 | 0x00000002 0x0000000c 0x00000003 0x00000003 | |
124 | 0x00000002 0x00000001 0x00000004 0x00000005 | |
125 | 0x00000004 0x00000009 0x0000000d 0x0000059f | |
126 | 0x00000000 0x00000003 0x00000003 0x00000003 | |
127 | 0x00000003 0x00000001 0x0000000b 0x000000c8 | |
128 | 0x00000003 0x00000007 0x00000004 0x0000000f | |
129 | 0x00000002 0x00000000 0x00000000 0x00000002 | |
130 | 0x00000000 0x00000000 0x00000083 0xa06204ae | |
131 | 0x007dc010 0x00000000 0x00000000 0x00000000 | |
132 | 0x00000000 0x00000000 0x00000000 0x00000000 >; | |
133 | }; | |
134 | emc-table@380000 { | |
135 | reg = < 380000 >; | |
136 | compatible = "nvidia,tegra20-emc-table"; | |
137 | clock-frequency = < 380000 >; | |
138 | nvidia,emc-registers = < 0x00000017 0x0000004b | |
139 | 0x00000012 0x00000006 0x00000004 0x00000005 | |
140 | 0x00000003 0x0000000c 0x00000006 0x00000006 | |
141 | 0x00000003 0x00000001 0x00000004 0x00000005 | |
142 | 0x00000004 0x00000009 0x0000000d 0x00000b5f | |
143 | 0x00000000 0x00000003 0x00000003 0x00000006 | |
144 | 0x00000006 0x00000001 0x00000011 0x000000c8 | |
145 | 0x00000003 0x0000000e 0x00000007 0x0000000f | |
146 | 0x00000002 0x00000000 0x00000000 0x00000002 | |
147 | 0x00000000 0x00000000 0x00000083 0xe044048b | |
148 | 0x007d8010 0x00000000 0x00000000 0x00000000 | |
149 | 0x00000000 0x00000000 0x00000000 0x00000000 >; | |
150 | }; | |
151 | }; | |
c3ab91f0 | 152 | |
b7723f3f | 153 | usb@c5000000 { |
2b2b50bc | 154 | nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; |
b7723f3f | 155 | dr_mode = "otg"; |
c3ab91f0 | 156 | }; |
7cedd181 | 157 | |
b7723f3f AM |
158 | usb@c5004000 { |
159 | status = "disabled"; | |
7cedd181 | 160 | }; |
77139f51 | 161 | |
b7723f3f | 162 | sdhci@c8000400 { |
126685ad | 163 | status = "okay"; |
2b2b50bc SG |
164 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
165 | wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; | |
166 | power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; | |
126685ad | 167 | bus-width = <4>; |
b7723f3f AM |
168 | }; |
169 | ||
170 | sdhci@c8000600 { | |
126685ad TW |
171 | status = "okay"; |
172 | bus-width = <8>; | |
77139f51 SG |
173 | }; |
174 | ||
175 | lcd_panel: panel { | |
176 | /* Seaboard has 1366x768 */ | |
177 | clock = <70600000>; | |
178 | xres = <1366>; | |
179 | yres = <768>; | |
180 | left-margin = <58>; | |
181 | right-margin = <58>; | |
182 | hsync-len = <58>; | |
183 | lower-margin = <4>; | |
184 | upper-margin = <4>; | |
185 | vsync-len = <4>; | |
186 | hsync-active-high; | |
187 | nvidia,bits-per-pixel = <16>; | |
188 | nvidia,pwm = <&pwm 2 0>; | |
2b2b50bc SG |
189 | nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(D, 4) |
190 | GPIO_ACTIVE_HIGH>; | |
191 | nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2) | |
192 | GPIO_ACTIVE_HIGH>; | |
193 | nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0) | |
194 | GPIO_ACTIVE_HIGH>; | |
195 | nvidia,panel-vdd-gpios = <&gpio TEGRA_GPIO(C, 6) | |
196 | GPIO_ACTIVE_HIGH>; | |
77139f51 SG |
197 | nvidia,panel-timings = <400 4 203 17 15>; |
198 | }; | |
6710b5b5 | 199 | }; |