projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 0157cedb | 1 | /* |
| 91a76751 | 2 | * (C) Copyright 2002-2010 |
| 0157cedb WD |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * | |
| 1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 0157cedb WD |
6 | */ |
| 7 | ||
| 8 | #ifndef __ASM_GBL_DATA_H | |
| 9 | #define __ASM_GBL_DATA_H | |
| f046ccd1 | 10 | |
| 3469424c | 11 | #include "config.h" |
| f046ccd1 EL |
12 | #include "asm/types.h" |
| 13 | ||
| 5cb48582 SG |
14 | /* Architecture-specific global data */ |
| 15 | struct arch_global_data { | |
| e9adeca3 SG |
16 | #if defined(CONFIG_FSL_ESDHC) |
| 17 | u32 sdhc_clk; | |
| 18 | #endif | |
| 1206c184 SG |
19 | #if defined(CONFIG_8xx) |
| 20 | unsigned long brg_clk; | |
| 21 | #endif | |
| 22 | #if defined(CONFIG_CPM2) | |
| 748cd059 SG |
23 | /* There are many clocks on the MPC8260 - see page 9-5 */ |
| 24 | unsigned long vco_out; | |
| 25 | unsigned long cpm_clk; | |
| 26 | unsigned long scc_clk; | |
| 1206c184 | 27 | unsigned long brg_clk; |
| 1206c184 | 28 | #endif |
| c6731fe2 | 29 | /* TODO: sjg@chromium.org: Should these be unslgned long? */ |
| 0f898604 | 30 | #if defined(CONFIG_MPC83xx) |
| f046ccd1 EL |
31 | /* There are other clocks in the MPC83XX */ |
| 32 | u32 csb_clk; | |
| c6731fe2 | 33 | # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ |
| 7c619ddc | 34 | defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) |
| f046ccd1 EL |
35 | u32 tsec1_clk; |
| 36 | u32 tsec2_clk; | |
| f046ccd1 | 37 | u32 usbdr_clk; |
| c6731fe2 | 38 | # elif defined(CONFIG_MPC8309) |
| a88731a6 | 39 | u32 usbdr_clk; |
| c6731fe2 SG |
40 | # endif |
| 41 | # if defined(CONFIG_MPC834x) | |
| 0f253283 | 42 | u32 usbmph_clk; |
| c6731fe2 SG |
43 | # endif /* CONFIG_MPC834x */ |
| 44 | # if defined(CONFIG_MPC8315) | |
| 555da617 | 45 | u32 tdm_clk; |
| c6731fe2 | 46 | # endif |
| 5f820439 | 47 | u32 core_clk; |
| f046ccd1 EL |
48 | u32 enc_clk; |
| 49 | u32 lbiu_clk; | |
| 50 | u32 lclk_clk; | |
| c6731fe2 | 51 | # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ |
| 7c619ddc | 52 | defined(CONFIG_MPC837x) |
| 03051c3d DL |
53 | u32 pciexp1_clk; |
| 54 | u32 pciexp2_clk; | |
| c6731fe2 SG |
55 | # endif |
| 56 | # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) | |
| 03051c3d | 57 | u32 sata_clk; |
| c6731fe2 SG |
58 | # endif |
| 59 | # if defined(CONFIG_MPC8360) | |
| 60 | u32 mem_sec_clk; | |
| 61 | # endif /* CONFIG_MPC8360 */ | |
| 03051c3d | 62 | #endif |
| 67ac13b1 SG |
63 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
| 64 | u32 lbc_clk; | |
| 65 | void *cpu; | |
| 66 | #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ | |
| 609e6ec3 SG |
67 | #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ |
| 68 | defined(CONFIG_MPC86xx) | |
| 69 | u32 i2c1_clk; | |
| 70 | u32 i2c2_clk; | |
| 71 | #endif | |
| 45bae2e3 SG |
72 | #if defined(CONFIG_QE) |
| 73 | u32 qe_clk; | |
| 74 | u32 brg_clk; | |
| 75 | uint mp_alloc_base; | |
| 76 | uint mp_alloc_top; | |
| 77 | #endif /* CONFIG_QE */ | |
| 8670dbc9 SG |
78 | #if defined(CONFIG_FSL_LAW) |
| 79 | u32 used_laws; | |
| 80 | #endif | |
| 7c80c6c5 SG |
81 | #if defined(CONFIG_E500) |
| 82 | u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; | |
| 83 | #endif | |
| b2877496 SG |
84 | #if defined(CONFIG_MPC5xxx) |
| 85 | unsigned long ipb_clk; | |
| 86 | #endif | |
| fefb098b SG |
87 | #if defined(CONFIG_MPC512X) |
| 88 | u32 ips_clk; | |
| 89 | u32 csb_clk; | |
| 90 | #endif /* CONFIG_MPC512X */ | |
| 3c4c308c | 91 | unsigned long reset_status; /* reset status register at boot */ |
| 43e60814 SG |
92 | #if defined(CONFIG_MPC83xx) |
| 93 | unsigned long arbiter_event_attributes; | |
| 94 | unsigned long arbiter_event_address; | |
| 95 | #endif | |
| 6bb9ba72 SG |
96 | #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) |
| 97 | unsigned int dp_alloc_base; | |
| 98 | unsigned int dp_alloc_top; | |
| 99 | #endif | |
| 3a1dc8f1 SG |
100 | #if defined(CONFIG_4xx) |
| 101 | u32 uart_clk; | |
| 102 | #endif /* CONFIG_4xx */ | |
| 7e15d6db SG |
103 | #if defined(CONFIG_SYS_GT_6426x) |
| 104 | unsigned int mirror_hack[16]; | |
| 105 | #endif | |
| 923a662f SG |
106 | #ifdef CONFIG_SYS_FPGA_COUNT |
| 107 | unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; | |
| 108 | #endif | |
| a0d3c820 SG |
109 | #if defined(CONFIG_WD_MAX_RATE) |
| 110 | unsigned long long wdt_last; /* trace watch-dog triggering rate */ | |
| 111 | #endif | |
| acc2372d | 112 | #if defined(CONFIG_LWMON5) |
| 225ca83d SG |
113 | unsigned long kbd_status; |
| 114 | #endif | |
| c6731fe2 SG |
115 | }; |
| 116 | ||
| 2ab575e0 | 117 | #include <asm-generic/global_data.h> |
| 0157cedb WD |
118 | |
| 119 | #if 1 | |
| e7670f6c | 120 | #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") |
| 0157cedb WD |
121 | #else /* We could use plain global data, but the resulting code is bigger */ |
| 122 | #define XTRN_DECLARE_GLOBAL_DATA_PTR extern | |
| 123 | #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ | |
| 124 | gd_t *gd | |
| 125 | #endif | |
| 126 | ||
| 127 | #endif /* __ASM_GBL_DATA_H */ |