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3863585b
WD
1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Memory Functions
26 *
27 * Copied from FADS ROM, Dan Malek (dmalek@jlc.net)
28 */
29
30#include <common.h>
31#include <command.h>
2abbe075
WD
32#ifdef CONFIG_HAS_DATAFLASH
33#include <dataflash.h>
34#endif
d20a40de 35#include <hash.h>
a6e6fc61 36#include <watchdog.h>
0628ab8e 37#include <asm/io.h>
15a33e49
SG
38#include <linux/compiler.h>
39
40DECLARE_GLOBAL_DATA_PTR;
3863585b 41
8e169cc9
SG
42#ifndef CONFIG_SYS_MEMTEST_SCRATCH
43#define CONFIG_SYS_MEMTEST_SCRATCH 0
44#endif
45
54841ab5 46static int mod_mem(cmd_tbl_t *, int, int, int, char * const []);
3863585b
WD
47
48/* Display values from last command.
49 * Memory modify remembered values are different from display memory.
50 */
d6efe244
MF
51static uint dp_last_addr, dp_last_size;
52static uint dp_last_length = 0x40;
53static uint mm_last_addr, mm_last_size;
3863585b
WD
54
55static ulong base_address = 0;
56
57/* Memory Display
58 *
59 * Syntax:
60 * md{.b, .w, .l} {addr} {len}
61 */
62#define DISP_LINE_LEN 16
088f1b19 63static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 64{
27b207fd 65 ulong addr, length;
c95c4280
GL
66#if defined(CONFIG_HAS_DATAFLASH)
67 ulong nbytes, linebytes;
68#endif
27b207fd 69 int size;
3863585b
WD
70 int rc = 0;
71
72 /* We use the last specified parameters, unless new ones are
73 * entered.
74 */
75 addr = dp_last_addr;
76 size = dp_last_size;
77 length = dp_last_length;
78
47e26b1b 79 if (argc < 2)
4c12eeb8 80 return CMD_RET_USAGE;
3863585b
WD
81
82 if ((flag & CMD_FLAG_REPEAT) == 0) {
83 /* New command specified. Check for a size specification.
84 * Defaults to long if no or incorrect specification.
85 */
27b207fd
WD
86 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
87 return 1;
3863585b
WD
88
89 /* Address is specified since argc > 1
90 */
91 addr = simple_strtoul(argv[1], NULL, 16);
92 addr += base_address;
93
94 /* If another parameter, it is the length to display.
95 * Length is the number of objects, not number of bytes.
96 */
97 if (argc > 2)
98 length = simple_strtoul(argv[2], NULL, 16);
99 }
100
c95c4280 101#if defined(CONFIG_HAS_DATAFLASH)
3863585b
WD
102 /* Print the lines.
103 *
104 * We buffer all read data, so we can make sure data is read only
105 * once, and all accesses are with the specified bus width.
106 */
107 nbytes = length * size;
108 do {
109 char linebuf[DISP_LINE_LEN];
c95c4280 110 void* p;
3863585b 111 linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
2abbe075 112
c95c4280
GL
113 rc = read_dataflash(addr, (linebytes/size)*size, linebuf);
114 p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr;
115 print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size);
116
3863585b 117 nbytes -= linebytes;
c95c4280 118 addr += linebytes;
3863585b
WD
119 if (ctrlc()) {
120 rc = 1;
121 break;
122 }
123 } while (nbytes > 0);
c95c4280 124#else
4c727c77
MF
125
126# if defined(CONFIG_BLACKFIN)
127 /* See if we're trying to display L1 inst */
128 if (addr_bfin_on_chip_mem(addr)) {
129 char linebuf[DISP_LINE_LEN];
130 ulong linebytes, nbytes = length * size;
131 do {
132 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
133 memcpy(linebuf, (void *)addr, linebytes);
134 print_buffer(addr, linebuf, size, linebytes/size, DISP_LINE_LEN/size);
135
136 nbytes -= linebytes;
137 addr += linebytes;
138 if (ctrlc()) {
139 rc = 1;
140 break;
141 }
142 } while (nbytes > 0);
143 } else
144# endif
145
146 {
0628ab8e
SG
147 ulong bytes = size * length;
148 const void *buf = map_sysmem(addr, bytes);
149
4c727c77 150 /* Print the lines. */
0628ab8e
SG
151 print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
152 addr += bytes;
153 unmap_sysmem(buf);
4c727c77 154 }
c95c4280 155#endif
3863585b
WD
156
157 dp_last_addr = addr;
158 dp_last_length = length;
159 dp_last_size = size;
160 return (rc);
161}
162
088f1b19 163static int do_mem_mm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b
WD
164{
165 return mod_mem (cmdtp, 1, flag, argc, argv);
166}
088f1b19 167static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b
WD
168{
169 return mod_mem (cmdtp, 0, flag, argc, argv);
170}
171
088f1b19 172static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 173{
27b207fd
WD
174 ulong addr, writeval, count;
175 int size;
0628ab8e
SG
176 void *buf;
177 ulong bytes;
3863585b 178
47e26b1b 179 if ((argc < 3) || (argc > 4))
4c12eeb8 180 return CMD_RET_USAGE;
3863585b
WD
181
182 /* Check for size specification.
183 */
27b207fd
WD
184 if ((size = cmd_get_data_size(argv[0], 4)) < 1)
185 return 1;
3863585b
WD
186
187 /* Address is specified since argc > 1
188 */
189 addr = simple_strtoul(argv[1], NULL, 16);
190 addr += base_address;
191
192 /* Get the value to write.
193 */
194 writeval = simple_strtoul(argv[2], NULL, 16);
195
196 /* Count ? */
197 if (argc == 4) {
198 count = simple_strtoul(argv[3], NULL, 16);
199 } else {
200 count = 1;
201 }
202
0628ab8e
SG
203 bytes = size * count;
204 buf = map_sysmem(addr, bytes);
3863585b
WD
205 while (count-- > 0) {
206 if (size == 4)
0628ab8e 207 *((ulong *)buf) = (ulong)writeval;
3863585b 208 else if (size == 2)
0628ab8e 209 *((ushort *)buf) = (ushort)writeval;
3863585b 210 else
0628ab8e
SG
211 *((u_char *)buf) = (u_char)writeval;
212 buf += size;
3863585b 213 }
0628ab8e 214 unmap_sysmem(buf);
3863585b
WD
215 return 0;
216}
217
4aaf29b2 218#ifdef CONFIG_MX_CYCLIC
54841ab5 219int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
4aaf29b2
SR
220{
221 int i;
222 ulong count;
223
47e26b1b 224 if (argc < 4)
4c12eeb8 225 return CMD_RET_USAGE;
4aaf29b2
SR
226
227 count = simple_strtoul(argv[3], NULL, 10);
228
229 for (;;) {
230 do_mem_md (NULL, 0, 3, argv);
231
232 /* delay for <count> ms... */
233 for (i=0; i<count; i++)
234 udelay (1000);
235
236 /* check for ctrl-c to abort... */
237 if (ctrlc()) {
238 puts("Abort\n");
239 return 0;
240 }
241 }
242
243 return 0;
244}
245
54841ab5 246int do_mem_mwc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
4aaf29b2
SR
247{
248 int i;
249 ulong count;
250
47e26b1b 251 if (argc < 4)
4c12eeb8 252 return CMD_RET_USAGE;
4aaf29b2
SR
253
254 count = simple_strtoul(argv[3], NULL, 10);
255
256 for (;;) {
257 do_mem_mw (NULL, 0, 3, argv);
258
259 /* delay for <count> ms... */
260 for (i=0; i<count; i++)
261 udelay (1000);
262
263 /* check for ctrl-c to abort... */
264 if (ctrlc()) {
265 puts("Abort\n");
266 return 0;
267 }
268 }
269
270 return 0;
271}
272#endif /* CONFIG_MX_CYCLIC */
273
088f1b19 274static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 275{
0628ab8e 276 ulong addr1, addr2, count, ngood, bytes;
27b207fd 277 int size;
3863585b 278 int rcode = 0;
054ea170 279 const char *type;
0628ab8e 280 const void *buf1, *buf2, *base;
3863585b 281
47e26b1b 282 if (argc != 4)
4c12eeb8 283 return CMD_RET_USAGE;
3863585b
WD
284
285 /* Check for size specification.
286 */
27b207fd
WD
287 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
288 return 1;
054ea170 289 type = size == 4 ? "word" : size == 2 ? "halfword" : "byte";
3863585b
WD
290
291 addr1 = simple_strtoul(argv[1], NULL, 16);
292 addr1 += base_address;
293
294 addr2 = simple_strtoul(argv[2], NULL, 16);
295 addr2 += base_address;
296
297 count = simple_strtoul(argv[3], NULL, 16);
298
2abbe075
WD
299#ifdef CONFIG_HAS_DATAFLASH
300 if (addr_dataflash(addr1) | addr_dataflash(addr2)){
4b9206ed 301 puts ("Comparison with DataFlash space not supported.\n\r");
2abbe075
WD
302 return 0;
303 }
304#endif
305
4c727c77
MF
306#ifdef CONFIG_BLACKFIN
307 if (addr_bfin_on_chip_mem(addr1) || addr_bfin_on_chip_mem(addr2)) {
308 puts ("Comparison with L1 instruction memory not supported.\n\r");
309 return 0;
310 }
311#endif
312
0628ab8e
SG
313 bytes = size * count;
314 base = buf1 = map_sysmem(addr1, bytes);
315 buf2 = map_sysmem(addr2, bytes);
feb12a1f 316 for (ngood = 0; ngood < count; ++ngood) {
054ea170 317 ulong word1, word2;
3863585b 318 if (size == 4) {
0628ab8e
SG
319 word1 = *(ulong *)buf1;
320 word2 = *(ulong *)buf2;
054ea170 321 } else if (size == 2) {
0628ab8e
SG
322 word1 = *(ushort *)buf1;
323 word2 = *(ushort *)buf2;
054ea170 324 } else {
0628ab8e
SG
325 word1 = *(u_char *)buf1;
326 word2 = *(u_char *)buf2;
3863585b 327 }
054ea170 328 if (word1 != word2) {
0628ab8e
SG
329 ulong offset = buf1 - base;
330
054ea170 331 printf("%s at 0x%08lx (%#0*lx) != %s at 0x%08lx (%#0*lx)\n",
0628ab8e
SG
332 type, (ulong)(addr1 + offset), size, word1,
333 type, (ulong)(addr2 + offset), size, word2);
054ea170
MF
334 rcode = 1;
335 break;
3863585b 336 }
054ea170 337
0628ab8e
SG
338 buf1 += size;
339 buf2 += size;
eaadb44e
SR
340
341 /* reset watchdog from time to time */
feb12a1f 342 if ((ngood % (64 << 10)) == 0)
eaadb44e 343 WATCHDOG_RESET();
3863585b 344 }
0628ab8e
SG
345 unmap_sysmem(buf1);
346 unmap_sysmem(buf2);
3863585b 347
054ea170 348 printf("Total of %ld %s(s) were the same\n", ngood, type);
3863585b
WD
349 return rcode;
350}
351
088f1b19 352static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 353{
0628ab8e 354 ulong addr, dest, count, bytes;
27b207fd 355 int size;
0628ab8e
SG
356 const void *src;
357 void *buf;
3863585b 358
47e26b1b 359 if (argc != 4)
4c12eeb8 360 return CMD_RET_USAGE;
3863585b
WD
361
362 /* Check for size specification.
363 */
27b207fd
WD
364 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
365 return 1;
3863585b
WD
366
367 addr = simple_strtoul(argv[1], NULL, 16);
368 addr += base_address;
369
370 dest = simple_strtoul(argv[2], NULL, 16);
371 dest += base_address;
372
373 count = simple_strtoul(argv[3], NULL, 16);
374
375 if (count == 0) {
376 puts ("Zero length ???\n");
377 return 1;
378 }
379
6d0f6bcf 380#ifndef CONFIG_SYS_NO_FLASH
3863585b 381 /* check if we are copying to Flash */
2abbe075
WD
382 if ( (addr2info(dest) != NULL)
383#ifdef CONFIG_HAS_DATAFLASH
84d0c2f1 384 && (!addr_dataflash(dest))
2abbe075
WD
385#endif
386 ) {
3863585b
WD
387 int rc;
388
4b9206ed 389 puts ("Copy to Flash... ");
3863585b 390
77ddac94 391 rc = flash_write ((char *)addr, dest, count*size);
3863585b
WD
392 if (rc != 0) {
393 flash_perror (rc);
394 return (1);
395 }
396 puts ("done\n");
397 return 0;
398 }
399#endif
400
2abbe075
WD
401#ifdef CONFIG_HAS_DATAFLASH
402 /* Check if we are copying from RAM or Flash to DataFlash */
403 if (addr_dataflash(dest) && !addr_dataflash(addr)){
404 int rc;
405
4b9206ed 406 puts ("Copy to DataFlash... ");
2abbe075
WD
407
408 rc = write_dataflash (dest, addr, count*size);
409
410 if (rc != 1) {
411 dataflash_perror (rc);
412 return (1);
413 }
414 puts ("done\n");
415 return 0;
416 }
8bde7f77 417
2abbe075 418 /* Check if we are copying from DataFlash to RAM */
880cc438 419 if (addr_dataflash(addr) && !addr_dataflash(dest)
6d0f6bcf 420#ifndef CONFIG_SYS_NO_FLASH
880cc438
SP
421 && (addr2info(dest) == NULL)
422#endif
423 ){
5779d8d9
WD
424 int rc;
425 rc = read_dataflash(addr, count * size, (char *) dest);
426 if (rc != 1) {
d4ca31c4
WD
427 dataflash_perror (rc);
428 return (1);
429 }
2abbe075
WD
430 return 0;
431 }
432
433 if (addr_dataflash(addr) && addr_dataflash(dest)){
4b9206ed 434 puts ("Unsupported combination of source/destination.\n\r");
2abbe075
WD
435 return 1;
436 }
437#endif
438
4c727c77
MF
439#ifdef CONFIG_BLACKFIN
440 /* See if we're copying to/from L1 inst */
441 if (addr_bfin_on_chip_mem(dest) || addr_bfin_on_chip_mem(addr)) {
442 memcpy((void *)dest, (void *)addr, count * size);
443 return 0;
444 }
445#endif
446
0628ab8e 447 bytes = size * count;
53237afe 448 buf = map_sysmem(dest, bytes);
0628ab8e 449 src = map_sysmem(addr, bytes);
3863585b
WD
450 while (count-- > 0) {
451 if (size == 4)
0628ab8e 452 *((ulong *)buf) = *((ulong *)src);
3863585b 453 else if (size == 2)
0628ab8e 454 *((ushort *)buf) = *((ushort *)src);
3863585b 455 else
0628ab8e
SG
456 *((u_char *)buf) = *((u_char *)src);
457 src += size;
458 buf += size;
eaadb44e
SR
459
460 /* reset watchdog from time to time */
461 if ((count % (64 << 10)) == 0)
462 WATCHDOG_RESET();
3863585b
WD
463 }
464 return 0;
465}
466
088f1b19
KP
467static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc,
468 char * const argv[])
3863585b
WD
469{
470 if (argc > 1) {
471 /* Set new base address.
472 */
473 base_address = simple_strtoul(argv[1], NULL, 16);
474 }
475 /* Print the current base address.
476 */
477 printf("Base Address: 0x%08lx\n", base_address);
478 return 0;
479}
480
088f1b19
KP
481static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc,
482 char * const argv[])
3863585b 483{
0628ab8e 484 ulong addr, length, i, bytes;
27b207fd 485 int size;
3863585b
WD
486 volatile uint *longp;
487 volatile ushort *shortp;
488 volatile u_char *cp;
0628ab8e 489 const void *buf;
3863585b 490
47e26b1b 491 if (argc < 3)
4c12eeb8 492 return CMD_RET_USAGE;
3863585b 493
85de63e2
RD
494 /*
495 * Check for a size specification.
3863585b
WD
496 * Defaults to long if no or incorrect specification.
497 */
27b207fd
WD
498 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
499 return 1;
3863585b
WD
500
501 /* Address is always specified.
502 */
503 addr = simple_strtoul(argv[1], NULL, 16);
504
505 /* Length is the number of objects, not number of bytes.
506 */
507 length = simple_strtoul(argv[2], NULL, 16);
508
0628ab8e
SG
509 bytes = size * length;
510 buf = map_sysmem(addr, bytes);
511
3863585b
WD
512 /* We want to optimize the loops to run as fast as possible.
513 * If we have only one object, just run infinite loops.
514 */
515 if (length == 1) {
516 if (size == 4) {
0628ab8e 517 longp = (uint *)buf;
3863585b
WD
518 for (;;)
519 i = *longp;
520 }
521 if (size == 2) {
0628ab8e 522 shortp = (ushort *)buf;
3863585b
WD
523 for (;;)
524 i = *shortp;
525 }
0628ab8e 526 cp = (u_char *)buf;
3863585b
WD
527 for (;;)
528 i = *cp;
529 }
530
531 if (size == 4) {
532 for (;;) {
0628ab8e 533 longp = (uint *)buf;
3863585b
WD
534 i = length;
535 while (i-- > 0)
f3b3c3df 536 *longp++;
3863585b
WD
537 }
538 }
539 if (size == 2) {
540 for (;;) {
0628ab8e 541 shortp = (ushort *)buf;
3863585b
WD
542 i = length;
543 while (i-- > 0)
f3b3c3df 544 *shortp++;
3863585b
WD
545 }
546 }
547 for (;;) {
0628ab8e 548 cp = (u_char *)buf;
3863585b
WD
549 i = length;
550 while (i-- > 0)
f3b3c3df 551 *cp++;
3863585b 552 }
0628ab8e 553 unmap_sysmem(buf);
92765f42
SG
554
555 return 0;
3863585b
WD
556}
557
56523f12 558#ifdef CONFIG_LOOPW
54841ab5 559int do_mem_loopw (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
56523f12 560{
0628ab8e 561 ulong addr, length, i, data, bytes;
56523f12
WD
562 int size;
563 volatile uint *longp;
564 volatile ushort *shortp;
565 volatile u_char *cp;
0628ab8e 566 void *buf;
81050926 567
47e26b1b 568 if (argc < 4)
4c12eeb8 569 return CMD_RET_USAGE;
56523f12 570
85de63e2
RD
571 /*
572 * Check for a size specification.
56523f12
WD
573 * Defaults to long if no or incorrect specification.
574 */
575 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
576 return 1;
577
578 /* Address is always specified.
579 */
580 addr = simple_strtoul(argv[1], NULL, 16);
581
582 /* Length is the number of objects, not number of bytes.
583 */
584 length = simple_strtoul(argv[2], NULL, 16);
585
586 /* data to write */
587 data = simple_strtoul(argv[3], NULL, 16);
81050926 588
0628ab8e
SG
589 bytes = size * length;
590 buf = map_sysmem(addr, bytes);
591
56523f12
WD
592 /* We want to optimize the loops to run as fast as possible.
593 * If we have only one object, just run infinite loops.
594 */
595 if (length == 1) {
596 if (size == 4) {
0628ab8e 597 longp = (uint *)buf;
56523f12
WD
598 for (;;)
599 *longp = data;
600 }
601 if (size == 2) {
0628ab8e 602 shortp = (ushort *)buf;
56523f12
WD
603 for (;;)
604 *shortp = data;
605 }
0628ab8e 606 cp = (u_char *)buf;
56523f12
WD
607 for (;;)
608 *cp = data;
609 }
610
611 if (size == 4) {
612 for (;;) {
0628ab8e 613 longp = (uint *)buf;
56523f12
WD
614 i = length;
615 while (i-- > 0)
616 *longp++ = data;
617 }
618 }
619 if (size == 2) {
620 for (;;) {
0628ab8e 621 shortp = (ushort *)buf;
56523f12
WD
622 i = length;
623 while (i-- > 0)
624 *shortp++ = data;
625 }
626 }
627 for (;;) {
0628ab8e 628 cp = (u_char *)buf;
56523f12
WD
629 i = length;
630 while (i-- > 0)
631 *cp++ = data;
632 }
633}
634#endif /* CONFIG_LOOPW */
635
68149e94 636#ifdef CONFIG_CMD_MEMTEST
5512d5b0
SG
637static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr,
638 vu_long *dummy)
3863585b 639{
c9638f50 640 vu_long *addr;
c9638f50
SG
641 ulong errs = 0;
642 ulong val, readback;
643 int j;
c9638f50
SG
644 vu_long offset;
645 vu_long test_offset;
646 vu_long pattern;
647 vu_long temp;
648 vu_long anti_pattern;
649 vu_long num_words;
3863585b
WD
650 static const ulong bitpattern[] = {
651 0x00000001, /* single bit */
652 0x00000003, /* two adjacent bits */
653 0x00000007, /* three adjacent bits */
654 0x0000000F, /* four adjacent bits */
655 0x00000005, /* two non-adjacent bits */
656 0x00000015, /* three non-adjacent bits */
657 0x00000055, /* four non-adjacent bits */
658 0xaaaaaaaa, /* alternating 1/0 */
659 };
3863585b 660
5512d5b0 661 num_words = (end_addr - start_addr) / sizeof(vu_long);
8c86bbe0 662
7ecbd4d7
SG
663 /*
664 * Data line test: write a pattern to the first
665 * location, write the 1's complement to a 'parking'
666 * address (changes the state of the data bus so a
667 * floating bus doesn't give a false OK), and then
668 * read the value back. Note that we read it back
669 * into a variable because the next time we read it,
670 * it might be right (been there, tough to explain to
671 * the quality guys why it prints a failure when the
672 * "is" and "should be" are obviously the same in the
673 * error message).
674 *
675 * Rather than exhaustively testing, we test some
676 * patterns by shifting '1' bits through a field of
677 * '0's and '0' bits through a field of '1's (i.e.
678 * pattern and ~pattern).
679 */
5512d5b0 680 addr = buf;
7ecbd4d7
SG
681 for (j = 0; j < sizeof(bitpattern) / sizeof(bitpattern[0]); j++) {
682 val = bitpattern[j];
683 for (; val != 0; val <<= 1) {
5512d5b0 684 *addr = val;
c9638f50 685 *dummy = ~val; /* clear the test data off the bus */
3863585b 686 readback = *addr;
7ecbd4d7 687 if (readback != val) {
c9638f50
SG
688 printf("FAILURE (data line): "
689 "expected %08lx, actual %08lx\n",
690 val, readback);
691 errs++;
c44d4386 692 if (ctrlc())
51209b1f 693 return -1;
3863585b
WD
694 }
695 *addr = ~val;
696 *dummy = val;
697 readback = *addr;
c9638f50
SG
698 if (readback != ~val) {
699 printf("FAILURE (data line): "
700 "Is %08lx, should be %08lx\n",
701 readback, ~val);
702 errs++;
c44d4386 703 if (ctrlc())
51209b1f 704 return -1;
3863585b 705 }
3863585b 706 }
7ecbd4d7 707 }
3863585b 708
7ecbd4d7
SG
709 /*
710 * Based on code whose Original Author and Copyright
711 * information follows: Copyright (c) 1998 by Michael
712 * Barr. This software is placed into the public
713 * domain and may be used for any purpose. However,
714 * this notice must not be changed or removed and no
715 * warranty is either expressed or implied by its
716 * publication or distribution.
717 */
3863585b 718
7ecbd4d7
SG
719 /*
720 * Address line test
721
722 * Description: Test the address bus wiring in a
723 * memory region by performing a walking
724 * 1's test on the relevant bits of the
725 * address and checking for aliasing.
726 * This test will find single-bit
727 * address failures such as stuck-high,
728 * stuck-low, and shorted pins. The base
729 * address and size of the region are
730 * selected by the caller.
731
732 * Notes: For best results, the selected base
733 * address should have enough LSB 0's to
734 * guarantee single address bit changes.
735 * For example, to test a 64-Kbyte
736 * region, select a base address on a
737 * 64-Kbyte boundary. Also, select the
738 * region size as a power-of-two if at
739 * all possible.
740 *
741 * Returns: 0 if the test succeeds, 1 if the test fails.
742 */
7ecbd4d7
SG
743 pattern = (vu_long) 0xaaaaaaaa;
744 anti_pattern = (vu_long) 0x55555555;
3863585b 745
5512d5b0 746 debug("%s:%d: length = 0x%.8lx\n", __func__, __LINE__, num_words);
7ecbd4d7
SG
747 /*
748 * Write the default pattern at each of the
749 * power-of-two offsets.
750 */
5512d5b0
SG
751 for (offset = 1; offset < num_words; offset <<= 1)
752 addr[offset] = pattern;
3863585b 753
7ecbd4d7
SG
754 /*
755 * Check for address bits stuck high.
756 */
757 test_offset = 0;
5512d5b0 758 addr[test_offset] = anti_pattern;
3863585b 759
5512d5b0
SG
760 for (offset = 1; offset < num_words; offset <<= 1) {
761 temp = addr[offset];
7ecbd4d7 762 if (temp != pattern) {
c9638f50 763 printf("\nFAILURE: Address bit stuck high @ 0x%.8lx:"
3863585b 764 " expected 0x%.8lx, actual 0x%.8lx\n",
5512d5b0 765 start_addr + offset, pattern, temp);
87b22b77 766 errs++;
c44d4386 767 if (ctrlc())
7ecbd4d7 768 return -1;
3863585b 769 }
7ecbd4d7 770 }
5512d5b0 771 addr[test_offset] = pattern;
7ecbd4d7 772 WATCHDOG_RESET();
3863585b 773
7ecbd4d7
SG
774 /*
775 * Check for addr bits stuck low or shorted.
776 */
5512d5b0
SG
777 for (test_offset = 1; test_offset < num_words; test_offset <<= 1) {
778 addr[test_offset] = anti_pattern;
3863585b 779
5512d5b0
SG
780 for (offset = 1; offset < num_words; offset <<= 1) {
781 temp = addr[offset];
3863585b 782 if ((temp != pattern) && (offset != test_offset)) {
7ecbd4d7
SG
783 printf("\nFAILURE: Address bit stuck low or"
784 " shorted @ 0x%.8lx: expected 0x%.8lx,"
785 " actual 0x%.8lx\n",
5512d5b0 786 start_addr + offset, pattern, temp);
7ecbd4d7 787 errs++;
c44d4386 788 if (ctrlc())
7ecbd4d7 789 return -1;
3863585b 790 }
3863585b 791 }
5512d5b0 792 addr[test_offset] = pattern;
7ecbd4d7 793 }
3863585b 794
7ecbd4d7
SG
795 /*
796 * Description: Test the integrity of a physical
797 * memory device by performing an
798 * increment/decrement test over the
799 * entire region. In the process every
800 * storage bit in the device is tested
801 * as a zero and a one. The base address
802 * and the size of the region are
803 * selected by the caller.
804 *
805 * Returns: 0 if the test succeeds, 1 if the test fails.
806 */
5512d5b0 807 num_words++;
3863585b 808
7ecbd4d7
SG
809 /*
810 * Fill memory with a known pattern.
811 */
812 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
813 WATCHDOG_RESET();
5512d5b0 814 addr[offset] = pattern;
7ecbd4d7 815 }
3863585b 816
7ecbd4d7
SG
817 /*
818 * Check each location and invert it for the second pass.
819 */
820 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
821 WATCHDOG_RESET();
5512d5b0 822 temp = addr[offset];
7ecbd4d7 823 if (temp != pattern) {
c9638f50 824 printf("\nFAILURE (read/write) @ 0x%.8lx:"
3863585b 825 " expected 0x%.8lx, actual 0x%.8lx)\n",
5512d5b0 826 start_addr + offset, pattern, temp);
87b22b77 827 errs++;
c44d4386 828 if (ctrlc())
51209b1f 829 return -1;
3863585b
WD
830 }
831
7ecbd4d7 832 anti_pattern = ~pattern;
5512d5b0 833 addr[offset] = anti_pattern;
7ecbd4d7
SG
834 }
835
836 /*
837 * Check each location for the inverted pattern and zero it.
838 */
839 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
840 WATCHDOG_RESET();
841 anti_pattern = ~pattern;
5512d5b0 842 temp = addr[offset];
7ecbd4d7 843 if (temp != anti_pattern) {
c9638f50 844 printf("\nFAILURE (read/write): @ 0x%.8lx:"
3863585b 845 " expected 0x%.8lx, actual 0x%.8lx)\n",
5512d5b0 846 start_addr + offset, anti_pattern, temp);
87b22b77 847 errs++;
c44d4386 848 if (ctrlc())
51209b1f 849 return -1;
3863585b 850 }
5512d5b0 851 addr[offset] = 0;
7ecbd4d7 852 }
51209b1f
SG
853
854 return 0;
c9638f50
SG
855}
856
5512d5b0
SG
857static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
858 vu_long pattern, int iteration)
c9638f50 859{
5512d5b0 860 vu_long *end;
c9638f50 861 vu_long *addr;
c9638f50 862 ulong errs = 0;
5512d5b0 863 ulong incr, length;
c9638f50 864 ulong val, readback;
3863585b 865
51209b1f 866 /* Alternate the pattern */
3863585b 867 incr = 1;
51209b1f
SG
868 if (iteration & 1) {
869 incr = -incr;
870 /*
871 * Flip the pattern each time to make lots of zeros and
872 * then, the next time, lots of ones. We decrement
873 * the "negative" patterns and increment the "positive"
874 * patterns to preserve this feature.
875 */
876 if (pattern & 0x80000000)
877 pattern = -pattern; /* complement & increment */
878 else
879 pattern = ~pattern;
880 }
5512d5b0
SG
881 length = (end_addr - start_addr) / sizeof(ulong);
882 end = buf + length;
7ecbd4d7
SG
883 printf("\rPattern %08lX Writing..."
884 "%12s"
885 "\b\b\b\b\b\b\b\b\b\b",
886 pattern, "");
3863585b 887
5512d5b0 888 for (addr = buf, val = pattern; addr < end; addr++) {
7ecbd4d7
SG
889 WATCHDOG_RESET();
890 *addr = val;
891 val += incr;
892 }
3863585b 893
7ecbd4d7 894 puts("Reading...");
3863585b 895
5512d5b0 896 for (addr = buf, val = pattern; addr < end; addr++) {
7ecbd4d7
SG
897 WATCHDOG_RESET();
898 readback = *addr;
899 if (readback != val) {
5512d5b0
SG
900 ulong offset = addr - buf;
901
7ecbd4d7
SG
902 printf("\nMem error @ 0x%08X: "
903 "found %08lX, expected %08lX\n",
5512d5b0
SG
904 (uint)(uintptr_t)(start_addr + offset),
905 readback, val);
7ecbd4d7 906 errs++;
c44d4386 907 if (ctrlc())
7ecbd4d7 908 return -1;
3863585b 909 }
7ecbd4d7
SG
910 val += incr;
911 }
3863585b 912
51209b1f 913 return 0;
c9638f50
SG
914}
915
916/*
917 * Perform a memory test. A more complete alternative test can be
918 * configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until
919 * interrupted by ctrl-c or by a failure of one of the sub-tests.
920 */
921static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
922 char * const argv[])
923{
8c86bbe0 924 ulong start, end;
5512d5b0 925 vu_long *buf, *dummy;
c9638f50
SG
926 int iteration_limit;
927 int ret;
51209b1f 928 ulong errs = 0; /* number of errors, or -1 if interrupted */
c9638f50 929 ulong pattern;
51209b1f 930 int iteration;
c9638f50
SG
931#if defined(CONFIG_SYS_ALT_MEMTEST)
932 const int alt_test = 1;
933#else
934 const int alt_test = 0;
3863585b 935#endif
c9638f50
SG
936
937 if (argc > 1)
8c86bbe0 938 start = simple_strtoul(argv[1], NULL, 16);
c9638f50 939 else
8c86bbe0 940 start = CONFIG_SYS_MEMTEST_START;
c9638f50
SG
941
942 if (argc > 2)
8c86bbe0 943 end = simple_strtoul(argv[2], NULL, 16);
c9638f50 944 else
8c86bbe0 945 end = CONFIG_SYS_MEMTEST_END;
c9638f50
SG
946
947 if (argc > 3)
948 pattern = (ulong)simple_strtoul(argv[3], NULL, 16);
949 else
950 pattern = 0;
951
952 if (argc > 4)
953 iteration_limit = (ulong)simple_strtoul(argv[4], NULL, 16);
954 else
955 iteration_limit = 0;
956
8c86bbe0
SG
957 printf("Testing %08x ... %08x:\n", (uint)start, (uint)end);
958 debug("%s:%d: start %#08lx end %#08lx\n", __func__, __LINE__,
959 start, end);
51209b1f 960
5512d5b0
SG
961 buf = map_sysmem(start, end - start);
962 dummy = map_sysmem(CONFIG_SYS_MEMTEST_SCRATCH, sizeof(vu_long));
51209b1f
SG
963 for (iteration = 0;
964 !iteration_limit || iteration < iteration_limit;
965 iteration++) {
966 if (ctrlc()) {
51209b1f
SG
967 errs = -1UL;
968 break;
969 }
970
971 printf("Iteration: %6d\r", iteration + 1);
972 debug("\n");
5512d5b0
SG
973 if (alt_test) {
974 errs = mem_test_alt(buf, start, end, dummy);
975 } else {
976 errs = mem_test_quick(buf, start, end, pattern,
977 iteration);
978 }
979 if (errs == -1UL)
980 break;
981 }
982
983 /*
984 * Work-around for eldk-4.2 which gives this warning if we try to
985 * case in the unmap_sysmem() call:
986 * warning: initialization discards qualifiers from pointer target type
987 */
988 {
989 void *vbuf = (void *)buf;
990 void *vdummy = (void *)dummy;
991
992 unmap_sysmem(vbuf);
993 unmap_sysmem(vdummy);
51209b1f
SG
994 }
995
996 if (errs == -1UL) {
c44d4386
SG
997 /* Memory test was aborted - write a newline to finish off */
998 putc('\n');
51209b1f
SG
999 ret = 1;
1000 } else {
1001 printf("Tested %d iteration(s) with %lu errors.\n",
1002 iteration, errs);
1003 ret = errs != 0;
1004 }
c9638f50
SG
1005
1006 return ret; /* not reached */
3863585b 1007}
a2681707 1008#endif /* CONFIG_CMD_MEMTEST */
3863585b
WD
1009
1010/* Modify memory.
1011 *
1012 * Syntax:
1013 * mm{.b, .w, .l} {addr}
1014 * nm{.b, .w, .l} {addr}
1015 */
1016static int
54841ab5 1017mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
3863585b 1018{
27b207fd
WD
1019 ulong addr, i;
1020 int nbytes, size;
0628ab8e 1021 void *ptr = NULL;
3863585b 1022
47e26b1b 1023 if (argc != 2)
4c12eeb8 1024 return CMD_RET_USAGE;
3863585b
WD
1025
1026#ifdef CONFIG_BOOT_RETRY_TIME
1027 reset_cmd_timeout(); /* got a good command to get here */
1028#endif
1029 /* We use the last specified parameters, unless new ones are
1030 * entered.
1031 */
1032 addr = mm_last_addr;
1033 size = mm_last_size;
1034
1035 if ((flag & CMD_FLAG_REPEAT) == 0) {
1036 /* New command specified. Check for a size specification.
1037 * Defaults to long if no or incorrect specification.
1038 */
27b207fd
WD
1039 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
1040 return 1;
3863585b
WD
1041
1042 /* Address is specified since argc > 1
1043 */
1044 addr = simple_strtoul(argv[1], NULL, 16);
1045 addr += base_address;
1046 }
1047
2abbe075
WD
1048#ifdef CONFIG_HAS_DATAFLASH
1049 if (addr_dataflash(addr)){
4b9206ed 1050 puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
2abbe075
WD
1051 return 0;
1052 }
1053#endif
1054
4c727c77
MF
1055#ifdef CONFIG_BLACKFIN
1056 if (addr_bfin_on_chip_mem(addr)) {
1057 puts ("Can't modify L1 instruction in place. Use cp instead.\n\r");
1058 return 0;
1059 }
1060#endif
1061
3863585b
WD
1062 /* Print the address, followed by value. Then accept input for
1063 * the next value. A non-converted value exits.
1064 */
1065 do {
0628ab8e 1066 ptr = map_sysmem(addr, size);
3863585b
WD
1067 printf("%08lx:", addr);
1068 if (size == 4)
0628ab8e 1069 printf(" %08x", *((uint *)ptr));
3863585b 1070 else if (size == 2)
0628ab8e 1071 printf(" %04x", *((ushort *)ptr));
3863585b 1072 else
0628ab8e 1073 printf(" %02x", *((u_char *)ptr));
3863585b
WD
1074
1075 nbytes = readline (" ? ");
1076 if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) {
1077 /* <CR> pressed as only input, don't modify current
1078 * location and move to next. "-" pressed will go back.
1079 */
1080 if (incrflag)
1081 addr += nbytes ? -size : size;
1082 nbytes = 1;
1083#ifdef CONFIG_BOOT_RETRY_TIME
1084 reset_cmd_timeout(); /* good enough to not time out */
1085#endif
1086 }
1087#ifdef CONFIG_BOOT_RETRY_TIME
1088 else if (nbytes == -2) {
1089 break; /* timed out, exit the command */
1090 }
1091#endif
1092 else {
1093 char *endp;
1094 i = simple_strtoul(console_buffer, &endp, 16);
1095 nbytes = endp - console_buffer;
1096 if (nbytes) {
1097#ifdef CONFIG_BOOT_RETRY_TIME
1098 /* good enough to not time out
1099 */
1100 reset_cmd_timeout();
1101#endif
1102 if (size == 4)
0628ab8e 1103 *((uint *)ptr) = i;
3863585b 1104 else if (size == 2)
0628ab8e 1105 *((ushort *)ptr) = i;
3863585b 1106 else
0628ab8e 1107 *((u_char *)ptr) = i;
3863585b
WD
1108 if (incrflag)
1109 addr += size;
1110 }
1111 }
1112 } while (nbytes);
0628ab8e
SG
1113 if (ptr)
1114 unmap_sysmem(ptr);
3863585b
WD
1115
1116 mm_last_addr = addr;
1117 mm_last_size = size;
1118 return 0;
1119}
1120
710b9938
MF
1121#ifdef CONFIG_CMD_CRC32
1122
088f1b19 1123static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 1124{
d20a40de 1125 int flags = 0;
c26e454d 1126 int ac;
54841ab5 1127 char * const *av;
c26e454d 1128
d20a40de 1129 if (argc < 3)
4c12eeb8 1130 return CMD_RET_USAGE;
c26e454d
WD
1131
1132 av = argv + 1;
1133 ac = argc - 1;
d20a40de 1134#ifdef CONFIG_HASH_VERIFY
c26e454d 1135 if (strcmp(*av, "-v") == 0) {
d20a40de 1136 flags |= HASH_FLAG_VERIFY;
c26e454d
WD
1137 av++;
1138 ac--;
c26e454d 1139 }
d20a40de 1140#endif
c26e454d 1141
d20a40de 1142 return hash_command("crc32", flags, cmdtp, flag, ac, av);
c26e454d 1143}
c26e454d 1144
710b9938
MF
1145#endif
1146
8bde7f77 1147/**************************************************/
0d498393 1148U_BOOT_CMD(
53677ef1 1149 md, 3, 1, do_mem_md,
2fb2604d 1150 "memory display",
a89c33db 1151 "[.b, .w, .l] address [# of objects]"
8bde7f77
WD
1152);
1153
1154
0d498393 1155U_BOOT_CMD(
53677ef1 1156 mm, 2, 1, do_mem_mm,
a89c33db
WD
1157 "memory modify (auto-incrementing address)",
1158 "[.b, .w, .l] address"
8bde7f77
WD
1159);
1160
1161
0d498393 1162U_BOOT_CMD(
53677ef1 1163 nm, 2, 1, do_mem_nm,
2fb2604d 1164 "memory modify (constant address)",
a89c33db 1165 "[.b, .w, .l] address"
8bde7f77
WD
1166);
1167
0d498393 1168U_BOOT_CMD(
53677ef1 1169 mw, 4, 1, do_mem_mw,
2fb2604d 1170 "memory write (fill)",
a89c33db 1171 "[.b, .w, .l] address value [count]"
8bde7f77
WD
1172);
1173
0d498393 1174U_BOOT_CMD(
53677ef1 1175 cp, 4, 1, do_mem_cp,
2fb2604d 1176 "memory copy",
a89c33db 1177 "[.b, .w, .l] source target count"
8bde7f77
WD
1178);
1179
0d498393 1180U_BOOT_CMD(
53677ef1 1181 cmp, 4, 1, do_mem_cmp,
2fb2604d 1182 "memory compare",
a89c33db 1183 "[.b, .w, .l] addr1 addr2 count"
8bde7f77
WD
1184);
1185
710b9938
MF
1186#ifdef CONFIG_CMD_CRC32
1187
c26e454d
WD
1188#ifndef CONFIG_CRC32_VERIFY
1189
0d498393 1190U_BOOT_CMD(
53677ef1 1191 crc32, 4, 1, do_mem_crc,
2fb2604d 1192 "checksum calculation",
a89c33db 1193 "address count [addr]\n - compute CRC32 checksum [save at addr]"
8bde7f77
WD
1194);
1195
c26e454d
WD
1196#else /* CONFIG_CRC32_VERIFY */
1197
1198U_BOOT_CMD(
53677ef1 1199 crc32, 5, 1, do_mem_crc,
2fb2604d 1200 "checksum calculation",
c26e454d 1201 "address count [addr]\n - compute CRC32 checksum [save at addr]\n"
a89c33db 1202 "-v address count crc\n - verify crc of memory area"
c26e454d
WD
1203);
1204
1205#endif /* CONFIG_CRC32_VERIFY */
1206
710b9938
MF
1207#endif
1208
15a33e49
SG
1209#ifdef CONFIG_CMD_MEMINFO
1210__weak void board_show_dram(ulong size)
1211{
1212 puts("DRAM: ");
1213 print_size(size, "\n");
1214}
1215
1216static int do_mem_info(cmd_tbl_t *cmdtp, int flag, int argc,
1217 char * const argv[])
1218{
1219 board_show_dram(gd->ram_size);
1220
1221 return 0;
1222}
1223#endif
1224
0d498393 1225U_BOOT_CMD(
53677ef1 1226 base, 2, 1, do_mem_base,
2fb2604d 1227 "print or set address offset",
8bde7f77 1228 "\n - print address offset for memory commands\n"
a89c33db 1229 "base off\n - set address offset for memory commands to 'off'"
8bde7f77
WD
1230);
1231
0d498393 1232U_BOOT_CMD(
53677ef1 1233 loop, 3, 1, do_mem_loop,
2fb2604d 1234 "infinite loop on address range",
a89c33db 1235 "[.b, .w, .l] address number_of_objects"
8bde7f77
WD
1236);
1237
56523f12
WD
1238#ifdef CONFIG_LOOPW
1239U_BOOT_CMD(
53677ef1 1240 loopw, 4, 1, do_mem_loopw,
2fb2604d 1241 "infinite write loop on address range",
a89c33db 1242 "[.b, .w, .l] address number_of_objects data_to_write"
56523f12
WD
1243);
1244#endif /* CONFIG_LOOPW */
1245
a2681707 1246#ifdef CONFIG_CMD_MEMTEST
0d498393 1247U_BOOT_CMD(
b6fc6fd4 1248 mtest, 5, 1, do_mem_mtest,
a89c33db
WD
1249 "simple RAM read/write test",
1250 "[start [end [pattern [iterations]]]]"
8bde7f77 1251);
a2681707 1252#endif /* CONFIG_CMD_MEMTEST */
8bde7f77 1253
4aaf29b2
SR
1254#ifdef CONFIG_MX_CYCLIC
1255U_BOOT_CMD(
53677ef1 1256 mdc, 4, 1, do_mem_mdc,
2fb2604d 1257 "memory display cyclic",
a89c33db 1258 "[.b, .w, .l] address count delay(ms)"
4aaf29b2
SR
1259);
1260
1261U_BOOT_CMD(
53677ef1 1262 mwc, 4, 1, do_mem_mwc,
2fb2604d 1263 "memory write cyclic",
a89c33db 1264 "[.b, .w, .l] address value delay(ms)"
4aaf29b2
SR
1265);
1266#endif /* CONFIG_MX_CYCLIC */
15a33e49
SG
1267
1268#ifdef CONFIG_CMD_MEMINFO
1269U_BOOT_CMD(
1270 meminfo, 3, 1, do_mem_info,
1271 "display memory information",
1272 ""
1273);
1274#endif