[thirdparty/openssl.git] / crypto / ppccap.c

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <setjmp.h>
#include <signal.h>
#include <unistd.h>
#if defined(__linux) || defined(_AIX)
# include <sys/utsname.h>
#endif
#if defined(_AIX53)     /* defined even on post-5.3 */
# include <sys/systemcfg.h>
# if !defined(__power_set)
#  define __power_set(a) (_system_configuration.implementation & (a))
# endif
#endif
#include <openssl/crypto.h>
#include <openssl/bn.h>

#include "ppc_arch.h"

unsigned int OPENSSL_ppccap_P = 0;

static sigset_t all_masked;

#ifdef OPENSSL_BN_ASM_MONT
int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
                const BN_ULONG *np, const BN_ULONG *n0, int num)
{
    int bn_mul_mont_fpu64(BN_ULONG *rp, const BN_ULONG *ap,
                          const BN_ULONG *bp, const BN_ULONG *np,
                          const BN_ULONG *n0, int num);
    int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
                        const BN_ULONG *np, const BN_ULONG *n0, int num);

    if (sizeof(size_t) == 4) {
# if 1 || (defined(__APPLE__) && defined(__MACH__))
        if (num >= 8 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64))
            return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
# else
        /*
         * boundary of 32 was experimentally determined on Linux 2.6.22,
         * might have to be adjusted on AIX...
         */
        if (num >= 32 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) {
            sigset_t oset;
            int ret;

            sigprocmask(SIG_SETMASK, &all_masked, &oset);
            ret = bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
            sigprocmask(SIG_SETMASK, &oset, NULL);

            return ret;
        }
# endif
    } else if ((OPENSSL_ppccap_P & PPC_FPU64))
        /*
         * this is a "must" on POWER6, but run-time detection is not
         * implemented yet...
         */
        return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);

    return bn_mul_mont_int(rp, ap, bp, np, n0, num);
}
#endif

void sha256_block_p8(void *ctx, const void *inp, size_t len);
void sha256_block_ppc(void *ctx, const void *inp, size_t len);
void sha256_block_data_order(void *ctx, const void *inp, size_t len)
{
    OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
        sha256_block_ppc(ctx, inp, len);
}

void sha512_block_p8(void *ctx, const void *inp, size_t len);
void sha512_block_ppc(void *ctx, const void *inp, size_t len);
void sha512_block_data_order(void *ctx, const void *inp, size_t len)
{
    OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
        sha512_block_ppc(ctx, inp, len);
}

#ifndef OPENSSL_NO_CHACHA
void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
                        size_t len, const unsigned int key[8],
                        const unsigned int counter[4]);
void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
                        size_t len, const unsigned int key[8],
                        const unsigned int counter[4]);
void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
                    size_t len, const unsigned int key[8],
                    const unsigned int counter[4])
{
    OPENSSL_ppccap_P & PPC_ALTIVEC
        ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
        : ChaCha20_ctr32_int(out, inp, len, key, counter);
}
#endif

#ifndef OPENSSL_NO_POLY1305
void poly1305_init_int(void *ctx, const unsigned char key[16]);
void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
                         unsigned int padbit);
void poly1305_emit(void *ctx, unsigned char mac[16],
                       const unsigned int nonce[4]);
void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
                         unsigned int padbit);
void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
                       const unsigned int nonce[4]);
int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
{
    if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
        poly1305_init_fpu(ctx,key);
        func[0] = poly1305_blocks_fpu;
        func[1] = poly1305_emit_fpu;
    } else {
        poly1305_init_int(ctx,key);
        func[0] = poly1305_blocks;
        func[1] = poly1305_emit;
    }
    return 1;
}
#endif

static sigjmp_buf ill_jmp;
static void ill_handler(int sig)
{
    siglongjmp(ill_jmp, sig);
}

void OPENSSL_fpu_probe(void);
void OPENSSL_ppc64_probe(void);
void OPENSSL_altivec_probe(void);
void OPENSSL_crypto207_probe(void);
void OPENSSL_madd300_probe(void);

/*
 * Use a weak reference to getauxval() so we can use it if it is available
 * but don't break the build if it is not. Note that this is *link-time*
 * feature detection, not *run-time*. In other words if we link with
 * symbol present, it's expected to be present even at run-time.
 */
#if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
#else
static unsigned long (*getauxval) (unsigned long) = NULL;
#endif

/* I wish <sys/auxv.h> was universally available */
#define HWCAP                   16      /* AT_HWCAP */
#define HWCAP_PPC64             (1U << 30)
#define HWCAP_ALTIVEC           (1U << 28)
#define HWCAP_FPU               (1U << 27)
#define HWCAP_POWER6_EXT        (1U << 9)
#define HWCAP_VSX               (1U << 7)

#define HWCAP2                  26      /* AT_HWCAP2 */
#define HWCAP_VEC_CRYPTO        (1U << 25)
#define HWCAP_ARCH_3_00         (1U << 23)

# if defined(__GNUC__) && __GNUC__>=2
__attribute__ ((constructor))
# endif
void OPENSSL_cpuid_setup(void)
{
    char *e;
    struct sigaction ill_oact, ill_act;
    sigset_t oset;
    static int trigger = 0;

    if (trigger)
        return;
    trigger = 1;

    if ((e = getenv("OPENSSL_ppccap"))) {
        OPENSSL_ppccap_P = strtoul(e, NULL, 0);
        return;
    }

    OPENSSL_ppccap_P = 0;

#if defined(_AIX)
    OPENSSL_ppccap_P |= PPC_FPU;

    if (sizeof(size_t) == 4) {
        struct utsname uts;
# if defined(_SC_AIX_KERNEL_BITMODE)
        if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
            return;
# endif
        if (uname(&uts) != 0 || atoi(uts.version) < 6)
            return;
    }

# if defined(__power_set)
    /*
     * Value used in __power_set is a single-bit 1<<n one denoting
     * specific processor class. Incidentally 0xffffffff<<n can be
     * used to denote specific processor and its successors.
     */
    if (sizeof(size_t) == 4) {
        /* In 32-bit case PPC_FPU64 is always fastest [if option] */
        if (__power_set(0xffffffffU<<13))       /* POWER5 and later */
            OPENSSL_ppccap_P |= PPC_FPU64;
    } else {
        /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
        if (__power_set(0x1U<<14))              /* POWER6 */
            OPENSSL_ppccap_P |= PPC_FPU64;
    }

    if (__power_set(0xffffffffU<<14))           /* POWER6 and later */
        OPENSSL_ppccap_P |= PPC_ALTIVEC;

    if (__power_set(0xffffffffU<<16))           /* POWER8 and later */
        OPENSSL_ppccap_P |= PPC_CRYPTO207;

    if (__power_set(0xffffffffU<<17))           /* POWER9 and later */
        OPENSSL_ppccap_P |= PPC_MADD300;

    return;
# endif
#endif

    if (getauxval != NULL) {
        unsigned long hwcap = getauxval(HWCAP);

        if (hwcap & HWCAP_FPU) {
            OPENSSL_ppccap_P |= PPC_FPU;

            if (sizeof(size_t) == 4) {
                /* In 32-bit case PPC_FPU64 is always fastest [if option] */
                if (hwcap & HWCAP_PPC64)
                    OPENSSL_ppccap_P |= PPC_FPU64;
            } else {
                /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
                if (hwcap & HWCAP_POWER6_EXT)
                    OPENSSL_ppccap_P |= PPC_FPU64;
            }
        }

        if (hwcap & HWCAP_ALTIVEC) {
            OPENSSL_ppccap_P |= PPC_ALTIVEC;

            if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
                OPENSSL_ppccap_P |= PPC_CRYPTO207;
        }

        if (hwcap & HWCAP_ARCH_3_00) {
            OPENSSL_ppccap_P |= PPC_MADD300;
        }

        return;
    }

    sigfillset(&all_masked);
    sigdelset(&all_masked, SIGILL);
    sigdelset(&all_masked, SIGTRAP);
#ifdef SIGEMT
    sigdelset(&all_masked, SIGEMT);
#endif
    sigdelset(&all_masked, SIGFPE);
    sigdelset(&all_masked, SIGBUS);
    sigdelset(&all_masked, SIGSEGV);

    memset(&ill_act, 0, sizeof(ill_act));
    ill_act.sa_handler = ill_handler;
    ill_act.sa_mask = all_masked;

    sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
    sigaction(SIGILL, &ill_act, &ill_oact);

    if (sigsetjmp(ill_jmp,1) == 0) {
        OPENSSL_fpu_probe();
        OPENSSL_ppccap_P |= PPC_FPU;

        if (sizeof(size_t) == 4) {
#ifdef __linux
            struct utsname uts;
            if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
#endif
                if (sigsetjmp(ill_jmp, 1) == 0) {
                    OPENSSL_ppc64_probe();
                    OPENSSL_ppccap_P |= PPC_FPU64;
                }
        } else {
            /*
             * Wanted code detecting POWER6 CPU and setting PPC_FPU64
             */
        }
    }

    if (sigsetjmp(ill_jmp, 1) == 0) {
        OPENSSL_altivec_probe();
        OPENSSL_ppccap_P |= PPC_ALTIVEC;
        if (sigsetjmp(ill_jmp, 1) == 0) {
            OPENSSL_crypto207_probe();
            OPENSSL_ppccap_P |= PPC_CRYPTO207;
        }
    }

    if (sigsetjmp(ill_jmp, 1) == 0) {
        OPENSSL_madd300_probe();
        OPENSSL_ppccap_P |= PPC_MADD300;
    }

    sigaction(SIGILL, &ill_oact, NULL);
    sigprocmask(SIG_SETMASK, &oset, NULL);
}
Commit	Line	Data
b4b48a10 AP	1	#include <stdio.h>
	2	#include <stdlib.h>
	3	#include <string.h>
	4	#include <setjmp.h>
	5	#include <signal.h>
fd054957	6	#include <unistd.h>
d5630dd6	7	#if defined(__linux) \|\| defined(_AIX)
0f113f3e	8	# include <sys/utsname.h>
78c3e205	9	#endif
2688d999 AP	10	#if defined(_AIX53) /* defined even on post-5.3 */
	11	# include <sys/systemcfg.h>
	12	# if !defined(__power_set)
	13	# define __power_set(a) (_system_configuration.implementation & (a))
	14	# endif
	15	#endif
11252459	16	#include <openssl/crypto.h>
b4b48a10 AP	17	#include <openssl/bn.h>
b4b48a10 AP	18
0e716d92	19	#include "ppc_arch.h"
b4b48a10	20
07f3e4f3	21	unsigned int OPENSSL_ppccap_P = 0;
b4b48a10 AP	22
	23	static sigset_t all_masked;
	24
d741cf22	25	#ifdef OPENSSL_BN_ASM_MONT
0f113f3e MC	26	int bn_mul_mont(BN_ULONG rp, const BN_ULONG ap, const BN_ULONG *bp,
	27	const BN_ULONG np, const BN_ULONG n0, int num)
	28	{
	29	int bn_mul_mont_fpu64(BN_ULONG rp, const BN_ULONG ap,
	30	const BN_ULONG bp, const BN_ULONG np,
	31	const BN_ULONG *n0, int num);
	32	int bn_mul_mont_int(BN_ULONG rp, const BN_ULONG ap, const BN_ULONG *bp,
	33	const BN_ULONG np, const BN_ULONG n0, int num);
	34
	35	if (sizeof(size_t) == 4) {
	36	# if 1 \|\| (defined(__APPLE__) && defined(__MACH__))
	37	if (num >= 8 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64))
	38	return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
	39	# else
	40	/*
	41	* boundary of 32 was experimentally determined on Linux 2.6.22,
	42	* might have to be adjusted on AIX...
	43	*/
	44	if (num >= 32 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) {
	45	sigset_t oset;
	46	int ret;
	47
	48	sigprocmask(SIG_SETMASK, &all_masked, &oset);
	49	ret = bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
	50	sigprocmask(SIG_SETMASK, &oset, NULL);
	51
	52	return ret;
	53	}
	54	# endif
	55	} else if ((OPENSSL_ppccap_P & PPC_FPU64))
	56	/*
	57	* this is a "must" on POWER6, but run-time detection is not
	58	* implemented yet...
	59	*/
	60	return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
	61
	62	return bn_mul_mont_int(rp, ap, bp, np, n0, num);
	63	}
d741cf22	64	#endif
b4b48a10	65
0f113f3e MC	66	void sha256_block_p8(void ctx, const void inp, size_t len);
	67	void sha256_block_ppc(void ctx, const void inp, size_t len);
	68	void sha256_block_data_order(void ctx, const void inp, size_t len)
	69	{
	70	OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
	71	sha256_block_ppc(ctx, inp, len);
	72	}
	73
	74	void sha512_block_p8(void ctx, const void inp, size_t len);
	75	void sha512_block_ppc(void ctx, const void inp, size_t len);
	76	void sha512_block_data_order(void ctx, const void inp, size_t len)
	77	{
	78	OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
	79	sha512_block_ppc(ctx, inp, len);
	80	}
cd1922cd	81
fa79c543	82	#ifndef OPENSSL_NO_CHACHA
b3214008 AP	83	void ChaCha20_ctr32_int(unsigned char out, const unsigned char inp,
	84	size_t len, const unsigned int key[8],
	85	const unsigned int counter[4]);
	86	void ChaCha20_ctr32_vmx(unsigned char out, const unsigned char inp,
	87	size_t len, const unsigned int key[8],
	88	const unsigned int counter[4]);
	89	void ChaCha20_ctr32(unsigned char out, const unsigned char inp,
	90	size_t len, const unsigned int key[8],
	91	const unsigned int counter[4])
	92	{
	93	OPENSSL_ppccap_P & PPC_ALTIVEC
	94	? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
	95	: ChaCha20_ctr32_int(out, inp, len, key, counter);
	96	}
fa79c543	97	#endif
b3214008	98
fa79c543	99	#ifndef OPENSSL_NO_POLY1305
b3214008 AP	100	void poly1305_init_int(void *ctx, const unsigned char key[16]);
	101	void poly1305_blocks(void ctx, const unsigned char inp, size_t len,
	102	unsigned int padbit);
	103	void poly1305_emit(void *ctx, unsigned char mac[16],
	104	const unsigned int nonce[4]);
	105	void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
	106	void poly1305_blocks_fpu(void ctx, const unsigned char inp, size_t len,
	107	unsigned int padbit);
	108	void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
	109	const unsigned int nonce[4]);
	110	int poly1305_init(void ctx, const unsigned char key[16], void func[2])
	111	{
	112	if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
	113	poly1305_init_fpu(ctx,key);
	114	func[0] = poly1305_blocks_fpu;
	115	func[1] = poly1305_emit_fpu;
	116	} else {
	117	poly1305_init_int(ctx,key);
	118	func[0] = poly1305_blocks;
	119	func[1] = poly1305_emit;
	120	}
	121	return 1;
	122	}
fa79c543	123	#endif
b3214008	124
b4b48a10	125	static sigjmp_buf ill_jmp;
0f113f3e MC	126	static void ill_handler(int sig)
	127	{
	128	siglongjmp(ill_jmp, sig);
	129	}
b4b48a10	130
2688d999	131	void OPENSSL_fpu_probe(void);
70b76d39	132	void OPENSSL_ppc64_probe(void);
fd054957	133	void OPENSSL_altivec_probe(void);
de51e830	134	void OPENSSL_crypto207_probe(void);
53385e1f	135	void OPENSSL_madd300_probe(void);
70b76d39	136
2688d999 AP	137	/*
	138	* Use a weak reference to getauxval() so we can use it if it is available
	139	* but don't break the build if it is not. Note that this is link-time
	140	* feature detection, not run-time. In other words if we link with
	141	* symbol present, it's expected to be present even at run-time.
	142	*/
	143	#if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
	144	extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
	145	#else
	146	static unsigned long (*getauxval) (unsigned long) = NULL;
	147	#endif
	148
	149	/* I wish <sys/auxv.h> was universally available */
	150	#define HWCAP 16 /* AT_HWCAP */
	151	#define HWCAP_PPC64 (1U << 30)
	152	#define HWCAP_ALTIVEC (1U << 28)
	153	#define HWCAP_FPU (1U << 27)
	154	#define HWCAP_POWER6_EXT (1U << 9)
	155	#define HWCAP_VSX (1U << 7)
	156
	157	#define HWCAP2 26 /* AT_HWCAP2 */
	158	#define HWCAP_VEC_CRYPTO (1U << 25)
e0e53282	159	#define HWCAP_ARCH_3_00 (1U << 23)
2688d999 AP	160
	161	# if defined(__GNUC__) && __GNUC__>=2
	162	__attribute__ ((constructor))
	163	# endif
b4b48a10	164	void OPENSSL_cpuid_setup(void)
0f113f3e MC	165	{
	166	char *e;
	167	struct sigaction ill_oact, ill_act;
	168	sigset_t oset;
	169	static int trigger = 0;
	170
	171	if (trigger)
	172	return;
	173	trigger = 1;
	174
0f113f3e MC	175	if ((e = getenv("OPENSSL_ppccap"))) {
	176	OPENSSL_ppccap_P = strtoul(e, NULL, 0);
	177	return;
	178	}
b4b48a10	179
0f113f3e	180	OPENSSL_ppccap_P = 0;
6415dd7b	181
fd054957	182	#if defined(_AIX)
2688d999 AP	183	OPENSSL_ppccap_P \|= PPC_FPU;
2688d999 AP	184
0f113f3e MC	185	if (sizeof(size_t) == 4) {
0f113f3e MC	186	struct utsname uts;
fd054957	187	# if defined(_SC_AIX_KERNEL_BITMODE)
0f113f3e MC	188	if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
0f113f3e MC	189	return;
fd054957	190	# endif
0f113f3e MC	191	if (uname(&uts) != 0 \|\| atoi(uts.version) < 6)
	192	return;
	193	}
2688d999 AP	194
	195	# if defined(__power_set)
	196	/*
	197	* Value used in __power_set is a single-bit 1<<n one denoting
	198	* specific processor class. Incidentally 0xffffffff<<n can be
	199	* used to denote specific processor and its successors.
	200	*/
	201	if (sizeof(size_t) == 4) {
	202	/* In 32-bit case PPC_FPU64 is always fastest [if option] */
	203	if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
	204	OPENSSL_ppccap_P \|= PPC_FPU64;
	205	} else {
	206	/* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
	207	if (__power_set(0x1U<<14)) /* POWER6 */
	208	OPENSSL_ppccap_P \|= PPC_FPU64;
	209	}
	210
	211	if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
	212	OPENSSL_ppccap_P \|= PPC_ALTIVEC;
	213
	214	if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
	215	OPENSSL_ppccap_P \|= PPC_CRYPTO207;
	216
e0e53282 AP	217	if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
	218	OPENSSL_ppccap_P \|= PPC_MADD300;
	219
2688d999 AP	220	return;
	221	# endif
	222	#endif
	223
	224	if (getauxval != NULL) {
	225	unsigned long hwcap = getauxval(HWCAP);
	226
	227	if (hwcap & HWCAP_FPU) {
dccd20d1	228	OPENSSL_ppccap_P \|= PPC_FPU;
2688d999 AP	229
	230	if (sizeof(size_t) == 4) {
	231	/* In 32-bit case PPC_FPU64 is always fastest [if option] */
	232	if (hwcap & HWCAP_PPC64)
	233	OPENSSL_ppccap_P \|= PPC_FPU64;
	234	} else {
	235	/* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
	236	if (hwcap & HWCAP_POWER6_EXT)
	237	OPENSSL_ppccap_P \|= PPC_FPU64;
	238	}
	239	}
	240
	241	if (hwcap & HWCAP_ALTIVEC) {
	242	OPENSSL_ppccap_P \|= PPC_ALTIVEC;
	243
	244	if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
	245	OPENSSL_ppccap_P \|= PPC_CRYPTO207;
	246	}
	247
e0e53282 AP	248	if (hwcap & HWCAP_ARCH_3_00) {
	249	OPENSSL_ppccap_P \|= PPC_MADD300;
	250	}
	251
2688d999 AP	252	return;
	253	}
	254
	255	sigfillset(&all_masked);
	256	sigdelset(&all_masked, SIGILL);
	257	sigdelset(&all_masked, SIGTRAP);
	258	#ifdef SIGEMT
	259	sigdelset(&all_masked, SIGEMT);
fd054957	260	#endif
2688d999 AP	261	sigdelset(&all_masked, SIGFPE);
	262	sigdelset(&all_masked, SIGBUS);
	263	sigdelset(&all_masked, SIGSEGV);
fd054957	264
0f113f3e MC	265	memset(&ill_act, 0, sizeof(ill_act));
	266	ill_act.sa_handler = ill_handler;
	267	ill_act.sa_mask = all_masked;
6415dd7b	268
0f113f3e MC	269	sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
0f113f3e MC	270	sigaction(SIGILL, &ill_act, &ill_oact);
6415dd7b	271
2688d999 AP	272	if (sigsetjmp(ill_jmp,1) == 0) {
	273	OPENSSL_fpu_probe();
	274	OPENSSL_ppccap_P \|= PPC_FPU;
	275
	276	if (sizeof(size_t) == 4) {
78c3e205	277	#ifdef __linux
2688d999 AP	278	struct utsname uts;
2688d999 AP	279	if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
78c3e205	280	#endif
2688d999 AP	281	if (sigsetjmp(ill_jmp, 1) == 0) {
	282	OPENSSL_ppc64_probe();
	283	OPENSSL_ppccap_P \|= PPC_FPU64;
	284	}
	285	} else {
	286	/*
	287	* Wanted code detecting POWER6 CPU and setting PPC_FPU64
	288	*/
	289	}
0f113f3e MC	290	}
	291
	292	if (sigsetjmp(ill_jmp, 1) == 0) {
	293	OPENSSL_altivec_probe();
	294	OPENSSL_ppccap_P \|= PPC_ALTIVEC;
	295	if (sigsetjmp(ill_jmp, 1) == 0) {
	296	OPENSSL_crypto207_probe();
	297	OPENSSL_ppccap_P \|= PPC_CRYPTO207;
	298	}
	299	}
	300
e0e53282 AP	301	if (sigsetjmp(ill_jmp, 1) == 0) {
	302	OPENSSL_madd300_probe();
	303	OPENSSL_ppccap_P \|= PPC_MADD300;
	304	}
	305
0f113f3e MC	306	sigaction(SIGILL, &ill_oact, NULL);
	307	sigprocmask(SIG_SETMASK, &oset, NULL);
	308	}