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ARM64 assembly pack: add ThunderX2 results.
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6aa36e8e 1#! /usr/bin/env perl
6738bf14 2# Copyright 2014-2018 The OpenSSL Project Authors. All Rights Reserved.
6aa36e8e 3#
a598ed0d 4# Licensed under the Apache License 2.0 (the "License"). You may not use
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5# this file except in compliance with the License. You can obtain a copy
6# in the file LICENSE in the source distribution or at
7# https://www.openssl.org/source/license.html
8
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9# ====================================================================
10# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
11# project. The module is, however, dual licensed under OpenSSL and
12# CRYPTOGAMS licenses depending on where you obtain it. For further
13# details see http://www.openssl.org/~appro/cryptogams/.
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14#
15# Permission to use under GPLv2 terms is granted.
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16# ====================================================================
17#
18# SHA256/512 for ARMv8.
19#
20# Performance in cycles per processed byte and improvement coefficient
21# over code generated with "default" compiler:
22#
23# SHA256-hw SHA256(*) SHA512
24# Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**))
94376ccc 25# Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***))
0f777aeb 26# Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***))
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27# Denver 2.01 10.5 (+26%) 6.70 (+8%)
28# X-Gene 20.0 (+100%) 12.8 (+300%(***))
05ef4d19 29# Mongoose 2.36 13.0 (+50%) 8.36 (+33%)
75331623 30# Kryo 1.92 17.4 (+30%) 11.2 (+8%)
6465321e 31# ThunderX2 2.54 13.2 (+40%) 8.40 (+18%)
609b0852 32#
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33# (*) Software SHA256 results are of lesser relevance, presented
34# mostly for informational purposes.
35# (**) The result is a trade-off: it's possible to improve it by
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36# 10% (or by 1 cycle per round), but at the cost of 20% loss
37# on Cortex-A53 (or by 4 cycles per round).
38# (***) Super-impressive coefficients over gcc-generated code are
39# indication of some compiler "pathology", most notably code
46f4e1be 40# generated with -mgeneral-regs-only is significantly faster
94376ccc 41# and the gap is only 40-90%.
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42#
43# October 2016.
44#
45# Originally it was reckoned that it makes no sense to implement NEON
46# version of SHA256 for 64-bit processors. This is because performance
47# improvement on most wide-spread Cortex-A5x processors was observed
48# to be marginal, same on Cortex-A53 and ~10% on A57. But then it was
49# observed that 32-bit NEON SHA256 performs significantly better than
50# 64-bit scalar version on *some* of the more recent processors. As
51# result 64-bit NEON version of SHA256 was added to provide best
52# all-round performance. For example it executes ~30% faster on X-Gene
53# and Mongoose. [For reference, NEON version of SHA512 is bound to
54# deliver much less improvement, likely *negative* on Cortex-A5x.
55# Which is why NEON support is limited to SHA256.]
ddb6b965 56
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57$output=pop;
58$flavour=pop;
9b05cbc3 59
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60if ($flavour && $flavour ne "void") {
61 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
62 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
63 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
64 die "can't locate arm-xlate.pl";
9b05cbc3 65
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66 open OUT,"| \"$^X\" $xlate $flavour $output";
67 *STDOUT=*OUT;
68} else {
69 open STDOUT,">$output";
70}
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71
72if ($output =~ /512/) {
73 $BITS=512;
74 $SZ=8;
75 @Sigma0=(28,34,39);
76 @Sigma1=(14,18,41);
77 @sigma0=(1, 8, 7);
78 @sigma1=(19,61, 6);
79 $rounds=80;
80 $reg_t="x";
81} else {
82 $BITS=256;
83 $SZ=4;
84 @Sigma0=( 2,13,22);
85 @Sigma1=( 6,11,25);
86 @sigma0=( 7,18, 3);
87 @sigma1=(17,19,10);
88 $rounds=64;
89 $reg_t="w";
90}
91
92$func="sha${BITS}_block_data_order";
93
94($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30));
95
96@X=map("$reg_t$_",(3..15,0..2));
97@V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27));
98($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28));
99
100sub BODY_00_xx {
101my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
102my $j=($i+1)&15;
103my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]);
104 $T0=@X[$i+3] if ($i<11);
105
106$code.=<<___ if ($i<16);
32bbb62e 107#ifndef __AARCH64EB__
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108 rev @X[$i],@X[$i] // $i
109#endif
110___
111$code.=<<___ if ($i<13 && ($i&1));
112 ldp @X[$i+1],@X[$i+2],[$inp],#2*$SZ
113___
114$code.=<<___ if ($i==13);
115 ldp @X[14],@X[15],[$inp]
116___
117$code.=<<___ if ($i>=14);
118 ldr @X[($i-11)&15],[sp,#`$SZ*(($i-11)%4)`]
119___
120$code.=<<___ if ($i>0 && $i<16);
121 add $a,$a,$t1 // h+=Sigma0(a)
122___
123$code.=<<___ if ($i>=11);
124 str @X[($i-8)&15],[sp,#`$SZ*(($i-8)%4)`]
125___
126# While ARMv8 specifies merged rotate-n-logical operation such as
127# 'eor x,y,z,ror#n', it was found to negatively affect performance
128# on Apple A7. The reason seems to be that it requires even 'y' to
129# be available earlier. This means that such merged instruction is
130# not necessarily best choice on critical path... On the other hand
131# Cortex-A5x handles merged instructions much better than disjoint
132# rotate and logical... See (**) footnote above.
133$code.=<<___ if ($i<15);
134 ror $t0,$e,#$Sigma1[0]
135 add $h,$h,$t2 // h+=K[i]
136 eor $T0,$e,$e,ror#`$Sigma1[2]-$Sigma1[1]`
137 and $t1,$f,$e
138 bic $t2,$g,$e
139 add $h,$h,@X[$i&15] // h+=X[i]
140 orr $t1,$t1,$t2 // Ch(e,f,g)
141 eor $t2,$a,$b // a^b, b^c in next round
142 eor $t0,$t0,$T0,ror#$Sigma1[1] // Sigma1(e)
143 ror $T0,$a,#$Sigma0[0]
144 add $h,$h,$t1 // h+=Ch(e,f,g)
145 eor $t1,$a,$a,ror#`$Sigma0[2]-$Sigma0[1]`
146 add $h,$h,$t0 // h+=Sigma1(e)
147 and $t3,$t3,$t2 // (b^c)&=(a^b)
148 add $d,$d,$h // d+=h
149 eor $t3,$t3,$b // Maj(a,b,c)
150 eor $t1,$T0,$t1,ror#$Sigma0[1] // Sigma0(a)
151 add $h,$h,$t3 // h+=Maj(a,b,c)
152 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
153 //add $h,$h,$t1 // h+=Sigma0(a)
154___
155$code.=<<___ if ($i>=15);
156 ror $t0,$e,#$Sigma1[0]
157 add $h,$h,$t2 // h+=K[i]
158 ror $T1,@X[($j+1)&15],#$sigma0[0]
159 and $t1,$f,$e
160 ror $T2,@X[($j+14)&15],#$sigma1[0]
161 bic $t2,$g,$e
162 ror $T0,$a,#$Sigma0[0]
163 add $h,$h,@X[$i&15] // h+=X[i]
164 eor $t0,$t0,$e,ror#$Sigma1[1]
165 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1]
166 orr $t1,$t1,$t2 // Ch(e,f,g)
167 eor $t2,$a,$b // a^b, b^c in next round
168 eor $t0,$t0,$e,ror#$Sigma1[2] // Sigma1(e)
169 eor $T0,$T0,$a,ror#$Sigma0[1]
170 add $h,$h,$t1 // h+=Ch(e,f,g)
171 and $t3,$t3,$t2 // (b^c)&=(a^b)
172 eor $T2,$T2,@X[($j+14)&15],ror#$sigma1[1]
173 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1])
174 add $h,$h,$t0 // h+=Sigma1(e)
175 eor $t3,$t3,$b // Maj(a,b,c)
176 eor $t1,$T0,$a,ror#$Sigma0[2] // Sigma0(a)
177 eor $T2,$T2,@X[($j+14)&15],lsr#$sigma1[2] // sigma1(X[i+14])
178 add @X[$j],@X[$j],@X[($j+9)&15]
179 add $d,$d,$h // d+=h
180 add $h,$h,$t3 // h+=Maj(a,b,c)
181 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
182 add @X[$j],@X[$j],$T1
183 add $h,$h,$t1 // h+=Sigma0(a)
184 add @X[$j],@X[$j],$T2
185___
186 ($t2,$t3)=($t3,$t2);
187}
188
189$code.=<<___;
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190#ifndef __KERNEL__
191# include "arm_arch.h"
db42bb44 192.extern OPENSSL_armcap_P
413b6a82 193#endif
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194
195.text
196
197.globl $func
198.type $func,%function
199.align 6
200$func:
413b6a82 201#ifndef __KERNEL__
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202 adrp x16,OPENSSL_armcap_P
203 ldr w16,[x16,#:lo12:OPENSSL_armcap_P]
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204___
205$code.=<<___ if ($SZ==4);
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206 tst w16,#ARMV8_SHA256
207 b.ne .Lv8_entry
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208 tst w16,#ARMV7_NEON
209 b.ne .Lneon_entry
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210___
211$code.=<<___ if ($SZ==8);
212 tst w16,#ARMV8_SHA512
213 b.ne .Lv8_entry
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214___
215$code.=<<___;
af0fcf7b 216#endif
9a18aae5 217 .inst 0xd503233f // paciasp
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218 stp x29,x30,[sp,#-128]!
219 add x29,sp,#0
220
221 stp x19,x20,[sp,#16]
222 stp x21,x22,[sp,#32]
223 stp x23,x24,[sp,#48]
224 stp x25,x26,[sp,#64]
225 stp x27,x28,[sp,#80]
226 sub sp,sp,#4*$SZ
227
228 ldp $A,$B,[$ctx] // load context
229 ldp $C,$D,[$ctx,#2*$SZ]
230 ldp $E,$F,[$ctx,#4*$SZ]
231 add $num,$inp,$num,lsl#`log(16*$SZ)/log(2)` // end of input
232 ldp $G,$H,[$ctx,#6*$SZ]
9b05cbc3 233 adr $Ktbl,.LK$BITS
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234 stp $ctx,$num,[x29,#96]
235
236.Loop:
237 ldp @X[0],@X[1],[$inp],#2*$SZ
238 ldr $t2,[$Ktbl],#$SZ // *K++
239 eor $t3,$B,$C // magic seed
240 str $inp,[x29,#112]
241___
242for ($i=0;$i<16;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
243$code.=".Loop_16_xx:\n";
244for (;$i<32;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
245$code.=<<___;
246 cbnz $t2,.Loop_16_xx
247
248 ldp $ctx,$num,[x29,#96]
249 ldr $inp,[x29,#112]
250 sub $Ktbl,$Ktbl,#`$SZ*($rounds+1)` // rewind
251
252 ldp @X[0],@X[1],[$ctx]
253 ldp @X[2],@X[3],[$ctx,#2*$SZ]
254 add $inp,$inp,#14*$SZ // advance input pointer
255 ldp @X[4],@X[5],[$ctx,#4*$SZ]
256 add $A,$A,@X[0]
257 ldp @X[6],@X[7],[$ctx,#6*$SZ]
258 add $B,$B,@X[1]
259 add $C,$C,@X[2]
260 add $D,$D,@X[3]
261 stp $A,$B,[$ctx]
262 add $E,$E,@X[4]
263 add $F,$F,@X[5]
264 stp $C,$D,[$ctx,#2*$SZ]
265 add $G,$G,@X[6]
266 add $H,$H,@X[7]
267 cmp $inp,$num
268 stp $E,$F,[$ctx,#4*$SZ]
269 stp $G,$H,[$ctx,#6*$SZ]
270 b.ne .Loop
271
272 ldp x19,x20,[x29,#16]
273 add sp,sp,#4*$SZ
274 ldp x21,x22,[x29,#32]
275 ldp x23,x24,[x29,#48]
276 ldp x25,x26,[x29,#64]
277 ldp x27,x28,[x29,#80]
278 ldp x29,x30,[sp],#128
9a18aae5 279 .inst 0xd50323bf // autiasp
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280 ret
281.size $func,.-$func
282
283.align 6
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284.type .LK$BITS,%object
285.LK$BITS:
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286___
287$code.=<<___ if ($SZ==8);
288 .quad 0x428a2f98d728ae22,0x7137449123ef65cd
289 .quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
290 .quad 0x3956c25bf348b538,0x59f111f1b605d019
291 .quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118
292 .quad 0xd807aa98a3030242,0x12835b0145706fbe
293 .quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
294 .quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1
295 .quad 0x9bdc06a725c71235,0xc19bf174cf692694
296 .quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3
297 .quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
298 .quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483
299 .quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
300 .quad 0x983e5152ee66dfab,0xa831c66d2db43210
301 .quad 0xb00327c898fb213f,0xbf597fc7beef0ee4
302 .quad 0xc6e00bf33da88fc2,0xd5a79147930aa725
303 .quad 0x06ca6351e003826f,0x142929670a0e6e70
304 .quad 0x27b70a8546d22ffc,0x2e1b21385c26c926
305 .quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
306 .quad 0x650a73548baf63de,0x766a0abb3c77b2a8
307 .quad 0x81c2c92e47edaee6,0x92722c851482353b
308 .quad 0xa2bfe8a14cf10364,0xa81a664bbc423001
309 .quad 0xc24b8b70d0f89791,0xc76c51a30654be30
310 .quad 0xd192e819d6ef5218,0xd69906245565a910
311 .quad 0xf40e35855771202a,0x106aa07032bbd1b8
312 .quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53
313 .quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
314 .quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
315 .quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
316 .quad 0x748f82ee5defb2fc,0x78a5636f43172f60
317 .quad 0x84c87814a1f0ab72,0x8cc702081a6439ec
318 .quad 0x90befffa23631e28,0xa4506cebde82bde9
319 .quad 0xbef9a3f7b2c67915,0xc67178f2e372532b
320 .quad 0xca273eceea26619c,0xd186b8c721c0c207
321 .quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
322 .quad 0x06f067aa72176fba,0x0a637dc5a2c898a6
323 .quad 0x113f9804bef90dae,0x1b710b35131c471b
324 .quad 0x28db77f523047d84,0x32caab7b40c72493
325 .quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
326 .quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
327 .quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817
328 .quad 0 // terminator
329___
330$code.=<<___ if ($SZ==4);
331 .long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
332 .long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
333 .long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
334 .long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
335 .long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
336 .long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
337 .long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
338 .long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
339 .long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
340 .long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
341 .long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
342 .long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
343 .long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
344 .long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
345 .long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
346 .long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
347 .long 0 //terminator
348___
349$code.=<<___;
9b05cbc3 350.size .LK$BITS,.-.LK$BITS
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351.asciz "SHA$BITS block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
352.align 2
353___
354
355if ($SZ==4) {
356my $Ktbl="x3";
357
358my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2));
359my @MSG=map("v$_.16b",(4..7));
360my ($W0,$W1)=("v16.4s","v17.4s");
361my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b");
362
363$code.=<<___;
413b6a82 364#ifndef __KERNEL__
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365.type sha256_block_armv8,%function
366.align 6
367sha256_block_armv8:
368.Lv8_entry:
369 stp x29,x30,[sp,#-16]!
370 add x29,sp,#0
371
372 ld1.32 {$ABCD,$EFGH},[$ctx]
9b05cbc3 373 adr $Ktbl,.LK256
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374
375.Loop_hw:
376 ld1 {@MSG[0]-@MSG[3]},[$inp],#64
377 sub $num,$num,#1
378 ld1.32 {$W0},[$Ktbl],#16
379 rev32 @MSG[0],@MSG[0]
380 rev32 @MSG[1],@MSG[1]
381 rev32 @MSG[2],@MSG[2]
382 rev32 @MSG[3],@MSG[3]
383 orr $ABCD_SAVE,$ABCD,$ABCD // offload
384 orr $EFGH_SAVE,$EFGH,$EFGH
385___
386for($i=0;$i<12;$i++) {
387$code.=<<___;
388 ld1.32 {$W1},[$Ktbl],#16
389 add.i32 $W0,$W0,@MSG[0]
390 sha256su0 @MSG[0],@MSG[1]
391 orr $abcd,$ABCD,$ABCD
392 sha256h $ABCD,$EFGH,$W0
393 sha256h2 $EFGH,$abcd,$W0
394 sha256su1 @MSG[0],@MSG[2],@MSG[3]
395___
396 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
397}
398$code.=<<___;
399 ld1.32 {$W1},[$Ktbl],#16
400 add.i32 $W0,$W0,@MSG[0]
401 orr $abcd,$ABCD,$ABCD
402 sha256h $ABCD,$EFGH,$W0
403 sha256h2 $EFGH,$abcd,$W0
404
405 ld1.32 {$W0},[$Ktbl],#16
406 add.i32 $W1,$W1,@MSG[1]
407 orr $abcd,$ABCD,$ABCD
408 sha256h $ABCD,$EFGH,$W1
409 sha256h2 $EFGH,$abcd,$W1
410
411 ld1.32 {$W1},[$Ktbl]
412 add.i32 $W0,$W0,@MSG[2]
413 sub $Ktbl,$Ktbl,#$rounds*$SZ-16 // rewind
414 orr $abcd,$ABCD,$ABCD
415 sha256h $ABCD,$EFGH,$W0
416 sha256h2 $EFGH,$abcd,$W0
417
418 add.i32 $W1,$W1,@MSG[3]
419 orr $abcd,$ABCD,$ABCD
420 sha256h $ABCD,$EFGH,$W1
421 sha256h2 $EFGH,$abcd,$W1
422
423 add.i32 $ABCD,$ABCD,$ABCD_SAVE
424 add.i32 $EFGH,$EFGH,$EFGH_SAVE
425
426 cbnz $num,.Loop_hw
427
428 st1.32 {$ABCD,$EFGH},[$ctx]
429
430 ldr x29,[sp],#16
431 ret
432.size sha256_block_armv8,.-sha256_block_armv8
413b6a82 433#endif
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434___
435}
436
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437if ($SZ==4) { ######################################### NEON stuff #
438# You'll surely note a lot of similarities with sha256-armv4 module,
439# and of course it's not a coincidence. sha256-armv4 was used as
440# initial template, but was adapted for ARMv8 instruction set and
441# extensively re-tuned for all-round performance.
442
443my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10));
444my ($t0,$t1,$t2,$t3,$t4) = map("w$_",(11..15));
445my $Ktbl="x16";
446my $Xfer="x17";
447my @X = map("q$_",(0..3));
448my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
449my $j=0;
450
451sub AUTOLOAD() # thunk [simplified] x86-style perlasm
452{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;
453 my $arg = pop;
454 $arg = "#$arg" if ($arg*1 eq $arg);
455 $code .= "\t$opcode\t".join(',',@_,$arg)."\n";
456}
457
458sub Dscalar { shift =~ m|[qv]([0-9]+)|?"d$1":""; }
459sub Dlo { shift =~ m|[qv]([0-9]+)|?"v$1.d[0]":""; }
460sub Dhi { shift =~ m|[qv]([0-9]+)|?"v$1.d[1]":""; }
461
462sub Xupdate()
463{ use integer;
464 my $body = shift;
465 my @insns = (&$body,&$body,&$body,&$body);
466 my ($a,$b,$c,$d,$e,$f,$g,$h);
467
468 &ext_8 ($T0,@X[0],@X[1],4); # X[1..4]
469 eval(shift(@insns));
470 eval(shift(@insns));
471 eval(shift(@insns));
472 &ext_8 ($T3,@X[2],@X[3],4); # X[9..12]
473 eval(shift(@insns));
474 eval(shift(@insns));
475 &mov (&Dscalar($T7),&Dhi(@X[3])); # X[14..15]
476 eval(shift(@insns));
477 eval(shift(@insns));
478 &ushr_32 ($T2,$T0,$sigma0[0]);
479 eval(shift(@insns));
480 &ushr_32 ($T1,$T0,$sigma0[2]);
481 eval(shift(@insns));
482 &add_32 (@X[0],@X[0],$T3); # X[0..3] += X[9..12]
483 eval(shift(@insns));
484 &sli_32 ($T2,$T0,32-$sigma0[0]);
485 eval(shift(@insns));
486 eval(shift(@insns));
487 &ushr_32 ($T3,$T0,$sigma0[1]);
488 eval(shift(@insns));
489 eval(shift(@insns));
490 &eor_8 ($T1,$T1,$T2);
491 eval(shift(@insns));
492 eval(shift(@insns));
493 &sli_32 ($T3,$T0,32-$sigma0[1]);
494 eval(shift(@insns));
495 eval(shift(@insns));
496 &ushr_32 ($T4,$T7,$sigma1[0]);
497 eval(shift(@insns));
498 eval(shift(@insns));
499 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
500 eval(shift(@insns));
501 eval(shift(@insns));
502 &sli_32 ($T4,$T7,32-$sigma1[0]);
503 eval(shift(@insns));
504 eval(shift(@insns));
505 &ushr_32 ($T5,$T7,$sigma1[2]);
506 eval(shift(@insns));
507 eval(shift(@insns));
508 &ushr_32 ($T3,$T7,$sigma1[1]);
509 eval(shift(@insns));
510 eval(shift(@insns));
511 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
512 eval(shift(@insns));
513 eval(shift(@insns));
514 &sli_u32 ($T3,$T7,32-$sigma1[1]);
515 eval(shift(@insns));
516 eval(shift(@insns));
517 &eor_8 ($T5,$T5,$T4);
518 eval(shift(@insns));
519 eval(shift(@insns));
520 eval(shift(@insns));
521 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
522 eval(shift(@insns));
523 eval(shift(@insns));
524 eval(shift(@insns));
525 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15])
526 eval(shift(@insns));
527 eval(shift(@insns));
528 eval(shift(@insns));
529 &ushr_32 ($T6,@X[0],$sigma1[0]);
530 eval(shift(@insns));
531 &ushr_32 ($T7,@X[0],$sigma1[2]);
532 eval(shift(@insns));
533 eval(shift(@insns));
534 &sli_32 ($T6,@X[0],32-$sigma1[0]);
535 eval(shift(@insns));
536 &ushr_32 ($T5,@X[0],$sigma1[1]);
537 eval(shift(@insns));
538 eval(shift(@insns));
539 &eor_8 ($T7,$T7,$T6);
540 eval(shift(@insns));
541 eval(shift(@insns));
542 &sli_32 ($T5,@X[0],32-$sigma1[1]);
543 eval(shift(@insns));
544 eval(shift(@insns));
545 &ld1_32 ("{$T0}","[$Ktbl], #16");
546 eval(shift(@insns));
547 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17])
548 eval(shift(@insns));
549 eval(shift(@insns));
550 &eor_8 ($T5,$T5,$T5);
551 eval(shift(@insns));
552 eval(shift(@insns));
553 &mov (&Dhi($T5), &Dlo($T7));
554 eval(shift(@insns));
555 eval(shift(@insns));
556 eval(shift(@insns));
557 &add_32 (@X[0],@X[0],$T5); # X[2..3] += sigma1(X[16..17])
558 eval(shift(@insns));
559 eval(shift(@insns));
560 eval(shift(@insns));
561 &add_32 ($T0,$T0,@X[0]);
562 while($#insns>=1) { eval(shift(@insns)); }
563 &st1_32 ("{$T0}","[$Xfer], #16");
564 eval(shift(@insns));
565
566 push(@X,shift(@X)); # "rotate" X[]
567}
568
569sub Xpreload()
570{ use integer;
571 my $body = shift;
572 my @insns = (&$body,&$body,&$body,&$body);
573 my ($a,$b,$c,$d,$e,$f,$g,$h);
574
575 eval(shift(@insns));
576 eval(shift(@insns));
577 &ld1_8 ("{@X[0]}","[$inp],#16");
578 eval(shift(@insns));
579 eval(shift(@insns));
580 &ld1_32 ("{$T0}","[$Ktbl],#16");
581 eval(shift(@insns));
582 eval(shift(@insns));
583 eval(shift(@insns));
584 eval(shift(@insns));
585 &rev32 (@X[0],@X[0]);
586 eval(shift(@insns));
587 eval(shift(@insns));
588 eval(shift(@insns));
589 eval(shift(@insns));
590 &add_32 ($T0,$T0,@X[0]);
591 foreach (@insns) { eval; } # remaining instructions
592 &st1_32 ("{$T0}","[$Xfer], #16");
593
594 push(@X,shift(@X)); # "rotate" X[]
595}
596
597sub body_00_15 () {
598 (
599 '($a,$b,$c,$d,$e,$f,$g,$h)=@V;'.
600 '&add ($h,$h,$t1)', # h+=X[i]+K[i]
601 '&add ($a,$a,$t4);'. # h+=Sigma0(a) from the past
602 '&and ($t1,$f,$e)',
603 '&bic ($t4,$g,$e)',
604 '&eor ($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))',
605 '&add ($a,$a,$t2)', # h+=Maj(a,b,c) from the past
606 '&orr ($t1,$t1,$t4)', # Ch(e,f,g)
607 '&eor ($t0,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))', # Sigma1(e)
608 '&eor ($t4,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))',
609 '&add ($h,$h,$t1)', # h+=Ch(e,f,g)
610 '&ror ($t0,$t0,"#$Sigma1[0]")',
611 '&eor ($t2,$a,$b)', # a^b, b^c in next round
612 '&eor ($t4,$t4,$a,"ror#".($Sigma0[2]-$Sigma0[0]))', # Sigma0(a)
613 '&add ($h,$h,$t0)', # h+=Sigma1(e)
614 '&ldr ($t1,sprintf "[sp,#%d]",4*(($j+1)&15)) if (($j&15)!=15);'.
615 '&ldr ($t1,"[$Ktbl]") if ($j==15);'.
616 '&and ($t3,$t3,$t2)', # (b^c)&=(a^b)
617 '&ror ($t4,$t4,"#$Sigma0[0]")',
618 '&add ($d,$d,$h)', # d+=h
619 '&eor ($t3,$t3,$b)', # Maj(a,b,c)
620 '$j++; unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);'
621 )
622}
623
624$code.=<<___;
625#ifdef __KERNEL__
626.globl sha256_block_neon
627#endif
628.type sha256_block_neon,%function
629.align 4
630sha256_block_neon:
631.Lneon_entry:
632 stp x29, x30, [sp, #-16]!
633 mov x29, sp
634 sub sp,sp,#16*4
635
636 adr $Ktbl,.LK256
637 add $num,$inp,$num,lsl#6 // len to point at the end of inp
638
639 ld1.8 {@X[0]},[$inp], #16
640 ld1.8 {@X[1]},[$inp], #16
641 ld1.8 {@X[2]},[$inp], #16
642 ld1.8 {@X[3]},[$inp], #16
643 ld1.32 {$T0},[$Ktbl], #16
644 ld1.32 {$T1},[$Ktbl], #16
645 ld1.32 {$T2},[$Ktbl], #16
646 ld1.32 {$T3},[$Ktbl], #16
647 rev32 @X[0],@X[0] // yes, even on
648 rev32 @X[1],@X[1] // big-endian
649 rev32 @X[2],@X[2]
650 rev32 @X[3],@X[3]
651 mov $Xfer,sp
652 add.32 $T0,$T0,@X[0]
653 add.32 $T1,$T1,@X[1]
654 add.32 $T2,$T2,@X[2]
655 st1.32 {$T0-$T1},[$Xfer], #32
656 add.32 $T3,$T3,@X[3]
657 st1.32 {$T2-$T3},[$Xfer]
658 sub $Xfer,$Xfer,#32
659
660 ldp $A,$B,[$ctx]
661 ldp $C,$D,[$ctx,#8]
662 ldp $E,$F,[$ctx,#16]
663 ldp $G,$H,[$ctx,#24]
664 ldr $t1,[sp,#0]
665 mov $t2,wzr
666 eor $t3,$B,$C
667 mov $t4,wzr
668 b .L_00_48
669
670.align 4
671.L_00_48:
672___
673 &Xupdate(\&body_00_15);
674 &Xupdate(\&body_00_15);
675 &Xupdate(\&body_00_15);
676 &Xupdate(\&body_00_15);
677$code.=<<___;
678 cmp $t1,#0 // check for K256 terminator
679 ldr $t1,[sp,#0]
680 sub $Xfer,$Xfer,#64
681 bne .L_00_48
682
683 sub $Ktbl,$Ktbl,#256 // rewind $Ktbl
684 cmp $inp,$num
685 mov $Xfer, #64
686 csel $Xfer, $Xfer, xzr, eq
687 sub $inp,$inp,$Xfer // avoid SEGV
688 mov $Xfer,sp
689___
690 &Xpreload(\&body_00_15);
691 &Xpreload(\&body_00_15);
692 &Xpreload(\&body_00_15);
693 &Xpreload(\&body_00_15);
694$code.=<<___;
695 add $A,$A,$t4 // h+=Sigma0(a) from the past
696 ldp $t0,$t1,[$ctx,#0]
697 add $A,$A,$t2 // h+=Maj(a,b,c) from the past
698 ldp $t2,$t3,[$ctx,#8]
699 add $A,$A,$t0 // accumulate
700 add $B,$B,$t1
701 ldp $t0,$t1,[$ctx,#16]
702 add $C,$C,$t2
703 add $D,$D,$t3
704 ldp $t2,$t3,[$ctx,#24]
705 add $E,$E,$t0
706 add $F,$F,$t1
707 ldr $t1,[sp,#0]
708 stp $A,$B,[$ctx,#0]
709 add $G,$G,$t2
710 mov $t2,wzr
711 stp $C,$D,[$ctx,#8]
712 add $H,$H,$t3
713 stp $E,$F,[$ctx,#16]
714 eor $t3,$B,$C
715 stp $G,$H,[$ctx,#24]
716 mov $t4,wzr
717 mov $Xfer,sp
718 b.ne .L_00_48
719
720 ldr x29,[x29]
721 add sp,sp,#16*4+16
722 ret
723.size sha256_block_neon,.-sha256_block_neon
724___
725}
726
af0fcf7b
AP
727if ($SZ==8) {
728my $Ktbl="x3";
729
730my @H = map("v$_.16b",(0..4));
731my ($fg,$de,$m9_10)=map("v$_.16b",(5..7));
732my @MSG=map("v$_.16b",(16..23));
733my ($W0,$W1)=("v24.2d","v25.2d");
734my ($AB,$CD,$EF,$GH)=map("v$_.16b",(26..29));
735
736$code.=<<___;
737#ifndef __KERNEL__
738.type sha512_block_armv8,%function
739.align 6
740sha512_block_armv8:
741.Lv8_entry:
742 stp x29,x30,[sp,#-16]!
743 add x29,sp,#0
744
745 ld1 {@MSG[0]-@MSG[3]},[$inp],#64 // load input
746 ld1 {@MSG[4]-@MSG[7]},[$inp],#64
747
748 ld1.64 {@H[0]-@H[3]},[$ctx] // load context
749 adr $Ktbl,.LK512
750
751 rev64 @MSG[0],@MSG[0]
752 rev64 @MSG[1],@MSG[1]
753 rev64 @MSG[2],@MSG[2]
754 rev64 @MSG[3],@MSG[3]
755 rev64 @MSG[4],@MSG[4]
756 rev64 @MSG[5],@MSG[5]
757 rev64 @MSG[6],@MSG[6]
758 rev64 @MSG[7],@MSG[7]
759 b .Loop_hw
760
761.align 4
762.Loop_hw:
763 ld1.64 {$W0},[$Ktbl],#16
764 subs $num,$num,#1
765 sub x4,$inp,#128
766 orr $AB,@H[0],@H[0] // offload
767 orr $CD,@H[1],@H[1]
768 orr $EF,@H[2],@H[2]
769 orr $GH,@H[3],@H[3]
770 csel $inp,$inp,x4,ne // conditional rewind
771___
772for($i=0;$i<32;$i++) {
773$code.=<<___;
774 add.i64 $W0,$W0,@MSG[0]
775 ld1.64 {$W1},[$Ktbl],#16
776 ext $W0,$W0,$W0,#8
777 ext $fg,@H[2],@H[3],#8
778 ext $de,@H[1],@H[2],#8
779 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
780 sha512su0 @MSG[0],@MSG[1]
781 ext $m9_10,@MSG[4],@MSG[5],#8
782 sha512h @H[3],$fg,$de
783 sha512su1 @MSG[0],@MSG[7],$m9_10
784 add.i64 @H[4],@H[1],@H[3] // "D + T1"
785 sha512h2 @H[3],$H[1],@H[0]
786___
787 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
788 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
789}
790for(;$i<40;$i++) {
791$code.=<<___ if ($i<39);
792 ld1.64 {$W1},[$Ktbl],#16
793___
794$code.=<<___ if ($i==39);
795 sub $Ktbl,$Ktbl,#$rounds*$SZ // rewind
796___
797$code.=<<___;
798 add.i64 $W0,$W0,@MSG[0]
799 ld1 {@MSG[0]},[$inp],#16 // load next input
800 ext $W0,$W0,$W0,#8
801 ext $fg,@H[2],@H[3],#8
802 ext $de,@H[1],@H[2],#8
803 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
804 sha512h @H[3],$fg,$de
805 rev64 @MSG[0],@MSG[0]
806 add.i64 @H[4],@H[1],@H[3] // "D + T1"
807 sha512h2 @H[3],$H[1],@H[0]
808___
809 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
810 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
811}
812$code.=<<___;
813 add.i64 @H[0],@H[0],$AB // accumulate
814 add.i64 @H[1],@H[1],$CD
815 add.i64 @H[2],@H[2],$EF
816 add.i64 @H[3],@H[3],$GH
817
818 cbnz $num,.Loop_hw
819
820 st1.64 {@H[0]-@H[3]},[$ctx] // store context
821
822 ldr x29,[sp],#16
823 ret
824.size sha512_block_armv8,.-sha512_block_armv8
825#endif
826___
827}
828
ddb6b965 829$code.=<<___;
db42bb44 830#if !defined(__KERNEL__) && !defined(_WIN64)
ddb6b965 831.comm OPENSSL_armcap_P,4,4
413b6a82 832#endif
ddb6b965
AP
833___
834
835{ my %opcode = (
836 "sha256h" => 0x5e004000, "sha256h2" => 0x5e005000,
837 "sha256su0" => 0x5e282800, "sha256su1" => 0x5e006000 );
838
839 sub unsha256 {
840 my ($mnemonic,$arg)=@_;
841
842 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
843 &&
cd91fd7c 844 sprintf ".inst\t0x%08x\t//%s %s",
ddb6b965
AP
845 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
846 $mnemonic,$arg;
847 }
848}
849
af0fcf7b
AP
850{ my %opcode = (
851 "sha512h" => 0xce608000, "sha512h2" => 0xce608400,
852 "sha512su0" => 0xcec08000, "sha512su1" => 0xce608800 );
853
854 sub unsha512 {
855 my ($mnemonic,$arg)=@_;
856
857 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
858 &&
859 sprintf ".inst\t0x%08x\t//%s %s",
860 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
861 $mnemonic,$arg;
862 }
863}
864
413b6a82
AP
865open SELF,$0;
866while(<SELF>) {
867 next if (/^#!/);
868 last if (!s/^#/\/\// and !/^$/);
869 print;
870}
871close SELF;
872
ddb6b965
AP
873foreach(split("\n",$code)) {
874
866e505e
AP
875 s/\`([^\`]*)\`/eval($1)/ge;
876
af0fcf7b 877 s/\b(sha512\w+)\s+([qv].*)/unsha512($1,$2)/ge or
866e505e 878 s/\b(sha256\w+)\s+([qv].*)/unsha256($1,$2)/ge;
ddb6b965 879
866e505e 880 s/\bq([0-9]+)\b/v$1.16b/g; # old->new registers
ddb6b965 881
866e505e 882 s/\.[ui]?8(\s)/$1/;
af0fcf7b 883 s/\.\w?64\b// and s/\.16b/\.2d/g or
866e505e 884 s/\.\w?32\b// and s/\.16b/\.4s/g;
af0fcf7b 885 m/\bext\b/ and s/\.2d/\.16b/g or
866e505e 886 m/(ld|st)1[^\[]+\[0\]/ and s/\.4s/\.s/g;
ddb6b965
AP
887
888 print $_,"\n";
889}
890
891close STDOUT;