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Commit | Line | Data |
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8c22aed4 JJ |
1 | 2023-12-31 Uros Bizjak <ubizjak@gmail.com> |
2 | Roger Sayle <roger@nextmovesoftware.com> | |
3 | ||
4 | PR target/43644 | |
5 | * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Tweak | |
6 | order of instructions after split, to minimize number of moves. | |
7 | ||
8 | 2023-12-29 Jan Hubicka <jh@suse.cz> | |
9 | ||
10 | * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS, | |
11 | X86_TUNE_AVOID_256FMA_CHAINS): Enable for znver4 and Core. | |
12 | ||
13 | 2023-12-29 Tamar Christina <tamar.christina@arm.com> | |
14 | ||
15 | PR target/110625 | |
16 | * config/aarch64/aarch64.cc (aarch64_vector_costs::add_stmt_cost): | |
17 | Adjust throughput and latency calculations for vector conversions. | |
18 | (class aarch64_vector_costs): Add m_num_last_promote_demote. | |
19 | ||
20 | 2023-12-29 Xi Ruoyao <xry111@xry111.site> | |
21 | ||
22 | * config/loongarch/loongarch.md (bstrins_<mode>_for_ior_mask): | |
23 | For the condition, remove unneeded trailing "\" and move "&&" to | |
24 | follow GNU coding style. NFC. | |
25 | ||
26 | 2023-12-29 Xi Ruoyao <xry111@xry111.site> | |
27 | ||
28 | * config/loongarch/predicates.md | |
29 | (symbolic_pcrel_offset_operand): New define_predicate. | |
30 | (mem_simple_ldst_operand): Likewise. | |
31 | * config/loongarch/loongarch-protos.h | |
32 | (loongarch_rewrite_mem_for_simple_ldst): Declare. | |
33 | * config/loongarch/loongarch.cc | |
34 | (loongarch_rewrite_mem_for_simple_ldst): Implement. | |
35 | * config/loongarch/loongarch.md (simple_load<mode>): New | |
36 | define_insn_and_rewrite. | |
37 | (simple_load_<su>ext<SUBDI:mode><GPR:mode>): Likewise. | |
38 | (simple_store<mode>): Likewise. | |
39 | (define_peephole2): Remove la.local/[f]ld peepholes. | |
40 | ||
41 | 2023-12-29 Uros Bizjak <ubizjak@gmail.com> | |
42 | ||
43 | PR target/113133 | |
44 | * config/i386/i386.md | |
45 | (TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter): | |
46 | Do not handle xmm16+ with TARGET_EVEX512. | |
47 | ||
48 | 2023-12-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
49 | ||
50 | * config/riscv/riscv-v.cc (is_vlmax_len_p): New function. | |
51 | (expand_load_store): Disallow transformation into VLMAX when len is in range of [0,31] | |
52 | (expand_cond_len_op): Ditto. | |
53 | (expand_gather_scatter): Ditto. | |
54 | (expand_lanes_load_store): Ditto. | |
55 | (expand_fold_extract_last): Ditto. | |
56 | ||
57 | 2023-12-28 Uros Bizjak <ubizjak@gmail.com> | |
58 | ||
59 | * config/i386/i386.cc (ix86_unary_operator_ok): Move from here... | |
60 | * config/i386/i386-expand.cc (ix86_unary_operator_ok): ... to here. | |
61 | * config/i386/i386-protos.h: Re-arrange ix86_{unary|binary}_operator_ok | |
62 | and ix86_expand_{unary|binary}_operator prototypes. | |
63 | * config/i386/i386.md: Cosmetic changes with the usage of | |
64 | TARGET_APX_NDD in ix86_expand_{unary|binary}_operator | |
65 | and ix86_{unary|binary}_operator_ok function calls. | |
66 | ||
67 | 2023-12-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
68 | ||
69 | * config/riscv/riscv-vector-costs.cc (is_gimple_assign_or_call): Change interface. | |
70 | (get_live_range): New function. | |
71 | ||
72 | 2023-12-27 Xi Ruoyao <xry111@xry111.site> | |
73 | ||
74 | PR target/113148 | |
75 | * config/loongarch/loongarch.cc (loongarch_secondary_reload): | |
76 | Check if regno == -1 besides MEM_P (x) for reloading FCCmode | |
77 | from/to FPR to/from memory. | |
78 | ||
79 | 2023-12-27 Xi Ruoyao <xry111@xry111.site> | |
80 | ||
81 | * config/loongarch/loongarch.md (rotl<mode>3): | |
82 | New define_expand. | |
83 | * config/loongarch/simd.md (vrotl<mode>3): Likewise. | |
84 | (rotl<mode>3): Likewise. | |
85 | ||
86 | 2023-12-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
87 | ||
88 | PR target/113112 | |
89 | * config/riscv/riscv-vector-costs.cc (is_gimple_assign_or_call): New function. | |
90 | (get_first_lane_point): Ditto. | |
91 | (get_last_lane_point): Ditto. | |
92 | (max_number_of_live_regs): Refine live point dump. | |
93 | (compute_estimated_lmul): Make unknown NITERS loop be aware of liveness. | |
94 | (costs::better_main_loop_than_p): Ditto. | |
95 | * config/riscv/riscv-vector-costs.h (struct stmt_point): Add new member. | |
96 | ||
97 | 2023-12-27 Chenghui Pan <panchenghui@loongson.cn> | |
98 | ||
99 | * config/loongarch/lasx.md: Use loongarch_split_move and | |
100 | loongarch_split_move_p directly. | |
101 | * config/loongarch/loongarch-protos.h | |
102 | (loongarch_split_move): Remove unnecessary argument. | |
103 | (loongarch_split_move_insn_p): Delete. | |
104 | (loongarch_split_move_insn): Delete. | |
105 | * config/loongarch/loongarch.cc | |
106 | (loongarch_split_move_insn_p): Delete. | |
107 | (loongarch_load_store_insns): Use loongarch_split_move_p | |
108 | directly. | |
109 | (loongarch_split_move): remove the unnecessary processing. | |
110 | (loongarch_split_move_insn): Delete. | |
111 | * config/loongarch/lsx.md: Use loongarch_split_move and | |
112 | loongarch_split_move_p directly. | |
113 | ||
114 | 2023-12-27 Chenghui Pan <panchenghui@loongson.cn> | |
115 | ||
116 | * config/loongarch/lasx.md (vec_concatv4di): Delete. | |
117 | (vec_concatv8si): Delete. | |
118 | (vec_concatv16hi): Delete. | |
119 | (vec_concatv32qi): Delete. | |
120 | (vec_concatv4df): Delete. | |
121 | (vec_concatv8sf): Delete. | |
122 | (vec_concat<mode>): New template with insn output fixed. | |
123 | ||
124 | 2023-12-27 Li Wei <liwei@loongson.cn> | |
125 | ||
126 | * config/loongarch/loongarch.md: Adjust. | |
127 | ||
128 | 2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> | |
129 | ||
130 | * config/rs6000/rs6000-string.cc (expand_block_compare): Assert | |
131 | only P7 above can enter this function. Remove P7 CPU test and let | |
132 | P7 BE do the expand. | |
133 | ||
134 | 2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> | |
135 | ||
136 | * config/rs6000/rs6000.md (cmpmemsi): Fail when optimizing for size. | |
137 | ||
138 | 2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> | |
139 | ||
140 | * config/rs6000/rs6000.h (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED): | |
141 | Remove. | |
142 | * config/rs6000/rs6000-string.cc (select_block_compare_mode): | |
143 | Replace TARGET_EFFICIENT_OVERLAPPING_UNALIGNED with | |
144 | targetm.slow_unaligned_access. | |
145 | (expand_block_compare_gpr): Likewise. | |
146 | (expand_block_compare): Likewise. | |
147 | (expand_strncmp_gpr_sequence): Likewise. | |
148 | ||
149 | 2023-12-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
150 | ||
151 | PR target/113112 | |
152 | * config/riscv/riscv-vector-costs.cc (compute_estimated_lmul): Tweak LMUL estimation. | |
153 | (has_unexpected_spills_p): Ditto. | |
154 | (costs::record_potential_unexpected_spills): Ditto. | |
155 | ||
156 | 2023-12-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
157 | ||
158 | * config/riscv/riscv-vector-costs.cc (compute_estimated_lmul): Allow | |
159 | fractional vecrtor. | |
160 | (preferred_new_lmul_p): Move RVV V_REGS liveness computation into analyze_loop_vinfo. | |
161 | (has_unexpected_spills_p): New function. | |
162 | (costs::record_potential_unexpected_spills): Ditto. | |
163 | (costs::better_main_loop_than_p): Move RVV V_REGS liveness computation into | |
164 | analyze_loop_vinfo. | |
165 | * config/riscv/riscv-vector-costs.h: New functions and variables. | |
166 | ||
167 | 2023-12-25 Tamar Christina <tamar.christina@arm.com> | |
168 | ||
169 | PR bootstrap/113132 | |
170 | * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize vec_stmts; | |
171 | ||
172 | 2023-12-25 Jeevitha Palanisamy <jeevitha@linux.ibm.com> | |
173 | Peter Bergner <bergner@linux.ibm.com> | |
174 | ||
175 | PR target/110320 | |
176 | * config/rs6000/rs6000.cc (rs6000_conditional_register_usage): Change | |
177 | GPR2 to volatile and non-fixed register for PCREL. | |
178 | * config/rs6000/rs6000.h (FIXED_REGISTERS): Modify GPR2 to not fixed. | |
179 | ||
180 | 2023-12-25 Andrew Pinski <quic_apinski@quicinc.com> | |
181 | ||
182 | PR tree-optimization/19832 | |
183 | * match.pd (`(a != b) ? (a + b) : (2 * a)`): Add `:c` | |
184 | on the plus operator. | |
185 | ||
186 | 2023-12-24 Tamar Christina <tamar.christina@arm.com> | |
187 | ||
188 | * doc/sourcebuild.texi (check_effective_target_vect_early_break_hw, | |
189 | check_effective_target_vect_early_break): Document. | |
190 | ||
191 | 2023-12-24 Tamar Christina <tamar.christina@arm.com> | |
192 | ||
193 | * config/aarch64/aarch64-simd.md (cbranch<mode>4): New. | |
194 | ||
195 | 2023-12-24 Tamar Christina <tamar.christina@arm.com> | |
196 | ||
197 | * tree-if-conv.cc (idx_within_array_bound): Expose. | |
198 | * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): New. | |
199 | (vect_analyze_data_ref_dependences): Use it. | |
200 | * tree-vect-loop-manip.cc (vect_iv_increment_position): New. | |
201 | (vect_set_loop_controls_directly, | |
202 | vect_set_loop_condition_partial_vectors, | |
203 | vect_set_loop_condition_partial_vectors_avx512, | |
204 | vect_set_loop_condition_normal): Support multiple exits. | |
205 | (slpeel_tree_duplicate_loop_to_edge_cfg): Support LCSAA peeling for | |
206 | multiple exits. | |
207 | (slpeel_can_duplicate_loop_p): Change vectorizer from looking at BB | |
208 | count and instead look at loop shape. | |
209 | (vect_update_ivs_after_vectorizer): Drop asserts. | |
210 | (vect_gen_vector_loop_niters_mult_vf): Support peeled vector iterations. | |
211 | (vect_do_peeling): Support multiple exits. | |
212 | (vect_loop_versioning): Likewise. | |
213 | * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialise | |
214 | early_breaks. | |
215 | (vect_analyze_loop_form): Support loop flows with more than single BB | |
216 | loop body. | |
217 | (vect_create_loop_vinfo): Support niters analysis for multiple exits. | |
218 | (vect_analyze_loop): Likewise. | |
219 | (vect_get_vect_def): New. | |
220 | (vect_create_epilog_for_reduction): Support early exit reductions. | |
221 | (vectorizable_live_operation_1): New. | |
222 | (find_connected_edge): New. | |
223 | (vectorizable_live_operation): Support early exit live operations. | |
224 | (move_early_exit_stmts): New. | |
225 | (vect_transform_loop): Use it. | |
226 | * tree-vect-patterns.cc (vect_init_pattern_stmt): Support gcond. | |
227 | (vect_recog_bitfield_ref_pattern): Support gconds and bools. | |
228 | (vect_recog_gcond_pattern): New. | |
229 | (possible_vector_mask_operation_p): Support gcond masks. | |
230 | (vect_determine_mask_precision): Likewise. | |
231 | (vect_mark_pattern_stmts): Set gcond def type. | |
232 | (can_vectorize_live_stmts): Force early break inductions to be live. | |
233 | * tree-vect-stmts.cc (vect_stmt_relevant_p): Add relevancy analysis for | |
234 | early breaks. | |
235 | (vect_mark_stmts_to_be_vectorized): Process gcond usage. | |
236 | (perm_mask_for_reverse): Expose. | |
237 | (vectorizable_comparison_1): New. | |
238 | (vectorizable_early_exit): New. | |
239 | (vect_analyze_stmt): Support early break and gcond. | |
240 | (vect_transform_stmt): Likewise. | |
241 | (vect_is_simple_use): Likewise. | |
242 | (vect_get_vector_types_for_stmt): Likewise. | |
243 | * tree-vectorizer.cc (pass_vectorize::execute): Update exits for value | |
244 | numbering. | |
245 | * tree-vectorizer.h (enum vect_def_type): Add vect_condition_def. | |
246 | (LOOP_VINFO_EARLY_BREAKS, LOOP_VINFO_EARLY_BRK_STORES, | |
247 | LOOP_VINFO_EARLY_BREAKS_VECT_PEELED, LOOP_VINFO_EARLY_BRK_DEST_BB, | |
248 | LOOP_VINFO_EARLY_BRK_VUSES): New. | |
249 | (is_loop_header_bb_p): Drop assert. | |
250 | (class loop): Add early_breaks, early_break_stores, early_break_dest_bb, | |
251 | early_break_vuses. | |
252 | (vect_iv_increment_position, perm_mask_for_reverse, | |
253 | ref_within_array_bound): New. | |
254 | (slpeel_tree_duplicate_loop_to_edge_cfg): Update for early breaks. | |
255 | ||
256 | 2023-12-24 Tamar Christina <tamar.christina@arm.com> | |
257 | ||
258 | * tree-ssa-loop-im.cc (determine_max_movement): Import insn-codes.h | |
259 | and optabs-tree.h and check for vector compare motion out of gcond. | |
260 | ||
261 | 2023-12-24 Hans-Peter Nilsson <hp@axis.com> | |
262 | ||
263 | PR middle-end/113109 | |
264 | * config/cris/cris.cc (cris_eh_return_handler_rtx): New function. | |
265 | * config/cris/cris-protos.h (cris_eh_return_handler_rtx): Prototype. | |
266 | * config/cris/cris.h (EH_RETURN_HANDLER_RTX): Redefine to call | |
267 | cris_eh_return_handler_rtx. | |
268 | ||
269 | 2023-12-23 Xi Ruoyao <xry111@xry111.site> | |
270 | ||
271 | * config/loongarch/loongarch.md (rotrsi3_extend): New | |
272 | define_insn. | |
273 | ||
274 | 2023-12-23 Xi Ruoyao <xry111@xry111.site> | |
275 | ||
276 | * config/loongarch/loongarch-tune.h | |
277 | (loongarch_rtx_cost_data::movcf2gr): New field. | |
278 | (loongarch_rtx_cost_data::movcf2gr_): New method. | |
279 | (loongarch_rtx_cost_data::use_movcf2gr): New method. | |
280 | * config/loongarch/loongarch-def.cc | |
281 | (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Set movcf2gr | |
282 | to COSTS_N_INSNS (7) and movgr2cf to COSTS_N_INSNS (15), based | |
283 | on timing on LA464. | |
284 | (loongarch_cpu_rtx_cost_data): Set movcf2gr and movgr2cf to | |
285 | COSTS_N_INSNS (1) for LA664. | |
286 | (loongarch_rtx_cost_optimize_size): Set movcf2gr and movgr2cf to | |
287 | COSTS_N_INSNS (1) + 1. | |
288 | * config/loongarch/predicates.md (loongarch_fcmp_operator): New | |
289 | predicate. | |
290 | * config/loongarch/loongarch.md (movfcc): Change to | |
291 | define_expand. | |
292 | (movfcc_internal): New define_insn. | |
293 | (fcc_to_<X:mode>): New define_insn. | |
294 | (cstore<ANYF:mode>4): New define_expand. | |
295 | * config/loongarch/loongarch.cc | |
296 | (loongarch_hard_regno_mode_ok_uncached): Allow FCCmode in GPRs | |
297 | and GPRs. | |
298 | (loongarch_secondary_reload): Reload FCCmode via FPR and/or GPR. | |
299 | (loongarch_emit_float_compare): Call gen_reg_rtx instead of | |
300 | loongarch_allocate_fcc. | |
301 | (loongarch_allocate_fcc): Remove. | |
302 | (loongarch_move_to_gpr_cost): Handle FCC_REGS -> GR_REGS. | |
303 | (loongarch_move_from_gpr_cost): Handle GR_REGS -> FCC_REGS. | |
304 | (loongarch_register_move_cost): Handle FCC_REGS -> FCC_REGS, | |
305 | FCC_REGS -> FP_REGS, and FP_REGS -> FCC_REGS. | |
306 | ||
307 | 2023-12-23 YunQiang Su <syq@gcc.gnu.org> | |
308 | ||
309 | * config/mips/driver-native.cc (host_detect_local_cpu): | |
310 | don't add nan2008 option for -mtune=native. | |
311 | ||
312 | 2023-12-23 YunQiang Su <syq@gcc.gnu.org> | |
313 | ||
314 | PR target/112759 | |
315 | * config/mips/driver-native.cc (host_detect_local_cpu): | |
316 | Put the ret to the end of args of reconcat. | |
317 | ||
318 | 2023-12-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
319 | ||
320 | PR target/113112 | |
321 | * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Refine dump information. | |
322 | (preferred_new_lmul_p): Make PHI initial value into live regs calculation. | |
323 | ||
324 | 2023-12-22 Sandra Loosemore <sandra@codesourcery.com> | |
325 | ||
326 | * omp-general.cc (omp_context_name_list_prop): Remove static qualifer. | |
327 | * omp-general.h (omp_context_name_list_prop): Declare. | |
328 | * tree-cfg.cc (dump_function_to_file): Intercept | |
329 | "omp declare variant base" attribute for special handling. | |
330 | * tree-pretty-print.cc: Include omp-general.h. | |
331 | (dump_omp_context_selector): New. | |
332 | (print_omp_context_selector): New. | |
333 | * tree-pretty-print.h (print_omp_context_selector): Declare. | |
334 | ||
335 | 2023-12-22 Jakub Jelinek <jakub@redhat.com> | |
336 | ||
337 | PR rtl-optimization/112758 | |
338 | * combine.cc (make_compopund_operation_int): Optimize AND of a SUBREG | |
339 | based on nonzero_bits of SUBREG_REG and constant mask on | |
340 | WORD_REGISTER_OPERATIONS targets only if it is a zero extending | |
341 | MEM load. | |
342 | ||
343 | 2023-12-22 Jakub Jelinek <jakub@redhat.com> | |
344 | ||
345 | PR tree-optimization/112941 | |
346 | * symtab-thunks.cc (expand_thunk): Check aggregate_value_p regardless | |
347 | of whether is_gimple_reg_type (restype) or not. | |
348 | ||
349 | 2023-12-22 Jakub Jelinek <jakub@redhat.com> | |
350 | ||
351 | PR tree-optimization/113102 | |
352 | * gimple-lower-bitint.cc (gimple_lower_bitint): Handle unreleased | |
353 | large/huge _BitInt SSA_NAMEs. | |
354 | ||
355 | 2023-12-22 Jakub Jelinek <jakub@redhat.com> | |
356 | ||
357 | PR tree-optimization/113102 | |
358 | * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Only | |
359 | use m_data[save_data_cnt] if it is non-NULL. | |
360 | ||
361 | 2023-12-22 Christophe Lyon <christophe.lyon@linaro.org> | |
362 | ||
363 | * Makefile.in: Allow overriding EXEPCT. | |
364 | ||
365 | 2023-12-22 chenxiaolong <chenxiaolong@loongson.cn> | |
366 | ||
367 | * doc/extend.texi:Add modifiers to the vector of asm in the doc. | |
368 | * doc/md.texi:Refine the description of the modifier 'f' in the doc. | |
369 | ||
370 | 2023-12-21 Andrew Pinski <quic_apinski@quicinc.com> | |
371 | ||
372 | PR middle-end/112951 | |
373 | * doc/md.texi (cond_copysign): Document. | |
374 | (cond_len_copysign): Likewise. | |
375 | * optabs.def: Reorder cond_copysign to be before | |
376 | cond_fmin. Likewise for cond_len_copysign. | |
377 | ||
378 | 2023-12-21 Andre Vieira (lists) <andre.simoesdiasvieira@arm.com> | |
379 | ||
380 | PR middle-end/113040 | |
381 | * omp-simd-clone.cc (simd_clone_adjust_argument_types): Add multiple | |
382 | vector arguments where simdlen is larger than veclen. | |
383 | ||
384 | 2023-12-21 Uros Bizjak <ubizjak@gmail.com> | |
385 | ||
386 | PR target/113044 | |
387 | * config/i386/i386.md (*ashlqi_ext<mode>_1): Move from the | |
388 | high register of the input operand. | |
389 | (*<insn>qi_ext<mode>_1): Ditto. | |
390 | ||
391 | 2023-12-21 Vladimir N. Makarov <vmakarov@redhat.com> | |
392 | ||
393 | Revert: | |
394 | 2023-12-18 Vladimir N. Makarov <vmakarov@redhat.com> | |
395 | ||
396 | PR rtl-optimization/112918 | |
397 | * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p. | |
398 | (in_class_p): Restrict condition for narrowing class in case of | |
399 | allow_all_reload_class_changes_p. | |
400 | (process_alt_operands): Pass true for | |
401 | allow_all_reload_class_changes_p in calls of in_class_p. | |
402 | (curr_insn_transform): Ditto for reg operand win. | |
403 | ||
404 | 2023-12-21 Julian Brown <julian@codesourcery.com> | |
405 | ||
406 | * gimplify.cc (omp_segregate_mapping_groups): Handle "present" groups. | |
407 | (gimplify_scan_omp_clauses): Use mapping group functionality to | |
408 | iterate through mapping nodes. Remove most gimplification of | |
409 | OMP_CLAUSE_MAP nodes from here, but still populate ctx->variables | |
410 | splay tree. | |
411 | (gimplify_adjust_omp_clauses): Move most gimplification of | |
412 | OMP_CLAUSE_MAP nodes here. | |
413 | ||
414 | 2023-12-21 Alex Coplan <alex.coplan@arm.com> | |
415 | ||
416 | PR target/113093 | |
417 | * config/aarch64/aarch64-ldp-fusion.cc (latest_hazard_before): | |
418 | If the insn is throwing, record the previous insn as a hazard to | |
419 | prevent moving it from the end of the BB. | |
420 | ||
421 | 2023-12-21 Jakub Jelinek <jakub@redhat.com> | |
422 | ||
423 | * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): | |
424 | Use unsigned char buffers for lhs1 and lhs2 instead of allocating | |
425 | them through XALLOCA. | |
426 | * collect2.cc (maybe_run_lto_and_relink): Swap xcalloc arguments. | |
427 | ||
428 | 2023-12-21 Richard Sandiford <richard.sandiford@arm.com> | |
429 | ||
430 | PR target/113094 | |
431 | * config/aarch64/aarch64-early-ra.cc (apply_allocation): Stub | |
432 | out instructions that are going to be deleted before iterating | |
433 | over the rest. | |
434 | ||
435 | 2023-12-21 Richard Sandiford <richard.sandiford@arm.com> | |
436 | ||
437 | PR target/112948 | |
438 | * config/aarch64/aarch64-early-ra.cc (find_strided_accesses): Fix | |
439 | cut-&-pasto. | |
440 | ||
441 | 2023-12-21 Jakub Jelinek <jakub@redhat.com> | |
442 | ||
443 | PR tree-optimization/112941 | |
444 | * gimple-lower-bitint.cc (gimple_lower_bitint): Disallow merging | |
445 | a cast with multiplication, division or conversion to floating point | |
446 | if rhs1 of the cast is result of another single use cast in the same | |
447 | bb. | |
448 | ||
449 | 2023-12-21 chenxiaolong <chenxiaolong@loongson.cn> | |
450 | ||
451 | * doc/extend.texi:According to the documents submitted earlier, | |
452 | Two problems with function return types and using the actual types | |
453 | of parameters instead of variable names were found and fixed. | |
454 | ||
455 | 2023-12-21 Jiajie Chen <c@jia.je> | |
456 | ||
457 | * doc/extend.texi(__lsx_vabsd_di): remove extra `i' in name. | |
458 | (__lsx_vfrintrm_d, __lsx_vfrintrm_s, __lsx_vfrintrne_d, | |
459 | __lsx_vfrintrne_s, __lsx_vfrintrp_d, __lsx_vfrintrp_s, __lsx_vfrintrz_d, | |
460 | __lsx_vfrintrz_s): fix return types. | |
461 | (__lsx_vld, __lsx_vldi, __lsx_vldrepl_b, __lsx_vldrepl_d, | |
462 | __lsx_vldrepl_h, __lsx_vldrepl_w, __lsx_vmaxi_b, __lsx_vmaxi_d, | |
463 | __lsx_vmaxi_h, __lsx_vmaxi_w, __lsx_vmini_b, __lsx_vmini_d, | |
464 | __lsx_vmini_h, __lsx_vmini_w, __lsx_vsrani_d_q, __lsx_vsrarni_d_q, | |
465 | __lsx_vsrlni_d_q, __lsx_vsrlrni_d_q, __lsx_vssrani_d_q, | |
466 | __lsx_vssrarni_d_q, __lsx_vssrarni_du_q, __lsx_vssrlni_d_q, | |
467 | __lsx_vssrlrni_du_q, __lsx_vst, __lsx_vstx, __lsx_vssrani_du_q, | |
468 | __lsx_vssrlni_du_q, __lsx_vssrlrni_d_q): add missing semicolon. | |
469 | (__lsx_vpickve2gr_bu, __lsx_vpickve2gr_hu): fix typo in return | |
470 | type. | |
471 | (__lsx_vstelm_b, __lsx_vstelm_d, __lsx_vstelm_h, | |
472 | __lsx_vstelm_w): use imm type for the last argument. | |
473 | (__lsx_vsigncov_b, __lsx_vsigncov_h, __lsx_vsigncov_w, | |
474 | __lsx_vsigncov_d): remove duplicate definitions. | |
475 | ||
476 | 2023-12-21 Jiahao Xu <xujiahao@loongson.cn> | |
477 | ||
478 | * config/loongarch/lasx.md: Use zero expansion instruction. | |
479 | * config/loongarch/lsx.md: Ditto. | |
480 | ||
481 | 2023-12-21 Alexandre Oliva <oliva@adacore.com> | |
482 | ||
483 | PR target/112778 | |
484 | * builtins.cc (try_store_by_multiple_pieces): Drop obsolete | |
485 | comment. | |
486 | ||
487 | 2023-12-21 Kewen Lin <linkw@linux.ibm.com> | |
488 | ||
489 | PR rtl-optimization/112995 | |
490 | * sel-sched.cc (try_replace_dest_reg): Check the validity of the | |
491 | replaced insn before actually replacing dest in expr. | |
492 | ||
493 | 2023-12-21 Kewen Lin <linkw@linux.ibm.com> | |
494 | ||
495 | * dbgcnt.def (sched_block): Remove. | |
496 | * sched-rgn.cc (schedule_region): Remove the support of debug count | |
497 | sched_block. | |
498 | ||
499 | 2023-12-21 Jason Merrill <jason@redhat.com> | |
500 | ||
501 | PR c++/37722 | |
502 | * doc/extend.texi: Document that computed goto does not | |
503 | call destructors. | |
504 | ||
505 | 2023-12-21 Jason Merrill <jason@redhat.com> | |
506 | ||
507 | PR c++/106213 | |
508 | * opts-common.cc (control_warning_option): Call | |
509 | handle_generated_option for all cl_var_types. | |
510 | ||
511 | 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
512 | ||
513 | PR target/113087 | |
514 | * config/riscv/riscv-v.cc (expand_select_vl): Optimize SELECT_VL. | |
515 | ||
516 | 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
517 | ||
518 | PR target/113087 | |
519 | * config/riscv/riscv-vsetvl.cc: Disallow fusion when VL modification pollutes non AVL use. | |
520 | ||
521 | 2023-12-20 Rimvydas Jasinskas <rimvydas.jas@gmail.com> | |
522 | ||
523 | * doc/invoke.texi: Document the new file extensions | |
524 | ||
525 | 2023-12-20 Richard Sandiford <richard.sandiford@arm.com> | |
526 | ||
527 | PR rtl-optimization/111702 | |
528 | * cse.cc (set::mode): Move earlier. | |
529 | (set::src_in_memory, set::src_volatile): Convert to bitfields. | |
530 | (set::is_fake_set): New member variable. | |
531 | (add_to_set): Add an is_fake_set parameter. | |
532 | (find_sets_in_insn): Update calls accordingly. | |
533 | (cse_insn): Do not apply REG_EQUAL notes to fake sets. Do not | |
534 | try to optimize them either, or validate changes to them. | |
535 | ||
536 | 2023-12-20 Kuan-Lin Chen <rufus@andestech.com> | |
537 | ||
538 | * config/riscv/predicates.md (move_operand): Reject symbolic operands | |
539 | with a type SYMBOL_FORCE_TO_MEM. | |
540 | (call_insn_operand): Support for CM_Large. | |
541 | (pcrel_symbol_operand): New. | |
542 | * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add builtin_define | |
543 | "__riscv_cmodel_large". | |
544 | * config/riscv/riscv-opts.h (riscv_code_model): Add CM_LARGE. | |
545 | * config/riscv/riscv-protos.h (riscv_symbol_type): Add | |
546 | SYMBOL_FORCE_TO_MEM. | |
547 | * config/riscv/riscv.cc (riscv_classify_symbol) Support CM_LARGE model. | |
548 | (riscv_symbol_insns) Add SYMBOL_FORCE_TO_MEM. | |
549 | (riscv_cannot_force_const_mem): Ditto. | |
550 | (riscv_split_symbol): Ditto. | |
551 | (riscv_force_address): Check pseudo reg available before force_reg. | |
552 | (riscv_size_ok_for_small_data_p): Disable in CM_LARGE model. | |
553 | (riscv_can_use_per_function_literal_pools_p): New. | |
554 | (riscv_elf_select_rtx_section): Handle per-function literal pools. | |
555 | (riscv_output_mi_thunk): Add riscv_in_thunk_func. | |
556 | (riscv_option_override): Support CM_LARGE model. | |
557 | (riscv_function_ok_for_sibcall): Disable sibcalls in CM_LARGE model. | |
558 | (riscv_in_thunk_func): New static. | |
559 | * config/riscv/riscv.md (unspec): Define UNSPEC_FORCE_FOR_MEM. | |
560 | (*large_load_address): New. | |
561 | * config/riscv/riscv.opt (code_model): New. | |
562 | ||
563 | 2023-12-20 Wang Pengcheng <wangpengcheng.pp@bytedance.com> | |
564 | ||
565 | * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition. | |
566 | ||
567 | 2023-12-20 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
568 | ||
569 | PR target/112787 | |
570 | * tree-vect-generic.cc (type_for_widest_vector_mode): Change function to | |
571 | use original vector type and check widest vector mode has at most the | |
572 | same number of elements. | |
573 | (get_compute_type): Pass original vector type rather than the element | |
574 | type to type_for_widest_vector_mode and remove now obsolete check for | |
575 | the number of elements. | |
576 | ||
577 | 2023-12-20 Siddhesh Poyarekar <siddhesh@gotplt.org> | |
578 | ||
579 | * tree-object-size.cc (object_size_info): Remove UNKNOWNS. | |
580 | Drop all references to it. | |
581 | (object_sizes_set): Move unknowns propagation code to... | |
582 | (gimplify_size_expressions): ... here. Also free reexamine | |
583 | bitmap. | |
584 | (propagate_unknowns): New parameter UNKNOWNS. Update callers. | |
585 | ||
586 | 2023-12-20 Thomas Schwinge <thomas@codesourcery.com> | |
587 | ||
588 | * config/gcn/gcn.h (LIBSTDCXX): Define to "gcc". | |
589 | ||
590 | 2023-12-20 Richard Biener <rguenther@suse.de> | |
591 | ||
592 | * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Also handle | |
593 | CTOR and VIEW_CONVERT up to the load when performing chain DCE. | |
594 | ||
595 | 2023-12-20 Xi Ruoyao <xry111@xry111.site> | |
596 | ||
597 | * config/loongarch/loongarch.cc | |
598 | (loongarch_expand_vector_init_same): Remove "temp2" and reuse | |
599 | "temp" instead. | |
600 | (loongarch_expand_vector_init): Use gcc_unreachable () instead | |
601 | of gcc_assert (0), and fix the comment for it. | |
602 | ||
603 | 2023-12-20 Xi Ruoyao <xry111@xry111.site> | |
604 | ||
605 | PR target/113033 | |
606 | * config/loongarch/loongarch.cc | |
607 | (loongarch_expand_vector_init_same): Replace gen_reg_rtx + | |
608 | emit_move_insn with force_reg. | |
609 | (loongarch_expand_vector_init): Likewise. | |
610 | ||
611 | 2023-12-20 Xi Ruoyao <xry111@xry111.site> | |
612 | ||
613 | PR target/113034 | |
614 | * config/loongarch/lasx.md (UNSPEC_LASX_XVFCMP_*): Remove. | |
615 | (lasx_xvfcmp_caf_<flasxfmt>): Remove. | |
616 | (lasx_xvfcmp_cune_<FLASX:flasxfmt>): Remove. | |
617 | (FSC256_UNS): Remove. | |
618 | (fsc256): Remove. | |
619 | (lasx_xvfcmp_<vfcond:fcc>_<FLASX:flasxfmt>): Remove. | |
620 | (lasx_xvfcmp_<fsc256>_<FLASX:flasxfmt>): Remove. | |
621 | * config/loongarch/lsx.md (UNSPEC_LSX_XVFCMP_*): Remove. | |
622 | (lsx_vfcmp_caf_<flsxfmt>): Remove. | |
623 | (lsx_vfcmp_cune_<FLSX:flsxfmt>): Remove. | |
624 | (vfcond): Remove. | |
625 | (fcc): Remove. | |
626 | (FSC_UNS): Remove. | |
627 | (fsc): Remove. | |
628 | (lsx_vfcmp_<vfcond:fcc>_<FLSX:flsxfmt>): Remove. | |
629 | (lsx_vfcmp_<fsc>_<FLSX:flsxfmt>): Remove. | |
630 | * config/loongarch/simd.md | |
631 | (fcond_simd): New define_code_iterator. | |
632 | (<simd_isa>_<x>vfcmp_<fcond:fcond_simd>_<simdfmt>): | |
633 | New define_insn. | |
634 | (fcond_simd_rev): New define_code_iterator. | |
635 | (fcond_rev_asm): New define_code_attr. | |
636 | (<simd_isa>_<x>vfcmp_<fcond:fcond_simd_rev>_<simdfmt>): | |
637 | New define_insn. | |
638 | (fcond_inv): New define_code_iterator. | |
639 | (fcond_inv_rev): New define_code_iterator. | |
640 | (fcond_inv_rev_asm): New define_code_attr. | |
641 | (<simd_isa>_<x>vfcmp_<fcond_inv>_<simdfmt>): New define_insn. | |
642 | (<simd_isa>_<x>vfcmp_<fcond_inv:fcond_inv_rev>_<simdfmt>): | |
643 | New define_insn. | |
644 | (UNSPEC_SIMD_FCMP_CAF, UNSPEC_SIMD_FCMP_SAF, | |
645 | UNSPEC_SIMD_FCMP_SEQ, UNSPEC_SIMD_FCMP_SUN, | |
646 | UNSPEC_SIMD_FCMP_SUEQ, UNSPEC_SIMD_FCMP_CNE, | |
647 | UNSPEC_SIMD_FCMP_SOR, UNSPEC_SIMD_FCMP_SUNE): New unspecs. | |
648 | (SIMD_FCMP): New define_int_iterator. | |
649 | (fcond_unspec): New define_int_attr. | |
650 | (<simd_isa>_<x>vfcmp_<fcond_unspec>_<simdfmt>): New define_insn. | |
651 | * config/loongarch/loongarch.cc (loongarch_expand_lsx_cmp): | |
652 | Remove unneeded special cases. | |
653 | ||
654 | 2023-12-20 demin.han <demin.han@starfivetech.com> | |
655 | ||
656 | * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix | |
657 | max live vregs calc | |
658 | (preferred_new_lmul_p): Ditto | |
659 | ||
660 | 2023-12-20 Jakub Jelinek <jakub@redhat.com> | |
661 | ||
662 | PR target/112962 | |
663 | * config/i386/i386-builtins.cc (ix86_builtins): Increase by one | |
664 | element. | |
665 | (def_builtin): If not -fnon-call-exceptions, set TREE_NOTHROW on | |
666 | the builtin FUNCTION_DECL. Add leaf attribute to DECL_ATTRIBUTES. | |
667 | (ix86_add_new_builtins): Likewise. | |
668 | ||
669 | 2023-12-20 Jakub Jelinek <jakub@redhat.com> | |
670 | ||
671 | PR tree-optimization/112941 | |
672 | * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): If | |
673 | save_cast_conditional, instead of adding assignment of t4 to | |
674 | m_data[save_data_cnt + 1] before m_gsi, add phi nodes such that | |
675 | t4 propagates to m_bb loop. For constant idx, use | |
676 | m_data[save_data_cnt] rather than m_data[save_data_cnt + 1] if inside | |
677 | of the m_bb loop. | |
678 | (bitint_large_huge::lower_mergeable_stmt): Clear m_bb when no longer | |
679 | expanding inside of that loop. | |
680 | (bitint_large_huge::lower_comparison_stmt): Likewise. | |
681 | (bitint_large_huge::lower_addsub_overflow): Likewise. | |
682 | (bitint_large_huge::lower_mul_overflow): Likewise. | |
683 | (bitint_large_huge::lower_bit_query): Likewise. | |
684 | ||
685 | 2023-12-20 Jakub Jelinek <jakub@redhat.com> | |
686 | ||
687 | * doc/invoke.texi (-Walloc-size): Add to the list of | |
688 | warning options, remove unnecessary line-break. | |
689 | (-Wcalloc-transposed-args): Document new warning. | |
690 | ||
691 | 2023-12-20 Alex Coplan <alex.coplan@arm.com> | |
692 | ||
693 | PR target/113062 | |
694 | * config/aarch64/aarch64-ldp-fusion.cc | |
695 | (ldp_bb_info::track_access): Punt on accesses with invalid | |
696 | register operands, move definition of mem_size closer to its | |
697 | first use. | |
698 | ||
699 | 2023-12-20 Pan Li <pan2.li@intel.com> | |
700 | ||
701 | * config/riscv/riscv-v.cc (rvv_builder::npatterns_vid_diff_repeated_p): | |
702 | New function to predicate the diff to vid is repeated or not. | |
703 | (expand_const_vector): Add restriction | |
704 | for the vid-diff code gen and implement general one. | |
705 | ||
706 | 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
707 | ||
708 | * config/riscv/riscv.cc (riscv_legitimize_move): Fix ICE. | |
709 | ||
710 | 2023-12-20 Alexandre Oliva <oliva@adacore.com> | |
711 | ||
712 | PR middle-end/112917 | |
713 | * builtins.cc (expand_bultin_stack_address): Add | |
714 | STACK_POINTER_OFFSET. | |
715 | * doc/extend.texi (__builtin_stack_address): Adjust. | |
716 | ||
717 | 2023-12-20 Alexandre Oliva <oliva@adacore.com> | |
718 | ||
719 | PR rtl-optimization/113002 | |
720 | * cfgrtl.cc (commit_one_edge_insertion): Tolerate jumps in the | |
721 | inserted sequence during expand. | |
722 | ||
723 | 2023-12-20 Alexandre Oliva <oliva@adacore.com> | |
724 | ||
725 | * builtins.cc (delta_type): New template class. | |
726 | (set_apply_args_size, get_apply_args_size): Replace with... | |
727 | (saved_apply_args_size): ... this. | |
728 | (set_apply_result_size, get_apply_result_size): Replace with... | |
729 | (saved_apply_result_size): ... this. | |
730 | (apply_args_size, apply_result_size): Adjust. | |
731 | ||
732 | 2023-12-20 Jeff Law <jlaw@ventanamicro.com> | |
733 | ||
734 | * config/mcore/mcore.h (CC1_SPEC): Do not set -funsigned-bitfields. | |
735 | ||
736 | 2023-12-20 Haochen Jiang <haochen.jiang@intel.com> | |
737 | ||
738 | * config/i386/avx512bwintrin.h: Allow 64 bit mask intrin usage | |
739 | for -mno-evex512. | |
740 | * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA2_EVEX512 | |
741 | for 64 bit mask builtins. | |
742 | * config/i386/i386.cc (ix86_hard_regno_mode_ok): Allow 64 bit | |
743 | mask register for -mno-evex512. | |
744 | * config/i386/i386.md (SWI1248_AVX512BWDQ_64): Remove | |
745 | TARGET_EVEX512. | |
746 | (*zero_extendsidi2): Change isa attribute to avx512bw. | |
747 | (kmov_isa): Ditto. | |
748 | (*anddi_1): Ditto. | |
749 | (*andn<mode>_1): Remove TARGET_EVEX512. | |
750 | (*one_cmplsi2_1_zext): Change isa attribute to avx512bw. | |
751 | (*ashl<mode>3_1): Ditto. | |
752 | (*lshr<mode>3_1): Ditto. | |
753 | * config/i386/sse.md (SWI1248_AVX512BWDQ): Remove TARGET_EVEX512. | |
754 | (SWI1248_AVX512BW): Ditto. | |
755 | (SWI1248_AVX512BWDQ2): Ditto. | |
756 | (*knotsi_1_zext): Ditto. | |
757 | (kunpckdi): Ditto. | |
758 | (SWI24_MASK): Removed. | |
759 | (vec_pack_trunc_<mode>): Change iterator from SWI24_MASK to SWI24. | |
760 | (vec_unpacks_lo_di): Remove TARGET_EVEX512. | |
761 | (SWI48x_MASK): Removed. | |
762 | (vec_unpacks_hi_<mode>): Change iterator from SWI48x_MASK to SWI48x. | |
763 | ||
764 | 2023-12-20 Siddhesh Poyarekar <siddhesh@gotplt.org> | |
765 | ||
766 | PR tree-optimization/113012 | |
767 | * tree-object-size.cc (compute_builtin_object_size): Expand | |
768 | comment for dynamic object sizes. | |
769 | (collect_object_sizes_for): Always set COMPUTED bitmap for | |
770 | dynamic object sizes. | |
771 | ||
772 | 2023-12-20 Alexandre Oliva <oliva@adacore.com> | |
773 | ||
774 | * ipa-strub.cc (gsi_insert_finally_seq_after_call): Likewise. | |
775 | (pass_ipa_strub::adjust_at_calls_call): Likewise. | |
776 | ||
777 | 2023-12-20 Alexandre Oliva <oliva@adacore.com> | |
778 | ||
779 | * gcc.cc (process_command): Use LD_PIE_SPEC only if defined. | |
780 | ||
781 | 2023-12-19 Marek Polacek <polacek@redhat.com> | |
782 | ||
783 | PR tree-optimization/113069 | |
784 | * gimple-ssa-sccopy.cc (scc_discovery): Remove unused member. | |
785 | ||
786 | 2023-12-19 Sandra Loosemore <sandra@codesourcery.com> | |
787 | ||
788 | * omp-general.cc (vendor_properties): Add "hpe". | |
789 | (atomic_default_mem_order_properties): Add "acquire" and "release". | |
790 | (omp_context_selector_matches): Handle "acquire" and "release". | |
791 | ||
792 | 2023-12-19 Sandra Loosemore <sandra@codesourcery.com> | |
793 | ||
794 | * omp-selectors.h: New file. | |
795 | * omp-general.h: Include omp-selectors.h. | |
796 | (OMP_TSS_CODE, OMP_TSS_NAME): New. | |
797 | (OMP_TS_CODE, OMP_TS_NAME): New. | |
798 | (make_trait_set_selector, make_trait_selector): Adjust declarations. | |
799 | (omp_construct_traits_to_codes): Likewise. | |
800 | (omp_context_selector_set_compare): Likewise. | |
801 | (omp_get_context_selector): Likewise. | |
802 | (omp_get_context_selector_list): New. | |
803 | * omp-general.cc (omp_construct_traits_to_codes): Pass length in | |
804 | as argument instead of returning it. Make it table-driven. | |
805 | (omp_tss_map): New. | |
806 | (kind_properties, vendor_properties, extension_properties): New. | |
807 | (atomic_default_mem_order_properties): New. | |
808 | (omp_ts_map): New. | |
809 | (omp_check_context_selector): Simplify lookup and dispatch logic. | |
810 | (omp_mark_declare_variant): Ignore variants with unknown construct | |
811 | selectors. Adjust for new representation. | |
812 | (make_trait_set_selector, make_trait_selector): Adjust for new | |
813 | representations. | |
814 | (omp_context_selector_matches): Simplify dispatch logic. Avoid | |
815 | fixed-sized buffers and adjust call to omp_construct_traits_to_codes. | |
816 | (omp_context_selector_props_compare): Adjust for new representations | |
817 | and simplify dispatch logic. | |
818 | (omp_context_selector_set_compare): Likewise. | |
819 | (omp_context_selector_compare): Likewise. | |
820 | (omp_get_context_selector): Adjust for new representations, and split | |
821 | out... | |
822 | (omp_get_context_selector_list): New function. | |
823 | (omp_lookup_tss_code): New. | |
824 | (omp_lookup_ts_code): New. | |
825 | (omp_context_compute_score): Adjust for new representations. Avoid | |
826 | fixed-sized buffers and magic numbers. Adjust call to | |
827 | omp_construct_traits_to_codes. | |
828 | * gimplify.cc (omp_construct_selector_matches): Avoid use of | |
829 | fixed-size buffer. Adjust call to omp_construct_traits_to_codes. | |
830 | ||
831 | 2023-12-19 Sandra Loosemore <sandra@codesourcery.com> | |
832 | ||
833 | * omp-general.h (OMP_TP_NAMELIST_NODE): New. | |
834 | * omp-general.cc (omp_context_name_list_prop): Move earlier | |
835 | in the file, and adjust for new representation. | |
836 | (omp_check_context_selector): Adjust this too. | |
837 | (omp_context_selector_props_compare): Likewise. | |
838 | ||
839 | 2023-12-19 Sandra Loosemore <sandra@codesourcery.com> | |
840 | ||
841 | * omp-general.h (OMP_TS_SCORE_NODE): New. | |
842 | (OMP_TSS_ID, OMP_TSS_TRAIT_SELECTORS): New. | |
843 | (OMP_TS_ID, OMP_TS_SCORE, OMP_TS_PROPERTIES): New. | |
844 | (OMP_TP_NAME, OMP_TP_VALUE): New. | |
845 | (make_trait_set_selector): Declare. | |
846 | (make_trait_selector): Declare. | |
847 | (make_trait_property): Declare. | |
848 | (omp_constructor_traits_to_codes): Rename to | |
849 | omp_construct_traits_to_codes. | |
850 | * omp-general.cc (omp_constructor_traits_to_codes): Rename | |
851 | to omp_construct_traits_to_codes. Use new accessors. | |
852 | (omp_check_context_selector): Use new accessors. | |
853 | (make_trait_set_selector): New. | |
854 | (make_trait_selector): New. | |
855 | (make_trait_property): New. | |
856 | (omp_context_name_list_prop): Use new accessors. | |
857 | (omp_context_selector_matches): Use new accessors. | |
858 | (omp_context_selector_props_compare): Use new accessors. | |
859 | (omp_context_selector_set_compare): Use new accessors. | |
860 | (omp_get_context_selector): Use new accessors. | |
861 | (omp_context_compute_score): Use new accessors. | |
862 | * gimplify.cc (omp_construct_selector_matches): Adjust for renaming | |
863 | of omp_constructor_traits_to_codes. | |
864 | ||
865 | 2023-12-19 David Faust <david.faust@oracle.com> | |
866 | ||
867 | PR debug/111735 | |
868 | * btfout.cc (btf_fwd_to_enum_p): New. | |
869 | (btf_asm_type_ref): Special case references to enum forwards. | |
870 | (btf_asm_type): Special case enum forwards. Rename btf_size_type to | |
871 | btf_size, and change chained ifs switching on btf_kind into else ifs. | |
872 | ||
873 | 2023-12-19 Richard Biener <rguenther@suse.de> | |
874 | ||
875 | PR tree-optimization/113080 | |
876 | * tree-scalar-evolution.cc (expression_expensive_p): Allow | |
877 | a tiny bit of growth due to expansion of shared trees. | |
878 | (final_value_replacement_loop): Add comment. | |
879 | ||
880 | 2023-12-19 Richard Biener <rguenther@suse.de> | |
881 | ||
882 | PR tree-optimization/113073 | |
883 | * tree-vect-stmts.cc (vectorizable_load): Properly ensure | |
884 | to exempt only vector-size aligned overreads. | |
885 | ||
886 | 2023-12-19 Roger Sayle <roger@nextmovesoftware.com> | |
887 | ||
888 | * config/i386/i386-expand.cc | |
889 | (ix86_convert_const_wide_int_to_broadcast): Remove static. | |
890 | (ix86_expand_move): Don't attempt to convert wide constants | |
891 | to SSE using ix86_convert_const_wide_int_to_broadcast here. | |
892 | (ix86_split_long_move): Always un-cprop multi-word constants. | |
893 | * config/i386/i386-expand.h | |
894 | (ix86_convert_const_wide_int_to_broadcast): Prototype here. | |
895 | * config/i386/i386-features.cc: Include i386-expand.h. | |
896 | (timode_scalar_chain::convert_insn): When converting TImode to | |
897 | V1TImode, try ix86_convert_const_wide_int_to_broadcast. | |
898 | ||
899 | 2023-12-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
900 | ||
901 | * config/riscv/riscv-v.cc (expand_const_vector): Use builder.inner_mode (). | |
902 | ||
903 | 2023-12-19 Jakub Jelinek <jakub@redhat.com> | |
904 | ||
905 | PR target/112816 | |
906 | * config/i386/mmx.md (signbitv2sf2, signbit<mode>2): Force operands[1] | |
907 | into a REG. | |
908 | ||
909 | 2023-12-19 Alex Coplan <alex.coplan@arm.com> | |
910 | ||
911 | PR target/113061 | |
912 | * config/aarch64/predicates.md (aarch64_stp_reg_operand): Fix | |
913 | parentheses to match intent. | |
914 | ||
915 | 2023-12-19 Jiufu Guo <guojiufu@linux.ibm.com> | |
916 | ||
917 | PR rtl-optimization/112525 | |
918 | PR target/30271 | |
919 | * dse.cc (get_group_info): Add arg_pointer_rtx as frame_related. | |
920 | (check_mem_read_rtx): Add parameter to indicate if it is checking mem | |
921 | for call insn. | |
922 | (scan_insn): Add mem checking on call usage. | |
923 | ||
924 | 2023-12-19 Feng Wang <wangfeng@eswincomputing.com> | |
925 | ||
926 | * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS): | |
927 | Add new macro for match function. | |
928 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): | |
929 | Add one more parameter for macro expanding. | |
930 | (handle_pragma_vector): Add match function calls. | |
931 | * config/riscv/riscv-vector-builtins.h (enum required_ext): | |
932 | Add enum defination for required extension. | |
933 | (struct function_group_info): Add one more parameter for checking required-ext. | |
934 | ||
935 | 2023-12-18 Vladimir N. Makarov <vmakarov@redhat.com> | |
936 | ||
937 | PR rtl-optimization/112918 | |
938 | * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p. | |
939 | (in_class_p): Restrict condition for narrowing class in case of | |
940 | allow_all_reload_class_changes_p. | |
941 | (process_alt_operands): Pass true for | |
942 | allow_all_reload_class_changes_p in calls of in_class_p. | |
943 | (curr_insn_transform): Ditto for reg operand win. | |
944 | ||
945 | 2023-12-18 Uros Bizjak <ubizjak@gmail.com> | |
946 | ||
947 | * config/i386/i386.md (redundant compare peephole2): | |
948 | New peephole2 pattern. | |
949 | ||
950 | 2023-12-18 Andreas Krebbel <krebbel@linux.ibm.com> | |
951 | ||
952 | * config/s390/s390.cc (s390_encode_section_info): Replace | |
953 | SYMBOL_REF_LOCAL_P with decl_binds_to_current_def_p. | |
954 | ||
955 | 2023-12-18 Andrew Pinski <quic_apinski@quicinc.com> | |
956 | ||
957 | PR tree-optimization/113054 | |
958 | * gimple-ssa-sccopy.cc: Wrap the local types | |
959 | with an anonymous namespace. | |
960 | ||
961 | 2023-12-18 Richard Biener <rguenther@suse.de> | |
962 | ||
963 | PR middle-end/111975 | |
964 | * tree-pretty-print.cc (dump_generic_node): Dump | |
965 | sizetype as __SIZETYPE__ with TDF_GIMPLE. | |
966 | Dump unnamed vector types as T [[gnu::vector_size(n)]] with | |
967 | TDF_GIMPLE. | |
968 | * tree-ssa-address.cc (create_mem_ref_raw): Never generate | |
969 | a NULL STEP when INDEX is specified. | |
970 | ||
971 | 2023-12-18 Gerald Pfeifer <gerald@pfeifer.com> | |
972 | ||
973 | PR target/69374 | |
974 | * doc/install.texi (Specific) <hppa*-hp-hpux10>: Remove section. | |
975 | (Specific) <hppa*-hp-hpux11>: Remove references to GCC 2.95 and | |
976 | 3.0. Also libffi has been ported now. | |
977 | ||
978 | 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
979 | ||
980 | PR target/112432 | |
981 | * config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0. | |
982 | (none,W21,W42,W84,W43,W86,W87,W0): Ditto. | |
983 | * config/riscv/vector.md: Ditto. | |
984 | ||
985 | 2023-12-18 Richard Biener <rguenther@suse.de> | |
986 | ||
987 | PR c/111975 | |
988 | * tree-pretty-print.cc (dump_mem_ref): Use TDF_GIMPLE path | |
989 | also for TARGET_MEM_REF and amend it. | |
990 | ||
991 | 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
992 | ||
993 | * config/riscv/riscv.cc (riscv_regmode_natural_size): Fix ICE for | |
994 | FIXED-VLMAX of -march=rv32gc_zve32f. | |
995 | ||
996 | 2023-12-18 Jakub Jelinek <jakub@redhat.com> | |
997 | ||
998 | PR tree-optimization/113013 | |
999 | * tree-object-size.cc (alloc_object_size): Return size_unknown if | |
1000 | corresponding argument(s) don't have integral type or have integral | |
1001 | type with higher precision than sizetype. Don't check arg1 >= 0 | |
1002 | uselessly. Compare argument indexes against gimple_call_num_args | |
1003 | in unsigned type rather than int. Formatting fixes. | |
1004 | ||
1005 | 2023-12-18 Pan Li <pan2.li@intel.com> | |
1006 | ||
1007 | * config/riscv/riscv-v.cc (expand_const_vector): Take step2 | |
1008 | instead of step1 for second series. | |
1009 | ||
1010 | 2023-12-18 liushuyu <liushuyu011@gmail.com> | |
1011 | ||
1012 | * config.gcc: Add loongarch-d.o to d_target_objs for LoongArch | |
1013 | architecture. | |
1014 | * config/loongarch/t-loongarch: Add object target for loongarch-d.cc. | |
1015 | * config/loongarch/loongarch-d.cc | |
1016 | (loongarch_d_target_versions): add interface function to define builtin | |
1017 | D versions for LoongArch architecture. | |
1018 | (loongarch_d_handle_target_float_abi): add interface function to define | |
1019 | builtin D traits for LoongArch architecture. | |
1020 | (loongarch_d_register_target_info): add interface function to register | |
1021 | loongarch_d_handle_target_float_abi function. | |
1022 | * config/loongarch/loongarch-d.h | |
1023 | (loongarch_d_target_versions): add function prototype. | |
1024 | (loongarch_d_register_target_info): Likewise. | |
1025 | ||
1026 | 2023-12-18 xuli <xuli1@eswincomputing.com> | |
1027 | ||
1028 | * config/riscv/vector.md: Add viota avl_type attribute. | |
1029 | ||
1030 | 2023-12-18 Pan Li <pan2.li@intel.com> | |
1031 | ||
1032 | * config/riscv/riscv.cc (riscv_expand_mult_with_const_int): | |
1033 | Change int into HOST_WIDE_INT. | |
1034 | (riscv_legitimize_poly_move): Ditto. | |
1035 | ||
1036 | 2023-12-17 Xi Ruoyao <xry111@xry111.site> | |
1037 | ||
1038 | * config/loongarch/loongarch.md (alslsi3_extend): New | |
1039 | define_insn. | |
1040 | ||
1041 | 2023-12-17 Xi Ruoyao <xry111@xry111.site> | |
1042 | ||
1043 | PR target/112936 | |
1044 | * config/loongarch/loongarch-def.cc | |
1045 | (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Update | |
1046 | instruction costs per micro-benchmark results. | |
1047 | (loongarch_rtx_cost_optimize_size): Set all instruction costs | |
1048 | to (COSTS_N_INSNS (1) + 1). | |
1049 | * config/loongarch/loongarch.cc (loongarch_rtx_costs): Remove | |
1050 | special case for multiplication when optimizing for size. | |
1051 | Adjust division cost when TARGET_64BIT && !TARGET_DIV32. | |
1052 | Account the extra cost when TARGET_CHECK_ZERO_DIV and | |
1053 | optimizing for speed. | |
1054 | ||
1055 | 2023-12-17 Xi Ruoyao <xry111@xry111.site> | |
1056 | ||
1057 | * config/loongarch/loongarch-def.cc (rtl.h): Include. | |
1058 | (COSTS_N_INSNS): Remove the macro definition. | |
1059 | ||
1060 | 2023-12-17 Gerald Pfeifer <gerald@pfeifer.com> | |
1061 | ||
1062 | PR target/69374 | |
1063 | * doc/install.texi (Specific) <hppa*-hp-hpux*>: Remove a note on | |
1064 | GCC 4.3. | |
1065 | Remove details on how the HP assembler, which we document as not | |
1066 | working, breaks. | |
1067 | <hppa*-hp-hpux11>: Note that only the HP linker is supported. | |
1068 | ||
1069 | 2023-12-17 Gerald Pfeifer <gerald@pfeifer.com> | |
1070 | ||
1071 | PR other/69374 | |
1072 | * doc/install.texi (Installing GCC): Remove reference to | |
1073 | buildstat.html. | |
1074 | (Testing): Ditto. | |
1075 | (Final install): Remove section on submitting information for | |
1076 | buildstat.html. Adjust the request for feedback. | |
1077 | ||
1078 | 2023-12-16 David Malcolm <dmalcolm@redhat.com> | |
1079 | ||
1080 | * json.cc (print_escaped_json_string): New, taken from | |
1081 | string::print. | |
1082 | (object::print): Use it for printing keys. | |
1083 | (string::print): Move implementation to | |
1084 | print_escaped_json_string. | |
1085 | (selftest::test_writing_objects): Add a key containing | |
1086 | quote, backslash, and control characters. | |
1087 | ||
1088 | 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
1089 | ||
1090 | * config/aarch64/aarch64-feature-deps.h (fmv_deps_<FEAT_NAME>): | |
1091 | Define aarch64_feature_flags mask foreach FMV feature. | |
1092 | * config/aarch64/aarch64-option-extensions.def: Use new macros | |
1093 | to define FMV feature extensions. | |
1094 | * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p): | |
1095 | Check for target_version attribute after processing target | |
1096 | attribute. | |
1097 | (aarch64_fmv_feature_data): New. | |
1098 | (aarch64_parse_fmv_features): New. | |
1099 | (aarch64_process_target_version_attr): New. | |
1100 | (aarch64_option_valid_version_attribute_p): New. | |
1101 | (get_feature_mask_for_version): New. | |
1102 | (compare_feature_masks): New. | |
1103 | (aarch64_compare_version_priority): New. | |
1104 | (build_ifunc_arg_type): New. | |
1105 | (make_resolver_func): New. | |
1106 | (add_condition_to_bb): New. | |
1107 | (dispatch_function_versions): New. | |
1108 | (aarch64_generate_version_dispatcher_body): New. | |
1109 | (aarch64_get_function_versions_dispatcher): New. | |
1110 | (aarch64_common_function_versions): New. | |
1111 | (aarch64_mangle_decl_assembler_name): New. | |
1112 | (TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P): New implementation. | |
1113 | (TARGET_OPTION_EXPANDED_CLONES_ATTRIBUTE): New implementation. | |
1114 | (TARGET_OPTION_FUNCTION_VERSIONS): New implementation. | |
1115 | (TARGET_COMPARE_VERSION_PRIORITY): New implementation. | |
1116 | (TARGET_GENERATE_VERSION_DISPATCHER_BODY): New implementation. | |
1117 | (TARGET_GET_FUNCTION_VERSIONS_DISPATCHER): New implementation. | |
1118 | (TARGET_MANGLE_DECL_ASSEMBLER_NAME): New implementation. | |
1119 | * config/aarch64/aarch64.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): | |
1120 | Set target macro. | |
1121 | * config/arm/aarch-common.h (enum aarch_parse_opt_result): Add | |
1122 | new value to report duplicate FMV feature. | |
1123 | * common/config/aarch64/cpuinfo.h: New file. | |
1124 | ||
1125 | 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
1126 | ||
1127 | * attribs.cc (decl_attributes): Pass attribute name to target. | |
1128 | (is_function_default_version): Update comment to specify | |
1129 | incompatibility with target_version attributes. | |
1130 | * cgraphclones.cc (cgraph_node::create_version_clone_with_body): | |
1131 | Call valid_version_attribute_p for target_version attributes. | |
1132 | * defaults.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): New macro. | |
1133 | * target.def (valid_version_attribute_p): New hook. | |
1134 | * doc/tm.texi.in: Add new hook. | |
1135 | * doc/tm.texi: Regenerate. | |
1136 | * multiple_target.cc (create_dispatcher_calls): Remove redundant | |
1137 | is_function_default_version check. | |
1138 | (expand_target_clones): Use target macro to pick attribute name. | |
1139 | * targhooks.cc (default_target_option_valid_version_attribute_p): | |
1140 | New. | |
1141 | * targhooks.h (default_target_option_valid_version_attribute_p): | |
1142 | New. | |
1143 | * tree.h (DECL_FUNCTION_VERSIONED): Update comment to include | |
1144 | target_version attributes. | |
1145 | ||
1146 | 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
1147 | ||
1148 | * common/config/aarch64/aarch64-common.cc | |
1149 | (struct aarch64_option_extension): Remove unused field. | |
1150 | (all_extensions): Ditto. | |
1151 | (aarch64_get_extension_string_for_isa_flags): Remove filtering | |
1152 | of features without native detection. | |
1153 | * config/aarch64/driver-aarch64.cc (host_detect_local_cpu): | |
1154 | Explicitly add expected features that lack cpuinfo detection. | |
1155 | ||
1156 | 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
1157 | ||
1158 | * common/config/aarch64/aarch64-common.cc | |
1159 | (aarch64_get_extension_string_for_isa_flags): Fix generation of | |
1160 | the "+nocrypto" extension. | |
1161 | * config/aarch64/aarch64.h (AARCH64_ISA_CRYPTO): Remove. | |
1162 | (TARGET_CRYPTO): Remove. | |
1163 | * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): | |
1164 | Don't use TARGET_CRYPTO. | |
1165 | ||
1166 | 2023-12-15 Mary Bennett <mary.bennett@embecosm.com> | |
1167 | ||
1168 | * config/riscv/constraints.md: CVP2 -> CV_alu_pow2. | |
1169 | * config/riscv/corev.md: Likewise. | |
1170 | ||
1171 | 2023-12-15 Mary Bennett <mary.bennett@embecosm.com> | |
1172 | ||
1173 | * common/config/riscv/riscv-common.cc: Add XCVelw. | |
1174 | * config/riscv/corev.def: Likewise. | |
1175 | * config/riscv/corev.md: Likewise. | |
1176 | * config/riscv/riscv-builtins.cc (AVAIL): Likewise. | |
1177 | * config/riscv/riscv-ftypes.def: Likewise. | |
1178 | * config/riscv/riscv.opt: Likewise. | |
1179 | * doc/extend.texi: Add XCVelw builtin documentation. | |
1180 | * doc/sourcebuild.texi: Likewise. | |
1181 | ||
1182 | 2023-12-15 Jeff Law <jlaw@ventanamicro.com> | |
1183 | ||
1184 | PR target/110201 | |
1185 | * config/riscv/constraints.md (D03, DsA): Remove unused constraints. | |
1186 | * config/riscv/predicates.md (const_0_3_operand): New predicate. | |
1187 | (const_0_10_operand): Likewise. | |
1188 | * config/riscv/crypto.md (riscv_aes32dsi): Use new predicate. Drop | |
1189 | unnecessary constraint. | |
1190 | (riscv_aes32dsmi, riscv_aes64im, riscv_aes32esi): Likewise. | |
1191 | (riscv_aes32esmi, *riscv_<sm4_op>_si): Likewise. | |
1192 | (riscv_<sm4_op>_di_extend, riscv_<sm4_op>_si): Likewise. | |
1193 | ||
1194 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1195 | ||
1196 | * config.gcc: Add aarch64-ldp-fusion.o to extra_objs for aarch64. | |
1197 | * config/aarch64/aarch64-passes.def: Add copies of pass_ldp_fusion | |
1198 | before and after RA. | |
1199 | * config/aarch64/aarch64-protos.h (make_pass_ldp_fusion): Declare. | |
1200 | * config/aarch64/aarch64.opt (-mearly-ldp-fusion): New. | |
1201 | (-mlate-ldp-fusion): New. | |
1202 | (--param=aarch64-ldp-alias-check-limit): New. | |
1203 | (--param=aarch64-ldp-writeback): New. | |
1204 | * config/aarch64/t-aarch64: Add rule for aarch64-ldp-fusion.o. | |
1205 | * config/aarch64/aarch64-ldp-fusion.cc: New file. | |
1206 | * doc/invoke.texi (AArch64 Options): Document new | |
1207 | -m{early,late}-ldp-fusion options. | |
1208 | ||
1209 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1210 | ||
1211 | * config/aarch64/aarch64-ldpstp.md: Abstract ldp/stp | |
1212 | representation from peepholes, allowing use of new form. | |
1213 | * config/aarch64/aarch64-modes.def (V2x4QImode): Define. | |
1214 | * config/aarch64/aarch64-protos.h | |
1215 | (aarch64_finish_ldpstp_peephole): Declare. | |
1216 | (aarch64_swap_ldrstr_operands): Delete declaration. | |
1217 | (aarch64_gen_load_pair): Adjust parameters. | |
1218 | (aarch64_gen_store_pair): Likewise. | |
1219 | * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>): | |
1220 | Delete. | |
1221 | (vec_store_pair<DREG:mode><DREG2:mode>): Delete. | |
1222 | (load_pair<VQ:mode><VQ2:mode>): Delete. | |
1223 | (vec_store_pair<VQ:mode><VQ2:mode>): Delete. | |
1224 | * config/aarch64/aarch64.cc (aarch64_pair_mode_for_mode): New. | |
1225 | (aarch64_gen_store_pair): Adjust to use new unspec form of stp. | |
1226 | Drop second mem from parameters. | |
1227 | (aarch64_gen_load_pair): Likewise. | |
1228 | (aarch64_pair_mem_from_base): New. | |
1229 | (aarch64_save_callee_saves): Emit REG_CFA_OFFSET notes for | |
1230 | frame-related saves. Adjust call to aarch64_gen_store_pair | |
1231 | (aarch64_restore_callee_saves): Adjust calls to | |
1232 | aarch64_gen_load_pair to account for change in interface. | |
1233 | (aarch64_process_components): Likewise. | |
1234 | (aarch64_classify_address): Handle 32-byte pair mems in | |
1235 | LDP_STP_N case. | |
1236 | (aarch64_print_operand): Likewise. | |
1237 | (aarch64_copy_one_block_and_progress_pointers): Adjust calls to | |
1238 | account for change in aarch64_gen_{load,store}_pair interface. | |
1239 | (aarch64_set_one_block_and_progress_pointer): Likewise. | |
1240 | (aarch64_finish_ldpstp_peephole): New. | |
1241 | (aarch64_gen_adjusted_ldpstp): Adjust to use generation helper. | |
1242 | * config/aarch64/aarch64.md (ldpstp): New attribute. | |
1243 | (load_pair_sw_<SX:mode><SX2:mode>): Delete. | |
1244 | (load_pair_dw_<DX:mode><DX2:mode>): Delete. | |
1245 | (load_pair_dw_<TX:mode><TX2:mode>): Delete. | |
1246 | (*load_pair_<ldst_sz>): New. | |
1247 | (*load_pair_16): New. | |
1248 | (store_pair_sw_<SX:mode><SX2:mode>): Delete. | |
1249 | (store_pair_dw_<DX:mode><DX2:mode>): Delete. | |
1250 | (store_pair_dw_<TX:mode><TX2:mode>): Delete. | |
1251 | (*store_pair_<ldst_sz>): New. | |
1252 | (*store_pair_16): New. | |
1253 | (*load_pair_extendsidi2_aarch64): Adjust to use new form. | |
1254 | (*zero_extendsidi2_aarch64): Likewise. | |
1255 | * config/aarch64/iterators.md (VPAIR): New. | |
1256 | * config/aarch64/predicates.md (aarch64_mem_pair_operand): Change to | |
1257 | a special predicate derived from aarch64_mem_pair_operator. | |
1258 | ||
1259 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1260 | ||
1261 | * config/aarch64/aarch64-protos.h (aarch64_ldpstp_operand_mode_p): Declare. | |
1262 | * config/aarch64/aarch64.cc (aarch64_gen_storewb_pair): Build RTL | |
1263 | directly instead of invoking named pattern. | |
1264 | (aarch64_gen_loadwb_pair): Likewise. | |
1265 | (aarch64_ldpstp_operand_mode_p): New. | |
1266 | * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Replace with | |
1267 | ... | |
1268 | (*loadwb_post_pair_<ldst_sz>): ... this. Generalize as described | |
1269 | in cover letter. | |
1270 | (loadwb_pair<GPF:mode>_<P:mode>): Delete (superseded by the | |
1271 | above). | |
1272 | (*loadwb_post_pair_16): New. | |
1273 | (*loadwb_pre_pair_<ldst_sz>): New. | |
1274 | (loadwb_pair<TX:mode>_<P:mode>): Delete. | |
1275 | (*loadwb_pre_pair_16): New. | |
1276 | (storewb_pair<GPI:mode>_<P:mode>): Replace with ... | |
1277 | (*storewb_pre_pair_<ldst_sz>): ... this. Generalize as | |
1278 | described in cover letter. | |
1279 | (*storewb_pre_pair_16): New. | |
1280 | (storewb_pair<GPF:mode>_<P:mode>): Delete. | |
1281 | (*storewb_post_pair_<ldst_sz>): New. | |
1282 | (storewb_pair<TX:mode>_<P:mode>): Delete. | |
1283 | (*storewb_post_pair_16): New. | |
1284 | * config/aarch64/predicates.md (aarch64_mem_pair_operator): New. | |
1285 | (pmode_plus_operator): New. | |
1286 | (aarch64_ldp_reg_operand): New. | |
1287 | (aarch64_stp_reg_operand): New. | |
1288 | ||
1289 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1290 | ||
1291 | * config/aarch64/aarch64.cc (aarch64_print_address_internal): Handle SVE | |
1292 | modes when printing ldp/stp addresses. | |
1293 | ||
1294 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1295 | ||
1296 | * config/aarch64/aarch64-protos.h (aarch64_const_zero_rtx_p): New. | |
1297 | * config/aarch64/aarch64.cc (aarch64_const_zero_rtx_p): New. | |
1298 | Use it ... | |
1299 | (aarch64_print_operand): ... here. Recognize CONST0_RTXes in | |
1300 | modes other than VOIDmode. | |
1301 | ||
1302 | 2023-12-15 Xiao Zeng <zengxiao@eswincomputing.com> | |
1303 | ||
1304 | * common/config/riscv/riscv-common.cc: | |
1305 | (riscv_implied_info): Add zvfbfmin item. | |
1306 | (riscv_ext_version_table): Ditto. | |
1307 | (riscv_ext_flag_table): Ditto. | |
1308 | * config/riscv/riscv.opt: | |
1309 | (MASK_ZVFBFMIN): New macro. | |
1310 | (MASK_VECTOR_ELEN_BF_16): Ditto. | |
1311 | (TARGET_ZVFBFMIN): Ditto. | |
1312 | ||
1313 | 2023-12-15 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
1314 | ||
1315 | * config/aarch64/aarch64.opt (aarch64_mops_memmove_size_threshold): | |
1316 | Change default. | |
1317 | * config/aarch64/aarch64.md (cpymemdi): Add a parameter. | |
1318 | (movmemdi): Call aarch64_expand_cpymem. | |
1319 | * config/aarch64/aarch64.cc (aarch64_copy_one_block): Rename function, | |
1320 | simplify, support storing generated loads/stores. | |
1321 | (aarch64_expand_cpymem): Support expansion of memmove. | |
1322 | * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem): Add bool arg. | |
1323 | ||
1324 | 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
1325 | ||
1326 | * config/riscv/riscv-v.cc (shuffle_merge_patterns): Fix bug. | |
1327 | ||
1328 | 2023-12-15 Jakub Jelinek <jakub@redhat.com> | |
1329 | ||
1330 | * target.h (struct bitint_info): Add abi_limb_mode member, adjust | |
1331 | comment. | |
1332 | * target.def (bitint_type_info): Mention abi_limb_mode instead of | |
1333 | limb_mode. | |
1334 | * varasm.cc (output_constant): Use abi_limb_mode rather than | |
1335 | limb_mode. | |
1336 | * stor-layout.cc (finish_bitfield_representative): Likewise. Assert | |
1337 | that if precision is smaller or equal to abi_limb_mode precision or | |
1338 | if info.big_endian is different from WORDS_BIG_ENDIAN, info.limb_mode | |
1339 | must be the same as info.abi_limb_mode. | |
1340 | (layout_type): Use abi_limb_mode rather than limb_mode. | |
1341 | * gimple-fold.cc (clear_padding_bitint_needs_padding_p): Likewise. | |
1342 | (clear_padding_type): Likewise. | |
1343 | * config/i386/i386.cc (ix86_bitint_type_info): Also set | |
1344 | info->abi_limb_mode. | |
1345 | * doc/tm.texi: Regenerated. | |
1346 | ||
1347 | 2023-12-15 Julian Brown <julian@codesourcery.com> | |
1348 | ||
1349 | * gimplify.cc (extract_base_bit_offset): Add VARIABLE_OFFSET parameter. | |
1350 | (omp_get_attachment, omp_group_last, omp_group_base, | |
1351 | omp_directive_maps_explicitly): Add GOMP_MAP_STRUCT_UNORD support. | |
1352 | (omp_accumulate_sibling_list): Update calls to extract_base_bit_offset. | |
1353 | Support GOMP_MAP_STRUCT_UNORD. | |
1354 | (omp_build_struct_sibling_lists, gimplify_scan_omp_clauses, | |
1355 | gimplify_adjust_omp_clauses, gimplify_omp_target_update): Add | |
1356 | GOMP_MAP_STRUCT_UNORD support. | |
1357 | * omp-low.cc (lower_omp_target): Add GOMP_MAP_STRUCT_UNORD support. | |
1358 | * tree-pretty-print.cc (dump_omp_clause): Likewise. | |
1359 | ||
1360 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1361 | ||
1362 | PR target/112906 | |
1363 | * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le): | |
1364 | Use force_reload_address to reload addresses that aren't suitable for | |
1365 | ld1rq in the pre-RA splitter. | |
1366 | ||
1367 | 2023-12-15 Alex Coplan <alex.coplan@arm.com> | |
1368 | ||
1369 | PR target/112906 | |
1370 | * emit-rtl.cc (address_reload_context::emit_autoinc): New. | |
1371 | (force_reload_address): New. | |
1372 | * emit-rtl.h (struct address_reload_context): Declare. | |
1373 | (force_reload_address): Declare. | |
1374 | * lra-constraints.cc (class lra_autoinc_reload_context): New. | |
1375 | (emit_inc): Drop IN parameter, invoke | |
1376 | code moved to emit-rtl.cc:address_reload_context::emit_autoinc. | |
1377 | (curr_insn_transform): Drop redundant IN parameter in call to | |
1378 | emit_inc. | |
1379 | * recog.h (class recog_data_saver): New. | |
1380 | ||
1381 | 2023-12-15 Jakub Jelinek <jakub@redhat.com> | |
1382 | ||
1383 | PR tree-optimization/113024 | |
1384 | * match.pd (two conversions in a row): Simplify scalar integer | |
1385 | sign-extension followed by truncation. | |
1386 | ||
1387 | 2023-12-15 Jakub Jelinek <jakub@redhat.com> | |
1388 | ||
1389 | PR tree-optimization/113003 | |
1390 | * gimple-lower-bitint.cc (arith_overflow_arg_kind): New function. | |
1391 | (gimple_lower_bitint): Use it to catch .{ADD,SUB,MUL}_OVERFLOW | |
1392 | calls with large/huge INTEGER_CST arguments. | |
1393 | ||
1394 | 2023-12-15 Gerald Pfeifer <gerald@pfeifer.com> | |
1395 | ||
1396 | * doc/install.texi (Specific) <nvptx-*-none>: Update nvptx-tools | |
1397 | Github link. | |
1398 | ||
1399 | 2023-12-15 Hongyu Wang <hongyu.wang@intel.com> | |
1400 | ||
1401 | PR target/112824 | |
1402 | * config/i386/i386-options.cc (ix86_option_override_internal): | |
1403 | Sync ix86_move_max/ix86_store_max with prefer_vector_width when | |
1404 | it is explicitly set. | |
1405 | ||
1406 | 2023-12-15 Haochen Jiang <haochen.jiang@intel.com> | |
1407 | ||
1408 | * config/i386/driver-i386.cc (host_detect_local_cpu): Do not | |
1409 | set Grand Ridge depending on RAO-INT. | |
1410 | * config/i386/i386.h: Remove PTA_RAOINT from PTA_GRANDRIDGE. | |
1411 | * doc/invoke.texi: Adjust documentation. | |
1412 | ||
1413 | 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
1414 | ||
1415 | PR target/112387 | |
1416 | * config/riscv/riscv.cc: Adapt generic cost model same ARM SVE. | |
1417 | ||
1418 | 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
1419 | ||
1420 | PR target/111153 | |
1421 | * tree-vect-loop.cc (vect_estimate_min_profitable_iters): | |
1422 | Remove address cost for select_vl/decrement IV. | |
1423 | ||
1424 | 2023-12-14 Andrew Pinski <quic_apinski@quicinc.com> | |
1425 | ||
1426 | PR middle-end/111260 | |
1427 | * optabs.cc (emit_conditional_move): Change the modes to be | |
1428 | equal before forcing the constant to a register. | |
1429 | ||
1430 | 2023-12-14 Di Zhao <dizhao@os.amperecomputing.com> | |
1431 | ||
1432 | PR tree-optimization/110279 | |
1433 | * doc/invoke.texi: New parameter fully-pipelined-fma. | |
1434 | * params.opt: New parameter fully-pipelined-fma. | |
1435 | * tree-ssa-reassoc.cc (get_mult_latency_consider_fma): Return | |
1436 | the latency of MULT_EXPRs that can't be hidden by the FMAs. | |
1437 | (get_reassociation_width): Search for a smaller width | |
1438 | considering the benefit of fully pipelined FMA. | |
1439 | (rank_ops_for_fma): Return the number of MULT_EXPRs. | |
1440 | (reassociate_bb): Pass the number of MULT_EXPRs to | |
1441 | get_reassociation_width; avoid calling | |
1442 | get_reassociation_width twice. | |
1443 | ||
1444 | 2023-12-14 Robin Dapp <rdapp@ventanamicro.com> | |
1445 | ||
1446 | PR target/112999 | |
1447 | * expmed.cc (extract_bit_field_1): Ensure better mode | |
1448 | has fitting unit_precision. | |
1449 | ||
1450 | 2023-12-14 Robin Dapp <rdapp@ventanamicro.com> | |
1451 | ||
1452 | PR target/112773 | |
1453 | * config/riscv/autovec.md (vec_extract<mode>bi): New expander | |
1454 | calling vec_extract<mode>qi. | |
1455 | * config/riscv/riscv-protos.h (riscv_legitimize_poly_move): | |
1456 | Export. | |
1457 | (emit_vec_extract): Change argument from poly_int64 to rtx. | |
1458 | * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): | |
1459 | Ditto. | |
1460 | * config/riscv/riscv.cc (riscv_legitimize_poly_move): Export. | |
1461 | (riscv_legitimize_move): Use rtx instead of poly_int64. | |
1462 | * expmed.cc (store_bit_field_1): Change BITSIZE to PRECISION. | |
1463 | (extract_bit_field_1): Change BITSIZE to PRECISION and use | |
1464 | return mode from insn_data as target mode. | |
1465 | ||
1466 | 2023-12-14 Alex Coplan <alex.coplan@arm.com> | |
1467 | ||
1468 | * doc/extend.texi: Document AArch64 Operand Modifiers. | |
1469 | ||
1470 | 2023-12-14 Richard Biener <rguenther@suse.de> | |
1471 | ||
1472 | PR tree-optimization/113018 | |
1473 | * tree-vect-slp.cc (vect_slp_check_for_roots): Only start | |
1474 | SLP discovery from stmts with a LHS. | |
1475 | ||
1476 | 2023-12-14 Richard Biener <rguenther@suse.de> | |
1477 | ||
1478 | PR tree-optimization/112793 | |
1479 | * tree-vect-slp.cc (vect_schedule_slp_node): Already | |
1480 | code-generated constant/external nodes are OK. | |
1481 | ||
1482 | 2023-12-14 Richard Sandiford <richard.sandiford@arm.com> | |
1483 | ||
1484 | * config/aarch64/aarch64-early-ra.cc (allocno_info::is_equiv): New | |
1485 | member variable. | |
1486 | (allocno_info::equiv_allocno): Replace with... | |
1487 | (allocno_info::related_allocno): ...this member variable. | |
1488 | (allocno_info::chain_prev): Put into an enum with... | |
1489 | (allocno_info::last_use_point): ...this new member variable. | |
1490 | (color_info::num_fpr_preferences): New member variable. | |
1491 | (early_ra::m_shared_allocnos): Likewise. | |
1492 | (allocno_info::is_shared): New member function. | |
1493 | (allocno_info::is_equiv_to): Likewise. | |
1494 | (early_ra::dump_allocnos): Dump sharing information. Tweak column | |
1495 | widths. | |
1496 | (early_ra::fpr_preference): Check ALLOWS_NONFPR before returning -2. | |
1497 | (early_ra::start_new_region): Handle m_shared_allocnos. | |
1498 | (early_ra::create_allocno_group): Set related_allocno rather than | |
1499 | equiv_allocno. | |
1500 | (early_ra::record_allocno_use): Likewise. Detect multiple calls | |
1501 | for the same program point. Update last_use_point and is_equiv. | |
1502 | Clear is_strong_copy_src rather than is_strong_copy_dest. | |
1503 | (early_ra::record_allocno_def): Use related_allocno rather than | |
1504 | equiv_allocno. Update last_use_point. | |
1505 | (early_ra::valid_equivalence_p): Replace with... | |
1506 | (early_ra::find_related_start): ...this new function. | |
1507 | (early_ra::record_copy): Look for cases where a destination copy chain | |
1508 | can be shared with the source allocno. | |
1509 | (early_ra::find_strided_accesses): Update for equiv_allocno-> | |
1510 | related_allocno change. Only call consider_strong_copy_src_chain | |
1511 | at the head of a copy chain. | |
1512 | (early_ra::is_chain_candidate): Skip shared allocnos. Update for | |
1513 | new representation of equivalent allocnos. | |
1514 | (early_ra::chain_allocnos): Update for new representation of | |
1515 | equivalent allocnos. | |
1516 | (early_ra::try_to_chain_allocnos): Likewise. | |
1517 | (early_ra::merge_fpr_info): New function, split out from... | |
1518 | (early_ra::set_single_color_rep): ...here. | |
1519 | (early_ra::form_chains): Handle shared allocnos. | |
1520 | (early_ra::process_copies): Count the number of FPR preferences. | |
1521 | (early_ra::cmp_decreasing_size): Rename to... | |
1522 | (early_ra::cmp_allocation_order): ...this. Sort equal-sized groups | |
1523 | by the number of FPR preferences. | |
1524 | (early_ra::finalize_allocation): Handle shared allocnos. | |
1525 | (early_ra::process_region): Reset chain_prev as well as chain_next. | |
1526 | ||
1527 | 2023-12-14 Alexandre Oliva <oliva@adacore.com> | |
1528 | ||
1529 | PR middle-end/112938 | |
1530 | * ipa-strub.cc (pass_ipa_strub::execute): Pass volatile args | |
1531 | by reference to internal strub wrapped bodies. | |
1532 | ||
1533 | 2023-12-14 Alexandre Oliva <oliva@adacore.com> | |
1534 | ||
1535 | PR middle-end/112938 | |
1536 | * ipa-strub.cc (pass_ipa_strub::execute): Handle promoted | |
1537 | volatile args in internal strub. Simplify. | |
1538 | ||
1539 | 2023-12-14 Thomas Schwinge <thomas@codesourcery.com> | |
1540 | ||
1541 | * gimple-ssa-sccopy.cc: '#define INCLUDE_ALGORITHM' instead of | |
1542 | '#include <algorithm>'. | |
1543 | ||
1544 | 2023-12-14 Feng Wang <wangfeng@eswincomputing.com> | |
1545 | ||
1546 | Revert: | |
1547 | 2023-12-12 Feng Wang <wangfeng@eswincomputing.com> | |
1548 | ||
1549 | * config/riscv/riscv-vector-builtins-functions.def (DEF_RVV_FUNCTION): | |
1550 | Add AVAIL argument. | |
1551 | (read_vl): Using AVAIL argument default value. | |
1552 | (vlenb): Ditto. | |
1553 | (vsetvl): Ditto. | |
1554 | (vsetvlmax): Ditto. | |
1555 | (vle): Ditto. | |
1556 | (vse): Ditto. | |
1557 | (vlm): Ditto. | |
1558 | (vsm): Ditto. | |
1559 | (vlse): Ditto. | |
1560 | (vsse): Ditto. | |
1561 | (vluxei8): Ditto. | |
1562 | (vluxei16): Ditto. | |
1563 | (vluxei32): Ditto. | |
1564 | (vluxei64): Ditto. | |
1565 | (vloxei8): Ditto. | |
1566 | (vloxei16): Ditto. | |
1567 | (vloxei32): Ditto. | |
1568 | (vloxei64): Ditto. | |
1569 | (vsuxei8): Ditto. | |
1570 | (vsuxei16): Ditto. | |
1571 | (vsuxei32): Ditto. | |
1572 | (vsuxei64): Ditto. | |
1573 | (vsoxei8): Ditto. | |
1574 | (vsoxei16): Ditto. | |
1575 | (vsoxei32): Ditto. | |
1576 | (vsoxei64): Ditto. | |
1577 | (vleff): Ditto. | |
1578 | (vadd): Ditto. | |
1579 | (vsub): Ditto. | |
1580 | (vrsub): Ditto. | |
1581 | (vneg): Ditto. | |
1582 | (vwaddu): Ditto. | |
1583 | (vwsubu): Ditto. | |
1584 | (vwadd): Ditto. | |
1585 | (vwsub): Ditto. | |
1586 | (vwcvt_x): Ditto. | |
1587 | (vwcvtu_x): Ditto. | |
1588 | (vzext): Ditto. | |
1589 | (vsext): Ditto. | |
1590 | (vadc): Ditto. | |
1591 | (vmadc): Ditto. | |
1592 | (vsbc): Ditto. | |
1593 | (vmsbc): Ditto. | |
1594 | (vand): Ditto. | |
1595 | (vor): Ditto. | |
1596 | (vxor): Ditto. | |
1597 | (vnot): Ditto. | |
1598 | (vsll): Ditto. | |
1599 | (vsra): Ditto. | |
1600 | (vsrl): Ditto. | |
1601 | (vnsrl): Ditto. | |
1602 | (vnsra): Ditto. | |
1603 | (vncvt_x): Ditto. | |
1604 | (vmseq): Ditto. | |
1605 | (vmsne): Ditto. | |
1606 | (vmsltu): Ditto. | |
1607 | (vmslt): Ditto. | |
1608 | (vmsleu): Ditto. | |
1609 | (vmsle): Ditto. | |
1610 | (vmsgtu): Ditto. | |
1611 | (vmsgt): Ditto. | |
1612 | (vmsgeu): Ditto. | |
1613 | (vmsge): Ditto. | |
1614 | (vminu): Ditto. | |
1615 | (vmin): Ditto. | |
1616 | (vmaxu): Ditto. | |
1617 | (vmax): Ditto. | |
1618 | (vmul): Ditto. | |
1619 | (vmulh): Ditto. | |
1620 | (vmulhu): Ditto. | |
1621 | (vmulhsu): Ditto. | |
1622 | (vdivu): Ditto. | |
1623 | (vdiv): Ditto. | |
1624 | (vremu): Ditto. | |
1625 | (vrem): Ditto. | |
1626 | (vwmul): Ditto. | |
1627 | (vwmulu): Ditto. | |
1628 | (vwmulsu): Ditto. | |
1629 | (vmacc): Ditto. | |
1630 | (vnmsac): Ditto. | |
1631 | (vmadd): Ditto. | |
1632 | (vnmsub): Ditto. | |
1633 | (vwmaccu): Ditto. | |
1634 | (vwmacc): Ditto. | |
1635 | (vwmaccsu): Ditto. | |
1636 | (vwmaccus): Ditto. | |
1637 | (vmerge): Ditto. | |
1638 | (vmv_v): Ditto. | |
1639 | (vsaddu): Ditto. | |
1640 | (vsadd): Ditto. | |
1641 | (vssubu): Ditto. | |
1642 | (vssub): Ditto. | |
1643 | (vaaddu): Ditto. | |
1644 | (vaadd): Ditto. | |
1645 | (vasubu): Ditto. | |
1646 | (vasub): Ditto. | |
1647 | (vsmul): Ditto. | |
1648 | (vssrl): Ditto. | |
1649 | (vssra): Ditto. | |
1650 | (vnclipu): Ditto. | |
1651 | (vnclip): Ditto. | |
1652 | (vfadd): Ditto. | |
1653 | (vfsub): Ditto. | |
1654 | (vfrsub): Ditto. | |
1655 | (vfadd_frm): Ditto. | |
1656 | (vfsub_frm): Ditto. | |
1657 | (vfrsub_frm): Ditto. | |
1658 | (vfwadd): Ditto. | |
1659 | (vfwsub): Ditto. | |
1660 | (vfwadd_frm): Ditto. | |
1661 | (vfwsub_frm): Ditto. | |
1662 | (vfmul): Ditto. | |
1663 | (vfdiv): Ditto. | |
1664 | (vfrdiv): Ditto. | |
1665 | (vfmul_frm): Ditto. | |
1666 | (vfdiv_frm): Ditto. | |
1667 | (vfrdiv_frm): Ditto. | |
1668 | (vfwmul): Ditto. | |
1669 | (vfwmul_frm): Ditto. | |
1670 | (vfmacc): Ditto. | |
1671 | (vfnmsac): Ditto. | |
1672 | (vfmadd): Ditto. | |
1673 | (vfnmsub): Ditto. | |
1674 | (vfnmacc): Ditto. | |
1675 | (vfmsac): Ditto. | |
1676 | (vfnmadd): Ditto. | |
1677 | (vfmsub): Ditto. | |
1678 | (vfmacc_frm): Ditto. | |
1679 | (vfnmacc_frm): Ditto. | |
1680 | (vfmsac_frm): Ditto. | |
1681 | (vfnmsac_frm): Ditto. | |
1682 | (vfmadd_frm): Ditto. | |
1683 | (vfnmadd_frm): Ditto. | |
1684 | (vfmsub_frm): Ditto. | |
1685 | (vfnmsub_frm): Ditto. | |
1686 | (vfwmacc): Ditto. | |
1687 | (vfwnmacc): Ditto. | |
1688 | (vfwmsac): Ditto. | |
1689 | (vfwnmsac): Ditto. | |
1690 | (vfwmacc_frm): Ditto. | |
1691 | (vfwnmacc_frm): Ditto. | |
1692 | (vfwmsac_frm): Ditto. | |
1693 | (vfwnmsac_frm): Ditto. | |
1694 | (vfsqrt): Ditto. | |
1695 | (vfsqrt_frm): Ditto. | |
1696 | (vfrsqrt7): Ditto. | |
1697 | (vfrec7): Ditto. | |
1698 | (vfrec7_frm): Ditto. | |
1699 | (vfmin): Ditto. | |
1700 | (vfmax): Ditto. | |
1701 | (vfsgnj): Ditto. | |
1702 | (vfsgnjn): Ditto. | |
1703 | (vfsgnjx): Ditto. | |
1704 | (vfneg): Ditto. | |
1705 | (vfabs): Ditto. | |
1706 | (vmfeq): Ditto. | |
1707 | (vmfne): Ditto. | |
1708 | (vmflt): Ditto. | |
1709 | (vmfle): Ditto. | |
1710 | (vmfgt): Ditto. | |
1711 | (vmfge): Ditto. | |
1712 | (vfclass): Ditto. | |
1713 | (vfmerge): Ditto. | |
1714 | (vfmv_v): Ditto. | |
1715 | (vfcvt_x): Ditto. | |
1716 | (vfcvt_xu): Ditto. | |
1717 | (vfcvt_rtz_x): Ditto. | |
1718 | (vfcvt_rtz_xu): Ditto. | |
1719 | (vfcvt_f): Ditto. | |
1720 | (vfcvt_x_frm): Ditto. | |
1721 | (vfcvt_xu_frm): Ditto. | |
1722 | (vfcvt_f_frm): Ditto. | |
1723 | (vfwcvt_x): Ditto. | |
1724 | (vfwcvt_xu): Ditto. | |
1725 | (vfwcvt_rtz_x): Ditto. | |
1726 | (vfwcvt_rtz_xu) Ditto.: | |
1727 | (vfwcvt_f): Ditto. | |
1728 | (vfwcvt_x_frm): Ditto. | |
1729 | (vfwcvt_xu_frm) Ditto.: | |
1730 | (vfncvt_x): Ditto. | |
1731 | (vfncvt_xu): Ditto. | |
1732 | (vfncvt_rtz_x): Ditto. | |
1733 | (vfncvt_rtz_xu): Ditto. | |
1734 | (vfncvt_f): Ditto. | |
1735 | (vfncvt_rod_f): Ditto. | |
1736 | (vfncvt_x_frm): Ditto. | |
1737 | (vfncvt_xu_frm): Ditto. | |
1738 | (vfncvt_f_frm): Ditto. | |
1739 | (vredsum): Ditto. | |
1740 | (vredmaxu): Ditto. | |
1741 | (vredmax): Ditto. | |
1742 | (vredminu): Ditto. | |
1743 | (vredmin): Ditto. | |
1744 | (vredand): Ditto. | |
1745 | (vredor): Ditto. | |
1746 | (vredxor): Ditto. | |
1747 | (vwredsum): Ditto. | |
1748 | (vwredsumu): Ditto. | |
1749 | (vfredusum): Ditto. | |
1750 | (vfredosum): Ditto. | |
1751 | (vfredmax): Ditto. | |
1752 | (vfredmin): Ditto. | |
1753 | (vfredusum_frm): Ditto. | |
1754 | (vfredosum_frm): Ditto. | |
1755 | (vfwredosum): Ditto. | |
1756 | (vfwredusum): Ditto. | |
1757 | (vfwredosum_frm): Ditto. | |
1758 | (vfwredusum_frm): Ditto. | |
1759 | (vmand): Ditto. | |
1760 | (vmnand): Ditto. | |
1761 | (vmandn): Ditto. | |
1762 | (vmxor): Ditto. | |
1763 | (vmor): Ditto. | |
1764 | (vmnor): Ditto. | |
1765 | (vmorn): Ditto. | |
1766 | (vmxnor): Ditto. | |
1767 | (vmmv): Ditto. | |
1768 | (vmclr): Ditto. | |
1769 | (vmset): Ditto. | |
1770 | (vmnot): Ditto. | |
1771 | (vcpop): Ditto. | |
1772 | (vfirst): Ditto. | |
1773 | (vmsbf): Ditto. | |
1774 | (vmsif): Ditto. | |
1775 | (vmsof): Ditto. | |
1776 | (viota): Ditto. | |
1777 | (vid): Ditto. | |
1778 | (vmv_x): Ditto. | |
1779 | (vmv_s): Ditto. | |
1780 | (vfmv_f): Ditto. | |
1781 | (vfmv_s): Ditto. | |
1782 | (vslideup): Ditto. | |
1783 | (vslidedown): Ditto. | |
1784 | (vslide1up): Ditto. | |
1785 | (vslide1down): Ditto. | |
1786 | (vfslide1up): Ditto. | |
1787 | (vfslide1down): Ditto. | |
1788 | (vrgather): Ditto. | |
1789 | (vrgatherei16): Ditto. | |
1790 | (vcompress): Ditto. | |
1791 | (vundefined): Ditto. | |
1792 | (vreinterpret): Ditto. | |
1793 | (vlmul_ext): Ditto. | |
1794 | (vlmul_trunc): Ditto. | |
1795 | (vset): Ditto. | |
1796 | (vget): Ditto. | |
1797 | (vcreate): Ditto. | |
1798 | (vlseg): Ditto. | |
1799 | (vsseg): Ditto. | |
1800 | (vlsseg): Ditto. | |
1801 | (vssseg): Ditto. | |
1802 | (vluxseg): Ditto. | |
1803 | (vloxseg): Ditto. | |
1804 | (vsuxseg): Ditto. | |
1805 | (vsoxseg): Ditto. | |
1806 | (vlsegff): Ditto. | |
1807 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Using variadic macro. | |
1808 | * config/riscv/riscv-vector-builtins.h (struct function_group_info): | |
1809 | Add avail function interface into struct. | |
1810 | * config/riscv/t-riscv: Add dependency | |
1811 | * config/riscv/riscv-vector-builtins-avail.h: New file.The definition of AVAIL marco. | |
1812 | ||
1813 | 2023-12-14 Jakub Jelinek <jakub@redhat.com> | |
1814 | ||
1815 | PR tree-optimization/112994 | |
1816 | * match.pd ((t * u) / (t * v) -> (u / v)): New simplification. | |
1817 | ||
1818 | 2023-12-14 Jakub Jelinek <jakub@redhat.com> | |
1819 | ||
1820 | PR tree-optimization/112994 | |
1821 | * match.pd ((t * 2) / 2 -> t): Adjust comment to use u instead of 2. | |
1822 | Punt without range checks if TYPE_OVERFLOW_SANITIZED. | |
1823 | ((t * u) / v -> t * (u / v)): New simplification. | |
1824 | ||
1825 | 2023-12-14 Filip Kastl <fkastl@suse.cz> | |
1826 | ||
1827 | * Makefile.in: Added sccopy pass. | |
1828 | * passes.def: Added sccopy pass before LTO streaming and before | |
1829 | RTL expansion. | |
1830 | * tree-pass.h (make_pass_sccopy): Added sccopy pass. | |
1831 | * gimple-ssa-sccopy.cc: New file. | |
1832 | ||
1833 | 2023-12-14 Martin Jambor <mjambor@suse.cz> | |
1834 | ||
1835 | PR tree-optimization/111807 | |
1836 | * tree-sra.cc (build_ref_for_model): Allow offset smaller than | |
1837 | model->offset when gsi is non-NULL. Adjust function comment. | |
1838 | ||
1839 | 2023-12-14 liuhongt <hongtao.liu@intel.com> | |
1840 | ||
1841 | PR target/112992 | |
1842 | * config/i386/i386-expand.cc | |
1843 | (ix86_convert_const_wide_int_to_broadcast): Don't convert to | |
1844 | broadcast for vec_dup{v4di,v8si} when TARGET_AVX2 is not | |
1845 | available. | |
1846 | (ix86_broadcast_from_constant): Allow broadcast for V4DI/V8SI | |
1847 | when !TARGET_AVX2 since it will be forced to memory later. | |
1848 | (ix86_expand_vector_move): Force constant to mem for | |
1849 | vec_dup{vssi,v4di} when TARGET_AVX2 is not available. | |
1850 | ||
1851 | 2023-12-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
1852 | ||
1853 | PR target/111153 | |
1854 | * config/riscv/riscv-protos.h (struct common_vector_cost): New struct. | |
1855 | (struct scalable_vector_cost): Ditto. | |
1856 | (struct cpu_vector_cost): Ditto. | |
1857 | * config/riscv/riscv-vector-costs.cc (costs::add_stmt_cost): Add RVV | |
1858 | builtin vectorization cost | |
1859 | * config/riscv/riscv.cc (struct riscv_tune_param): Ditto. | |
1860 | (get_common_costs): New function. | |
1861 | (riscv_builtin_vectorization_cost): Ditto. | |
1862 | (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): New targethook. | |
1863 | ||
1864 | 2023-12-13 Richard Ball <richard.ball@arm.com> | |
1865 | ||
1866 | * config.gcc: Adds new header to config. | |
1867 | * config/aarch64/aarch64-builtins.cc (enum aarch64_type_qualifiers): | |
1868 | Moved to header file. | |
1869 | (ENTRY): Likewise. | |
1870 | (enum aarch64_simd_type): Likewise. | |
1871 | (struct aarch64_simd_type_info): Remove static. | |
1872 | (GTY): Likewise. | |
1873 | * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64): | |
1874 | Defines pragma for arm_neon_sve_bridge.h. | |
1875 | * config/aarch64/aarch64-protos.h: | |
1876 | Add handle_arm_neon_sve_bridge_h | |
1877 | * config/aarch64/aarch64-sve-builtins-base.h: New intrinsics. | |
1878 | * config/aarch64/aarch64-sve-builtins-base.cc | |
1879 | (class svget_neonq_impl): New intrinsic implementation. | |
1880 | (class svset_neonq_impl): Likewise. | |
1881 | (class svdup_neonq_impl): Likewise. | |
1882 | (NEON_SVE_BRIDGE_FUNCTION): New intrinsics. | |
1883 | * config/aarch64/aarch64-sve-builtins-functions.h | |
1884 | (NEON_SVE_BRIDGE_FUNCTION): Defines macro for NEON_SVE_BRIDGE | |
1885 | functions. | |
1886 | * config/aarch64/aarch64-sve-builtins-shapes.h: New shapes. | |
1887 | * config/aarch64/aarch64-sve-builtins-shapes.cc | |
1888 | (parse_element_type): Add NEON element types. | |
1889 | (parse_type): Likewise. | |
1890 | (struct get_neonq_def): Defines function shape for get_neonq. | |
1891 | (struct set_neonq_def): Defines function shape for set_neonq. | |
1892 | (struct dup_neonq_def): Defines function shape for dup_neonq. | |
1893 | * config/aarch64/aarch64-sve-builtins.cc | |
1894 | (DEF_SVE_TYPE_SUFFIX): Changed to be called through | |
1895 | SVE_NEON macro. | |
1896 | (DEF_SVE_NEON_TYPE_SUFFIX): Defines | |
1897 | macro for NEON_SVE_BRIDGE type suffixes. | |
1898 | (DEF_NEON_SVE_FUNCTION): Defines | |
1899 | macro for NEON_SVE_BRIDGE functions. | |
1900 | (function_resolver::infer_neon128_vector_type): Infers type suffix | |
1901 | for overloaded functions. | |
1902 | (handle_arm_neon_sve_bridge_h): Handles #pragma arm_neon_sve_bridge.h. | |
1903 | * config/aarch64/aarch64-sve-builtins.def | |
1904 | (DEF_SVE_NEON_TYPE_SUFFIX): Macro for handling neon_sve type suffixes. | |
1905 | (bf16): Replace entry with neon-sve entry. | |
1906 | (f16): Likewise. | |
1907 | (f32): Likewise. | |
1908 | (f64): Likewise. | |
1909 | (s8): Likewise. | |
1910 | (s16): Likewise. | |
1911 | (s32): Likewise. | |
1912 | (s64): Likewise. | |
1913 | (u8): Likewise. | |
1914 | (u16): Likewise. | |
1915 | (u32): Likewise. | |
1916 | (u64): Likewise. | |
1917 | * config/aarch64/aarch64-sve-builtins.h | |
1918 | (GCC_AARCH64_SVE_BUILTINS_H): Include aarch64-builtins.h. | |
1919 | (ENTRY): Add aarch64_simd_type definiton. | |
1920 | (enum aarch64_simd_type): Add neon information to type_suffix_info. | |
1921 | (struct type_suffix_info): New function. | |
1922 | * config/aarch64/aarch64-sve.md | |
1923 | (@aarch64_sve_get_neonq_<mode>): New intrinsic insn for big endian. | |
1924 | (@aarch64_sve_set_neonq_<mode>): Likewise. | |
1925 | * config/aarch64/iterators.md: Add UNSPEC_SET_NEONQ. | |
1926 | * config/aarch64/aarch64-builtins.h: New file. | |
1927 | * config/aarch64/aarch64-neon-sve-bridge-builtins.def: New file. | |
1928 | * config/aarch64/arm_neon_sve_bridge.h: New file. | |
1929 | ||
1930 | 2023-12-13 Patrick Palka <ppalka@redhat.com> | |
1931 | ||
1932 | * doc/invoke.texi (C++ Dialect Options): Document | |
1933 | -fdiagnostics-all-candidates. | |
1934 | ||
1935 | 2023-12-13 Julian Brown <julian@codesourcery.com> | |
1936 | ||
1937 | * gimplify.cc (omp_map_clause_descriptor_p): New function. | |
1938 | (build_omp_struct_comp_nodes, omp_get_attachment, omp_group_base): Use | |
1939 | above function. | |
1940 | (omp_tsort_mapping_groups): Process nodes that have | |
1941 | OMP_CLAUSE_MAP_RUNTIME_IMPLICIT_P set after those that don't. Add | |
1942 | enter_exit_data parameter. | |
1943 | (omp_resolve_clause_dependencies): Remove GOMP_MAP_TO_PSET mappings if | |
1944 | we're mapping the whole containing derived-type variable. | |
1945 | (omp_accumulate_sibling_list): Adjust GOMP_MAP_TO_PSET handling. | |
1946 | Remove GOMP_MAP_ALWAYS_POINTER handling. | |
1947 | (gimplify_scan_omp_clauses): Pass enter_exit argument to | |
1948 | omp_tsort_mapping_groups. Don't adjust/remove GOMP_MAP_TO_PSET | |
1949 | mappings for derived-type components here. | |
1950 | * tree.h (OMP_CLAUSE_RELEASE_DESCRIPTOR): New macro. | |
1951 | * tree-pretty-print.cc (dump_omp_clause): Show | |
1952 | OMP_CLAUSE_RELEASE_DESCRIPTOR in dump output (with | |
1953 | GOMP_MAP_TO_PSET-like syntax). | |
1954 | ||
1955 | 2023-12-13 Julian Brown <julian@codesourcery.com> | |
1956 | ||
1957 | * gimplify.cc (build_struct_comp_nodes): Don't process | |
1958 | GOMP_MAP_ATTACH_DETACH "middle" nodes here. | |
1959 | (omp_mapping_group): Add REPROCESS_STRUCT and FRAGILE booleans for | |
1960 | nested struct handling. | |
1961 | (omp_strip_components_and_deref, omp_strip_indirections): Remove | |
1962 | functions. | |
1963 | (omp_get_attachment): Handle GOMP_MAP_DETACH here. | |
1964 | (omp_group_last): Handle GOMP_MAP_*, GOMP_MAP_DETACH, | |
1965 | GOMP_MAP_ATTACH_DETACH groups for "exit data" of reference-to-pointer | |
1966 | component array sections. | |
1967 | (omp_gather_mapping_groups_1): Initialise reprocess_struct and fragile | |
1968 | fields. | |
1969 | (omp_group_base): Handle GOMP_MAP_ATTACH_DETACH after GOMP_MAP_STRUCT. | |
1970 | (omp_index_mapping_groups_1): Skip reprocess_struct groups. | |
1971 | (omp_get_nonfirstprivate_group, omp_directive_maps_explicitly, | |
1972 | omp_resolve_clause_dependencies, omp_first_chained_access_token): New | |
1973 | functions. | |
1974 | (omp_check_mapping_compatibility): Adjust accepted node combinations | |
1975 | for "from" clauses using release instead of alloc. | |
1976 | (omp_accumulate_sibling_list): Add GROUP_MAP, ADDR_TOKENS, FRAGILE_P, | |
1977 | REPROCESSING_STRUCT, ADDED_TAIL parameters. Use OMP address tokenizer | |
1978 | to analyze addresses. Reimplement nested struct handling, and | |
1979 | implement "fragile groups". | |
1980 | (omp_build_struct_sibling_lists): Adjust for changes to | |
1981 | omp_accumulate_sibling_list. Recalculate bias for ATTACH_DETACH nodes | |
1982 | after GOMP_MAP_STRUCT nodes. | |
1983 | (gimplify_scan_omp_clauses): Call omp_resolve_clause_dependencies. Use | |
1984 | OMP address tokenizer. | |
1985 | (gimplify_adjust_omp_clauses_1): Use build_fold_indirect_ref_loc | |
1986 | instead of build_simple_mem_ref_loc. | |
1987 | * omp-general.cc (omp-general.h, tree-pretty-print.h): Include. | |
1988 | (omp_addr_tokenizer): New namespace. | |
1989 | (omp_addr_tokenizer::omp_addr_token): New. | |
1990 | (omp_addr_tokenizer::omp_parse_component_selector, | |
1991 | omp_addr_tokenizer::omp_parse_ref, | |
1992 | omp_addr_tokenizer::omp_parse_pointer, | |
1993 | omp_addr_tokenizer::omp_parse_access_method, | |
1994 | omp_addr_tokenizer::omp_parse_access_methods, | |
1995 | omp_addr_tokenizer::omp_parse_structure_base, | |
1996 | omp_addr_tokenizer::omp_parse_structured_expr, | |
1997 | omp_addr_tokenizer::omp_parse_array_expr, | |
1998 | omp_addr_tokenizer::omp_access_chain_p, | |
1999 | omp_addr_tokenizer::omp_accessed_addr): New functions. | |
2000 | (omp_parse_expr, debug_omp_tokenized_addr): New functions. | |
2001 | * omp-general.h (omp_addr_tokenizer::access_method_kinds, | |
2002 | omp_addr_tokenizer::structure_base_kinds, | |
2003 | omp_addr_tokenizer::token_type, | |
2004 | omp_addr_tokenizer::omp_addr_token, | |
2005 | omp_addr_tokenizer::omp_access_chain_p, | |
2006 | omp_addr_tokenizer::omp_accessed_addr): New. | |
2007 | (omp_addr_token, omp_parse_expr): New. | |
2008 | * omp-low.cc (scan_sharing_clauses): Skip error check for references | |
2009 | to pointers. | |
2010 | * tree.h (OMP_CLAUSE_ATTACHMENT_MAPPING_ERASED): New macro. | |
2011 | ||
2012 | 2023-12-13 Andrew Stubbs <ams@codesourcery.com> | |
2013 | ||
2014 | * config/gcn/gcn-hsa.h (NO_XNACK): Change the defaults. | |
2015 | * config/gcn/gcn-opts.h (enum hsaco_attr_type): Add HSACO_ATTR_DEFAULT. | |
2016 | * config/gcn/gcn.cc (gcn_option_override): Set the default flag_xnack. | |
2017 | * config/gcn/gcn.opt: Add -mxnack=default. | |
2018 | * doc/invoke.texi: Document the -mxnack default. | |
2019 | ||
2020 | 2023-12-13 Andrew Stubbs <ams@codesourcery.com> | |
2021 | ||
2022 | * config/gcn/gcn-hsa.h (NO_XNACK): Ignore missing -march. | |
2023 | (XNACKOPT): Match on/off; ignore any. | |
2024 | * config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): | |
2025 | Add xnack compatible alternatives. | |
2026 | (gather<mode>_insn_2offsets<exec>): Likewise. | |
2027 | * config/gcn/gcn.cc (gcn_option_override): Permit -mxnack for devices | |
2028 | other than Fiji and gfx1030. | |
2029 | (gcn_expand_epilogue): Remove early-clobber problems. | |
2030 | (gcn_hsa_declare_function_name): Obey -mxnack setting. | |
2031 | * config/gcn/gcn.md (xnack): New attribute. | |
2032 | (enabled): Rework to include "xnack" attribute. | |
2033 | (*movbi): Add xnack compatible alternatives. | |
2034 | (*mov<mode>_insn): Likewise. | |
2035 | (*mov<mode>_insn): Likewise. | |
2036 | (*mov<mode>_insn): Likewise. | |
2037 | (*movti_insn): Likewise. | |
2038 | * config/gcn/gcn.opt (-mxnack): Change the default to "any". | |
2039 | * doc/invoke.texi: Remove placeholder notice for -mxnack. | |
2040 | ||
2041 | 2023-12-13 Andrew Carlotti <andrew.carlotti@arm.com> | |
2042 | ||
2043 | * config/aarch64/x-aarch64: Add missing dependencies. | |
2044 | ||
2045 | 2023-12-13 Roger Sayle <roger@nextmovesoftware.com> | |
2046 | Jeff Law <jlaw@ventanamicro.com> | |
2047 | ||
2048 | * config/arc/arc.md (*extvsi_n_0): New define_insn_and_split to | |
2049 | implement SImode sign extract using a AND, XOR and MINUS sequence. | |
2050 | ||
2051 | 2023-12-13 Feng Wang <wangfeng@eswincomputing.com> | |
2052 | ||
2053 | * common/config/riscv/riscv-common.cc: Modify implied ISA info. | |
2054 | * config/riscv/arch-canonicalize: Add crypto vector implied info. | |
2055 | ||
2056 | 2023-12-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2057 | ||
2058 | PR target/112929 | |
2059 | PR target/112988 | |
2060 | * config/riscv/riscv-vsetvl.cc | |
2061 | (pre_vsetvl::compute_lcm_local_properties): Remove full available. | |
2062 | (pre_vsetvl::pre_global_vsetvl_info): Add full available optimization. | |
2063 | ||
2064 | 2023-12-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2065 | ||
2066 | PR target/111317 | |
2067 | * tree-vect-loop.cc (vect_estimate_min_profitable_iters): Adjust for COST for decrement IV. | |
2068 | ||
2069 | 2023-12-13 Jakub Jelinek <jakub@redhat.com> | |
2070 | ||
2071 | PR tree-optimization/112940 | |
2072 | * gimple-lower-bitint.cc (struct bitint_large_huge): Add another | |
2073 | argument to prepare_data_in_out method defaulted to NULL_TREE. | |
2074 | (bitint_large_huge::handle_operand): Pass another argument to | |
2075 | prepare_data_in_out instead of emitting an assignment to set it. | |
2076 | (bitint_large_huge::prepare_data_in_out): Add VAL_OUT argument. | |
2077 | If non-NULL, use it as PHI argument instead of creating a new | |
2078 | SSA_NAME. | |
2079 | (bitint_large_huge::handle_cast): Pass rext as another argument | |
2080 | to 2 prepare_data_in_out calls instead of emitting assignments | |
2081 | to set them. | |
2082 | ||
2083 | 2023-12-13 Jakub Jelinek <jakub@redhat.com> | |
2084 | ||
2085 | PR middle-end/112953 | |
2086 | * attribs.cc (free_attr_data): Use delete x rather than delete[] x. | |
2087 | ||
2088 | 2023-12-13 Jakub Jelinek <jakub@redhat.com> | |
2089 | ||
2090 | PR target/112962 | |
2091 | * config/i386/i386.cc (ix86_gimple_fold_builtin): For shifts | |
2092 | and abs without lhs replace with nop. | |
2093 | ||
2094 | 2023-12-13 Richard Biener <rguenther@suse.de> | |
2095 | ||
2096 | * emit-rtl.cc (set_mem_attributes_minus_bitpos): Preserve | |
2097 | the offset when rewriting an exising MEM_REF base for | |
2098 | stack slot sharing. | |
2099 | ||
2100 | 2023-12-13 Richard Biener <rguenther@suse.de> | |
2101 | ||
2102 | PR tree-optimization/112991 | |
2103 | PR tree-optimization/112961 | |
2104 | * tree-ssa-sccvn.h (do_rpo_vn): Add skip_entry_phis argument. | |
2105 | * tree-ssa-sccvn.cc (do_rpo_vn): Likewise. | |
2106 | (do_rpo_vn_1): Likewise, merge with auto-processing. | |
2107 | (run_rpo_vn): Adjust. | |
2108 | (pass_fre::execute): Likewise. | |
2109 | * tree-if-conv.cc (tree_if_conversion): Revert last change. | |
2110 | Value-number latch block but disable value-numbering of | |
2111 | entry PHIs. | |
2112 | * tree-ssa-uninit.cc (execute_early_warn_uninitialized): Adjust. | |
2113 | ||
2114 | 2023-12-13 Richard Biener <rguenther@suse.de> | |
2115 | ||
2116 | PR tree-optimization/112990 | |
2117 | * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): | |
2118 | Restrict to vector modes after lowering. | |
2119 | ||
2120 | 2023-12-13 Richard Biener <rguenther@suse.de> | |
2121 | ||
2122 | PR middle-end/111591 | |
2123 | * cfgexpand.cc (update_alias_info_with_stack_vars): Document | |
2124 | why not adjusting TBAA info on accesses is OK. | |
2125 | ||
2126 | 2023-12-13 Alexandre Oliva <oliva@adacore.com> | |
2127 | ||
2128 | * doc/invoke.texi (multiflags): Drop extraneous period, use | |
2129 | @pxref instead. | |
2130 | ||
2131 | 2023-12-13 Victor Do Nascimento <victor.donascimento@arm.com> | |
2132 | ||
2133 | * config/aarch64/aarch64-builtins.cc: | |
2134 | (AARCH64_PLD): New enum aarch64_builtins entry. | |
2135 | (AARCH64_PLDX): Likewise. | |
2136 | (AARCH64_PLI): Likewise. | |
2137 | (AARCH64_PLIX): Likewise. | |
2138 | (aarch64_init_prefetch_builtin): New. | |
2139 | (aarch64_general_init_builtins): Call prefetch init function. | |
2140 | (aarch64_expand_prefetch_builtin): New. | |
2141 | (aarch64_general_expand_builtin): Add prefetch expansion. | |
2142 | (require_const_argument): New. | |
2143 | * config/aarch64/aarch64.md (UNSPEC_PLDX): New. | |
2144 | (aarch64_pldx): Likewise. | |
2145 | * config/aarch64/arm_acle.h (__pld): Likewise. | |
2146 | (__pli): Likewise. | |
2147 | (__plix): Likewise. | |
2148 | (__pldx): Likewise. | |
2149 | ||
2150 | 2023-12-13 Kewen Lin <linkw@linux.ibm.com> | |
2151 | ||
2152 | PR tree-optimization/112788 | |
2153 | * value-range.h (range_compatible_p): Workaround same type mode but | |
2154 | different type precision issue for rs6000 scalar float types | |
2155 | _Float128 and long double. | |
2156 | ||
2157 | 2023-12-13 Jiufu Guo <guojiufu@linux.ibm.com> | |
2158 | ||
2159 | * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add code to use | |
2160 | pli for 34bit constant. | |
2161 | ||
2162 | 2023-12-13 Jiufu Guo <guojiufu@linux.ibm.com> | |
2163 | ||
2164 | * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add new | |
2165 | parameter to record number of instructions to build the constant. | |
2166 | (num_insns_constant_gpr): Call rs6000_emit_set_long_const to compute | |
2167 | num_insn. | |
2168 | ||
2169 | 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2170 | ||
2171 | * config/riscv/riscv-vector-costs.cc (costs::analyze_loop_vinfo): New function. | |
2172 | (costs::record_potential_vls_unrolling): Ditto. | |
2173 | (costs::prefer_unrolled_loop): Ditto. | |
2174 | (costs::better_main_loop_than_p): Ditto. | |
2175 | (costs::add_stmt_cost): Ditto. | |
2176 | * config/riscv/riscv-vector-costs.h (enum cost_type_enum): New enum. | |
2177 | * config/riscv/t-riscv: Add new include files. | |
2178 | ||
2179 | 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2180 | ||
2181 | * config/riscv/riscv-vector-costs.cc (get_current_lmul): Remove it. | |
2182 | (compute_estimated_lmul): New function. | |
2183 | (costs::costs): Refactor. | |
2184 | (costs::preferred_new_lmul_p): Ditto. | |
2185 | (preferred_new_lmul_p): Ditto. | |
2186 | (costs::better_main_loop_than_p): Ditto. | |
2187 | * config/riscv/riscv-vector-costs.h (struct autovec_info): Remove it. | |
2188 | ||
2189 | 2023-12-12 Martin Jambor <mjambor@suse.cz> | |
2190 | ||
2191 | PR tree-optimization/112822 | |
2192 | * tree-sra.cc (load_assign_lhs_subreplacements): Invoke | |
2193 | force_gimple_operand_gsi also when LHS has partial stores and RHS is a | |
2194 | VIEW_CONVERT_EXPR. | |
2195 | ||
2196 | 2023-12-12 Jason Merrill <jason@redhat.com> | |
2197 | Nathaniel Shead <nathanieloshead@gmail.com> | |
2198 | ||
2199 | * tree-core.h (enum clobber_kind): Rename CLOBBER_EOL to | |
2200 | CLOBBER_STORAGE_END. Add CLOBBER_STORAGE_BEGIN, | |
2201 | CLOBBER_OBJECT_BEGIN, CLOBBER_OBJECT_END. | |
2202 | * gimple-lower-bitint.cc | |
2203 | * gimple-ssa-warn-access.cc | |
2204 | * gimplify.cc | |
2205 | * tree-inline.cc | |
2206 | * tree-ssa-ccp.cc: Adjust for rename. | |
2207 | * tree-pretty-print.cc: And handle new values. | |
2208 | ||
2209 | 2023-12-12 Szabolcs Nagy <szabolcs.nagy@arm.com> | |
2210 | ||
2211 | * config/aarch64/aarch64.cc (aarch64_override_options): Update. | |
2212 | (aarch64_handle_attr_branch_protection): Update. | |
2213 | * config/arm/aarch-common-protos.h (aarch_parse_branch_protection): | |
2214 | Remove. | |
2215 | (aarch_validate_mbranch_protection): Add new argument. | |
2216 | * config/arm/aarch-common.cc (aarch_handle_no_branch_protection): | |
2217 | Update. | |
2218 | (aarch_handle_standard_branch_protection): Update. | |
2219 | (aarch_handle_pac_ret_protection): Update. | |
2220 | (aarch_handle_pac_ret_leaf): Update. | |
2221 | (aarch_handle_pac_ret_b_key): Update. | |
2222 | (aarch_handle_bti_protection): Update. | |
2223 | (aarch_parse_branch_protection): Remove. | |
2224 | (next_tok): New. | |
2225 | (aarch_validate_mbranch_protection): Rewrite. | |
2226 | * config/arm/aarch-common.h (struct aarch_branch_protect_type): | |
2227 | Add field "alone". | |
2228 | * config/arm/arm.cc (arm_configure_build_target): Update. | |
2229 | ||
2230 | 2023-12-12 Szabolcs Nagy <szabolcs.nagy@arm.com> | |
2231 | ||
2232 | * config/aarch64/aarch64.cc (aarch64_override_options_after_change_1): | |
2233 | Do not override branch_protection options. | |
2234 | (aarch64_override_options): Remove accepted_branch_protection_string. | |
2235 | * config/arm/aarch-common.cc (BRANCH_PROTECT_STR_MAX): Remove. | |
2236 | (aarch_parse_branch_protection): Remove | |
2237 | accepted_branch_protection_string. | |
2238 | * config/arm/arm.cc: Likewise. | |
2239 | ||
2240 | 2023-12-12 Richard Biener <rguenther@suse.de> | |
2241 | ||
2242 | PR tree-optimization/112736 | |
2243 | * tree-vect-stmts.cc (vectorizable_load): Extend optimization | |
2244 | to avoid peeling for gaps to handle single-element non-groups | |
2245 | we now allow with SLP. | |
2246 | ||
2247 | 2023-12-12 Richard Biener <rguenther@suse.de> | |
2248 | ||
2249 | PR ipa/92606 | |
2250 | * ipa-icf.cc (sem_item_optimizer::merge_classes): Check | |
2251 | both source and alias for the no_icf attribute. | |
2252 | * doc/extend.texi (no_icf): Document variable attribute. | |
2253 | ||
2254 | 2023-12-12 Richard Biener <rguenther@suse.de> | |
2255 | ||
2256 | PR tree-optimization/112961 | |
2257 | * tree-if-conv.cc (tree_if_conversion): Instead of excluding | |
2258 | the latch block from VN, add a fake entry edge. | |
2259 | ||
2260 | 2023-12-12 Xi Ruoyao <xry111@xry111.site> | |
2261 | ||
2262 | PR middle-end/107723 | |
2263 | * convert.cc (convert_to_integer_1) [case BUILT_IN_TRUNC]: Break | |
2264 | early if !flag_fp_int_builtin_inexact and flag_trapping_math. | |
2265 | ||
2266 | 2023-12-12 Pan Li <pan2.li@intel.com> | |
2267 | ||
2268 | * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): | |
2269 | Disable the avl propogation for the vcompress. | |
2270 | ||
2271 | 2023-12-12 Xi Ruoyao <xry111@xry111.site> | |
2272 | ||
2273 | * config/loongarch/loongarch-opts.h (la_target): Move into #if | |
2274 | for loongarch-def.h. | |
2275 | (loongarch_init_target): Likewise. | |
2276 | (loongarch_config_target): Likewise. | |
2277 | (loongarch_update_gcc_opt_status): Likewise. | |
2278 | ||
2279 | 2023-12-12 Xi Ruoyao <xry111@xry111.site> | |
2280 | ||
2281 | * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p): | |
2282 | Return true for SYMBOL_PCREL64. Return true for SYMBOL_GOT_DISP | |
2283 | if TARGET_CMODEL_EXTREME. | |
2284 | (loongarch_split_symbol): Check for la_opt_explicit_relocs != | |
2285 | EXPLICIT_RELOCS_NONE instead of TARGET_EXPLICIT_RELOCS. | |
2286 | (loongarch_print_operand_reloc): Likewise. | |
2287 | (loongarch_option_override_internal): Likewise. | |
2288 | (loongarch_handle_model_attribute): Likewise. | |
2289 | * doc/invoke.texi (-mcmodel=extreme): Update the compatibility | |
2290 | between it and -mexplicit-relocs=. | |
2291 | ||
2292 | 2023-12-12 Richard Biener <rguenther@suse.de> | |
2293 | ||
2294 | PR tree-optimization/112939 | |
2295 | * tree-ssa-sccvn.cc (visit_phi): When all args are undefined | |
2296 | make sure we end up with a value that was visited, otherwise | |
2297 | fall back to .VN_TOP. | |
2298 | ||
2299 | 2023-12-12 liuhongt <hongtao.liu@intel.com> | |
2300 | ||
2301 | PR target/112891 | |
2302 | * config/i386/i386.cc (ix86_avx_u128_mode_after): Return | |
2303 | AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to | |
2304 | align with ix86_avx_u128_mode_needed. | |
2305 | (ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for | |
2306 | sibling_call. | |
2307 | ||
2308 | 2023-12-12 Alexandre Oliva <oliva@adacore.com> | |
2309 | ||
2310 | PR target/112334 | |
2311 | * builtins.h (target_builtins): Add fields for apply_args_size | |
2312 | and apply_result_size. | |
2313 | * builtins.cc (apply_args_size, apply_result_size): Cache | |
2314 | results in fields rather than in static variables. | |
2315 | (get_apply_args_size, set_apply_args_size): New. | |
2316 | (get_apply_result_size, set_apply_result_size): New. | |
2317 | ||
2318 | 2023-12-12 Hongyu Wang <hongyu.wang@intel.com> | |
2319 | ||
2320 | PR target/112943 | |
2321 | * config/i386/i386.md (ashl<mode>3): Add TARGET_APX_NDD to | |
2322 | ix86_expand_binary_operator call. | |
2323 | (<insn><mode>3): Likewise for rshift. | |
2324 | (<insn>di3): Likewise for DImode rotate. | |
2325 | (<insn><mode>3): Likewise for SWI124 rotate. | |
2326 | ||
2327 | 2023-12-12 Feng Wang <wangfeng@eswincomputing.com> | |
2328 | ||
2329 | * config/riscv/riscv-vector-builtins-functions.def (DEF_RVV_FUNCTION): | |
2330 | Add AVAIL argument. | |
2331 | (read_vl): Using AVAIL argument default value. | |
2332 | (vlenb): Ditto. | |
2333 | (vsetvl): Ditto. | |
2334 | (vsetvlmax): Ditto. | |
2335 | (vle): Ditto. | |
2336 | (vse): Ditto. | |
2337 | (vlm): Ditto. | |
2338 | (vsm): Ditto. | |
2339 | (vlse): Ditto. | |
2340 | (vsse): Ditto. | |
2341 | (vluxei8): Ditto. | |
2342 | (vluxei16): Ditto. | |
2343 | (vluxei32): Ditto. | |
2344 | (vluxei64): Ditto. | |
2345 | (vloxei8): Ditto. | |
2346 | (vloxei16): Ditto. | |
2347 | (vloxei32): Ditto. | |
2348 | (vloxei64): Ditto. | |
2349 | (vsuxei8): Ditto. | |
2350 | (vsuxei16): Ditto. | |
2351 | (vsuxei32): Ditto. | |
2352 | (vsuxei64): Ditto. | |
2353 | (vsoxei8): Ditto. | |
2354 | (vsoxei16): Ditto. | |
2355 | (vsoxei32): Ditto. | |
2356 | (vsoxei64): Ditto. | |
2357 | (vleff): Ditto. | |
2358 | (vadd): Ditto. | |
2359 | (vsub): Ditto. | |
2360 | (vrsub): Ditto. | |
2361 | (vneg): Ditto. | |
2362 | (vwaddu): Ditto. | |
2363 | (vwsubu): Ditto. | |
2364 | (vwadd): Ditto. | |
2365 | (vwsub): Ditto. | |
2366 | (vwcvt_x): Ditto. | |
2367 | (vwcvtu_x): Ditto. | |
2368 | (vzext): Ditto. | |
2369 | (vsext): Ditto. | |
2370 | (vadc): Ditto. | |
2371 | (vmadc): Ditto. | |
2372 | (vsbc): Ditto. | |
2373 | (vmsbc): Ditto. | |
2374 | (vand): Ditto. | |
2375 | (vor): Ditto. | |
2376 | (vxor): Ditto. | |
2377 | (vnot): Ditto. | |
2378 | (vsll): Ditto. | |
2379 | (vsra): Ditto. | |
2380 | (vsrl): Ditto. | |
2381 | (vnsrl): Ditto. | |
2382 | (vnsra): Ditto. | |
2383 | (vncvt_x): Ditto. | |
2384 | (vmseq): Ditto. | |
2385 | (vmsne): Ditto. | |
2386 | (vmsltu): Ditto. | |
2387 | (vmslt): Ditto. | |
2388 | (vmsleu): Ditto. | |
2389 | (vmsle): Ditto. | |
2390 | (vmsgtu): Ditto. | |
2391 | (vmsgt): Ditto. | |
2392 | (vmsgeu): Ditto. | |
2393 | (vmsge): Ditto. | |
2394 | (vminu): Ditto. | |
2395 | (vmin): Ditto. | |
2396 | (vmaxu): Ditto. | |
2397 | (vmax): Ditto. | |
2398 | (vmul): Ditto. | |
2399 | (vmulh): Ditto. | |
2400 | (vmulhu): Ditto. | |
2401 | (vmulhsu): Ditto. | |
2402 | (vdivu): Ditto. | |
2403 | (vdiv): Ditto. | |
2404 | (vremu): Ditto. | |
2405 | (vrem): Ditto. | |
2406 | (vwmul): Ditto. | |
2407 | (vwmulu): Ditto. | |
2408 | (vwmulsu): Ditto. | |
2409 | (vmacc): Ditto. | |
2410 | (vnmsac): Ditto. | |
2411 | (vmadd): Ditto. | |
2412 | (vnmsub): Ditto. | |
2413 | (vwmaccu): Ditto. | |
2414 | (vwmacc): Ditto. | |
2415 | (vwmaccsu): Ditto. | |
2416 | (vwmaccus): Ditto. | |
2417 | (vmerge): Ditto. | |
2418 | (vmv_v): Ditto. | |
2419 | (vsaddu): Ditto. | |
2420 | (vsadd): Ditto. | |
2421 | (vssubu): Ditto. | |
2422 | (vssub): Ditto. | |
2423 | (vaaddu): Ditto. | |
2424 | (vaadd): Ditto. | |
2425 | (vasubu): Ditto. | |
2426 | (vasub): Ditto. | |
2427 | (vsmul): Ditto. | |
2428 | (vssrl): Ditto. | |
2429 | (vssra): Ditto. | |
2430 | (vnclipu): Ditto. | |
2431 | (vnclip): Ditto. | |
2432 | (vfadd): Ditto. | |
2433 | (vfsub): Ditto. | |
2434 | (vfrsub): Ditto. | |
2435 | (vfadd_frm): Ditto. | |
2436 | (vfsub_frm): Ditto. | |
2437 | (vfrsub_frm): Ditto. | |
2438 | (vfwadd): Ditto. | |
2439 | (vfwsub): Ditto. | |
2440 | (vfwadd_frm): Ditto. | |
2441 | (vfwsub_frm): Ditto. | |
2442 | (vfmul): Ditto. | |
2443 | (vfdiv): Ditto. | |
2444 | (vfrdiv): Ditto. | |
2445 | (vfmul_frm): Ditto. | |
2446 | (vfdiv_frm): Ditto. | |
2447 | (vfrdiv_frm): Ditto. | |
2448 | (vfwmul): Ditto. | |
2449 | (vfwmul_frm): Ditto. | |
2450 | (vfmacc): Ditto. | |
2451 | (vfnmsac): Ditto. | |
2452 | (vfmadd): Ditto. | |
2453 | (vfnmsub): Ditto. | |
2454 | (vfnmacc): Ditto. | |
2455 | (vfmsac): Ditto. | |
2456 | (vfnmadd): Ditto. | |
2457 | (vfmsub): Ditto. | |
2458 | (vfmacc_frm): Ditto. | |
2459 | (vfnmacc_frm): Ditto. | |
2460 | (vfmsac_frm): Ditto. | |
2461 | (vfnmsac_frm): Ditto. | |
2462 | (vfmadd_frm): Ditto. | |
2463 | (vfnmadd_frm): Ditto. | |
2464 | (vfmsub_frm): Ditto. | |
2465 | (vfnmsub_frm): Ditto. | |
2466 | (vfwmacc): Ditto. | |
2467 | (vfwnmacc): Ditto. | |
2468 | (vfwmsac): Ditto. | |
2469 | (vfwnmsac): Ditto. | |
2470 | (vfwmacc_frm): Ditto. | |
2471 | (vfwnmacc_frm): Ditto. | |
2472 | (vfwmsac_frm): Ditto. | |
2473 | (vfwnmsac_frm): Ditto. | |
2474 | (vfsqrt): Ditto. | |
2475 | (vfsqrt_frm): Ditto. | |
2476 | (vfrsqrt7): Ditto. | |
2477 | (vfrec7): Ditto. | |
2478 | (vfrec7_frm): Ditto. | |
2479 | (vfmin): Ditto. | |
2480 | (vfmax): Ditto. | |
2481 | (vfsgnj): Ditto. | |
2482 | (vfsgnjn): Ditto. | |
2483 | (vfsgnjx): Ditto. | |
2484 | (vfneg): Ditto. | |
2485 | (vfabs): Ditto. | |
2486 | (vmfeq): Ditto. | |
2487 | (vmfne): Ditto. | |
2488 | (vmflt): Ditto. | |
2489 | (vmfle): Ditto. | |
2490 | (vmfgt): Ditto. | |
2491 | (vmfge): Ditto. | |
2492 | (vfclass): Ditto. | |
2493 | (vfmerge): Ditto. | |
2494 | (vfmv_v): Ditto. | |
2495 | (vfcvt_x): Ditto. | |
2496 | (vfcvt_xu): Ditto. | |
2497 | (vfcvt_rtz_x): Ditto. | |
2498 | (vfcvt_rtz_xu): Ditto. | |
2499 | (vfcvt_f): Ditto. | |
2500 | (vfcvt_x_frm): Ditto. | |
2501 | (vfcvt_xu_frm): Ditto. | |
2502 | (vfcvt_f_frm): Ditto. | |
2503 | (vfwcvt_x): Ditto. | |
2504 | (vfwcvt_xu): Ditto. | |
2505 | (vfwcvt_rtz_x): Ditto. | |
2506 | (vfwcvt_rtz_xu) Ditto.: | |
2507 | (vfwcvt_f): Ditto. | |
2508 | (vfwcvt_x_frm): Ditto. | |
2509 | (vfwcvt_xu_frm) Ditto.: | |
2510 | (vfncvt_x): Ditto. | |
2511 | (vfncvt_xu): Ditto. | |
2512 | (vfncvt_rtz_x): Ditto. | |
2513 | (vfncvt_rtz_xu): Ditto. | |
2514 | (vfncvt_f): Ditto. | |
2515 | (vfncvt_rod_f): Ditto. | |
2516 | (vfncvt_x_frm): Ditto. | |
2517 | (vfncvt_xu_frm): Ditto. | |
2518 | (vfncvt_f_frm): Ditto. | |
2519 | (vredsum): Ditto. | |
2520 | (vredmaxu): Ditto. | |
2521 | (vredmax): Ditto. | |
2522 | (vredminu): Ditto. | |
2523 | (vredmin): Ditto. | |
2524 | (vredand): Ditto. | |
2525 | (vredor): Ditto. | |
2526 | (vredxor): Ditto. | |
2527 | (vwredsum): Ditto. | |
2528 | (vwredsumu): Ditto. | |
2529 | (vfredusum): Ditto. | |
2530 | (vfredosum): Ditto. | |
2531 | (vfredmax): Ditto. | |
2532 | (vfredmin): Ditto. | |
2533 | (vfredusum_frm): Ditto. | |
2534 | (vfredosum_frm): Ditto. | |
2535 | (vfwredosum): Ditto. | |
2536 | (vfwredusum): Ditto. | |
2537 | (vfwredosum_frm): Ditto. | |
2538 | (vfwredusum_frm): Ditto. | |
2539 | (vmand): Ditto. | |
2540 | (vmnand): Ditto. | |
2541 | (vmandn): Ditto. | |
2542 | (vmxor): Ditto. | |
2543 | (vmor): Ditto. | |
2544 | (vmnor): Ditto. | |
2545 | (vmorn): Ditto. | |
2546 | (vmxnor): Ditto. | |
2547 | (vmmv): Ditto. | |
2548 | (vmclr): Ditto. | |
2549 | (vmset): Ditto. | |
2550 | (vmnot): Ditto. | |
2551 | (vcpop): Ditto. | |
2552 | (vfirst): Ditto. | |
2553 | (vmsbf): Ditto. | |
2554 | (vmsif): Ditto. | |
2555 | (vmsof): Ditto. | |
2556 | (viota): Ditto. | |
2557 | (vid): Ditto. | |
2558 | (vmv_x): Ditto. | |
2559 | (vmv_s): Ditto. | |
2560 | (vfmv_f): Ditto. | |
2561 | (vfmv_s): Ditto. | |
2562 | (vslideup): Ditto. | |
2563 | (vslidedown): Ditto. | |
2564 | (vslide1up): Ditto. | |
2565 | (vslide1down): Ditto. | |
2566 | (vfslide1up): Ditto. | |
2567 | (vfslide1down): Ditto. | |
2568 | (vrgather): Ditto. | |
2569 | (vrgatherei16): Ditto. | |
2570 | (vcompress): Ditto. | |
2571 | (vundefined): Ditto. | |
2572 | (vreinterpret): Ditto. | |
2573 | (vlmul_ext): Ditto. | |
2574 | (vlmul_trunc): Ditto. | |
2575 | (vset): Ditto. | |
2576 | (vget): Ditto. | |
2577 | (vcreate): Ditto. | |
2578 | (vlseg): Ditto. | |
2579 | (vsseg): Ditto. | |
2580 | (vlsseg): Ditto. | |
2581 | (vssseg): Ditto. | |
2582 | (vluxseg): Ditto. | |
2583 | (vloxseg): Ditto. | |
2584 | (vsuxseg): Ditto. | |
2585 | (vsoxseg): Ditto. | |
2586 | (vlsegff): Ditto. | |
2587 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Using variadic macro. | |
2588 | * config/riscv/riscv-vector-builtins.h (struct function_group_info): | |
2589 | Add avail function interface into struct. | |
2590 | * config/riscv/t-riscv: Add dependency | |
2591 | * config/riscv/riscv-vector-builtins-avail.h: New file.The definition of AVAIL marco. | |
2592 | ||
2593 | 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2594 | ||
2595 | * config/riscv/riscv-protos.h (estimated_poly_value): New function. | |
2596 | * config/riscv/riscv-v.cc (estimated_poly_value): Ditto. | |
2597 | * config/riscv/riscv.cc (riscv_estimated_poly_value): Move RVV POLY | |
2598 | VALUE estimation to riscv-v.cc | |
2599 | ||
2600 | 2023-12-12 Yang Yujie <yangyujie@loongson.cn> | |
2601 | ||
2602 | * config/loongarch/loongarch.cc: Do not restore the saved eh_return | |
2603 | data registers ($r4-$r7) for a normal return of a function that calls | |
2604 | __builtin_eh_return elsewhere. | |
2605 | * config/loongarch/loongarch-protos.h: Same. | |
2606 | * config/loongarch/loongarch.md: Same. | |
2607 | ||
2608 | 2023-12-11 Richard Sandiford <richard.sandiford@arm.com> | |
2609 | ||
2610 | * recog.cc (constrain_operands): Pass VOIDmode to | |
2611 | strict_memory_address_p for 'p' constraints in asms. | |
2612 | * rtl-ssa/changes.cc (recog_level2): Skip redundant constrain_operands | |
2613 | for asms. | |
2614 | ||
2615 | 2023-12-11 Jason Merrill <jason@redhat.com> | |
2616 | ||
2617 | * common.opt: Add comment. | |
2618 | ||
2619 | 2023-12-11 Alexandre Oliva <oliva@adacore.com> | |
2620 | ||
2621 | PR middle-end/112784 | |
2622 | * expr.cc (emit_block_move_via_loop): Call int_mode_for_size | |
2623 | for maybe-too-wide sizes. | |
2624 | (emit_block_cmp_via_loop): Likewise. | |
2625 | ||
2626 | 2023-12-11 Alexandre Oliva <oliva@adacore.com> | |
2627 | ||
2628 | PR target/112778 | |
2629 | * builtins.cc (can_store_by_multiple_pieces): New. | |
2630 | (try_store_by_multiple_pieces): Call it. | |
2631 | ||
2632 | 2023-12-11 Alexandre Oliva <oliva@adacore.com> | |
2633 | ||
2634 | PR target/112804 | |
2635 | * builtins.cc (try_store_by_multiple_pieces): Use ptr's mode | |
2636 | for the increment. | |
2637 | ||
2638 | 2023-12-11 Alexandre Oliva <oliva@adacore.com> | |
2639 | ||
2640 | * doc/invoke.texi (multiflags): Add period after @xref to | |
2641 | silence warning. | |
2642 | ||
2643 | 2023-12-11 Alexandre Oliva <oliva@adacore.com> | |
2644 | ||
2645 | * config/rl78/rl78.cc (TARGET_HAVE_STRUB_SUPPORT_FOR): Disable. | |
2646 | ||
2647 | 2023-12-11 Alexandre Oliva <oliva@adacore.com> | |
2648 | ||
2649 | * ipa-strub.cc (pass_ipa_strub::execute): Check that we don't | |
2650 | add indirection to pointer parameters, and document attribute | |
2651 | access non-interactions. | |
2652 | ||
2653 | 2023-12-11 Roger Sayle <roger@nextmovesoftware.com> | |
2654 | ||
2655 | PR rtl-optimization/112380 | |
2656 | * combine.cc (expand_field_assignment): Check if gen_lowpart | |
2657 | returned a CLOBBER, and avoid calling gen_simplify_binary with | |
2658 | it if so. | |
2659 | ||
2660 | 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com> | |
2661 | ||
2662 | PR target/111867 | |
2663 | * config/aarch64/aarch64.cc (aarch64_float_const_representable_p): For BFmode, | |
2664 | only accept +0.0. | |
2665 | ||
2666 | 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com> | |
2667 | ||
2668 | PR tree-optimization/111972 | |
2669 | PR tree-optimization/110637 | |
2670 | * match.pd (`(convert)(zeroone !=/== CST)`): Match | |
2671 | and simplify to ((convert)zeroone){,^1}. | |
2672 | * fold-const.cc (fold_binary_loc): Remove | |
2673 | transformation of `(~a) & 1` and `(a ^ 1) & 1` | |
2674 | into `(convert)(a == 0)`. | |
2675 | ||
2676 | 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com> | |
2677 | ||
2678 | PR middle-end/112935 | |
2679 | * expr.cc (expand_expr_real_2): Use | |
2680 | gimple_zero_one_valued_p instead of tree_nonzero_bits | |
2681 | to find boolean defined expressions. | |
2682 | ||
2683 | 2023-12-11 Mikael Pettersson <mikpelinux@gmail.com> | |
2684 | ||
2685 | PR target/112413 | |
2686 | * config/m68k/linux.h (ASM_RETURN_CASE_JUMP): For | |
2687 | TARGET_LONG_JUMP_TABLE_OFFSETS, reference the jump table | |
2688 | via its label. | |
2689 | * config/m68k/m68kelf.h (ASM_RETURN_CASE_JUMP): Likewise. | |
2690 | * config/m68k/netbsd-elf.h (ASM_RETURN_CASE_JUMP): Likewise. | |
2691 | ||
2692 | 2023-12-11 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
2693 | ||
2694 | * config/aarch64/aarch64.cc (lane_size): New function. | |
2695 | (aarch64_simd_clone_compute_vecsize_and_simdlen): Determine simdlen according to NDS rule | |
2696 | and reject combination of simdlen and types that lead to vectors larger than 128bits. | |
2697 | ||
2698 | 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2699 | ||
2700 | * rtl-ssa/insns.cc (function_info::record_use): Add !ordered_p case. | |
2701 | ||
2702 | 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2703 | ||
2704 | * config/riscv/riscv-v.cc (get_gather_index_mode): New function. | |
2705 | (shuffle_series_patterns): Robostify shuffle index. | |
2706 | (shuffle_generic_patterns): Ditto. | |
2707 | ||
2708 | 2023-12-11 Victor Do Nascimento <victor.donascimento@arm.com> | |
2709 | ||
2710 | * config/aarch64/arm_neon.h (vldap1_lane_u64): Add | |
2711 | `const' to `__builtin_aarch64_simd_di *' cast. | |
2712 | (vldap1q_lane_u64): Likewise. | |
2713 | (vldap1_lane_s64): Cast __src to `const __builtin_aarch64_simd_di *'. | |
2714 | (vldap1q_lane_s64): Likewise. | |
2715 | (vldap1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'. | |
2716 | (vldap1q_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'. | |
2717 | (vldap1_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast. | |
2718 | (vldap1q_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast. | |
2719 | (vstl1_lane_u64): remove stray `const'. | |
2720 | (vstl1_lane_s64): Cast __src to `__builtin_aarch64_simd_di *'. | |
2721 | (vstl1q_lane_s64): Likewise. | |
2722 | (vstl1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'. | |
2723 | (vstl1q_lane_f64): Likewise. | |
2724 | ||
2725 | 2023-12-11 Robin Dapp <rdapp@ventanamicro.com> | |
2726 | ||
2727 | PR target/112853 | |
2728 | * config/riscv/riscv-v.cc (expand_const_vector): Fix step | |
2729 | calculation. | |
2730 | (modulo_sel_indices): Also perform modulo for variable-length | |
2731 | constants. | |
2732 | (shuffle_series): Recognize series permutations. | |
2733 | (expand_vec_perm_const_1): Add shuffle_series. | |
2734 | ||
2735 | 2023-12-11 liuhongt <hongtao.liu@intel.com> | |
2736 | ||
2737 | * match.pd (VCE (a cmp b ? -1 : 0) < 0) ? c : d ---> (VCE ((a | |
2738 | cmp b) ? (VCE:c) : (VCE:d))): New gimple simplication. | |
2739 | ||
2740 | 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2741 | ||
2742 | PR target/112431 | |
2743 | * config/riscv/vector.md: Support highest overlap for wv instructions. | |
2744 | ||
2745 | 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2746 | ||
2747 | * config/riscv/riscv-vsetvl.cc (extract_single_source): Fix ICE. | |
2748 | ||
2749 | 2023-12-11 Jakub Jelinek <jakub@redhat.com> | |
2750 | ||
2751 | * doc/extend.texi (__sync_fetch_and_add, __sync_fetch_and_sub, | |
2752 | __sync_fetch_and_or, __sync_fetch_and_and, __sync_fetch_and_xor, | |
2753 | __sync_fetch_and_nand, __sync_add_and_fetch, __sync_sub_and_fetch, | |
2754 | __sync_or_and_fetch, __sync_and_and_fetch, __sync_xor_and_fetch, | |
2755 | __sync_nand_and_fetch, __sync_bool_compare_and_swap, | |
2756 | __sync_val_compare_and_swap, __sync_lock_test_and_set, | |
2757 | __sync_lock_release, __atomic_load_n, __atomic_load, __atomic_store_n, | |
2758 | __atomic_store, __atomic_exchange_n, __atomic_exchange, | |
2759 | __atomic_compare_exchange_n, __atomic_compare_exchange, | |
2760 | __atomic_add_fetch, __atomic_sub_fetch, __atomic_and_fetch, | |
2761 | __atomic_xor_fetch, __atomic_or_fetch, __atomic_nand_fetch, | |
2762 | __atomic_fetch_add, __atomic_fetch_sub, __atomic_fetch_and, | |
2763 | __atomic_fetch_xor, __atomic_fetch_or, __atomic_fetch_nand, | |
2764 | __atomic_test_and_set, __atomic_clear, __atomic_thread_fence, | |
2765 | __atomic_signal_fence, __atomic_always_lock_free, | |
2766 | __atomic_is_lock_free, __builtin_add_overflow, | |
2767 | __builtin_sadd_overflow, __builtin_saddl_overflow, | |
2768 | __builtin_saddll_overflow, __builtin_uadd_overflow, | |
2769 | __builtin_uaddl_overflow, __builtin_uaddll_overflow, | |
2770 | __builtin_sub_overflow, __builtin_ssub_overflow, | |
2771 | __builtin_ssubl_overflow, __builtin_ssubll_overflow, | |
2772 | __builtin_usub_overflow, __builtin_usubl_overflow, | |
2773 | __builtin_usubll_overflow, __builtin_mul_overflow, | |
2774 | __builtin_smul_overflow, __builtin_smull_overflow, | |
2775 | __builtin_smulll_overflow, __builtin_umul_overflow, | |
2776 | __builtin_umull_overflow, __builtin_umulll_overflow, | |
2777 | __builtin_add_overflow_p, __builtin_sub_overflow_p, | |
2778 | __builtin_mul_overflow_p, __builtin_addc, __builtin_addcl, | |
2779 | __builtin_addcll, __builtin_subc, __builtin_subcl, __builtin_subcll, | |
2780 | __builtin_alloca, __builtin_alloca_with_align, | |
2781 | __builtin_alloca_with_align_and_max, __builtin_speculation_safe_value, | |
2782 | __builtin_nan, __builtin_nand32, __builtin_nand64, __builtin_nand128, | |
2783 | __builtin_nanf, __builtin_nanl, __builtin_nanf@var{n}, | |
2784 | __builtin_nanf@var{n}x, __builtin_nans, __builtin_nansd32, | |
2785 | __builtin_nansd64, __builtin_nansd128, __builtin_nansf, | |
2786 | __builtin_nansl, __builtin_nansf@var{n}, __builtin_nansf@var{n}x, | |
2787 | __builtin_ffs, __builtin_clz, __builtin_ctz, __builtin_clrsb, | |
2788 | __builtin_popcount, __builtin_parity, __builtin_bswap16, | |
2789 | __builtin_bswap32, __builtin_bswap64, __builtin_bswap128, | |
2790 | __builtin_extend_pointer, __builtin_goacc_parlevel_id, | |
2791 | __builtin_goacc_parlevel_size, vec_clrl, vec_clrr, vec_mulh, vec_mul, | |
2792 | vec_div, vec_dive, vec_mod, __builtin_rx_mvtc): Use @var{...} around | |
2793 | parameter names. | |
2794 | (vec_rl, vec_sl, vec_sr, vec_sra): Likewise. Use @var{...} also | |
2795 | around A, B and R in description. | |
2796 | ||
2797 | 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2798 | ||
2799 | * config/riscv/riscv-selftests.cc (riscv_run_selftests): | |
2800 | Remove poly self test when FIXED-VLMAX. | |
2801 | ||
2802 | 2023-12-11 Fei Gao <gaofei@eswincomputing.com> | |
2803 | Xiao Zeng <zengxiao@eswincomputing.com> | |
2804 | ||
2805 | * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for AND. | |
2806 | (noce_bbs_ok_for_cond_zero_arith): Likewise. | |
2807 | (noce_try_cond_zero_arith): Likewise. | |
2808 | ||
2809 | 2023-12-11 liuhongt <hongtao.liu@intel.com> | |
2810 | ||
2811 | PR target/112904 | |
2812 | * config/i386/mmx.md (*xop_pcmov_<mode>): New define_insn. | |
2813 | ||
2814 | 2023-12-11 Haochen Gui <guihaoc@gcc.gnu.org> | |
2815 | ||
2816 | PR target/112707 | |
2817 | * config/rs6000/rs6000.h (TARGET_FCTID): Define. | |
2818 | * config/rs6000/rs6000.md (lrint<mode>di2): Add guard TARGET_FCTID. | |
2819 | * (lround<mode>di2): Replace TARGET_FPRND with TARGET_FCTID. | |
2820 | ||
2821 | 2023-12-11 Haochen Gui <guihaoc@gcc.gnu.org> | |
2822 | ||
2823 | PR target/112707 | |
2824 | * config/rs6000/rs6000.md (expand lrint<mode>si2): New. | |
2825 | (insn lrint<mode>si2): Rename to... | |
2826 | (*lrint<mode>si): ...this. | |
2827 | (lrint<mode>si_di): New. | |
2828 | ||
2829 | 2023-12-10 Fei Gao <gaofei@eswincomputing.com> | |
2830 | Xiao Zeng <zengxiao@eswincomputing.com> | |
2831 | ||
2832 | * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for shift | |
2833 | like op. | |
2834 | ||
2835 | 2023-12-10 Richard Sandiford <richard.sandiford@arm.com> | |
2836 | ||
2837 | PR target/112931 | |
2838 | PR target/112933 | |
2839 | * config/aarch64/aarch64-protos.h (aarch64_sve_reinterpret): Declare. | |
2840 | * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): New function. | |
2841 | * config/aarch64/aarch64-sve-builtins-sme.cc (svread_za_impl::expand) | |
2842 | (svwrite_za_impl::expand): Use it to cast the SVE register to the | |
2843 | right mode. | |
2844 | ||
2845 | 2023-12-10 Richard Sandiford <richard.sandiford@arm.com> | |
2846 | ||
2847 | PR target/112930 | |
2848 | * config/aarch64/aarch64.cc (aarch64_sme_mode_switch_regs::add_reg): | |
2849 | Force specific SVE modes for single registers as well as structures. | |
2850 | ||
2851 | 2023-12-10 Jason Merrill <jason@redhat.com> | |
2852 | ||
2853 | * doc/invoke.texi (-fpermissive): Mention ObjC++ for -Wnarrowing. | |
2854 | ||
2855 | 2023-12-10 Jeff Law <jlaw@ventanamicro.com> | |
2856 | ||
2857 | * config/h8300/addsub.md (uaddv<mode>4, usubv<mode>4): New expanders. | |
2858 | (uaddv): New define_insn_and_split plus post-reload pattern. | |
2859 | ||
2860 | 2023-12-10 Jeff Law <jlaw@ventanamicro.com> | |
2861 | ||
2862 | * config/h8300/h8300-protos.h (use_extvsi): Prototype. | |
2863 | * config/h8300/combiner.md: Two new define_insn_and_split patterns | |
2864 | to implement signed bitfield extractions. | |
2865 | * config/h8300/h8300.cc (use_extvsi): New function. | |
2866 | ||
2867 | 2023-12-10 Jeff Law <jlaw@ventanamicro.com> | |
2868 | ||
2869 | * config/h8300/combiner.md (single bit signed bitfield extraction): Fix | |
2870 | length computation when the bit we want is in the low half word. | |
2871 | ||
2872 | 2023-12-10 Jeff Law <jlaw@ventanamicro.com> | |
2873 | ||
2874 | * config/h8300/h8300.cc (compute_a_shift_length): Fix computation | |
2875 | of logical shifts on the H8/SX. | |
2876 | ||
2877 | 2023-12-09 Jakub Jelinek <jakub@redhat.com> | |
2878 | ||
2879 | PR tree-optimization/112887 | |
2880 | * tree-ssa-phiopt.cc (hoist_adjacent_loads): Change type of | |
2881 | param_align, param_align_bits, offset1, offset2, size2 and align1 | |
2882 | variables from int or unsigned int to unsigned HOST_WIDE_INT. | |
2883 | ||
2884 | 2023-12-09 Costas Argyris <costas.argyris@gmail.com> | |
2885 | Jakub Jelinek <jakub@redhat.com> | |
2886 | ||
2887 | PR driver/93019 | |
2888 | * gcc.cc (driver::finalize): Call XDELETEVEC on mdswitches before | |
2889 | clearing it. | |
2890 | ||
2891 | 2023-12-09 Jakub Jelinek <jakub@redhat.com> | |
2892 | ||
2893 | * attribs.h (any_nonignored_attribute_p): Declare. | |
2894 | * attribs.cc (any_nonignored_attribute_p): New function. | |
2895 | ||
2896 | 2023-12-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
2897 | ||
2898 | PR target/112932 | |
2899 | * config/riscv/vector.md (movmisalign<mode>): Fix VLSmode bugs. | |
2900 | ||
2901 | 2023-12-09 Alexandre Oliva <oliva@adacore.com> | |
2902 | ||
2903 | * tree-emutls.cc: Include diagnostic-core.h. | |
2904 | (pass_ipa_lower_emutls::gate): Skip if errors were seen. | |
2905 | ||
2906 | 2023-12-08 Vladimir N. Makarov <vmakarov@redhat.com> | |
2907 | ||
2908 | PR rtl-optimization/112875 | |
2909 | * lra-eliminations.cc (lra_eliminate_regs_1): Change an assert. | |
2910 | Add ASM_OPERANDS case. | |
2911 | ||
2912 | 2023-12-08 Robin Dapp <rdapp@ventanamicro.com> | |
2913 | ||
2914 | PR target/112109 | |
2915 | * config/riscv/riscv-protos.h (expand_strcmp): Declare. | |
2916 | * config/riscv/riscv-string.cc (riscv_expand_strcmp): Add | |
2917 | strategy handling and delegation to scalar and vector expanders. | |
2918 | (expand_strcmp): Vectorized implementation. | |
2919 | * config/riscv/riscv.md: Add TARGET_VECTOR to strcmp and strncmp | |
2920 | expander. | |
2921 | ||
2922 | 2023-12-08 Robin Dapp <rdapp@ventanamicro.com> | |
2923 | ||
2924 | PR target/112109 | |
2925 | * config/riscv/riscv-protos.h (expand_rawmemchr): Add strlen | |
2926 | parameter. | |
2927 | * config/riscv/riscv-string.cc (riscv_expand_strlen): Call | |
2928 | rawmemchr. | |
2929 | (expand_rawmemchr): Add strlen handling. | |
2930 | * config/riscv/riscv.md: Add TARGET_VECTOR to strlen expander. | |
2931 | ||
2932 | 2023-12-08 Richard Sandiford <richard.sandiford@arm.com> | |
2933 | ||
2934 | * config/aarch64/aarch64-early-ra.cc (allocno_info::chain_next): | |
2935 | Put into an enum with... | |
2936 | (allocno_info::last_def_point): ...new member variable. | |
2937 | (allocno_info::m_current_bb_point): New member variable. | |
2938 | (likely_operand_match_p): Switch based on get_constraint_type, | |
2939 | rather than based on rtx code. Handle relaxed and special memory | |
2940 | constraints. | |
2941 | (early_ra::record_copy): Allow the source of an equivalence to be | |
2942 | assigned to more than once. | |
2943 | (early_ra::record_allocno_use): Invalidate any previous equivalence. | |
2944 | Initialize last_def_point. | |
2945 | (early_ra::record_allocno_def): Set last_def_point. | |
2946 | (early_ra::valid_equivalence_p): New function, split out from... | |
2947 | (early_ra::record_copy): ...here. Use last_def_point to handle | |
2948 | source registers that have a later definition. | |
2949 | (make_pass_aarch64_early_ra): Fix comment. | |
2950 | ||
2951 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
2952 | ||
2953 | Revert: | |
2954 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
2955 | ||
2956 | * config/arm/arm_neon.h | |
2957 | (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New. | |
2958 | (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New. | |
2959 | (vld1q_f16_x2, vld1q_f32_x2): New. | |
2960 | (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New. | |
2961 | (vld1q_bf16_x2): New. | |
2962 | * config/arm/arm_neon_builtins.def (vld1_x2): New entries. | |
2963 | * config/arm/neon.md (vld1_x2<mode>): New. | |
2964 | ||
2965 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
2966 | ||
2967 | Revert: | |
2968 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
2969 | ||
2970 | * config/arm/arm_neon.h | |
2971 | (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New. | |
2972 | (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New. | |
2973 | (vld1q_f16_x3, vld1q_f32_x3): New. | |
2974 | (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New. | |
2975 | (vld1q_bf16_x3): New. | |
2976 | * config/arm/arm_neon_builtins.def (vld1_x3): New entries. | |
2977 | * config/arm/neon.md (vld1_x3<mode>): New. | |
2978 | ||
2979 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
2980 | ||
2981 | Revert: | |
2982 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
2983 | ||
2984 | * config/arm/arm_neon.h | |
2985 | (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New. | |
2986 | (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New. | |
2987 | (vld1q_f16_x4, vld1q_f32_x4): New. | |
2988 | (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New. | |
2989 | (vld1q_bf16_x4): New. | |
2990 | * config/arm/arm_neon_builtins.def (vld1_x4): New entries. | |
2991 | * config/arm/neon.md (vld1_x4<mode>): New. | |
2992 | ||
2993 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
2994 | ||
2995 | Revert: | |
2996 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
2997 | ||
2998 | * config/arm/arm_neon.h | |
2999 | (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New. | |
3000 | (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New. | |
3001 | (vst1_f16_x2, vst1_f32_x2): New. | |
3002 | (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New. | |
3003 | (vst1_bf16_x2): New. | |
3004 | * config/arm/arm_neon_builtins.def (vst1_x2): New entries. | |
3005 | * config/arm/neon.md (vst1_x2<mode>): New. | |
3006 | ||
3007 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3008 | ||
3009 | Revert: | |
3010 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3011 | ||
3012 | * config/arm/arm_neon.h | |
3013 | (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New. | |
3014 | (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New. | |
3015 | (vst1_f16_x3, vst1_f32_x3): New. | |
3016 | (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New. | |
3017 | (vst1_bf16_x3): New. | |
3018 | * config/arm/arm_neon_builtins.def (vst1_x3): New entries. | |
3019 | * config/arm/neon.md (vst1_x3<mode>): New. | |
3020 | ||
3021 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3022 | ||
3023 | Revert: | |
3024 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3025 | ||
3026 | * config/arm/arm_neon.h | |
3027 | (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New. | |
3028 | (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New. | |
3029 | (vst1_f16_x4, vst1_f32_x4): New. | |
3030 | (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New. | |
3031 | (vst1_bf16_x4): New. | |
3032 | * config/arm/arm_neon_builtins.def (vst1_x4): New entries. | |
3033 | * config/arm/neon.md (vst1_x4<mode>): New. | |
3034 | ||
3035 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3036 | ||
3037 | Revert: | |
3038 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3039 | ||
3040 | * config/arm/arm_neon.h | |
3041 | (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New. | |
3042 | (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New. | |
3043 | (vst1q_f16_x2, vst1q_f32_x2): New. | |
3044 | (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New. | |
3045 | (vst1q_bf16_x2): New. | |
3046 | * config/arm/arm_neon_builtins.def (vst1q_x2): New entries. | |
3047 | * config/arm/neon.md | |
3048 | (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from | |
3049 | neon_vst1_x2<mode>. | |
3050 | * config/arm/iterators.md (VMEMX2): New mode iterator. | |
3051 | (VMEMX2_q): New mode attribute. | |
3052 | ||
3053 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3054 | ||
3055 | Revert: | |
3056 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3057 | ||
3058 | * config/arm/arm_neon.h | |
3059 | (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New. | |
3060 | (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New. | |
3061 | (vst1q_f16_x3, vst1q_f32_x3): New. | |
3062 | (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New. | |
3063 | (vst1q_bf16_x3): New. | |
3064 | * config/arm/arm_neon_builtins.def (vst1q_x3): New entries. | |
3065 | * config/arm/neon.md (neon_vst1q_x3<mode>): New. | |
3066 | ||
3067 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3068 | ||
3069 | Revert: | |
3070 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3071 | ||
3072 | * config/arm/arm_neon.h | |
3073 | (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New. | |
3074 | (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New. | |
3075 | (vst1q_f16_x4, vst1q_f32_x4): New. | |
3076 | (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New. | |
3077 | (vst1q_bf16_x4): New. | |
3078 | * config/arm/arm_neon_builtins.def (vst1q_x4): New entries. | |
3079 | * config/arm/neon.md (neon_vst1q_x4<mode>): New. | |
3080 | ||
3081 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3082 | ||
3083 | Revert: | |
3084 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3085 | ||
3086 | * config/arm/arm_neon.h | |
3087 | (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New | |
3088 | (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New. | |
3089 | (vld1_f16_x2, vld1_f32_x2): New. | |
3090 | (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New. | |
3091 | (vld1_bf16_x2): New. | |
3092 | (vld1q_types_x2): Updated to use vld1q_x2 from | |
3093 | arm_neon_builtins.def | |
3094 | * config/arm/arm_neon_builtins.def | |
3095 | (vld1_x2): Updated entries. | |
3096 | (vld1q_x2): New entries, but comes from the old vld1_x2 | |
3097 | * config/arm/neon.md | |
3098 | (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated | |
3099 | from neon_vld1_x2<mode>. | |
3100 | ||
3101 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3102 | ||
3103 | Revert: | |
3104 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3105 | ||
3106 | * config/arm/arm_neon.h | |
3107 | (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New | |
3108 | (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New. | |
3109 | (vld1_f16_x3, vld1_f32_x3): New. | |
3110 | (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New. | |
3111 | (vld1_bf16_x3): New. | |
3112 | (vld1q_types_x3): Updated to use vld1q_x3 from | |
3113 | arm_neon_builtins.def | |
3114 | * config/arm/arm_neon_builtins.def | |
3115 | (vld1_x3): Updated entries. | |
3116 | (vld1q_x3): New entries, but comes from the old vld1_x2 | |
3117 | * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from | |
3118 | neon_vld1_x3<mode>. | |
3119 | ||
3120 | 2023-12-08 Richard Earnshaw <rearnsha@arm.com> | |
3121 | ||
3122 | Revert: | |
3123 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3124 | ||
3125 | * config/arm/arm_neon.h | |
3126 | (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New | |
3127 | (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New. | |
3128 | (vld1_f16_x4, vld1_f32_x4): New. | |
3129 | (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New. | |
3130 | (vld1_bf16_x4): New. | |
3131 | (vld1q_types_x4): Updated to use vld1q_x4 | |
3132 | from arm_neon_builtins.def | |
3133 | * config/arm/arm_neon_builtins.def | |
3134 | (vld1_x4): Updated entries. | |
3135 | (vld1q_x4): New entries, but comes from the old vld1_x2 | |
3136 | * config/arm/neon.md (neon_vld1q_x4<mode>): | |
3137 | Updated from neon_vld1_x4<mode>. | |
3138 | ||
3139 | 2023-12-08 Tobias Burnus <tobias@codesourcery.com> | |
3140 | ||
3141 | * builtin-types.def (BT_FN_PTR_PTR_SIZE_PTRMODE_PTRMODE): New. | |
3142 | * omp-builtins.def (BUILT_IN_GOMP_REALLOC): New. | |
3143 | * builtins.cc (builtin_fnspec): Handle it. | |
3144 | * gimple-ssa-warn-access.cc (fndecl_alloc_p, | |
3145 | matching_alloc_calls_p): Likewise. | |
3146 | * gimple.cc (nonfreeing_call_p): Likewise. | |
3147 | * predict.cc (expr_expected_value_1): Likewise. | |
3148 | * tree-ssa-ccp.cc (evaluate_stmt): Likewise. | |
3149 | * tree.cc (fndecl_dealloc_argno): Likewise. | |
3150 | ||
3151 | 2023-12-08 Richard Biener <rguenther@suse.de> | |
3152 | ||
3153 | PR tree-optimization/112909 | |
3154 | * tree-ssa-uninit.cc (find_uninit_use): Look through a | |
3155 | single level of SSA name copies with single use. | |
3156 | ||
3157 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3158 | ||
3159 | * config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const): Use | |
3160 | simplify_gen_subreg instead of gen_rtx_SUBREG. | |
3161 | (loongarch_expand_vec_perm_const_2): Ditto. | |
3162 | (loongarch_expand_vec_cond_expr): Ditto. | |
3163 | ||
3164 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3165 | ||
3166 | * config/loongarch/loongarch.cc (loongarch_vector_costs::determine_suggested_unroll_factor): | |
3167 | If m_has_recip is true, uf return 1. | |
3168 | (loongarch_vector_costs::add_stmt_cost): Detect the use of approximate instruction sequence. | |
3169 | ||
3170 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3171 | ||
3172 | * config/loongarch/genopts/loongarch.opt.in (recip_mask): New variable. | |
3173 | (-mrecip, -mrecip): New options. | |
3174 | * config/loongarch/lasx.md (div<mode>3): New expander. | |
3175 | (*div<mode>3): Rename. | |
3176 | (sqrt<mode>2): New expander. | |
3177 | (*sqrt<mode>2): Rename. | |
3178 | (rsqrt<mode>2): New expander. | |
3179 | * config/loongarch/loongarch-protos.h (loongarch_emit_swrsqrtsf): New prototype. | |
3180 | (loongarch_emit_swdivsf): Ditto. | |
3181 | * config/loongarch/loongarch.cc (loongarch_option_override_internal): Set | |
3182 | recip_mask for -mrecip and -mrecip= options. | |
3183 | (loongarch_emit_swrsqrtsf): New function. | |
3184 | (loongarch_emit_swdivsf): Ditto. | |
3185 | * config/loongarch/loongarch.h (RECIP_MASK_NONE, RECIP_MASK_DIV, RECIP_MASK_SQRT | |
3186 | RECIP_MASK_RSQRT, RECIP_MASK_VEC_DIV, RECIP_MASK_VEC_SQRT, RECIP_MASK_VEC_RSQRT | |
3187 | RECIP_MASK_ALL): New bitmasks. | |
3188 | (TARGET_RECIP_DIV, TARGET_RECIP_SQRT, TARGET_RECIP_RSQRT, TARGET_RECIP_VEC_DIV | |
3189 | TARGET_RECIP_VEC_SQRT, TARGET_RECIP_VEC_RSQRT): New tests. | |
3190 | * config/loongarch/loongarch.md (sqrt<mode>2): New expander. | |
3191 | (*sqrt<mode>2): Rename. | |
3192 | (rsqrt<mode>2): New expander. | |
3193 | * config/loongarch/loongarch.opt (recip_mask): New variable. | |
3194 | (-mrecip, -mrecip): New options. | |
3195 | * config/loongarch/lsx.md (div<mode>3): New expander. | |
3196 | (*div<mode>3): Rename. | |
3197 | (sqrt<mode>2): New expander. | |
3198 | (*sqrt<mode>2): Rename. | |
3199 | (rsqrt<mode>2): New expander. | |
3200 | * config/loongarch/predicates.md (reg_or_vecotr_1_operand): New predicate. | |
3201 | * doc/invoke.texi (LoongArch Options): Document new options. | |
3202 | ||
3203 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3204 | ||
3205 | * config/loongarch/lasx.md (lasx_xvfrecip_<flasxfmt>): Renamed to .. | |
3206 | (recip<mode>3): .. this. | |
3207 | * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vfrecip_d): Redefine | |
3208 | to new pattern name. | |
3209 | (CODE_FOR_lsx_vfrecip_s): Ditto. | |
3210 | (CODE_FOR_lasx_xvfrecip_d): Ditto. | |
3211 | (CODE_FOR_lasx_xvfrecip_s): Ditto. | |
3212 | (loongarch_expand_builtin_direct): For the vector recip instructions, construct a | |
3213 | temporary parameter const1_vector. | |
3214 | * config/loongarch/lsx.md (lsx_vfrecip_<flsxfmt>): Renamed to .. | |
3215 | (recip<mode>3): .. this. | |
3216 | * config/loongarch/predicates.md (const_vector_1_operand): New predicate. | |
3217 | ||
3218 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3219 | ||
3220 | * config/loongarch/lasx.md (lasx_xvfrsqrt_<flasxfmt>): Renamed to .. | |
3221 | (rsqrt<mode>2): .. this. | |
3222 | * config/loongarch/loongarch-builtins.cc | |
3223 | (CODE_FOR_lsx_vfrsqrt_d): Redefine to standard pattern name. | |
3224 | (CODE_FOR_lsx_vfrsqrt_s): Ditto. | |
3225 | (CODE_FOR_lasx_xvfrsqrt_d): Ditto. | |
3226 | (CODE_FOR_lasx_xvfrsqrt_s): Ditto. | |
3227 | * config/loongarch/loongarch.cc (use_rsqrt_p): New function. | |
3228 | (loongarch_optab_supported_p): Ditto. | |
3229 | (TARGET_OPTAB_SUPPORTED_P): New hook. | |
3230 | * config/loongarch/loongarch.md (*rsqrt<mode>a): Remove. | |
3231 | (*rsqrt<mode>2): New insn pattern. | |
3232 | (*rsqrt<mode>b): Remove. | |
3233 | * config/loongarch/lsx.md (lsx_vfrsqrt_<flsxfmt>): Renamed to .. | |
3234 | (rsqrt<mode>2): .. this. | |
3235 | ||
3236 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3237 | ||
3238 | * config/loongarch/genopts/isa-evolution.in (fecipe): Add. | |
3239 | * config/loongarch/larchintrin.h (__frecipe_s): New intrinsic. | |
3240 | (__frecipe_d): Ditto. | |
3241 | (__frsqrte_s): Ditto. | |
3242 | (__frsqrte_d): Ditto. | |
3243 | * config/loongarch/lasx.md (lasx_xvfrecipe_<flasxfmt>): New insn pattern. | |
3244 | (lasx_xvfrsqrte_<flasxfmt>): Ditto. | |
3245 | * config/loongarch/lasxintrin.h (__lasx_xvfrecipe_s): New intrinsic. | |
3246 | (__lasx_xvfrecipe_d): Ditto. | |
3247 | (__lasx_xvfrsqrte_s): Ditto. | |
3248 | (__lasx_xvfrsqrte_d): Ditto. | |
3249 | * config/loongarch/loongarch-builtins.cc (AVAIL_ALL): Add predicates. | |
3250 | (LSX_EXT_BUILTIN): New macro. | |
3251 | (LASX_EXT_BUILTIN): Ditto. | |
3252 | * config/loongarch/loongarch-cpucfg-map.h: Regenerate. | |
3253 | * config/loongarch/loongarch-c.cc: Add builtin macro "__loongarch_frecipe". | |
3254 | * config/loongarch/loongarch-def.cc: Regenerate. | |
3255 | * config/loongarch/loongarch-str.h (OPTSTR_FRECIPE): Regenerate. | |
3256 | * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump status for TARGET_FRECIPE. | |
3257 | * config/loongarch/loongarch.md (loongarch_frecipe_<fmt>): New insn pattern. | |
3258 | (loongarch_frsqrte_<fmt>): Ditto. | |
3259 | * config/loongarch/loongarch.opt: Regenerate. | |
3260 | * config/loongarch/lsx.md (lsx_vfrecipe_<flsxfmt>): New insn pattern. | |
3261 | (lsx_vfrsqrte_<flsxfmt>): Ditto. | |
3262 | * config/loongarch/lsxintrin.h (__lsx_vfrecipe_s): New intrinsic. | |
3263 | (__lsx_vfrecipe_d): Ditto. | |
3264 | (__lsx_vfrsqrte_s): Ditto. | |
3265 | (__lsx_vfrsqrte_d): Ditto. | |
3266 | * doc/extend.texi: Add documentation for LoongArch new builtins and intrinsics. | |
3267 | ||
3268 | 2023-12-08 Richard Biener <rguenther@suse.de> | |
3269 | ||
3270 | * tree-outof-ssa.cc (rewrite_out_of_ssa): Dump GIMPLE once only, | |
3271 | after final IL adjustments. | |
3272 | ||
3273 | 2023-12-08 Pan Li <pan2.li@intel.com> | |
3274 | ||
3275 | * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF | |
3276 | for mode attr V_F2DI_CONVERT_BRIDGE. | |
3277 | ||
3278 | 2023-12-08 Jiahao Xu <xujiahao@loongson.cn> | |
3279 | ||
3280 | * config/loongarch/lasx.md (xorsign<mode>3): New expander. | |
3281 | * config/loongarch/loongarch.cc (loongarch_can_change_mode_class): Allow | |
3282 | conversion between LSX vector mode and scalar fp mode. | |
3283 | * config/loongarch/loongarch.md (@xorsign<mode>3): New expander. | |
3284 | * config/loongarch/lsx.md (@xorsign<mode>3): Ditto. | |
3285 | ||
3286 | 2023-12-08 Jakub Jelinek <jakub@redhat.com> | |
3287 | ||
3288 | PR tree-optimization/112902 | |
3289 | * gimple-lower-bitint.cc (gimple_lower_bitint): For a narrowing | |
3290 | or same precision cast don't set SSA_NAME_VERSION in m_names only | |
3291 | if use_stmt is mergeable_op or fall through into the check that | |
3292 | use is a store or rhs1 is not mergeable or other reasons prevent | |
3293 | merging. | |
3294 | ||
3295 | 2023-12-08 Jakub Jelinek <jakub@redhat.com> | |
3296 | ||
3297 | PR tree-optimization/112901 | |
3298 | * vr-values.cc | |
3299 | (simplify_using_ranges::simplify_float_conversion_using_ranges): | |
3300 | Return false if rhs1 has BITINT_TYPE type with BLKmode TYPE_MODE. | |
3301 | ||
3302 | 2023-12-08 Jakub Jelinek <jakub@redhat.com> | |
3303 | ||
3304 | PR middle-end/112411 | |
3305 | * haifa-sched.cc (extend_h_i_d): Use 3U instead of 3 in | |
3306 | 3 * get_max_uid () / 2 calculation. | |
3307 | ||
3308 | 2023-12-08 Lulu Cheng <chenglulu@loongson.cn> | |
3309 | ||
3310 | * config/loongarch/genopts/loongarch-strings: Delete STR_ISA_BASE_LA64V110. | |
3311 | * config/loongarch/genopts/loongarch.opt.in: Likewise. | |
3312 | * config/loongarch/loongarch-cpu.cc (ISA_BASE_LA64V110_FEATURES): Delete macro. | |
3313 | (fill_native_cpu_config): Define a new variable hw_isa_evolution record the | |
3314 | extended instruction set support read from cpucfg. | |
3315 | * config/loongarch/loongarch-def.cc: Set evolution at initialization. | |
3316 | * config/loongarch/loongarch-def.h (ISA_BASE_LA64V100): Delete. | |
3317 | (ISA_BASE_LA64V110): Likewise. | |
3318 | (N_ISA_BASE_TYPES): Likewise. | |
3319 | (defined): Likewise. | |
3320 | * config/loongarch/loongarch-opts.cc: Likewise. | |
3321 | * config/loongarch/loongarch-opts.h (TARGET_64BIT): Likewise. | |
3322 | (ISA_BASE_IS_LA64V110): Likewise. | |
3323 | * config/loongarch/loongarch-str.h (STR_ISA_BASE_LA64V110): Likewise. | |
3324 | * config/loongarch/loongarch.opt: Regenerate. | |
3325 | ||
3326 | 2023-12-08 Xi Ruoyao <xry111@xry111.site> | |
3327 | ||
3328 | * config/loongarch/loongarch-def.h: Remove extern "C". | |
3329 | (loongarch_isa_base_strings): Declare as loongarch_def_array | |
3330 | instead of plain array. | |
3331 | (loongarch_isa_ext_strings): Likewise. | |
3332 | (loongarch_abi_base_strings): Likewise. | |
3333 | (loongarch_abi_ext_strings): Likewise. | |
3334 | (loongarch_cmodel_strings): Likewise. | |
3335 | (loongarch_cpu_strings): Likewise. | |
3336 | (loongarch_cpu_default_isa): Likewise. | |
3337 | (loongarch_cpu_issue_rate): Likewise. | |
3338 | (loongarch_cpu_multipass_dfa_lookahead): Likewise. | |
3339 | (loongarch_cpu_cache): Likewise. | |
3340 | (loongarch_cpu_align): Likewise. | |
3341 | (loongarch_cpu_rtx_cost_data): Likewise. | |
3342 | (loongarch_isa): Add a constructor and field setter functions. | |
3343 | * config/loongarch/loongarch-opts.h (loongarch-defs.h): Do not | |
3344 | include for target libraries. | |
3345 | * config/loongarch/loongarch-opts.cc: Comment code that doesn't | |
3346 | run and causes compilation errors. | |
3347 | * config/loongarch/loongarch-tune.h (LOONGARCH_TUNE_H): Likewise. | |
3348 | (struct loongarch_rtx_cost_data): Likewise. | |
3349 | (struct loongarch_cache): Likewise. | |
3350 | (struct loongarch_align): Likewise. | |
3351 | * config/loongarch/t-loongarch: Compile loongarch-def.cc with the | |
3352 | C++ compiler. | |
3353 | * config/loongarch/loongarch-def-array.h: New file for a | |
3354 | std:array like data structure with position setter function. | |
3355 | * config/loongarch/loongarch-def.c: Rename to ... | |
3356 | * config/loongarch/loongarch-def.cc: ... here. | |
3357 | (loongarch_cpu_strings): Define as loongarch_def_array instead | |
3358 | of plain array. | |
3359 | (loongarch_cpu_default_isa): Likewise. | |
3360 | (loongarch_cpu_cache): Likewise. | |
3361 | (loongarch_cpu_align): Likewise. | |
3362 | (loongarch_cpu_rtx_cost_data): Likewise. | |
3363 | (loongarch_cpu_issue_rate): Likewise. | |
3364 | (loongarch_cpu_multipass_dfa_lookahead): Likewise. | |
3365 | (loongarch_isa_base_strings): Likewise. | |
3366 | (loongarch_isa_ext_strings): Likewise. | |
3367 | (loongarch_abi_base_strings): Likewise. | |
3368 | (loongarch_abi_ext_strings): Likewise. | |
3369 | (loongarch_cmodel_strings): Likewise. | |
3370 | (abi_minimal_isa): Likewise. | |
3371 | (loongarch_rtx_cost_optimize_size): Use field setter functions | |
3372 | instead of designated initializers. | |
3373 | (loongarch_rtx_cost_data): Implement default constructor. | |
3374 | ||
3375 | 2023-12-08 Jakub Jelinek <jakub@redhat.com> | |
3376 | ||
3377 | PR middle-end/112411 | |
3378 | * params.opt (-param=min-nondebug-insn-uid=): Add | |
3379 | IntegerRange(0, 1073741824). | |
3380 | * lra.cc (check_and_expand_insn_recog_data): Use 3U rather than 3 | |
3381 | in * 3 / 2 computation and if the result is smaller or equal to | |
3382 | index, use index + 1. | |
3383 | ||
3384 | 2023-12-08 Haochen Jiang <haochen.jiang@intel.com> | |
3385 | ||
3386 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
3387 | Do not append "-mno-" for Xeon Phi ISAs. | |
3388 | * config/i386/i386-options.cc (ix86_option_override_internal): | |
3389 | Emit a warning for KNL/KNM targets. | |
3390 | * config/i386/i386.opt: Emit a warning for Xeon Phi ISAs. | |
3391 | ||
3392 | 2023-12-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
3393 | ||
3394 | * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): | |
3395 | Remove redundant check. | |
3396 | ||
3397 | 2023-12-08 Hao Liu <hliu@os.amperecomputing.com> | |
3398 | ||
3399 | PR tree-optimization/112774 | |
3400 | * tree-pretty-print.cc: if nonwrapping flag is set, chrec will be | |
3401 | printed with additional <nw> info. | |
3402 | * tree-scalar-evolution.cc: add record_nonwrapping_chrec and | |
3403 | nonwrapping_chrec_p to set and check the new flag respectively. | |
3404 | * tree-scalar-evolution.h: Likewise. | |
3405 | * tree-ssa-loop-niter.cc (idx_infer_loop_bounds, | |
3406 | infer_loop_bounds_from_pointer_arith, infer_loop_bounds_from_signedness, | |
3407 | scev_probably_wraps_p): call record_nonwrapping_chrec before | |
3408 | record_nonwrapping_iv, call nonwrapping_chrec_p to check the flag is | |
3409 | set and return false from scev_probably_wraps_p. | |
3410 | * tree-vect-loop.cc (vect_analyze_loop): call | |
3411 | free_numbers_of_iterations_estimates explicitly. | |
3412 | * tree-core.h: document the nothrow_flag usage in CHREC_NOWRAP | |
3413 | * tree.h: add CHREC_NOWRAP(NODE), base.nothrow_flag is used to | |
3414 | represent the nonwrapping info. | |
3415 | ||
3416 | 2023-12-08 Fei Gao <gaofei@eswincomputing.com> | |
3417 | ||
3418 | * ifcvt.cc (noce_try_cond_zero_arith): New function. | |
3419 | (noce_emit_czero, get_base_reg): Likewise. | |
3420 | (noce_cond_zero_binary_op_supported): Likewise. | |
3421 | (noce_bbs_ok_for_cond_zero_arith): Likewise. | |
3422 | (noce_process_if_block): Use noce_try_cond_zero_arith. | |
3423 | Co-authored-by: Xiao Zeng<zengxiao@eswincomputing.com> | |
3424 | ||
3425 | 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
3426 | ||
3427 | * config/riscv/riscv-protos.h (expand_vec_series): Adapt function. | |
3428 | * config/riscv/riscv-v.cc (rvv_builder::double_steps_npatterns_p): New function. | |
3429 | (expand_vec_series): Adapt function. | |
3430 | (expand_const_vector): Support new interleave vector with different step. | |
3431 | ||
3432 | 2023-12-07 Richard Sandiford <richard.sandiford@arm.com> | |
3433 | ||
3434 | PR rtl-optimization/106694 | |
3435 | PR rtl-optimization/109078 | |
3436 | PR rtl-optimization/109391 | |
3437 | * config.gcc: Add aarch64-early-ra.o for AArch64 targets. | |
3438 | * config/aarch64/t-aarch64 (aarch64-early-ra.o): New rule. | |
3439 | * config/aarch64/aarch64-opts.h (aarch64_early_ra_scope): New enum. | |
3440 | * config/aarch64/aarch64.opt (mearly_ra): New option. | |
3441 | * doc/invoke.texi: Document it. | |
3442 | * common/config/aarch64/aarch64-common.cc | |
3443 | (aarch_option_optimization_table): Use -mearly-ra=strided by | |
3444 | default for -O2 and above. | |
3445 | * config/aarch64/aarch64-passes.def (pass_aarch64_early_ra): New pass. | |
3446 | * config/aarch64/aarch64-protos.h (aarch64_strided_registers_p) | |
3447 | (make_pass_aarch64_early_ra): Declare. | |
3448 | * config/aarch64/aarch64-sme.md (@aarch64_sme_lut<LUTI_BITS><mode>): | |
3449 | Add a stride_type attribute. | |
3450 | (@aarch64_sme_lut<LUTI_BITS><mode>_strided2): New pattern. | |
3451 | (@aarch64_sme_lut<LUTI_BITS><mode>_strided4): Likewise. | |
3452 | * config/aarch64/aarch64-sve-builtins-base.cc (svld1_impl::expand) | |
3453 | (svldnt1_impl::expand, svst1_impl::expand, svstn1_impl::expand): Handle | |
3454 | new way of defining multi-register loads and stores. | |
3455 | * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>) | |
3456 | (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>) | |
3457 | (@aarch64_stnt1<SVE_FULLx24:mode>): Delete. | |
3458 | * config/aarch64/aarch64-sve2.md (@aarch64_<LD1_COUNT:optab><mode>) | |
3459 | (@aarch64_<LD1_COUNT:optab><mode>_strided2): New patterns. | |
3460 | (@aarch64_<LD1_COUNT:optab><mode>_strided4): Likewise. | |
3461 | (@aarch64_<ST1_COUNT:optab><mode>): Likewise. | |
3462 | (@aarch64_<ST1_COUNT:optab><mode>_strided2): Likewise. | |
3463 | (@aarch64_<ST1_COUNT:optab><mode>_strided4): Likewise. | |
3464 | * config/aarch64/aarch64.cc (aarch64_strided_registers_p): New | |
3465 | function. | |
3466 | * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): Delete. | |
3467 | (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise. | |
3468 | (UNSPEC_STNT1_SVE_COUNT): Likewise. | |
3469 | (stride_type): New attribute. | |
3470 | * config/aarch64/constraints.md (Uwd, Uwt): New constraints. | |
3471 | * config/aarch64/iterators.md (UNSPEC_LD1_COUNT, UNSPEC_LDNT1_COUNT) | |
3472 | (UNSPEC_ST1_COUNT, UNSPEC_STNT1_COUNT): New unspecs. | |
3473 | (optab): Handle them. | |
3474 | (LD1_COUNT, ST1_COUNT): New iterators. | |
3475 | * config/aarch64/aarch64-early-ra.cc: New file. | |
3476 | ||
3477 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3478 | ||
3479 | * config/arm/arm_neon.h | |
3480 | (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New | |
3481 | (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New. | |
3482 | (vld1_f16_x4, vld1_f32_x4): New. | |
3483 | (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New. | |
3484 | (vld1_bf16_x4): New. | |
3485 | (vld1q_types_x4): Updated to use vld1q_x4 | |
3486 | from arm_neon_builtins.def | |
3487 | * config/arm/arm_neon_builtins.def | |
3488 | (vld1_x4): Updated entries. | |
3489 | (vld1q_x4): New entries, but comes from the old vld1_x2 | |
3490 | * config/arm/neon.md (neon_vld1q_x4<mode>): | |
3491 | Updated from neon_vld1_x4<mode>. | |
3492 | ||
3493 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3494 | ||
3495 | * config/arm/arm_neon.h | |
3496 | (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New | |
3497 | (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New. | |
3498 | (vld1_f16_x3, vld1_f32_x3): New. | |
3499 | (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New. | |
3500 | (vld1_bf16_x3): New. | |
3501 | (vld1q_types_x3): Updated to use vld1q_x3 from | |
3502 | arm_neon_builtins.def | |
3503 | * config/arm/arm_neon_builtins.def | |
3504 | (vld1_x3): Updated entries. | |
3505 | (vld1q_x3): New entries, but comes from the old vld1_x2 | |
3506 | * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from | |
3507 | neon_vld1_x3<mode>. | |
3508 | ||
3509 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3510 | ||
3511 | * config/arm/arm_neon.h | |
3512 | (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New | |
3513 | (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New. | |
3514 | (vld1_f16_x2, vld1_f32_x2): New. | |
3515 | (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New. | |
3516 | (vld1_bf16_x2): New. | |
3517 | (vld1q_types_x2): Updated to use vld1q_x2 from | |
3518 | arm_neon_builtins.def | |
3519 | * config/arm/arm_neon_builtins.def | |
3520 | (vld1_x2): Updated entries. | |
3521 | (vld1q_x2): New entries, but comes from the old vld1_x2 | |
3522 | * config/arm/neon.md | |
3523 | (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated | |
3524 | from neon_vld1_x2<mode>. | |
3525 | ||
3526 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3527 | ||
3528 | * config/arm/arm_neon.h | |
3529 | (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New. | |
3530 | (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New. | |
3531 | (vst1q_f16_x4, vst1q_f32_x4): New. | |
3532 | (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New. | |
3533 | (vst1q_bf16_x4): New. | |
3534 | * config/arm/arm_neon_builtins.def (vst1q_x4): New entries. | |
3535 | * config/arm/neon.md (neon_vst1q_x4<mode>): New. | |
3536 | ||
3537 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3538 | ||
3539 | * config/arm/arm_neon.h | |
3540 | (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New. | |
3541 | (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New. | |
3542 | (vst1q_f16_x3, vst1q_f32_x3): New. | |
3543 | (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New. | |
3544 | (vst1q_bf16_x3): New. | |
3545 | * config/arm/arm_neon_builtins.def (vst1q_x3): New entries. | |
3546 | * config/arm/neon.md (neon_vst1q_x3<mode>): New. | |
3547 | ||
3548 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3549 | ||
3550 | * config/arm/arm_neon.h | |
3551 | (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New. | |
3552 | (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New. | |
3553 | (vst1q_f16_x2, vst1q_f32_x2): New. | |
3554 | (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New. | |
3555 | (vst1q_bf16_x2): New. | |
3556 | * config/arm/arm_neon_builtins.def (vst1q_x2): New entries. | |
3557 | * config/arm/neon.md | |
3558 | (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from | |
3559 | neon_vst1_x2<mode>. | |
3560 | * config/arm/iterators.md (VMEMX2): New mode iterator. | |
3561 | (VMEMX2_q): New mode attribute. | |
3562 | ||
3563 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3564 | ||
3565 | * config/arm/arm_neon.h | |
3566 | (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New. | |
3567 | (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New. | |
3568 | (vst1_f16_x4, vst1_f32_x4): New. | |
3569 | (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New. | |
3570 | (vst1_bf16_x4): New. | |
3571 | * config/arm/arm_neon_builtins.def (vst1_x4): New entries. | |
3572 | * config/arm/neon.md (vst1_x4<mode>): New. | |
3573 | ||
3574 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3575 | ||
3576 | * config/arm/arm_neon.h | |
3577 | (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New. | |
3578 | (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New. | |
3579 | (vst1_f16_x3, vst1_f32_x3): New. | |
3580 | (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New. | |
3581 | (vst1_bf16_x3): New. | |
3582 | * config/arm/arm_neon_builtins.def (vst1_x3): New entries. | |
3583 | * config/arm/neon.md (vst1_x3<mode>): New. | |
3584 | ||
3585 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3586 | ||
3587 | * config/arm/arm_neon.h | |
3588 | (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New. | |
3589 | (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New. | |
3590 | (vst1_f16_x2, vst1_f32_x2): New. | |
3591 | (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New. | |
3592 | (vst1_bf16_x2): New. | |
3593 | * config/arm/arm_neon_builtins.def (vst1_x2): New entries. | |
3594 | * config/arm/neon.md (vst1_x2<mode>): New. | |
3595 | ||
3596 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3597 | ||
3598 | * config/arm/arm_neon.h | |
3599 | (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New. | |
3600 | (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New. | |
3601 | (vld1q_f16_x4, vld1q_f32_x4): New. | |
3602 | (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New. | |
3603 | (vld1q_bf16_x4): New. | |
3604 | * config/arm/arm_neon_builtins.def (vld1_x4): New entries. | |
3605 | * config/arm/neon.md (vld1_x4<mode>): New. | |
3606 | ||
3607 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3608 | ||
3609 | * config/arm/arm_neon.h | |
3610 | (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New. | |
3611 | (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New. | |
3612 | (vld1q_f16_x3, vld1q_f32_x3): New. | |
3613 | (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New. | |
3614 | (vld1q_bf16_x3): New. | |
3615 | * config/arm/arm_neon_builtins.def (vld1_x3): New entries. | |
3616 | * config/arm/neon.md (vld1_x3<mode>): New. | |
3617 | ||
3618 | 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com> | |
3619 | ||
3620 | * config/arm/arm_neon.h | |
3621 | (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New. | |
3622 | (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New. | |
3623 | (vld1q_f16_x2, vld1q_f32_x2): New. | |
3624 | (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New. | |
3625 | (vld1q_bf16_x2): New. | |
3626 | * config/arm/arm_neon_builtins.def (vld1_x2): New entries. | |
3627 | * config/arm/neon.md (vld1_x2<mode>): New. | |
3628 | ||
3629 | 2023-12-07 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
3630 | ||
3631 | * config/s390/vecintrin.h (vec_step): Expand vec_step to | |
3632 | __builtin_s390_vec_step. | |
3633 | ||
3634 | 2023-12-07 Alexandre Oliva <oliva@adacore.com> | |
3635 | ||
3636 | * target.def (have_strub_support_for): New hook. | |
3637 | * doc/tm.texi.in: Document it. | |
3638 | * doc/tm.texi: Rebuild. | |
3639 | * ipa-strub.cc: Include target.h. | |
3640 | (strub_target_support_p): New. | |
3641 | (can_strub_p): Call it. Test for no flag_split_stack. | |
3642 | (pass_ipa_strub::adjust_at_calls_call): Check for target | |
3643 | support. | |
3644 | * config/nvptx/nvptx.cc (TARGET_HAVE_STRUB_SUPPORT_FOR): | |
3645 | Disable. | |
3646 | * doc/sourcebuild.texi (strub): Document new effective | |
3647 | target. | |
3648 | ||
3649 | 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
3650 | ||
3651 | * config/riscv/riscv-avlprop.cc (simplify_replace_avl): New function. | |
3652 | (simplify_replace_vlmax_avl): Fix bug. | |
3653 | * config/riscv/t-riscv: Add a new include file. | |
3654 | ||
3655 | 2023-12-07 Christoph Müllner <christoph.muellner@vrull.eu> | |
3656 | ||
3657 | * config/riscv/thead.cc (th_memidx_classify_address_index): | |
3658 | Require TARGET_XTHEADMEMIDX for FP modes. | |
3659 | * config/riscv/thead.md: Require TARGET_XTHEADMEMIDX for all | |
3660 | XTheadFMemIdx pattern. | |
3661 | ||
3662 | 2023-12-07 Jakub Jelinek <jakub@redhat.com> | |
3663 | ||
3664 | PR middle-end/112881 | |
3665 | * expr.cc (count_type_elements): Handle BITINT_TYPE like INTEGER_TYPE. | |
3666 | ||
3667 | 2023-12-07 Jakub Jelinek <jakub@redhat.com> | |
3668 | ||
3669 | PR tree-optimization/112880 | |
3670 | * tree-ssa-dce.cc (maybe_optimize_arith_overflow): Use | |
3671 | unsigned_type_for instead of conditionally calling | |
3672 | build_nonstandard_integer_type. | |
3673 | ||
3674 | 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com> | |
3675 | ||
3676 | * config/aarch64/arm_neon.h (vldap1_lane_u64): New. | |
3677 | (vldap1q_lane_u64): Likewise. | |
3678 | (vldap1_lane_s64): Likewise. | |
3679 | (vldap1q_lane_s64): Likewise. | |
3680 | (vldap1_lane_f64): Likewise. | |
3681 | (vldap1q_lane_f64): Likewise. | |
3682 | (vldap1_lane_p64): Likewise. | |
3683 | (vldap1q_lane_p64): Likewise. | |
3684 | (vstl1_lane_u64): Likewise. | |
3685 | (vstl1q_lane_u64): Likewise. | |
3686 | (vstl1_lane_s64): Likewise. | |
3687 | (vstl1q_lane_s64): Likewise. | |
3688 | (vstl1_lane_f64): Likewise. | |
3689 | (vstl1q_lane_f64): Likewise. | |
3690 | (vstl1_lane_p64): Likewise. | |
3691 | (vstl1q_lane_p64): Likewise. | |
3692 | ||
3693 | 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com> | |
3694 | ||
3695 | * config/aarch64/aarch64-simd-builtins.def | |
3696 | (vec_ldap1_lane): New. | |
3697 | (vec_stl1_lane): Likewise. | |
3698 | * config/aarch64/aarch64-simd.md | |
3699 | (aarch64_vec_stl1_lanes<mode>_lane<Vel>): New. | |
3700 | (aarch64_vec_stl1_lane<mode>): Likewise. | |
3701 | (aarch64_vec_ldap1_lanes<mode>_lane<Vel>): Likewise. | |
3702 | (aarch64_vec_ldap1_lane<mode>): Likewise. | |
3703 | * config/aarch64/aarch64.md (UNSPEC_LDAP1_LANE): New. | |
3704 | (UNSPEC_STL1_LANE): Likewise. | |
3705 | ||
3706 | 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com> | |
3707 | ||
3708 | * config/aarch64/iterators.md (V12DIF): New. | |
3709 | (V12DUP): Likewise. | |
3710 | (VEL): Add support for all V12DIF-associated modes. | |
3711 | (Vetype): Add support for V1DI and V1DF. | |
3712 | (Vel): Likewise. | |
3713 | ||
3714 | 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com> | |
3715 | ||
3716 | * config/aarch64/aarch64-option-extensions.def (rcpc3): New. | |
3717 | * config/aarch64/aarch64.h (AARCH64_ISA_RCPC3): Likewise. | |
3718 | (TARGET_RCPC3): Likewise. | |
3719 | * doc/invoke.texi (rcpc3): Document feature in AArch64 Options. | |
3720 | ||
3721 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3722 | ||
3723 | * config/i386/i386-expand.cc (ix86_split_ashl_ndd): New | |
3724 | function to split NDD form lshift. | |
3725 | (ix86_split_rshift_ndd): Likewise for l/ashiftrt. | |
3726 | * config/i386/i386-protos.h (ix86_split_ashl_ndd): New | |
3727 | prototype. | |
3728 | (ix86_split_rshift_ndd): Likewise. | |
3729 | * config/i386/i386.md (ashl<mode>3_doubleword): Add NDD | |
3730 | alternative, call ndd split function when operands[0] | |
3731 | not equal to operands[1]. | |
3732 | (define_split for doubleword lshift): Likewise. | |
3733 | (define_peephole for doubleword lshift): Likewise. | |
3734 | (<insn><mode>3_doubleword): Likewise for l/ashiftrt. | |
3735 | (define_split for doubleword l/ashiftrt): Likewise. | |
3736 | (define_peephole for doubleword l/ashiftrt): Likewise. | |
3737 | ||
3738 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3739 | ||
3740 | * config/i386/i386.md (*mov<mode>cc_noc): Extend with new constraints | |
3741 | to support NDD. | |
3742 | (*movsicc_noc_zext): Likewise. | |
3743 | (*movsicc_noc_zext_1): Likewise. | |
3744 | (*movqicc_noc): Likewise. | |
3745 | ||
3746 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3747 | ||
3748 | * config/i386/i386.md (x86_64_shld_ndd): New define_insn. | |
3749 | (x86_64_shld_ndd_1): Likewise. | |
3750 | (*x86_64_shld_ndd_2): Likewise. | |
3751 | (x86_shld_ndd): Likewise. | |
3752 | (x86_shld_ndd_1): Likewise. | |
3753 | (*x86_shld_ndd_2): Likewise. | |
3754 | (x86_64_shrd_ndd): Likewise. | |
3755 | (x86_64_shrd_ndd_1): Likewise. | |
3756 | (*x86_64_shrd_ndd_2): Likewise. | |
3757 | (x86_shrd_ndd): Likewise. | |
3758 | (x86_shrd_ndd_1): Likewise. | |
3759 | (*x86_shrd_ndd_2): Likewise. | |
3760 | (*x86_64_shld_shrd_1_nozext): Adjust codegen under TARGET_APX_NDD. | |
3761 | (*x86_shld_shrd_1_nozext): Likewise. | |
3762 | (*x86_64_shrd_shld_1_nozext): Likewise. | |
3763 | (*x86_shrd_shld_1_nozext): Likewise. | |
3764 | ||
3765 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3766 | ||
3767 | * config/i386/i386.md (*<insn><mode>3_1): Extend with a new | |
3768 | alternative to support NDD for SI/DI rotate, and adjust output | |
3769 | template. | |
3770 | (*<insn>si3_1_zext): Likewise. | |
3771 | (*<insn><mode>3_1): Likewise for QI/HI modes. | |
3772 | (rcrsi2): Likewise, and use nonimmediate_operand for operands[1] | |
3773 | to accept memory input for NDD alternative. | |
3774 | (rcrdi2): Likewise. | |
3775 | ||
3776 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3777 | ||
3778 | * config/i386/i386.md (ashr<mode>3_cvt): Extend with new | |
3779 | alternatives to support NDD, and adjust output templates. | |
3780 | (*ashr<mode>3_1): Likewise for SI/DI mode. | |
3781 | (*lshr<mode>3_1): Likewise. | |
3782 | (*<insn>si3_1_zext): Likewise. | |
3783 | (*ashr<mode>3_1): Likewise for QI/HI mode. | |
3784 | (*lshrqi3_1): Likewise. | |
3785 | (*lshrhi3_1): Likewise. | |
3786 | (<insn><mode>3_cmp): Likewise. | |
3787 | (*<insn><mode>3_cconly): Likewise. | |
3788 | (*ashrsi3_cvt_zext): Likewise, and use nonimmediate_operand for | |
3789 | operands[1] to accept memory input for NDD alternative. | |
3790 | (*highpartdisi2): Likewise. | |
3791 | (*<insn>si3_cmp_zext): Likewise. | |
3792 | (<insn><mode>3_carry): Likewise. | |
3793 | ||
3794 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3795 | ||
3796 | * config/i386/i386.md (*ashl<mode>3_1): Extend with new | |
3797 | alternatives to support NDD, limit the new alternative to | |
3798 | generate sal only, and adjust output template for NDD. | |
3799 | (*ashlsi3_1_zext): Likewise. | |
3800 | (*ashlhi3_1): Likewise. | |
3801 | (*ashlqi3_1): Likewise. | |
3802 | (*ashl<mode>3_cmp): Likewise. | |
3803 | (*ashlsi3_cmp_zext): Likewise, and use nonimmediate_operand for | |
3804 | operands[1] to accept memory input for NDD alternative. | |
3805 | (*ashl<mode>3_cconly): Likewise. | |
3806 | (*ashl<dwi>3_doubleword_highpart): Adjust codegen for NDD. | |
3807 | ||
3808 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3809 | ||
3810 | * config/i386/i386.md (<code><mode>3): Add new alternative for NDD | |
3811 | and adjust output templates. | |
3812 | (*<code><mode>_1): Likewise. | |
3813 | (*<code>qi_1): Likewise. | |
3814 | (*notxor<mode>_1): Likewise. | |
3815 | (*<code>si_1_zext): Likewise. | |
3816 | (*notxorqi_1): Likewise. | |
3817 | (*<code><mode>_2): Likewise. | |
3818 | (*<code>si_2_zext): Likewise. | |
3819 | (*<code>si_2_zext_imm): Likewise. | |
3820 | (*<code>si_1_zext_imm): Likewise, and use nonimmediate_operand for | |
3821 | operands[1] to accept memory input for NDD alternative. | |
3822 | (*one_cmplsi2_2_zext): Likewise. | |
3823 | (define_split for *one_cmplsi2_2_zext): Use nonimmediate_operand for | |
3824 | operands[3]. | |
3825 | (*<code><dwi>3_doubleword): Add NDD constraints, adopt '&' to NDD dest | |
3826 | and emit move for optimized case if operands[0] != operands[1] or | |
3827 | operands[4] != operands[5]. | |
3828 | (define_split for QI highpart OR/XOR): Prohibit splitter to split NDD | |
3829 | form OR/XOR insn to <any_logic:code>qi_ext<mode>_3. | |
3830 | (define_split for QI strict_lowpart optimization): Prohibit splitter to | |
3831 | split NDD form AND insn to *<code><mode>3_1_slp. | |
3832 | ||
3833 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3834 | ||
3835 | * config/i386/i386.md (and<mode>3): Add NDD alternatives and adjust | |
3836 | output template. | |
3837 | (*anddi_1): Likewise. | |
3838 | (*and<mode>_1): Likewise. | |
3839 | (*andqi_1): Likewise. | |
3840 | (*andsi_1_zext): Likewise. | |
3841 | (*anddi_2): Likewise. | |
3842 | (*andsi_2_zext): Likewise. | |
3843 | (*andqi_2_maybe_si): Likewise. | |
3844 | (*and<mode>_2): Likewise. | |
3845 | (*and<dwi>3_doubleword): Add NDD alternative, adopt '&' to NDD dest and | |
3846 | emit move for optimized case if operands[0] not equal to operands[1]. | |
3847 | (define_split for QI highpart AND): Prohibit splitter to split NDD | |
3848 | form AND insn to <any_logic:code>qi_ext<mode>_3. | |
3849 | (define_split for QI strict_lowpart optimization): Prohibit splitter to | |
3850 | split NDD form AND insn to *<code><mode>3_1_slp. | |
3851 | (define_split for zero_extend and optimization): Prohibit splitter to | |
3852 | split NDD form AND insn to zero_extend insn. | |
3853 | ||
3854 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3855 | ||
3856 | * config/i386/i386.md (one_cmpl<mode>2): Add new constraints for NDD | |
3857 | and adjust output template. | |
3858 | (*one_cmpl<mode>2_1): Likewise. | |
3859 | (*one_cmplqi2_1): Likewise. | |
3860 | (*one_cmpl<dwi>2_doubleword): Likewise, and adopt '&' to NDD dest. | |
3861 | (*one_cmpl<mode>2_2): Likewise. | |
3862 | (*one_cmplsi2_1_zext): Likewise, and use nonimmediate_operand for | |
3863 | operands[1] to accept memory input for NDD alternative. | |
3864 | ||
3865 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3866 | ||
3867 | * config/i386/i386-expand.cc (ix86_expand_unary_operator): Add use_ndd | |
3868 | parameter and adjust for NDD. | |
3869 | * config/i386/i386-protos.h: Add use_ndd parameter for | |
3870 | ix86_unary_operator_ok and ix86_expand_unary_operator. | |
3871 | * config/i386/i386.cc (ix86_unary_operator_ok): Add use_ndd parameter | |
3872 | and adjust for NDD. | |
3873 | * config/i386/i386.md (neg<mode>2): Add new constraint for NDD and | |
3874 | adjust output template. | |
3875 | (*neg<mode>_1): Likewise. | |
3876 | (*neg<dwi>2_doubleword): Likewise and adopt '&' to NDD dest. | |
3877 | (*neg<mode>_2): Likewise. | |
3878 | (*neg<mode>_ccc_1): Likewise. | |
3879 | (*neg<mode>_ccc_2): Likewise. | |
3880 | (*negsi_1_zext): Likewise, and use nonimmediate_operand for operands[1] | |
3881 | to accept memory input for NDD alternatives. | |
3882 | (*negsi_2_zext): Likewise. | |
3883 | ||
3884 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3885 | ||
3886 | * config/i386/i386.md (*sub<dwi>3_doubleword): Add new alternative for | |
3887 | NDD, adopt '&' modifier to NDD dest and emit move when operands[0] not | |
3888 | equal to operands[1]. | |
3889 | (*sub<dwi>3_doubleword_zext): Likewise. | |
3890 | (*subv<dwi>4_doubleword): Likewise. | |
3891 | (*subv<dwi>4_doubleword_1): Likewise. | |
3892 | (*subv<mode>4_overflow_1): Add NDD alternatives and adjust output | |
3893 | templates. | |
3894 | (*subv<mode>4_overflow_2): Likewise. | |
3895 | (@sub<mode>3_carry): Likewise. | |
3896 | (*addsi3_carry_zext_0r): Likewise, and use nonimmediate_operand for | |
3897 | operands[1] to accept memory input for NDD alternative. | |
3898 | (*subsi3_carry_zext): Likewise. | |
3899 | (subborrow<mode>): Parse TARGET_APX_NDD to ix86_binary_operator_ok. | |
3900 | (subborrow<mode>_0): Likewise. | |
3901 | (*sub<mode>3_eq): Likewise. | |
3902 | (*sub<mode>3_ne): Likewise. | |
3903 | (*sub<mode>3_eq_1): Likewise. | |
3904 | ||
3905 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3906 | ||
3907 | * config/i386/i386-expand.cc (ix86_fixup_binary_operands_no_copy): | |
3908 | Add use_ndd parameter and parse it. | |
3909 | * config/i386/i386-protos.h (ix86_fixup_binary_operands_no_copy): | |
3910 | Change define. | |
3911 | * config/i386/i386.md (sub<mode>3): Add new alternatives for NDD | |
3912 | and adjust output templates. | |
3913 | (*sub<mode>_1): Likewise. | |
3914 | (*sub<mode>_2): Likewise. | |
3915 | (subv<mode>4): Likewise. | |
3916 | (*subv<mode>4): Likewise. | |
3917 | (subv<mode>4_1): Likewise. | |
3918 | (usubv<mode>4): Likewise. | |
3919 | (*sub<mode>_3): Likewise. | |
3920 | (*subsi_1_zext): Likewise, and use nonimmediate_operand for operands[1] | |
3921 | to accept memory input for NDD alternatives. | |
3922 | (*subsi_2_zext): Likewise. | |
3923 | (*subsi_3_zext): Likewise. | |
3924 | ||
3925 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3926 | ||
3927 | * config/i386/i386.md (*add<dwi>3_doubleword): Add ndd alternatives, | |
3928 | adopt '&' to ndd dest and move operands[1] to operands[0] when they are | |
3929 | not equal. | |
3930 | (*add<dwi>3_doubleword_cc_overflow_1): Likewise. | |
3931 | (*addv<dwi>4_doubleword): Likewise. | |
3932 | (*addv<dwi>4_doubleword_1): Likewise. | |
3933 | (*add<dwi>3_doubleword_zext): Likewise. | |
3934 | (addv<mode>4_overflow_1): Add ndd alternatives. | |
3935 | (*addv<mode>4_overflow_2): Likewise. | |
3936 | (@add<mode>3_carry): Likewise. | |
3937 | (*add<mode>3_carry_0): Likewise. | |
3938 | (*addsi3_carry_zext): Likewise. | |
3939 | (addcarry<mode>): Likewise. | |
3940 | (addcarry<mode>_0): Likewise. | |
3941 | (*addcarry<mode>_1): Likewise. | |
3942 | (*add<mode>3_eq): Likewise. | |
3943 | (*add<mode>3_ne): Likewise. | |
3944 | (*addsi3_carry_zext_0): Likewise, and use nonimmediate_operand for | |
3945 | operands[1] to accept memory input for NDD alternative. | |
3946 | ||
3947 | 2023-12-07 Hongyu Wang <hongyu.wang@intel.com> | |
3948 | ||
3949 | * config/i386/constraints.md (je): New constraint. | |
3950 | * config/i386/i386-protos.h (x86_poff_operand_p): New function to | |
3951 | check any *POFF constant in operand. | |
3952 | * config/i386/i386.cc (x86_poff_operand_p): New prototype. | |
3953 | * config/i386/i386.md (*add<mode>_1): Split out je alternative for add. | |
3954 | ||
3955 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3956 | ||
3957 | * config/i386/i386.md: (addsi_1_zext): Add new alternatives for | |
3958 | NDD and adjust output templates. | |
3959 | (*add<mode>_2): Likewise. | |
3960 | (*addsi_2_zext): Likewise. | |
3961 | (*add<mode>_3): Likewise. | |
3962 | (*addsi_3_zext): Likewise. | |
3963 | (*adddi_4): Likewise. | |
3964 | (*add<mode>_4): Likewise. | |
3965 | (*add<mode>_5): Likewise. | |
3966 | (*addv<mode>4): Likewise. | |
3967 | (*addv<mode>4_1): Likewise. | |
3968 | (*add<mode>3_cconly_overflow_1): Likewise. | |
3969 | (*add<mode>3_cc_overflow_1): Likewise. | |
3970 | (*addsi3_zext_cc_overflow_1): Likewise. | |
3971 | (*add<mode>3_cconly_overflow_2): Likewise. | |
3972 | (*add<mode>3_cc_overflow_2): Likewise. | |
3973 | (*addsi3_zext_cc_overflow_2): Likewise. | |
3974 | ||
3975 | 2023-12-07 Kong Lingling <lingling.kong@intel.com> | |
3976 | ||
3977 | * config/i386/i386-expand.cc (ix86_fixup_binary_operands): Add | |
3978 | new use_ndd flag to check whether ndd can be used for this binop | |
3979 | and adjust operand emit. | |
3980 | (ix86_binary_operator_ok): Likewise. | |
3981 | (ix86_expand_binary_operator): Likewise, and void postreload | |
3982 | expand generate lea pattern when use_ndd is explicit parsed. | |
3983 | * config/i386/i386-options.cc (ix86_option_override_internal): | |
3984 | Prohibit apx subfeatures when not in 64bit mode. | |
3985 | * config/i386/i386-protos.h (ix86_binary_operator_ok): | |
3986 | Add use_ndd flag. | |
3987 | (ix86_fixup_binary_operand): Likewise. | |
3988 | (ix86_expand_binary_operand): Likewise. | |
3989 | * config/i386/i386.md (*add<mode>_1): Extend with new alternatives | |
3990 | to support NDD, and adjust output template. | |
3991 | (*addhi_1): Likewise. | |
3992 | (*addqi_1): Likewise. | |
3993 | ||
3994 | 2023-12-07 David Malcolm <dmalcolm@redhat.com> | |
3995 | ||
3996 | PR analyzer/103546 | |
3997 | PR analyzer/112850 | |
3998 | * doc/invoke.texi: Add -Wanalyzer-symbol-too-complex. | |
3999 | ||
4000 | 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
4001 | ||
4002 | * config/riscv/riscv-vsetvl.cc (extract_single_source): new function. | |
4003 | (pre_vsetvl::compute_lcm_local_properties): Fix ICE. | |
4004 | ||
4005 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4006 | ||
4007 | * config/aarch64/aarch64-builtins.cc (AARCH64_RSR128): New | |
4008 | `enum aarch64_builtins' value. | |
4009 | (AARCH64_WSR128): Likewise. | |
4010 | (aarch64_init_rwsr_builtins): Init `__builtin_aarch64_rsr128' | |
4011 | and `__builtin_aarch64_wsr128' builtins. | |
4012 | (aarch64_expand_rwsr_builtin): Extend function to handle | |
4013 | `__builtin_aarch64_{rsr|wsr}128'. | |
4014 | * config/aarch64/aarch64-protos.h (aarch64_retrieve_sysreg): | |
4015 | Update function signature. | |
4016 | * config/aarch64/aarch64.cc (F_REG_128): New. | |
4017 | (aarch64_retrieve_sysreg): Add 128-bit register mode check. | |
4018 | * config/aarch64/aarch64.md (UNSPEC_SYSREG_RTI): New. | |
4019 | (UNSPEC_SYSREG_WTI): Likewise. | |
4020 | (aarch64_read_sysregti): Likewise. | |
4021 | (aarch64_write_sysregti): Likewise. | |
4022 | * config/aarch64/arm_acle.h (__arm_rsr128): New. | |
4023 | (__arm_wsr128): Likewise. | |
4024 | ||
4025 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4026 | ||
4027 | * config/aarch64/aarch64-sys-regs.def: Copy from Binutils. | |
4028 | ||
4029 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4030 | ||
4031 | * config/aarch64/aarch64-option-extensions.def (gcs): New. | |
4032 | * config/aarch64/aarch64.h (AARCH64_ISA_GCS): New. | |
4033 | (TARGET_THE): Likewise. | |
4034 | * doc/invoke.texi (AArch64 Options): Describe GCS. | |
4035 | ||
4036 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4037 | ||
4038 | * config/aarch64/aarch64-c.cc (__ARM_FEATURE_SYSREG128): New. | |
4039 | * config/aarch64/aarch64-arches.def (armv8.9-a): New. | |
4040 | (armv9.4-a): Likewise. | |
4041 | * config/aarch64/aarch64-option-extensions.def (d128): Likewise. | |
4042 | (the): Likewise. | |
4043 | * config/aarch64/aarch64.h (AARCH64_ISA_V9_4A): Likewise. | |
4044 | (AARCH64_ISA_V8_9A): Likewise. | |
4045 | (TARGET_ARMV9_4): Likewise. | |
4046 | (AARCH64_ISA_D128): Likewise. | |
4047 | (AARCH64_ISA_THE): Likewise. | |
4048 | (TARGET_D128): Likewise. | |
4049 | * doc/invoke.texi (AArch64 Options): Document new -march flags | |
4050 | and extensions. | |
4051 | ||
4052 | 2023-12-06 Eric Gallager <egallager@gcc.gnu.org> | |
4053 | ||
4054 | * Makefile.in: Remove qmtest-related targets. | |
4055 | ||
4056 | 2023-12-06 David Malcolm <dmalcolm@redhat.com> | |
4057 | ||
4058 | * common.opt (fdiagnostics-json-formatting): New. | |
4059 | * diagnostic-format-json.cc: Add "formatted" boolean | |
4060 | to json_output_format and subclasses, and to the | |
4061 | diagnostic_output_format_init_json_* functions. Use it when | |
4062 | printing JSON. | |
4063 | * diagnostic-format-sarif.cc: Likewise for sarif_builder, | |
4064 | sarif_output_format, and the various | |
4065 | diagnostic_output_format_init_sarif_* functions. | |
4066 | * diagnostic.cc (diagnostic_output_format_init): Add | |
4067 | "json_formatting" boolean and pass on to the various cases. | |
4068 | * diagnostic.h (diagnostic_output_format_init): Add | |
4069 | "json_formatted" param. | |
4070 | (diagnostic_output_format_init_json_stderr): Add "formatted" param | |
4071 | (diagnostic_output_format_init_json_file): Likewise. | |
4072 | (diagnostic_output_format_init_sarif_stderr): Likewise. | |
4073 | (diagnostic_output_format_init_sarif_file): Likewise. | |
4074 | (diagnostic_output_format_init_sarif_stream): Likewise. | |
4075 | * doc/invoke.texi (-fdiagnostics-format=json): Remove discussion | |
4076 | about JSON output needing formatting. | |
4077 | (-fno-diagnostics-json-formatting): Add. | |
4078 | * gcc.cc (driver_handle_option): Use | |
4079 | opts->x_flag_diagnostics_json_formatting. | |
4080 | * gcov.cc (generate_results): Pass "false" for new formatting | |
4081 | option when printing json. | |
4082 | * json.cc (value::dump): Add new "formatted" param. | |
4083 | (object::print): Likewise, using it to add whitespace to format | |
4084 | the JSON output. | |
4085 | (array::print): Likewise. | |
4086 | (float_number::print): Add new "formatted" param. | |
4087 | (integer_number::print): Likewise. | |
4088 | (string::print): Likewise. | |
4089 | (literal::print): Likewise. | |
4090 | (selftest::assert_print_eq): Add "formatted" param. | |
4091 | (ASSERT_PRINT_EQ): Add "FORMATTED" param. | |
4092 | (selftest::test_writing_objects): Test both formatted and | |
4093 | unformatted printing. | |
4094 | (selftest::test_writing_arrays): Likewise. | |
4095 | (selftest::test_writing_float_numbers): Update for new param of | |
4096 | ASSERT_PRINT_EQ. | |
4097 | (selftest::test_writing_integer_numbers): Likewise. | |
4098 | (selftest::test_writing_strings): Likewise. | |
4099 | (selftest::test_writing_literals): Likewise. | |
4100 | (selftest::test_formatting): New. | |
4101 | (selftest::json_cc_tests): Call it. | |
4102 | * json.h (value::print): Add "formatted" param. | |
4103 | (value::dump): Likewise. | |
4104 | (object::print): Likewise. | |
4105 | (array::print): Likewise. | |
4106 | (float_number::print): Likewise. | |
4107 | (integer_number::print): Likewise. | |
4108 | (string::print): Likewise. | |
4109 | (literal::print): Likewise. | |
4110 | * optinfo-emit-json.cc (optrecord_json_writer::write): Pass | |
4111 | "false" for new formatting option when printing json. | |
4112 | (selftest::test_building_json_from_dump_calls): Likewise. | |
4113 | * opts.cc (common_handle_option): Use | |
4114 | opts->x_flag_diagnostics_json_formatting. | |
4115 | ||
4116 | 2023-12-06 David Malcolm <dmalcolm@redhat.com> | |
4117 | ||
4118 | * diagnostic-format-json.cc (on_begin_diagnostic): Convert param | |
4119 | to const reference. | |
4120 | (on_end_diagnostic): Likewise. | |
4121 | (json_output_format::on_end_diagnostic): Likewise. | |
4122 | * diagnostic-format-sarif.cc | |
4123 | (sarif_invocation::add_notification_for_ice): Likewise. | |
4124 | (sarif_result::on_nested_diagnostic): Likewise. | |
4125 | (sarif_ice_notification::sarif_ice_notification): Likewise. | |
4126 | (sarif_builder::end_diagnostic): Likewise. | |
4127 | (sarif_builder::make_result_object): Likewise. | |
4128 | (make_reporting_descriptor_object_for_warning): Likewise. | |
4129 | (sarif_builder::make_locations_arr): Likewise. | |
4130 | (sarif_output_format::on_begin_diagnostic): Likewise. | |
4131 | (sarif_output_format::on_end_diagnostic): Likewise. | |
4132 | * diagnostic.cc (default_diagnostic_starter): Make diagnostic_info | |
4133 | param const. | |
4134 | (default_diagnostic_finalizer): Likewise. | |
4135 | (diagnostic_context::report_diagnostic): Pass diagnostic by | |
4136 | reference to on_{begin,end}_diagnostic. | |
4137 | (diagnostic_text_output_format::on_begin_diagnostic): Convert | |
4138 | param to const reference. | |
4139 | (diagnostic_text_output_format::on_end_diagnostic): Likewise. | |
4140 | * diagnostic.h (diagnostic_starter_fn): Make diagnostic_info param | |
4141 | const. | |
4142 | (diagnostic_finalizer_fn): Likeewise. | |
4143 | (diagnostic_output_format::on_begin_diagnostic): Convert param to | |
4144 | const reference. | |
4145 | (diagnostic_output_format::on_end_diagnostic): Likewise. | |
4146 | (diagnostic_text_output_format::on_begin_diagnostic): Likewise. | |
4147 | (diagnostic_text_output_format::on_end_diagnostic): Likewise. | |
4148 | (default_diagnostic_starter): Make diagnostic_info param const. | |
4149 | (default_diagnostic_finalizer): Likewise. | |
4150 | * langhooks-def.h (lhd_print_error_function): Make diagnostic_info | |
4151 | param const. | |
4152 | * langhooks.cc (lhd_print_error_function): Likewise. | |
4153 | * langhooks.h (lang_hooks::print_error_function): Likewise. | |
4154 | * tree-diagnostic.cc (diagnostic_report_current_function): | |
4155 | Likewise. | |
4156 | (default_tree_diagnostic_starter): Likewise. | |
4157 | (virt_loc_aware_diagnostic_finalizer): Likewise. | |
4158 | * tree-diagnostic.h (diagnostic_report_current_function): | |
4159 | Likewise. | |
4160 | (virt_loc_aware_diagnostic_finalizer): Likewise. | |
4161 | ||
4162 | 2023-12-06 Andrew Stubbs <ams@codesourcery.com> | |
4163 | ||
4164 | * config/gcn/gcn-builtins.def (DISPATCH_PTR): New built-in. | |
4165 | * config/gcn/gcn.cc (gcn_init_machine_status): Disable global | |
4166 | addressing. | |
4167 | (gcn_expand_builtin_1): Implement GCN_BUILTIN_DISPATCH_PTR. | |
4168 | ||
4169 | 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
4170 | ||
4171 | PR target/112855 | |
4172 | * config/riscv/riscv-vsetvl.cc | |
4173 | (pre_vsetvl::compute_lcm_local_properties): Fix transparant LCM data. | |
4174 | (pre_vsetvl::earliest_fuse_vsetvl_info): Disable earliest fusion for unrelated edge. | |
4175 | ||
4176 | 2023-12-06 Marek Polacek <polacek@redhat.com> | |
4177 | ||
4178 | PR target/112762 | |
4179 | * config/linux.h: Redefine TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL for | |
4180 | glibc only. | |
4181 | ||
4182 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4183 | ||
4184 | * config/aarch64/aarch64.cc | |
4185 | (aarch64_test_sysreg_encoding_clashes): New. | |
4186 | (aarch64_run_selftests): add call to | |
4187 | aarch64_test_sysreg_encoding_clashes selftest. | |
4188 | ||
4189 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4190 | ||
4191 | * config/aarch64/aarch64-builtins.cc (aarch64_general_check_builtin_call): | |
4192 | New. | |
4193 | * config/aarch64/aarch64-c.cc (aarch64_check_builtin_call): | |
4194 | Add `aarch64_general_check_builtin_call' call. | |
4195 | * config/aarch64/aarch64-protos.h (aarch64_general_check_builtin_call): | |
4196 | New. | |
4197 | ||
4198 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4199 | ||
4200 | * config/aarch64/aarch64-builtins.cc (enum aarch64_builtins): | |
4201 | Add enums for new builtins. | |
4202 | (aarch64_init_rwsr_builtins): New. | |
4203 | (aarch64_general_init_builtins): Call aarch64_init_rwsr_builtins. | |
4204 | (aarch64_expand_rwsr_builtin): New. | |
4205 | (aarch64_general_expand_builtin): Call aarch64_general_expand_builtin. | |
4206 | * config/aarch64/aarch64.md (read_sysregdi): New insn_and_split. | |
4207 | (write_sysregdi): Likewise. | |
4208 | * config/aarch64/arm_acle.h (__arm_rsr): New. | |
4209 | (__arm_rsrp): Likewise. | |
4210 | (__arm_rsr64): Likewise. | |
4211 | (__arm_rsrf): Likewise. | |
4212 | (__arm_rsrf64): Likewise. | |
4213 | (__arm_wsr): Likewise. | |
4214 | (__arm_wsrp): Likewise. | |
4215 | (__arm_wsr64): Likewise. | |
4216 | (__arm_wsrf): Likewise. | |
4217 | (__arm_wsrf64): Likewise. | |
4218 | ||
4219 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4220 | ||
4221 | * config/aarch64/aarch64-protos.h (aarch64_valid_sysreg_name_p): New. | |
4222 | (aarch64_retrieve_sysreg): Likewise. | |
4223 | * config/aarch64/aarch64.cc (is_implem_def_reg): Likewise. | |
4224 | (aarch64_valid_sysreg_name_p): Likewise. | |
4225 | (aarch64_retrieve_sysreg): Likewise. | |
4226 | (aarch64_register_sysreg): Likewise. | |
4227 | (aarch64_init_sysregs): Likewise. | |
4228 | (aarch64_lookup_sysreg_map): Likewise. | |
4229 | * config/aarch64/predicates.md (aarch64_sysreg_string): New. | |
4230 | ||
4231 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4232 | ||
4233 | * config/aarch64/aarch64.cc (sysreg_t): New. | |
4234 | (aarch64_sysregs): Likewise. | |
4235 | (AARCH64_FEATURE): Likewise. | |
4236 | (AARCH64_FEATURES): Likewise. | |
4237 | (AARCH64_NO_FEATURES): Likewise. | |
4238 | * config/aarch64/aarch64.h (AARCH64_ISA_V8A): Add missing | |
4239 | ISA flag. | |
4240 | (AARCH64_ISA_V8_1A): Likewise. | |
4241 | (AARCH64_ISA_V8_7A): Likewise. | |
4242 | (AARCH64_ISA_V8_8A): Likewise. | |
4243 | (AARCH64_NO_FEATURES): Likewise. | |
4244 | (AARCH64_FL_RAS): New ISA flag alias. | |
4245 | (AARCH64_FL_LOR): Likewise. | |
4246 | (AARCH64_FL_PAN): Likewise. | |
4247 | (AARCH64_FL_AMU): Likewise. | |
4248 | (AARCH64_FL_SCXTNUM): Likewise. | |
4249 | (AARCH64_FL_ID_PFR2): Likewise. | |
4250 | (F_DEPRECATED): New. | |
4251 | (F_REG_READ): Likewise. | |
4252 | (F_REG_WRITE): Likewise. | |
4253 | (F_ARCHEXT): Likewise. | |
4254 | (F_REG_ALIAS): Likewise. | |
4255 | ||
4256 | 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com> | |
4257 | ||
4258 | * config/aarch64/aarch64-sys-regs.def: New. | |
4259 | ||
4260 | 2023-12-06 Robin Dapp <rdapp@ventanamicro.com> | |
4261 | ||
4262 | PR target/112854 | |
4263 | PR target/112872 | |
4264 | * config/riscv/autovec.md (vec_init<mode>qi): New expander. | |
4265 | ||
4266 | 2023-12-06 Jakub Jelinek <jakub@redhat.com> | |
4267 | ||
4268 | PR rtl-optimization/112760 | |
4269 | * config/i386/i386-passes.def (pass_insert_vzeroupper): Insert | |
4270 | after pass_postreload_cse rather than pass_reload. | |
4271 | * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper): | |
4272 | Adjust comment for it. | |
4273 | ||
4274 | 2023-12-06 Jakub Jelinek <jakub@redhat.com> | |
4275 | ||
4276 | PR tree-optimization/112809 | |
4277 | * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt): For | |
4278 | separate_ext in kind == bitint_prec_huge mode if rem == 0, create for | |
4279 | i == cnt - 1 the loop rather than using size_int (end). | |
4280 | ||
4281 | 2023-12-06 Jakub Jelinek <jakub@redhat.com> | |
4282 | ||
4283 | * gcc.cc (driver_handle_option): Add /* FALLTHROUGH */ comment | |
4284 | between OPT_pie and OPT_r cases. | |
4285 | ||
4286 | 2023-12-06 Tobias Burnus <tobias@codesourcery.com> | |
4287 | ||
4288 | * tsystem.h (calloc, realloc): Declare when inhibit_libc. | |
4289 | ||
4290 | 2023-12-06 Richard Biener <rguenther@suse.de> | |
4291 | ||
4292 | PR tree-optimization/112843 | |
4293 | * tree-ssa-operands.cc (update_stmt_operands): Do not call | |
4294 | update_stmt from ranger. | |
4295 | * value-query.h (range_query::update_stmt): Remove. | |
4296 | * gimple-range.h (gimple_ranger::update_stmt): Likewise. | |
4297 | * gimple-range.cc (gimple_ranger::update_stmt): Likewise. | |
4298 | ||
4299 | 2023-12-06 xuli <xuli1@eswincomputing.com> | |
4300 | ||
4301 | * config/riscv/riscv.md: Remove. | |
4302 | ||
4303 | 2023-12-06 Alexandre Oliva <oliva@adacore.com> | |
4304 | ||
4305 | * Makefile.in (OBJS): Add ipa-strub.o. | |
4306 | (GTFILES): Add ipa-strub.cc. | |
4307 | * builtins.def (BUILT_IN_STACK_ADDRESS): New. | |
4308 | (BUILT_IN___STRUB_ENTER): New. | |
4309 | (BUILT_IN___STRUB_UPDATE): New. | |
4310 | (BUILT_IN___STRUB_LEAVE): New. | |
4311 | * builtins.cc: Include ipa-strub.h. | |
4312 | (STACK_STOPS, STACK_UNSIGNED): Define. | |
4313 | (expand_builtin_stack_address): New. | |
4314 | (expand_builtin_strub_enter): New. | |
4315 | (expand_builtin_strub_update): New. | |
4316 | (expand_builtin_strub_leave): New. | |
4317 | (expand_builtin): Call them. | |
4318 | * common.opt (fstrub=*): New options. | |
4319 | * doc/extend.texi (strub): New type attribute. | |
4320 | (__builtin_stack_address): New function. | |
4321 | (Stack Scrubbing): New section. | |
4322 | * doc/invoke.texi (-fstrub=*): New options. | |
4323 | (-fdump-ipa-*): New passes. | |
4324 | * gengtype-lex.l: Ignore multi-line pp-directives. | |
4325 | * ipa-inline.cc: Include ipa-strub.h. | |
4326 | (can_inline_edge_p): Test strub_inlinable_to_p. | |
4327 | * ipa-split.cc: Include ipa-strub.h. | |
4328 | (execute_split_functions): Test strub_splittable_p. | |
4329 | * ipa-strub.cc, ipa-strub.h: New. | |
4330 | * passes.def: Add strub_mode and strub passes. | |
4331 | * tree-cfg.cc (gimple_verify_flow_info): Note on debug stmts. | |
4332 | * tree-pass.h (make_pass_ipa_strub_mode): Declare. | |
4333 | (make_pass_ipa_strub): Declare. | |
4334 | (make_pass_ipa_function_and_variable_visibility): Fix | |
4335 | formatting. | |
4336 | * tree-ssa-ccp.cc (optimize_stack_restore): Keep restores | |
4337 | before strub leave. | |
4338 | * attribs.cc: Include ipa-strub.h. | |
4339 | (decl_attributes): Support applying attributes to function | |
4340 | type, rather than pointer type, at handler's request. | |
4341 | (comp_type_attributes): Combine strub_comptypes and target | |
4342 | comp_type results. | |
4343 | * doc/tm.texi.in (TARGET_STRUB_USE_DYNAMIC_ARRAY): New. | |
4344 | (TARGET_STRUB_MAY_USE_MEMSET): New. | |
4345 | * doc/tm.texi: Rebuilt. | |
4346 | * cgraph.h (symtab_node::reset): Add preserve_comdat_group | |
4347 | param, with a default. | |
4348 | * cgraphunit.cc (symtab_node::reset): Use it. | |
4349 | ||
4350 | 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
4351 | ||
4352 | PR target/112851 | |
4353 | PR target/112852 | |
4354 | * config/riscv/riscv-v.cc (vls_mode_valid_p): Block VLSmodes according | |
4355 | TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR. | |
4356 | ||
4357 | 2023-12-05 David Faust <david.faust@oracle.com> | |
4358 | ||
4359 | PR debug/112849 | |
4360 | * btfout.cc (btf_collect_datasec): Avoid incorrectly creating an | |
4361 | entry in a BTF_KIND_DATASEC record for extern variable decls without | |
4362 | a known section. | |
4363 | ||
4364 | 2023-12-05 Jakub Jelinek <jakub@redhat.com> | |
4365 | ||
4366 | PR target/112606 | |
4367 | * config/rs6000/rs6000.md (copysign<mode>3): Change predicate | |
4368 | of the last argument from gpc_reg_operand to any_operand. If | |
4369 | operands[2] is CONST_DOUBLE, emit abs or neg abs depending on | |
4370 | its sign, otherwise if it doesn't satisfy gpc_reg_operand, | |
4371 | force it to REG using copy_to_mode_reg. | |
4372 | ||
4373 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4374 | ||
4375 | * attribs.cc (handle_ignored_attributes_option): Add extra | |
4376 | braces to work around PR 16333 in older compilers. | |
4377 | * config/aarch64/aarch64.cc (aarch64_gnu_attribute_table): Likewise. | |
4378 | (aarch64_arm_attribute_table): Likewise. | |
4379 | * config/arm/arm.cc (arm_gnu_attribute_table): Likewise. | |
4380 | * config/i386/i386-options.cc (ix86_gnu_attribute_table): Likewise. | |
4381 | * config/ia64/ia64.cc (ia64_gnu_attribute_table): Likewise. | |
4382 | * config/rs6000/rs6000.cc (rs6000_gnu_attribute_table): Likewise. | |
4383 | * target-def.h (TARGET_GNU_ATTRIBUTES): Likewise. | |
4384 | * genhooks.cc (emit_init_macros): Likewise, when emitting the | |
4385 | instantiation of TARGET_ATTRIBUTE_TABLE. | |
4386 | * langhooks-def.h (LANG_HOOKS_INITIALIZER): Likewise, when | |
4387 | instantiating LANG_HOOKS_ATTRIBUTE_TABLE. | |
4388 | (LANG_HOOKS_ATTRIBUTE_TABLE): Define to be empty by default. | |
4389 | * target.def (attribute_table): Likewise. | |
4390 | ||
4391 | 2023-12-05 Richard Biener <rguenther@suse.de> | |
4392 | ||
4393 | PR middle-end/112860 | |
4394 | * passes.cc (should_skip_pass_p): Do not skip ISEL. | |
4395 | ||
4396 | 2023-12-05 Richard Biener <rguenther@suse.de> | |
4397 | ||
4398 | PR sanitizer/111736 | |
4399 | * asan.cc (asan_protect_global): Do not protect globals | |
4400 | in non-generic address-space. | |
4401 | ||
4402 | 2023-12-05 Richard Biener <rguenther@suse.de> | |
4403 | ||
4404 | PR ipa/92606 | |
4405 | * ipa-icf.cc (sem_variable::equals_wpa): Compare address-spaces. | |
4406 | ||
4407 | 2023-12-05 Richard Biener <rguenther@suse.de> | |
4408 | ||
4409 | PR middle-end/112830 | |
4410 | * gimplify.cc (gimplify_modify_expr): Avoid turning aggregate | |
4411 | copy of non-generic address-spaces to memcpy. | |
4412 | (gimplify_modify_expr_to_memcpy): Assert we are dealing with | |
4413 | a copy inside the generic address-space. | |
4414 | (gimplify_modify_expr_to_memset): Likewise. | |
4415 | * tree-cfg.cc (verify_gimple_assign_single): Allow | |
4416 | WITH_SIZE_EXPR as part of the RHS of an assignment. | |
4417 | * builtins.cc (get_memory_address): Assert we are dealing | |
4418 | with the generic address-space. | |
4419 | * tree-ssa-dce.cc (ref_may_be_aliased): Handle WITH_SIZE_EXPR. | |
4420 | ||
4421 | 2023-12-05 Richard Biener <rguenther@suse.de> | |
4422 | ||
4423 | PR tree-optimization/109689 | |
4424 | PR tree-optimization/112856 | |
4425 | * cfgloopmanip.h (unloop_loops): Adjust API. | |
4426 | * tree-ssa-loop-ivcanon.cc (unloop_loops): Take edges_to_remove | |
4427 | as parameter. | |
4428 | (canonicalize_induction_variables): Adjust. | |
4429 | (tree_unroll_loops_completely): Likewise. | |
4430 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Rewrite into | |
4431 | LC SSA if we unlooped some loops and we are in LC SSA. | |
4432 | ||
4433 | 2023-12-05 Jakub Jelinek <jakub@redhat.com> | |
4434 | ||
4435 | PR target/112845 | |
4436 | * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL | |
4437 | if the new immediate is ix86_endbr_immediate_operand. | |
4438 | ||
4439 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4440 | ||
4441 | * config/aarch64/aarch64.h (TARGET_STREAMING_SME2): New macro. | |
4442 | (P_ALIASES): Likewise. | |
4443 | (REGISTER_NAMES): Add pn aliases of the predicate registers. | |
4444 | (W8_W11_REGNUM_P): New macro. | |
4445 | (W8_W11_REGS): New register class. | |
4446 | (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly. | |
4447 | * config/aarch64/aarch64.cc (aarch64_print_operand): Add support | |
4448 | for %K, which prints a predicate as a counter. Handle tuples of | |
4449 | predicates. | |
4450 | (aarch64_regno_regclass): Handle W8_W11_REGS. | |
4451 | (aarch64_class_max_nregs): Likewise. | |
4452 | * config/aarch64/constraints.md (Uci, Uw2, Uw4): New constraints. | |
4453 | (x, y): Move further up file. | |
4454 | (Uph): Redefine as the high predicate registers, renaming the old | |
4455 | constraint to... | |
4456 | (Uih): ...this. | |
4457 | * config/aarch64/predicates.md (const_0_to_7_operand): New predicate. | |
4458 | (const_0_to_4_step_4_operand, const_0_to_6_step_2_operand): Likewise. | |
4459 | (const_0_to_12_step_4_operand, const_0_to_14_step_2_operand): Likewise. | |
4460 | (aarch64_simd_shift_imm_qi): Use const_0_to_7_operand. | |
4461 | * config/aarch64/iterators.md (VNx16SI_ONLY, VNx8SI_ONLY) | |
4462 | (VNx8DI_ONLY, SVE_FULL_BHSIx2, SVE_FULL_HF, SVE_FULL_SIx2_SDIx4) | |
4463 | (SVE_FULL_BHS, SVE_FULLx24, SVE_DIx24, SVE_BHSx24, SVE_Ix24) | |
4464 | (SVE_Fx24, SVE_SFx24, SME_ZA_BIx24, SME_ZA_BHIx124, SME_ZA_BHIx24) | |
4465 | (SME_ZA_HFx124, SME_ZA_HFx24, SME_ZA_HIx124, SME_ZA_HIx24) | |
4466 | (SME_ZA_SDIx24, SME_ZA_SDFx24): New mode iterators. | |
4467 | (UNSPEC_REVD, UNSPEC_CNTP_C, UNSPEC_PEXT, UNSPEC_PEXTx2): New unspecs. | |
4468 | (UNSPEC_PSEL, UNSPEC_PTRUE_C, UNSPEC_SQRSHR, UNSPEC_SQRSHRN) | |
4469 | (UNSPEC_SQRSHRU, UNSPEC_SQRSHRUN, UNSPEC_UQRSHR, UNSPEC_UQRSHRN) | |
4470 | (UNSPEC_UZP, UNSPEC_UZPQ, UNSPEC_ZIP, UNSPEC_ZIPQ, UNSPEC_BFMLSLB) | |
4471 | (UNSPEC_BFMLSLT, UNSPEC_FCVTN, UNSPEC_FDOT, UNSPEC_SQCVT): Likewise. | |
4472 | (UNSPEC_SQCVTN, UNSPEC_SQCVTU, UNSPEC_SQCVTUN, UNSPEC_UQCVT): Likewise. | |
4473 | (UNSPEC_SME_ADD, UNSPEC_SME_ADD_WRITE, UNSPEC_SME_BMOPA): Likewise. | |
4474 | (UNSPEC_SME_BMOPS, UNSPEC_SME_FADD, UNSPEC_SME_FDOT, UNSPEC_SME_FVDOT) | |
4475 | (UNSPEC_SME_FMLA, UNSPEC_SME_FMLS, UNSPEC_SME_FSUB, UNSPEC_SME_READ) | |
4476 | (UNSPEC_SME_SDOT, UNSPEC_SME_SVDOT, UNSPEC_SME_SMLA, UNSPEC_SME_SMLS) | |
4477 | (UNSPEC_SME_SUB, UNSPEC_SME_SUB_WRITE, UNSPEC_SME_SUDOT): Likewise. | |
4478 | (UNSPEC_SME_SUVDOT, UNSPEC_SME_UDOT, UNSPEC_SME_UVDOT): Likewise. | |
4479 | (UNSPEC_SME_UMLA, UNSPEC_SME_UMLS, UNSPEC_SME_USDOT): Likewise. | |
4480 | (UNSPEC_SME_USVDOT, UNSPEC_SME_WRITE): Likewise. | |
4481 | (Vetype, VNARROW, V2XWIDE, Ventype, V_INT_EQUIV, v_int_equiv) | |
4482 | (VSINGLE, vsingle, b): Add tuple modes. | |
4483 | (v2xwide, za32_offset_range, za64_offset_range, za32_long) | |
4484 | (za32_last_offset, vg_modifier, z_suffix, aligned_operand) | |
4485 | (aligned_fpr): New mode attributes. | |
4486 | (SVE_INT_BINARY_MULTI, SVE_INT_BINARY_SINGLE, SVE_INT_BINARY_MULTI) | |
4487 | (SVE_FP_BINARY_MULTI): New int iterators. | |
4488 | (SVE_BFLOAT_TERNARY_LONG): Add UNSPEC_BFMLSLB and UNSPEC_BFMLSLT. | |
4489 | (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise. | |
4490 | (SVE_WHILE_ORDER, SVE2_INT_SHIFT_IMM_NARROWxN, SVE_QCVTxN) | |
4491 | (SVE2_SFx24_UNARY, SVE2_x24_PERMUTE, SVE2_x24_PERMUTEQ) | |
4492 | (UNSPEC_REVD_ONLY, SME2_INT_MOP, SME2_BMOP, SME_BINARY_SLICE_SDI) | |
4493 | (SME_BINARY_SLICE_SDF, SME_BINARY_WRITE_SLICE_SDI, SME_INT_DOTPROD) | |
4494 | (SME_INT_DOTPROD_LANE, SME_FP_DOTPROD, SME_FP_DOTPROD_LANE) | |
4495 | (SME_INT_TERNARY_SLICE, SME_FP_TERNARY_SLICE, BHSD_BITS) | |
4496 | (LUTI_BITS): New int iterators. | |
4497 | (optab, sve_int_op): Handle the new unspecs. | |
4498 | (sme_int_op, has_16bit_form): New int attributes. | |
4499 | (bits_etype): Handle 64. | |
4500 | * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): New unspec. | |
4501 | (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise. | |
4502 | (UNSPEC_STNT1_SVE_COUNT): Likewise. | |
4503 | * config/aarch64/atomics.md (cas_short_expected_imm): Use Uhi | |
4504 | rather than Uph for HImode immediates. | |
4505 | * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>) | |
4506 | (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>) | |
4507 | (@aarch64_stnt1<SVE_FULLx24:mode>): New patterns. | |
4508 | (@aarch64_<sur>dot_prod_lane<vsi2qi>): Extend to... | |
4509 | (@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>) | |
4510 | (@aarch64_<sur>dot_prod_lane<VNx4SI_ONLY:mode><VNx16QI_ONLY:mode>): | |
4511 | ...these new patterns. | |
4512 | (SVE_WHILE_B, SVE_WHILE_B_X2, SVE_WHILE_C): New constants. Add | |
4513 | SVE_WHILE_B to existing while patterns. | |
4514 | * config/aarch64/aarch64-sve2.md (@aarch64_sve_ptrue_c<BHSD_BITS>) | |
4515 | (@aarch64_sve_pext<BHSD_BITS>, @aarch64_sve_pext<BHSD_BITS>x2) | |
4516 | (@aarch64_sve_psel<BHSD_BITS>, *aarch64_sve_psel<BHSD_BITS>_plus) | |
4517 | (@aarch64_sve_cntp_c<BHSD_BITS>, <frint_pattern><mode>2) | |
4518 | (<optab><mode>3, *<optab><mode>3, @aarch64_sve_single_<optab><mode>) | |
4519 | (@aarch64_sve_<sve_int_op><mode>): New patterns. | |
4520 | (@aarch64_sve_single_<sve_int_op><mode>, @aarch64_sve_<su>clamp<mode>) | |
4521 | (*aarch64_sve_<su>clamp<mode>_x, @aarch64_sve_<su>clamp_single<mode>) | |
4522 | (@aarch64_sve_fclamp<mode>, *aarch64_sve_fclamp<mode>_x) | |
4523 | (@aarch64_sve_fclamp_single<mode>, <optab><mode><v2xwide>2) | |
4524 | (@aarch64_sve_<sur>dotvnx4sivnx8hi): New patterns. | |
4525 | (@aarch64_sve_<maxmin_uns_op><mode>): Likewise. | |
4526 | (*aarch64_sve_<maxmin_uns_op><mode>): Likewise. | |
4527 | (@aarch64_sve_single_<maxmin_uns_op><mode>): Likewise. | |
4528 | (aarch64_sve_fdotvnx4sfvnx8hf): Likewise. | |
4529 | (aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise. | |
4530 | (@aarch64_sve_<optab><VNx16QI_ONLY:mode><VNx16SI_ONLY:mode>): Likewise. | |
4531 | (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Likewise. | |
4532 | (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8DI_ONLY:mode>): Likewise. | |
4533 | (truncvnx8sf<mode>2, @aarch64_sve_cvtn<mode>): Likewise. | |
4534 | (<optab><v_int_equiv><mode>2, <optab><mode><v_int_equiv>2): Likewise. | |
4535 | (@aarch64_sve_sel<mode>): Likewise. | |
4536 | (@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise. | |
4537 | (@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise. | |
4538 | (@aarch64_pred_<optab><mode>, @cond_<optab><mode>): Likewise. | |
4539 | (@aarch64_sve_<optab><mode>): Likewise. | |
4540 | * config/aarch64/aarch64-sme.md (@aarch64_sme_<optab><mode><mode>) | |
4541 | (*aarch64_sme_<optab><mode><mode>_plus, @aarch64_sme_read<mode>) | |
4542 | (*aarch64_sme_read<mode>_plus, @aarch64_sme_write<mode>): New patterns. | |
4543 | (*aarch64_sme_write<mode>_plus aarch64_sme_zero_zt0): Likewise. | |
4544 | (@aarch64_sme_<optab><mode>, *aarch64_sme_<optab><mode>_plus) | |
4545 | (@aarch64_sme_single_<optab><mode>): Likewise. | |
4546 | (*aarch64_sme_single_<optab><mode>_plus): Likewise. | |
4547 | (@aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>) | |
4548 | (*aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus) | |
4549 | (@aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>) | |
4550 | (*aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus) | |
4551 | (@aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>) | |
4552 | (*aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>_plus) | |
4553 | (@aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>) | |
4554 | (*aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus) | |
4555 | (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>) | |
4556 | (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>_plus) | |
4557 | (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>) | |
4558 | (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus) | |
4559 | (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>) | |
4560 | (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus) | |
4561 | (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>) | |
4562 | (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>) | |
4563 | (@aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>) | |
4564 | (*aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>_plus) | |
4565 | (@aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>) | |
4566 | (*aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus) | |
4567 | (@aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>) | |
4568 | (*aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus) | |
4569 | (@aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>) | |
4570 | (*aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>) | |
4571 | (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx8HI_ONLY:mode>) | |
4572 | (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx4SI_ONLY:mode>) | |
4573 | (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>) | |
4574 | (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus) | |
4575 | (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>) | |
4576 | (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus) | |
4577 | (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>) | |
4578 | (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus) | |
4579 | (@aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>) | |
4580 | (*aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus) | |
4581 | (@aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>) | |
4582 | (*aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus) | |
4583 | (@aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>) | |
4584 | (*aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>) | |
4585 | (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>) | |
4586 | (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>_plus) | |
4587 | (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>) | |
4588 | (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>) | |
4589 | (@aarch64_sme_lut<LUTI_BITS><mode>): Likewise. | |
4590 | (UNSPEC_SME_LUTI): New unspec. | |
4591 | * config/aarch64/aarch64-sve-builtins.def (single): New mode suffix. | |
4592 | (c8, c16, c32, c64): New type suffixes. | |
4593 | (vg1x2, vg1x4, vg2, vg2x1, vg2x2, vg2x4, vg4, vg4x1, vg4x2) | |
4594 | (vg4x4): New group suffixes. | |
4595 | * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZT0) | |
4596 | (CP_WRITE_ZT0): New constants. | |
4597 | (get_svbool_t): Delete. | |
4598 | (function_resolver::report_mismatched_num_vectors): New member | |
4599 | function. | |
4600 | (function_resolver::resolve_conversion): Likewise. | |
4601 | (function_resolver::infer_predicate_type): Likewise. | |
4602 | (function_resolver::infer_64bit_scalar_integer_pair): Likewise. | |
4603 | (function_resolver::require_matching_predicate_type): Likewise. | |
4604 | (function_resolver::require_nonscalar_type): Likewise. | |
4605 | (function_resolver::finish_opt_single_resolution): Likewise. | |
4606 | (function_resolver::require_derived_vector_type): Add an | |
4607 | expected_num_vectors parameter. | |
4608 | (function_expander::map_to_rtx_codes): Add an extra parameter | |
4609 | for unconditional FP unspecs. | |
4610 | (function_instance::gp_type_index): New member function. | |
4611 | (function_instance::gp_type): Likewise. | |
4612 | (function_instance::gp_mode): Handle multi-vector operations. | |
4613 | * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_count) | |
4614 | (TYPES_all_pred_count, TYPES_c, TYPES_bhs_data, TYPES_bhs_widen) | |
4615 | (TYPES_hs_data, TYPES_cvt_h_s_float, TYPES_cvt_s_s, TYPES_qcvt_x2) | |
4616 | (TYPES_qcvt_x4, TYPES_qrshr_x2, TYPES_qrshru_x2, TYPES_qrshr_x4) | |
4617 | (TYPES_qrshru_x4, TYPES_while_x, TYPES_while_x_c, TYPES_s_narrow_fsu) | |
4618 | (TYPES_za_s_b_signed, TYPES_za_s_b_unsigned, TYPES_za_s_b_integer) | |
4619 | (TYPES_za_s_h_integer, TYPES_za_s_h_data, TYPES_za_s_unsigned) | |
4620 | (TYPES_za_s_float, TYPES_za_s_data, TYPES_za_d_h_integer): New type | |
4621 | macros. | |
4622 | (groups_x2, groups_x12, groups_x4, groups_x24, groups_x124) | |
4623 | (groups_vg1x2, groups_vg1x4, groups_vg1x24, groups_vg2, groups_vg4) | |
4624 | (groups_vg24): New group arrays. | |
4625 | (function_instance::reads_global_state_p): Handle CP_READ_ZT0. | |
4626 | (function_instance::modifies_global_state_p): Handle CP_WRITE_ZT0. | |
4627 | (add_shared_state_attribute): Handle zt0 state. | |
4628 | (function_builder::add_overloaded_functions): Skip MODE_single | |
4629 | for non-tuple groups. | |
4630 | (function_resolver::report_mismatched_num_vectors): New function. | |
4631 | (function_resolver::resolve_to): Add a fallback error message for | |
4632 | the general two-type case. | |
4633 | (function_resolver::resolve_conversion): New function. | |
4634 | (function_resolver::infer_predicate_type): Likewise. | |
4635 | (function_resolver::infer_64bit_scalar_integer_pair): Likewise. | |
4636 | (function_resolver::require_matching_predicate_type): Likewise. | |
4637 | (function_resolver::require_matching_vector_type): Specifically | |
4638 | diagnose mismatched vector counts. | |
4639 | (function_resolver::require_derived_vector_type): Add an | |
4640 | expected_num_vectors parameter. Extend to handle cases where | |
4641 | tuples are expected. | |
4642 | (function_resolver::require_nonscalar_type): New function. | |
4643 | (function_resolver::check_gp_argument): Use gp_type_index rather | |
4644 | than hard-coding VECTOR_TYPE_svbool_t. | |
4645 | (function_resolver::finish_opt_single_resolution): New function. | |
4646 | (function_checker::require_immediate_either_or): Remove hard-coded | |
4647 | constants. | |
4648 | (function_expander::direct_optab_handler): New function. | |
4649 | (function_expander::use_pred_x_insn): Only add a strictness flag | |
4650 | is the insn has an operand for it. | |
4651 | (function_expander::map_to_rtx_codes): Take an unconditional | |
4652 | FP unspec as an extra parameter. Handle tuples and MODE_single. | |
4653 | (function_expander::map_to_unspecs): Handle tuples and MODE_single. | |
4654 | * config/aarch64/aarch64-sve-builtins-functions.h (read_zt0) | |
4655 | (write_zt0): New typedefs. | |
4656 | (full_width_access::memory_vector): Use the function's | |
4657 | vectors_per_tuple. | |
4658 | (rtx_code_function_base): Add an optional unconditional FP unspec. | |
4659 | (rtx_code_function::expand): Update accordingly. | |
4660 | (rtx_code_function_rotated::expand): Likewise. | |
4661 | (unspec_based_function_exact_insn::expand): Use tuple_mode instead | |
4662 | of vector_mode. | |
4663 | (unspec_based_uncond_function): New typedef. | |
4664 | (cond_or_uncond_unspec_function): New class. | |
4665 | (sme_1mode_function::expand): Handle single forms. | |
4666 | (sme_2mode_function_t): Likewise, adding a template parameter for them. | |
4667 | (sme_2mode_function): Update accordingly. | |
4668 | (sme_2mode_lane_function): New typedef. | |
4669 | (multireg_permute): New class. | |
4670 | (class integer_conversion): Likewise. | |
4671 | (while_comparison::expand): Handle svcount_t and svboolx2_t results. | |
4672 | * config/aarch64/aarch64-sve-builtins-shapes.h | |
4673 | (binary_int_opt_single_n, binary_opt_single_n, binary_single) | |
4674 | (binary_za_slice_lane, binary_za_slice_int_opt_single) | |
4675 | (binary_za_slice_opt_single, binary_za_slice_uint_opt_single) | |
4676 | (binaryx, clamp, compare_scalar_count, count_pred_c) | |
4677 | (dot_za_slice_int_lane, dot_za_slice_lane, dot_za_slice_uint_lane) | |
4678 | (extract_pred, inherent_zt, ldr_zt, read_za, read_za_slice) | |
4679 | (select_pred, shift_right_imm_narrowxn, storexn, str_zt) | |
4680 | (unary_convertxn, unary_za_slice, unaryxn, write_za) | |
4681 | (write_za_slice): Declare. | |
4682 | * config/aarch64/aarch64-sve-builtins-shapes.cc | |
4683 | (za_group_is_pure_overload): New function. | |
4684 | (apply_predication): Use the function's gp_type for the predicate, | |
4685 | instead of hard-coding the use of svbool_t. | |
4686 | (parse_element_type): Add support for "c" (svcount_t). | |
4687 | (parse_type): Add support for "c0" and "c1" (conversion destination | |
4688 | and source types). | |
4689 | (binary_za_slice_lane_base): New class. | |
4690 | (binary_za_slice_opt_single_base): Likewise. | |
4691 | (load_contiguous_base::resolve): Pass the group suffix to r.resolve. | |
4692 | (luti_lane_zt_base): New class. | |
4693 | (binary_int_opt_single_n, binary_opt_single_n, binary_single) | |
4694 | (binary_za_slice_lane, binary_za_slice_int_opt_single) | |
4695 | (binary_za_slice_opt_single, binary_za_slice_uint_opt_single) | |
4696 | (binaryx, clamp): New shapes. | |
4697 | (compare_scalar_def::build): Allow the return type to be a tuple. | |
4698 | (compare_scalar_def::expand): Pass the group suffix to r.resolve. | |
4699 | (compare_scalar_count, count_pred_c, dot_za_slice_int_lane) | |
4700 | (dot_za_slice_lane, dot_za_slice_uint_lane, extract_pred, inherent_zt) | |
4701 | (ldr_zt, read_za, read_za_slice, select_pred, shift_right_imm_narrowxn) | |
4702 | (storexn, str_zt): New shapes. | |
4703 | (ternary_qq_lane_def, ternary_qq_opt_n_def): Replace with... | |
4704 | (ternary_qq_or_011_lane_def, ternary_qq_opt_n_or_011_def): ...these | |
4705 | new classes. Allow a second suffix that specifies the type of the | |
4706 | second vector argument, and that is used to derive the third. | |
4707 | (unary_def::build): Extend to handle tuple types. | |
4708 | (unary_convert_def::build): Use the new c0 and c1 format specifiers. | |
4709 | (unary_convertxn, unary_za_slice, unaryxn, write_za): New shapes. | |
4710 | (write_za_slice): Likewise. | |
4711 | * config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand) | |
4712 | (svext_bhw_impl::expand): Update call to map_to_rtx_costs. | |
4713 | (svcntp_impl::expand): Handle svcount_t variants. | |
4714 | (svcvt_impl::expand): Handle unpredicated conversions separately, | |
4715 | dealing with tuples. | |
4716 | (svdot_impl::expand): Handle 2-way dot products. | |
4717 | (svdotprod_lane_impl::expand): Likewise. | |
4718 | (svld1_impl::fold): Punt on tuple loads. | |
4719 | (svld1_impl::expand): Handle tuple loads. | |
4720 | (svldnt1_impl::expand): Likewise. | |
4721 | (svpfalse_impl::fold): Punt on svcount_t forms. | |
4722 | (svptrue_impl::fold): Likewise. | |
4723 | (svptrue_impl::expand): Handle svcount_t forms. | |
4724 | (svrint_impl): New class. | |
4725 | (svsel_impl::fold): Punt on tuple forms. | |
4726 | (svsel_impl::expand): Handle tuple forms. | |
4727 | (svst1_impl::fold): Punt on tuple loads. | |
4728 | (svst1_impl::expand): Handle tuple loads. | |
4729 | (svstnt1_impl::expand): Likewise. | |
4730 | (svwhilelx_impl::fold): Punt on tuple forms. | |
4731 | (svdot_lane): Use UNSPEC_FDOT. | |
4732 | (svmax, svmaxnm, svmin, svminmm): Add unconditional FP unspecs. | |
4733 | (rinta, rinti, rintm, rintn, rintp, rintx, rintz): Use svrint_impl. | |
4734 | * config/aarch64/aarch64-sve-builtins-base.def (svcreate2, svget2) | |
4735 | (svset2, svundef2): Add _b variants. | |
4736 | (svcvt): Use unary_convertxn. | |
4737 | (svdot): Use ternary_qq_opt_n_or_011. | |
4738 | (svdot_lane): Use ternary_qq_or_011_lane. | |
4739 | (svmax, svmaxnm, svmin, svminnm): Use binary_opt_single_n. | |
4740 | (svpfalse): Add a form that returns svcount_t results. | |
4741 | (svrinta, svrintm, svrintn, svrintp): Use unaryxn. | |
4742 | (svsel): Use binaryxn. | |
4743 | (svst1, svstnt1): Use storexn. | |
4744 | * config/aarch64/aarch64-sve-builtins-sme.h | |
4745 | (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za) | |
4746 | (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt) | |
4747 | (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za) | |
4748 | (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za) | |
4749 | (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za) | |
4750 | (svvdot_lane_za, svwrite_za, svzero_zt): Declare. | |
4751 | * config/aarch64/aarch64-sve-builtins-sme.cc (load_store_za_base): | |
4752 | Rename to... | |
4753 | (load_store_za_zt0_base): ...this and extend to tuples. | |
4754 | (load_za_base, store_za_base): Update accordingly. | |
4755 | (expand_ldr_str_zt0): New function. | |
4756 | (svldr_zt_impl, svluti_lane_zt_impl, svread_za_impl, svstr_zt_impl) | |
4757 | (svsudot_za_impl, svwrite_za_impl, svzero_zt_impl): New classes. | |
4758 | (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za) | |
4759 | (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt) | |
4760 | (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za) | |
4761 | (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za) | |
4762 | (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za) | |
4763 | (svvdot_lane_za, svwrite_za, svzero_zt): New functions. | |
4764 | * config/aarch64/aarch64-sve-builtins-sme.def: Add SME2 intrinsics. | |
4765 | * config/aarch64/aarch64-sve-builtins-sve2.h | |
4766 | (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp) | |
4767 | (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn) | |
4768 | (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip) | |
4769 | (svzipq): Declare. | |
4770 | * config/aarch64/aarch64-sve-builtins-sve2.cc (svclamp_impl) | |
4771 | (svcvtn_impl, svpext_impl, svpsel_impl): New classes. | |
4772 | (svqrshl_impl::fold): Update for change to svrshl shape. | |
4773 | (svrshl_impl::fold): Punt on tuple forms. | |
4774 | (svsqadd_impl::expand): Update call to map_to_rtx_codes. | |
4775 | (svunpk_impl): New class. | |
4776 | (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp) | |
4777 | (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn) | |
4778 | (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip) | |
4779 | (svzipq): New functions. | |
4780 | * config/aarch64/aarch64-sve-builtins-sve2.def: Add SME2 intrinsics. | |
4781 | * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define | |
4782 | or undefine __ARM_FEATURE_SME2. | |
4783 | ||
4784 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4785 | ||
4786 | * config/aarch64/aarch64.md (ZT0_REGNUM): New constant. | |
4787 | (LAST_FAKE_REGNUM): Bump to include it. | |
4788 | * config/aarch64/aarch64.h (FIXED_REGISTERS): Add an entry for ZT0. | |
4789 | (CALL_REALLY_USED_REGISTERS, REGISTER_NAMES): Likewise. | |
4790 | (REG_CLASS_CONTENTS): Likewise. | |
4791 | (machine_function): Add zt0_save_buffer. | |
4792 | (CUMULATIVE_ARGS): Add shared_zt0_flags; | |
4793 | * config/aarch64/aarch64.cc (aarch64_check_state_string): Handle zt0. | |
4794 | (aarch64_fntype_pstate_za, aarch64_fndecl_pstate_za): Likewise. | |
4795 | (aarch64_function_arg): Add the shared ZT0 flags as an extra | |
4796 | limb of the parallel. | |
4797 | (aarch64_init_cumulative_args): Initialize shared_zt0_flags. | |
4798 | (aarch64_extra_live_on_entry): Handle ZT0_REGNUM. | |
4799 | (aarch64_epilogue_uses): Likewise. | |
4800 | (aarch64_get_zt0_save_buffer, aarch64_save_zt0): New functions. | |
4801 | (aarch64_restore_zt0): Likewise. | |
4802 | (aarch64_start_call_args): Reject calls to functions that share | |
4803 | ZT0 from functions that have no ZT0 state. Save ZT0 around shared-ZA | |
4804 | calls that do not share ZT0. | |
4805 | (aarch64_expand_call): Handle ZT0. Reject calls to functions that | |
4806 | share ZT0 but not ZA from functions with ZA state. | |
4807 | (aarch64_end_call_args): Restore ZT0 after calls to shared-ZA functions | |
4808 | that do not share ZT0. | |
4809 | (aarch64_set_current_function): Require +sme2 for functions that | |
4810 | have ZT0 state. | |
4811 | (aarch64_function_attribute_inlinable_p): Don't allow functions to | |
4812 | be inlined if they have local zt0 state. | |
4813 | (AARCH64_IPA_CLOBBERS_ZT0): New constant. | |
4814 | (aarch64_update_ipa_fn_target_info): Record asms that clobber ZT0. | |
4815 | (aarch64_can_inline_p): Don't inline callees that clobber ZT0 | |
4816 | into functions that have ZT0 state. | |
4817 | (aarch64_comp_type_attributes): Check for compatible ZT0 sharing. | |
4818 | (aarch64_optimize_mode_switching): Use mode switching if the | |
4819 | function has ZT0 state. | |
4820 | (aarch64_mode_emit_local_sme_state): Save and restore ZT0 around | |
4821 | calls to private-ZA functions. | |
4822 | (aarch64_mode_needed_local_sme_state): Require ZA to be active | |
4823 | for instructions that access ZT0. | |
4824 | (aarch64_mode_entry): Mark ZA as dead on entry if the function | |
4825 | only shares state other than "za" itself. | |
4826 | (aarch64_mode_exit): Likewise mark ZA as dead on return. | |
4827 | (aarch64_md_asm_adjust): Extend handling of ZA clobbers to ZT0. | |
4828 | * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros): | |
4829 | Define __ARM_STATE_ZT0. | |
4830 | * config/aarch64/aarch64-sme.md (UNSPECV_ASM_UPDATE_ZT0): New unspecv. | |
4831 | (aarch64_asm_update_zt0): New insn. | |
4832 | (UNSPEC_RESTORE_ZT0): New unspec. | |
4833 | (aarch64_sme_ldr_zt0, aarch64_restore_zt0): New insns. | |
4834 | (aarch64_sme_str_zt0): Likewise. | |
4835 | ||
4836 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4837 | ||
4838 | * config/aarch64/aarch64-modes.def (VNx32BI): New mode. | |
4839 | * config/aarch64/aarch64-protos.h (aarch64_split_double_move): Declare. | |
4840 | * config/aarch64/aarch64-sve-builtins.cc | |
4841 | (register_tuple_type): Handle tuples of predicates. | |
4842 | (handle_arm_sve_h): Define svboolx2_t as a pair of two svbool_ts. | |
4843 | * config/aarch64/aarch64-sve.md (movvnx32bi): New insn. | |
4844 | * config/aarch64/aarch64.cc | |
4845 | (pure_scalable_type_info::piece::get_rtx): Use VNx32BI for pairs | |
4846 | of predicates. | |
4847 | (pure_scalable_type_info::add_piece): Don't try to form pairs of | |
4848 | predicates. | |
4849 | (VEC_STRUCT): Generalize comment. | |
4850 | (aarch64_classify_vector_mode): Handle VNx32BI. | |
4851 | (aarch64_array_mode): Likewise. Return BLKmode for arrays of | |
4852 | predicates that have no associated mode, rather than allowing | |
4853 | an integer mode to be chosen. | |
4854 | (aarch64_hard_regno_nregs): Handle VNx32BI. | |
4855 | (aarch64_hard_regno_mode_ok): Likewise. | |
4856 | (aarch64_split_double_move): New function, split out from... | |
4857 | (aarch64_split_128bit_move): ...here. | |
4858 | (aarch64_ptrue_reg): Tighten assert to aarch64_sve_pred_mode_p. | |
4859 | (aarch64_pfalse_reg): Likewise. | |
4860 | (aarch64_sve_same_pred_for_ptest_p): Likewise. | |
4861 | (aarch64_sme_mode_switch_regs::add_reg): Handle VNx32BI. | |
4862 | (aarch64_expand_mov_immediate): Restrict handling of boolean vector | |
4863 | constants to single-predicate modes. | |
4864 | (aarch64_classify_address): Handle VNx32BI, ensuring that both halves | |
4865 | can be addressed. | |
4866 | (aarch64_class_max_nregs): Handle VNx32BI. | |
4867 | (aarch64_member_type_forces_blk): Don't for BLKmode for svboolx2_t. | |
4868 | (aarch64_simd_valid_immediate): Allow all-zeros and all-ones for | |
4869 | VNx32BI. | |
4870 | (aarch64_mov_operand_p): Restrict predicate constant canonicalization | |
4871 | to single-predicate modes. | |
4872 | (aarch64_evpc_ext): Generalize exclusion to all predicate modes. | |
4873 | (aarch64_evpc_rev_local, aarch64_evpc_dup): Likewise. | |
4874 | * config/aarch64/constraints.md (PR_REGS): New predicate. | |
4875 | ||
4876 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4877 | ||
4878 | * config/aarch64/aarch64-sve-builtins-base.cc | |
4879 | (svreinterpret_impl::fold): Handle reinterprets between svbool_t | |
4880 | and svcount_t. | |
4881 | (svreinterpret_impl::expand): Likewise. | |
4882 | * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret): Add | |
4883 | b<->c forms. | |
4884 | * config/aarch64/aarch64-sve-builtins.cc (TYPES_reinterpret_b): New | |
4885 | type suffix list. | |
4886 | (wrap_type_in_struct, register_type_decl): New functions, split out | |
4887 | from... | |
4888 | (register_tuple_type): ...here. | |
4889 | (register_builtin_types): Handle svcount_t. | |
4890 | (handle_arm_sve_h): Don't create tuples of svcount_t. | |
4891 | * config/aarch64/aarch64-sve-builtins.def (svcount_t): New type. | |
4892 | (c): New type suffix. | |
4893 | * config/aarch64/aarch64-sve-builtins.h (TYPE_count): New type class. | |
4894 | ||
4895 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4896 | ||
4897 | * doc/invoke.texi: Document +sme2. | |
4898 | * doc/sourcebuild.texi: Document aarch64_sme2. | |
4899 | * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION): | |
4900 | Add sme2. | |
4901 | * config/aarch64/aarch64.h (AARCH64_ISA_SME2, TARGET_SME2): New macros. | |
4902 | ||
4903 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4904 | ||
4905 | * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall): | |
4906 | Enforce PSTATE.SM and PSTATE.ZA restrictions. | |
4907 | (aarch64_expand_epilogue): Save and restore the arguments | |
4908 | to a sibcall around any change to PSTATE.SM. | |
4909 | ||
4910 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4911 | ||
4912 | * config/aarch64/aarch64.cc: Include symbol-summary.h, ipa-prop.h, | |
4913 | and ipa-fnsummary.h | |
4914 | (aarch64_function_attribute_inlinable_p): New function. | |
4915 | (AARCH64_IPA_SM_FIXED, AARCH64_IPA_CLOBBERS_ZA): New constants. | |
4916 | (aarch64_need_ipa_fn_target_info): New function. | |
4917 | (aarch64_update_ipa_fn_target_info): Likewise. | |
4918 | (aarch64_can_inline_p): Restrict the previous ISA flag checks | |
4919 | to non-modal features. Prevent callees that require a particular | |
4920 | PSTATE.SM state from being inlined into callers that can't guarantee | |
4921 | that state. Also prevent callees that have ZA state from being | |
4922 | inlined into callers that don't. Finally, prevent callees that | |
4923 | clobber ZA from being inlined into callers that have ZA state. | |
4924 | (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define. | |
4925 | (TARGET_NEED_IPA_FN_TARGET_INFO): Likewise. | |
4926 | (TARGET_UPDATE_IPA_FN_TARGET_INFO): Likewise. | |
4927 | ||
4928 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4929 | ||
4930 | * config/aarch64/aarch64.cc: Include except.h | |
4931 | (aarch64_sme_mode_switch_regs::add_call_preserved_reg): New function. | |
4932 | (aarch64_sme_mode_switch_regs::add_call_preserved_regs): Likewise. | |
4933 | (aarch64_need_old_pstate_sm): Return true if the function has | |
4934 | a nonlocal-goto or exception receiver. | |
4935 | (aarch64_switch_pstate_sm_for_landing_pad): New function. | |
4936 | (aarch64_switch_pstate_sm_for_jump): Likewise. | |
4937 | (pass_switch_pstate_sm::gate): Enable the pass for all | |
4938 | streaming and streaming-compatible functions. | |
4939 | (pass_switch_pstate_sm::execute): Handle non-local gotos and their | |
4940 | receivers. Handle exception handler entry points. | |
4941 | ||
4942 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4943 | ||
4944 | * config/aarch64/aarch64.cc (aarch64_arm_attribute_table): Add | |
4945 | arm::locally_streaming. | |
4946 | (aarch64_fndecl_is_locally_streaming): New function. | |
4947 | (aarch64_fndecl_sm_state): Handle locally-streaming functions. | |
4948 | (aarch64_cfun_enables_pstate_sm): New function. | |
4949 | (aarch64_add_offset): Add an argument that specifies whether | |
4950 | the streaming vector length should be used instead of the | |
4951 | prevailing one. | |
4952 | (aarch64_split_add_offset, aarch64_add_sp, aarch64_sub_sp): Likewise. | |
4953 | (aarch64_allocate_and_probe_stack_space): Likewise. | |
4954 | (aarch64_expand_mov_immediate): Update calls accordingly. | |
4955 | (aarch64_need_old_pstate_sm): Return true for locally-streaming | |
4956 | streaming-compatible functions. | |
4957 | (aarch64_layout_frame): Force all call-preserved Z and P registers | |
4958 | to be saved and restored if the function switches PSTATE.SM in the | |
4959 | prologue. | |
4960 | (aarch64_get_separate_components): Disable shrink-wrapping of | |
4961 | such Z and P saves and restores. | |
4962 | (aarch64_use_late_prologue_epilogue): New function. | |
4963 | (aarch64_expand_prologue): Measure SVE lengths in the streaming | |
4964 | vector length for locally-streaming functions, then emit code | |
4965 | to enable streaming mode. | |
4966 | (aarch64_expand_epilogue): Likewise in reverse. | |
4967 | (TARGET_USE_LATE_PROLOGUE_EPILOGUE): Define. | |
4968 | * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros): | |
4969 | Define __arm_locally_streaming. | |
4970 | ||
4971 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
4972 | ||
4973 | * doc/invoke.texi: Document +sme-i16i64 and +sme-f64f64. | |
4974 | * config.gcc (aarch64*-*-*): Add arm_sme.h to the list of headers | |
4975 | to install and aarch64-sve-builtins-sme.o to the list of objects | |
4976 | to build. | |
4977 | * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define | |
4978 | or undefine TARGET_SME, TARGET_SME_I16I64 and TARGET_SME_F64F64. | |
4979 | (aarch64_pragma_aarch64): Handle arm_sme.h. | |
4980 | * config/aarch64/aarch64-option-extensions.def (sme-i16i64) | |
4981 | (sme-f64f64): New extensions. | |
4982 | * config/aarch64/aarch64-protos.h (aarch64_sme_vq_immediate) | |
4983 | (aarch64_addsvl_addspl_immediate_p, aarch64_output_addsvl_addspl) | |
4984 | (aarch64_output_sme_zero_za): Declare. | |
4985 | (aarch64_output_move_struct): Delete. | |
4986 | (aarch64_sme_ldr_vnum_offset): Declare. | |
4987 | (aarch64_sve::handle_arm_sme_h): Likewise. | |
4988 | * config/aarch64/aarch64.h (AARCH64_ISA_SM_ON): New macro. | |
4989 | (AARCH64_ISA_SME_I16I64, AARCH64_ISA_SME_F64F64): Likewise. | |
4990 | (TARGET_STREAMING, TARGET_STREAMING_SME): Likewise. | |
4991 | (TARGET_SME_I16I64, TARGET_SME_F64F64): Likewise. | |
4992 | * config/aarch64/aarch64.cc (aarch64_sve_rdvl_factor_p): Rename to... | |
4993 | (aarch64_sve_rdvl_addvl_factor_p): ...this. | |
4994 | (aarch64_sve_rdvl_immediate_p): Update accordingly. | |
4995 | (aarch64_rdsvl_immediate_p, aarch64_add_offset): Likewise. | |
4996 | (aarch64_sme_vq_immediate): Likewise. Make public. | |
4997 | (aarch64_sve_addpl_factor_p): New function. | |
4998 | (aarch64_sve_addvl_addpl_immediate_p): Use | |
4999 | aarch64_sve_rdvl_addvl_factor_p and aarch64_sve_addpl_factor_p. | |
5000 | (aarch64_addsvl_addspl_immediate_p): New function. | |
5001 | (aarch64_output_addsvl_addspl): Likewise. | |
5002 | (aarch64_cannot_force_const_mem): Return true for RDSVL immediates. | |
5003 | (aarch64_classify_index): Handle .Q scaling for VNx1TImode. | |
5004 | (aarch64_classify_address): Likewise for vnum offsets. | |
5005 | (aarch64_output_sme_zero_za): New function. | |
5006 | (aarch64_sme_ldr_vnum_offset_p): Likewise. | |
5007 | * config/aarch64/predicates.md (aarch64_addsvl_addspl_immediate): | |
5008 | New predicate. | |
5009 | (aarch64_pluslong_operand): Include it for SME. | |
5010 | * config/aarch64/constraints.md (Ucj, Uav): New constraints. | |
5011 | * config/aarch64/iterators.md (VNx1TI_ONLY): New mode iterator. | |
5012 | (SME_ZA_I, SME_ZA_SDI, SME_ZA_SDF_I, SME_MOP_BHI): Likewise. | |
5013 | (SME_MOP_HSDF): Likewise. | |
5014 | (UNSPEC_SME_ADDHA, UNSPEC_SME_ADDVA, UNSPEC_SME_FMOPA) | |
5015 | (UNSPEC_SME_FMOPS, UNSPEC_SME_LD1_HOR, UNSPEC_SME_LD1_VER) | |
5016 | (UNSPEC_SME_READ_HOR, UNSPEC_SME_READ_VER, UNSPEC_SME_SMOPA) | |
5017 | (UNSPEC_SME_SMOPS, UNSPEC_SME_ST1_HOR, UNSPEC_SME_ST1_VER) | |
5018 | (UNSPEC_SME_SUMOPA, UNSPEC_SME_SUMOPS, UNSPEC_SME_UMOPA) | |
5019 | (UNSPEC_SME_UMOPS, UNSPEC_SME_USMOPA, UNSPEC_SME_USMOPS) | |
5020 | (UNSPEC_SME_WRITE_HOR, UNSPEC_SME_WRITE_VER): New unspecs. | |
5021 | (elem_bits): Handle x2 and x4 structure modes, plus VNx1TI. | |
5022 | (Vetype, Vesize, VPRED): Handle VNx1TI. | |
5023 | (b): New mode attribute. | |
5024 | (SME_LD1, SME_READ, SME_ST1, SME_WRITE, SME_BINARY_SDI, SME_INT_MOP) | |
5025 | (SME_FP_MOP): New int iterators. | |
5026 | (optab): Handle SME unspecs. | |
5027 | (hv): New int attribute. | |
5028 | * config/aarch64/aarch64.md (*add<mode>3_aarch64): Handle ADDSVL | |
5029 | and ADDSPL. | |
5030 | * config/aarch64/aarch64-sme.md (UNSPEC_SME_LDR): New unspec. | |
5031 | (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus) | |
5032 | (aarch64_sme_ldr0, @aarch64_sme_ldrn<mode>): New patterns. | |
5033 | (UNSPEC_SME_STR): New unspec. | |
5034 | (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus) | |
5035 | (aarch64_sme_str0, @aarch64_sme_strn<mode>): New patterns. | |
5036 | (@aarch64_sme_<optab><v_int_container><mode>): Likewise. | |
5037 | (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise. | |
5038 | (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise. | |
5039 | (@aarch64_sme_<optab><v_int_container><mode>): Likewise. | |
5040 | (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise. | |
5041 | (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise. | |
5042 | (UNSPEC_SME_ZERO): New unspec. | |
5043 | (aarch64_sme_zero): New pattern. | |
5044 | (@aarch64_sme_<SME_BINARY_SDI:optab><mode>): Likewise. | |
5045 | (@aarch64_sme_<SME_INT_MOP:optab><mode>): Likewise. | |
5046 | (@aarch64_sme_<SME_FP_MOP:optab><mode>): Likewise. | |
5047 | * config/aarch64/aarch64-sve-builtins.def: Add ZA type suffixes. | |
5048 | Include aarch64-sve-builtins-sme.def. | |
5049 | (DEF_SME_ZA_FUNCTION): New macro. | |
5050 | * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZA): New call | |
5051 | property. | |
5052 | (CP_WRITE_ZA): Likewise. | |
5053 | (PRED_za_m): New predication type. | |
5054 | (type_suffix_index): Handle DEF_SME_ZA_SUFFIX. | |
5055 | (type_suffix_info): Add vector_p and za_p fields. | |
5056 | (function_instance::num_za_tiles): New member function. | |
5057 | (function_builder::get_attributes): Add an aarch64_feature_flags | |
5058 | argument. | |
5059 | (function_expander::get_contiguous_base): Take a base argument | |
5060 | number, a vnum argument number, and an argument that indicates | |
5061 | whether the vnum parameter is a factor of the SME vector length | |
5062 | or the prevailing vector length. | |
5063 | (function_expander::add_integer_operand): Take a poly_int64. | |
5064 | (sve_switcher::sve_switcher): Take a base set of flags. | |
5065 | (sme_switcher): New class. | |
5066 | (scalar_types): Add a null entry for NUM_VECTOR_TYPES. | |
5067 | * config/aarch64/aarch64-sve-builtins.cc: Include | |
5068 | aarch64-sve-builtins-sme.h. | |
5069 | (pred_suffixes): Add an entry for PRED_za_m. | |
5070 | (type_suffixes): Initialize vector_p and za_p. Handle ZA suffixes. | |
5071 | (TYPES_all_za, TYPES_d_za, TYPES_za_bhsd_data, TYPES_za_all_data) | |
5072 | (TYPES_za_s_integer, TYPES_za_d_integer, TYPES_mop_base) | |
5073 | (TYPES_mop_base_signed, TYPES_mop_base_unsigned, TYPES_mop_i16i64) | |
5074 | (TYPES_mop_i16i64_signed, TYPES_mop_i16i64_unsigned, TYPES_za): New | |
5075 | type suffix macros. | |
5076 | (preds_m, preds_za_m): New predication lists. | |
5077 | (function_groups): Handle DEF_SME_ZA_FUNCTION. | |
5078 | (scalar_types): Add an entry for NUM_VECTOR_TYPES. | |
5079 | (find_type_suffix_for_scalar_type): Check positively for vectors | |
5080 | rather than negatively for predicates. | |
5081 | (check_required_extensions): Handle PSTATE.SM and PSTATE.ZA | |
5082 | requirements. | |
5083 | (report_out_of_range): Handle the case where the minimum and | |
5084 | maximum are the same. | |
5085 | (function_instance::reads_global_state_p): Return true for functions | |
5086 | that read ZA. | |
5087 | (function_instance::modifies_global_state_p): Return true for functions | |
5088 | that write to ZA. | |
5089 | (sve_switcher::sve_switcher): Add a base flags argument. | |
5090 | (function_builder::get_name): Handle "__arm_" prefixes. | |
5091 | (add_attribute): Add an overload that takes a namespaces. | |
5092 | (add_shared_state_attribute): New function. | |
5093 | (function_builder::get_attributes): Take the required feature flags | |
5094 | as argument. Add streaming and ZA attributes where appropriate. | |
5095 | (function_builder::add_unique_function): Update calls accordingly. | |
5096 | (function_resolver::check_gp_argument): Assert that the predication | |
5097 | isn't ZA _m predication. | |
5098 | (function_checker::function_checker): Don't bias the argument | |
5099 | number for ZA _m predication. | |
5100 | (function_expander::get_contiguous_base): Add arguments that | |
5101 | specify the base argument number, the vnum argument number, | |
5102 | and an argument that indicates whether the vnum parameter is | |
5103 | a factor of the SME vector length or the prevailing vector length. | |
5104 | Handle the SME case. | |
5105 | (function_expander::add_input_operand): Handle pmode_register_operand. | |
5106 | (function_expander::add_integer_operand): Take a poly_int64. | |
5107 | (init_builtins): Call handle_arm_sme_h for LTO. | |
5108 | (handle_arm_sve_h): Skip SME intrinsics. | |
5109 | (handle_arm_sme_h): New function. | |
5110 | * config/aarch64/aarch64-sve-builtins-functions.h | |
5111 | (read_write_za, write_za): New classes. | |
5112 | (unspec_based_sme_function, za_arith_function): New using aliases. | |
5113 | (quiet_za_arith_function): Likewise. | |
5114 | * config/aarch64/aarch64-sve-builtins-shapes.h | |
5115 | (binary_za_int_m, binary_za_m, binary_za_uint_m, bool_inherent) | |
5116 | (inherent_za, inherent_mask_za, ldr_za, load_za, read_za_m, store_za) | |
5117 | (str_za, unary_za_m, write_za_m): Declare. | |
5118 | * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication): | |
5119 | Expect za_m functions to have an existing governing predicate. | |
5120 | (binary_za_m_base, binary_za_int_m_def, binary_za_m_def): New classes. | |
5121 | (binary_za_uint_m_def, bool_inherent_def, inherent_za_def): Likewise. | |
5122 | (inherent_mask_za_def, ldr_za_def, load_za_def, read_za_m_def) | |
5123 | (store_za_def, str_za_def, unary_za_m_def, write_za_m_def): Likewise. | |
5124 | * config/aarch64/arm_sme.h: New file. | |
5125 | * config/aarch64/aarch64-sve-builtins-sme.h: Likewise. | |
5126 | * config/aarch64/aarch64-sve-builtins-sme.cc: Likewise. | |
5127 | * config/aarch64/aarch64-sve-builtins-sme.def: Likewise. | |
5128 | * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on | |
5129 | aarch64-sve-builtins-sme.def and aarch64-sve-builtins-sme.h. | |
5130 | (aarch64-sve-builtins-sme.o): New rule. | |
5131 | ||
5132 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5133 | ||
5134 | * config/aarch64/aarch64-sve-builtins.h | |
5135 | (function_shape::has_merge_argument_p): New member function. | |
5136 | * config/aarch64/aarch64-sve-builtins.cc: | |
5137 | (function_resolver::check_gp_argument): Use it. | |
5138 | (function_expander::get_fallback_value): Likewise. | |
5139 | * config/aarch64/aarch64-sve-builtins-shapes.cc | |
5140 | (apply_predication): Likewise. | |
5141 | (unary_convert_narrowt_def::has_merge_argument_p): New function. | |
5142 | ||
5143 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5144 | ||
5145 | * config/aarch64/aarch64-sve-builtins-functions.h | |
5146 | (unspec_based_function_base): Allow type suffix 1 to determine | |
5147 | the mode of the operation. | |
5148 | (unspec_based_function): Update accordingly. | |
5149 | (unspec_based_fused_function): Likewise. | |
5150 | (unspec_based_fused_lane_function): Likewise. | |
5151 | ||
5152 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5153 | ||
5154 | * config/aarch64/aarch64-modes.def: Add VNx1TI. | |
5155 | ||
5156 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5157 | ||
5158 | * config/aarch64/aarch64.h (W12_W15_REGNUM_P): New macro. | |
5159 | (W12_W15_REGS): New register class. | |
5160 | (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add entries for it. | |
5161 | * config/aarch64/aarch64.cc (aarch64_regno_regclass) | |
5162 | (aarch64_class_max_nregs, aarch64_register_move_cost): Handle | |
5163 | W12_W15_REGS. | |
5164 | ||
5165 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5166 | ||
5167 | * config/aarch64/aarch64-isa-modes.def (ZA_ON): New ISA mode. | |
5168 | * config/aarch64/aarch64-protos.h (aarch64_rdsvl_immediate_p) | |
5169 | (aarch64_output_rdsvl, aarch64_optimize_mode_switching) | |
5170 | (aarch64_restore_za): Declare. | |
5171 | * config/aarch64/constraints.md (UsR): New constraint. | |
5172 | * config/aarch64/aarch64.md (LOWERING_REGNUM, TPIDR_BLOCK_REGNUM) | |
5173 | (SME_STATE_REGNUM, TPIDR2_SETUP_REGNUM, ZA_FREE_REGNUM) | |
5174 | (ZA_SAVED_REGNUM, ZA_REGNUM, FIRST_FAKE_REGNUM): New constants. | |
5175 | (LAST_FAKE_REGNUM): Likewise. | |
5176 | (UNSPEC_SAVE_NZCV, UNSPEC_RESTORE_NZCV, UNSPEC_SME_VQ): New unspecs. | |
5177 | (arches): Add sme. | |
5178 | (arch_enabled): Handle it. | |
5179 | (*cb<optab><mode>1): Rename to... | |
5180 | (aarch64_cb<optab><mode>1): ...this. | |
5181 | (*movsi_aarch64): Add an alternative for RDSVL. | |
5182 | (*movdi_aarch64): Likewise. | |
5183 | (aarch64_save_nzcv, aarch64_restore_nzcv): New insns. | |
5184 | * config/aarch64/aarch64-sme.md (UNSPEC_SMSTOP_ZA) | |
5185 | (UNSPEC_INITIAL_ZERO_ZA, UNSPEC_TPIDR2_SAVE, UNSPEC_TPIDR2_RESTORE) | |
5186 | (UNSPEC_READ_TPIDR2, UNSPEC_WRITE_TPIDR2, UNSPEC_SETUP_LOCAL_TPIDR2) | |
5187 | (UNSPEC_RESTORE_ZA, UNSPEC_START_PRIVATE_ZA_CALL): New unspecs. | |
5188 | (UNSPEC_END_PRIVATE_ZA_CALL, UNSPEC_COMMIT_LAZY_SAVE): Likewise. | |
5189 | (UNSPECV_ASM_UPDATE_ZA): New unspecv. | |
5190 | (aarch64_tpidr2_save, aarch64_smstart_za, aarch64_smstop_za) | |
5191 | (aarch64_initial_zero_za, aarch64_setup_local_tpidr2) | |
5192 | (aarch64_clear_tpidr2, aarch64_write_tpidr2, aarch64_read_tpidr2) | |
5193 | (aarch64_tpidr2_restore, aarch64_restore_za, aarch64_asm_update_za) | |
5194 | (aarch64_start_private_za_call, aarch64_end_private_za_call) | |
5195 | (aarch64_commit_lazy_save): New patterns. | |
5196 | * config/aarch64/aarch64.h (AARCH64_ISA_ZA_ON, TARGET_ZA): New macros. | |
5197 | (FIXED_REGISTERS, REGISTER_NAMES): Add the new fake ZA registers. | |
5198 | (CALL_USED_REGISTERS): Replace with... | |
5199 | (CALL_REALLY_USED_REGISTERS): ...this and add the fake ZA registers. | |
5200 | (FIRST_PSEUDO_REGISTER): Bump to include the fake ZA registers. | |
5201 | (FAKE_REGS): New register class. | |
5202 | (REG_CLASS_NAMES): Update accordingly. | |
5203 | (REG_CLASS_CONTENTS): Likewise. | |
5204 | (machine_function::tpidr2_block): New member variable. | |
5205 | (machine_function::tpidr2_block_ptr): Likewise. | |
5206 | (machine_function::za_save_buffer): Likewise. | |
5207 | (machine_function::next_asm_update_za_id): Likewise. | |
5208 | (CUMULATIVE_ARGS::shared_za_flags): Likewise. | |
5209 | (aarch64_mode_entity, aarch64_local_sme_state): New enums. | |
5210 | (aarch64_tristate_mode): Likewise. | |
5211 | (OPTIMIZE_MODE_SWITCHING, NUM_MODES_FOR_MODE_SWITCHING): Define. | |
5212 | * config/aarch64/aarch64.cc (AARCH64_STATE_SHARED, AARCH64_STATE_IN) | |
5213 | (AARCH64_STATE_OUT): New constants. | |
5214 | (aarch64_attribute_shared_state_flags): New function. | |
5215 | (aarch64_lookup_shared_state_flags, aarch64_fndecl_has_new_state) | |
5216 | (aarch64_check_state_string, cmp_string_csts): Likewise. | |
5217 | (aarch64_merge_string_arguments, aarch64_check_arm_new_against_type) | |
5218 | (handle_arm_new, handle_arm_shared): Likewise. | |
5219 | (handle_arm_new_za_attribute): New | |
5220 | (aarch64_arm_attribute_table): Add new, preserves, in, out, and inout. | |
5221 | (aarch64_hard_regno_nregs): Handle FAKE_REGS. | |
5222 | (aarch64_hard_regno_mode_ok): Likewise. | |
5223 | (aarch64_fntype_shared_flags, aarch64_fntype_pstate_za): New functions. | |
5224 | (aarch64_fntype_isa_mode): Include aarch64_fntype_pstate_za. | |
5225 | (aarch64_fndecl_has_state, aarch64_fndecl_pstate_za): New functions. | |
5226 | (aarch64_fndecl_isa_mode): Include aarch64_fndecl_pstate_za. | |
5227 | (aarch64_cfun_incoming_pstate_za, aarch64_cfun_shared_flags) | |
5228 | (aarch64_cfun_has_new_state, aarch64_cfun_has_state): New functions. | |
5229 | (aarch64_sme_vq_immediate, aarch64_sme_vq_unspec_p): Likewise. | |
5230 | (aarch64_rdsvl_immediate_p, aarch64_output_rdsvl): Likewise. | |
5231 | (aarch64_expand_mov_immediate): Handle RDSVL immediates. | |
5232 | (aarch64_function_arg): Add the ZA sharing flags as a third limb | |
5233 | of the PARALLEL. | |
5234 | (aarch64_init_cumulative_args): Record the ZA sharing flags. | |
5235 | (aarch64_extra_live_on_entry): New function. Handle the new | |
5236 | ZA-related fake registers. | |
5237 | (aarch64_epilogue_uses): Handle the new ZA-related fake registers. | |
5238 | (aarch64_cannot_force_const_mem): Handle UNSPEC_SME_VQ constants. | |
5239 | (aarch64_get_tpidr2_block, aarch64_get_tpidr2_ptr): New functions. | |
5240 | (aarch64_init_tpidr2_block, aarch64_restore_za): Likewise. | |
5241 | (aarch64_layout_frame): Check whether the current function creates | |
5242 | new ZA state. Record that it clobbers LR if so. | |
5243 | (aarch64_expand_prologue): Handle functions that create new ZA state. | |
5244 | (aarch64_expand_epilogue): Likewise. | |
5245 | (aarch64_create_tpidr2_block): New function. | |
5246 | (aarch64_restore_za): Likewise. | |
5247 | (aarch64_start_call_args): Disallow calls to shared-ZA functions | |
5248 | from functions that have no ZA state. Emit a marker instruction | |
5249 | before calls to private-ZA functions from functions that have | |
5250 | SME state. | |
5251 | (aarch64_expand_call): Add return registers for state that is | |
5252 | managed via attributes. Record the use and clobber information | |
5253 | for the ZA registers. | |
5254 | (aarch64_end_call_args): New function. | |
5255 | (aarch64_regno_regclass): Handle FAKE_REGS. | |
5256 | (aarch64_class_max_nregs): Likewise. | |
5257 | (aarch64_override_options_internal): Require TARGET_SME for | |
5258 | functions that have ZA state. | |
5259 | (aarch64_conditional_register_usage): Handle FAKE_REGS. | |
5260 | (aarch64_mov_operand_p): Handle RDSVL immediates. | |
5261 | (aarch64_comp_type_attributes): Check that the ZA sharing flags | |
5262 | are equal. | |
5263 | (aarch64_merge_decl_attributes): New function. | |
5264 | (aarch64_optimize_mode_switching, aarch64_mode_emit_za_save_buffer) | |
5265 | (aarch64_mode_emit_local_sme_state, aarch64_mode_emit): Likewise. | |
5266 | (aarch64_insn_references_sme_state_p): Likewise. | |
5267 | (aarch64_mode_needed_local_sme_state): Likewise. | |
5268 | (aarch64_mode_needed_za_save_buffer, aarch64_mode_needed): Likewise. | |
5269 | (aarch64_mode_after_local_sme_state, aarch64_mode_after): Likewise. | |
5270 | (aarch64_local_sme_confluence, aarch64_mode_confluence): Likewise. | |
5271 | (aarch64_one_shot_backprop, aarch64_local_sme_backprop): Likewise. | |
5272 | (aarch64_mode_backprop, aarch64_mode_entry): Likewise. | |
5273 | (aarch64_mode_exit, aarch64_mode_eh_handler): Likewise. | |
5274 | (aarch64_mode_priority, aarch64_md_asm_adjust): Likewise. | |
5275 | (TARGET_END_CALL_ARGS, TARGET_MERGE_DECL_ATTRIBUTES): Define. | |
5276 | (TARGET_MODE_EMIT, TARGET_MODE_NEEDED, TARGET_MODE_AFTER): Likewise. | |
5277 | (TARGET_MODE_CONFLUENCE, TARGET_MODE_BACKPROP): Likewise. | |
5278 | (TARGET_MODE_ENTRY, TARGET_MODE_EXIT): Likewise. | |
5279 | (TARGET_MODE_EH_HANDLER, TARGET_MODE_PRIORITY): Likewise. | |
5280 | (TARGET_EXTRA_LIVE_ON_ENTRY): Likewise. | |
5281 | (TARGET_MD_ASM_ADJUST): Use aarch64_md_asm_adjust. | |
5282 | * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros): | |
5283 | Define __arm_new, __arm_preserves,__arm_in, __arm_out, and __arm_inout. | |
5284 | ||
5285 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5286 | ||
5287 | * config/aarch64/aarch64-passes.def | |
5288 | (pass_late_thread_prologue_and_epilogue): New pass. | |
5289 | * config/aarch64/aarch64-sme.md: New file. | |
5290 | * config/aarch64/aarch64.md: Include it. | |
5291 | (*tb<optab><mode>1): Rename to... | |
5292 | (@aarch64_tb<optab><mode>): ...this. | |
5293 | (call, call_value, sibcall, sibcall_value): Don't require operand 2 | |
5294 | to be a CONST_INT. | |
5295 | * config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Return | |
5296 | the insn. | |
5297 | (make_pass_switch_sm_state): Declare. | |
5298 | * config/aarch64/aarch64.h (TARGET_STREAMING_COMPATIBLE): New macro. | |
5299 | (CALL_USED_REGISTER): Mark VG as call-preserved. | |
5300 | (aarch64_frame::old_svcr_offset): New member variable. | |
5301 | (machine_function::call_switches_sm_state): Likewise. | |
5302 | (CUMULATIVE_ARGS::num_sme_mode_switch_args): Likewise. | |
5303 | (CUMULATIVE_ARGS::sme_mode_switch_args): Likewise. | |
5304 | * config/aarch64/aarch64.cc: Include tree-pass.h and cfgbuild.h. | |
5305 | (aarch64_cfun_incoming_pstate_sm): New function. | |
5306 | (aarch64_call_switches_pstate_sm): Likewise. | |
5307 | (aarch64_reg_save_mode): Return DImode for VG_REGNUM. | |
5308 | (aarch64_callee_isa_mode): New function. | |
5309 | (aarch64_insn_callee_isa_mode): Likewise. | |
5310 | (aarch64_guard_switch_pstate_sm): Likewise. | |
5311 | (aarch64_switch_pstate_sm): Likewise. | |
5312 | (aarch64_sme_mode_switch_regs): New class. | |
5313 | (aarch64_record_sme_mode_switch_args): New function. | |
5314 | (aarch64_finish_sme_mode_switch_args): Likewise. | |
5315 | (aarch64_function_arg): Handle the end marker by returning a | |
5316 | PARALLEL that contains the ABI cookie that we used previously | |
5317 | alongside the result of aarch64_finish_sme_mode_switch_args. | |
5318 | (aarch64_init_cumulative_args): Initialize num_sme_mode_switch_args. | |
5319 | (aarch64_function_arg_advance): If a call would switch SM state, | |
5320 | record all argument registers that would need to be saved around | |
5321 | the mode switch. | |
5322 | (aarch64_need_old_pstate_sm): New function. | |
5323 | (aarch64_layout_frame): Decide whether the frame needs to store the | |
5324 | incoming value of PSTATE.SM and allocate a save slot for it if so. | |
5325 | If a function switches SME state, arrange to save the old value | |
5326 | of the DWARF VG register. Handle the case where this is the only | |
5327 | register save slot above the FP. | |
5328 | (aarch64_save_callee_saves): Handles saves of the DWARF VG register. | |
5329 | (aarch64_get_separate_components): Prevent such saves from being | |
5330 | shrink-wrapped. | |
5331 | (aarch64_old_svcr_mem): New function. | |
5332 | (aarch64_read_old_svcr): Likewise. | |
5333 | (aarch64_guard_switch_pstate_sm): Likewise. | |
5334 | (aarch64_expand_prologue): Handle saves of the DWARF VG register. | |
5335 | Initialize any SVCR save slot. | |
5336 | (aarch64_expand_call): Allow the cookie to be PARALLEL that contains | |
5337 | both the UNSPEC_CALLEE_ABI value and a list of registers that need | |
5338 | to be preserved across a change to PSTATE.SM. If the call does | |
5339 | involve such a change to PSTATE.SM, record the registers that | |
5340 | would be clobbered by this process. Also emit an instruction | |
5341 | to mark the temporary change in VG. Update call_switches_pstate_sm. | |
5342 | (aarch64_emit_call_insn): Return the emitted instruction. | |
5343 | (aarch64_frame_pointer_required): New function. | |
5344 | (aarch64_conditional_register_usage): Prevent VG_REGNUM from being | |
5345 | treated as a register operand. | |
5346 | (aarch64_switch_pstate_sm_for_call): New function. | |
5347 | (pass_data_switch_pstate_sm): New pass variable. | |
5348 | (pass_switch_pstate_sm): New pass class. | |
5349 | (make_pass_switch_pstate_sm): New function. | |
5350 | (TARGET_FRAME_POINTER_REQUIRED): Define. | |
5351 | * config/aarch64/t-aarch64 (s-check-sve-md): Add aarch64-sme.md. | |
5352 | ||
5353 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5354 | ||
5355 | * config/aarch64/aarch64.h (TARGET_NON_STREAMING): New macro. | |
5356 | (TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Use it. | |
5357 | (TARGET_SVE2_SHA3, TARGET_SVE2_SM4): Likewise. | |
5358 | * config/aarch64/aarch64-sve-builtins-base.def: Separate out | |
5359 | the functions that require PSTATE.SM to be 0 and guard them | |
5360 | with AARCH64_FL_SM_OFF. | |
5361 | * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise. | |
5362 | * config/aarch64/aarch64-sve-builtins.cc (check_required_extensions): | |
5363 | Enforce AARCH64_FL_SM_OFF requirements. | |
5364 | * config/aarch64/aarch64-sve.md (aarch64_wrffr): Require | |
5365 | TARGET_NON_STREAMING | |
5366 | (aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest): Likewise. | |
5367 | (*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc) | |
5368 | (@aarch64_ld<fn>f1<mode>): Likewise. | |
5369 | (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>) | |
5370 | (gather_load<mode><v_int_container>): Likewise | |
5371 | (mask_gather_load<mode><v_int_container>): Likewise. | |
5372 | (mask_gather_load<mode><v_int_container>): Likewise. | |
5373 | (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. | |
5374 | (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. | |
5375 | (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. | |
5376 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>) | |
5377 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
5378 | <SVE_2BHSI:mode>): Likewise. | |
5379 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
5380 | <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked) | |
5381 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
5382 | <SVE_2BHSI:mode>_sxtw): Likewise. | |
5383 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
5384 | <SVE_2BHSI:mode>_uxtw): Likewise. | |
5385 | (@aarch64_ldff1_gather<mode>, @aarch64_ldff1_gather<mode>): Likewise. | |
5386 | (*aarch64_ldff1_gather<mode>_sxtw): Likewise. | |
5387 | (*aarch64_ldff1_gather<mode>_uxtw): Likewise. | |
5388 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> | |
5389 | <VNx4_NARROW:mode>): Likewise. | |
5390 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
5391 | <VNx2_NARROW:mode>): Likewise. | |
5392 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
5393 | <VNx2_NARROW:mode>_sxtw): Likewise. | |
5394 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
5395 | <VNx2_NARROW:mode>_uxtw): Likewise. | |
5396 | (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx4SI_ONLY:mode>) | |
5397 | (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>) | |
5398 | (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_sxtw) | |
5399 | (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_uxtw) | |
5400 | (scatter_store<mode><v_int_container>): Likewise. | |
5401 | (mask_scatter_store<mode><v_int_container>): Likewise. | |
5402 | (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked) | |
5403 | (*mask_scatter_store<mode><v_int_container>_sxtw): Likewise. | |
5404 | (*mask_scatter_store<mode><v_int_container>_uxtw): Likewise. | |
5405 | (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>) | |
5406 | (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>) | |
5407 | (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw) | |
5408 | (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw) | |
5409 | (@aarch64_sve_ld1ro<mode>, @aarch64_adr<mode>): Likewise. | |
5410 | (*aarch64_adr_sxtw, *aarch64_adr_uxtw_unspec): Likewise. | |
5411 | (*aarch64_adr_uxtw_and, @aarch64_adr<mode>_shift): Likewise. | |
5412 | (*aarch64_adr<mode>_shift, *aarch64_adr_shift_sxtw): Likewise. | |
5413 | (*aarch64_adr_shift_uxtw, @aarch64_sve_add_<optab><vsi2qi>): Likewise. | |
5414 | (@aarch64_sve_<sve_fp_op><mode>, fold_left_plus_<mode>): Likewise. | |
5415 | (mask_fold_left_plus_<mode>, @aarch64_sve_compact<mode>): Likewise. | |
5416 | * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>) | |
5417 | (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> | |
5418 | <SVE_PARTIAL_I:mode>): Likewise. | |
5419 | (@aarch64_sve2_histcnt<mode>, @aarch64_sve2_histseg<mode>): Likewise. | |
5420 | (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise. | |
5421 | (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise. | |
5422 | (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise. | |
5423 | * config/aarch64/iterators.md (SVE_FP_UNARY_INT): Make FEXPA | |
5424 | depend on TARGET_NON_STREAMING. | |
5425 | (SVE_BFLOAT_TERNARY_LONG): Likewise BFMMLA. | |
5426 | ||
5427 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5428 | ||
5429 | * config/aarch64/aarch64.h (TARGET_BASE_SIMD): New macro. | |
5430 | (TARGET_SIMD): Require PSTATE.SM to be 0. | |
5431 | (AARCH64_ISA_SM_OFF): New macro. | |
5432 | * config/aarch64/aarch64.cc (aarch64_array_mode_supported_p): | |
5433 | Allow Advanced SIMD structure modes for TARGET_BASE_SIMD. | |
5434 | (aarch64_print_operand): Support '%Z'. | |
5435 | (aarch64_secondary_reload): Expect SVE moves to be used for | |
5436 | Advanced SIMD modes if SVE is enabled and non-streaming | |
5437 | Advanced SIMD isn't. | |
5438 | (aarch64_register_move_cost): Likewise. | |
5439 | (aarch64_simd_container_mode): Extend Advanced SIMD mode | |
5440 | handling to TARGET_BASE_SIMD. | |
5441 | (aarch64_expand_cpymem): Expand commentary. | |
5442 | * config/aarch64/aarch64.md (arches): Add base_simd and nobase_simd. | |
5443 | (arch_enabled): Handle it. | |
5444 | (*mov<mode>_aarch64): Extend UMOV alternative to TARGET_BASE_SIMD. | |
5445 | (*movti_aarch64): Use an SVE move instruction if non-streaming | |
5446 | SIMD isn't available. | |
5447 | (*mov<TFD:mode>_aarch64): Likewise. | |
5448 | (load_pair_dw_tftf): Extend to TARGET_BASE_SIMD. | |
5449 | (store_pair_dw_tftf): Likewise. | |
5450 | (loadwb_pair<TX:mode>_<P:mode>): Likewise. | |
5451 | (storewb_pair<TX:mode>_<P:mode>): Likewise. | |
5452 | * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): | |
5453 | Allow UMOV in streaming mode. | |
5454 | (*aarch64_simd_mov<VQMOV:mode>): Use an SVE move instruction | |
5455 | if non-streaming SIMD isn't available. | |
5456 | (aarch64_store_lane0<mode>): Depend on TARGET_FLOAT rather than | |
5457 | TARGET_SIMD. | |
5458 | (aarch64_simd_mov_from_<mode>low): Likewise. Use fmov if | |
5459 | Advanced SIMD is completely disabled. | |
5460 | (aarch64_simd_mov_from_<mode>high): Use SVE EXT instructions if | |
5461 | non-streaming SIMD isn't available. | |
5462 | ||
5463 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5464 | ||
5465 | * doc/invoke.texi: Document SME. | |
5466 | * doc/sourcebuild.texi: Document aarch64_sve. | |
5467 | * config/aarch64/aarch64-option-extensions.def (sme): Define. | |
5468 | * config/aarch64/aarch64.h (AARCH64_ISA_SME): New macro. | |
5469 | (TARGET_SME): Likewise. | |
5470 | * config/aarch64/aarch64.cc (aarch64_override_options_internal): | |
5471 | Ensure that SME is present when compiling streaming code. | |
5472 | ||
5473 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5474 | ||
5475 | * config/aarch64/aarch64-isa-modes.def: New file. | |
5476 | * config/aarch64/aarch64.h: Include it in the feature enumerations. | |
5477 | (AARCH64_FL_SM_STATE, AARCH64_FL_ISA_MODES): New constants. | |
5478 | (AARCH64_FL_DEFAULT_ISA_MODE): Likewise. | |
5479 | (AARCH64_ISA_MODE): New macro. | |
5480 | (CUMULATIVE_ARGS): Add an isa_mode field. | |
5481 | * config/aarch64/aarch64-protos.h (aarch64_gen_callee_cookie): Declare. | |
5482 | (aarch64_tlsdesc_abi_id): Return an arm_pcs. | |
5483 | * config/aarch64/aarch64.cc (attr_streaming_exclusions) | |
5484 | (aarch64_gnu_attributes, aarch64_gnu_attribute_table) | |
5485 | (aarch64_arm_attributes, aarch64_arm_attribute_table): New tables. | |
5486 | (aarch64_attribute_table): Redefine to include the gnu and arm | |
5487 | attributes. | |
5488 | (aarch64_fntype_pstate_sm, aarch64_fntype_isa_mode): New functions. | |
5489 | (aarch64_fndecl_pstate_sm, aarch64_fndecl_isa_mode): Likewise. | |
5490 | (aarch64_gen_callee_cookie, aarch64_callee_abi): Likewise. | |
5491 | (aarch64_insn_callee_cookie, aarch64_insn_callee_abi): Use them. | |
5492 | (aarch64_function_arg, aarch64_output_mi_thunk): Likewise. | |
5493 | (aarch64_init_cumulative_args): Initialize the isa_mode field. | |
5494 | (aarch64_output_mi_thunk): Use aarch64_gen_callee_cookie to get | |
5495 | the ABI cookie. | |
5496 | (aarch64_override_options): Add the ISA mode to the feature set. | |
5497 | (aarch64_temporary_target::copy_from_fndecl): Likewise. | |
5498 | (aarch64_fndecl_options, aarch64_handle_attr_arch): Likewise. | |
5499 | (aarch64_set_current_function): Maintain the correct ISA mode. | |
5500 | (aarch64_tlsdesc_abi_id): Return an arm_pcs. | |
5501 | (aarch64_comp_type_attributes): Handle arm::streaming and | |
5502 | arm::streaming_compatible. | |
5503 | * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros): | |
5504 | Define __arm_streaming and __arm_streaming_compatible. | |
5505 | * config/aarch64/aarch64.md (tlsdesc_small_<mode>): Use | |
5506 | aarch64_gen_callee_cookie to get the ABI cookie. | |
5507 | * config/aarch64/t-aarch64 (TM_H): Add all feature-related .def files. | |
5508 | ||
5509 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5510 | ||
5511 | * config/aarch64/aarch64-sve-builtins-base.cc | |
5512 | (svreinterpret_impl::fold): Punt on tuple forms. | |
5513 | (svreinterpret_impl::expand): Use tuple_mode instead of vector_mode. | |
5514 | * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret): | |
5515 | Extend to x1234 groups. | |
5516 | * config/aarch64/aarch64-sve-builtins-functions.h | |
5517 | (multi_vector_function::vectors_per_tuple): If the function has | |
5518 | a group suffix, get the number of vectors from there. | |
5519 | * config/aarch64/aarch64-sve-builtins-shapes.h (reinterpret): Declare. | |
5520 | * config/aarch64/aarch64-sve-builtins-shapes.cc (reinterpret_def) | |
5521 | (reinterpret): New function shape. | |
5522 | * config/aarch64/aarch64-sve-builtins.cc (function_groups): Handle | |
5523 | DEF_SVE_FUNCTION_GS. | |
5524 | * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_FUNCTION_GS): New | |
5525 | macro. | |
5526 | (DEF_SVE_FUNCTION): Forward to DEF_SVE_FUNCTION_GS by default. | |
5527 | * config/aarch64/aarch64-sve-builtins.h | |
5528 | (function_instance::tuple_mode): New member function. | |
5529 | (function_base::vectors_per_tuple): Take the function instance | |
5530 | as argument and get the number from the group suffix. | |
5531 | (function_instance::vectors_per_tuple): Update accordingly. | |
5532 | * config/aarch64/iterators.md (SVE_FULLx2, SVE_FULLx3, SVE_FULLx4) | |
5533 | (SVE_ALL_STRUCT): New mode iterators. | |
5534 | (SVE_STRUCT): Redefine in terms of SVE_FULL*. | |
5535 | * config/aarch64/aarch64-sve.md (@aarch64_sve_reinterpret<mode>) | |
5536 | (*aarch64_sve_reinterpret<mode>): Extend to SVE structure modes. | |
5537 | ||
5538 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5539 | ||
5540 | * config/aarch64/aarch64-sve-builtins.cc | |
5541 | (function_resolver::require_derived_vector_type): Add a specific | |
5542 | error message for the case in which the caller wants a single | |
5543 | vector whose element type matches a previous tuyple argument. | |
5544 | ||
5545 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5546 | ||
5547 | * config/aarch64/aarch64-sve-builtins.h | |
5548 | (function_resolver::lookup_form): Add an overload that takes | |
5549 | an sve_type rather than type and group suffixes. | |
5550 | (function_resolver::resolve_to): Likewise. | |
5551 | (function_resolver::infer_vector_or_tuple_type): Return an sve_type. | |
5552 | (function_resolver::infer_tuple_type): Likewise. | |
5553 | (function_resolver::require_matching_vector_type): Take an sve_type | |
5554 | rather than a type_suffix_index. | |
5555 | (function_resolver::require_derived_vector_type): Likewise. | |
5556 | * config/aarch64/aarch64-sve-builtins.cc (num_vectors_to_group): | |
5557 | New function. | |
5558 | (function_resolver::lookup_form): Add an overload that takes | |
5559 | an sve_type rather than type and group suffixes. | |
5560 | (function_resolver::resolve_to): Likewise. | |
5561 | (function_resolver::infer_vector_or_tuple_type): Return an sve_type. | |
5562 | (function_resolver::infer_tuple_type): Likewise. | |
5563 | (function_resolver::infer_vector_type): Update accordingly. | |
5564 | (function_resolver::require_matching_vector_type): Take an sve_type | |
5565 | rather than a type_suffix_index. | |
5566 | (function_resolver::require_derived_vector_type): Likewise. | |
5567 | * config/aarch64/aarch64-sve-builtins-shapes.cc (get_def::resolve) | |
5568 | (set_def::resolve, store_def::resolve, tbl_tuple_def::resolve): Update | |
5569 | calls accordingly. | |
5570 | ||
5571 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5572 | ||
5573 | * config/aarch64/aarch64-sve-builtins.h | |
5574 | (function_resolver::require_matching_vector_type): Add a parameter | |
5575 | that specifies the number of the earlier argument that is being | |
5576 | matched against. | |
5577 | * config/aarch64/aarch64-sve-builtins.cc | |
5578 | (function_resolver::require_matching_vector_type): Likewise. | |
5579 | (require_derived_vector_type): Update calls accordingly. | |
5580 | (function_resolver::resolve_unary): Likewise. | |
5581 | (function_resolver::resolve_uniform): Likewise. | |
5582 | (function_resolver::resolve_uniform_opt_n): Likewise. | |
5583 | * config/aarch64/aarch64-sve-builtins-shapes.cc | |
5584 | (binary_long_lane_def::resolve): Likewise. | |
5585 | (clast_def::resolve, ternary_uint_def::resolve): Likewise. | |
5586 | ||
5587 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5588 | ||
5589 | * config/aarch64/aarch64-sve-builtins.h | |
5590 | (function_resolver::infer_sve_type): New member function. | |
5591 | (function_resolver::report_incorrect_num_vectors): Likewise. | |
5592 | * config/aarch64/aarch64-sve-builtins.cc | |
5593 | (function_resolver::infer_sve_type): New function,. | |
5594 | (function_resolver::report_incorrect_num_vectors): New function, | |
5595 | split out from... | |
5596 | (function_resolver::infer_vector_or_tuple_type): ...here. Use | |
5597 | infer_sve_type. | |
5598 | ||
5599 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5600 | ||
5601 | * config/aarch64/aarch64-sve-builtins.h (sve_type): New struct. | |
5602 | (sve_type::operator==): New function. | |
5603 | (function_resolver::get_vector_type): Delete. | |
5604 | (function_resolver::report_no_such_form): Take an sve_type rather | |
5605 | than a type_suffix_index. | |
5606 | * config/aarch64/aarch64-sve-builtins.cc (get_vector_type): New | |
5607 | function. | |
5608 | (function_resolver::get_vector_type): Delete. | |
5609 | (function_resolver::report_no_such_form): Take an sve_type rather | |
5610 | than a type_suffix_index. | |
5611 | (find_sve_type): New function, split out from... | |
5612 | (function_resolver::infer_vector_or_tuple_type): ...here. | |
5613 | ||
5614 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5615 | ||
5616 | * config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Take | |
5617 | a group suffix index parameter. | |
5618 | (build_32_64, build_all): Update accordingly. Iterate over all | |
5619 | group suffixes. | |
5620 | * config/aarch64/aarch64-sve-builtins-sve2.cc (svqrshl_impl::fold) | |
5621 | (svqshl_impl::fold, svrshl_impl::fold): Update function_instance | |
5622 | constructors. | |
5623 | * config/aarch64/aarch64-sve-builtins.cc (group_suffixes): New array. | |
5624 | (groups_none): New constant. | |
5625 | (function_groups): Initialize the groups field. | |
5626 | (function_instance::hash): Hash the group index. | |
5627 | (function_builder::get_name): Add the group suffix. | |
5628 | (function_builder::add_overloaded_functions): Iterate over all | |
5629 | group suffixes. | |
5630 | (function_resolver::lookup_form): Take a group suffix parameter. | |
5631 | (function_resolver::resolve_to): Likewise. | |
5632 | * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_GROUP_SUFFIX): New | |
5633 | macro. | |
5634 | (x2, x3, x4): New group suffixes. | |
5635 | * config/aarch64/aarch64-sve-builtins.h (group_suffix_index): New enum. | |
5636 | (group_suffix_info): New structure. | |
5637 | (function_group_info::groups): New member variable. | |
5638 | (function_instance::group_suffix_id): Likewise. | |
5639 | (group_suffixes): New array. | |
5640 | (function_instance::operator==): Compare the group suffixes. | |
5641 | (function_instance::group_suffix): New function. | |
5642 | ||
5643 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5644 | ||
5645 | * config/aarch64/aarch64-sve-builtins.cc (function_groups): Remove | |
5646 | implied requirement on SVE. | |
5647 | * config/aarch64/aarch64-sve-builtins-base.def: Explicitly require SVE. | |
5648 | * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise. | |
5649 | ||
5650 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5651 | ||
5652 | * config/aarch64/aarch64-protos.h (aarch64_sve_rdvl_immediate_p) | |
5653 | (aarch64_output_sve_rdvl): Declare. | |
5654 | * config/aarch64/aarch64.cc (aarch64_sve_cnt_factor_p): New | |
5655 | function, split out from... | |
5656 | (aarch64_sve_cnt_immediate_p): ...here. | |
5657 | (aarch64_sve_rdvl_factor_p): New function. | |
5658 | (aarch64_sve_rdvl_immediate_p): Likewise. | |
5659 | (aarch64_output_sve_rdvl): Likewise. | |
5660 | (aarch64_offset_temporaries): Rewrite the SVE handling to use RDVL | |
5661 | for some cases. | |
5662 | (aarch64_expand_mov_immediate): Handle RDVL immediates. | |
5663 | (aarch64_mov_operand_p): Likewise. | |
5664 | * config/aarch64/constraints.md (Usr): New constraint. | |
5665 | * config/aarch64/aarch64.md (*mov<SHORT:mode>_aarch64): Add an RDVL | |
5666 | alternative. | |
5667 | (*movsi_aarch64, *movdi_aarch64): Likewise. | |
5668 | ||
5669 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5670 | ||
5671 | * config/aarch64/aarch64-sve-builtins.h: | |
5672 | (function_checker::require_immediate_lane_index): Add an argument | |
5673 | for the index of the indexed vector argument. | |
5674 | * config/aarch64/aarch64-sve-builtins.cc | |
5675 | (function_checker::require_immediate_lane_index): Likewise. | |
5676 | * config/aarch64/aarch64-sve-builtins-shapes.cc | |
5677 | (ternary_bfloat_lane_base::check): Update accordingly. | |
5678 | (ternary_qq_lane_base::check): Likewise. | |
5679 | (binary_lane_def::check): Likewise. | |
5680 | (binary_long_lane_def::check): Likewise. | |
5681 | (ternary_lane_def::check): Likewise. | |
5682 | (ternary_lane_rotate_def::check): Likewise. | |
5683 | (ternary_long_lane_def::check): Likewise. | |
5684 | (ternary_qq_lane_rotate_def::check): Likewise. | |
5685 | ||
5686 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5687 | ||
5688 | * target.def (md_asm_adjust): Add a uses parameter. | |
5689 | * doc/tm.texi: Regenerate. | |
5690 | * cfgexpand.cc (expand_asm_loc): Update call to md_asm_adjust. | |
5691 | Handle any USEs created by the target. | |
5692 | (expand_asm_stmt): Likewise. | |
5693 | * recog.cc (asm_noperands): Handle asms with USEs. | |
5694 | (decode_asm_operands): Likewise. | |
5695 | * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add uses | |
5696 | parameter. | |
5697 | * config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise. | |
5698 | * config/arm/arm.cc (thumb1_md_asm_adjust): Likewise. | |
5699 | * config/avr/avr.cc (avr_md_asm_adjust): Likewise. | |
5700 | * config/cris/cris.cc (cris_md_asm_adjust): Likewise. | |
5701 | * config/i386/i386.cc (ix86_md_asm_adjust): Likewise. | |
5702 | * config/mn10300/mn10300.cc (mn10300_md_asm_adjust): Likewise. | |
5703 | * config/nds32/nds32.cc (nds32_md_asm_adjust): Likewise. | |
5704 | * config/pdp11/pdp11.cc (pdp11_md_asm_adjust): Likewise. | |
5705 | * config/rs6000/rs6000.cc (rs6000_md_asm_adjust): Likewise. | |
5706 | * config/s390/s390.cc (s390_md_asm_adjust): Likewise. | |
5707 | * config/vax/vax.cc (vax_md_asm_adjust): Likewise. | |
5708 | * config/visium/visium.cc (visium_md_asm_adjust): Likewise. | |
5709 | ||
5710 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5711 | ||
5712 | * doc/tm.texi.in: Add TARGET_START_CALL_ARGS. | |
5713 | * doc/tm.texi: Regenerate. | |
5714 | * target.def (start_call_args): New hook. | |
5715 | (call_args, end_call_args): Add a parameter for the cumulative | |
5716 | argument information. | |
5717 | * hooks.h (hook_void_rtx_tree): Delete. | |
5718 | * hooks.cc (hook_void_rtx_tree): Likewise. | |
5719 | * targhooks.h (hook_void_CUMULATIVE_ARGS): Declare. | |
5720 | (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise. | |
5721 | * targhooks.cc (hook_void_CUMULATIVE_ARGS): New function. | |
5722 | (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise. | |
5723 | * calls.cc (expand_call): Call start_call_args before computing | |
5724 | and storing stack parameters. Pass the cumulative argument | |
5725 | information to call_args and end_call_args. | |
5726 | (emit_library_call_value_1): Likewise. | |
5727 | * config/nvptx/nvptx.cc (nvptx_call_args): Add a cumulative | |
5728 | argument parameter. | |
5729 | (nvptx_end_call_args): Likewise. | |
5730 | ||
5731 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5732 | ||
5733 | * doc/tm.texi.in: Add TARGET_EMIT_EPILOGUE_FOR_SIBCALL. | |
5734 | * doc/tm.texi: Regenerate. | |
5735 | * target.def (emit_epilogue_for_sibcall): New hook. | |
5736 | * calls.cc (can_implement_as_sibling_call_p): Use it. | |
5737 | * function.cc (thread_prologue_and_epilogue_insns): Likewise. | |
5738 | (reposition_prologue_and_epilogue_notes): Likewise. | |
5739 | * config/aarch64/aarch64-protos.h (aarch64_expand_epilogue): Take | |
5740 | an rtx_call_insn * rather than a bool. | |
5741 | * config/aarch64/aarch64.cc (aarch64_expand_epilogue): Likewise. | |
5742 | (TARGET_EMIT_EPILOGUE_FOR_SIBCALL): Define. | |
5743 | * config/aarch64/aarch64.md (epilogue): Update call. | |
5744 | (sibcall_epilogue): Delete. | |
5745 | ||
5746 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5747 | ||
5748 | * target.def (use_late_prologue_epilogue): New hook. | |
5749 | * doc/tm.texi.in: Add TARGET_USE_LATE_PROLOGUE_EPILOGUE. | |
5750 | * doc/tm.texi: Regenerate. | |
5751 | * passes.def (pass_late_thread_prologue_and_epilogue): New pass. | |
5752 | * tree-pass.h (make_pass_late_thread_prologue_and_epilogue): Declare. | |
5753 | * function.cc (pass_thread_prologue_and_epilogue::gate): New function. | |
5754 | (pass_data_late_thread_prologue_and_epilogue): New pass variable. | |
5755 | (pass_late_thread_prologue_and_epilogue): New pass class. | |
5756 | (make_pass_late_thread_prologue_and_epilogue): New function. | |
5757 | ||
5758 | 2023-12-05 Kito Cheng <kito.cheng@sifive.com> | |
5759 | ||
5760 | * common/config/riscv/riscv-common.cc | |
5761 | (riscv_subset_list::check_conflict_ext): Check zcd conflicts | |
5762 | with zcmt and zcmp. | |
5763 | ||
5764 | 2023-12-05 Richard Sandiford <richard.sandiford@arm.com> | |
5765 | ||
5766 | PR rtl-optimization/112278 | |
5767 | * lra-int.h (lra_update_biggest_mode): New function. | |
5768 | * lra-coalesce.cc (merge_pseudos): Use it. | |
5769 | * lra-lives.cc (process_bb_lives): Likewise. | |
5770 | * lra.cc (new_insn_reg): Likewise. | |
5771 | ||
5772 | 2023-12-05 Jakub Jelinek <jakub@redhat.com> | |
5773 | ||
5774 | PR tree-optimization/112843 | |
5775 | * gimple-lower-bitint.cc (gimple_lower_bitint): Change lhs of stmt | |
5776 | to lhs2 before building and inserting lhs = (cast) lhs2; assignment. | |
5777 | Adjust stmt operands before adjusting lhs. | |
5778 | ||
5779 | 2023-12-05 xuli <xuli1@eswincomputing.com> | |
5780 | ||
5781 | * config/riscv/riscv-v.cc (sew64_scalar_helper): Bugfix. | |
5782 | ||
5783 | 2023-12-05 Jakub Jelinek <jakub@redhat.com> | |
5784 | ||
5785 | PR target/112816 | |
5786 | * config/i386/sse.md ((eq (eq (lshiftrt x elt_bits-1) 0) 0)): New | |
5787 | splitter to turn psrld $31; pcmpeq; pcmpeq into psrad $31. | |
5788 | ||
5789 | 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
5790 | ||
5791 | * config/riscv/autovec.md: Add blocker. | |
5792 | * config/riscv/riscv-protos.h (gather_scatter_valid_offset_p): New function. | |
5793 | * config/riscv/riscv-v.cc (gather_scatter_valid_offset_p): Ditto. | |
5794 | ||
5795 | 2023-12-05 Richard Biener <rguenther@suse.de> | |
5796 | ||
5797 | PR tree-optimization/112827 | |
5798 | PR tree-optimization/112848 | |
5799 | * tree-scalar-evolution.cc (final_value_replacement_loop): | |
5800 | Compute the insert location for each insert. | |
5801 | ||
5802 | 2023-12-05 liuhongt <hongtao.liu@intel.com> | |
5803 | ||
5804 | * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): | |
5805 | Count sse_reg/gpr_regs for components not loaded from memory. | |
5806 | (ix86_vector_costs:ix86_vector_costs): New constructor. | |
5807 | (ix86_vector_costs::m_num_gpr_needed[3]): New private memeber. | |
5808 | (ix86_vector_costs::m_num_sse_needed[3]): Ditto. | |
5809 | (ix86_vector_costs::finish_cost): Estimate overall register | |
5810 | pressure cost. | |
5811 | (ix86_vector_costs::ix86_vect_estimate_reg_pressure): New | |
5812 | function. | |
5813 | ||
5814 | 2023-12-05 liuhongt <hongtao.liu@intel.com> | |
5815 | ||
5816 | * config/i386/sse.md (udot_prodv64qi): New expander. | |
5817 | (udot_prod<mode>): Emulates with VEC_UNPACKU_EXPR + | |
5818 | DOT_PROD (short, int). | |
5819 | ||
5820 | 2023-12-05 Marek Polacek <polacek@redhat.com> | |
5821 | ||
5822 | PR c++/107687 | |
5823 | PR c++/110997 | |
5824 | * doc/invoke.texi: Document -fno-immediate-escalation. | |
5825 | ||
5826 | 2023-12-04 Andrew Pinski <quic_apinski@quicinc.com> | |
5827 | ||
5828 | * match.pd (zero_one_valued_p): For convert | |
5829 | make sure type is not a signed 1-bit integer. | |
5830 | ||
5831 | 2023-12-04 Jeff Law <jlaw@ventanamicro.com> | |
5832 | ||
5833 | * config/microblaze/microblaze.md (movhi): Use %i for half-word | |
5834 | loads to properly select between lhu/lhui. | |
5835 | ||
5836 | 2023-12-04 Robin Dapp <rdapp@ventanamicro.com> | |
5837 | ||
5838 | * config/riscv/riscv-string.cc (expand_rawmemchr): Increment | |
5839 | source address by vl * element_size. | |
5840 | ||
5841 | 2023-12-04 Robin Dapp <rdapp@ventanamicro.com> | |
5842 | ||
5843 | * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): | |
5844 | Rename... | |
5845 | (enum stringop_strategy_enum): ... to this. | |
5846 | * config/riscv/riscv-string.cc (riscv_expand_block_move): New | |
5847 | wrapper expander handling the strategies and delegation. | |
5848 | (riscv_expand_block_move_scalar): Rename function and make | |
5849 | static. | |
5850 | (expand_block_move): Remove strategy handling. | |
5851 | * config/riscv/riscv.md: Call expander wrapper. | |
5852 | * config/riscv/riscv.opt: Rename. | |
5853 | ||
5854 | 2023-12-04 Richard Biener <rguenther@suse.de> | |
5855 | ||
5856 | PR middle-end/112785 | |
5857 | * function.h (get_new_clique): New inline function handling | |
5858 | last_clique overflow. | |
5859 | * cfgrtl.cc (duplicate_insn_chain): Use it. | |
5860 | * tree-cfg.cc (gimple_duplicate_bb): Likewise. | |
5861 | * tree-inline.cc (remap_dependence_clique): Likewise. | |
5862 | ||
5863 | 2023-12-04 Christoph Müllner <christoph.muellner@vrull.eu> | |
5864 | ||
5865 | PR target/112650 | |
5866 | * doc/invoke.texi: Document riscv-strcmp-inline-limit. | |
5867 | ||
5868 | 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
5869 | ||
5870 | PR target/112431 | |
5871 | * config/riscv/vector.md: Fix incorrect overlap in v0. | |
5872 | ||
5873 | 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
5874 | ||
5875 | PR target/112431 | |
5876 | * config/riscv/vector.md: Add highest-number overlap support. | |
5877 | ||
5878 | 2023-12-04 Richard Biener <rguenther@suse.de> | |
5879 | ||
5880 | PR tree-optimization/112818 | |
5881 | * tree-vect-stmts.cc (vectorizable_bswap): Check input and | |
5882 | output vector types have the same size. | |
5883 | ||
5884 | 2023-12-04 Richard Biener <rguenther@suse.de> | |
5885 | ||
5886 | PR tree-optimization/112827 | |
5887 | * tree-scalar-evolution.cc (final_value_replacement_loop): | |
5888 | Do not release SSA name but keep a dead initialization around. | |
5889 | ||
5890 | 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
5891 | ||
5892 | PR target/112431 | |
5893 | * config/riscv/vector.md: Remove earlyclobber from widen reduction. | |
5894 | ||
5895 | 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com> | |
5896 | ||
5897 | PR debug/112656 | |
5898 | * btfout.cc (btf_asm_type): Fixup ctti_name for all | |
5899 | BTF types of kind BTF_KIND_FUNC_PROTO. | |
5900 | ||
5901 | 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com> | |
5902 | ||
5903 | PR debug/112768 | |
5904 | * btfout.cc (get_btf_type_name): New definition. | |
5905 | (btf_collect_datasec): Update dtd_name to the original type name | |
5906 | string. | |
5907 | (btf_asm_type_ref): Use the new get_btf_type_name function | |
5908 | instead. | |
5909 | (btf_asm_type): Likewise. | |
5910 | (btf_asm_func_type): Likewise. | |
5911 | ||
5912 | 2023-12-04 Jakub Jelinek <jakub@redhat.com> | |
5913 | ||
5914 | PR target/112837 | |
5915 | * config/i386/i386.cc (ix86_elim_entry_set_got): Before checking | |
5916 | for UNSPEC_SET_GOT check that SET_SRC is UNSPEC. Use SET_SRC and | |
5917 | SET_DEST macros instead of XEXP, rename vec variable to set. | |
5918 | ||
5919 | 2023-12-04 Jakub Jelinek <jakub@redhat.com> | |
5920 | ||
5921 | PR target/112816 | |
5922 | * config/i386/sse.md (signbit<mode>2): Force operands[1] into a REG. | |
5923 | ||
5924 | 2023-12-04 Feng Wang <wangfeng@eswincomputing.com> | |
5925 | ||
5926 | * common/config/riscv/riscv-common.cc: Add zvkb ISA info. | |
5927 | * config/riscv/riscv.opt: Add Mask(ZVKB) | |
5928 | ||
5929 | 2023-12-04 Fei Gao <gaofei@eswincomputing.com> | |
5930 | Xiao Zeng <zengxiao@eswincomputing.com> | |
5931 | ||
5932 | * config/riscv/riscv.md (*mov<GPR:mode><X:mode>cc):move to sfb.md | |
5933 | * config/riscv/sfb.md: New file. | |
5934 | ||
5935 | 2023-12-04 Kito Cheng <kito.cheng@sifive.com> | |
5936 | ||
5937 | * config/riscv/riscv-cores.def: Add sifive-x280. | |
5938 | * doc/invoke.texi (RISC-V Options): Add sifive-x280 | |
5939 | ||
5940 | 2023-12-04 Kito Cheng <kito.cheng@sifive.com> | |
5941 | ||
5942 | * common/config/riscv/riscv-common.cc (riscv_implied_predicator_t): New. | |
5943 | (riscv_implied_info_t::riscv_implied_info_t): New. | |
5944 | (riscv_implied_info_t::match): New. | |
5945 | (riscv_implied_info): New entry for zcf. | |
5946 | (riscv_subset_list::handle_implied_ext): Use | |
5947 | riscv_implied_info_t::match. | |
5948 | (riscv_subset_list::check_implied_ext): Ditto. | |
5949 | (riscv_subset_list::handle_combine_ext): Ditto. | |
5950 | (riscv_subset_list::parse): Move zcf implication handling to | |
5951 | riscv_implied_infos. | |
5952 | ||
5953 | 2023-12-04 Kito Cheng <kito.cheng@sifive.com> | |
5954 | ||
5955 | * common/config/riscv/riscv-common.cc | |
5956 | (riscv_subset_list::check_conflict_ext): New. | |
5957 | (riscv_subset_list::parse): Move checking conflict ext. to | |
5958 | check_conflict_ext. | |
5959 | * config/riscv/riscv-subset.h: | |
5960 | Add riscv_subset_list::check_conflict_ext. | |
5961 | ||
5962 | 2023-12-04 Hu, Lin1 <lin1.hu@intel.com> | |
5963 | ||
5964 | * common/config/i386/cpuinfo.h (get_available_features): Move USER_MSR | |
5965 | to the correct location. | |
5966 | ||
5967 | 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
5968 | ||
5969 | * config/riscv/riscv.md: Rostify the constraints. | |
5970 | ||
5971 | 2023-12-04 chenxiaolong <chenxiaolong@loongson.cn> | |
5972 | ||
5973 | * doc/extend.texi: Add information about the intrinsic function of the vector | |
5974 | instruction. | |
5975 | ||
5976 | 2023-12-03 Jakub Jelinek <jakub@redhat.com> | |
5977 | ||
5978 | PR middle-end/112807 | |
5979 | * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow): | |
5980 | When choosing type0 and type1 types, if prec3 has small/middle bitint | |
5981 | kind, use maximum of type0 and type1's precision instead of prec3. | |
5982 | ||
5983 | 2023-12-03 Jeff Law <jlaw@ventanamicro.com> | |
5984 | ||
5985 | * config/frv/frv.h (TRANSFER_FROM_TRAMPOLINE): Add prototype for exit. | |
5986 | ||
5987 | 2023-12-02 Richard Sandiford <richard.sandiford@arm.com> | |
5988 | ||
5989 | * attribs.cc (comp_type_attributes): Pass the full TREE_PURPOSE | |
5990 | to lookup_attribute_spec, rather than just the name. | |
5991 | (remove_attributes_matching): Likewise. | |
5992 | ||
5993 | 2023-12-02 Richard Sandiford <richard.sandiford@arm.com> | |
5994 | ||
5995 | * attribs.cc (find_same_attribute): New function. | |
5996 | (decl_attributes, comp_type_attributes): Use it when looking | |
5997 | up one list's attributes in another list. | |
5998 | ||
5999 | 2023-12-02 Richard Sandiford <richard.sandiford@arm.com> | |
6000 | ||
6001 | * Makefile.in (GTFILES): Add attribs.cc. | |
6002 | * attribs.cc (gnu_namespace_cache): New variable. | |
6003 | (get_gnu_namespace): New function. | |
6004 | (lookup_attribute_spec): Use it instead of get_identifier ("gnu"). | |
6005 | (get_attribute_namespace, attribs_cc_tests): Likewise. | |
6006 | ||
6007 | 2023-12-02 Richard Sandiford <richard.sandiford@arm.com> | |
6008 | ||
6009 | * attribs.h (scoped_attribute_specs): New structure. | |
6010 | (register_scoped_attributes): Take a reference to a | |
6011 | scoped_attribute_specs instead of separate namespace and array | |
6012 | parameters. | |
6013 | * plugin.h (register_scoped_attributes): Likewise. | |
6014 | * attribs.cc (register_scoped_attributes): Likewise. | |
6015 | (attribute_tables): Change into an array of scoped_attribute_specs | |
6016 | pointers. Reduce to 1 element for frontends and 1 element for targets. | |
6017 | (empty_attribute_table): Delete. | |
6018 | (check_attribute_tables): Update for changes to attribute_tables. | |
6019 | Use a hash_set to identify duplicates. | |
6020 | (handle_ignored_attributes_option): Update for above changes. | |
6021 | (init_attributes): Likewise. | |
6022 | (excl_pair): Delete. | |
6023 | (test_attribute_exclusions): Update for above changes. Don't | |
6024 | enforce symmetry for standard attributes in the top-level namespace. | |
6025 | * langhooks-def.h (LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete. | |
6026 | (LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Likewise. | |
6027 | (LANG_HOOKS_INITIALIZER): Update accordingly. | |
6028 | (LANG_HOOKS_ATTRIBUTE_TABLE): Define to an empty constructor. | |
6029 | * langhooks.h (lang_hooks::common_attribute_table): Delete. | |
6030 | (lang_hooks::format_attribute_table): Likewise. | |
6031 | (lang_hooks::attribute_table): Redefine to an array of | |
6032 | scoped_attribute_specs pointers. | |
6033 | * target-def.h (TARGET_GNU_ATTRIBUTES): New macro. | |
6034 | * target.def (attribute_spec): Redefine to return an array of | |
6035 | scoped_attribute_specs pointers. | |
6036 | * tree-inline.cc (function_attribute_inlinable_p): Update accordingly. | |
6037 | * doc/tm.texi: Regenerate. | |
6038 | * config/aarch64/aarch64.cc (aarch64_attribute_table): Define using | |
6039 | TARGET_GNU_ATTRIBUTES. | |
6040 | * config/alpha/alpha.cc (vms_attribute_table): Likewise. | |
6041 | * config/avr/avr.cc (avr_attribute_table): Likewise. | |
6042 | * config/bfin/bfin.cc (bfin_attribute_table): Likewise. | |
6043 | * config/bpf/bpf.cc (bpf_attribute_table): Likewise. | |
6044 | * config/csky/csky.cc (csky_attribute_table): Likewise. | |
6045 | * config/epiphany/epiphany.cc (epiphany_attribute_table): Likewise. | |
6046 | * config/gcn/gcn.cc (gcn_attribute_table): Likewise. | |
6047 | * config/h8300/h8300.cc (h8300_attribute_table): Likewise. | |
6048 | * config/loongarch/loongarch.cc (loongarch_attribute_table): Likewise. | |
6049 | * config/m32c/m32c.cc (m32c_attribute_table): Likewise. | |
6050 | * config/m32r/m32r.cc (m32r_attribute_table): Likewise. | |
6051 | * config/m68k/m68k.cc (m68k_attribute_table): Likewise. | |
6052 | * config/mcore/mcore.cc (mcore_attribute_table): Likewise. | |
6053 | * config/microblaze/microblaze.cc (microblaze_attribute_table): | |
6054 | Likewise. | |
6055 | * config/mips/mips.cc (mips_attribute_table): Likewise. | |
6056 | * config/msp430/msp430.cc (msp430_attribute_table): Likewise. | |
6057 | * config/nds32/nds32.cc (nds32_attribute_table): Likewise. | |
6058 | * config/nvptx/nvptx.cc (nvptx_attribute_table): Likewise. | |
6059 | * config/riscv/riscv.cc (riscv_attribute_table): Likewise. | |
6060 | * config/rl78/rl78.cc (rl78_attribute_table): Likewise. | |
6061 | * config/rx/rx.cc (rx_attribute_table): Likewise. | |
6062 | * config/s390/s390.cc (s390_attribute_table): Likewise. | |
6063 | * config/sh/sh.cc (sh_attribute_table): Likewise. | |
6064 | * config/sparc/sparc.cc (sparc_attribute_table): Likewise. | |
6065 | * config/stormy16/stormy16.cc (xstormy16_attribute_table): Likewise. | |
6066 | * config/v850/v850.cc (v850_attribute_table): Likewise. | |
6067 | * config/visium/visium.cc (visium_attribute_table): Likewise. | |
6068 | * config/arc/arc.cc (arc_attribute_table): Likewise. Move further | |
6069 | down file. | |
6070 | * config/arm/arm.cc (arm_attribute_table): Update for above changes, | |
6071 | using... | |
6072 | (arm_gnu_attributes, arm_gnu_attribute_table): ...these new globals. | |
6073 | * config/i386/i386-options.h (ix86_attribute_table): Delete. | |
6074 | (ix86_gnu_attribute_table): Declare. | |
6075 | * config/i386/i386-options.cc (ix86_attribute_table): Replace with... | |
6076 | (ix86_gnu_attributes, ix86_gnu_attribute_table): ...these two globals. | |
6077 | * config/i386/i386.cc (ix86_attribute_table): Define as an array of | |
6078 | scoped_attribute_specs pointers. | |
6079 | * config/ia64/ia64.cc (ia64_attribute_table): Update for above changes, | |
6080 | using... | |
6081 | (ia64_gnu_attributes, ia64_gnu_attribute_table): ...these new globals. | |
6082 | * config/rs6000/rs6000.cc (rs6000_attribute_table): Update for above | |
6083 | changes, using... | |
6084 | (rs6000_gnu_attributes, rs6000_gnu_attribute_table): ...these new | |
6085 | globals. | |
6086 | ||
6087 | 2023-12-02 Roger Sayle <roger@nextmovesoftware.com> | |
6088 | ||
6089 | * config/riscv/riscv-vsetvl.cc (csetvl_info::parse_insn): Rename | |
6090 | local variable from demand_flags to dflags, to avoid conflicting | |
6091 | with (enumeration) type of the same name. | |
6092 | ||
6093 | 2023-12-02 Li Wei <liwei@loongson.cn> | |
6094 | ||
6095 | * config/loongarch/loongarch.cc (loongarch_is_odd_extraction): | |
6096 | Supplementary function prototype. | |
6097 | (loongarch_is_even_extraction): Adjust. | |
6098 | (loongarch_try_expand_lsx_vshuf_const): Adjust. | |
6099 | (loongarch_is_extraction_permutation): Adjust. | |
6100 | (loongarch_expand_vec_perm_const_2): Adjust. | |
6101 | ||
6102 | 2023-12-02 Li Wei <liwei@loongson.cn> | |
6103 | ||
6104 | * config/loongarch/loongarch.md (v2di): Used to simplify the | |
6105 | following templates. | |
6106 | (popcount<mode>2): New. | |
6107 | ||
6108 | 2023-12-02 Li Wei <liwei@loongson.cn> | |
6109 | ||
6110 | * config/loongarch/loongarch.h (CTZ_DEFINED_VALUE_AT_ZERO): Add | |
6111 | description. | |
6112 | (CLZ_DEFINED_VALUE_AT_ZERO): Remove duplicate definition. | |
6113 | ||
6114 | 2023-12-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6115 | ||
6116 | PR target/112801 | |
6117 | * config/riscv/vector.md: Add !TARGET_64BIT. | |
6118 | ||
6119 | 2023-12-02 Pan Li <pan2.li@intel.com> | |
6120 | ||
6121 | PR target/112743 | |
6122 | * config/riscv/riscv.cc (riscv_legitimize_move): Take the | |
6123 | exist (U *mode) and handle DFmode like DImode when EEW is | |
6124 | 32bits for ZVE32F. | |
6125 | ||
6126 | 2023-12-01 Andrew MacLeod <amacleod@redhat.com> | |
6127 | ||
6128 | * gimple-range-fold.h (range_compatible_p): Relocate. | |
6129 | * value-range.h (range_compatible_p): Here. | |
6130 | * range-op-mixed.h (operand_equal::operand_check_p): Call | |
6131 | range_compatible_p rather than comparing precision. | |
6132 | (operand_not_equal::operand_check_p): Ditto. | |
6133 | (operand_not_lt::operand_check_p): Ditto. | |
6134 | (operand_not_le::operand_check_p): Ditto. | |
6135 | (operand_not_gt::operand_check_p): Ditto. | |
6136 | (operand_not_ge::operand_check_p): Ditto. | |
6137 | (operand_plus::operand_check_p): Ditto. | |
6138 | (operand_abs::operand_check_p): Ditto. | |
6139 | (operand_minus::operand_check_p): Ditto. | |
6140 | (operand_negate::operand_check_p): Ditto. | |
6141 | (operand_mult::operand_check_p): Ditto. | |
6142 | (operand_bitwise_not::operand_check_p): Ditto. | |
6143 | (operand_bitwise_xor::operand_check_p): Ditto. | |
6144 | (operand_bitwise_and::operand_check_p): Ditto. | |
6145 | (operand_bitwise_or::operand_check_p): Ditto. | |
6146 | (operand_min::operand_check_p): Ditto. | |
6147 | (operand_max::operand_check_p): Ditto. | |
6148 | * range-op.cc (operand_lshift::operand_check_p): Ditto. | |
6149 | (operand_rshift::operand_check_p): Ditto. | |
6150 | (operand_logical_and::operand_check_p): Ditto. | |
6151 | (operand_logical_or::operand_check_p): Ditto. | |
6152 | (operand_logical_not::operand_check_p): Ditto. | |
6153 | ||
6154 | 2023-12-01 Vladimir N. Makarov <vmakarov@redhat.com> | |
6155 | ||
6156 | PR target/112445 | |
6157 | * lra.h (lra): Add one more arg. | |
6158 | * lra-int.h (lra_verbose, lra_dump_insns): New externals. | |
6159 | (lra_dump_insns_if_possible): Ditto. | |
6160 | * lra.cc (lra_dump_insns): Dump all insns. | |
6161 | (lra_dump_insns_if_possible): Dump all insns for lra_verbose >= 7. | |
6162 | (lra_verbose): New global. | |
6163 | (lra): Add new arg. Setup lra_verbose from its value. | |
6164 | * lra-assigns.cc (lra_split_hard_reg_for): Dump insns if rtl | |
6165 | was changed. | |
6166 | * lra-remat.cc (lra_remat): Dump insns if rtl was changed. | |
6167 | * lra-constraints.cc (lra_inheritance): Dump insns. | |
6168 | (lra_constraints, lra_undo_inheritance): Dump insns if rtl | |
6169 | was changed. | |
6170 | (remove_inheritance_pseudos): Use restore reg if it is set up. | |
6171 | * ira.cc: (lra): Pass internal_flag_ira_verbose. | |
6172 | ||
6173 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6174 | ||
6175 | * doc/extend.texi (__builtin_addc, __builtin_addcl, __builtin_addcll, | |
6176 | __builtin_subc, __builtin_subcl, __builtin_subcll, | |
6177 | __builtin_stdc_bit_width, __builtin_stdc_count_ones, | |
6178 | __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one, | |
6179 | __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one, | |
6180 | __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit, | |
6181 | __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros, | |
6182 | __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros, | |
6183 | __builtin_nvptx_brev, __builtin_nvptx_brevll, __builtin_darn, | |
6184 | __builtin_darn_raw, __builtin_ia32_vec_ext_v2di, | |
6185 | __builtin_ia32_crc32qi, __builtin_ia32_crc32hi, | |
6186 | __builtin_ia32_crc32si, __builtin_ia32_crc32di): Put {}s around | |
6187 | return type with spaces in it. | |
6188 | (__builtin_rx_mvfachi, __builtin_rx_mvfacmi): Remove superfluous | |
6189 | whitespace. | |
6190 | ||
6191 | 2023-12-01 David Malcolm <dmalcolm@redhat.com> | |
6192 | ||
6193 | * diagnostic-core.h (emit_diagnostic_valist): New overload decl. | |
6194 | * diagnostic-format-sarif.cc (sarif_builder::make_result_object): | |
6195 | When we have metadata, call its maybe_add_sarif_properties vfunc. | |
6196 | * diagnostic-metadata.h (class sarif_object): Forward decl. | |
6197 | (diagnostic_metadata::~diagnostic_metadata): New. | |
6198 | (diagnostic_metadata::maybe_add_sarif_properties): New vfunc. | |
6199 | * diagnostic.cc (emit_diagnostic_valist): New overload. | |
6200 | ||
6201 | 2023-12-01 David Malcolm <dmalcolm@redhat.com> | |
6202 | ||
6203 | PR analyzer/103533 | |
6204 | * doc/extend.texi: Remove stray reference to | |
6205 | -fanalyzer-checker=taint. | |
6206 | ||
6207 | 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6208 | ||
6209 | PR target/112431 | |
6210 | * config/riscv/vector.md: Support highpart overlap for vx/vf. | |
6211 | ||
6212 | 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6213 | ||
6214 | PR target/112431 | |
6215 | * config/riscv/vector.md: Support highpart overlap for indexed load. | |
6216 | ||
6217 | 2023-12-01 Richard Biener <rguenther@suse.de> | |
6218 | ||
6219 | * tree-vectorizer.h (vect_get_vec_defs): Re-order arguments. | |
6220 | * tree-vect-stmts.cc (vect_get_vec_defs): Likewise. | |
6221 | (vectorizable_condition): Update caller. | |
6222 | (vectorizable_comparison_1): Likewise. | |
6223 | (vectorizable_conversion): Specify the vector type to be | |
6224 | used for invariant/external defs. | |
6225 | * tree-vect-loop.cc (vect_transform_reduction): Update caller. | |
6226 | ||
6227 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6228 | ||
6229 | PR middle-end/112770 | |
6230 | * gimple-lower-bitint.cc (gimple_lower_bitint): When adjusting | |
6231 | lhs of middle _BitInt setter which ends bb, insert cast on | |
6232 | the fallthru edge rather than after stmt. | |
6233 | ||
6234 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6235 | ||
6236 | PR middle-end/112771 | |
6237 | * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr): | |
6238 | Use mp = 1 if it is zero. | |
6239 | ||
6240 | 2023-12-01 Jose E. Marchesi <jose.marchesi@oracle.com> | |
6241 | ||
6242 | * config/bpf/bpf.cc (bpf_asm_named_section): New function. | |
6243 | (TARGET_ASM_NAMED_SECTION): Set to bpf_asm_named_section. | |
6244 | ||
6245 | 2023-12-01 Di Zhao <dizhao@os.amperecomputing.com> | |
6246 | ||
6247 | * config/aarch64/aarch64-tuning-flags.def | |
6248 | (AARCH64_EXTRA_TUNING_OPTION): New tuning option to avoid | |
6249 | cross-loop FMA. | |
6250 | * config/aarch64/aarch64.cc | |
6251 | (aarch64_override_options_internal): Set | |
6252 | param_avoid_fma_max_bits according to tuning option. | |
6253 | * config/aarch64/tuning_models/ampere1.h (ampere1_tunings): | |
6254 | Modify tunings related with FMA. | |
6255 | * config/aarch64/tuning_models/ampere1a.h (ampere1a_tunings): | |
6256 | Likewise. | |
6257 | * config/aarch64/tuning_models/ampere1b.h (ampere1b_tunings): | |
6258 | Likewise. | |
6259 | ||
6260 | 2023-12-01 Richard Sandiford <richard.sandiford@arm.com> | |
6261 | ||
6262 | * config/aarch64/aarch64-sve-builtins.h | |
6263 | (function_expander::result_mode): New member function. | |
6264 | * config/aarch64/aarch64-sve-builtins-base.cc | |
6265 | (svld234_impl::expand): Use it. | |
6266 | * config/aarch64/aarch64-sve-builtins.cc | |
6267 | (function_expander::get_reg_target): Likewise. | |
6268 | ||
6269 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6270 | ||
6271 | * gimple-lower-bitint.cc (range_to_prec): Don't return -1 for | |
6272 | signed types. | |
6273 | (bitint_large_huge::lower_addsub_overflow): Fix up computation of | |
6274 | prec2. | |
6275 | (bitint_large_huge::lower_mul_overflow): Likewise. | |
6276 | ||
6277 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6278 | ||
6279 | * gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow): | |
6280 | When replacing use_stmt which is gsi_stmt (m_gsi), update m_gsi to | |
6281 | the new statement. | |
6282 | ||
6283 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6284 | ||
6285 | PR middle-end/112750 | |
6286 | * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow): | |
6287 | Use NE_EXPR rather than EQ_EXPR for g2 if !single_comparison and | |
6288 | adjust probabilities. | |
6289 | ||
6290 | 2023-12-01 Xi Ruoyao <xry111@xry111.site> | |
6291 | ||
6292 | * doc/install.texi: Deem srcdir == objdir broken, but objdir | |
6293 | as a subdirectory of srcdir fine. | |
6294 | ||
6295 | 2023-12-01 Juergen Christ <jchrist@linux.ibm.com> | |
6296 | ||
6297 | PR target/112753 | |
6298 | * config/s390/s390.cc (s390_md_asm_adjust): Return after dealing | |
6299 | with the outputs, if no further processing of long doubles is | |
6300 | required. | |
6301 | ||
6302 | 2023-12-01 Jakub Jelinek <jakub@redhat.com> | |
6303 | ||
6304 | PR target/112725 | |
6305 | * config/s390/s390.cc (s390_invalid_arg_for_unprototyped_fn): Return | |
6306 | NULL for __builtin_classify_type calls with vector arguments. | |
6307 | ||
6308 | 2023-12-01 Florian Weimer <fweimer@redhat.com> | |
6309 | ||
6310 | * doc/invoke.texi (Warning Options): Document | |
6311 | -Wdeclaration-missing-parameter-type. | |
6312 | ||
6313 | 2023-12-01 Florian Weimer <fweimer@redhat.com> | |
6314 | ||
6315 | * doc/invoke.texi (Warning Options): Document changes. | |
6316 | ||
6317 | 2023-12-01 Florian Weimer <fweimer@redhat.com> | |
6318 | ||
6319 | * doc/invoke.texi (Warning Options): Document that | |
6320 | -Wreturn-mismatch is a permerror in C99 and later. | |
6321 | ||
6322 | 2023-12-01 Florian Weimer <fweimer@redhat.com> | |
6323 | ||
6324 | PR c/91093 | |
6325 | PR c/96284 | |
6326 | * doc/invoke.texi (Warning Options): Document changes. | |
6327 | ||
6328 | 2023-12-01 Florian Weimer <fweimer@redhat.com> | |
6329 | ||
6330 | * doc/invoke.texi (Warning Options): Document changes. | |
6331 | ||
6332 | 2023-12-01 Florian Weimer <fweimer@redhat.com> | |
6333 | ||
6334 | * doc/invoke.texi (Warning Options): Document changes. | |
6335 | ||
6336 | 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6337 | ||
6338 | PR target/112776 | |
6339 | * config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Fix ratio. | |
6340 | ||
6341 | 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
6342 | ||
6343 | PR target/111404 | |
6344 | * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap): | |
6345 | For 128-bit store the loaded value and loop if needed. | |
6346 | ||
6347 | 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
6348 | ||
6349 | PR target/103100 | |
6350 | * config/aarch64/aarch64.md (cpymemdi): Remove pattern condition. | |
6351 | (setmemdi): Likewise. | |
6352 | * config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support | |
6353 | strict-align. Cleanup condition for using MOPS. | |
6354 | (aarch64_expand_setmem): Likewise. | |
6355 | ||
6356 | 2023-11-30 Richard Biener <rguenther@suse.de> | |
6357 | ||
6358 | PR tree-optimization/112767 | |
6359 | * tree-scalar-evolution.cc (final_value_replacement_loop): | |
6360 | Propagate constants to immediate uses immediately. | |
6361 | ||
6362 | 2023-11-30 Richard Biener <rguenther@suse.de> | |
6363 | ||
6364 | PR tree-optimization/112766 | |
6365 | * gimple-predicate-analysis.cc (find_var_cmp_const): | |
6366 | Support continuing the iteration and report every candidate. | |
6367 | (uninit_analysis::overlap): Iterate over all flag var | |
6368 | candidates. | |
6369 | ||
6370 | 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6371 | ||
6372 | PR target/112431 | |
6373 | * config/riscv/vector.md: Add widening overlap of vf2/vf4. | |
6374 | ||
6375 | 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6376 | ||
6377 | PR target/112431 | |
6378 | * config/riscv/vector.md: Remove earlyclobber for wx/wf instructions. | |
6379 | ||
6380 | 2023-11-30 Jakub Jelinek <jakub@redhat.com> | |
6381 | ||
6382 | PR middle-end/112733 | |
6383 | * wide-int.cc (wi::mul_internal): Don't allocate twice as much | |
6384 | space for u, v and r as needed. | |
6385 | (divmod_internal_2): Change return type from void to int, for n == 1 | |
6386 | return 1, otherwise before writing b_dividend into b_remainder set | |
6387 | n to MIN (n, m) and at the end return it. | |
6388 | (wi::divmod_internal): Don't allocate 4 times as much space for | |
6389 | b_quotient, b_remainder, b_dividend and b_divisor. Set n to | |
6390 | result of divmod_internal_2. | |
6391 | (wide_int_cc_tests): Add test for unsigned widest_int | |
6392 | wi::multiple_of_p of 1 and -128. | |
6393 | ||
6394 | 2023-11-30 liuhongt <hongtao.liu@intel.com> | |
6395 | ||
6396 | * config/i386/sse.md (sdot_prodv64qi): New expander. | |
6397 | (sseunpackmodelower): New mode attr. | |
6398 | (sdot_prod<mode>): Emulate sdot_prodv*qi with sodt_prov*hi | |
6399 | when TARGET_VNNIINT8 is not available. | |
6400 | ||
6401 | 2023-11-30 liuhongt <hongtao.liu@intel.com> | |
6402 | ||
6403 | * config/i386/sse.md: (reduc_plus_scal_<mode>): Use | |
6404 | vec_extract_lo instead of subreg. | |
6405 | (reduc_<code>_scal_<mode>): Ditto. | |
6406 | (reduc_<code>_scal_<mode>): Ditto. | |
6407 | (reduc_<code>_scal_<mode>): Ditto. | |
6408 | (reduc_<code>_scal_<mode>): Ditto. | |
6409 | ||
6410 | 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6411 | ||
6412 | PR target/112431 | |
6413 | * config/riscv/vector.md: Add widenning overlap. | |
6414 | ||
6415 | 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6416 | ||
6417 | * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint. | |
6418 | * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap. | |
6419 | (no,yes): Ditto. | |
6420 | (none,W21,W42,W84,W43,W86,W87): Ditto. | |
6421 | * config/riscv/vector.md: Ditto. | |
6422 | ||
6423 | 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6424 | ||
6425 | * config/riscv/vector.md: Support highpart overlap for vext.vf2 | |
6426 | ||
6427 | 2023-11-29 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
6428 | ||
6429 | * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add ampere-1b | |
6430 | * config/aarch64/aarch64-cost-tables.h: Add ampere1b_extra_costs | |
6431 | * config/aarch64/aarch64-tune.md: Regenerate | |
6432 | * config/aarch64/aarch64.cc: Include ampere1b tuning model | |
6433 | * doc/invoke.texi: Document -mcpu=ampere1b | |
6434 | * config/aarch64/tuning_models/ampere1b.h: New file. | |
6435 | ||
6436 | 2023-11-29 David Faust <david.faust@oracle.com> | |
6437 | ||
6438 | * config/bpf/bpf.h (ASM_COMMENT_START): Change from ';' to '#'. | |
6439 | ||
6440 | 2023-11-29 Jakub Jelinek <jakub@redhat.com> | |
6441 | ||
6442 | PR target/112725 | |
6443 | * config/rs6000/rs6000.cc (invalid_arg_for_unprototyped_fn): Return | |
6444 | NULL for __builtin_classify_type calls with vector arguments. | |
6445 | ||
6446 | 2023-11-29 Andrew MacLeod <amacleod@redhat.com> | |
6447 | ||
6448 | PR tree-optimization/111922 | |
6449 | * ipa-cp.cc (ipa_vr_operation_and_type_effects): Check the | |
6450 | operands are valid before calling fold_range. | |
6451 | ||
6452 | 2023-11-29 Andrew MacLeod <amacleod@redhat.com> | |
6453 | ||
6454 | * range-op-mixed.h (operator_equal::operand_check_p): New. | |
6455 | (operator_not_equal::operand_check_p): New. | |
6456 | (operator_lt::operand_check_p): New. | |
6457 | (operator_le::operand_check_p): New. | |
6458 | (operator_gt::operand_check_p): New. | |
6459 | (operator_ge::operand_check_p): New. | |
6460 | (operator_plus::operand_check_p): New. | |
6461 | (operator_abs::operand_check_p): New. | |
6462 | (operator_minus::operand_check_p): New. | |
6463 | (operator_negate::operand_check_p): New. | |
6464 | (operator_mult::operand_check_p): New. | |
6465 | (operator_bitwise_not::operand_check_p): New. | |
6466 | (operator_bitwise_xor::operand_check_p): New. | |
6467 | (operator_bitwise_and::operand_check_p): New. | |
6468 | (operator_bitwise_or::operand_check_p): New. | |
6469 | (operator_min::operand_check_p): New. | |
6470 | (operator_max::operand_check_p): New. | |
6471 | * range-op.cc (range_op_handler::fold_range): Check operand | |
6472 | parameter types. | |
6473 | (range_op_handler::op1_range): Ditto. | |
6474 | (range_op_handler::op2_range): Ditto. | |
6475 | (range_op_handler::operand_check_p): New. | |
6476 | (range_operator::operand_check_p): New. | |
6477 | (operator_lshift::operand_check_p): New. | |
6478 | (operator_rshift::operand_check_p): New. | |
6479 | (operator_logical_and::operand_check_p): New. | |
6480 | (operator_logical_or::operand_check_p): New. | |
6481 | (operator_logical_not::operand_check_p): New. | |
6482 | * range-op.h (range_operator::operand_check_p): New. | |
6483 | (range_op_handler::operand_check_p): New. | |
6484 | ||
6485 | 2023-11-29 Martin Jambor <mjambor@suse.cz> | |
6486 | ||
6487 | PR tree-optimization/112711 | |
6488 | PR tree-optimization/112721 | |
6489 | * tree-sra.cc (build_access_from_call_arg): New parameter | |
6490 | CAN_BE_RETURNED, disqualify any candidate passed by reference if it is | |
6491 | true. Adjust leading comment. | |
6492 | (scan_function): Pass appropriate value to CAN_BE_RETURNED of | |
6493 | build_access_from_call_arg. | |
6494 | ||
6495 | 2023-11-29 Thomas Schwinge <thomas@codesourcery.com> | |
6496 | ||
6497 | * doc/sourcebuild.texi (Final Actions): Document | |
6498 | 'only_for_offload_target' wrapper. | |
6499 | ||
6500 | 2023-11-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> | |
6501 | ||
6502 | PR testsuite/112729 | |
6503 | * doc/sourcebuild.texi (Effective-Target Keywords, Environment | |
6504 | attributes): Document cfi. | |
6505 | ||
6506 | 2023-11-29 Richard Biener <rguenther@suse.de> | |
6507 | ||
6508 | PR middle-end/110237 | |
6509 | * internal-fn.cc (expand_partial_load_optab_fn): Clear | |
6510 | MEM_EXPR and MEM_OFFSET. | |
6511 | (expand_partial_store_optab_fn): Likewise. | |
6512 | ||
6513 | 2023-11-29 Jakub Jelinek <jakub@redhat.com> | |
6514 | ||
6515 | PR middle-end/112733 | |
6516 | * fold-const.cc (multiple_of_p): Pass SIGNED rather than | |
6517 | UNSIGNED for wi::multiple_of_p on widest_int arguments. | |
6518 | ||
6519 | 2023-11-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6520 | kito-cheng <kito.cheng@sifive.com> | |
6521 | kito-cheng <kito.cheng@gmail.com> | |
6522 | ||
6523 | PR target/112431 | |
6524 | * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters. | |
6525 | * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto. | |
6526 | (no,yes): Ditto. | |
6527 | * config/riscv/vector.md: Support highpart register overlap for vwcvt. | |
6528 | ||
6529 | 2023-11-29 xuli <xuli1@eswincomputing.com> | |
6530 | ||
6531 | * config/riscv/riscv.cc (riscv_option_override): Eliminate warning. | |
6532 | ||
6533 | 2023-11-29 Jakub Jelinek <jakub@redhat.com> | |
6534 | ||
6535 | PR bootstrap/111601 | |
6536 | * fold-mem-offsets.cc (get_uses): Ignore DEBUG_INSN uses. Otherwise, | |
6537 | punt if use is in a different basic block from INSN or appears before | |
6538 | INSN in the same basic block. Formatting fixes. | |
6539 | (get_single_def_in_bb): Formatting fixes. | |
6540 | (fold_offsets_1, pass_fold_mem_offsets::execute): Comment formatting | |
6541 | fixes. | |
6542 | ||
6543 | 2023-11-29 Xi Ruoyao <xry111@xry111.site> | |
6544 | ||
6545 | * config/loongarch/simd.md (LSX_SCALAR_FRINT): New int iterator. | |
6546 | (VLSX_FOR_FMODE): New mode attribute. | |
6547 | (<simd_for_scalar_frint_pattern><mode>2): New expander, | |
6548 | expanding to vreplvei.{w/d} + frint{rp/rz/rm/rne}.{s.d}. | |
6549 | ||
6550 | 2023-11-29 Xi Ruoyao <xry111@xry111.site> | |
6551 | ||
6552 | * config/loongarch/loongarch.md (lrint_allow_inexact): Remove. | |
6553 | (<lrint_pattern><ANYF:mode><ANYFI:mode>2): Check if <LRINT> | |
6554 | == UNSPEC_FTINT instead of <lrint_allow_inexact>. | |
6555 | ||
6556 | 2023-11-29 Xi Ruoyao <xry111@xry111.site> | |
6557 | ||
6558 | * config/loongarch/lsx.md (bitimm): Move to ... | |
6559 | (UNSPEC_LSX_VROTR): Remove. | |
6560 | (lsx_vrotr_<lsxfmt>): Remove. | |
6561 | (lsx_vrotri_<lsxfmt>): Remove. | |
6562 | * config/loongarch/lasx.md (UNSPEC_LASX_XVROTR): Remove. | |
6563 | (lsx_vrotr_<lsxfmt>): Remove. | |
6564 | (lsx_vrotri_<lsxfmt>): Remove. | |
6565 | * config/loongarch/simd.md (bitimm): ... here. Expand it to | |
6566 | cover LASX modes. | |
6567 | (vrotr<mode>3): New define_insn. | |
6568 | (vrotri<mode>3): New define_insn. | |
6569 | * config/loongarch/loongarch-builtins.cc: | |
6570 | (CODE_FOR_lsx_vrotr_b): Use standard pattern name. | |
6571 | (CODE_FOR_lsx_vrotr_h): Likewise. | |
6572 | (CODE_FOR_lsx_vrotr_w): Likewise. | |
6573 | (CODE_FOR_lsx_vrotr_d): Likewise. | |
6574 | (CODE_FOR_lasx_xvrotr_b): Likewise. | |
6575 | (CODE_FOR_lasx_xvrotr_h): Likewise. | |
6576 | (CODE_FOR_lasx_xvrotr_w): Likewise. | |
6577 | (CODE_FOR_lasx_xvrotr_d): Likewise. | |
6578 | (CODE_FOR_lsx_vrotri_b): Define to standard pattern name. | |
6579 | (CODE_FOR_lsx_vrotri_h): Likewise. | |
6580 | (CODE_FOR_lsx_vrotri_w): Likewise. | |
6581 | (CODE_FOR_lsx_vrotri_d): Likewise. | |
6582 | (CODE_FOR_lasx_xvrotri_b): Likewise. | |
6583 | (CODE_FOR_lasx_xvrotri_h): Likewise. | |
6584 | (CODE_FOR_lasx_xvrotri_w): Likewise. | |
6585 | (CODE_FOR_lasx_xvrotri_d): Likewise. | |
6586 | ||
6587 | 2023-11-29 Xi Ruoyao <xry111@xry111.site> | |
6588 | ||
6589 | * config/loongarch/simd.md (muh): New code attribute mapping | |
6590 | any_extend to smul_highpart or umul_highpart. | |
6591 | (<su>mul<mode>3_highpart): New define_insn. | |
6592 | * config/loongarch/lsx.md (UNSPEC_LSX_VMUH_S): Remove. | |
6593 | (UNSPEC_LSX_VMUH_U): Remove. | |
6594 | (lsx_vmuh_s_<lsxfmt>): Remove. | |
6595 | (lsx_vmuh_u_<lsxfmt>): Remove. | |
6596 | * config/loongarch/lasx.md (UNSPEC_LASX_XVMUH_S): Remove. | |
6597 | (UNSPEC_LASX_XVMUH_U): Remove. | |
6598 | (lasx_xvmuh_s_<lasxfmt>): Remove. | |
6599 | (lasx_xvmuh_u_<lasxfmt>): Remove. | |
6600 | * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vmuh_b): | |
6601 | Redefine to standard pattern name. | |
6602 | (CODE_FOR_lsx_vmuh_h): Likewise. | |
6603 | (CODE_FOR_lsx_vmuh_w): Likewise. | |
6604 | (CODE_FOR_lsx_vmuh_d): Likewise. | |
6605 | (CODE_FOR_lsx_vmuh_bu): Likewise. | |
6606 | (CODE_FOR_lsx_vmuh_hu): Likewise. | |
6607 | (CODE_FOR_lsx_vmuh_wu): Likewise. | |
6608 | (CODE_FOR_lsx_vmuh_du): Likewise. | |
6609 | (CODE_FOR_lasx_xvmuh_b): Likewise. | |
6610 | (CODE_FOR_lasx_xvmuh_h): Likewise. | |
6611 | (CODE_FOR_lasx_xvmuh_w): Likewise. | |
6612 | (CODE_FOR_lasx_xvmuh_d): Likewise. | |
6613 | (CODE_FOR_lasx_xvmuh_bu): Likewise. | |
6614 | (CODE_FOR_lasx_xvmuh_hu): Likewise. | |
6615 | (CODE_FOR_lasx_xvmuh_wu): Likewise. | |
6616 | (CODE_FOR_lasx_xvmuh_du): Likewise. | |
6617 | ||
6618 | 2023-11-29 Xi Ruoyao <xry111@xry111.site> | |
6619 | ||
6620 | PR target/112578 | |
6621 | * config/loongarch/lsx.md (UNSPEC_LSX_VFTINT_S, | |
6622 | UNSPEC_LSX_VFTINTRNE, UNSPEC_LSX_VFTINTRP, | |
6623 | UNSPEC_LSX_VFTINTRM, UNSPEC_LSX_VFRINTRNE_S, | |
6624 | UNSPEC_LSX_VFRINTRNE_D, UNSPEC_LSX_VFRINTRZ_S, | |
6625 | UNSPEC_LSX_VFRINTRZ_D, UNSPEC_LSX_VFRINTRP_S, | |
6626 | UNSPEC_LSX_VFRINTRP_D, UNSPEC_LSX_VFRINTRM_S, | |
6627 | UNSPEC_LSX_VFRINTRM_D): Remove. | |
6628 | (ILSX, FLSX): Move into ... | |
6629 | (VIMODE): Move into ... | |
6630 | (FRINT_S, FRINT_D): Remove. | |
6631 | (frint_pattern_s, frint_pattern_d, frint_suffix): Remove. | |
6632 | (lsx_vfrint_<flsxfmt>, lsx_vftint_s_<ilsxfmt>_<flsxfmt>, | |
6633 | lsx_vftintrne_w_s, lsx_vftintrne_l_d, lsx_vftintrp_w_s, | |
6634 | lsx_vftintrp_l_d, lsx_vftintrm_w_s, lsx_vftintrm_l_d, | |
6635 | lsx_vfrintrne_s, lsx_vfrintrne_d, lsx_vfrintrz_s, | |
6636 | lsx_vfrintrz_d, lsx_vfrintrp_s, lsx_vfrintrp_d, | |
6637 | lsx_vfrintrm_s, lsx_vfrintrm_d, | |
6638 | <FRINT_S:frint_pattern_s>v4sf2, | |
6639 | <FRINT_D:frint_pattern_d>v2df2, round<mode>2, | |
6640 | fix_trunc<mode>2): Remove. | |
6641 | * config/loongarch/lasx.md: Likewise. | |
6642 | * config/loongarch/simd.md: New file. | |
6643 | (ILSX, ILASX, FLSX, FLASX, VIMODE): ... here. | |
6644 | (IVEC, FVEC): New mode iterators. | |
6645 | (VIMODE): ... here. Extend it to work for all LSX/LASX vector | |
6646 | modes. | |
6647 | (x, wu, simd_isa, WVEC, vimode, simdfmt, simdifmt_for_f, | |
6648 | elebits): New mode attributes. | |
6649 | (UNSPEC_SIMD_FRINTRP, UNSPEC_SIMD_FRINTRZ, UNSPEC_SIMD_FRINT, | |
6650 | UNSPEC_SIMD_FRINTRM, UNSPEC_SIMD_FRINTRNE): New unspecs. | |
6651 | (SIMD_FRINT): New int iterator. | |
6652 | (simd_frint_rounding, simd_frint_pattern): New int attributes. | |
6653 | (<simd_isa>_<x>vfrint<simd_frint_rounding>_<simdfmt>): New | |
6654 | define_insn template for frint instructions. | |
6655 | (<simd_isa>_<x>vftint<simd_frint_rounding>_<simdifmt_for_f>_<simdfmt>): | |
6656 | Likewise, but for ftint instructions. | |
6657 | (<simd_frint_pattern><mode>2): New define_expand with | |
6658 | flag_fp_int_builtin_inexact checked. | |
6659 | (l<simd_frint_pattern><mode><vimode>2): Likewise. | |
6660 | (ftrunc<mode>2): New define_expand. It does not require | |
6661 | flag_fp_int_builtin_inexact. | |
6662 | (fix_trunc<mode><vimode>2): New define_insn_and_split. It does | |
6663 | not require flag_fp_int_builtin_inexact. | |
6664 | (include): Add lsx.md and lasx.md. | |
6665 | * config/loongarch/loongarch.md (include): Include simd.md, | |
6666 | instead of including lsx.md and lasx.md directly. | |
6667 | * config/loongarch/loongarch-builtins.cc | |
6668 | (CODE_FOR_lsx_vftint_w_s, CODE_FOR_lsx_vftint_l_d, | |
6669 | CODE_FOR_lasx_xvftint_w_s, CODE_FOR_lasx_xvftint_l_d): | |
6670 | Remove. | |
6671 | ||
6672 | 2023-11-29 Alexandre Oliva <oliva@adacore.com> | |
6673 | ||
6674 | * doc/extend.texi (hardbool): New type attribute. | |
6675 | * doc/invoke.texi (-ftrivial-auto-var-init): Document | |
6676 | representation vs values. | |
6677 | ||
6678 | 2023-11-29 Alexandre Oliva <oliva@adacore.com> | |
6679 | ||
6680 | * expr.cc (emit_block_move_hints): Take ctz of len. Obey | |
6681 | -finline-stringops. Use oriented or sized loop. | |
6682 | (emit_block_move): Take ctz of len, and pass it on. | |
6683 | (emit_block_move_via_sized_loop): New. | |
6684 | (emit_block_move_via_oriented_loop): New. | |
6685 | (emit_block_move_via_loop): Take incr. Move an incr-sized | |
6686 | block per iteration. | |
6687 | (emit_block_cmp_via_cmpmem): Take ctz of len. Obey | |
6688 | -finline-stringops. | |
6689 | (emit_block_cmp_via_loop): New. | |
6690 | * expr.h (emit_block_move): Add ctz of len defaulting to zero. | |
6691 | (emit_block_move_hints): Likewise. | |
6692 | (emit_block_cmp_hints): Likewise. | |
6693 | * builtins.cc (expand_builtin_memory_copy_args): Pass ctz of | |
6694 | len to emit_block_move_hints. | |
6695 | (try_store_by_multiple_pieces): Support starting with a loop. | |
6696 | (expand_builtin_memcmp): Pass ctz of len to | |
6697 | emit_block_cmp_hints. | |
6698 | (expand_builtin): Allow inline expansion of memset, memcpy, | |
6699 | memmove and memcmp if requested. | |
6700 | * common.opt (finline-stringops): New. | |
6701 | (ilsop_fn): New enum. | |
6702 | * flag-types.h (enum ilsop_fn): New. | |
6703 | * doc/invoke.texi (-finline-stringops): Add. | |
6704 | ||
6705 | 2023-11-29 Pan Li <pan2.li@intel.com> | |
6706 | ||
6707 | PR target/112743 | |
6708 | * config/riscv/riscv-string.cc (expand_block_move): Add | |
6709 | precondition check for exact_div. | |
6710 | ||
6711 | 2023-11-28 Roger Sayle <roger@nextmovesoftware.com> | |
6712 | ||
6713 | * config/arc/arc.md: Make output template whitespace consistent. | |
6714 | ||
6715 | 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> | |
6716 | ||
6717 | * varasm.cc (assemble_external_libcall): Refer in assert only ifdef | |
6718 | ASM_OUTPUT_EXTERNAL. | |
6719 | ||
6720 | 2023-11-28 Andrew Pinski <quic_apinski@quicinc.com> | |
6721 | ||
6722 | PR tree-optimization/112738 | |
6723 | * match.pd (`(nop_convert)-(convert)a`): Reject | |
6724 | when the outer type is boolean. | |
6725 | ||
6726 | 2023-11-28 Richard Biener <rguenther@suse.de> | |
6727 | ||
6728 | PR middle-end/112732 | |
6729 | * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET | |
6730 | of the newly built type. | |
6731 | ||
6732 | 2023-11-28 Uros Bizjak <ubizjak@gmail.com> | |
6733 | ||
6734 | PR target/112494 | |
6735 | * config/i386/i386.md (cmpstrnqi_1): Set FLAGS_REG to its previous | |
6736 | value when operand 2 equals zero. | |
6737 | (*cmpstrnqi_1): Ditto. | |
6738 | (*cmpstrnqi_1 peephole2): Ditto. | |
6739 | ||
6740 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6741 | ||
6742 | Revert: | |
6743 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6744 | ||
6745 | * config/bpf/bpf.cc (bpf_output_call): Report error in case the | |
6746 | function call is for a builtin. | |
6747 | (bpf_external_libcall): Added target hook to detect and report | |
6748 | error when other external calls that are not builtins. | |
6749 | ||
6750 | 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> | |
6751 | ||
6752 | PR target/109253 | |
6753 | * varasm.cc (pending_libcall_symbols): New variable. | |
6754 | (process_pending_assemble_externals): Process | |
6755 | pending_libcall_symbols. | |
6756 | (assemble_external_libcall): Defer emitting external libcall | |
6757 | symbols to process_pending_assemble_externals. | |
6758 | ||
6759 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6760 | ||
6761 | * btfout.cc (btf_calc_num_vbytes): Fixed logic for enum64. | |
6762 | (btf_asm_enum_const): Corrected logic for enum64 and smaller | |
6763 | than 4 bytes values. | |
6764 | ||
6765 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6766 | ||
6767 | * config/bpf/bpf.cc (bpf_output_call): Report error in case the | |
6768 | function call is for a builtin. | |
6769 | (bpf_external_libcall): Added target hook to detect and report | |
6770 | error when other external calls that are not builtins. | |
6771 | ||
6772 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6773 | ||
6774 | * config/bpf/bpf.cc (bpf_use_by_pieces_infrastructure_p): Added | |
6775 | function to bypass default behaviour. | |
6776 | * config/bpf/bpf.h (COMPARE_MAX_PIECES): Defined to 1024 bytes. | |
6777 | ||
6778 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6779 | ||
6780 | * config/bpf/core-builtins.cc (core_mark_as_access_index): | |
6781 | Corrected check. | |
6782 | ||
6783 | 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com> | |
6784 | ||
6785 | * config/bpf/core-builtins.cc | |
6786 | (bpf_resolve_overloaded_core_builtin): Removed call. | |
6787 | (execute_lower_bpf_core): Added all to remove_parser_plugin. | |
6788 | ||
6789 | 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6790 | ||
6791 | PR target/112694 | |
6792 | * config/riscv/riscv-v.cc (expand_vec_perm_const): Disallow poly size (1, 1) VLA SLP. | |
6793 | ||
6794 | 2023-11-28 Jakub Jelinek <jakub@redhat.com> | |
6795 | ||
6796 | PR tree-optimization/112719 | |
6797 | * match.pd (parity(X)^parity(Y) -> parity(X^Y)): Handle case of | |
6798 | mismatched types. | |
6799 | * gimple-match-exports.cc (build_call_internal): Add special-case for | |
6800 | bit query ifns on large/huge BITINT_TYPE before bitint lowering. | |
6801 | ||
6802 | 2023-11-28 Jakub Jelinek <jakub@redhat.com> | |
6803 | ||
6804 | PR tree-optimization/112719 | |
6805 | * match.pd (popcount (X) + popcount (Y) -> POPCOUNT (X | Y)): Deal | |
6806 | with argument types with different precisions. | |
6807 | ||
6808 | 2023-11-28 David Malcolm <dmalcolm@redhat.com> | |
6809 | ||
6810 | PR analyzer/109077 | |
6811 | * Makefile.in (PLUGIN_HEADERS): Add analyzer headers. | |
6812 | (install-plugin): Keep the directory structure for files in | |
6813 | "analyzer". | |
6814 | ||
6815 | 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
6816 | ||
6817 | PR target/112713 | |
6818 | * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix regression. | |
6819 | ||
6820 | 2023-11-28 David Malcolm <dmalcolm@redhat.com> | |
6821 | ||
6822 | * diagnostic-show-locus.cc (layout::maybe_add_location_range): | |
6823 | Don't print annotation lines for ranges when there's no column | |
6824 | info. | |
6825 | (selftest::test_one_liner_no_column): New. | |
6826 | (selftest::test_diagnostic_show_locus_one_liner): Call it. | |
6827 | ||
6828 | 2023-11-28 David Malcolm <dmalcolm@redhat.com> | |
6829 | ||
6830 | * diagnostic.cc (diagnostic_get_location_text): Convert to... | |
6831 | (diagnostic_context::get_location_text): ...this, and convert | |
6832 | return type from char * to label_text. | |
6833 | (diagnostic_build_prefix): Update for above change. | |
6834 | (default_diagnostic_start_span_fn): Likewise. | |
6835 | (selftest::assert_location_text): Likewise. | |
6836 | * diagnostic.h (diagnostic_context::get_location_text): New decl. | |
6837 | ||
6838 | 2023-11-27 Andrew Pinski <quic_apinski@quicinc.com> | |
6839 | ||
6840 | * config/aarch64/aarch64.cc (aarch64_if_then_else_costs): | |
6841 | Handle csinv/csinc case of 1/-1. | |
6842 | ||
6843 | 2023-11-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
6844 | Richard Sandiford <richard.sandiford@arm.com> | |
6845 | ||
6846 | PR middle-end/111754 | |
6847 | * fold-const.cc (fold_vec_perm_cst): Set result's encoding to sel's | |
6848 | encoding, and set res_nelts_per_pattern to 2 if sel contains stepped | |
6849 | sequence but input vectors do not. | |
6850 | (test_nunits_min_2): New test Case 8. | |
6851 | (test_nunits_min_4): New tests Case 8 and Case 9. | |
6852 | ||
6853 | 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com> | |
6854 | ||
6855 | * config/aarch64/aarch64.cc (aarch64_needs_frame_chain): Do not | |
6856 | force frame chain for eh_return. | |
6857 | ||
6858 | 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com> | |
6859 | ||
6860 | * config/aarch64/aarch64-protos.h (aarch64_eh_return_handler_rtx): | |
6861 | Remove. | |
6862 | * config/aarch64/aarch64.cc (aarch64_return_address_signing_enabled): | |
6863 | Sign return address even in functions with eh_return. | |
6864 | (aarch64_expand_epilogue): Conditionally return with br or ret. | |
6865 | (aarch64_eh_return_handler_rtx): Remove. | |
6866 | * config/aarch64/aarch64.h (EH_RETURN_TAKEN_RTX): Define. | |
6867 | (EH_RETURN_STACKADJ_RTX): Change to R5. | |
6868 | (EH_RETURN_HANDLER_RTX): Change to R6. | |
6869 | * df-scan.cc: Handle EH_RETURN_TAKEN_RTX. | |
6870 | * doc/tm.texi: Regenerate. | |
6871 | * doc/tm.texi.in: Document EH_RETURN_TAKEN_RTX. | |
6872 | * except.cc (expand_eh_return): Handle EH_RETURN_TAKEN_RTX. | |
6873 | ||
6874 | 2023-11-27 Thomas Schwinge <thomas@codesourcery.com> | |
6875 | ||
6876 | * config.gcc <amdgcn-*-amdhsa> (extra_gcc_objs): Don't set. | |
6877 | * config/gcn/driver-gcn.cc: Remove. | |
6878 | * config/gcn/gcn-hsa.h (ASM_SPEC, EXTRA_SPEC_FUNCTIONS): Remove | |
6879 | 'last_arg' spec function. | |
6880 | * config/gcn/t-gcn-hsa (driver-gcn.o): Remove. | |
6881 | ||
6882 | 2023-11-27 Thomas Schwinge <thomas@codesourcery.com> | |
6883 | ||
6884 | PR target/112669 | |
6885 | * config/gcn/gcn.opt (march=, mtune=): Tag as 'Negative' of | |
6886 | themselves. | |
6887 | ||
6888 | 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org> | |
6889 | ||
6890 | * config/i386/gnu.h: Use PIE_SPEC, add static-pie case. | |
6891 | * config/i386/gnu64.h: Use PIE_SPEC, add static-pie case. | |
6892 | ||
6893 | 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org> | |
6894 | ||
6895 | * config/i386/t-gnu64: New file. | |
6896 | * config.gcc [x86_64-*-gnu*]: Add i386/t-gnu64 to | |
6897 | tmake_file. | |
6898 | ||
6899 | 2023-11-27 Richard Sandiford <richard.sandiford@arm.com> | |
6900 | ||
6901 | PR target/106326 | |
6902 | * config/aarch64/aarch64-sve-builtins.h (is_ptrue): Declare. | |
6903 | * config/aarch64/aarch64-sve-builtins.cc (is_ptrue): New function. | |
6904 | (gimple_folder::redirect_pred_x): Likewise. | |
6905 | (gimple_folder::fold): Use it. | |
6906 | ||
6907 | 2023-11-27 Richard Sandiford <richard.sandiford@arm.com> | |
6908 | ||
6909 | * config/aarch64/aarch64-sve-builtins.h (vector_cst_all_same): Declare. | |
6910 | * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same): New | |
6911 | function, a generalized replacement of... | |
6912 | * config/aarch64/aarch64-sve-builtins-base.cc | |
6913 | (svlast_impl::vect_all_same): ...this. | |
6914 | (svlast_impl::fold): Update accordingly. | |
6915 | ||
6916 | 2023-11-27 Richard Biener <rguenther@suse.de> | |
6917 | ||
6918 | PR tree-optimization/112653 | |
6919 | * gimple-ssa.h (gimple_df): Add escaped_return solution. | |
6920 | * tree-ssa.cc (init_tree_ssa): Reset it. | |
6921 | (delete_tree_ssa): Likewise. | |
6922 | * tree-ssa-structalias.cc (escaped_return_id): New. | |
6923 | (find_func_aliases): Handle non-IPA return stmts by | |
6924 | adding to ESCAPED_RETURN. | |
6925 | (set_uids_in_ptset): Adjust HEAP escaping to also cover | |
6926 | escapes through return. | |
6927 | (init_base_vars): Initialize ESCAPED_RETURN. | |
6928 | (compute_points_to_sets): Replace ESCAPED post-processing | |
6929 | with recording the ESCAPED_RETURN solution. | |
6930 | * tree-ssa-alias.cc (ref_may_alias_global_p_1): Check | |
6931 | the ESCAPED_RETUNR solution. | |
6932 | (dump_alias_info): Dump it. | |
6933 | * cfgexpand.cc (update_alias_info_with_stack_vars): Update it. | |
6934 | * ipa-icf.cc (sem_item_optimizer::fixup_points_to_sets): | |
6935 | Likewise. | |
6936 | * tree-inline.cc (expand_call_inline): Reset it. | |
6937 | * tree-parloops.cc (parallelize_loops): Likewise. | |
6938 | * tree-sra.cc (maybe_add_sra_candidate): Check it. | |
6939 | ||
6940 | 2023-11-27 Richard Biener <rguenther@suse.de> | |
6941 | Richard Sandiford <richard.sandiford@arm.com> | |
6942 | ||
6943 | PR tree-optimization/112661 | |
6944 | * tree-vect-slp.cc (vect_get_and_check_slp_defs): Defer duplicate-and- | |
6945 | interleave test to... | |
6946 | (vect_build_slp_tree_2): ...here, once we have all the operands. | |
6947 | Skip the test for uniform vectors. | |
6948 | (vect_create_constant_vectors): Detect uniform vectors. Avoid | |
6949 | redundant conversions in that case. Use gimple_build_vector_from_val | |
6950 | to build the vector. | |
6951 | ||
6952 | 2023-11-27 Richard Sandiford <richard.sandiford@arm.com> | |
6953 | ||
6954 | * attribs.cc (excl_hash_traits): Delete. | |
6955 | (test_attribute_exclusions): Use pair_hash and nofree_string_hash | |
6956 | instead. | |
6957 | ||
6958 | 2023-11-27 Andrew Stubbs <ams@codesourcery.com> | |
6959 | ||
6960 | * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Disallow TImode. | |
6961 | ||
6962 | 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
6963 | ||
6964 | * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT): | |
6965 | Add missing builtin type. | |
6966 | ||
6967 | 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
6968 | ||
6969 | * config/s390/s390-builtin-types.def: Remove types. | |
6970 | * config/s390/s390-builtins.def (O_U64): Remove 64-bit literal support. | |
6971 | Don't restrict s390_vec_rli and s390_verll[bhfg] to immediates. | |
6972 | * config/s390/s390.cc (s390_const_operand_ok): Remove 64-bit | |
6973 | literal support. | |
6974 | ||
6975 | 2023-11-27 Alex Coplan <alex.coplan@arm.com> | |
6976 | Iain Sandoe <iain@sandoe.co.uk> | |
6977 | ||
6978 | PR c++/60512 | |
6979 | * doc/cpp.texi: Document __has_{feature,extension}. | |
6980 | ||
6981 | 2023-11-27 Richard Biener <rguenther@suse.de> | |
6982 | ||
6983 | PR tree-optimization/112706 | |
6984 | * match.pd (ptr + o ==/!=/- ptr + o'): New patterns. | |
6985 | ||
6986 | 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
6987 | ||
6988 | * config/s390/s390-builtin-types.def: Add/remove types. | |
6989 | * config/s390/s390-builtins.def | |
6990 | (s390_vclfnhs,s390_vclfnls,s390_vcrnfs,s390_vcfn,s390_vcnf): | |
6991 | Replace type V8HI with UV8HI. | |
6992 | ||
6993 | 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
6994 | ||
6995 | * config/s390/s390-builtins.def | |
6996 | (s390_vcefb,s390_vcdgb,s390_vcelfb,s390_vcdlgb,s390_vcfeb,s390_vcgdb, | |
6997 | s390_vclfeb,s390_vclgdb): Remove flags for non-existing operands | |
6998 | 2 and 3. | |
6999 | ||
7000 | 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
7001 | ||
7002 | * config/s390/s390.md (*cmphi_ccu): For immediate operand 1 make | |
7003 | use of constraint n instead of D and chop of high bits in the | |
7004 | output template. | |
7005 | ||
7006 | 2023-11-27 Jakub Jelinek <jakub@redhat.com> | |
7007 | ||
7008 | PR target/112300 | |
7009 | * config.gcc (mips*-sde-elf*): Append to tm_defines rather than | |
7010 | overwriting them. | |
7011 | ||
7012 | 2023-11-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7013 | ||
7014 | * config/riscv/autovec.md | |
7015 | (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): | |
7016 | Remove gather_scatter_valid_offset_mode_p. | |
7017 | (mask_len_gather_load<mode><mode>): Ditto. | |
7018 | (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto. | |
7019 | (mask_len_scatter_store<mode><mode>): Ditto. | |
7020 | * config/riscv/predicates.md (const_1_or_8_operand): New predicate. | |
7021 | (vector_gs_scale_operand_64): Remove. | |
7022 | * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): Remove. | |
7023 | * config/riscv/riscv-v.cc (expand_gather_scatter): Refine code. | |
7024 | (gather_scatter_valid_offset_mode_p): Remove. | |
7025 | * config/riscv/vector-iterators.md: Fix iterator bugs. | |
7026 | ||
7027 | 2023-11-27 Tsukasa OI <research_trasio@irq.a4lg.com> | |
7028 | ||
7029 | * common/config/riscv/riscv-common.cc | |
7030 | (riscv_ext_version_table): Set version to ratified 2.0. | |
7031 | (riscv_subset_list::parse_std_ext): Allow RV64E. | |
7032 | * config.gcc: Parse base ISA 'rv64e' and ABI 'lp64e'. | |
7033 | * config/riscv/arch-canonicalize: Parse base ISA 'rv64e'. | |
7034 | * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): | |
7035 | Define different macro per XLEN. Add handling for ABI_LP64E. | |
7036 | * config/riscv/riscv-d.cc (riscv_d_handle_target_float_abi): | |
7037 | Add handling for ABI_LP64E. | |
7038 | * config/riscv/riscv-opts.h (enum riscv_abi_type): Add ABI_LP64E. | |
7039 | * config/riscv/riscv.cc (riscv_option_override): Enhance error | |
7040 | handling to support RV64E and LP64E. | |
7041 | (riscv_conditional_register_usage): Change "RV32E" in a comment | |
7042 | to "RV32E/RV64E". | |
7043 | * config/riscv/riscv.h | |
7044 | (UNITS_PER_FP_ARG): Add handling for ABI_LP64E. | |
7045 | (STACK_BOUNDARY): Ditto. | |
7046 | (ABI_STACK_BOUNDARY): Ditto. | |
7047 | (MAX_ARGS_IN_REGISTERS): Ditto. | |
7048 | (ABI_SPEC): Add support for "lp64e". | |
7049 | * config/riscv/riscv.opt: Parse -mabi=lp64e as ABI_LP64E. | |
7050 | * doc/invoke.texi: Add documentation of the LP64E ABI. | |
7051 | ||
7052 | 2023-11-27 Jose E. Marchesi <jose.marchesi@oracle.com> | |
7053 | ||
7054 | * config/bpf/bpf-helpers.h: Remove. | |
7055 | * config.gcc: Adapt accordingly. | |
7056 | ||
7057 | 2023-11-27 Guo Jie <guojie@loongson.cn> | |
7058 | ||
7059 | * config/loongarch/loongarch.cc (loongarch_split_plus_constant): | |
7060 | avoid left shift of negative value -0x8000. | |
7061 | ||
7062 | 2023-11-27 Guo Jie <guojie@loongson.cn> | |
7063 | ||
7064 | * config/loongarch/loongarch.cc | |
7065 | (enum loongarch_load_imm_method): Add new method. | |
7066 | (loongarch_build_integer): Add relevant implementations for | |
7067 | new method. | |
7068 | (loongarch_move_integer): Ditto. | |
7069 | ||
7070 | 2023-11-26 Alexander Monakov <amonakov@ispras.ru> | |
7071 | ||
7072 | * sort.cc: Use 'sorting networks' in comments. | |
7073 | ||
7074 | 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7075 | ||
7076 | PR target/112599 | |
7077 | * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Add slidedown. | |
7078 | (vlmax_ta_p): Ditto. | |
7079 | (pass_avlprop::get_vlmax_ta_preferred_avl): Ditto. | |
7080 | ||
7081 | 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7082 | ||
7083 | * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): Fix typo. | |
7084 | (avl_can_be_propagated_p): Ditto. | |
7085 | (vlmax_ta_p): Ditto. | |
7086 | ||
7087 | 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com> | |
7088 | ||
7089 | PR other/69374 | |
7090 | * doc/install.texi (Downloading the source): Sort the list of | |
7091 | front ends and add D, Go, and Modula-2. | |
7092 | ||
7093 | 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com> | |
7094 | ||
7095 | PR target/69374 | |
7096 | * doc/install.texi (Specific) <*-*-freebsd*>: Remove older | |
7097 | contents referencing GCC 4.x. | |
7098 | ||
7099 | 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com> | |
7100 | ||
7101 | * doc/standards.texi (Standards): Update ISO C++ reference. | |
7102 | ||
7103 | 2023-11-25 Jakub Jelinek <jakub@redhat.com> | |
7104 | ||
7105 | PR target/111408 | |
7106 | * config/i386/i386.md (*jcc_bt<mode>_mask, | |
7107 | *jcc_bt<SWI48:mode>_mask_1): Add (const_int 0) as expected | |
7108 | second operand of bt_comparison_operator. | |
7109 | ||
7110 | 2023-11-25 Andrew Pinski <pinskia@gmail.com> | |
7111 | Jakub Jelinek <jakub@redhat.com> | |
7112 | ||
7113 | PR target/109977 | |
7114 | * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore> | |
7115 | rather than %<vw> for alternative with r constraint on input operand. | |
7116 | ||
7117 | 2023-11-24 Tobias Burnus <tobias@codesourcery.com> | |
7118 | ||
7119 | * doc/install.texi (amdgcn-*-amdhsa): Fix URL to ROCm; | |
7120 | change 'in the future' to 'in LLVM 18'. | |
7121 | ||
7122 | 2023-11-24 John David Anglin <danglin@gcc.gnu.org> | |
7123 | ||
7124 | * config/pa/pa.cc (pa_emit_move_sequence): Use INT14_OK_STRICT | |
7125 | in a couple of places. | |
7126 | ||
7127 | 2023-11-24 Martin Jambor <mjambor@suse.cz> | |
7128 | ||
7129 | PR middle-end/109849 | |
7130 | * tree-sra.cc (passed_by_ref_in_call): New. | |
7131 | (sra_initialize): Allocate passed_by_ref_in_call. | |
7132 | (sra_deinitialize): Free passed_by_ref_in_call. | |
7133 | (create_access): Add decl pool candidates only if they are not | |
7134 | already candidates. | |
7135 | (build_access_from_expr_1): Bail out on ADDR_EXPRs. | |
7136 | (build_access_from_call_arg): New function. | |
7137 | (asm_visit_addr): Rename to scan_visit_addr, change the | |
7138 | disqualification dump message. | |
7139 | (scan_function): Check taken addresses for all non-call statements, | |
7140 | including phi nodes. Process all call arguments, including the static | |
7141 | chain, build_access_from_call_arg. | |
7142 | (maybe_add_sra_candidate): Relax need_to_live_in_memory check to allow | |
7143 | non-escaped local variables. | |
7144 | (sort_and_splice_var_accesses): Disallow smaller-than-precision | |
7145 | replacements for aggregates passed by reference to functions. | |
7146 | (sra_modify_expr): Use a separate stmt iterator for adding satements | |
7147 | before the processed statement and after it. | |
7148 | (enum out_edge_check): New type. | |
7149 | (abnormal_edge_after_stmt_p): New function. | |
7150 | (sra_modify_call_arg): New function. | |
7151 | (sra_modify_assign): Adjust calls to sra_modify_expr. | |
7152 | (sra_modify_function_body): Likewise, use sra_modify_call_arg to | |
7153 | process call arguments, including the static chain. | |
7154 | ||
7155 | 2023-11-24 Uros Bizjak <ubizjak@gmail.com> | |
7156 | ||
7157 | PR target/112686 | |
7158 | * config/i386/i386.cc (ix86_expand_split_stack_prologue): Load | |
7159 | function address to a register for ix86_cmodel == CM_LARGE. | |
7160 | ||
7161 | 2023-11-24 Tobias Burnus <tobias@codesourcery.com> | |
7162 | ||
7163 | * doc/invoke.texi (-Wopenmp): Add. | |
7164 | * gimplify.cc (gimplify_omp_for): Add OPT_Wopenmp to warning_at. | |
7165 | * omp-expand.cc (expand_omp_ordered_sink): Likewise. | |
7166 | * omp-general.cc (omp_check_context_selector): Likewise. | |
7167 | * omp-low.cc (scan_omp_for, check_omp_nesting_restrictions, | |
7168 | lower_omp_ordered_clauses): Likewise. | |
7169 | * omp-simd-clone.cc (simd_clone_clauses_extract): Likewise. | |
7170 | ||
7171 | 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7172 | ||
7173 | PR target/112694 | |
7174 | * config/riscv/riscv-v.cc (preferred_simd_mode): Allow poly_int (1,1) vectors. | |
7175 | ||
7176 | 2023-11-24 Alexander Monakov <amonakov@ispras.ru> | |
7177 | ||
7178 | * config.in: Regenerate. | |
7179 | * configure: Regenerate. | |
7180 | * configure.ac: Delete manual checks for old Valgrind headers. | |
7181 | * system.h (VALGRIND_MAKE_MEM_NOACCESS): Delete. | |
7182 | (VALGRIND_MAKE_MEM_DEFINED): Delete. | |
7183 | (VALGRIND_MAKE_MEM_UNDEFINED): Delete. | |
7184 | (VALGRIND_MALLOCLIKE_BLOCK): Delete. | |
7185 | (VALGRIND_FREELIKE_BLOCK): Delete. | |
7186 | ||
7187 | 2023-11-24 Jakub Jelinek <jakub@redhat.com> | |
7188 | ||
7189 | PR target/112681 | |
7190 | * config/i386/i386-expand.cc (ix86_expand_branch): Use | |
7191 | ix86_expand_vector_logical_operator to expand vector XOR rather than | |
7192 | gen_rtx_SET on gen_rtx_XOR. | |
7193 | ||
7194 | 2023-11-24 Alex Coplan <alex.coplan@arm.com> | |
7195 | ||
7196 | * rtl-ssa/access-utils.h (filter_accesses): New. | |
7197 | (remove_regno_access): New. | |
7198 | (check_remove_regno_access): New. | |
7199 | * rtl-ssa/accesses.cc (rtl_ssa::remove_note_accesses_base): Use | |
7200 | new filter_accesses helper. | |
7201 | ||
7202 | 2023-11-24 Alex Coplan <alex.coplan@arm.com> | |
7203 | ||
7204 | * rtl-ssa/accesses.cc (function_info::create_set): New. | |
7205 | * rtl-ssa/accesses.h (access_info::is_temporary): New. | |
7206 | * rtl-ssa/changes.cc (move_insn): Handle new (temporary) insns. | |
7207 | (function_info::finalize_new_accesses): Handle new/temporary | |
7208 | user-created accesses. | |
7209 | (function_info::apply_changes_to_insn): Ensure m_is_temp flag | |
7210 | on new insns gets cleared. | |
7211 | (function_info::change_insns): Handle new/temporary insns. | |
7212 | (function_info::create_insn): New. | |
7213 | * rtl-ssa/changes.h (class insn_change): Make function_info a | |
7214 | friend class. | |
7215 | * rtl-ssa/functions.h (function_info): Declare new entry points: | |
7216 | create_set, create_insn. Declare new change_alloc helper. | |
7217 | * rtl-ssa/insns.cc (insn_info::print_full): Identify temporary insns in | |
7218 | dump. | |
7219 | * rtl-ssa/insns.h (insn_info): Add new m_is_temp flag and accompanying | |
7220 | is_temporary accessor. | |
7221 | * rtl-ssa/internals.inl (insn_info::insn_info): Initialize m_is_temp to | |
7222 | false. | |
7223 | * rtl-ssa/member-fns.inl (function_info::change_alloc): New. | |
7224 | * rtl-ssa/movement.h (restrict_movement_for_defs_ignoring): Add | |
7225 | handling for temporary defs. | |
7226 | ||
7227 | 2023-11-24 Jakub Jelinek <jakub@redhat.com> | |
7228 | ||
7229 | PR tree-optimization/112673 | |
7230 | * match.pd (bit_field_ref (vce @0) -> bit_field_ref @0): Only simplify | |
7231 | if either @0 doesn't have scalar integral type or if it has mode | |
7232 | precision. | |
7233 | ||
7234 | 2023-11-24 Jakub Jelinek <jakub@redhat.com> | |
7235 | ||
7236 | PR middle-end/112679 | |
7237 | * gimple-lower-bitint.cc (gimple_lower_bitint): Also stop first loop on | |
7238 | floating point SSA_NAME set in FLOAT_EXPR assignment from BITINT_TYPE | |
7239 | INTEGER_CST. Set has_large_huge for those if that BITINT_TYPE is large | |
7240 | or huge. Set kind to such FLOAT_EXPR assignment rhs1 BITINT_TYPE's kind. | |
7241 | ||
7242 | 2023-11-24 Richard Biener <rguenther@suse.de> | |
7243 | ||
7244 | PR tree-optimization/112677 | |
7245 | * tree-vect-loop.cc (vectorizable_reduction): Use alloca | |
7246 | to allocate vectype_op. | |
7247 | ||
7248 | 2023-11-24 Haochen Gui <guihaoc@gcc.gnu.org> | |
7249 | ||
7250 | * expr.cc (by_pieces_ninsns): Include by pieces compare when | |
7251 | do the adjustment for overlap operations. Replace mov_optab | |
7252 | checks with gcc assertion. | |
7253 | ||
7254 | 2023-11-24 Jakub Jelinek <jakub@redhat.com> | |
7255 | ||
7256 | PR middle-end/112668 | |
7257 | * gimple-iterator.h (gsi_end, gsi_end_bb): New inline functions. | |
7258 | * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): After | |
7259 | temporarily adding statements after m_init_gsi, update m_init_gsi | |
7260 | such that later additions after it will be after the added statements. | |
7261 | (bitint_large_huge::handle_load): Likewise. When splitting | |
7262 | gsi_bb (m_init_gsi) basic block, update m_preheader_bb if needed | |
7263 | and update saved m_gsi as well if needed. | |
7264 | (bitint_large_huge::lower_mergeable_stmt, | |
7265 | bitint_large_huge::lower_comparison_stmt, | |
7266 | bitint_large_huge::lower_mul_overflow, | |
7267 | bitint_large_huge::lower_bit_query): Use gsi_end_bb. | |
7268 | ||
7269 | 2023-11-24 Jakub Jelinek <jakub@redhat.com> | |
7270 | ||
7271 | PR c++/112619 | |
7272 | * tree.cc (try_catch_may_fallthru): If second operand of | |
7273 | TRY_CATCH_EXPR is not a STATEMENT_LIST, handle it as if it was a | |
7274 | STATEMENT_LIST containing a single statement. | |
7275 | ||
7276 | 2023-11-24 Richard Biener <rguenther@suse.de> | |
7277 | ||
7278 | PR tree-optimization/112344 | |
7279 | * tree-chrec.cc (chrec_apply): Only use an unsigned add | |
7280 | when the overall increment doesn't fit the signed type. | |
7281 | ||
7282 | 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7283 | ||
7284 | PR target/112599 | |
7285 | * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): New function. | |
7286 | (expand_vec_perm_const_1): Add new optimization. | |
7287 | ||
7288 | 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7289 | ||
7290 | * config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4. | |
7291 | ||
7292 | 2023-11-24 Haochen Jiang <haochen.jiang@intel.com> | |
7293 | ||
7294 | PR target/112643 | |
7295 | * config/i386/driver-i386.cc (check_avx10_avx512_features): | |
7296 | Renamed to ... | |
7297 | (check_avx512_features): this and remove avx10 check. | |
7298 | (host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to | |
7299 | avoid emitting warnings when building GCC with native arch. | |
7300 | * config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for | |
7301 | 128/256 bit builtin for AVX512VP2INTERSECT. | |
7302 | * config/i386/i386-options.cc (ix86_option_override_internal): | |
7303 | Also check whether the AVX512 flags is set when trying to reset. | |
7304 | * config/i386/i386.h | |
7305 | (PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512. | |
7306 | (PTA_ZNVER4): Ditto. | |
7307 | ||
7308 | 2023-11-23 Georg-Johann Lay <avr@gjlay.de> | |
7309 | ||
7310 | PR target/86776 | |
7311 | * config/avr/avr.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define | |
7312 | to speculation_safe_value_not_needed. | |
7313 | ||
7314 | 2023-11-23 Marek Polacek <polacek@redhat.com> | |
7315 | ||
7316 | * common.opt (Whardened, fhardened): New options. | |
7317 | * config.in: Regenerate. | |
7318 | * config/bpf/bpf.cc: Include "opts.h". | |
7319 | (bpf_option_override): If flag_stack_protector_set_by_fhardened_p, do | |
7320 | not inform that -fstack-protector does not work. | |
7321 | * config/i386/i386-options.cc (ix86_option_override_internal): When | |
7322 | -fhardened, maybe enable -fcf-protection=full. | |
7323 | * config/linux-protos.h (linux_fortify_source_default_level): Declare. | |
7324 | * config/linux.cc (linux_fortify_source_default_level): New. | |
7325 | * config/linux.h (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Redefine. | |
7326 | * configure: Regenerate. | |
7327 | * configure.ac: Check if the linker supports '-z now' and '-z relro'. | |
7328 | Check if -fhardened is supported on $target_os. | |
7329 | * doc/invoke.texi: Document -fhardened and -Whardened. | |
7330 | * doc/tm.texi: Regenerate. | |
7331 | * doc/tm.texi.in (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Add. | |
7332 | * gcc.cc (driver_handle_option): Remember if any link options or -static | |
7333 | were specified on the command line. | |
7334 | (process_command): When -fhardened, maybe enable -pie and | |
7335 | -Wl,-z,relro,-z,now. | |
7336 | * opts.cc (flag_stack_protector_set_by_fhardened_p): New global. | |
7337 | (finish_options): When -fhardened, enable | |
7338 | -ftrivial-auto-var-init=zero and -fstack-protector-strong. | |
7339 | (print_help_hardened): New. | |
7340 | (print_help): Call it. | |
7341 | * opts.h (flag_stack_protector_set_by_fhardened_p): Declare. | |
7342 | * target.def (fortify_source_default_level): New target hook. | |
7343 | * targhooks.cc (default_fortify_source_default_level): New. | |
7344 | * targhooks.h (default_fortify_source_default_level): Declare. | |
7345 | * toplev.cc (process_options): When -fhardened, enable | |
7346 | -fstack-clash-protection. If flag_stack_protector_set_by_fhardened_p, | |
7347 | do not warn that -fstack-protector not supported for this target. | |
7348 | Don't enable -fhardened when !HAVE_FHARDENED_SUPPORT. | |
7349 | ||
7350 | 2023-11-23 Christophe Lyon <christophe.lyon@linaro.org> | |
7351 | ||
7352 | * config/arm/arm-mve-builtins-functions.h | |
7353 | (full_width_access::memory_vector_mode): Add default clause. | |
7354 | ||
7355 | 2023-11-23 Uros Bizjak <ubizjak@gmail.com> | |
7356 | ||
7357 | PR target/112672 | |
7358 | * config/i386/i386.md (parityhi2): | |
7359 | Use temporary register in the call to gen_parityhi2_cmp. | |
7360 | ||
7361 | 2023-11-23 Uros Bizjak <ubizjak@gmail.com> | |
7362 | ||
7363 | PR target/89316 | |
7364 | * config/i386/i386.cc (ix86_expand_split_stack_prologue): Obtain | |
7365 | scratch regno when flag_force_indirect_call is set. On 64-bit | |
7366 | targets, call __morestack_large_model when flag_force_indirect_call | |
7367 | is set and on 32-bit targets with -fpic, manually expand PIC sequence | |
7368 | to call __morestack. Move the function address to an indirect | |
7369 | call scratch register. | |
7370 | ||
7371 | 2023-11-23 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
7372 | ||
7373 | PR tree-optimization/112678 | |
7374 | * tree-profile.cc (tree_profiling): Do not use atomic operations | |
7375 | for -fprofile-update=single. | |
7376 | ||
7377 | 2023-11-23 Juergen Christ <jchrist@linux.ibm.com> | |
7378 | ||
7379 | * config/s390/s390-c.cc (s390_cpu_cpp_builtins): Define | |
7380 | __GCC_ASM_FLAG_OUTPUTS__. | |
7381 | * config/s390/s390.cc (s390_canonicalize_comparison): More | |
7382 | UNSPEC_CC_TO_INT cases. | |
7383 | (s390_md_asm_adjust): Implement flags output. | |
7384 | * config/s390/s390.md (ccstore4): Allow mask operands. | |
7385 | * doc/extend.texi: Document flags output. | |
7386 | ||
7387 | 2023-11-23 Juergen Christ <jchrist@linux.ibm.com> | |
7388 | ||
7389 | * config/s390/s390.md: Split TImode loads. | |
7390 | ||
7391 | 2023-11-23 Juergen Christ <jchrist@linux.ibm.com> | |
7392 | ||
7393 | * config/s390/vector.md: (*vec_extract) Fix. | |
7394 | ||
7395 | 2023-11-23 Di Zhao <dizhao@os.amperecomputing.com> | |
7396 | ||
7397 | * tree-ssa-reassoc.cc (get_reassociation_width): check | |
7398 | for loop dependent FMAs. | |
7399 | (reassociate_bb): For 3 ops, refine the condition to call | |
7400 | swap_ops_for_binary_stmt. | |
7401 | ||
7402 | 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7403 | ||
7404 | * config/riscv/riscv-protos.h (emit_vec_extract): New function. | |
7405 | * config/riscv/riscv-v.cc (emit_vec_extract): Ditto. | |
7406 | * config/riscv/riscv.cc (riscv_legitimize_move): Refine codes. | |
7407 | ||
7408 | 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7409 | ||
7410 | PR target/112599 | |
7411 | PR target/112670 | |
7412 | * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): New function. | |
7413 | (vlmax_ta_p): Disable vrgather AVL propagation. | |
7414 | ||
7415 | 2023-11-23 Jakub Jelinek <jakub@redhat.com> | |
7416 | ||
7417 | PR middle-end/112336 | |
7418 | * expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision | |
7419 | if modifier is EXPAND_INITIALIZER. | |
7420 | ||
7421 | 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7422 | ||
7423 | * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Refine codes. | |
7424 | (emit_vlmax_masked_gather_mu_insn): Ditto. | |
7425 | (modulo_sel_indices): Ditto. | |
7426 | (expand_vec_perm): Ditto. | |
7427 | (shuffle_generic_patterns): Ditto. | |
7428 | ||
7429 | 2023-11-23 Jakub Jelinek <jakub@redhat.com> | |
7430 | ||
7431 | * doc/extend.texi (__builtin_stdc_bit_ceil, __builtin_stdc_bit_floor, | |
7432 | __builtin_stdc_bit_width, __builtin_stdc_count_ones, | |
7433 | __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one, | |
7434 | __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one, | |
7435 | __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit, | |
7436 | __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros, | |
7437 | __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros): Document. | |
7438 | ||
7439 | 2023-11-23 Richard Biener <rguenther@suse.de> | |
7440 | ||
7441 | PR middle-end/32667 | |
7442 | * doc/md.texi (cpymem): Document that exact overlap of source | |
7443 | and destination needs to work. | |
7444 | * doc/standards.texi (ffreestanding): Mention memcpy is required | |
7445 | to handle the exact overlap case. | |
7446 | ||
7447 | 2023-11-23 Jakub Jelinek <jakub@redhat.com> | |
7448 | ||
7449 | PR c++/110348 | |
7450 | * doc/invoke.texi (-Wno-c++26-extensions): Document. | |
7451 | ||
7452 | 2023-11-23 Manolis Tsamis <manolis.tsamis@vrull.eu> | |
7453 | ||
7454 | * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code. | |
7455 | ||
7456 | 2023-11-23 Pan Li <pan2.li@intel.com> | |
7457 | ||
7458 | PR target/111720 | |
7459 | * dse.cc (get_stored_val): Allow vector mode if read size is | |
7460 | less than or equal to stored size. | |
7461 | ||
7462 | 2023-11-23 Costas Argyris <costas.argyris@gmail.com> | |
7463 | ||
7464 | * configure.ac: Handle new --enable-win32-utf8-manifest | |
7465 | option. | |
7466 | * config.host: allow win32 utf8 manifest to be disabled | |
7467 | by user. | |
7468 | * configure: Regenerate. | |
7469 | ||
7470 | 2023-11-22 John David Anglin <danglin@gcc.gnu.org> | |
7471 | ||
7472 | PR target/112592 | |
7473 | * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define. | |
7474 | ||
7475 | 2023-11-22 John David Anglin <danglin@gcc.gnu.org> | |
7476 | ||
7477 | PR target/112617 | |
7478 | * config/pa/predicates.md (integer_store_memory_operand): Return | |
7479 | true for REG+D addresses when reload_in_progress is true. | |
7480 | ||
7481 | 2023-11-22 Richard Biener <rguenther@suse.de> | |
7482 | ||
7483 | PR tree-optimization/112344 | |
7484 | * tree-chrec.cc (chrec_apply): Perform the overall increment | |
7485 | calculation and increment in an unsigned type. | |
7486 | ||
7487 | 2023-11-22 Andrew Stubbs <ams@codesourcery.com> | |
7488 | ||
7489 | * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a | |
7490 | reload is required. | |
7491 | ||
7492 | 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com> | |
7493 | ||
7494 | PR rtl-optimization/112610 | |
7495 | * ira-costs.cc: (find_costs_and_classes): Remove arg. | |
7496 | Use ira_dump_file for printing. | |
7497 | (print_allocno_costs, print_pseudo_costs): Ditto. | |
7498 | (ira_costs): Adjust call of find_costs_and_classes. | |
7499 | (ira_set_pseudo_classes): Set up and restore ira_dump_file. | |
7500 | ||
7501 | 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7502 | ||
7503 | PR target/112598 | |
7504 | * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug. | |
7505 | ||
7506 | 2023-11-22 Tamar Christina <tamar.christina@arm.com> | |
7507 | ||
7508 | * config/aarch64/aarch64-simd.md | |
7509 | (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip, | |
7510 | aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into... | |
7511 | (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip, | |
7512 | "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This. | |
7513 | * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove. | |
7514 | (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2. | |
7515 | ||
7516 | 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org> | |
7517 | ||
7518 | * config/arm/arm-mve-builtins.cc | |
7519 | (function_resolver::infer_pointer_type): Remove spurious line. | |
7520 | ||
7521 | 2023-11-22 Xi Ruoyao <xry111@xry111.site> | |
7522 | ||
7523 | * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the | |
7524 | selector VIMODE. | |
7525 | * config/loongarch/loongarch.cc (loongarch_expand_vec_perm): | |
7526 | Use the mode of the selector (instead of the shuffled vector) | |
7527 | for truncating it. Operate on subregs in the selector mode if | |
7528 | the shuffled vector has a different mode (i. e. it's a | |
7529 | floating-point vector). | |
7530 | ||
7531 | 2023-11-22 Hongyu Wang <hongyu.wang@intel.com> | |
7532 | ||
7533 | * config/i386/i386.md (push2_di): Adjust operand order for AT&T | |
7534 | syntax. | |
7535 | (pop2_di): Likewise. | |
7536 | (push2p_di): Likewise. | |
7537 | (pop2p_di): Likewise. | |
7538 | ||
7539 | 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7540 | ||
7541 | PR target/112598 | |
7542 | * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority. | |
7543 | (shuffle_generic_patterns): Fix permutation indice bug. | |
7544 | * config/riscv/vector-iterators.md: Fix VEI16 bug. | |
7545 | ||
7546 | 2023-11-22 liuhongt <hongtao.liu@intel.com> | |
7547 | ||
7548 | * config/i386/sse.md (cbranch<mode>4): Extend to Vector | |
7549 | HI/QImode. | |
7550 | ||
7551 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7552 | ||
7553 | PR target/111815 | |
7554 | * config/vax/vax.cc (index_term_p): Only accept the index scaler | |
7555 | as the RHS operand to ASHIFT. | |
7556 | ||
7557 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7558 | ||
7559 | * config/riscv/predicates.md (order_operator): Remove predicate. | |
7560 | * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly. | |
7561 | * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc) | |
7562 | (cstore<mode>4): Likewise. | |
7563 | ||
7564 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7565 | ||
7566 | * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add | |
7567 | `invert_ptr' parameter. | |
7568 | * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE | |
7569 | inversion handling. | |
7570 | (riscv_expand_float_scc): Pass `invert_ptr' through to | |
7571 | `riscv_emit_float_compare'. | |
7572 | (riscv_expand_conditional_move): Pass `&invert' to | |
7573 | `riscv_expand_float_scc'. | |
7574 | * config/riscv/riscv.md (add<mode>cc): Likewise. | |
7575 | ||
7576 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7577 | ||
7578 | * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle | |
7579 | separately. | |
7580 | <EQ, LE, LT, GE, GT>: Return operands supplied as is. | |
7581 | (riscv_emit_binary): Call `riscv_emit_binary' directly rather | |
7582 | than going through a temporary register for word-mode targets. | |
7583 | (riscv_expand_conditional_branch): Canonicalize the comparison | |
7584 | if not against constant zero. | |
7585 | ||
7586 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7587 | ||
7588 | * config/riscv/predicates.md (ne_operator): New predicate. | |
7589 | * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a | |
7590 | floating-point condition. | |
7591 | * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to... | |
7592 | (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via | |
7593 | `riscv_expand_conditional_branch' for `!signed_order_operator' | |
7594 | operators, otherwise let it through. | |
7595 | (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and | |
7596 | splitters. | |
7597 | ||
7598 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7599 | ||
7600 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't | |
7601 | bail out in floating-point conditions. | |
7602 | ||
7603 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7604 | ||
7605 | * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the | |
7606 | use of SUBREG if the conditional-set target is word-mode. | |
7607 | ||
7608 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7609 | ||
7610 | * config/riscv/riscv.md (add<mode>cc): New expander. | |
7611 | ||
7612 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7613 | ||
7614 | * config/riscv/predicates.md (movcc_operand): New predicate. | |
7615 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle | |
7616 | generic targets. | |
7617 | * config/riscv/riscv.md (mov<mode>cc): Likewise. | |
7618 | * config/riscv/riscv.opt (mmovcc): New option. | |
7619 | * doc/invoke.texi (Option Summary): Document it. | |
7620 | ||
7621 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7622 | ||
7623 | * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype. | |
7624 | * config/riscv/riscv.cc (riscv_emit_unary): New function. | |
7625 | ||
7626 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7627 | ||
7628 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify | |
7629 | conditional-move handling across all the relevant targets. | |
7630 | ||
7631 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7632 | ||
7633 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Also | |
7634 | accept constants for T-Head data input operands. | |
7635 | ||
7636 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7637 | ||
7638 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Also | |
7639 | accept constants for T-Head comparison operands. | |
7640 | ||
7641 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7642 | ||
7643 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove | |
7644 | the check for operand 1 being constant 0 in the Ventana/Zicond | |
7645 | case for equality comparisons. | |
7646 | ||
7647 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7648 | ||
7649 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Also | |
7650 | invert the condition for GEU and LEU. | |
7651 | ||
7652 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7653 | ||
7654 | * config/riscv/riscv.cc (riscv_insn_cost): New function. | |
7655 | (riscv_max_noce_ifcvt_seq_cost): Likewise. | |
7656 | (riscv_noce_conversion_profitable_p): Likewise. | |
7657 | (TARGET_INSN_COST): New macro. | |
7658 | (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro. | |
7659 | (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro. | |
7660 | ||
7661 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7662 | ||
7663 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove | |
7664 | extraneous variable for EQ vs NE operation selection. | |
7665 | ||
7666 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7667 | ||
7668 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Use | |
7669 | `nullptr' rather than 0 to initialize a pointer. | |
7670 | ||
7671 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7672 | ||
7673 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Use | |
7674 | `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'. | |
7675 | ||
7676 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7677 | ||
7678 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Use | |
7679 | `mode' for `GET_MODE (dest)' throughout. | |
7680 | ||
7681 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7682 | ||
7683 | * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if | |
7684 | NEED_EQ_NE_P but the comparison is neither EQ nor NE. | |
7685 | ||
7686 | 2023-11-22 Maciej W. Rozycki <macro@embecosm.com> | |
7687 | ||
7688 | * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB | |
7689 | patterns over to... | |
7690 | (*mov<GPR:mode><X:mode>cc): ... here. | |
7691 | ||
7692 | 2023-11-21 Robin Dapp <rdapp@ventanamicro.com> | |
7693 | ||
7694 | PR middle-end/112406 | |
7695 | * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow | |
7696 | reduction index != 1. | |
7697 | (vect_transform_reduction): Handle reduction index != 1. | |
7698 | ||
7699 | 2023-11-21 Richard Sandiford <richard.sandiford@arm.com> | |
7700 | ||
7701 | * common.md (aligned_register_operand): New predicate. | |
7702 | ||
7703 | 2023-11-21 Richard Sandiford <richard.sandiford@arm.com> | |
7704 | ||
7705 | * ira-int.h (ira_allocno): Add a register_filters field. | |
7706 | (ALLOCNO_REGISTER_FILTERS): New macro. | |
7707 | (ALLOCNO_SET_REGISTER_FILTERS): Likewise. | |
7708 | * ira-build.cc (ira_create_allocno): Initialize register_filters. | |
7709 | (create_cap_allocno): Propagate register_filters. | |
7710 | (propagate_allocno_info): Likewise. | |
7711 | (propagate_some_info_from_allocno): Likewise. | |
7712 | * ira-lives.cc (process_register_constraint_filters): New function. | |
7713 | (process_bb_node_lives): Use it to record register filter | |
7714 | information. | |
7715 | * ira-color.cc (assign_hard_reg): Check register filters. | |
7716 | (improve_allocation, fast_allocation): Likewise. | |
7717 | ||
7718 | 2023-11-21 Richard Sandiford <richard.sandiford@arm.com> | |
7719 | ||
7720 | * lra-constraints.cc (process_alt_operands): Check register filters. | |
7721 | ||
7722 | 2023-11-21 Richard Sandiford <richard.sandiford@arm.com> | |
7723 | ||
7724 | * recog.h (operand_alternative): Add a register_filters field. | |
7725 | (alternative_register_filters): New function. | |
7726 | * recog.cc (preprocess_constraints): Calculate the filters field. | |
7727 | (constrain_operands): Check register filters. | |
7728 | ||
7729 | 2023-11-21 Richard Sandiford <richard.sandiford@arm.com> | |
7730 | ||
7731 | * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter | |
7732 | operand. | |
7733 | * doc/md.texi (define_register_constraint): Document it. | |
7734 | * doc/tm.texi.in: Reference it in discussion about aligned registers. | |
7735 | * doc/tm.texi: Regenerate. | |
7736 | * gensupport.h (register_filters, get_register_filter_id): Declare. | |
7737 | * gensupport.cc (register_filter_map, register_filters): New variables. | |
7738 | (get_register_filter_id): New function. | |
7739 | (process_define_register_constraint): Likewise. | |
7740 | (process_rtx): Pass define_register_constraints to | |
7741 | process_define_register_constraint. | |
7742 | * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS. | |
7743 | * genpreds.cc (constraint_data): Add a filter field. | |
7744 | (add_constraint): Update accordingly. | |
7745 | (process_define_register_constraint): Pass the filter operand. | |
7746 | (write_init_reg_class_start_regs): New function. | |
7747 | (write_get_register_filter): Likewise. | |
7748 | (write_get_register_filter_id): Likewise. | |
7749 | (write_tm_preds_h): Write a definition of target_constraints, | |
7750 | plus helpers to test its contents. Write the get_register_filter* | |
7751 | functions. | |
7752 | (write_insn_preds_c): Write init_reg_class_start_regs. | |
7753 | * reginfo.cc (init_reg_class_start_regs): Declare. | |
7754 | (init_reg_sets): Call it. | |
7755 | * target-globals.h (this_target_constraints): Declare. | |
7756 | (target_globals): Add a constraints field. | |
7757 | (restore_target_globals): Update accordingly. | |
7758 | * target-globals.cc: Include tm_p.h. | |
7759 | (default_target_globals): Initialize the constraints field. | |
7760 | (save_target_globals): Handle the constraints field. | |
7761 | (target_globals::~target_globals): Likewise. | |
7762 | ||
7763 | 2023-11-21 Richard Biener <rguenther@suse.de> | |
7764 | ||
7765 | PR tree-optimization/112623 | |
7766 | * tree-ssa-forwprop.cc (simplify_vector_constructor): | |
7767 | Check the source mode of the insn for vector pack/unpacks. | |
7768 | ||
7769 | 2023-11-21 Richard Biener <rguenther@suse.de> | |
7770 | ||
7771 | * tree-vect-loop.cc (vect_analyze_loop_2): Move check | |
7772 | of VF against max_vf until VF is final. | |
7773 | ||
7774 | 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
7775 | ||
7776 | PR target/112598 | |
7777 | * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32. | |
7778 | ||
7779 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7780 | ||
7781 | * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings. | |
7782 | ||
7783 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7784 | ||
7785 | PR target/111370 | |
7786 | * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a, | |
7787 | armv9.3-a): Update to generic-armv9-a. | |
7788 | * config/aarch64/aarch64-cores.def (generic-armv9-a): New. | |
7789 | * config/aarch64/aarch64-tune.md: Regenerate. | |
7790 | * config/aarch64/aarch64.cc: Include generic_armv9_a.h. | |
7791 | * config/aarch64/tuning_models/generic_armv9_a.h: New file. | |
7792 | ||
7793 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7794 | ||
7795 | PR target/111370 | |
7796 | * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a, | |
7797 | armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a, | |
7798 | armv8.8-a): Update to generic_armv8_a. | |
7799 | * config/aarch64/aarch64-cores.def (generic-armv8-a): New. | |
7800 | * config/aarch64/aarch64-tune.md: Regenerate. | |
7801 | * config/aarch64/aarch64.cc: Include generic_armv8_a.h | |
7802 | * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to | |
7803 | TARGET_CPU_generic_armv8_a. | |
7804 | * config/aarch64/tuning_models/generic_armv8_a.h: New file. | |
7805 | ||
7806 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7807 | ||
7808 | PR target/111370 | |
7809 | * config/aarch64/aarch64-cores.def: Add generic. | |
7810 | * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic. | |
7811 | * config/aarch64/aarch64-tune.md: Regenerate | |
7812 | * config/aarch64/aarch64.cc (all_cores): Remove generic | |
7813 | * config/aarch64/aarch64.h (enum target_cpus): Remove | |
7814 | TARGET_CPU_generic. | |
7815 | ||
7816 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7817 | ||
7818 | PR target/111370 | |
7819 | * config/aarch64/aarch64.cc (generic_addrcost_table, | |
7820 | exynosm1_addrcost_table, | |
7821 | xgene1_addrcost_table, | |
7822 | thunderx2t99_addrcost_table, | |
7823 | thunderx3t110_addrcost_table, | |
7824 | tsv110_addrcost_table, | |
7825 | qdf24xx_addrcost_table, | |
7826 | a64fx_addrcost_table, | |
7827 | neoversev1_addrcost_table, | |
7828 | neoversen2_addrcost_table, | |
7829 | neoversev2_addrcost_table, | |
7830 | generic_regmove_cost, | |
7831 | cortexa57_regmove_cost, | |
7832 | cortexa53_regmove_cost, | |
7833 | exynosm1_regmove_cost, | |
7834 | thunderx_regmove_cost, | |
7835 | xgene1_regmove_cost, | |
7836 | qdf24xx_regmove_cost, | |
7837 | thunderx2t99_regmove_cost, | |
7838 | thunderx3t110_regmove_cost, | |
7839 | tsv110_regmove_cost, | |
7840 | a64fx_regmove_cost, | |
7841 | neoversen2_regmove_cost, | |
7842 | neoversev1_regmove_cost, | |
7843 | neoversev2_regmove_cost, | |
7844 | generic_vector_cost, | |
7845 | a64fx_vector_cost, | |
7846 | qdf24xx_vector_cost, | |
7847 | thunderx_vector_cost, | |
7848 | tsv110_vector_cost, | |
7849 | cortexa57_vector_cost, | |
7850 | exynosm1_vector_cost, | |
7851 | xgene1_vector_cost, | |
7852 | thunderx2t99_vector_cost, | |
7853 | thunderx3t110_vector_cost, | |
7854 | ampere1_vector_cost, | |
7855 | generic_branch_cost, | |
7856 | generic_tunings, | |
7857 | cortexa35_tunings, | |
7858 | cortexa53_tunings, | |
7859 | cortexa57_tunings, | |
7860 | cortexa72_tunings, | |
7861 | cortexa73_tunings, | |
7862 | exynosm1_tunings, | |
7863 | thunderxt88_tunings, | |
7864 | thunderx_tunings, | |
7865 | tsv110_tunings, | |
7866 | xgene1_tunings, | |
7867 | emag_tunings, | |
7868 | qdf24xx_tunings, | |
7869 | saphira_tunings, | |
7870 | thunderx2t99_tunings, | |
7871 | thunderx3t110_tunings, | |
7872 | neoversen1_tunings, | |
7873 | ampere1_tunings, | |
7874 | ampere1a_tunings, | |
7875 | neoversev1_vector_cost, | |
7876 | neoversev1_tunings, | |
7877 | neoverse512tvb_vector_cost, | |
7878 | neoverse512tvb_tunings, | |
7879 | neoversen2_vector_cost, | |
7880 | neoversen2_tunings, | |
7881 | neoversev2_vector_cost, | |
7882 | neoversev2_tunings | |
7883 | a64fx_tunings): Split into own files. | |
7884 | * config/aarch64/tuning_models/a64fx.h: New file. | |
7885 | * config/aarch64/tuning_models/ampere1.h: New file. | |
7886 | * config/aarch64/tuning_models/ampere1a.h: New file. | |
7887 | * config/aarch64/tuning_models/cortexa35.h: New file. | |
7888 | * config/aarch64/tuning_models/cortexa53.h: New file. | |
7889 | * config/aarch64/tuning_models/cortexa57.h: New file. | |
7890 | * config/aarch64/tuning_models/cortexa72.h: New file. | |
7891 | * config/aarch64/tuning_models/cortexa73.h: New file. | |
7892 | * config/aarch64/tuning_models/emag.h: New file. | |
7893 | * config/aarch64/tuning_models/exynosm1.h: New file. | |
7894 | * config/aarch64/tuning_models/generic.h: New file. | |
7895 | * config/aarch64/tuning_models/neoverse512tvb.h: New file. | |
7896 | * config/aarch64/tuning_models/neoversen1.h: New file. | |
7897 | * config/aarch64/tuning_models/neoversen2.h: New file. | |
7898 | * config/aarch64/tuning_models/neoversev1.h: New file. | |
7899 | * config/aarch64/tuning_models/neoversev2.h: New file. | |
7900 | * config/aarch64/tuning_models/qdf24xx.h: New file. | |
7901 | * config/aarch64/tuning_models/saphira.h: New file. | |
7902 | * config/aarch64/tuning_models/thunderx.h: New file. | |
7903 | * config/aarch64/tuning_models/thunderx2t99.h: New file. | |
7904 | * config/aarch64/tuning_models/thunderx3t110.h: New file. | |
7905 | * config/aarch64/tuning_models/thunderxt88.h: New file. | |
7906 | * config/aarch64/tuning_models/tsv110.h: New file. | |
7907 | * config/aarch64/tuning_models/xgene1.h: New file. | |
7908 | ||
7909 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7910 | ||
7911 | * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode, | |
7912 | vec_unpack<su>_lo_<mode): Split into... | |
7913 | (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode, | |
7914 | vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These. | |
7915 | (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New. | |
7916 | (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New. | |
7917 | * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New. | |
7918 | (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2. | |
7919 | ||
7920 | 2023-11-21 Tamar Christina <tamar.christina@arm.com> | |
7921 | ||
7922 | * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla. | |
7923 | (aarch64_vector_costs::count_ops): Likewise. | |
7924 | ||
7925 | 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
7926 | ||
7927 | PR middle-end/112634 | |
7928 | * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of | |
7929 | __atomic_add_fetch() to the signed counter type. | |
7930 | (gen_counter_update): Fix formatting. | |
7931 | ||
7932 | 2023-11-21 Jakub Jelinek <jakub@redhat.com> | |
7933 | ||
7934 | * tree-profile.cc (gen_counter_update, tree_profiling): Formatting | |
7935 | fixes. | |
7936 | ||
7937 | 2023-11-21 Jakub Jelinek <jakub@redhat.com> | |
7938 | ||
7939 | PR middle-end/112639 | |
7940 | * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1 | |
7941 | is specified but cleared, call save_expr on arg0. | |
7942 | ||
7943 | 2023-11-21 Hongyu Wang <hongyu.wang@intel.com> | |
7944 | ||
7945 | * config/i386/i386-expand.h (gen_push): Add default bool | |
7946 | parameter. | |
7947 | (gen_pop): Likewise. | |
7948 | * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add | |
7949 | it to apx_all. | |
7950 | * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add | |
7951 | ppx_p parameter for function declaration. | |
7952 | (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true. | |
7953 | (gen_push): Likewise. | |
7954 | (ix86_emit_restore_reg_using_pop2): Likewise for pop2p. | |
7955 | (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX. | |
7956 | (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn | |
7957 | and adjust cfi when ppx_p is ture. | |
7958 | (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its | |
7959 | callee. | |
7960 | (ix86_emit_restore_regs_using_pop2): Likewise. | |
7961 | (ix86_expand_epilogue): Parse TARGET_APX_PPX to | |
7962 | ix86_emit_restore_reg_using_pop. | |
7963 | * config/i386/i386.h (TARGET_APX_PPX): New. | |
7964 | * config/i386/i386.md (UNSPEC_APX_PPX): New unspec. | |
7965 | (pushp_di): New define_insn. | |
7966 | (popp_di): Likewise. | |
7967 | (push2p_di): Likewise. | |
7968 | (pop2p_di): Likewise. | |
7969 | * config/i386/i386.opt: Add apx_ppx enum. | |
7970 | ||
7971 | 2023-11-21 Richard Biener <rguenther@suse.de> | |
7972 | ||
7973 | PR tree-optimization/111970 | |
7974 | * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation | |
7975 | for SLP gather load. | |
7976 | (vectorizable_store): Likewise for SLP scatter store. | |
7977 | ||
7978 | 2023-11-21 Xi Ruoyao <xry111@xry111.site> | |
7979 | ||
7980 | * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to | |
7981 | exclude it for target libraries. | |
7982 | (loongarch_isa_base_features): Likewise. | |
7983 | (loongarch_isa): Likewise. | |
7984 | (loongarch_abi): Likewise. | |
7985 | (loongarch_target): Likewise. | |
7986 | (loongarch_cpu_default_isa): Likewise. | |
7987 | ||
7988 | 2023-11-21 liuhongt <hongtao.liu@intel.com> | |
7989 | ||
7990 | PR target/112325 | |
7991 | * config/i386/i386-expand.cc (emit_reduc_half): Hanlde | |
7992 | V8QImode. | |
7993 | * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander. | |
7994 | (reduc_<code>_scal_v4qi): Ditto. | |
7995 | ||
7996 | 2023-11-20 Marc Poulhiès <dkm@kataplop.net> | |
7997 | ||
7998 | * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic. | |
7999 | * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name. | |
8000 | (nvptx_declare_function_name): Likewise. | |
8001 | (nvptx_call_args): Likewise. | |
8002 | (nvptx_expand_call): Likewise. | |
8003 | ||
8004 | 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
8005 | ||
8006 | * tree-profile.cc (gen_counter_update): Use unshare_expr() for the | |
8007 | counter expression in the second gimple_build_assign(). | |
8008 | ||
8009 | 2023-11-20 Jan Hubicka <jh@suse.cz> | |
8010 | ||
8011 | * cgraph.cc (add_detected_attribute_1): New function. | |
8012 | (cgraph_node::add_detected_attribute): Likewise. | |
8013 | * cgraph.h (cgraph_node::add_detected_attribute): Declare. | |
8014 | * common.opt: Add -Wsuggest-attribute=returns_nonnull. | |
8015 | * doc/invoke.texi: Document new flag. | |
8016 | * gimple-range-fold.cc (fold_using_range::range_of_call): | |
8017 | Use known reutrn value ranges. | |
8018 | * ipa-prop.cc (struct ipa_return_value_summary): New type. | |
8019 | (class ipa_return_value_sum_t): New type. | |
8020 | (ipa_return_value_sum): New summary. | |
8021 | (ipa_record_return_value_range): New function. | |
8022 | (ipa_return_value_range): New function. | |
8023 | * ipa-prop.h (ipa_return_value_range): Declare. | |
8024 | (ipa_record_return_value_range): Declare. | |
8025 | * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion. | |
8026 | * ipa-utils.h (warn_function_returns_nonnull): Declare. | |
8027 | * symbol-summary.h: Fix comment. | |
8028 | * tree-vrp.cc (execute_ranger_vrp): Record return values. | |
8029 | ||
8030 | 2023-11-20 Richard Biener <rguenther@suse.de> | |
8031 | ||
8032 | PR tree-optimization/112618 | |
8033 | * tree-vect-loop.cc (vect_transform_loop_stmt): For not | |
8034 | relevant and unused .MASK_CALL make sure we remove the | |
8035 | scalar stmt. | |
8036 | ||
8037 | 2023-11-20 Richard Biener <rguenther@suse.de> | |
8038 | ||
8039 | PR tree-optimization/112281 | |
8040 | * tree-loop-distribution.cc | |
8041 | (loop_distribution::pg_add_dependence_edges): For = in the | |
8042 | innermost common loop record a partition conflict. | |
8043 | ||
8044 | 2023-11-20 Richard Biener <rguenther@suse.de> | |
8045 | ||
8046 | PR middle-end/112622 | |
8047 | * convert.cc (convert_to_real_1): Use element_precision | |
8048 | where a vector type might appear. Provide specific | |
8049 | diagnostic for unexpected vector argument. | |
8050 | ||
8051 | 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8052 | ||
8053 | PR target/112597 | |
8054 | * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE. | |
8055 | * config/riscv/vector.md: Fix slide1 intermediate mode bug. | |
8056 | ||
8057 | 2023-11-20 Robin Dapp <rdapp@ventanamicro.com> | |
8058 | ||
8059 | * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p): | |
8060 | Add check for XLEN == 32. | |
8061 | * config/riscv/vector-iterators.md: Change VLS part of the | |
8062 | demote iterator to 2x elements modes | |
8063 | * config/riscv/vector.md: Adjust iterators and insn conditions. | |
8064 | ||
8065 | 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org> | |
8066 | ||
8067 | * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q) | |
8068 | (vst1_impl, vst1q): New. | |
8069 | * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New. | |
8070 | * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New. | |
8071 | * config/arm/arm_mve.h | |
8072 | (vld1q): Delete. | |
8073 | (vst1q): Delete. | |
8074 | (vld1q_s8): Delete. | |
8075 | (vld1q_s32): Delete. | |
8076 | (vld1q_s16): Delete. | |
8077 | (vld1q_u8): Delete. | |
8078 | (vld1q_u32): Delete. | |
8079 | (vld1q_u16): Delete. | |
8080 | (vld1q_f32): Delete. | |
8081 | (vld1q_f16): Delete. | |
8082 | (vst1q_f32): Delete. | |
8083 | (vst1q_f16): Delete. | |
8084 | (vst1q_s8): Delete. | |
8085 | (vst1q_s32): Delete. | |
8086 | (vst1q_s16): Delete. | |
8087 | (vst1q_u8): Delete. | |
8088 | (vst1q_u32): Delete. | |
8089 | (vst1q_u16): Delete. | |
8090 | (__arm_vld1q_s8): Delete. | |
8091 | (__arm_vld1q_s32): Delete. | |
8092 | (__arm_vld1q_s16): Delete. | |
8093 | (__arm_vld1q_u8): Delete. | |
8094 | (__arm_vld1q_u32): Delete. | |
8095 | (__arm_vld1q_u16): Delete. | |
8096 | (__arm_vst1q_s8): Delete. | |
8097 | (__arm_vst1q_s32): Delete. | |
8098 | (__arm_vst1q_s16): Delete. | |
8099 | (__arm_vst1q_u8): Delete. | |
8100 | (__arm_vst1q_u32): Delete. | |
8101 | (__arm_vst1q_u16): Delete. | |
8102 | (__arm_vld1q_f32): Delete. | |
8103 | (__arm_vld1q_f16): Delete. | |
8104 | (__arm_vst1q_f32): Delete. | |
8105 | (__arm_vst1q_f16): Delete. | |
8106 | (__arm_vld1q): Delete. | |
8107 | (__arm_vst1q): Delete. | |
8108 | * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ... | |
8109 | (@mve_vld1q_f<mode>): ... this. | |
8110 | (mve_vld1q_<supf><mode>): Rename into ... | |
8111 | (@mve_vld1q_<supf><mode>) ... this. | |
8112 | (mve_vst1q_f<mode>): Rename into ... | |
8113 | (@mve_vst1q_f<mode>): ... this. | |
8114 | (mve_vst1q_<supf><mode>): Rename into ... | |
8115 | (@mve_vst1q_<supf><mode>) ... this. | |
8116 | ||
8117 | 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org> | |
8118 | ||
8119 | * config/arm/arm-mve-builtins-shapes.cc (load, store): New. | |
8120 | * config/arm/arm-mve-builtins-shapes.h (load, store): New. | |
8121 | ||
8122 | 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org> | |
8123 | ||
8124 | * config/arm/arm-mve-builtins-functions.h (multi_vector_function) | |
8125 | (full_width_access): New classes. | |
8126 | * config/arm/arm-mve-builtins.cc | |
8127 | (find_type_suffix_for_scalar_type, infer_pointer_type) | |
8128 | (require_pointer_type, get_contiguous_base, add_mem_operand) | |
8129 | (add_fixed_operand, use_contiguous_load_insn) | |
8130 | (use_contiguous_store_insn): New. | |
8131 | * config/arm/arm-mve-builtins.h (memory_vector_mode) | |
8132 | (infer_pointer_type, require_pointer_type, get_contiguous_base) | |
8133 | (add_mem_operand) | |
8134 | (add_fixed_operand, use_contiguous_load_insn) | |
8135 | (use_contiguous_store_insn): New. | |
8136 | ||
8137 | 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org> | |
8138 | ||
8139 | * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer): | |
8140 | New. | |
8141 | (parse_type): Add support for '_', 'al' and 'as'. | |
8142 | * config/arm/arm-mve-builtins.h (function_instance): Add | |
8143 | memory_scalar_type. | |
8144 | (function_base): Likewise. | |
8145 | ||
8146 | 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org> | |
8147 | ||
8148 | * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix | |
8149 | initialization of arm_simd_types[].eltype. | |
8150 | * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar | |
8151 | types. | |
8152 | ||
8153 | 2023-11-20 Jakub Jelinek <jakub@redhat.com> | |
8154 | ||
8155 | * typeclass.h (enum type_class): Add vector_type_class. | |
8156 | * builtins.cc (type_to_class): Return vector_type_class for | |
8157 | VECTOR_TYPE. | |
8158 | * doc/extend.texi (__builtin_classify_type): Mention bit-precise | |
8159 | integer types and vector types. | |
8160 | ||
8161 | 2023-11-20 Robin Dapp <rdapp@ventanamicro.com> | |
8162 | ||
8163 | PR middle-end/112406 | |
8164 | * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern): | |
8165 | Convert masks for conditional operations as well. | |
8166 | ||
8167 | 2023-11-20 Jakub Jelinek <jakub@redhat.com> | |
8168 | ||
8169 | PR tree-optimization/90693 | |
8170 | * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with | |
8171 | result only used in equality comparison against 1 with direct optab | |
8172 | support as .POPCOUNT call with 2 arguments. | |
8173 | * internal-fn.h (expand_POPCOUNT): Declare. | |
8174 | * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it, | |
8175 | undefine at the end. | |
8176 | (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN. | |
8177 | * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before | |
8178 | inclusion to define expanders. | |
8179 | (expand_POPCOUNT): New function. | |
8180 | ||
8181 | 2023-11-20 Jakub Jelinek <jakub@redhat.com> | |
8182 | ||
8183 | PR tree-optimization/90693 | |
8184 | * tree-ssa-math-opts.cc (match_single_bit_test): New function. | |
8185 | (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR | |
8186 | and NE_EXPR assignments and GIMPLE_CONDs. | |
8187 | ||
8188 | 2023-11-20 Jakub Jelinek <jakub@redhat.com> | |
8189 | ||
8190 | * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure | |
8191 | they are all undefined at the end. | |
8192 | * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn, | |
8193 | widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN | |
8194 | macros after inclusion of internal-fn.def. | |
8195 | ||
8196 | 2023-11-20 Haochen Jiang <haochen.jiang@intel.com> | |
8197 | ||
8198 | * common/config/i386/cpuinfo.h (get_available_features): | |
8199 | Add avx10_set and version and detect avx10.1. | |
8200 | (cpu_indicator_init): Handle avx10.1-512. | |
8201 | * common/config/i386/i386-common.cc | |
8202 | (OPTION_MASK_ISA2_AVX10_1_256_SET): New. | |
8203 | (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto. | |
8204 | (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto. | |
8205 | (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto. | |
8206 | (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1. | |
8207 | (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512. | |
8208 | Add indicator for explicit no-avx512 and no-avx10.1 options. | |
8209 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
8210 | Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512. | |
8211 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
8212 | AVX10_1_256 and AVX10_1_512. | |
8213 | * config/i386/cpuid.h (bit_AVX10): New. | |
8214 | (bit_AVX10_256): Ditto. | |
8215 | (bit_AVX10_512): Ditto. | |
8216 | * config/i386/driver-i386.cc (check_avx10_avx512_features): New. | |
8217 | (host_detect_local_cpu): Do not append "-mno-" options under | |
8218 | specific scenarios to avoid emitting a warning. | |
8219 | * config/i386/i386-isa.def | |
8220 | (EVEX512): Add DEF_PTA(EVEX512). | |
8221 | (AVX10_1_256): Add DEF_PTA(AVX10_1_256). | |
8222 | (AVX10_1_512): Add DEF_PTA(AVX10_1_512). | |
8223 | * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and | |
8224 | -mavx10.1-512. | |
8225 | (ix86_function_specific_save): Save explicit no indicator. | |
8226 | (ix86_function_specific_restore): Restore explicit no indicator. | |
8227 | (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and | |
8228 | avx10.1-512. | |
8229 | (ix86_valid_target_attribute_tree): Handle avx512 function | |
8230 | attributes with avx10.1 command line option. | |
8231 | (ix86_option_override_internal): Handle AVX10.1 options. | |
8232 | * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target | |
8233 | machines. | |
8234 | * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and | |
8235 | ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and | |
8236 | -mavx10.1-512. | |
8237 | * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512. | |
8238 | * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512. | |
8239 | * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256 | |
8240 | and avx10.1-512. | |
8241 | ||
8242 | 2023-11-20 liuhongt <hongtao.liu@intel.com> | |
8243 | ||
8244 | PR target/112325 | |
8245 | * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander. | |
8246 | (REDUC_ANY_LOGIC_MODE): New iterator. | |
8247 | (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode. | |
8248 | (REDUC_SSE_PLUS_MODE): Ditto. | |
8249 | ||
8250 | 2023-11-20 xuli <xuli1@eswincomputing.com> | |
8251 | ||
8252 | PR target/112537 | |
8253 | * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum. | |
8254 | * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options. | |
8255 | (expand_block_move): Ditto. | |
8256 | * config/riscv/riscv.opt: Add -mmemcpy-strategy=. | |
8257 | ||
8258 | 2023-11-20 Lulu Cheng <chenglulu@loongson.cn> | |
8259 | ||
8260 | * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix. | |
8261 | ||
8262 | 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8263 | ||
8264 | * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL. | |
8265 | ||
8266 | 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
8267 | ||
8268 | * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype. | |
8269 | * config/riscv/riscv.cc (riscv_fusion_pairs): New enum. | |
8270 | (riscv_tune_param): Add fusible_ops field. | |
8271 | (riscv_tune_param_rocket_tune_info): Initialize new field. | |
8272 | (riscv_tune_param_sifive_7_tune_info): Likewise. | |
8273 | (thead_c906_tune_info): Likewise. | |
8274 | (generic_oo_tune_info): Likewise. | |
8275 | (optimize_size_tune_info): Likewise. | |
8276 | (riscv_macro_fusion_p): New function. | |
8277 | (riscv_fusion_enabled_p): Likewise. | |
8278 | (riscv_macro_fusion_pair_p): Likewise. | |
8279 | (TARGET_SCHED_MACRO_FUSION_P): Define. | |
8280 | (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise. | |
8281 | (extract_base_offset_in_addr): Moved into riscv.cc from... | |
8282 | * config/riscv/thead.cc: Here. | |
8283 | Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com> | |
8284 | Co-authored-by: Jeff Law <jlaw@ventanamicro.com> | |
8285 | ||
8286 | 2023-11-19 Jeff Law <jlaw@ventanamicro.com> | |
8287 | ||
8288 | * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source. | |
8289 | * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise. | |
8290 | * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise. | |
8291 | * config/s390/s390.md (@split_stack_call<mode>): Likewise. | |
8292 | (@split_stack_cond_call<mode>): Likewise. | |
8293 | * config/sh/sh.md (sp_switch_1): Likewise. | |
8294 | ||
8295 | 2023-11-19 David Malcolm <dmalcolm@redhat.com> | |
8296 | ||
8297 | * diagnostic.h: Include "rich-location.h". | |
8298 | * edit-context.h (class fixit_hint): New forward decl. | |
8299 | * gcc-rich-location.h: Include "rich-location.h". | |
8300 | * genmatch.cc: Likewise. | |
8301 | * pretty-print.h: Likewise. | |
8302 | ||
8303 | 2023-11-19 David Malcolm <dmalcolm@redhat.com> | |
8304 | ||
8305 | * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h. | |
8306 | * coretypes.h (class rich_location): New forward decl. | |
8307 | ||
8308 | 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8309 | ||
8310 | * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug. | |
8311 | ||
8312 | 2023-11-19 David Malcolm <dmalcolm@redhat.com> | |
8313 | ||
8314 | PR analyzer/107573 | |
8315 | * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok. | |
8316 | ||
8317 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8318 | ||
8319 | * config/loongarch/predicates.md (const_call_insn_operand): | |
8320 | Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to | |
8321 | "true" to make the coding style consistent. | |
8322 | ||
8323 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8324 | ||
8325 | * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas): | |
8326 | Add. | |
8327 | * config/loongarch/loongarch-str.h: Regenerate. | |
8328 | * config/loongarch/loongarch.opt: Regenerate. | |
8329 | * config/loongarch/loongarch-cpucfg-map.h: Regenerate. | |
8330 | * config/loongarch/loongarch-cpu.cc | |
8331 | (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH | |
8332 | and OPTION_MASK_ISA_LAMCAS. | |
8333 | * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use | |
8334 | TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty | |
8335 | lines from assembly output. | |
8336 | (atomic_exchange<mode>_short): Likewise. | |
8337 | (atomic_exchange<mode:SHORT>): Likewise. | |
8338 | (atomic_fetch_add<mode>_short): Likewise. | |
8339 | (atomic_fetch_add<mode:SHORT>): Likewise. | |
8340 | (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead | |
8341 | of ISA_BASE_IS_LA64V110. | |
8342 | (atomic_compare_and_swap<mode>): Likewise. | |
8343 | (atomic_compare_and_swap<mode:GPR>): Likewise. | |
8344 | (atomic_compare_and_swap<mode:SHORT>): Likewise. | |
8345 | * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump | |
8346 | status if -mlam-bh and -mlamcas if -fverbose-asm. | |
8347 | ||
8348 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8349 | ||
8350 | * config/loongarch/loongarch.cc (loongarch_print_operand): Don't | |
8351 | print dbar 0x700 if TARGET_LD_SEQ_SA. | |
8352 | * config/loongarch/sync.md (atomic_load<mode>): Likewise. | |
8353 | ||
8354 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8355 | ||
8356 | * config/loongarch/loongarch.md (DIV): New mode iterator. | |
8357 | (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32. | |
8358 | (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32. | |
8359 | (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32. | |
8360 | (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32. | |
8361 | ||
8362 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8363 | ||
8364 | * config/loongarch/loongarch-def.h: | |
8365 | (loongarch_isa_base_features): Declare. Define it in ... | |
8366 | * config/loongarch/loongarch-cpu.cc | |
8367 | (loongarch_isa_base_features): ... here. | |
8368 | (fill_native_cpu_config): If we know the base ISA of the CPU | |
8369 | model from PRID, use it instead of la64 (v1.0). Check if all | |
8370 | expected features of this base ISA is available, emit a warning | |
8371 | if not. | |
8372 | * config/loongarch/loongarch-opts.cc (config_target_isa): Enable | |
8373 | the features implied by the base ISA if not -march=native. | |
8374 | ||
8375 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8376 | ||
8377 | * config/loongarch/genopts/isa-evolution.in: New data file. | |
8378 | * config/loongarch/genopts/genstr.sh: Translate info in | |
8379 | isa-evolution.in when generating loongarch-str.h, loongarch.opt, | |
8380 | and loongarch-cpucfg-map.h. | |
8381 | * config/loongarch/genopts/loongarch.opt.in (isa_evolution): | |
8382 | New variable. | |
8383 | * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New | |
8384 | rule. | |
8385 | (loongarch-str.h): Depend on isa-evolution.in. | |
8386 | (loongarch.opt): Depend on isa-evolution.in. | |
8387 | (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h. | |
8388 | * config/loongarch/loongarch-str.h: Regenerate. | |
8389 | * config/loongarch/loongarch-def.h (loongarch_isa): Add field | |
8390 | for evolution features. Add helper function to enable features | |
8391 | in this field. | |
8392 | Probe native CPU capability and save the corresponding options | |
8393 | into preset. | |
8394 | * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): | |
8395 | Probe native CPU capability and save the corresponding options | |
8396 | into preset. | |
8397 | (cache_cpucfg): Simplify with C++11-style for loop. | |
8398 | (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ... | |
8399 | * config/loongarch/loongarch.cc | |
8400 | (loongarch_option_override_internal): Enable the ISA evolution | |
8401 | feature options implied by -march and not explicitly disabled. | |
8402 | (loongarch_asm_code_end): New function, print ISA information as | |
8403 | comments in the assembly if -fverbose-asm. It makes easier to | |
8404 | debug things like -march=native. | |
8405 | (TARGET_ASM_CODE_END): Define. | |
8406 | * config/loongarch/loongarch.opt: Regenerate. | |
8407 | * config/loongarch/loongarch-cpucfg-map.h: Generate. | |
8408 | (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here. | |
8409 | ||
8410 | 2023-11-18 Xi Ruoyao <xry111@xry111.site> | |
8411 | ||
8412 | * config/loongarch/genopts/loongarch-strings: | |
8413 | (STR_ISA_BASE_LA64V110): Add. | |
8414 | * config/loongarch/genopts/loongarch.opt.in: | |
8415 | (ISA_BASE_LA64V110): Add. | |
8416 | * config/loongarch/loongarch-def.c | |
8417 | (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110] | |
8418 | to STR_ISA_BASE_LA64V110. | |
8419 | * config/loongarch/loongarch.opt: Regenerate. | |
8420 | * config/loongarch/loongarch-str.h: Regenerate. | |
8421 | ||
8422 | 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
8423 | ||
8424 | * doc/invoke.texi (-fprofile-update): Clarify default method. Document | |
8425 | the atomic method behaviour. | |
8426 | * tree-profile.cc (enum counter_update_method): New. | |
8427 | (counter_update): Likewise. | |
8428 | (gen_counter_update): Use counter_update_method. Split the | |
8429 | atomic counter update in two 32-bit atomic operations if | |
8430 | necessary. | |
8431 | (tree_profiling): Select counter_update_method. | |
8432 | ||
8433 | 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
8434 | ||
8435 | * tree-profile.cc (gen_assign_counter_update): New. | |
8436 | (gen_counter_update): Likewise. | |
8437 | (gimple_gen_edge_profiler): Use gen_counter_update(). | |
8438 | (gimple_gen_time_profiler): Likewise. | |
8439 | ||
8440 | 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
8441 | ||
8442 | * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define. | |
8443 | * doc/tm.texi: Regenerate. | |
8444 | * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add. | |
8445 | * target.def (have_libatomic): New. | |
8446 | ||
8447 | 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
8448 | ||
8449 | Revert: | |
8450 | 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
8451 | ||
8452 | * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define. | |
8453 | * config/sparc/sparc.c (sparc_gcov_type_size): New. | |
8454 | (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined. | |
8455 | * coverage.c (get_gcov_type): Use targetm.gcov_type_size(). | |
8456 | * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc". | |
8457 | * doc/tm.texi.in: Regenerate. | |
8458 | * target.def (gcov_type_size): New target hook. | |
8459 | * targhooks.c (default_gcov_type_size): New. | |
8460 | * targhooks.h (default_gcov_type_size): Declare. | |
8461 | * tree-profile.c (gimple_gen_edge_profiler): Use precision of | |
8462 | gcov_type_node. | |
8463 | (gimple_gen_time_profiler): Likewise. | |
8464 | ||
8465 | 2023-11-18 Kito Cheng <kito.cheng@sifive.com> | |
8466 | ||
8467 | * config/riscv/riscv-target-attr.cc | |
8468 | (riscv_target_attr_parser::parse_arch): Use char[] for | |
8469 | std::unique_ptr to prevent mismatched new delete issue. | |
8470 | (riscv_process_one_target_attr): Ditto. | |
8471 | (riscv_process_target_attr): Ditto. | |
8472 | ||
8473 | 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8474 | ||
8475 | * config/riscv/vector-iterators.md: Refactor iterators. | |
8476 | ||
8477 | 2023-11-18 Lulu Cheng <chenglulu@loongson.cn> | |
8478 | ||
8479 | * config/loongarch/sync.md (atomic_load<mode>): New template. | |
8480 | ||
8481 | 2023-11-18 Lulu Cheng <chenglulu@loongson.cn> | |
8482 | ||
8483 | * config/loongarch/loongarch-def.h: Add comments. | |
8484 | * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro. | |
8485 | * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence): | |
8486 | Remove redundant code implementations. | |
8487 | * config/loongarch/sync.md (d): Added QI, HI support. | |
8488 | (atomic_add<mode>): New template. | |
8489 | (atomic_exchange<mode>_short): Likewise. | |
8490 | (atomic_cas_value_strong<mode>_amcas): Likewise.. | |
8491 | (atomic_fetch_add<mode>_short): Likewise. | |
8492 | ||
8493 | 2023-11-18 Lulu Cheng <chenglulu@loongson.cn> | |
8494 | ||
8495 | * config.gcc: Support LA664. | |
8496 | * config/loongarch/genopts/loongarch-strings: Likewise. | |
8497 | * config/loongarch/genopts/loongarch.opt.in: Likewise. | |
8498 | * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise. | |
8499 | * config/loongarch/loongarch-def.c: Likewise. | |
8500 | * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise. | |
8501 | (ISA_BASE_LA64V110): Define macro. | |
8502 | (N_ARCH_TYPES): Update value. | |
8503 | (N_TUNE_TYPES): Update value. | |
8504 | (CPU_LA664): New macro. | |
8505 | * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise. | |
8506 | (isa_base_compat_p): Likewise. | |
8507 | * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled | |
8508 | when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110. | |
8509 | (TARGET_uARCH_LA664): Define macro. | |
8510 | * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise. | |
8511 | * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width): | |
8512 | Add LA664 support. | |
8513 | * config/loongarch/loongarch.opt: Regenerate. | |
8514 | ||
8515 | 2023-11-18 Lulu Cheng <chenglulu@loongson.cn> | |
8516 | Xi Ruoyao <xry111@xry111.site> | |
8517 | ||
8518 | * config.in: Regenerate. | |
8519 | * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro. | |
8520 | * config/loongarch/loongarch.cc (loongarch_legitimize_call_address): | |
8521 | If binutils supports call36, the function call is not split over expand. | |
8522 | * config/loongarch/loongarch.md: Add call36 generation code. | |
8523 | * config/loongarch/predicates.md: Likewise. | |
8524 | * configure: Regenerate. | |
8525 | * configure.ac: Check whether binutils supports call36. | |
8526 | ||
8527 | 2023-11-18 David Malcolm <dmalcolm@redhat.com> | |
8528 | ||
8529 | PR analyzer/106147 | |
8530 | * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o. | |
8531 | * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and | |
8532 | -Wanalyzer-infinite-loop. Add missing CWE link for | |
8533 | -Wanalyzer-infinite-recursion. | |
8534 | * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New. | |
8535 | ||
8536 | 2023-11-17 Robin Dapp <rdapp@ventanamicro.com> | |
8537 | ||
8538 | PR middle-end/112406 | |
8539 | PR middle-end/112552 | |
8540 | * tree-vect-loop.cc (vect_transform_reduction): Pass truth | |
8541 | vectype for mask operand. | |
8542 | ||
8543 | 2023-11-17 Jakub Jelinek <jakub@redhat.com> | |
8544 | ||
8545 | PR c++/107571 | |
8546 | * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after | |
8547 | gsi_remove, change the way of passing fallthrough stmt at the end | |
8548 | of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH | |
8549 | with GF_CALL_NOTHROW flag. | |
8550 | (expand_FALLTHROUGH): Change loc into array of 2 location_t elts, | |
8551 | don't test wi.callback_result, instead check whether first | |
8552 | elt is not UNKNOWN_LOCATION and in that case pedwarn with the | |
8553 | second location. | |
8554 | * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt | |
8555 | after the flag has been used. | |
8556 | * internal-fn.def (FALLTHROUGH): Mention in comment the special | |
8557 | meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls. | |
8558 | ||
8559 | 2023-11-17 Jakub Jelinek <jakub@redhat.com> | |
8560 | ||
8561 | PR tree-optimization/112566 | |
8562 | PR tree-optimization/83171 | |
8563 | * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X), | |
8564 | parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New | |
8565 | simplifications. | |
8566 | ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than | |
8567 | BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX. | |
8568 | ||
8569 | 2023-11-17 Jakub Jelinek <jakub@redhat.com> | |
8570 | ||
8571 | PR tree-optimization/112374 | |
8572 | * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p | |
8573 | special case only if op_use_stmt == use_stmt, use as_a rather than | |
8574 | dyn_cast in that case. | |
8575 | ||
8576 | 2023-11-17 Richard Biener <rguenther@suse.de> | |
8577 | ||
8578 | Revert: | |
8579 | 2023-11-14 Richard Biener <rguenther@suse.de> | |
8580 | ||
8581 | PR tree-optimization/112281 | |
8582 | * tree-loop-distribution.cc (pg_add_dependence_edges): | |
8583 | Preserve stmt order when the innermost loop has exact | |
8584 | overlap. | |
8585 | ||
8586 | 2023-11-17 Georg-Johann Lay <avr@gjlay.de> | |
8587 | ||
8588 | PR target/53372 | |
8589 | * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]: | |
8590 | Only return some .progmem*.data section if the user did not | |
8591 | specify a section attribute. | |
8592 | (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE | |
8593 | in returned section flags. | |
8594 | ||
8595 | 2023-11-17 Xi Ruoyao <xry111@xry111.site> | |
8596 | ||
8597 | * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to | |
8598 | be an reg_or_vector_same_val_operand. If it's a const vector | |
8599 | with same negative elements, expand the copysign with a bitset | |
8600 | instruction. Otherwise, force it into an register. | |
8601 | * config/loongarch/lasx.md (copysign<mode>3): Likewise. | |
8602 | ||
8603 | 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org> | |
8604 | ||
8605 | PR target/111449 | |
8606 | * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New. | |
8607 | ||
8608 | 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org> | |
8609 | ||
8610 | PR target/111449 | |
8611 | * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern. | |
8612 | * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate | |
8613 | insn sequence for V16QImode equality compare. | |
8614 | * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define. | |
8615 | (STORE_MAX_PIECES): Define. | |
8616 | ||
8617 | 2023-11-17 Li Wei <liwei@loongson.cn> | |
8618 | ||
8619 | * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO): | |
8620 | Implement. | |
8621 | (CTZ_DEFINED_VALUE_AT_ZERO): Same. | |
8622 | ||
8623 | 2023-11-17 Richard Biener <rguenther@suse.de> | |
8624 | ||
8625 | * dwarf2out.cc (add_AT_die_ref): Assert we do not add | |
8626 | a self-ref DW_AT_abstract_origin or DW_AT_specification. | |
8627 | ||
8628 | 2023-11-17 Jiahao Xu <xujiahao@loongson.cn> | |
8629 | ||
8630 | * config/loongarch/loongarch.cc | |
8631 | (loongarch_builtin_vectorization_cost): Adjust. | |
8632 | ||
8633 | 2023-11-16 Andrew Pinski <pinskia@gmail.com> | |
8634 | ||
8635 | PR rtl-optimization/112483 | |
8636 | * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>: | |
8637 | Call simplify_unary_operation for NEG instead of | |
8638 | simplify_gen_unary. | |
8639 | ||
8640 | 2023-11-16 Edwin Lu <ewlu@rivosinc.com> | |
8641 | ||
8642 | PR target/111557 | |
8643 | * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name | |
8644 | ||
8645 | 2023-11-16 Uros Bizjak <ubizjak@gmail.com> | |
8646 | ||
8647 | PR target/78904 | |
8648 | * config/i386/i386.md (*addqi_ext2<mode>_0): | |
8649 | New define_insn_and_split pattern. | |
8650 | (*subqi_ext2<mode>_0): Ditto. | |
8651 | (*<code>qi_ext2<mode>_0): Ditto. | |
8652 | ||
8653 | 2023-11-16 John David Anglin <danglin@gcc.gnu.org> | |
8654 | ||
8655 | PR rtl-optimization/112415 | |
8656 | * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit | |
8657 | displacements before reload. Simplify logic flow. Revise | |
8658 | comments. | |
8659 | * config/pa/pa.h (TARGET_ELF64): New define. | |
8660 | (INT14_OK_STRICT): Update define and comment. | |
8661 | * config/pa/pa64-linux.h (TARGET_ELF64): Define. | |
8662 | * config/pa/predicates.md (base14_operand): Don't check | |
8663 | alignment of short displacements. | |
8664 | (integer_store_memory_operand): Don't return true when | |
8665 | reload_in_progress is true. Remove INT_5_BITS check. | |
8666 | (floating_point_store_memory_operand): Don't return true when | |
8667 | reload_in_progress is true. Use INT14_OK_STRICT to check | |
8668 | whether long displacements are always okay. | |
8669 | ||
8670 | 2023-11-16 Uros Bizjak <ubizjak@gmail.com> | |
8671 | ||
8672 | PR target/112567 | |
8673 | * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp): | |
8674 | Fix generation of invalid RTX in split pattern. | |
8675 | ||
8676 | 2023-11-16 David Malcolm <dmalcolm@redhat.com> | |
8677 | ||
8678 | * diagnostic.cc (diagnostic_context::set_option_hooks): Add | |
8679 | "lang_mask" param. | |
8680 | * diagnostic.h (diagnostic_context::option_enabled_p): Update for | |
8681 | move of m_lang_mask. | |
8682 | (diagnostic_context::set_option_hooks): Add "lang_mask" param. | |
8683 | (diagnostic_context::get_lang_mask): New. | |
8684 | (diagnostic_context::m_lang_mask): Move into m_option_callbacks, | |
8685 | thus making private. | |
8686 | * lto-wrapper.cc (main): Update for new lang_mask param of | |
8687 | set_option_hooks. | |
8688 | * toplev.cc (init_asm_output): Use get_lang_mask. | |
8689 | (general_init): Move initialization of global_dc's lang_mask to | |
8690 | new lang_mask param of set_option_hooks. | |
8691 | ||
8692 | 2023-11-16 Tamar Christina <tamar.christina@arm.com> | |
8693 | ||
8694 | PR tree-optimization/111878 | |
8695 | * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if | |
8696 | latch incorrect. | |
8697 | ||
8698 | 2023-11-16 Kito Cheng <kito.cheng@sifive.com> | |
8699 | ||
8700 | * config.gcc (riscv): Add riscv-target-attr.o. | |
8701 | * config/riscv/riscv-protos.h (riscv_declare_function_size) New. | |
8702 | (riscv_option_valid_attribute_p): New. | |
8703 | (riscv_override_options_internal): New. | |
8704 | (struct riscv_tune_info): New. | |
8705 | (riscv_parse_tune): New. | |
8706 | * config/riscv/riscv-target-attr.cc | |
8707 | (class riscv_target_attr_parser): New. | |
8708 | (struct riscv_attribute_info): New. | |
8709 | (riscv_attributes): New. | |
8710 | (riscv_target_attr_parser::parse_arch): New. | |
8711 | (riscv_target_attr_parser::handle_arch): New. | |
8712 | (riscv_target_attr_parser::handle_cpu): New. | |
8713 | (riscv_target_attr_parser::handle_tune): New. | |
8714 | (riscv_target_attr_parser::update_settings): New. | |
8715 | (riscv_process_one_target_attr): New. | |
8716 | (num_occurences_in_str): New. | |
8717 | (riscv_process_target_attr): New. | |
8718 | (riscv_option_valid_attribute_p): New. | |
8719 | * config/riscv/riscv.cc: Include target-globals.h and | |
8720 | riscv-subset.h. | |
8721 | (struct riscv_tune_info): Move to riscv-protos.h. | |
8722 | (get_tune_str): New. | |
8723 | (riscv_parse_tune): New parameter null_p. | |
8724 | (riscv_declare_function_size): New. | |
8725 | (riscv_option_override): Build target_option_default_node and | |
8726 | target_option_current_node. | |
8727 | (riscv_save_restore_target_globals): New. | |
8728 | (riscv_option_restore): New. | |
8729 | (riscv_previous_fndecl): New. | |
8730 | (riscv_set_current_function): Apply the target attribute. | |
8731 | (TARGET_OPTION_RESTORE): Define. | |
8732 | (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto. | |
8733 | * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1. | |
8734 | (ASM_DECLARE_FUNCTION_SIZE) Define. | |
8735 | * config/riscv/riscv.opt (mtune=): Add Save attribute. | |
8736 | (mcpu=): Ditto. | |
8737 | (mcmodel=): Ditto. | |
8738 | * config/riscv/t-riscv: Add build rule for riscv-target-attr.o | |
8739 | * doc/extend.texi: Add doc for target attribute. | |
8740 | ||
8741 | 2023-11-16 Kito Cheng <kito.cheng@sifive.com> | |
8742 | ||
8743 | PR target/112478 | |
8744 | * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra | |
8745 | is ever lived. | |
8746 | ||
8747 | 2023-11-16 liuhongt <hongtao.liu@intel.com> | |
8748 | ||
8749 | PR target/112532 | |
8750 | * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and | |
8751 | V2HI. | |
8752 | ||
8753 | 2023-11-16 Jakub Jelinek <jakub@redhat.com> | |
8754 | ||
8755 | PR target/112526 | |
8756 | * config/i386/i386.md | |
8757 | (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi): | |
8758 | Verify in define_peephole2 that operands[2] dies or is overwritten | |
8759 | at the end of multiplication. | |
8760 | ||
8761 | 2023-11-16 Jakub Jelinek <jakub@redhat.com> | |
8762 | ||
8763 | PR tree-optimization/112536 | |
8764 | * tree-vect-slp.cc (arg0_map): New variable. | |
8765 | (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map. | |
8766 | ||
8767 | 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8768 | ||
8769 | PR middle-end/112554 | |
8770 | * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling): | |
8771 | Clear SELECT_VL_P for non-partial vectorization. | |
8772 | ||
8773 | 2023-11-16 Hongyu Wang <hongyu.wang@intel.com> | |
8774 | ||
8775 | * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl | |
8776 | alternative with attr addr gpr16 and "jm" constraint. | |
8777 | (vec_extract_hi_<mode>): Likewise for SF vector modes. | |
8778 | (@vec_extract_hi_<mode>): Likewise. | |
8779 | (*vec_extractv2ti): Likewise. | |
8780 | (vec_set_hi_<mode><mask_name>): Likewise. | |
8781 | * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for | |
8782 | each alternative. | |
8783 | ||
8784 | 2023-11-15 Uros Bizjak <ubizjak@gmail.com> | |
8785 | ||
8786 | PR target/78904 | |
8787 | * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern. | |
8788 | (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern. | |
8789 | (*subqi_ext<mode>_2_slp): Ditto. | |
8790 | (*<any_logic:code>qi_ext<mode>_2_slp): Ditto. | |
8791 | ||
8792 | 2023-11-15 Patrick O'Neill <patrick@rivosinc.com> | |
8793 | ||
8794 | * common/config/riscv/riscv-common.cc | |
8795 | (riscv_subset_list::parse_std_ext): Emit an error and skip to | |
8796 | the next extension when a non-canonical ordering is detected. | |
8797 | ||
8798 | 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> | |
8799 | ||
8800 | * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): | |
8801 | Revert using the macro CAN_HAVE_LOCATION_P. | |
8802 | ||
8803 | 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8804 | ||
8805 | PR target/112447 | |
8806 | * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert | |
8807 | local vsetvl info before LCM suggested one. | |
8808 | Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679 | |
8809 | Co-developed-by: Vineet Gupta <vineetg@rivosinc.com> | |
8810 | ||
8811 | 2023-11-15 Vineet Gupta <vineetg@rivosinc.com> | |
8812 | ||
8813 | * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New. | |
8814 | * (riscv_extend_comparands): Call New function on operands. | |
8815 | ||
8816 | 2023-11-15 Uros Bizjak <ubizjak@gmail.com> | |
8817 | ||
8818 | * config/i386/i386.md (*addqi_ext<mode>_1_slp): | |
8819 | Add "&& " before "reload_completed" in split condition. | |
8820 | (*subqi_ext<mode>_1_slp): Ditto. | |
8821 | (*<any_logic:code>qi_ext<mode>_1_slp): Ditto. | |
8822 | ||
8823 | 2023-11-15 Uros Bizjak <ubizjak@gmail.com> | |
8824 | ||
8825 | PR target/112540 | |
8826 | * config/i386/i386.md (*addqi_ext<mode>_1_slp): | |
8827 | Correct operand numbers in split pattern. Replace !Q constraint | |
8828 | of operand 1 with !qm. Add insn constrain. | |
8829 | (*subqi_ext<mode>_1_slp): Ditto. | |
8830 | (*<any_logic:code>qi_ext<mode>_1_slp): Ditto. | |
8831 | ||
8832 | 2023-11-15 Thomas Schwinge <thomas@codesourcery.com> | |
8833 | ||
8834 | * doc/extend.texi (Nvidia PTX Built-in Functions): Fix | |
8835 | copy'n'paste-o in '__builtin_nvptx_brev' description. | |
8836 | ||
8837 | 2023-11-15 Roger Sayle <roger@nextmovesoftware.com> | |
8838 | Thomas Schwinge <thomas@codesourcery.com> | |
8839 | ||
8840 | * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete. | |
8841 | (bitrev<mode>2): Represent using bitreverse. | |
8842 | ||
8843 | 2023-11-15 Andrew Stubbs <ams@codesourcery.com> | |
8844 | Andrew Jenner <andrew@codesourcery.com> | |
8845 | ||
8846 | * config/gcn/constraints.md: Add "a" AVGPR constraint. | |
8847 | * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives. | |
8848 | (*mov<mode>_4reg): Likewise. | |
8849 | (@mov<mode>_sgprbase): Likewise. | |
8850 | (gather<mode>_insn_1offset<exec>): Likewise. | |
8851 | (gather<mode>_insn_1offset_ds<exec>): Likewise. | |
8852 | (gather<mode>_insn_2offsets<exec>): Likewise. | |
8853 | (scatter<mode>_expr<exec_scatter>): Likewise. | |
8854 | (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise. | |
8855 | (scatter<mode>_insn_2offsets<exec_scatter>): Likewise. | |
8856 | * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define. | |
8857 | (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS. | |
8858 | (gcn_hard_regno_mode_ok): Likewise. | |
8859 | (gcn_regno_reg_class): Likewise. | |
8860 | (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS. | |
8861 | (gcn_sgpr_move_p): Handle AVGPRs. | |
8862 | (gcn_secondary_reload): Reload AVGPRs via VGPRs. | |
8863 | (gcn_conditional_register_usage): Handle AVGPRs. | |
8864 | (gcn_vgpr_equivalent_register_operand): New function. | |
8865 | (gcn_valid_move_p): Check for validity of AVGPR moves. | |
8866 | (gcn_compute_frame_offsets): Handle AVGPRs. | |
8867 | (gcn_memory_move_cost): Likewise. | |
8868 | (gcn_register_move_cost): Likewise. | |
8869 | (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI. | |
8870 | (gcn_md_reorg): Handle AVGPRs. | |
8871 | (gcn_hsa_declare_function_name): Likewise. | |
8872 | (print_reg): Likewise. | |
8873 | (gcn_dwarf_register_number): Likewise. | |
8874 | * config/gcn/gcn.h (FIRST_AVGPR_REG): Define. | |
8875 | (AVGPR_REGNO): Define. | |
8876 | (LAST_AVGPR_REG): Define. | |
8877 | (SOFT_ARG_REG): Update. | |
8878 | (FRAME_POINTER_REGNUM): Update. | |
8879 | (DWARF_LINK_REGISTER): Update. | |
8880 | (FIRST_PSEUDO_REGISTER): Update. | |
8881 | (AVGPR_REGNO_P): Define. | |
8882 | (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS. | |
8883 | (REG_CLASS_CONTENTS): Add new register classes and add entries for | |
8884 | AVGPRs to all classes. | |
8885 | (REGISTER_NAMES): Add AVGPRs. | |
8886 | * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define. | |
8887 | (AP_REGNUM, FP_REGNUM): Update. | |
8888 | (define_attr "type"): Add vop3p_mai. | |
8889 | (define_attr "unit"): Handle vop3p_mai. | |
8890 | (define_attr "gcn_version"): Add "cdna2". | |
8891 | (define_attr "enabled"): Handle cdna2. | |
8892 | (*mov<mode>_insn): Add AVGPR alternatives. | |
8893 | (*movti_insn): Likewise. | |
8894 | * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New. | |
8895 | (process_asm): Process avgpr_count. | |
8896 | * config/gcn/predicates.md (gcn_avgpr_register_operand): New. | |
8897 | (gcn_avgpr_hard_register_operand): New. | |
8898 | * doc/md.texi: Document the "a" constraint. | |
8899 | ||
8900 | 2023-11-15 Andrew Stubbs <ams@codesourcery.com> | |
8901 | ||
8902 | * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier. | |
8903 | (reload_in<mode>): Delete. | |
8904 | (reload_out<mode>): Delete. | |
8905 | * config/gcn/gcn.cc (CODE_FOR): Delete. | |
8906 | (get_code_for_##PREFIX##vN##SUFFIX): Delete. | |
8907 | (CODE_FOR_OP): Delete. | |
8908 | (get_code_for_##PREFIX): Delete. | |
8909 | (gcn_secondary_reload): Replace "get_code_for" with "code_for". | |
8910 | ||
8911 | 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
8912 | ||
8913 | * config/s390/t-s390: Generate s390-gen-builtins.h without | |
8914 | linemarkers. | |
8915 | ||
8916 | 2023-11-15 Richard Biener <rguenther@suse.de> | |
8917 | ||
8918 | PR tree-optimization/112282 | |
8919 | * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from | |
8920 | the loop header. | |
8921 | ||
8922 | 2023-11-15 Richard Biener <rguenther@suse.de> | |
8923 | ||
8924 | * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when | |
8925 | we skipped an instance due to -fdbg-cnt. | |
8926 | ||
8927 | 2023-11-15 Xi Ruoyao <xry111@xry111.site> | |
8928 | ||
8929 | * config/loongarch/loongarch.cc | |
8930 | (loongarch_memmodel_needs_release_fence): Remove. | |
8931 | (loongarch_cas_failure_memorder_needs_acquire): New static | |
8932 | function. | |
8933 | (loongarch_print_operand): Redefine 'G' for the barrier on CAS | |
8934 | failure. | |
8935 | * config/loongarch/sync.md (atomic_cas_value_strong<mode>): | |
8936 | Remove the redundant barrier before the LL instruction, and | |
8937 | emit an acquire barrier on failure if needed by | |
8938 | failure_memorder. | |
8939 | (atomic_cas_value_cmp_and_7_<mode>): Likewise. | |
8940 | (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier | |
8941 | before the LL instruction. | |
8942 | (atomic_cas_value_sub_7_<mode>): Likewise. | |
8943 | (atomic_cas_value_and_7_<mode>): Likewise. | |
8944 | (atomic_cas_value_xor_7_<mode>): Likewise. | |
8945 | (atomic_cas_value_or_7_<mode>): Likewise. | |
8946 | (atomic_cas_value_nand_7_<mode>): Likewise. | |
8947 | (atomic_cas_value_exchange_7_<mode>): Likewise. | |
8948 | ||
8949 | 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8950 | ||
8951 | * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function. | |
8952 | (expand_vec_init): Add trailing optimization. | |
8953 | ||
8954 | 2023-11-15 Pan Li <pan2.li@intel.com> | |
8955 | ||
8956 | * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask): | |
8957 | Add inner_mode mask arg for mask int mode. | |
8958 | (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg | |
8959 | to get the good enough vector int mode on precision. | |
8960 | (expand_vector_init_merge_repeating_sequence): Pass required args | |
8961 | to above func. | |
8962 | ||
8963 | 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
8964 | ||
8965 | PR target/112535 | |
8966 | * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address. | |
8967 | ||
8968 | 2023-11-15 David Malcolm <dmalcolm@redhat.com> | |
8969 | ||
8970 | * json.cc (selftest::assert_print_eq): Add "loc" param and use | |
8971 | ASSERT_STREQ_AT. | |
8972 | (ASSERT_PRINT_EQ): New macro. | |
8973 | (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture | |
8974 | source location of assertion. | |
8975 | (selftest::test_writing_arrays): Likewise. | |
8976 | (selftest::test_writing_float_numbers): Likewise. | |
8977 | (selftest::test_writing_integer_numbers): Likewise. | |
8978 | (selftest::test_writing_strings): Likewise. | |
8979 | (selftest::test_writing_literals): Likewise. | |
8980 | ||
8981 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
8982 | ||
8983 | PR analyzer/103533 | |
8984 | * doc/invoke.texi (Static Analyzer Options): Add the six | |
8985 | -Wanalyzer-tainted-* warnings. Update documentation of each | |
8986 | warning to reflect removed requirement to use | |
8987 | -fanalyzer-checker=taint. Remove discussion of | |
8988 | -fanalyzer-checker=taint. | |
8989 | ||
8990 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
8991 | ||
8992 | * diagnostic-format-json.cc | |
8993 | (json_output_format::on_end_diagnostic): Update calls to m_context | |
8994 | callbacks to use member functions; tighten up scopes. | |
8995 | * diagnostic-format-sarif.cc (sarif_builder::make_result_object): | |
8996 | Likewise. | |
8997 | (sarif_builder::make_reporting_descriptor_object_for_warning): | |
8998 | Likewise. | |
8999 | * diagnostic.cc (diagnostic_context::initialize): Update for | |
9000 | callbacks being moved into m_option_callbacks and being renamed. | |
9001 | (diagnostic_context::set_option_hooks): New. | |
9002 | (diagnostic_option_classifier::classify_diagnostic): Update call | |
9003 | to global_dc->m_option_enabled to use option_enabled_p. | |
9004 | (diagnostic_context::print_option_information): Update calls to | |
9005 | m_context callbacks to use member functions; tighten up scopes. | |
9006 | (diagnostic_context::diagnostic_enabled): Likewise. | |
9007 | * diagnostic.h (diagnostic_option_enabled_cb): New typedef. | |
9008 | (diagnostic_make_option_name_cb): New typedef. | |
9009 | (diagnostic_make_option_url_cb): New typedef. | |
9010 | (diagnostic_context::option_enabled_p): New. | |
9011 | (diagnostic_context::make_option_name): New. | |
9012 | (diagnostic_context::make_option_url): New. | |
9013 | (diagnostic_context::set_option_hooks): New decl. | |
9014 | (diagnostic_context::m_option_enabled): Rename to | |
9015 | m_option_enabled_cb and move within m_option_callbacks, using | |
9016 | typedef. | |
9017 | (diagnostic_context::m_option_state): Move within | |
9018 | m_option_callbacks. | |
9019 | (diagnostic_context::m_option_name): Rename to | |
9020 | m_make_option_name_cb and move within m_option_callbacks, using | |
9021 | typedef. | |
9022 | (diagnostic_context::m_get_option_url): Likewise, renaming to | |
9023 | m_make_option_url_cb. | |
9024 | * lto-wrapper.cc (print_lto_docs_link): Update call to m_context | |
9025 | callback to use member function. | |
9026 | (main): Use diagnostic_context::set_option_hooks. | |
9027 | * opts-diagnostic.h (option_name): Make context param const. | |
9028 | (get_option_url): Likewise. | |
9029 | * opts.cc (option_name): Likewise. | |
9030 | (get_option_url): Likewise. | |
9031 | * toplev.cc (general_init): Use | |
9032 | diagnostic_context::set_option_hooks. | |
9033 | ||
9034 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
9035 | ||
9036 | * selftest-diagnostic.cc | |
9037 | (test_diagnostic_context::test_diagnostic_context): Use | |
9038 | diagnostic_start_span. | |
9039 | * tree-diagnostic-path.cc (struct event_range): Likewise. | |
9040 | ||
9041 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
9042 | ||
9043 | * diagnostic-show-locus.cc (diagnostic_context::show_locus): | |
9044 | Update for renaming of text callbacks fields. | |
9045 | * diagnostic.cc (diagnostic_context::initialize): Likewise. | |
9046 | * diagnostic.h (class diagnostic_context): Add "friend" for | |
9047 | accessors to m_text_callbacks. | |
9048 | (diagnostic_context::m_text_callbacks): Make private, and add an | |
9049 | "m_" prefix to field names. | |
9050 | (diagnostic_starter): Convert from macro to inline function. | |
9051 | (diagnostic_start_span): New. | |
9052 | (diagnostic_finalizer): Convert from macro to inline function. | |
9053 | ||
9054 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
9055 | ||
9056 | * diagnostic.h (diagnostic_ready_p): Convert from macro to inline | |
9057 | function. | |
9058 | ||
9059 | 2023-11-14 Uros Bizjak <ubizjak@gmail.com> | |
9060 | ||
9061 | PR target/78904 | |
9062 | * config/i386/i386.md (*addqi_ext<mode>_1_slp): | |
9063 | New define_insn_and_split pattern. | |
9064 | (*subqi_ext<mode>_1_slp): Ditto. | |
9065 | (*<any_logic:code>qi_ext<mode>_1_slp): Ditto. | |
9066 | ||
9067 | 2023-11-14 Andrew Stubbs <ams@codesourcery.com> | |
9068 | ||
9069 | PR target/112481 | |
9070 | * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment. | |
9071 | ||
9072 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
9073 | ||
9074 | * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column): | |
9075 | Use m_context's file_cache. | |
9076 | (sarif_builder::maybe_make_artifact_content_object): Likewise. | |
9077 | (sarif_builder::get_source_lines): Likewise. | |
9078 | * diagnostic-show-locus.cc | |
9079 | (exploc_with_display_col::exploc_with_display_col): Add file_cache | |
9080 | param. | |
9081 | (layout::m_file_cache): New field. | |
9082 | (make_range): Add file_cache param. | |
9083 | (selftest::test_layout_range_for_single_point): Create and use a | |
9084 | temporary file_cache. | |
9085 | (selftest::test_layout_range_for_single_line): Likewise. | |
9086 | (selftest::test_layout_range_for_multiple_lines): Likewise. | |
9087 | (layout::layout): Initialize m_file_cache from the context and use it. | |
9088 | (layout::maybe_add_location_range): Use m_file_cache. | |
9089 | (layout::calculate_x_offset_display): Likewise. | |
9090 | (get_affected_range): Add file_cache param. | |
9091 | (get_printed_columns): Likewise. | |
9092 | (line_corrections::line_corrections): Likewwise. | |
9093 | (line_corrections::m_file_cache): New field. | |
9094 | (source_line::source_line): Add file_cache param. | |
9095 | (line_corrections::add_hint): Use m_file_cache. | |
9096 | (layout::print_trailing_fixits): Likewise. | |
9097 | (layout::print_line): Likewise. | |
9098 | (selftest::test_layout_x_offset_display_utf8): Create and use a | |
9099 | temporary file_cache. | |
9100 | (selftest::test_layout_x_offset_display_tab): Likewise. | |
9101 | (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise. | |
9102 | (selftest::test_add_location_if_nearby): Pass global_dc's | |
9103 | file_cache to temp_source_file ctor. | |
9104 | (selftest::test_overlapped_fixit_printing): Create and use a | |
9105 | temporary file_cache. | |
9106 | (selftest::test_overlapped_fixit_printing_utf8): Likewise. | |
9107 | (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache. | |
9108 | * diagnostic.cc (diagnostic_context::initialize): Always create a | |
9109 | file_cache. | |
9110 | (diagnostic_context::initialize_input_context): Assume | |
9111 | m_file_cache has already been created. | |
9112 | (diagnostic_context::create_edit_context): Pass m_file_cache to | |
9113 | edit_context. | |
9114 | (convert_column_unit): Add file_cache param. | |
9115 | (diagnostic_context::converted_column): Use context's file_cache. | |
9116 | (print_parseable_fixits): Add file_cache param. | |
9117 | (diagnostic_context::report_diagnostic): Use context's file_cache. | |
9118 | (selftest::test_print_parseable_fixits_none): Create and use a | |
9119 | temporary file_cache. | |
9120 | (selftest::test_print_parseable_fixits_insert): Likewise. | |
9121 | (selftest::test_print_parseable_fixits_remove): Likewise. | |
9122 | (selftest::test_print_parseable_fixits_replace): Likewise. | |
9123 | (selftest::test_print_parseable_fixits_bytes_vs_display_columns): | |
9124 | Likewise. | |
9125 | * diagnostic.h (diagnostic_context::file_cache_init): Delete. | |
9126 | (diagnostic_context::get_file_cache): Convert return type from | |
9127 | pointer to reference. | |
9128 | * edit-context.cc (edited_file::get_file_cache): New. | |
9129 | (edited_file::m_edit_context): New. | |
9130 | (edit_context::edit_context): Add file_cache param. | |
9131 | (edit_context::get_or_insert_file): Pass this to edited_file's | |
9132 | ctor. | |
9133 | (edited_file::edited_file): Add edit_context param. | |
9134 | (edited_file::print_content): Use get_file_cache. | |
9135 | (edited_file::print_diff_hunk): Likewise. | |
9136 | (edited_file::print_run_of_changed_lines): Likewise. | |
9137 | (edited_file::get_or_insert_line): Likewise. | |
9138 | (edited_file::get_num_lines): Likewise. | |
9139 | (edited_line::edited_line): Pass in file_cache and use it. | |
9140 | (selftest::test_get_content): Create and use a | |
9141 | temporary file_cache. | |
9142 | (selftest::test_applying_fixits_insert_before): Likewise. | |
9143 | (selftest::test_applying_fixits_insert_after): Likewise. | |
9144 | (selftest::test_applying_fixits_insert_after_at_line_end): | |
9145 | Likewise. | |
9146 | (selftest::test_applying_fixits_insert_after_failure): Likewise. | |
9147 | (selftest::test_applying_fixits_insert_containing_newline): | |
9148 | Likewise. | |
9149 | (selftest::test_applying_fixits_growing_replace): Likewise. | |
9150 | (selftest::test_applying_fixits_shrinking_replace): Likewise. | |
9151 | (selftest::test_applying_fixits_replace_containing_newline): | |
9152 | Likewise. | |
9153 | (selftest::test_applying_fixits_remove): Likewise. | |
9154 | (selftest::test_applying_fixits_multiple): Likewise. | |
9155 | (selftest::test_applying_fixits_multiple_lines): Likewise. | |
9156 | (selftest::test_applying_fixits_modernize_named_init): Likewise. | |
9157 | (selftest::test_applying_fixits_modernize_named_init): Likewise. | |
9158 | (selftest::test_applying_fixits_unreadable_file): Likewise. | |
9159 | (selftest::test_applying_fixits_line_out_of_range): Likewise. | |
9160 | (selftest::test_applying_fixits_column_validation): Likewise. | |
9161 | (selftest::test_applying_fixits_column_validation): Likewise. | |
9162 | (selftest::test_applying_fixits_column_validation): Likewise. | |
9163 | (selftest::test_applying_fixits_column_validation): Likewise. | |
9164 | * edit-context.h (edit_context::edit_context): Add file_cache | |
9165 | param. | |
9166 | (edit_context::get_file_cache): New. | |
9167 | (edit_context::m_file_cache): New. | |
9168 | * final.cc: Include "diagnostic.h". | |
9169 | (asm_show_source): Use global_dc's file_cache. | |
9170 | * gcc-rich-location.cc (blank_line_before_p): Add file_cache | |
9171 | param. | |
9172 | (use_new_line): Likewise. | |
9173 | (gcc_rich_location::add_fixit_insert_formatted): Use global dc's | |
9174 | file_cache. | |
9175 | * input.cc (diagnostic_file_cache_init): Delete. | |
9176 | (diagnostic_context::file_cache_init): Delete. | |
9177 | (diagnostics_file_cache_forcibly_evict_file): Delete. | |
9178 | (file_cache::missing_trailing_newline_p): New. | |
9179 | (file_cache::evicted_cache_tab_entry): Don't call | |
9180 | diagnostic_file_cache_init. | |
9181 | (location_get_source_line): Delete. | |
9182 | (get_source_text_between): Add file_cache param. | |
9183 | (get_source_file_content): Delete. | |
9184 | (location_missing_trailing_newline): Delete. | |
9185 | (location_compute_display_column): Add file_cache param. | |
9186 | (dump_location_info): Create and use temporary file_cache. | |
9187 | (get_substring_ranges_for_loc): Add file_cache param. | |
9188 | (get_location_within_string): Likewise. | |
9189 | (get_source_range_for_char): Likewise. | |
9190 | (get_num_source_ranges_for_substring): Likewise. | |
9191 | (selftest::test_reading_source_line): Create and use temporary | |
9192 | file_cache. | |
9193 | (selftest::lexer_test::m_file_cache): New field. | |
9194 | (selftest::assert_char_at_range): Use test.m_file_cache. | |
9195 | (selftest::assert_num_substring_ranges): Likewise. | |
9196 | (selftest::assert_has_no_substring_ranges): Likewise. | |
9197 | (selftest::test_lexer_string_locations_concatenation_2): Likewise. | |
9198 | * input.h (class file_cache): New forward decl. | |
9199 | (location_compute_display_column): Add file_cache param. | |
9200 | (location_get_source_line): Delete. | |
9201 | (get_source_text_between): Add file_cache param. | |
9202 | (get_source_file_content): Delete. | |
9203 | (location_missing_trailing_newline): Delete. | |
9204 | (file_cache::missing_trailing_newline_p): New decl. | |
9205 | (diagnostics_file_cache_forcibly_evict_file): Delete. | |
9206 | * selftest.cc (named_temp_file::named_temp_file): Add file_cache | |
9207 | param. | |
9208 | (named_temp_file::~named_temp_file): Optionally evict the file | |
9209 | from the given file_cache. | |
9210 | (temp_source_file::temp_source_file): Add file_cache param. | |
9211 | * selftest.h (class file_cache): New forward decl. | |
9212 | (named_temp_file::named_temp_file): Add file_cache param. | |
9213 | (named_temp_file::m_file_cache): New field. | |
9214 | (temp_source_file::temp_source_file): Add file_cache param. | |
9215 | * substring-locations.h (get_location_within_string): Add | |
9216 | file_cache param. | |
9217 | ||
9218 | 2023-11-14 David Malcolm <dmalcolm@redhat.com> | |
9219 | ||
9220 | * diagnostic-format-json.cc: Use type-specific "set_*" functions | |
9221 | of json::object to avoid naked new of json value subclasses. | |
9222 | * diagnostic-format-sarif.cc: Likewise. | |
9223 | * gcov.cc: Likewise. | |
9224 | * json.cc (object::set_string): New. | |
9225 | (object::set_integer): New. | |
9226 | (object::set_float): New. | |
9227 | (object::set_bool): New. | |
9228 | (selftest::test_writing_objects): Use object::set_string. | |
9229 | * json.h (object::set_string): New decl. | |
9230 | (object::set_integer): New decl. | |
9231 | (object::set_float): New decl. | |
9232 | (object::set_bool): New decl. | |
9233 | * optinfo-emit-json.cc: Use type-specific "set_*" functions of | |
9234 | json::object to avoid naked new of json value subclasses. | |
9235 | * timevar.cc: Likewise. | |
9236 | * tree-diagnostic-path.cc: Likewise. | |
9237 | ||
9238 | 2023-11-14 Andrew MacLeod <amacleod@redhat.com> | |
9239 | ||
9240 | PR tree-optimization/112509 | |
9241 | * tree-vrp.cc (find_case_label_range): Create range from case labels. | |
9242 | ||
9243 | 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
9244 | ||
9245 | * config/s390/s390-builtin-types.def: Add/remove types. | |
9246 | * config/s390/s390-builtins.def (s390_vec_scatter_element_flt): | |
9247 | The type for the offset should be UV4SI instead of V4SF. | |
9248 | ||
9249 | 2023-11-14 Saurabh Jha <saurabh.jha@arm.com> | |
9250 | ||
9251 | PR target/112337 | |
9252 | * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC | |
9253 | and DEC operations. | |
9254 | ||
9255 | 2023-11-14 Richard Biener <rguenther@suse.de> | |
9256 | ||
9257 | PR tree-optimization/111233 | |
9258 | PR tree-optimization/111652 | |
9259 | PR tree-optimization/111727 | |
9260 | PR tree-optimization/111838 | |
9261 | PR tree-optimization/112113 | |
9262 | * tree-ssa-loop-split.cc (patch_loop_exit): Get the new | |
9263 | guard code instead of the old guard stmt. | |
9264 | (split_loop): Adjust. | |
9265 | ||
9266 | 2023-11-14 Richard Biener <rguenther@suse.de> | |
9267 | ||
9268 | * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p): | |
9269 | Consider all loops in the nest when looking for | |
9270 | lambda_vector_zerop. | |
9271 | ||
9272 | 2023-11-14 Richard Biener <rguenther@suse.de> | |
9273 | ||
9274 | PR tree-optimization/112281 | |
9275 | * tree-loop-distribution.cc (pg_add_dependence_edges): | |
9276 | Preserve stmt order when the innermost loop has exact | |
9277 | overlap. | |
9278 | ||
9279 | 2023-11-14 Jakub Jelinek <jakub@redhat.com> | |
9280 | ||
9281 | PR target/112523 | |
9282 | PR ada/112514 | |
9283 | * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move | |
9284 | operands[1] aka low part of input rather than operands[3] aka high | |
9285 | part of input to output if not the same register. | |
9286 | ||
9287 | 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com> | |
9288 | ||
9289 | * config.gcc: Add s390-gen-builtins.h to target_gtfiles. | |
9290 | * config/s390/s390-builtins.h (s390_builtin_types) | |
9291 | (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker. | |
9292 | * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h. | |
9293 | Add build rule for s390-gen-builtins.h. | |
9294 | ||
9295 | 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com> | |
9296 | ||
9297 | * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check | |
9298 | for error_mark_node. | |
9299 | ||
9300 | 2023-11-14 Jakub Jelinek <jakub@redhat.com> | |
9301 | ||
9302 | PR c/111309 | |
9303 | * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG, | |
9304 | BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New | |
9305 | builtins. | |
9306 | * builtins.cc (fold_builtin_bit_query): New function. | |
9307 | (fold_builtin_1): Use it for | |
9308 | BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G. | |
9309 | (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G. | |
9310 | * fold-const-call.cc: Fix comment typo on tm.h inclusion. | |
9311 | (fold_const_call_ss): Handle | |
9312 | CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G. | |
9313 | (fold_const_call_sss): New function. | |
9314 | (fold_const_call_1): Call it for 2 argument functions returning | |
9315 | scalar when passed 2 INTEGER_CSTs. | |
9316 | * genmatch.cc (cmp_operand): For function calls also compare | |
9317 | number of arguments. | |
9318 | (fns_cmp): New function. | |
9319 | (dt_node::gen_kids): Sort fns and generic_fns. | |
9320 | (dt_node::gen_kids_1): Handle fns with the same id but different | |
9321 | number of arguments. | |
9322 | * match.pd (CLZ simplifications): Drop checks for defined behavior | |
9323 | at zero. Add variant of simplifications for IFN_CLZ with 2 arguments. | |
9324 | (CTZ simplifications): Drop checks for defined behavior at zero, | |
9325 | don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of | |
9326 | simplifications for IFN_CTZ with 2 arguments. | |
9327 | (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of | |
9328 | type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than | |
9329 | one argument. Add variant for matching CLZ with 2 arguments. | |
9330 | (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly. | |
9331 | * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New | |
9332 | method. | |
9333 | (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS} | |
9334 | and IFN_{PARITY,POPCOUNT} calls. | |
9335 | * gimple-range-op.cc (cfn_clz::fold_range): Don't check | |
9336 | CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead | |
9337 | assume defined value at zero if the call has 2 arguments and use | |
9338 | second argument value for that case. | |
9339 | (cfn_ctz::fold_range): Similarly. | |
9340 | (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal | |
9341 | or op_cfn_ctz_internal only if internal fn call has 2 arguments and | |
9342 | set m_op2 in that case. | |
9343 | * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern, | |
9344 | vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero | |
9345 | use second argument of calls if present, otherwise assume UB at zero, | |
9346 | create 2 argument .CLZ/.CTZ calls if needed. | |
9347 | * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ | |
9348 | calls. | |
9349 | * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument | |
9350 | .CLZ/.CTZ calls if needed. | |
9351 | * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2 | |
9352 | argument .CTZ calls if needed. | |
9353 | * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle | |
9354 | 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument | |
9355 | .CLZ/.CTZ calls. | |
9356 | * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg, | |
9357 | __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document. | |
9358 | ||
9359 | 2023-11-14 Xi Ruoyao <xry111@xry111.site> | |
9360 | ||
9361 | PR target/112330 | |
9362 | * config/loongarch/genopts/loongarch.opt.in: Add | |
9363 | -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to | |
9364 | account conditional branch relaxation support status. | |
9365 | * config/loongarch/loongarch.opt: Regenerate. | |
9366 | * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if | |
9367 | the assembler supports conditional branch relaxation. | |
9368 | * configure: Regenerate. | |
9369 | * config.in: Regenerate. Note that there are some unrelated | |
9370 | changes introduced by r14-5424 (which does not contain a | |
9371 | config.in regeneration). | |
9372 | * config/loongarch/loongarch-opts.h | |
9373 | (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined. | |
9374 | * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT): | |
9375 | Define. | |
9376 | (ASM_MRELAX_SPEC): Define. | |
9377 | (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}". | |
9378 | * config/loongarch/loongarch.cc: Take the setting of | |
9379 | -m[no-]relax into account when determining the default of | |
9380 | -mexplicit-relocs=. | |
9381 | * doc/invoke.texi: Document -m[no-]relax and | |
9382 | -m[no-]pass-mrelax-to-as for LoongArch. Update the default | |
9383 | value of -mexplicit-relocs=. | |
9384 | ||
9385 | 2023-11-14 liuhongt <hongtao.liu@intel.com> | |
9386 | ||
9387 | PR tree-optimization/112496 | |
9388 | * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return | |
9389 | false when !tree_nop_conversion_p (TREE_TYPE (vectype), | |
9390 | TREE_TYPE (init_expr)). | |
9391 | ||
9392 | 2023-11-14 Xi Ruoyao <xry111@xry111.site> | |
9393 | ||
9394 | * config/loongarch/sync.md (mem_thread_fence): Remove redundant | |
9395 | check. | |
9396 | (mem_thread_fence_1): Emit finer-grained DBAR hints for | |
9397 | different memory models, instead of 0. | |
9398 | ||
9399 | 2023-11-14 Jakub Jelinek <jakub@redhat.com> | |
9400 | ||
9401 | PR middle-end/112511 | |
9402 | * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like | |
9403 | INTEGER_TYPE. | |
9404 | ||
9405 | 2023-11-14 Jakub Jelinek <jakub@redhat.com> | |
9406 | Hu, Lin1 <lin1.hu@intel.com> | |
9407 | ||
9408 | PR target/112435 | |
9409 | * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>, | |
9410 | <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add | |
9411 | alternative with just x instead of v constraints and xjm instead of | |
9412 | vm and use vblendps as optimization only with that alternative. | |
9413 | ||
9414 | 2023-11-14 liuhongt <hongtao.liu@intel.com> | |
9415 | ||
9416 | PR tree-optimization/105735 | |
9417 | PR tree-optimization/111972 | |
9418 | * tree-scalar-evolution.cc | |
9419 | (analyze_and_compute_bitop_with_inv_effect): Handle bitop with | |
9420 | INTEGER_CST. | |
9421 | ||
9422 | 2023-11-13 Arsen Arsenović <arsen@aarsen.me> | |
9423 | ||
9424 | * configure: Regenerate. | |
9425 | * aclocal.m4: Regenerate. | |
9426 | * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from | |
9427 | LIBINTL_DEP. | |
9428 | * doc/install.texi: Document new (notable) flags added by the | |
9429 | optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc | |
9430 | with gettext dependency. | |
9431 | ||
9432 | 2023-11-13 Uros Bizjak <ubizjak@gmail.com> | |
9433 | ||
9434 | * config/i386/i386-expand.h (gen_pushfl): New prototype. | |
9435 | (gen_popfl): Ditto. | |
9436 | * config/i386/i386-expand.cc (ix86_expand_builtin) | |
9437 | [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl. | |
9438 | [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl. | |
9439 | * config/i386/i386.cc (gen_pushfl): New function. | |
9440 | (gen_popfl): Ditto. | |
9441 | * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL. | |
9442 | (@pushfl<mode>2): Rename from *pushfl<mode>2. | |
9443 | Rewrite as unspec using UNSPEC_PUSHFL. | |
9444 | (@popfl<mode>1): Rename from *popfl<mode>1. | |
9445 | Rewrite as unspec using UNSPEC_POPFL. | |
9446 | ||
9447 | 2023-11-13 Uros Bizjak <ubizjak@gmail.com> | |
9448 | ||
9449 | PR target/112494 | |
9450 | * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode. | |
9451 | ||
9452 | 2023-11-13 Robin Dapp <rdapp@ventanamicro.com> | |
9453 | ||
9454 | * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer | |
9455 | equality for REG_EQUAL. | |
9456 | ||
9457 | 2023-11-13 Richard Biener <rguenther@suse.de> | |
9458 | ||
9459 | PR tree-optimization/112495 | |
9460 | * tree-data-ref.cc (runtime_alias_check_p): Reject checks | |
9461 | between different address spaces. | |
9462 | ||
9463 | 2023-11-13 Richard Biener <rguenther@suse.de> | |
9464 | ||
9465 | PR middle-end/112487 | |
9466 | * tree-inline.cc (setup_one_parameter): When the parameter | |
9467 | is unused only insert a debug bind when there's not a gross | |
9468 | mismatch in value and declared parameter type. Do not assert | |
9469 | there effectively isn't. | |
9470 | ||
9471 | 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
9472 | ||
9473 | * config/riscv/riscv-v.cc | |
9474 | (rvv_builder::combine_sequence_use_merge_profitable_p): New function. | |
9475 | (expand_vector_init_merge_combine_sequence): Ditto. | |
9476 | (expand_vec_init): Adapt for new optimization. | |
9477 | ||
9478 | 2023-11-13 liuhongt <hongtao.liu@intel.com> | |
9479 | ||
9480 | * config/i386/i386-expand.cc | |
9481 | (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and | |
9482 | V2HF/V2BF. | |
9483 | (ix86_expand_vector_init_one_nonzero): Ditto. | |
9484 | (ix86_expand_vector_init_one_var): Ditto. | |
9485 | (ix86_expand_vector_init_general): Ditto. | |
9486 | (ix86_expand_vector_set_var): Ditto. | |
9487 | (ix86_expand_vector_set): Ditto. | |
9488 | (ix86_expand_vector_extract): Ditto. | |
9489 | * config/i386/mmx.md | |
9490 | (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF. | |
9491 | (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x, | |
9492 | x, x), add a new define_split after the pattern. | |
9493 | (*mmx_pextrw<mode>): New define_insn. | |
9494 | (mmx_pshufw_1): Rename to .. | |
9495 | (mmx_pshufw<mode>_1): .. this, extend to V4FI_64. | |
9496 | (*mmx_pblendw64): Extend to V4FI_64. | |
9497 | (*vec_dup<mode>): New define_insn. | |
9498 | (vec_setv4hi): Rename to .. | |
9499 | (vec_set<mode>): .. this, and extend to V4FI_64 | |
9500 | (vec_extractv4hihi): Rename to .. | |
9501 | (vec_extract<mode><mmxscalarmodelower>): .. this, and extend | |
9502 | to V4FI_64. | |
9503 | (vec_init<mode><mmxscalarmodelower>): New define_insn. | |
9504 | (*pinsrw): Extend to V2FI_32, add a new alternative (&x, | |
9505 | x, x), and add a new define_split after it. | |
9506 | (*pextrw<mode>): New define_insn. | |
9507 | (vec_setv2hi): Rename to .. | |
9508 | (vec_set<mode>): .. this, extend to V2FI_32. | |
9509 | (vec_extractv2hihi): Rename to .. | |
9510 | (vec_extract<mode><mmxscalarmodelower>): .. this, extend to | |
9511 | V2FI_32. | |
9512 | (*punpckwd): Extend to V2FI_32. | |
9513 | (*pshufw_1): Rename to .. | |
9514 | (*pshufw<mode>_1): .. this, extend to V2FI_32. | |
9515 | (vec_initv2hihi): Rename to .. | |
9516 | (vec_init<mode><mmxscalarmodelower>): .. this, and extend to | |
9517 | V2FI_32. | |
9518 | (*vec_dup<mode>): New define_insn. | |
9519 | * config/i386/sse.md (*vec_extract<mode>): Refine constraint | |
9520 | from v to Yw. | |
9521 | ||
9522 | 2023-11-13 Roger Sayle <roger@nextmovesoftware.com> | |
9523 | ||
9524 | * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that | |
9525 | represents the carry flag being set if the operand is non-zero. | |
9526 | (adc_f): New define_insn representing adc with updated flags. | |
9527 | (ashrdi3): New define_expand that only handles shifts by 1. | |
9528 | (ashrdi3_cnt1): New pre-reload define_insn_and_split. | |
9529 | (lshrdi3): New define_expand that only handles shifts by 1. | |
9530 | (lshrdi3_cnt1): New pre-reload define_insn_and_split. | |
9531 | (rrcsi2): New define_insn for rrc (SImode rotate right through carry). | |
9532 | (rrcsi2_carry): Likewise for rrc.f, as above but updating flags. | |
9533 | (rotldi3): New define_expand that only handles rotates by 1. | |
9534 | (rotldi3_cnt1): New pre-reload define_insn_and_split. | |
9535 | (rotrdi3): New define_expand that only handles rotates by 1. | |
9536 | (rotrdi3_cnt1): New pre-reload define_insn_and_split. | |
9537 | (lshrsi3_cnt1_carry): New define_insn for lsr.f. | |
9538 | (ashrsi3_cnt1_carry): New define_insn for asr.f. | |
9539 | (btst_0_carry): New define_insn for asr.f without result. | |
9540 | ||
9541 | 2023-11-13 Roger Sayle <roger@nextmovesoftware.com> | |
9542 | ||
9543 | * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to | |
9544 | arc_fold_builtin. | |
9545 | (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP | |
9546 | into a rotate. Evaluate ARC_BUILTIN_NORM and | |
9547 | ARC_BUILTIN_NORMW of constant arguments. | |
9548 | * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete. | |
9549 | (normw): Make output template/assembler whitespace consistent. | |
9550 | (swap): Remove define_insn, only use of SWAP UNSPEC. | |
9551 | * config/arc/builtins.def: Tweak indentation. | |
9552 | (SWAP): Expand using rotlsi2_cnt16 instead of using swap. | |
9553 | ||
9554 | 2023-11-13 Roger Sayle <roger@nextmovesoftware.com> | |
9555 | ||
9556 | * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New | |
9557 | define_insn_and_split to optimize register usage of doubleword | |
9558 | right shifts followed by truncation. | |
9559 | ||
9560 | 2023-11-13 Jakub Jelinek <jakub@redhat.com> | |
9561 | ||
9562 | * config/i386/constraints.md: Remove j constraint letter from list of | |
9563 | unused letters. | |
9564 | ||
9565 | 2023-11-13 Xi Ruoyao <xry111@xry111.site> | |
9566 | ||
9567 | PR rtl-optimization/112483 | |
9568 | * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>: | |
9569 | Fix the simplification of (fcopysign x, NEGATIVE_CONST). | |
9570 | ||
9571 | 2023-11-13 Jakub Jelinek <jakub@redhat.com> | |
9572 | ||
9573 | PR tree-optimization/111967 | |
9574 | * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow | |
9575 | m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1. | |
9576 | (block_range_cache::dump): Iterate from 1 rather than 0. Don't use | |
9577 | ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to | |
9578 | m_ssa_ranges.length () rather than num_ssa_names. | |
9579 | ||
9580 | 2023-11-13 Xi Ruoyao <xry111@xry111.site> | |
9581 | ||
9582 | * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode | |
9583 | iterator. | |
9584 | (ST_ANY): New mode iterator. | |
9585 | (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and | |
9586 | ST_ANY instead of QHWD for applicable patterns. | |
9587 | ||
9588 | 2023-11-13 Xi Ruoyao <xry111@xry111.site> | |
9589 | ||
9590 | PR target/112476 | |
9591 | * config/loongarch/loongarch.cc | |
9592 | (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg | |
9593 | instead of gen_rtx_SUBREG. | |
9594 | ||
9595 | 2023-11-13 Pan Li <pan2.li@intel.com> | |
9596 | ||
9597 | * config/riscv/autovec.md: Add bridge mode to lrint and lround | |
9598 | pattern. | |
9599 | * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg | |
9600 | bridge machine mode. | |
9601 | (expand_vec_lround): Ditto. | |
9602 | * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper | |
9603 | func impl to emit vfwcvt.f.f. | |
9604 | (emit_vec_rounding_to_integer): Handle the HF to DI rounding | |
9605 | with the bridge mode. | |
9606 | (expand_vec_lrint): Reorder the args. | |
9607 | (expand_vec_lround): Ditto. | |
9608 | (expand_vec_lceil): Ditto. | |
9609 | (expand_vec_lfloor): Ditto. | |
9610 | * config/riscv/vector-iterators.md: Add vector HFmode and bridge | |
9611 | mode for converting to DI. | |
9612 | ||
9613 | 2023-11-12 Jeff Law <jlaw@ventanamicro.com> | |
9614 | ||
9615 | Revert: | |
9616 | 2023-11-11 Jin Ma <jinma@linux.alibaba.com> | |
9617 | ||
9618 | * haifa-sched.cc (use_or_clobber_starts_range_p): New. | |
9619 | (prune_ready_list): USE or CLOBBER should delay execution | |
9620 | if it starts a new live range. | |
9621 | ||
9622 | 2023-11-12 Uros Bizjak <ubizjak@gmail.com> | |
9623 | ||
9624 | * config/i386/i386.md (*stack_protect_set_4s_<mode>_di): | |
9625 | Remove alternative 0. | |
9626 | ||
9627 | 2023-11-11 Eric Botcazou <ebotcazou@adacore.com> | |
9628 | ||
9629 | * ipa-cp.cc (print_ipcp_constant_value): Move to... | |
9630 | (values_equal_for_ipcp_p): Deal with VAR_DECLs from the | |
9631 | constant pool. | |
9632 | * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise. | |
9633 | (ipa_print_node_jump_functions_for_edge): Call the function | |
9634 | ipa_print_constant_value to print IPA_JF_CONST elements. | |
9635 | ||
9636 | 2023-11-11 Jin Ma <jinma@linux.alibaba.com> | |
9637 | ||
9638 | * haifa-sched.cc (use_or_clobber_starts_range_p): New. | |
9639 | (prune_ready_list): USE or CLOBBER should delay execution | |
9640 | if it starts a new live range. | |
9641 | ||
9642 | 2023-11-11 Jakub Jelinek <jakub@redhat.com> | |
9643 | ||
9644 | PR middle-end/112430 | |
9645 | * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the | |
9646 | order they were pushed rather than in reverse order. Call | |
9647 | release_defs after gsi_remove. | |
9648 | ||
9649 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9650 | ||
9651 | * target.def (mode_switching.backprop): New hook. | |
9652 | * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook. | |
9653 | * doc/tm.texi: Regenerate. | |
9654 | * mode-switching.cc (struct bb_info): Add single_succ. | |
9655 | (confluence_info): Add transp field. | |
9656 | (single_succ_confluence_n, single_succ_transfer): New functions. | |
9657 | (backprop_confluence_n, backprop_transfer): Likewise. | |
9658 | (optimize_mode_switching): Use them. Push mode transitions onto | |
9659 | a block's incoming edges, if the backprop hook requires it. | |
9660 | ||
9661 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9662 | ||
9663 | * target.def (mode_switching.confluence): New hook. | |
9664 | * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook. | |
9665 | * doc/tm.texi.in: Regenerate. | |
9666 | * mode-switching.cc (confluence_info): New variable. | |
9667 | (mode_confluence, forward_confluence_n, forward_transfer): New | |
9668 | functions. | |
9669 | (optimize_mode_switching): Use them to calculate mode_in when | |
9670 | TARGET_MODE_CONFLUENCE is defined. | |
9671 | ||
9672 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9673 | ||
9674 | * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values. | |
9675 | ||
9676 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9677 | ||
9678 | * target.def (mode_switching.after): Add a regs_live parameter. | |
9679 | * doc/tm.texi: Regenerate. | |
9680 | * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update | |
9681 | accordingly. | |
9682 | * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise. | |
9683 | (epiphany_mode_after): Likewise. | |
9684 | * config/i386/i386.cc (ix86_mode_after): Likewise. | |
9685 | * config/riscv/riscv.cc (riscv_mode_after): Likewise. | |
9686 | * config/sh/sh.cc (sh_mode_after): Likewise. | |
9687 | * mode-switching.cc (optimize_mode_switching): Likewise. | |
9688 | ||
9689 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9690 | ||
9691 | * target.def (mode_switching.needed): Add a regs_live parameter. | |
9692 | * doc/tm.texi: Regenerate. | |
9693 | * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update | |
9694 | accordingly. | |
9695 | * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise. | |
9696 | * config/epiphany/mode-switch-use.cc (insert_uses): Likewise. | |
9697 | * config/i386/i386.cc (ix86_mode_needed): Likewise. | |
9698 | * config/riscv/riscv.cc (riscv_mode_needed): Likewise. | |
9699 | * config/sh/sh.cc (sh_mode_needed): Likewise. | |
9700 | * mode-switching.cc (optimize_mode_switching): Likewise. | |
9701 | (create_pre_exit): Likewise, using the DF simulate functions | |
9702 | to calculate the required information. | |
9703 | ||
9704 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9705 | ||
9706 | * target.def (mode_switching.eh_handler): New hook. | |
9707 | * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook. | |
9708 | * doc/tm.texi: Regenerate. | |
9709 | * mode-switching.cc (optimize_mode_switching): Use eh_handler | |
9710 | to get the mode on entry to an exception handler. | |
9711 | ||
9712 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9713 | ||
9714 | * mode-switching.cc (optimize_mode_switching): Mark the exit | |
9715 | block as nontransparent if it requires a specific mode. | |
9716 | Handle the entry and exit mode as sibling rather than nested | |
9717 | concepts. Remove outdated comment. | |
9718 | ||
9719 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9720 | ||
9721 | * mode-switching.cc (optimize_mode_switching): Initially | |
9722 | compute transparency in a bit-per-block bitmap. | |
9723 | ||
9724 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9725 | ||
9726 | * mode-switching.cc (seginfo): Add a prev_mode field. | |
9727 | (new_seginfo): Take and initialize the prev_mode. | |
9728 | (optimize_mode_switching): Update calls accordingly. | |
9729 | Use the recorded modes during the emit phase, rather than | |
9730 | computing one on the fly. | |
9731 | ||
9732 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9733 | ||
9734 | * mode-switching.cc (add_seginfo): Replace head pointer with | |
9735 | a pointer to the tail pointer. | |
9736 | (optimize_mode_switching): Update calls accordingly. | |
9737 | ||
9738 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9739 | ||
9740 | * mode-switching.cc (optimize_mode_switching): Call | |
9741 | df_note_add_problem. | |
9742 | ||
9743 | 2023-11-11 Richard Sandiford <richard.sandiford@arm.com> | |
9744 | ||
9745 | * target.def: Tweak documentation of mode-switching hooks. | |
9746 | * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation. | |
9747 | (NUM_MODES_FOR_MODE_SWITCHING): Likewise. | |
9748 | * doc/tm.texi: Regenerate. | |
9749 | ||
9750 | 2023-11-11 Martin Uecker <uecker@tugraz.at> | |
9751 | ||
9752 | PR c/110815 | |
9753 | PR c/112428 | |
9754 | * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes): | |
9755 | remove warning for parameters declared with `static`. | |
9756 | ||
9757 | 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com> | |
9758 | ||
9759 | * doc/sourcebuild.texi (Scan the assembly output): Document change. | |
9760 | ||
9761 | 2023-11-10 Mao <sray@live.com> | |
9762 | ||
9763 | PR middle-end/110983 | |
9764 | * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry. | |
9765 | ||
9766 | 2023-11-10 Maciej W. Rozycki <macro@embecosm.com> | |
9767 | ||
9768 | * config/riscv/riscv.md (length): Fix indentation for branch and | |
9769 | jump length calculation expressions. | |
9770 | ||
9771 | 2023-11-10 Eric Botcazou <ebotcazou@adacore.com> | |
9772 | ||
9773 | * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>: | |
9774 | Deal with nonempty constant CONSTRUCTORs. | |
9775 | (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET | |
9776 | and DECL_FIELD_BIT_OFFSET for FIELD_DECLs. | |
9777 | ||
9778 | 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com> | |
9779 | ||
9780 | PR target/112337 | |
9781 | * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function. | |
9782 | (equiv_can_be_consumed_p): Use it. | |
9783 | ||
9784 | 2023-11-10 Richard Sandiford <richard.sandiford@arm.com> | |
9785 | ||
9786 | * read-rtl.cc (md_reader::read_mapping): Allow iterators to | |
9787 | include other iterators. | |
9788 | * doc/md.texi: Document the change. | |
9789 | * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include | |
9790 | the iterator that is being duplicated, rather than reproducing it. | |
9791 | (VSTRUCT_D): Redefine using VSTRUCT_[234]D. | |
9792 | (VSTRUCT_Q): Likewise VSTRUCT_[234]Q. | |
9793 | (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using | |
9794 | the individual D and Q iterators. | |
9795 | ||
9796 | 2023-11-10 Uros Bizjak <ubizjak@gmail.com> | |
9797 | ||
9798 | * config/i386/i386.md (stack_protect_set_1 peephole2): | |
9799 | Explicitly check operand 2 for word_mode. | |
9800 | (stack_protect_set_1 peephole2 #2): Ditto. | |
9801 | (stack_protect_set_2 peephole2): Ditto. | |
9802 | (stack_protect_set_3 peephole2): Ditto. | |
9803 | (*stack_protect_set_4z_<mode>_di): New insn patter. | |
9804 | (*stack_protect_set_4s_<mode>_di): Ditto. | |
9805 | (stack_protect_set_4 peephole2): New peephole2 pattern to | |
9806 | substitute stack protector scratch register clear with unrelated | |
9807 | register initialization involving zero/sign-extend instruction. | |
9808 | ||
9809 | 2023-11-10 Uros Bizjak <ubizjak@gmail.com> | |
9810 | ||
9811 | * config/i386/i386.md (shift): Use SAL insted of SLL | |
9812 | for ashift insn mnemonic. | |
9813 | ||
9814 | 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
9815 | ||
9816 | PR tree-optimization/112438 | |
9817 | * tree-vect-loop.cc (vectorizable_induction): Bugfix when | |
9818 | LOOP_VINFO_USING_SELECT_VL_P. | |
9819 | ||
9820 | 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
9821 | ||
9822 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
9823 | * config/riscv/riscv-v.cc | |
9824 | (rvv_builder::combine_sequence_use_slideup_profitable_p): New function. | |
9825 | (expand_vector_init_slideup_combine_sequence): Ditto. | |
9826 | (expand_vec_init): Add slideup combine optimization. | |
9827 | ||
9828 | 2023-11-10 Robin Dapp <rdapp@ventanamicro.com> | |
9829 | ||
9830 | PR tree-optimization/112464 | |
9831 | * tree-vect-loop.cc (vectorize_fold_left_reduction): Use | |
9832 | vect_orig_stmt on scalar_dest_def_info. | |
9833 | ||
9834 | 2023-11-10 Jin Ma <jinma@linux.alibaba.com> | |
9835 | ||
9836 | * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt | |
9837 | operation before the XTheadMemPair. | |
9838 | ||
9839 | 2023-11-10 Richard Biener <rguenther@suse.de> | |
9840 | ||
9841 | PR tree-optimization/110221 | |
9842 | * tree-vect-slp.cc (vect_schedule_slp_node): When loop | |
9843 | masking / len is applied make sure to not schedule | |
9844 | intenal defs outside of the loop. | |
9845 | ||
9846 | 2023-11-10 Andrew Stubbs <ams@codesourcery.com> | |
9847 | ||
9848 | * expr.cc (store_constructor): Add "and" operation to uniform mask | |
9849 | generation. | |
9850 | ||
9851 | 2023-11-10 Andrew Stubbs <ams@codesourcery.com> | |
9852 | ||
9853 | PR target/112308 | |
9854 | * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint | |
9855 | and switch to the new format. | |
9856 | (add<mode>3_dup<exec_clobber>): Likewise. | |
9857 | (add<mode>3_vcc<exec_vcc>): Likewise. | |
9858 | (add<mode>3_vcc_dup<exec_vcc>): Likewise. | |
9859 | (add<mode>3_vcc_zext_dup): Likewise. | |
9860 | (add<mode>3_vcc_zext_dup_exec): Likewise. | |
9861 | (add<mode>3_vcc_zext_dup2): Likewise. | |
9862 | (add<mode>3_vcc_zext_dup2_exec): Likewise. | |
9863 | ||
9864 | 2023-11-10 Richard Biener <rguenther@suse.de> | |
9865 | ||
9866 | PR middle-end/112469 | |
9867 | * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add | |
9868 | missing view_converts. | |
9869 | ||
9870 | 2023-11-10 Andrew Stubbs <ams@codesourcery.com> | |
9871 | ||
9872 | * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode | |
9873 | min/max instructions. | |
9874 | ||
9875 | 2023-11-10 Chenghui Pan <panchenghui@loongson.cn> | |
9876 | ||
9877 | * config/loongarch/lsx.md: Fix instruction name typo in | |
9878 | lsx_vreplgr2vr_<lsxfmt_f> template. | |
9879 | ||
9880 | 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
9881 | ||
9882 | * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns. | |
9883 | ||
9884 | 2023-11-10 Pan Li <pan2.li@intel.com> | |
9885 | ||
9886 | Revert: | |
9887 | 2023-11-10 Pan Li <pan2.li@intel.com> | |
9888 | * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): | |
9889 | New fun impl to expand the insn when trailing same elements. | |
9890 | (expand_vec_init): Try trailing same elements when vec_init. | |
9891 | ||
9892 | 2023-11-10 Pan Li <pan2.li@intel.com> | |
9893 | ||
9894 | * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): | |
9895 | New fun impl to expand the insn when trailing same elements. | |
9896 | (expand_vec_init): Try trailing same elements when vec_init. | |
9897 | ||
9898 | 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
9899 | ||
9900 | * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove. | |
9901 | * config/riscv/autovec.md (cond_copysign<mode>): New pattern. | |
9902 | ||
9903 | 2023-11-10 Pan Li <pan2.li@intel.com> | |
9904 | ||
9905 | PR target/112432 | |
9906 | * internal-fn.def (LRINT): Add FLOATN support. | |
9907 | (LROUND): Ditto. | |
9908 | (LLRINT): Ditto. | |
9909 | (LLROUND): Ditto. | |
9910 | ||
9911 | 2023-11-10 Jeff Law <jlaw@ventanamicro.com> | |
9912 | ||
9913 | * config/h8300/combiner.md (single bit sign_extract): Avoid recently | |
9914 | added patterns for H8/SX. | |
9915 | (single bit zero_extract): New patterns. | |
9916 | ||
9917 | 2023-11-10 liuhongt <hongtao.liu@intel.com> | |
9918 | ||
9919 | PR target/112443 | |
9920 | * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition | |
9921 | from LT to GT since there's not in the pattern. | |
9922 | (*avx2_pcmp<mode>3_5): Ditto. | |
9923 | ||
9924 | 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com> | |
9925 | ||
9926 | * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W' | |
9927 | to force emitting register names using the wN form. | |
9928 | * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to | |
9929 | always use wN written form in pseudo-C assembly syntax. | |
9930 | ||
9931 | 2023-11-09 David Malcolm <dmalcolm@redhat.com> | |
9932 | ||
9933 | * diagnostic-show-locus.cc (layout::m_line_table): New field. | |
9934 | (compatible_locations_p): Convert to... | |
9935 | (layout::compatible_locations_p): ...this, replacing uses of | |
9936 | line_table global with m_line_table. | |
9937 | (layout::layout): Convert "richloc" param from a pointer to a | |
9938 | const reference. Initialize m_line_table member. | |
9939 | (layout::maybe_add_location_range): Replace uses of line_table | |
9940 | global with m_line_table. Pass the latter to | |
9941 | linemap_client_expand_location_to_spelling_point. | |
9942 | (layout::print_leading_fixits): Pass m_line_table to | |
9943 | affects_line_p. | |
9944 | (layout::print_trailing_fixits): Likewise. | |
9945 | (gcc_rich_location::add_location_if_nearby): Update for change | |
9946 | to layout ctor params. | |
9947 | (diagnostic_show_locus): Convert to... | |
9948 | (diagnostic_context::maybe_show_locus): ...this, converting | |
9949 | richloc param from a pointer to a const reference. Make "loc" | |
9950 | const. Split out printing part of function to... | |
9951 | (diagnostic_context::show_locus): ...this. | |
9952 | (selftest::test_offset_impl): Update for change to layout ctor | |
9953 | params. | |
9954 | (selftest::test_layout_x_offset_display_utf8): Likewise. | |
9955 | (selftest::test_layout_x_offset_display_tab): Likewise. | |
9956 | (selftest::test_tab_expansion): Likewise. | |
9957 | * diagnostic.h (diagnostic_context::maybe_show_locus): New decl. | |
9958 | (diagnostic_context::show_locus): New decl. | |
9959 | (diagnostic_show_locus): Convert from a decl to an inline function. | |
9960 | * gdbinit.in (break-on-diagnostic): Update from a breakpoint | |
9961 | on diagnostic_show_locus to one on | |
9962 | diagnostic_context::maybe_show_locus. | |
9963 | * genmatch.cc (linemap_client_expand_location_to_spelling_point): | |
9964 | Add "set" param and use it in place of line_table global. | |
9965 | * input.cc (expand_location_1): Likewise. | |
9966 | (expand_location): Update for new param of expand_location_1. | |
9967 | (expand_location_to_spelling_point): Likewise. | |
9968 | (linemap_client_expand_location_to_spelling_point): Add "set" | |
9969 | param and use it in place of line_table global. | |
9970 | * tree-diagnostic-path.cc (event_range::print): Pass line_table | |
9971 | for new param of linemap_client_expand_location_to_spelling_point. | |
9972 | ||
9973 | 2023-11-09 Uros Bizjak <ubizjak@gmail.com> | |
9974 | ||
9975 | * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>): | |
9976 | Use W mode iterator instead of SWI48. Output MOV instead of XOR | |
9977 | for TARGET_USE_MOV0. | |
9978 | (stack_protect_set_1 peephole2): Use integer modes with | |
9979 | mode size <= word mode size for operand 3. | |
9980 | (stack_protect_set_1 peephole2 #2): New peephole2 pattern to | |
9981 | substitute stack protector scratch register clear with unrelated | |
9982 | register initialization, originally in front of stack | |
9983 | protector sequence. | |
9984 | (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern. | |
9985 | (stack_protect_set_1 peephole2): New peephole2 pattern to | |
9986 | substitute stack protector scratch register clear with unrelated | |
9987 | register initialization involving LEA instruction. | |
9988 | ||
9989 | 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com> | |
9990 | ||
9991 | PR rtl-optimization/110215 | |
9992 | * ira-lives.cc: (add_conflict_from_region_landing_pads): New | |
9993 | function. | |
9994 | (process_bb_node_lives): Use it. | |
9995 | ||
9996 | 2023-11-09 Alexandre Oliva <oliva@adacore.com> | |
9997 | ||
9998 | * config/i386/i386.cc (symbolic_base_address_p, | |
9999 | base_address_p): New, factored out from... | |
10000 | (extract_base_offset_in_addr): ... here and extended to | |
10001 | recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c | |
10002 | and sse2-store-multi.c with PIE enabled by default. | |
10003 | ||
10004 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10005 | ||
10006 | PR tree-optimization/109154 | |
10007 | * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New. | |
10008 | ||
10009 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10010 | ||
10011 | PR tree-optimization/109154 | |
10012 | * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle | |
10013 | copysign (x, -1). | |
10014 | * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise. | |
10015 | * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise. | |
10016 | ||
10017 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10018 | ||
10019 | PR tree-optimization/109154 | |
10020 | * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case. | |
10021 | * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise. | |
10022 | * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New. | |
10023 | ||
10024 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10025 | ||
10026 | PR tree-optimization/109154 | |
10027 | * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64, | |
10028 | *movdi_aarch64): Add new w -> Z case. | |
10029 | * config/aarch64/iterators.md (Vbtype): Add QI and HI. | |
10030 | ||
10031 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10032 | ||
10033 | PR tree-optimization/109154 | |
10034 | * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p, | |
10035 | aarch64_maybe_generate_simd_constant): New. | |
10036 | * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>, | |
10037 | *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants. | |
10038 | * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int): | |
10039 | Take optional mode. | |
10040 | (aarch64_simd_special_constant_p, | |
10041 | aarch64_maybe_generate_simd_constant): New. | |
10042 | * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for | |
10043 | special constants. | |
10044 | * config/aarch64/constraints.md (Dx): new. | |
10045 | ||
10046 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10047 | ||
10048 | PR tree-optimization/109154 | |
10049 | * internal-fn.def (COPYSIGN): New. | |
10050 | * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to | |
10051 | IFN_COND_COPYSIGN. | |
10052 | * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New. | |
10053 | ||
10054 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10055 | ||
10056 | PR tree-optimization/109154 | |
10057 | * match.pd: Add new neg+abs rule, remove inverse copysign rule. | |
10058 | ||
10059 | 2023-11-09 Tamar Christina <tamar.christina@arm.com> | |
10060 | ||
10061 | PR tree-optimization/109154 | |
10062 | * match.pd: expand existing copysign optimizations. | |
10063 | ||
10064 | 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com> | |
10065 | ||
10066 | PR driver/111605 | |
10067 | * collect2.cc (main): Do not prepend target triple to | |
10068 | -fuse-ld=lld,mold. | |
10069 | ||
10070 | 2023-11-09 Richard Biener <rguenther@suse.de> | |
10071 | ||
10072 | PR tree-optimization/111133 | |
10073 | * tree-vect-stmts.cc (vect_build_scatter_store_calls): | |
10074 | Remove and refactor to ... | |
10075 | (vect_build_one_scatter_store_call): ... this new function. | |
10076 | (vectorizable_store): Use vect_check_scalar_mask to record | |
10077 | the SLP node for the mask operand. Code generate scatters | |
10078 | with builtin decls from the main scatter vectorization | |
10079 | path and prepare that for SLP. | |
10080 | * tree-vect-slp.cc (vect_get_operand_map): Do not look | |
10081 | at the VDEF to decide between scatter or gather since that | |
10082 | doesn't work for patterns. Use the LHS being an SSA_NAME | |
10083 | or not instead. | |
10084 | ||
10085 | 2023-11-09 Pan Li <pan2.li@intel.com> | |
10086 | ||
10087 | * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only | |
10088 | perform once emit when at least one succ edge is abnormal. | |
10089 | ||
10090 | 2023-11-09 Richard Biener <rguenther@suse.de> | |
10091 | ||
10092 | * tree-vect-loop.cc (vect_verify_full_masking_avx512): | |
10093 | Check we have integer mode masks as required by | |
10094 | vect_get_loop_mask. | |
10095 | ||
10096 | 2023-11-09 Richard Biener <rguenther@suse.de> | |
10097 | ||
10098 | PR tree-optimization/112444 | |
10099 | * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited | |
10100 | defs as undefined vals. | |
10101 | ||
10102 | 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com> | |
10103 | ||
10104 | * config/mips/mips.cc(mips_option_override): Set mips_abs to | |
10105 | 2008, if mips_abs is default and mips_nan is 2008. | |
10106 | ||
10107 | 2023-11-09 Florian Weimer <fweimer@redhat.com> | |
10108 | ||
10109 | * doc/invoke.texi (Warning Options): Document | |
10110 | -Wreturn-mismatch. Update -Wreturn-type documentation. | |
10111 | ||
10112 | 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
10113 | ||
10114 | * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP. | |
10115 | * config/s390/vector.md (eltswapv16qi): New expander. | |
10116 | (*eltswapv16qi): New insn and splitter. | |
10117 | (eltswapv8hi): New insn and splitter. | |
10118 | (eltswap<mode>): New insn and splitter for modes V_HW_4 as well | |
10119 | as V_HW_2. | |
10120 | * config/s390/vx-builtins.md (eltswap<mode>): Remove. | |
10121 | (*eltswapv16qi): Remove. | |
10122 | (*eltswap<mode>): Remove. | |
10123 | (*eltswap<mode>_emu): Remove. | |
10124 | ||
10125 | 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
10126 | ||
10127 | * config/s390/s390.cc (expand_perm_with_rot): Remove. | |
10128 | (expand_perm_reverse_elements): New. | |
10129 | (expand_perm_with_vster): Remove. | |
10130 | (expand_perm_with_vstbrq): Remove. | |
10131 | (vectorize_vec_perm_const_1): Replace removed functions with new | |
10132 | one. | |
10133 | ||
10134 | 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
10135 | ||
10136 | * config/s390/s390.cc (expand_perm_with_merge): Deal with cases | |
10137 | where vmr{l,h} are still applicable if the operands are swapped. | |
10138 | (expand_perm_with_vpdi): Likewise for vpdi. | |
10139 | ||
10140 | 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
10141 | ||
10142 | * config/s390/s390.md (VX_CONV_INT): Remove iterator. | |
10143 | (gf): Add float mappings. | |
10144 | (TOINT, toint): New attribute. | |
10145 | (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13): | |
10146 | Remove. | |
10147 | (*fixuns_trunc<mode><toint>2_z13): Add. | |
10148 | (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13): | |
10149 | Remove. | |
10150 | (*fix_trunc<mode><toint>2_bfp_z13): Add. | |
10151 | (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove. | |
10152 | (*floatuns<toint><mode>2_z13): Add. | |
10153 | * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator. | |
10154 | (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove. | |
10155 | (float<tointvec><mode>2): Add. | |
10156 | (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove. | |
10157 | (floatuns<tointvec><mode>2): Add. | |
10158 | (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2): | |
10159 | Remove. | |
10160 | (fix_trunc<mode><tointvec>2): Add. | |
10161 | (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2): | |
10162 | Remove. | |
10163 | (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add. | |
10164 | ||
10165 | 2023-11-09 Jakub Jelinek <jakub@redhat.com> | |
10166 | ||
10167 | PR c/112339 | |
10168 | * attribs.cc (attribute_ignored_p): Only return true for | |
10169 | attr_namespace_ignored_p if as is NULL. | |
10170 | (decl_attributes): Never add ignored attributes. | |
10171 | ||
10172 | 2023-11-09 Jin Ma <jinma@linux.alibaba.com> | |
10173 | ||
10174 | * config/riscv/bitmanip.md: Avoid the conflict between | |
10175 | zbb and xtheadmemidx in patterns. | |
10176 | ||
10177 | 2023-11-09 Richard Biener <rguenther@suse.de> | |
10178 | ||
10179 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record | |
10180 | to the correct simd_clone_info. | |
10181 | ||
10182 | 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
10183 | ||
10184 | * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE. | |
10185 | ||
10186 | 2023-11-09 Alexandre Oliva <oliva@adacore.com> | |
10187 | ||
10188 | * tree-cfg.cc (assign_discriminators): Handle debug stmts. | |
10189 | ||
10190 | 2023-11-08 Uros Bizjak <ubizjak@gmail.com> | |
10191 | ||
10192 | PR target/82524 | |
10193 | * config/i386/i386.md (*add<mode>_1_slp): | |
10194 | Split insn only for unmatched operand 0. | |
10195 | (*sub<mode>_1_slp): Ditto. | |
10196 | (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp" | |
10197 | and "*<any_logic:code><mode>_1_slp" using any_logic code iterator. | |
10198 | Split insn only for unmatched operand 0. | |
10199 | (*neg<mode>1_slp): Split insn only for unmatched operand 0. | |
10200 | (*one_cmpl<mode>_1_slp): Ditto. | |
10201 | (*ashl<mode>3_1_slp): Ditto. | |
10202 | (*<any_shiftrt:insn><mode>_1_slp): Ditto. | |
10203 | (*<any_rotate:insn><mode>_1_slp): Ditto. | |
10204 | (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add | |
10205 | alternative 1 and split insn after reload for unmatched operand 0. | |
10206 | (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from | |
10207 | "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code | |
10208 | iterator. Redefine as define_insn_and_split. Add alternative 1 | |
10209 | and split insn after reload for unmatched operand 0. | |
10210 | (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add | |
10211 | alternative 1 and split insn after reload for unmatched operand 0. | |
10212 | (*<any_logic:code>qi_ext<mode>_0): Merge pattern from | |
10213 | "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using | |
10214 | any_logic code iterator. | |
10215 | (*<any_logic:code>qi_ext<mode>_1): Merge pattern from | |
10216 | "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using | |
10217 | any_logic code iterator. Redefine as define_insn_and_split. Add | |
10218 | alternative 1 and split insn after reload for unmatched operand 0. | |
10219 | (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from | |
10220 | "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic | |
10221 | code iterator. Redefine as define_insn_and_split. Add alternative 1 | |
10222 | and split insn after reload for unmatched operand 0. | |
10223 | (*<any_logic:code>qi_ext<mode>_2): Merge pattern from | |
10224 | "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using | |
10225 | any_logic code iterator. Redefine as define_insn_and_split. Add | |
10226 | alternative 1 and split insn after reload for unmatched operand 0. | |
10227 | (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split. | |
10228 | Add alternative 1 and split insn after reload for unmatched operand 0. | |
10229 | (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add | |
10230 | alternative 1 and split insn after reload for unmatched operand 0. | |
10231 | (*one_cmplqi_ext<mode>_1): Ditto. | |
10232 | (*ashlqi_ext<mode>_1): Ditto. | |
10233 | (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto. | |
10234 | ||
10235 | 2023-11-08 Richard Biener <rguenther@suse.de> | |
10236 | ||
10237 | * tree-vect-stmts.cc (vectorizable_load): Adjust offset | |
10238 | vector gathering for SLP of emulated gathers. | |
10239 | ||
10240 | 2023-11-08 Richard Biener <rguenther@suse.de> | |
10241 | ||
10242 | * tree-vectorizer.h (vect_slp_child_index_for_operand): | |
10243 | Add gatherscatter_p argument. | |
10244 | * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise. | |
10245 | Pass it on. | |
10246 | * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs | |
10247 | argument into an output, also output the SLP node associated | |
10248 | with it. | |
10249 | (vectorizable_simd_clone_call): Adjust. | |
10250 | (vectorizable_store): Likewise. | |
10251 | (vectorizable_load): Likewise. | |
10252 | ||
10253 | 2023-11-08 Richard Biener <rguenther@suse.de> | |
10254 | ||
10255 | * tree-vect-stmts.cc (vectorizable_load): Use the correct | |
10256 | vectorized mask operand. | |
10257 | ||
10258 | 2023-11-08 Lehua Ding <lehua.ding@rivai.ai> | |
10259 | ||
10260 | * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend): | |
10261 | New combine pattern. | |
10262 | ||
10263 | 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
10264 | ||
10265 | * config/riscv/riscv-vsetvl.cc: Fix ICE. | |
10266 | ||
10267 | 2023-11-08 xuli <xuli1@eswincomputing.com> | |
10268 | ||
10269 | * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning. | |
10270 | ||
10271 | 2023-11-08 Hongyu Wang <hongyu.wang@intel.com> | |
10272 | ||
10273 | PR target/112394 | |
10274 | * config/i386/constraints.md (jc): New constraint that prohibits | |
10275 | EGPR on -mno-avx. | |
10276 | * config/i386/i386.md (*movdi_internal): Change r constraint | |
10277 | corresponds to Yd. | |
10278 | (*movti_internal): Likewise. | |
10279 | ||
10280 | 2023-11-08 Florian Weimer <fweimer@redhat.com> | |
10281 | ||
10282 | * doc/invoke.texi (Warning Options): Mention C diagnostics | |
10283 | for -fpermissive. | |
10284 | ||
10285 | 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
10286 | ||
10287 | PR target/112092 | |
10288 | * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls. | |
10289 | ||
10290 | 2023-11-08 Haochen Jiang <haochen.jiang@intel.com> | |
10291 | ||
10292 | PR target/111907 | |
10293 | * config/i386/i386.md (avx_noavx512vl): New definition for isa | |
10294 | attribute. | |
10295 | * config/i386/sse.md (*andnot<mode>3): Change isa attribute from | |
10296 | avx_noavx512f to avx_noavx512vl. | |
10297 | ||
10298 | 2023-11-07 Pan Li <pan2.li@intel.com> | |
10299 | ||
10300 | * config/riscv/autovec.md: Remove the size check of lfloor. | |
10301 | * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage | |
10302 | emit_vec_rounding_to_integer for floor. | |
10303 | ||
10304 | 2023-11-07 Robin Dapp <rdapp@ventanamicro.com> | |
10305 | ||
10306 | PR tree-optimization/112361 | |
10307 | PR target/112359 | |
10308 | PR middle-end/112406 | |
10309 | * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if | |
10310 | loop was versioned and only then create COND_OPs. | |
10311 | (predicate_scalar_phi): Do not create COND_OP when not | |
10312 | vectorizing. | |
10313 | * tree-vect-loop.cc (vect_expand_fold_left): Re-create | |
10314 | VEC_COND_EXPR. | |
10315 | (vectorize_fold_left_reduction): Pass mask to | |
10316 | vect_expand_fold_left. | |
10317 | ||
10318 | 2023-11-07 Uros Bizjak <ubizjak@gmail.com> | |
10319 | ||
10320 | * config/i386/predicates.md ("flags_reg_operand"): | |
10321 | Make predicate special to avoid automatic mode checks. | |
10322 | ||
10323 | 2023-11-07 Martin Jambor <mjambor@suse.cz> | |
10324 | ||
10325 | * configure: Regenerate. | |
10326 | ||
10327 | 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com> | |
10328 | ||
10329 | * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect | |
10330 | functions. | |
10331 | (output_offload_tables): Write indirect functions. | |
10332 | (input_offload_tables): read indirect functions. | |
10333 | * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New. | |
10334 | * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New. | |
10335 | * omp-offload.cc (offload_ind_funcs): New. | |
10336 | (omp_discover_implicit_declare_target): Add functions marked with | |
10337 | 'omp declare target indirect' to indirect functions list. | |
10338 | (omp_finish_file): Add indirect functions to section for offload | |
10339 | indirect functions. | |
10340 | (execute_omp_device_lower): Redirect indirect calls on target by | |
10341 | passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR. | |
10342 | (pass_omp_device_lower::gate): Run pass_omp_device_lower if | |
10343 | indirect functions are present on an accelerator device. | |
10344 | * omp-offload.h (offload_ind_funcs): New. | |
10345 | * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT. | |
10346 | * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT. | |
10347 | (omp_clause_code_name): Likewise. | |
10348 | * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New. | |
10349 | * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs | |
10350 | section. Count number of indirect functions. | |
10351 | (process_obj): Emit number of indirect functions. | |
10352 | * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New. | |
10353 | (process): Emit offload_ind_func_table in PTX code. Emit indirect | |
10354 | function names and count in image. | |
10355 | * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark | |
10356 | indirect functions in PTX code with IND_FUNC_MAP. | |
10357 | ||
10358 | 2023-11-07 Tobias Burnus <tobias@codesourcery.com> | |
10359 | ||
10360 | * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for | |
10361 | attribute syntax supported also in C. | |
10362 | ||
10363 | 2023-11-07 Richard Sandiford <richard.sandiford@arm.com> | |
10364 | ||
10365 | * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z | |
10366 | modifier for SVE registers. | |
10367 | ||
10368 | 2023-11-07 Joseph Myers <joseph@codesourcery.com> | |
10369 | ||
10370 | * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and | |
10371 | use flag_isoc23 and function_c23_misc. | |
10372 | * config/rl78/rl78.cc (rl78_option_override): Compare | |
10373 | lang_hooks.name with "GNU C23" not "GNU C2X". | |
10374 | * coretypes.h (function_c2x_misc): Rename to function_c23_misc. | |
10375 | * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of | |
10376 | C2x. | |
10377 | * doc/extend.texi: Likewise. | |
10378 | * doc/invoke.texi: Likewise. | |
10379 | * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare | |
10380 | against and return "GNU C23" language string instead of "GNU C2X". | |
10381 | * ginclude/float.h: Refer to C23 instead of C2X in comments. | |
10382 | * ginclude/stdint-gcc.h: Likewise. | |
10383 | * glimits.h: Likewise. | |
10384 | * tree.h: Likewise. | |
10385 | ||
10386 | 2023-11-07 Alexandre Oliva <oliva@adacore.com> | |
10387 | ||
10388 | * doc/sourcebuild.texi (opt_mstrict_align): New target. | |
10389 | ||
10390 | 2023-11-07 Lehua Ding <lehua.ding@rivai.ai> | |
10391 | ||
10392 | * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>): | |
10393 | New combine pattern. | |
10394 | (*cond_len_<optab><v_quad_trunc><mode>): Ditto. | |
10395 | (*cond_len_<optab><v_oct_trunc><mode>): Ditto. | |
10396 | (*cond_len_extend<v_double_trunc><mode>): Ditto. | |
10397 | (*cond_len_widen_reduc_plus_scal_<mode>): Ditto. | |
10398 | ||
10399 | 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
10400 | ||
10401 | PR target/112399 | |
10402 | * config/riscv/riscv-avlprop.cc | |
10403 | (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation. | |
10404 | * config/riscv/t-riscv: Add new include. | |
10405 | ||
10406 | 2023-11-07 Pan Li <pan2.li@intel.com> | |
10407 | ||
10408 | * config/riscv/autovec.md: Remove the size check of lceil.l | |
10409 | * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage | |
10410 | emit_vec_rounding_to_integer for ceil. | |
10411 | ||
10412 | 2023-11-06 John David Anglin <danglin@gcc.gnu.org> | |
10413 | ||
10414 | * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo. | |
10415 | ||
10416 | 2023-11-06 John David Anglin <danglin@gcc.gnu.org> | |
10417 | ||
10418 | * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1. | |
10419 | ||
10420 | 2023-11-06 David Malcolm <dmalcolm@redhat.com> | |
10421 | ||
10422 | * diagnostic-show-locus.cc (class colorizer): Take just a | |
10423 | pretty_printer rather than a diagnostic_context. | |
10424 | (layout::layout): Make context param a const reference, | |
10425 | and pretty_printer param non-optional. | |
10426 | (layout::m_context): Drop field. | |
10427 | (layout::m_options): New field. | |
10428 | (layout::m_colorize_source_p): Drop field. | |
10429 | (layout::m_show_labels_p): Drop field. | |
10430 | (layout::m_show_line_numbers_p): Drop field. | |
10431 | (layout::print_gap_in_line_numbering): Use m_options. | |
10432 | (layout::calculate_line_spans): Likewise. | |
10433 | (layout::calculate_linenum_width): Likewise. | |
10434 | (layout::calculate_x_offset_display): Likewise. | |
10435 | (layout::print_source_line): Likewise. | |
10436 | (layout::start_annotation_line): Likewise. | |
10437 | (layout::print_annotation_line): Likewise. | |
10438 | (layout::print_line): Likewise. | |
10439 | (gcc_rich_location::add_location_if_nearby): Update for changes to | |
10440 | layout ctor. | |
10441 | (diagnostic_show_locus): Likewise. | |
10442 | (selftest::test_offset_impl): Likewise. | |
10443 | (selftest::test_layout_x_offset_display_utf8): Likewise. | |
10444 | (selftest::test_layout_x_offset_display_tab): Likewise. | |
10445 | (selftest::test_tab_expansion): Likewise. | |
10446 | * diagnostic.h (diagnostic_context::m_source_printing): Move | |
10447 | declaration of struct outside diagnostic_context as... | |
10448 | (struct diagnostic_source_printing_options)... this. | |
10449 | ||
10450 | 2023-11-06 David Malcolm <dmalcolm@redhat.com> | |
10451 | ||
10452 | * diagnostic.cc (diagnostic_context::push_diagnostics): Convert | |
10453 | to... | |
10454 | (diagnostic_option_classifier::push): ...this. | |
10455 | (diagnostic_context::pop_diagnostics): Convert to... | |
10456 | (diagnostic_option_classifier::pop): ...this. | |
10457 | (diagnostic_context::initialize): Move code to... | |
10458 | (diagnostic_option_classifier::init): ...this new function. | |
10459 | (diagnostic_context::finish): Move code to... | |
10460 | (diagnostic_option_classifier::fini): ...this new function. | |
10461 | (diagnostic_context::classify_diagnostic): Convert to... | |
10462 | (diagnostic_option_classifier::classify_diagnostic): ...this. | |
10463 | (diagnostic_context::update_effective_level_from_pragmas): Convert | |
10464 | to... | |
10465 | (diagnostic_option_classifier::update_effective_level_from_pragmas): | |
10466 | ...this. | |
10467 | (diagnostic_context::diagnostic_enabled): Update for refactoring. | |
10468 | * diagnostic.h (struct diagnostic_classification_change_t): Move into... | |
10469 | (class diagnostic_option_classifier): ...this new class. | |
10470 | (diagnostic_context::option_unspecified_p): Update for move of | |
10471 | fields into m_option_classifier. | |
10472 | (diagnostic_context::classify_diagnostic): Likewise. | |
10473 | (diagnostic_context::push_diagnostics): Likewise. | |
10474 | (diagnostic_context::pop_diagnostics): Likewise. | |
10475 | (diagnostic_context::update_effective_level_from_pragmas): Delete. | |
10476 | (diagnostic_context::m_classify_diagnostic): Move into class | |
10477 | diagnostic_option_classifier. | |
10478 | (diagnostic_context::m_option_classifier): Likewise. | |
10479 | (diagnostic_context::m_classification_history): Likewise. | |
10480 | (diagnostic_context::m_n_classification_history): Likewise. | |
10481 | (diagnostic_context::m_push_list): Likewise. | |
10482 | (diagnostic_context::m_n_push): Likewise. | |
10483 | (diagnostic_context::m_option_classifier): New. | |
10484 | ||
10485 | 2023-11-06 David Malcolm <dmalcolm@redhat.com> | |
10486 | ||
10487 | * diagnostic.cc (diagnostic_context::set_urlifier): New. | |
10488 | * diagnostic.h (diagnostic_context::set_urlifier): New decl. | |
10489 | (diagnostic_context::m_urlifier): Make private. | |
10490 | * gcc.cc (driver::global_initializations): Use set_urlifier rather | |
10491 | than directly setting field. | |
10492 | * toplev.cc (general_init): Likewise. | |
10493 | ||
10494 | 2023-11-06 David Malcolm <dmalcolm@redhat.com> | |
10495 | ||
10496 | * diagnostic.cc (diagnostic_context::check_max_errors): Replace | |
10497 | uses of diagnostic_kind_count with simple field acesss. | |
10498 | (diagnostic_context::report_diagnostic): Likewise. | |
10499 | (diagnostic_text_output_format::~diagnostic_text_output_format): | |
10500 | Replace use of diagnostic_kind_count with | |
10501 | diagnostic_context::diagnostic_count. | |
10502 | * diagnostic.h (diagnostic_kind_count): Delete. | |
10503 | (errorcount): Replace use of diagnostic_kind_count with | |
10504 | diagnostic_context::diagnostic_count. | |
10505 | (warningcount): Likewise. | |
10506 | (werrorcount): Likewise. | |
10507 | (sorrycount): Likewise. | |
10508 | ||
10509 | 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org> | |
10510 | ||
10511 | * doc/sourcebuild.texi (Other attributes): Document thread_fence | |
10512 | effective-target. | |
10513 | ||
10514 | 2023-11-06 Uros Bizjak <ubizjak@gmail.com> | |
10515 | ||
10516 | * config/i386/constraints.md (Bc): Remove constraint. | |
10517 | (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate. | |
10518 | * config/i386/i386.cc (ix86_memory_address_reg_class): | |
10519 | Do not limit processing to TARGET_APX_EGPR. Exit early for | |
10520 | NULL insn. Do not check recog_data.insn before calling | |
10521 | extract_insn_cached. | |
10522 | (ix86_insn_base_reg_class): Handle ADDR_GPR8. | |
10523 | (ix86_regno_ok_for_insn_base_p): Ditto. | |
10524 | (ix86_insn_index_reg_class): Ditto. | |
10525 | * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): | |
10526 | Remove insn pattern and corresponding peephole2 pattern. | |
10527 | (*cmpi_ext<mode>_1): Remove (m,Q) alternative. | |
10528 | Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute. | |
10529 | (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern | |
10530 | and corresponding peephole2 pattern. | |
10531 | (*cmpi_ext<mode>_3): Remove (Q,m) alternative. | |
10532 | Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute. | |
10533 | (*extzvqi_mem_rex64): Remove insn pattern and | |
10534 | corresponding peephole2 pattern. | |
10535 | (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc) | |
10536 | alternative to (Q,QnBn). Add "addr" attribute. | |
10537 | (*insvqi_1_mem_rex64): Remove insn pattern and | |
10538 | corresponding peephole2 pattern. | |
10539 | (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc) | |
10540 | alternative to (Q,QnBn). Add "addr" attribute. | |
10541 | (@insv<mode>_1): Ditto. | |
10542 | (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q) | |
10543 | alternative to (QBn,0,Q). Add "addr" attribute. | |
10544 | (*subqi_ext<mode>_0): Ditto. | |
10545 | (*andqi_ext<mode>_0): Ditto. | |
10546 | (*<any_or:code>qi_ext<mode>_0): Ditto. | |
10547 | (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc) | |
10548 | alternative to (Q,0,QnBn). Add "addr" attribute. | |
10549 | (*andqi_ext<mode>_1): Ditto. | |
10550 | (*andqi_ext<mode>_1_cc): Ditto. | |
10551 | (*<any_or:code>qi_ext<mode>_1): Ditto. | |
10552 | (*xorqi_ext<mode>_1_cc): Ditto. | |
10553 | * config/i386/predicates.md (nonimm_x64constmem_operand): | |
10554 | Remove predicate. | |
10555 | (general_x64constmem_operand): Ditto. | |
10556 | (norex_memory_operand): Ditto. | |
10557 | ||
10558 | 2023-11-06 Joseph Myers <joseph@codesourcery.com> | |
10559 | ||
10560 | PR c/107954 | |
10561 | * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and | |
10562 | -std=gnu23 instead of -std=c2x and -std=gnu2x. | |
10563 | * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23 | |
10564 | instead of C2x and -std=c2x. | |
10565 | * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23) | |
10566 | (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and | |
10567 | -std=gnu2x as deprecated aliases. Update descriptions of C23. | |
10568 | * doc/standards.texi (Standards): Describe C23 with C2X as an old | |
10569 | name. | |
10570 | ||
10571 | 2023-11-06 Thomas Schwinge <thomas@codesourcery.com> | |
10572 | ||
10573 | * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define. | |
10574 | ||
10575 | 2023-11-06 Richard Biener <rguenther@suse.de> | |
10576 | ||
10577 | PR tree-optimization/112405 | |
10578 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): | |
10579 | Properly handle invariant and/or loop mask passing. | |
10580 | ||
10581 | 2023-11-06 Pan Li <pan2.li@intel.com> | |
10582 | ||
10583 | * config/riscv/autovec.md: Remove the size check of lround. | |
10584 | * config/riscv/riscv-v.cc (expand_vec_lround): Leverage | |
10585 | emit_vec_rounding_to_integer for round. | |
10586 | ||
10587 | 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
10588 | ||
10589 | * config/riscv/predicates.md: Adapt predicate. | |
10590 | * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function. | |
10591 | * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto. | |
10592 | * config/riscv/vector.md (vec_duplicate<mode>): New pattern. | |
10593 | (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern. | |
10594 | ||
10595 | 2023-11-06 Richard Biener <rguenther@suse.de> | |
10596 | ||
10597 | PR tree-optimization/111950 | |
10598 | * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges): | |
10599 | Remove. | |
10600 | (find_guard_arg): Likewise. | |
10601 | (slpeel_update_phi_nodes_for_guard2): Likewise. | |
10602 | (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to | |
10603 | slpeel_duplicate_current_defs_from_edges, do not elide | |
10604 | LC-PHIs for invariant values. | |
10605 | (vect_do_peeling): Materialize PHI arguments for the edge | |
10606 | around the epilog from the PHI defs of the main loop exit. | |
10607 | ||
10608 | 2023-11-06 Richard Biener <rguenther@suse.de> | |
10609 | ||
10610 | PR tree-optimization/112404 | |
10611 | * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare | |
10612 | overload with SLP node argument. | |
10613 | * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it. | |
10614 | (vect_check_scalar_mask): Use it. | |
10615 | * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify | |
10616 | loads also for nodes with children, like .MASK_LOAD. | |
10617 | * tree-vect-loop.cc (vect_analyze_loop_2): Look at the | |
10618 | representative for load nodes and check whether it is a grouped | |
10619 | access before looking for load-lanes support. | |
10620 | ||
10621 | 2023-11-06 Robin Dapp <rdapp@ventanamicro.com> | |
10622 | ||
10623 | PR tree-optimization/111760 | |
10624 | * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add | |
10625 | expander. | |
10626 | * config/riscv/riscv-protos.h (enum insn_type): Add. | |
10627 | * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov. | |
10628 | * doc/md.texi: Add vcond_mask_len. | |
10629 | * gimple-match-exports.cc (maybe_resimplify_conditional_op): | |
10630 | Create VCOND_MASK_LEN when length masking. | |
10631 | * gimple-match.h (gimple_match_op::gimple_match_op): Always | |
10632 | initialize len and bias. | |
10633 | * internal-fn.cc (vec_cond_mask_len_direct): Add. | |
10634 | (direct_vec_cond_mask_len_optab_supported_p): Add. | |
10635 | (internal_fn_len_index): Add VCOND_MASK_LEN. | |
10636 | (internal_fn_mask_index): Ditto. | |
10637 | * internal-fn.def (VCOND_MASK_LEN): New internal function. | |
10638 | * match.pd: Combine unconditional unary, binary and ternary | |
10639 | operations into the respective COND_LEN operations. | |
10640 | * optabs.def (OPTAB_D): Add vcond_mask_len optab. | |
10641 | ||
10642 | 2023-11-06 Richard Sandiford <richard.sandiford@arm.com> | |
10643 | ||
10644 | * explow.cc (align_dynamic_address): Do nothing if the required | |
10645 | alignment is a byte. | |
10646 | ||
10647 | 2023-11-06 Richard Sandiford <richard.sandiford@arm.com> | |
10648 | ||
10649 | * function.h (get_stack_dynamic_offset): Declare. | |
10650 | * function.cc (get_stack_dynamic_offset): New function, | |
10651 | split out from... | |
10652 | (get_stack_dynamic_offset): ...here. | |
10653 | * explow.cc (allocate_dynamic_stack_space): Handle calls made | |
10654 | after virtual registers have been instantiated. | |
10655 | ||
10656 | 2023-11-06 liuhongt <hongtao.liu@intel.com> | |
10657 | ||
10658 | PR target/112393 | |
10659 | * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2): | |
10660 | Avoid generating RTL code when d->testing_p. | |
10661 | ||
10662 | 2023-11-06 Richard Biener <rguenther@suse.de> | |
10663 | ||
10664 | PR tree-optimization/112369 | |
10665 | * tree.cc (strip_float_extensions): Use element_precision. | |
10666 | ||
10667 | 2023-11-06 Richard Biener <rguenther@suse.de> | |
10668 | ||
10669 | PR middle-end/112296 | |
10670 | * doc/extend.texi (__builtin_constant_p): Clarify that | |
10671 | side-effects are discarded. | |
10672 | ||
10673 | 2023-11-06 Kewen Lin <linkw@linux.ibm.com> | |
10674 | ||
10675 | PR target/111828 | |
10676 | * config.in: Regenerate. | |
10677 | * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard | |
10678 | inline asm handling under !HAVE_AS_POWER10_HTM. | |
10679 | * configure: Regenerate. | |
10680 | * configure.ac: Detect assembler support for HTM insns at power10. | |
10681 | ||
10682 | 2023-11-06 xuli <xuli1@eswincomputing.com> | |
10683 | Pan Li <pan2.li@intel.com> | |
10684 | ||
10685 | * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook. | |
10686 | (riscv_register_pragmas): Register the hook. | |
10687 | * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl. | |
10688 | * config/riscv/riscv-vector-builtins-bases.cc: New function impl. | |
10689 | * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function. | |
10690 | * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher): | |
10691 | New hash table. | |
10692 | (function_builder::add_function): Add overloaded arg. | |
10693 | (function_builder::add_unique_function): Map overloaded function to non-overloaded function. | |
10694 | (function_builder::add_overloaded_function): New API impl. | |
10695 | (registered_function::overloaded_hash): Calculate hash value. | |
10696 | (has_vxrm_or_frm_p): New function impl. | |
10697 | (non_overloaded_registered_function_hasher::hash): Ditto. | |
10698 | (non_overloaded_registered_function_hasher::equal): Ditto. | |
10699 | (handle_pragma_vector): Allocate space for hash table. | |
10700 | (resolve_overloaded_builtin): New function impl. | |
10701 | * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto. | |
10702 | (function_base::may_require_vxrm_p): Ditto. | |
10703 | ||
10704 | 2023-11-06 Haochen Jiang <haochen.jiang@intel.com> | |
10705 | ||
10706 | PR target/111889 | |
10707 | * config/i386/avx512bf16intrin.h: Push no-evex512 target. | |
10708 | * config/i386/avx512bf16vlintrin.h: Ditto. | |
10709 | * config/i386/avx512bitalgvlintrin.h: Ditto. | |
10710 | * config/i386/avx512bwintrin.h: Ditto. | |
10711 | * config/i386/avx512dqintrin.h: Ditto. | |
10712 | * config/i386/avx512fintrin.h: Ditto. | |
10713 | * config/i386/avx512fp16intrin.h: Ditto. | |
10714 | * config/i386/avx512fp16vlintrin.h: Ditto. | |
10715 | * config/i386/avx512ifmavlintrin.h: Ditto. | |
10716 | * config/i386/avx512vbmi2vlintrin.h: Ditto. | |
10717 | * config/i386/avx512vbmivlintrin.h: Ditto. | |
10718 | * config/i386/avx512vlbwintrin.h: Ditto. | |
10719 | * config/i386/avx512vldqintrin.h: Ditto. | |
10720 | * config/i386/avx512vlintrin.h: Ditto. | |
10721 | * config/i386/avx512vnnivlintrin.h: Ditto. | |
10722 | * config/i386/avx512vp2intersectvlintrin.h: Ditto. | |
10723 | * config/i386/avx512vpopcntdqvlintrin.h: Ditto. | |
10724 | ||
10725 | 2023-11-06 Haochen Jiang <haochen.jiang@intel.com> | |
10726 | ||
10727 | * config/i386/avx512bf16vlintrin.h | |
10728 | (_mm_avx512_castsi128_ps): New. | |
10729 | (_mm256_avx512_castsi256_ps): Ditto. | |
10730 | (_mm_avx512_slli_epi32): Ditto. | |
10731 | (_mm256_avx512_slli_epi32): Ditto. | |
10732 | (_mm_avx512_cvtepi16_epi32): Ditto. | |
10733 | (_mm256_avx512_cvtepi16_epi32): Ditto. | |
10734 | (__attribute__): Change intrin call. | |
10735 | * config/i386/avx512bwintrin.h | |
10736 | (_mm_avx512_set_epi32): New. | |
10737 | (_mm_avx512_set_epi16): Ditto. | |
10738 | (_mm_avx512_set_epi8): Ditto. | |
10739 | (__attribute__): Change intrin call. | |
10740 | * config/i386/avx512fp16intrin.h: Ditto. | |
10741 | * config/i386/avx512fp16vlintrin.h | |
10742 | (_mm_avx512_set1_ps): New. | |
10743 | (_mm256_avx512_set1_ps): Ditto. | |
10744 | (_mm_avx512_and_si128): Ditto. | |
10745 | (_mm256_avx512_and_si256): Ditto. | |
10746 | (__attribute__): Change intrin call. | |
10747 | * config/i386/avx512vlbwintrin.h | |
10748 | (_mm_avx512_set1_epi32): New. | |
10749 | (_mm_avx512_set1_epi16): Ditto. | |
10750 | (_mm_avx512_set1_epi8): Ditto. | |
10751 | (_mm256_avx512_set_epi16): Ditto. | |
10752 | (_mm256_avx512_set_epi8): Ditto. | |
10753 | (_mm256_avx512_set1_epi16): Ditto. | |
10754 | (_mm256_avx512_set1_epi32): Ditto. | |
10755 | (_mm256_avx512_set1_epi8): Ditto. | |
10756 | (_mm_avx512_max_epi16): Ditto. | |
10757 | (_mm_avx512_min_epi16): Ditto. | |
10758 | (_mm_avx512_max_epu16): Ditto. | |
10759 | (_mm_avx512_min_epu16): Ditto. | |
10760 | (_mm_avx512_max_epi8): Ditto. | |
10761 | (_mm_avx512_min_epi8): Ditto. | |
10762 | (_mm_avx512_max_epu8): Ditto. | |
10763 | (_mm_avx512_min_epu8): Ditto. | |
10764 | (_mm256_avx512_max_epi16): Ditto. | |
10765 | (_mm256_avx512_min_epi16): Ditto. | |
10766 | (_mm256_avx512_max_epu16): Ditto. | |
10767 | (_mm256_avx512_min_epu16): Ditto. | |
10768 | (_mm256_avx512_insertf128_ps): Ditto. | |
10769 | (_mm256_avx512_extractf128_pd): Ditto. | |
10770 | (_mm256_avx512_extracti128_si256): Ditto. | |
10771 | (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto. | |
10772 | (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto. | |
10773 | (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto. | |
10774 | (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto. | |
10775 | (__attribute__): Change intrin call. | |
10776 | ||
10777 | 2023-11-06 Haochen Jiang <haochen.jiang@intel.com> | |
10778 | ||
10779 | * config/i386/avx512bf16vlintrin.h: Change intrin call. | |
10780 | * config/i386/avx512fintrin.h | |
10781 | (_mm_avx512_undefined_ps): New. | |
10782 | (_mm_avx512_undefined_pd): Ditto. | |
10783 | (__attribute__): Change intrin call. | |
10784 | * config/i386/avx512vbmivlintrin.h: Ditto. | |
10785 | * config/i386/avx512vlbwintrin.h: Ditto. | |
10786 | * config/i386/avx512vldqintrin.h: Ditto. | |
10787 | * config/i386/avx512vlintrin.h | |
10788 | (_mm_avx512_undefined_si128): New. | |
10789 | (_mm256_avx512_undefined_ps): Ditto. | |
10790 | (_mm256_avx512_undefined_pd): Ditto. | |
10791 | (_mm256_avx512_undefined_si256): Ditto. | |
10792 | (__attribute__): Change intrin call. | |
10793 | ||
10794 | 2023-11-06 Haochen Jiang <haochen.jiang@intel.com> | |
10795 | ||
10796 | * config/i386/avx512bitalgvlintrin.h: Change intrin call. | |
10797 | * config/i386/avx512dqintrin.h: Ditto. | |
10798 | * config/i386/avx512fintrin.h: | |
10799 | (_mm_avx512_setzero_ps): New. | |
10800 | (_mm_avx512_setzero_pd): Ditto. | |
10801 | (__attribute__): Change intrin call. | |
10802 | * config/i386/avx512fp16intrin.h: Ditto. | |
10803 | * config/i386/avx512fp16vlintrin.h: Ditto. | |
10804 | * config/i386/avx512vbmi2vlintrin.h: Ditto. | |
10805 | * config/i386/avx512vbmivlintrin.h: Ditto. | |
10806 | * config/i386/avx512vlbwintrin.h: Ditto. | |
10807 | * config/i386/avx512vldqintrin.h: Ditto. | |
10808 | * config/i386/avx512vlintrin.h | |
10809 | (_mm_avx512_setzero_si128): New. | |
10810 | (_mm256_avx512_setzero_pd): Ditto. | |
10811 | (_mm256_avx512_setzero_ps): Ditto. | |
10812 | (_mm256_avx512_setzero_si256): Ditto. | |
10813 | (__attribute__): Change intrin call. | |
10814 | * config/i386/avx512vpopcntdqvlintrin.h: Ditto. | |
10815 | * config/i386/gfniintrin.h: Ditto. | |
10816 | ||
10817 | 2023-11-05 Uros Bizjak <ubizjak@gmail.com> | |
10818 | ||
10819 | * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS. | |
10820 | Rename LEGACY_REGS to LEGACY_GENERAL_REGS. | |
10821 | (REG_CLASS_NAMES): Ditto. | |
10822 | (REG_CLASS_CONTENTS): Ditto. | |
10823 | * config/i386/constraints.md ("R"): Update for rename. | |
10824 | ||
10825 | 2023-11-05 Richard Sandiford <richard.sandiford@arm.com> | |
10826 | ||
10827 | * mode-switching.cc: Remove unused forward references. | |
10828 | (seginfo): Remove bbnum. | |
10829 | (new_seginfo): Remove associated argument. | |
10830 | (optimize_mode_switching): Update calls accordingly. | |
10831 | ||
10832 | 2023-11-05 Richard Sandiford <richard.sandiford@arm.com> | |
10833 | ||
10834 | * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for | |
10835 | invalid [...] operands. | |
10836 | ||
10837 | 2023-11-05 Richard Sandiford <richard.sandiford@arm.com> | |
10838 | ||
10839 | PR target/112105 | |
10840 | * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New | |
10841 | function, with the core logic extracted from... | |
10842 | (aarch64_can_change_mode_class): ...here. Extend the previous rules | |
10843 | to allow changes between partial SVE modes and other modes if | |
10844 | the other mode is no bigger than an element, and if no other rule | |
10845 | prevents it. Use the aarch64_modes_tieable_p handling of | |
10846 | partial Advanced SIMD structure modes. | |
10847 | (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p. | |
10848 | Allow all vector mode ties that it allows. | |
10849 | ||
10850 | 2023-11-05 Pan Li <pan2.li@intel.com> | |
10851 | ||
10852 | * config/riscv/autovec.md: Remove the size check of lrint. | |
10853 | * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help | |
10854 | emit func impl. | |
10855 | (emit_vec_widden_cvt_x_f): New help emit func impl. | |
10856 | (emit_vec_rounding_to_integer): New func impl to emit the | |
10857 | rounding from FP to integer. | |
10858 | (expand_vec_lrint): Leverage emit_vec_rounding_to_integer. | |
10859 | * config/riscv/vector.md: Take V_VLSF for vfncvt. | |
10860 | ||
10861 | 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
10862 | ||
10863 | * config/riscv/vector.md: Fix bug. | |
10864 | ||
10865 | 2023-11-04 Sergei Trofimovich <siarheit@google.com> | |
10866 | ||
10867 | PR bootstrap/112379 | |
10868 | * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as | |
10869 | ATTRIBUTE_UNUSED. | |
10870 | ||
10871 | 2023-11-04 Pan Li <pan2.li@intel.com> | |
10872 | ||
10873 | * config/riscv/vector-iterators.md: Remove HF modes. | |
10874 | ||
10875 | 2023-11-04 David Malcolm <dmalcolm@redhat.com> | |
10876 | ||
10877 | * diagnostic.cc: Include "pretty-print-urlifier.h". | |
10878 | (diagnostic_context::initialize): Initialize m_urlifier. | |
10879 | (diagnostic_context::finish): Clean up m_urlifier | |
10880 | (diagnostic_report::diagnostic): m_urlifier to pp_format. | |
10881 | * diagnostic.h (diagnostic_context::m_urlifier): New field. | |
10882 | * gcc-urlifier.cc: New file. | |
10883 | * gcc-urlifier.def: New file. | |
10884 | * gcc-urlifier.h: New file. | |
10885 | * gcc.cc: Include "gcc-urlifier.h". | |
10886 | (driver::global_initializations): Initialize global_dc->m_urlifier. | |
10887 | * pretty-print-urlifier.h: New file. | |
10888 | * pretty-print.cc: Include "pretty-print-urlifier.h". | |
10889 | (obstack_append_string): New. | |
10890 | (urlify_quoted_string): New. | |
10891 | (pp_format): Add "urlifier" param and use it to implement optional | |
10892 | urlification of quoted text strings. | |
10893 | (pp_output_formatted_text): Make buffer a const pointer. | |
10894 | (selftest::pp_printf_with_urlifier): New. | |
10895 | (selftest::test_urlification): New. | |
10896 | (selftest::pretty_print_cc_tests): Call it. | |
10897 | * pretty-print.h (class urlifier): New forward declaration. | |
10898 | (pp_format): Add optional urlifier param. | |
10899 | * selftest-run-tests.cc (selftest::run_tests): Call | |
10900 | selftest::gcc_urlifier_cc_tests . | |
10901 | * selftest.h (selftest::gcc_urlifier_cc_tests): New decl. | |
10902 | * toplev.cc: Include "gcc-urlifier.h". | |
10903 | (general_init): Initialize global_dc->m_urlifier. | |
10904 | ||
10905 | 2023-11-04 David Malcolm <dmalcolm@redhat.com> | |
10906 | ||
10907 | * Makefile.in (GCC_OBJS): Add gcc-urlifier.o. | |
10908 | (OBJS): Likewise. | |
10909 | ||
10910 | 2023-11-04 David Malcolm <dmalcolm@redhat.com> | |
10911 | ||
10912 | * common.opt (fdiagnostics-text-art-charset=): Remove refererence | |
10913 | to diagnostic-text-art.h. | |
10914 | * coretypes.h (struct diagnostic_context): Replace forward decl | |
10915 | with... | |
10916 | (class diagnostic_context): ...this. | |
10917 | * diagnostic-format-json.cc: Update for changes to | |
10918 | diagnostic_context. | |
10919 | * diagnostic-format-sarif.cc: Likewise. | |
10920 | * diagnostic-show-locus.cc: Likewise. | |
10921 | * diagnostic-text-art.h: Deleted file, moving content... | |
10922 | (enum diagnostic_text_art_charset): ...to diagnostic.h, | |
10923 | (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting, | |
10924 | (diagnostics_text_art_charset_init): ...deleting in favor of | |
10925 | diagnostic_context::set_text_art_charset. | |
10926 | * diagnostic.cc: Remove include of "diagnostic-text-art.h". | |
10927 | (pedantic_warning_kind): Update for field renaming. | |
10928 | (permissive_error_kind): Likewise. | |
10929 | (permissive_error_option): Likewise. | |
10930 | (diagnostic_initialize): Convert to... | |
10931 | (diagnostic_context::initialize): ...this, updating for field | |
10932 | renamings. | |
10933 | (diagnostic_color_init): Convert to... | |
10934 | (diagnostic_context::color_init): ...this. | |
10935 | (diagnostic_urls_init): Convert to... | |
10936 | (diagnostic_context::urls_init): ...this. | |
10937 | (diagnostic_initialize_input_context): Convert to... | |
10938 | (diagnostic_context::initialize_input_context): ...this. | |
10939 | (diagnostic_finish): Convert to... | |
10940 | (diagnostic_context::finish): ...this, updating for field | |
10941 | renamings. | |
10942 | (diagnostic_context::set_output_format): New. | |
10943 | (diagnostic_context::set_client_data_hooks): New. | |
10944 | (diagnostic_context::create_edit_context): New. | |
10945 | (diagnostic_converted_column): Convert to... | |
10946 | (diagnostic_context::converted_column): ...this. | |
10947 | (diagnostic_get_location_text): Update for field renaming. | |
10948 | (diagnostic_check_max_errors): Convert to... | |
10949 | (diagnostic_context::check_max_errors): ...this, updating for | |
10950 | field renamings. | |
10951 | (diagnostic_action_after_output): Convert to... | |
10952 | (diagnostic_context::action_after_output): ...this, updating for | |
10953 | field renamings. | |
10954 | (last_module_changed_p): Delete. | |
10955 | (set_last_module): Delete. | |
10956 | (includes_seen): Convert to... | |
10957 | (diagnostic_context::includes_seen_p): ...this, updating for field | |
10958 | renamings. | |
10959 | (diagnostic_report_current_module): Convert to... | |
10960 | (diagnostic_context::report_current_module): ...this, updating for | |
10961 | field renamings, and replacing uses of last_module_changed_p and | |
10962 | set_last_module to simple field accesses. | |
10963 | (diagnostic_show_any_path): Convert to... | |
10964 | (diagnostic_context::show_any_path): ...this. | |
10965 | (diagnostic_classify_diagnostic): Convert to... | |
10966 | (diagnostic_context::classify_diagnostic): ...this, updating for | |
10967 | field renamings. | |
10968 | (diagnostic_push_diagnostics): Convert to... | |
10969 | (diagnostic_context::push_diagnostics): ...this, updating for field | |
10970 | renamings. | |
10971 | (diagnostic_pop_diagnostics): Convert to... | |
10972 | (diagnostic_context::pop_diagnostics): ...this, updating for field | |
10973 | renamings. | |
10974 | (get_any_inlining_info): Convert to... | |
10975 | (diagnostic_context::get_any_inlining_info): ...this, updating for | |
10976 | field renamings. | |
10977 | (update_effective_level_from_pragmas): Convert to... | |
10978 | (diagnostic_context::update_effective_level_from_pragmas): | |
10979 | ...this, updating for field renamings. | |
10980 | (print_any_cwe): Convert to... | |
10981 | (diagnostic_context::print_any_cwe): ...this. | |
10982 | (print_any_rules): Convert to... | |
10983 | (diagnostic_context::print_any_rules): ...this. | |
10984 | (print_option_information): Convert to... | |
10985 | (diagnostic_context::print_option_information): ...this, updating | |
10986 | for field renamings. | |
10987 | (diagnostic_enabled): Convert to... | |
10988 | (diagnostic_context::diagnostic_enabled): ...this, updating for | |
10989 | field renamings. | |
10990 | (warning_enabled_at): Convert to... | |
10991 | (diagnostic_context::warning_enabled_at): ...this. | |
10992 | (diagnostic_report_diagnostic): Convert to... | |
10993 | (diagnostic_context::report_diagnostic): ...this, updating for | |
10994 | field renamings and conversions to member functions. | |
10995 | (diagnostic_append_note): Update for field renaming. | |
10996 | (diagnostic_impl): Use diagnostic_context::report_diagnostic | |
10997 | directly. | |
10998 | (diagnostic_n_impl): Likewise. | |
10999 | (diagnostic_emit_diagram): Convert to... | |
11000 | (diagnostic_context::emit_diagram): ...this, updating for field | |
11001 | renamings. | |
11002 | (error_recursion): Convert to... | |
11003 | (diagnostic_context::error_recursion): ...this. | |
11004 | (diagnostic_text_output_format::~diagnostic_text_output_format): | |
11005 | Use accessor. | |
11006 | (diagnostics_text_art_charset_init): Convert to... | |
11007 | (diagnostic_context::set_text_art_charset): ...this. | |
11008 | (assert_location_text): Update for field renamings. | |
11009 | * diagnostic.h (enum diagnostic_text_art_charset): Move here from | |
11010 | diagnostic-text-art.h. | |
11011 | (struct diagnostic_context): Convert to... | |
11012 | (class diagnostic_context): ...this. | |
11013 | (diagnostic_context::ice_handler_callback_t): New typedef. | |
11014 | (diagnostic_context::set_locations_callback_t): New typedef. | |
11015 | (diagnostic_context::initialize): New decl. | |
11016 | (diagnostic_context::color_init): New decl. | |
11017 | (diagnostic_context::urls_init): New decl. | |
11018 | (diagnostic_context::file_cache_init): New decl. | |
11019 | (diagnostic_context::finish): New decl. | |
11020 | (diagnostic_context::set_set_locations_callback): New. | |
11021 | (diagnostic_context::initialize_input_context): New decl. | |
11022 | (diagnostic_context::warning_enabled_at): New decl. | |
11023 | (diagnostic_context::option_unspecified_p): New. | |
11024 | (diagnostic_context::report_diagnostic): New decl. | |
11025 | (diagnostic_context::report_current_module): New decl. | |
11026 | (diagnostic_context::check_max_errors): New decl. | |
11027 | (diagnostic_context::action_after_output): New decl. | |
11028 | (diagnostic_context::classify_diagnostic): New decl. | |
11029 | (diagnostic_context::push_diagnostics): New decl. | |
11030 | (diagnostic_context::pop_diagnostics): New decl. | |
11031 | (diagnostic_context::emit_diagram): New decl. | |
11032 | (diagnostic_context::set_output_format): New decl. | |
11033 | (diagnostic_context::set_text_art_charset): New decl. | |
11034 | (diagnostic_context::set_client_data_hooks): New decl. | |
11035 | (diagnostic_context::create_edit_context): New decl. | |
11036 | (diagnostic_context::set_warning_as_error_requested): New. | |
11037 | (diagnostic_context::set_report_bug): New. | |
11038 | (diagnostic_context::set_extra_output_kind): New. | |
11039 | (diagnostic_context::set_show_cwe): New. | |
11040 | (diagnostic_context::set_show_rules): New. | |
11041 | (diagnostic_context::set_path_format): New. | |
11042 | (diagnostic_context::set_show_path_depths): New. | |
11043 | (diagnostic_context::set_show_option_requested): New. | |
11044 | (diagnostic_context::set_max_errors): New. | |
11045 | (diagnostic_context::set_escape_format): New. | |
11046 | (diagnostic_context::set_ice_handler_callback): New. | |
11047 | (diagnostic_context::warning_as_error_requested_p): New. | |
11048 | (diagnostic_context::show_path_depths_p): New. | |
11049 | (diagnostic_context::get_path_format): New. | |
11050 | (diagnostic_context::get_escape_format): New. | |
11051 | (diagnostic_context::get_file_cache): New. | |
11052 | (diagnostic_context::get_edit_context): New. | |
11053 | (diagnostic_context::get_client_data_hooks): New. | |
11054 | (diagnostic_context::get_diagram_theme): New. | |
11055 | (diagnostic_context::converted_column): New decl. | |
11056 | (diagnostic_context::diagnostic_count): New. | |
11057 | (diagnostic_context::includes_seen_p): New decl. | |
11058 | (diagnostic_context::print_any_cwe): New decl. | |
11059 | (diagnostic_context::print_any_rules): New decl. | |
11060 | (diagnostic_context::print_option_information): New decl. | |
11061 | (diagnostic_context::show_any_path): New decl. | |
11062 | (diagnostic_context::error_recursion): New decl. | |
11063 | (diagnostic_context::diagnostic_enabled): New decl. | |
11064 | (diagnostic_context::get_any_inlining_info): New decl. | |
11065 | (diagnostic_context::update_effective_level_from_pragmas): New | |
11066 | decl. | |
11067 | (diagnostic_context::m_file_cache): Make private. | |
11068 | (diagnostic_context::diagnostic_count): Rename to... | |
11069 | (diagnostic_context::m_diagnostic_count): ...this and make | |
11070 | private. | |
11071 | (diagnostic_context::warning_as_error_requested): Rename to... | |
11072 | (diagnostic_context::m_warning_as_error_requested): ...this and | |
11073 | make private. | |
11074 | (diagnostic_context::n_opts): Rename to... | |
11075 | (diagnostic_context::m_n_opts): ...this and make private. | |
11076 | (diagnostic_context::classify_diagnostic): Rename to... | |
11077 | (diagnostic_context::m_classify_diagnostic): ...this and make | |
11078 | private. | |
11079 | (diagnostic_context::classification_history): Rename to... | |
11080 | (diagnostic_context::m_classification_history): ...this and make | |
11081 | private. | |
11082 | (diagnostic_context::n_classification_history): Rename to... | |
11083 | (diagnostic_context::m_n_classification_history): ...this and make | |
11084 | private. | |
11085 | (diagnostic_context::push_list): Rename to... | |
11086 | (diagnostic_context::m_push_list): ...this and make private. | |
11087 | (diagnostic_context::n_push): Rename to... | |
11088 | (diagnostic_context::m_n_push): ...this and make private. | |
11089 | (diagnostic_context::show_cwe): Rename to... | |
11090 | (diagnostic_context::m_show_cwe): ...this and make private. | |
11091 | (diagnostic_context::show_rules): Rename to... | |
11092 | (diagnostic_context::m_show_rules): ...this and make private. | |
11093 | (diagnostic_context::path_format): Rename to... | |
11094 | (diagnostic_context::m_path_format): ...this and make private. | |
11095 | (diagnostic_context::show_path_depths): Rename to... | |
11096 | (diagnostic_context::m_show_path_depths): ...this and make | |
11097 | private. | |
11098 | (diagnostic_context::show_option_requested): Rename to... | |
11099 | (diagnostic_context::m_show_option_requested): ...this and make | |
11100 | private. | |
11101 | (diagnostic_context::abort_on_error): Rename to... | |
11102 | (diagnostic_context::m_abort_on_error): ...this. | |
11103 | (diagnostic_context::show_column): Rename to... | |
11104 | (diagnostic_context::m_show_column): ...this. | |
11105 | (diagnostic_context::pedantic_errors): Rename to... | |
11106 | (diagnostic_context::m_pedantic_errors): ...this. | |
11107 | (diagnostic_context::permissive): Rename to... | |
11108 | (diagnostic_context::m_permissive): ...this. | |
11109 | (diagnostic_context::opt_permissive): Rename to... | |
11110 | (diagnostic_context::m_opt_permissive): ...this. | |
11111 | (diagnostic_context::fatal_errors): Rename to... | |
11112 | (diagnostic_context::m_fatal_errors): ...this. | |
11113 | (diagnostic_context::dc_inhibit_warnings): Rename to... | |
11114 | (diagnostic_context::m_inhibit_warnings): ...this. | |
11115 | (diagnostic_context::dc_warn_system_headers): Rename to... | |
11116 | (diagnostic_context::m_warn_system_headers): ...this. | |
11117 | (diagnostic_context::max_errors): Rename to... | |
11118 | (diagnostic_context::m_max_errors): ...this and make private. | |
11119 | (diagnostic_context::internal_error): Rename to... | |
11120 | (diagnostic_context::m_internal_error): ...this. | |
11121 | (diagnostic_context::option_enabled): Rename to... | |
11122 | (diagnostic_context::m_option_enabled): ...this. | |
11123 | (diagnostic_context::option_state): Rename to... | |
11124 | (diagnostic_context::m_option_state): ...this. | |
11125 | (diagnostic_context::option_name): Rename to... | |
11126 | (diagnostic_context::m_option_name): ...this. | |
11127 | (diagnostic_context::get_option_url): Rename to... | |
11128 | (diagnostic_context::m_get_option_url): ...this. | |
11129 | (diagnostic_context::print_path): Rename to... | |
11130 | (diagnostic_context::m_print_path): ...this. | |
11131 | (diagnostic_context::make_json_for_path): Rename to... | |
11132 | (diagnostic_context::m_make_json_for_path): ...this. | |
11133 | (diagnostic_context::x_data): Rename to... | |
11134 | (diagnostic_context::m_client_aux_data): ...this. | |
11135 | (diagnostic_context::last_location): Rename to... | |
11136 | (diagnostic_context::m_last_location): ...this. | |
11137 | (diagnostic_context::last_module): Rename to... | |
11138 | (diagnostic_context::m_last_module): ...this and make private. | |
11139 | (diagnostic_context::lock): Rename to... | |
11140 | (diagnostic_context::m_lock): ...this and make private. | |
11141 | (diagnostic_context::lang_mask): Rename to... | |
11142 | (diagnostic_context::m_lang_mask): ...this. | |
11143 | (diagnostic_context::inhibit_notes_p): Rename to... | |
11144 | (diagnostic_context::m_inhibit_notes_p): ...this. | |
11145 | (diagnostic_context::report_bug): Rename to... | |
11146 | (diagnostic_context::m_report_bug): ...this and make private. | |
11147 | (diagnostic_context::extra_output_kind): Rename to... | |
11148 | (diagnostic_context::m_extra_output_kind): ...this and make | |
11149 | private. | |
11150 | (diagnostic_context::column_unit): Rename to... | |
11151 | (diagnostic_context::m_column_unit): ...this and make private. | |
11152 | (diagnostic_context::column_origin): Rename to... | |
11153 | (diagnostic_context::m_column_origin): ...this and make private. | |
11154 | (diagnostic_context::tabstop): Rename to... | |
11155 | (diagnostic_context::m_tabstop): ...this and make private. | |
11156 | (diagnostic_context::escape_format): Rename to... | |
11157 | (diagnostic_context::m_escape_format): ...this and make private. | |
11158 | (diagnostic_context::edit_context_ptr): Rename to... | |
11159 | (diagnostic_context::m_edit_context_ptr): ...this and make | |
11160 | private. | |
11161 | (diagnostic_context::set_locations_cb): Rename to... | |
11162 | (diagnostic_context::m_set_locations_cb): ...this and make | |
11163 | private. | |
11164 | (diagnostic_context::ice_handler_cb): Rename to... | |
11165 | (diagnostic_context::m_ice_handler_cb): ...this and make private. | |
11166 | (diagnostic_context::includes_seen): Rename to... | |
11167 | (diagnostic_context::m_includes_seen): ...this and make private. | |
11168 | (diagnostic_inhibit_notes): Update for field renaming. | |
11169 | (diagnostic_context_auxiliary_data): Likewise. | |
11170 | (diagnostic_abort_on_error): Convert from macro to inline function | |
11171 | and update for field renaming. | |
11172 | (diagnostic_kind_count): Convert from macro to inline function and | |
11173 | use diagnostic_count accessor. | |
11174 | (diagnostic_report_warnings_p): Update for field renaming. | |
11175 | (diagnostic_initialize): Convert decl to inline function calling | |
11176 | into diagnostic_context. | |
11177 | (diagnostic_color_init): Likewise. | |
11178 | (diagnostic_urls_init): Likewise. | |
11179 | (diagnostic_urls_init): Likewise. | |
11180 | (diagnostic_finish): Likewise. | |
11181 | (diagnostic_report_current_module): Likewise. | |
11182 | (diagnostic_show_any_path): Delete decl. | |
11183 | (diagnostic_initialize_input_context): Convert decl to inline | |
11184 | function calling into diagnostic_context. | |
11185 | (diagnostic_classify_diagnostic): Likewise. | |
11186 | (diagnostic_push_diagnostics): Likewise. | |
11187 | (diagnostic_pop_diagnostics): Likewise. | |
11188 | (diagnostic_report_diagnostic): Likewise. | |
11189 | (diagnostic_action_after_output): Likewise. | |
11190 | (diagnostic_check_max_errors): Likewise. | |
11191 | (diagnostic_file_cache_fini): Delete decl. | |
11192 | (diagnostic_converted_column): Delete decl. | |
11193 | (warning_enabled_at): Convert decl to inline function calling into | |
11194 | diagnostic_context. | |
11195 | (option_unspecified_p): New. | |
11196 | (diagnostic_emit_diagram): Delete decl. | |
11197 | * gcc.cc: Remove include of "diagnostic-text-art.h". | |
11198 | Update for changes to diagnostic_context. | |
11199 | * input.cc (diagnostic_file_cache_init): Move implementation | |
11200 | to... | |
11201 | (diagnostic_context::file_cache_init): ...this new member | |
11202 | function. | |
11203 | (diagnostic_file_cache_fini): Delete. | |
11204 | (diagnostics_file_cache_forcibly_evict_file): Update for | |
11205 | m_file_cache becoming private. | |
11206 | (location_get_source_line): Likewise. | |
11207 | (get_source_file_content): Likewise. | |
11208 | (location_missing_trailing_newline): Likewise. | |
11209 | * input.h (diagnostics_file_cache_fini): Delete. | |
11210 | * langhooks.cc: Update for changes to diagnostic_context. | |
11211 | * lto-wrapper.cc: Likewise. | |
11212 | * opts.cc: Remove include of "diagnostic-text-art.h". | |
11213 | Update for changes to diagnostic_context. | |
11214 | * selftest-diagnostic.cc: Update for changes to | |
11215 | diagnostic_context. | |
11216 | * toplev.cc: Likewise. | |
11217 | * tree-diagnostic-path.cc: Likewise. | |
11218 | * tree-diagnostic.cc: Likewise. | |
11219 | ||
11220 | 2023-11-03 Martin Uecker <uecker@tugraz.at> | |
11221 | ||
11222 | PR c/98541 | |
11223 | * gimple-ssa-warn-access.cc | |
11224 | (pass_waccess::maybe_check_access_sizes): For VLA bounds | |
11225 | in parameters, only warn about null pointers with 'static'. | |
11226 | ||
11227 | 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
11228 | ||
11229 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked | |
11230 | calls to use masked simdclones. | |
11231 | ||
11232 | 2023-11-03 David Malcolm <dmalcolm@redhat.com> | |
11233 | ||
11234 | * diagnostic.cc (diagnostic_initialize): Update for consolidation | |
11235 | of group-based fields. | |
11236 | (diagnostic_report_diagnostic): Likewise. | |
11237 | (diagnostic_context::begin_group): New, based on body of | |
11238 | auto_diagnostic_group's ctor. | |
11239 | (diagnostic_context::end_group): New, based on body of | |
11240 | auto_diagnostic_group's dtor. | |
11241 | (auto_diagnostic_group::auto_diagnostic_group): Convert to a call | |
11242 | to begin_group. | |
11243 | (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call | |
11244 | to end_group. | |
11245 | * diagnostic.h (diagnostic_context::begin_group): New decl. | |
11246 | (diagnostic_context::end_group): New decl. | |
11247 | (diagnostic_context::diagnostic_group_nesting_depth): Rename to... | |
11248 | (diagnostic_context::m_diagnostic_groups.m_nesting_depth): | |
11249 | ...this. | |
11250 | (diagnostic_context::diagnostic_group_emission_count): Rename | |
11251 | to... | |
11252 | (diagnostic_context::m_diagnostic_groups::m_emission_count): | |
11253 | ...this. | |
11254 | ||
11255 | 2023-11-03 Andrew MacLeod <amacleod@redhat.com> | |
11256 | ||
11257 | PR tree-optimization/111766 | |
11258 | * range-op.cc (operator_equal::fold_range): Check constants | |
11259 | against the bitmask. | |
11260 | (operator_not_equal::fold_range): Ditto. | |
11261 | * value-range.h (irange_bitmask::member_p): New. | |
11262 | ||
11263 | 2023-11-03 Andrew MacLeod <amacleod@redhat.com> | |
11264 | ||
11265 | * value-range.cc (irange_bitmask::adjust_range): New. | |
11266 | (irange::intersect_bitmask): Call adjust_range. | |
11267 | * value-range.h (irange_bitmask::adjust_range): New prototype. | |
11268 | ||
11269 | 2023-11-03 Uros Bizjak <ubizjak@gmail.com> | |
11270 | ||
11271 | * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p): | |
11272 | Rename to ... | |
11273 | (ix86_memory_address_reg_class): ... this. Generalize address | |
11274 | register class handling to allow multiple address register classes. | |
11275 | Return maximal class for unrecognized instructions. Improve comments. | |
11276 | (ix86_insn_base_reg_class): Rewrite to handle | |
11277 | multiple address register classes. | |
11278 | (ix86_regno_ok_for_insn_base_p): Ditto. | |
11279 | (ix86_insn_index_reg_class): Ditto. | |
11280 | * config/i386/i386.md: Rename "gpr32" attribute to "addr" | |
11281 | and substitute its values with "0" -> "gpr16", "1" -> "*". | |
11282 | (addr): New attribute to limit allowed address register set. | |
11283 | (gpr32): Remove. | |
11284 | * config/i386/mmx.md: Rename "gpr32" attribute to "addr" | |
11285 | and substitute its values with "0" -> "gpr16", "1" -> "*". | |
11286 | * config/i386/sse.md: Ditto. | |
11287 | ||
11288 | 2023-11-03 Richard Biener <rguenther@suse.de> | |
11289 | ||
11290 | * tree-vect-loop.cc (vectorizable_live_operation): Simplify | |
11291 | LC PHI replacement. | |
11292 | ||
11293 | 2023-11-03 Roger Sayle <roger@nextmovesoftware.com> | |
11294 | ||
11295 | * config/arc/arc.md (addsi3): Fix GNU-style code formatting. | |
11296 | (adddi3): Change define_expand to generate a *adddi3. | |
11297 | (*adddi3): New define_insn_and_split to lower DImode additions | |
11298 | during the split1 pass (after combine and before reload). | |
11299 | (ashldi3): New define_expand to (only) generate *ashldi3_cnt1 | |
11300 | for DImode left shifts by a single bit. | |
11301 | (*ashldi3_cnt1): New define_insn_and_split to lower DImode | |
11302 | left shifts by one bit to an *adddi3. | |
11303 | ||
11304 | 2023-11-03 Richard Sandiford <richard.sandiford@arm.com> | |
11305 | ||
11306 | * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove | |
11307 | can_create_pseudo_p condition. | |
11308 | ||
11309 | 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11310 | ||
11311 | * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1. | |
11312 | * tree-vect-stmts.cc (vectorizable_load): Ditto. | |
11313 | ||
11314 | 2023-11-03 Richard Biener <rguenther@suse.de> | |
11315 | ||
11316 | PR tree-optimization/112366 | |
11317 | * tree-vect-loop.cc (vectorizable_live_operation): Remove | |
11318 | assert. | |
11319 | ||
11320 | 2023-11-03 Richard Biener <rguenther@suse.de> | |
11321 | ||
11322 | PR tree-optimization/112310 | |
11323 | * tree-ssa-pre.cc (do_hoist_insertion): Keep the union | |
11324 | of expressions, validate dependences are contained within | |
11325 | the hoistable set before hoisting. | |
11326 | ||
11327 | 2023-11-03 Pan Li <pan2.li@intel.com> | |
11328 | ||
11329 | * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove. | |
11330 | (lround<mode><v_i_l_ll_convert>2): Ditto. | |
11331 | (lceil<mode><v_i_l_ll_convert>2): Ditto. | |
11332 | (lfloor<mode><v_i_l_ll_convert>2): Ditto. | |
11333 | (lrint<mode><v_f2si_convert>2): New pattern for cvt from | |
11334 | FP to SI. | |
11335 | (lround<mode><v_f2si_convert>2): Ditto. | |
11336 | (lceil<mode><v_f2si_convert>2): Ditto. | |
11337 | (lfloor<mode><v_f2si_convert>2): Ditto. | |
11338 | (lrint<mode><v_f2di_convert>2): New pattern for cvt from | |
11339 | FP to DI. | |
11340 | (lround<mode><v_f2di_convert>2): Ditto. | |
11341 | (lceil<mode><v_f2di_convert>2): Ditto. | |
11342 | (lfloor<mode><v_f2di_convert>2): Ditto. | |
11343 | * config/riscv/vector-iterators.md: Renew iterators for both | |
11344 | the SI and DI. | |
11345 | ||
11346 | 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11347 | ||
11348 | PR target/112326 | |
11349 | * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function. | |
11350 | (simplify_replace_vlmax_avl): Ditto. | |
11351 | (pass_avlprop::execute): Add immediate AVL simplification. | |
11352 | * config/riscv/riscv-protos.h (imm_avl_p): Rename. | |
11353 | * config/riscv/riscv-v.cc (const_vlmax_p): Ditto. | |
11354 | (imm_avl_p): Ditto. | |
11355 | (emit_vlmax_insn): Adapt for new interface name. | |
11356 | * config/riscv/vector.md (mode_idx): New attribute. | |
11357 | ||
11358 | 2023-11-03 Pan Li <pan2.li@intel.com> | |
11359 | ||
11360 | Revert: | |
11361 | 2023-11-02 Pan Li <pan2.li@intel.com> | |
11362 | ||
11363 | * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove. | |
11364 | (lround<mode><v_i_l_ll_convert>2): Ditto. | |
11365 | (lceil<mode><v_i_l_ll_convert>2): Ditto. | |
11366 | (lfloor<mode><v_i_l_ll_convert>2): Ditto. | |
11367 | (lrint<mode><v_f2si_convert>2): New pattern for cvt from | |
11368 | FP to SI. | |
11369 | (lround<mode><v_f2si_convert>2): Ditto. | |
11370 | (lceil<mode><v_f2si_convert>2): Ditto. | |
11371 | (lfloor<mode><v_f2si_convert>2): Ditto. | |
11372 | (lrint<mode><v_f2di_convert>2): New pattern for cvt from | |
11373 | FP to DI. | |
11374 | (lround<mode><v_f2di_convert>2): Ditto. | |
11375 | (lceil<mode><v_f2di_convert>2): Ditto. | |
11376 | (lfloor<mode><v_f2di_convert>2): Ditto. | |
11377 | * config/riscv/vector-iterators.md: Renew iterators for both | |
11378 | the SI and DI. | |
11379 | ||
11380 | 2023-11-02 Edwin Lu <ewlu@rivosinc.com> | |
11381 | ||
11382 | * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert | |
11383 | ||
11384 | 2023-11-02 Jeff Law <jlaw@ventanamicro.com> | |
11385 | ||
11386 | * config/h8300/combiner.md: Add new patterns for single bit | |
11387 | sign extractions. | |
11388 | ||
11389 | 2023-11-02 Pan Li <pan2.li@intel.com> | |
11390 | ||
11391 | * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove. | |
11392 | (lround<mode><v_i_l_ll_convert>2): Ditto. | |
11393 | (lceil<mode><v_i_l_ll_convert>2): Ditto. | |
11394 | (lfloor<mode><v_i_l_ll_convert>2): Ditto. | |
11395 | (lrint<mode><v_f2si_convert>2): New pattern for cvt from | |
11396 | FP to SI. | |
11397 | (lround<mode><v_f2si_convert>2): Ditto. | |
11398 | (lceil<mode><v_f2si_convert>2): Ditto. | |
11399 | (lfloor<mode><v_f2si_convert>2): Ditto. | |
11400 | (lrint<mode><v_f2di_convert>2): New pattern for cvt from | |
11401 | FP to DI. | |
11402 | (lround<mode><v_f2di_convert>2): Ditto. | |
11403 | (lceil<mode><v_f2di_convert>2): Ditto. | |
11404 | (lfloor<mode><v_f2di_convert>2): Ditto. | |
11405 | * config/riscv/vector-iterators.md: Renew iterators for both | |
11406 | the SI and DI. | |
11407 | ||
11408 | 2023-11-02 Sam James <sam@gentoo.org> | |
11409 | ||
11410 | * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime' | |
11411 | as this has become the standard term for what we're doing here. | |
11412 | ||
11413 | 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11414 | ||
11415 | * config/riscv/riscv-avlprop.cc | |
11416 | (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow | |
11417 | non-real insn AVL propation. | |
11418 | ||
11419 | 2023-11-02 Robin Dapp <rdapp@ventanamicro.com> | |
11420 | ||
11421 | PR middle-end/111401 | |
11422 | * internal-fn.cc (internal_fn_else_index): New function. | |
11423 | * internal-fn.h (internal_fn_else_index): Define. | |
11424 | * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP | |
11425 | if supported. | |
11426 | (predicate_scalar_phi): Add whitespace. | |
11427 | * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP. | |
11428 | (neutral_op_for_reduction): Return -0 for PLUS. | |
11429 | (check_reduction_path): Don't count else operand in COND_OP. | |
11430 | (vect_is_simple_reduction): Ditto. | |
11431 | (vect_create_epilog_for_reduction): Fix whitespace. | |
11432 | (vectorize_fold_left_reduction): Add COND_OP handling. | |
11433 | (vectorizable_reduction): Don't count else operand in COND_OP. | |
11434 | (vect_transform_reduction): Add COND_OP handling. | |
11435 | * tree-vectorizer.h (neutral_op_for_reduction): Add default | |
11436 | parameter. | |
11437 | ||
11438 | 2023-11-02 Richard Biener <rguenther@suse.de> | |
11439 | ||
11440 | PR tree-optimization/112320 | |
11441 | * gimple-fold.h (rewrite_to_defined_overflow): New overload | |
11442 | for in-place operation. | |
11443 | * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt | |
11444 | iterator argument to worker, define separate API for | |
11445 | in-place and not in-place operation. | |
11446 | * tree-if-conv.cc (predicate_statements): Simplify. | |
11447 | * tree-scalar-evolution.cc (final_value_replacement_loop): | |
11448 | Likewise. | |
11449 | * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust. | |
11450 | * tree-ssa-reassoc.cc (update_range_test): Likewise. | |
11451 | ||
11452 | 2023-11-02 Uros Bizjak <ubizjak@gmail.com> | |
11453 | ||
11454 | * config/i386/i386.md: Move stack protector patterns | |
11455 | above mov $0,%reg -> xor %reg,%reg peephole2 pattern. | |
11456 | ||
11457 | 2023-11-02 liuhongt <hongtao.liu@intel.com> | |
11458 | ||
11459 | * config/i386/mmx.md (cmlav4hf4): New expander. | |
11460 | (cmla_conjv4hf4): Ditto. | |
11461 | (cmulv4hf3): Ditto. | |
11462 | (cmul_conjv4hf3): Ditto. | |
11463 | ||
11464 | 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11465 | ||
11466 | * config/riscv/vector.md: Fix redundant codes in attributes. | |
11467 | ||
11468 | 2023-11-02 xuli <xuli1@eswincomputing.com> | |
11469 | ||
11470 | * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics. | |
11471 | * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics. | |
11472 | * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto. | |
11473 | * config/riscv/riscv-vector-builtins.cc: Add arg types. | |
11474 | ||
11475 | 2023-11-02 Pan Li <pan2.li@intel.com> | |
11476 | ||
11477 | * tree-vect-stmts.cc (vectorizable_internal_function): Add type | |
11478 | size check for vectype_out doesn't participating for optab query. | |
11479 | (vectorizable_call): Remove the type size check. | |
11480 | ||
11481 | 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11482 | ||
11483 | PR target/112327 | |
11484 | * config/riscv/vector.md: Add '0'. | |
11485 | ||
11486 | 2023-11-01 Roger Sayle <roger@nextmovesoftware.com> | |
11487 | ||
11488 | PR target/110551 | |
11489 | * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition | |
11490 | as operands[2] with predicate register_operand must be !MEM_P. | |
11491 | (peephole2): Optimize a mulx followed by a register-to-register | |
11492 | move, to place result in the correct destination if possible. | |
11493 | ||
11494 | 2023-11-01 Patrick O'Neill <patrick@rivosinc.com> | |
11495 | ||
11496 | * config/riscv/sync.md: Use riscv_subword_address function to | |
11497 | calculate the address and shift in atomic_test_and_set. | |
11498 | ||
11499 | 2023-11-01 Vineet Gupta <vineetg@rivosinc.com> | |
11500 | ||
11501 | * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode | |
11502 | returned for libcall case. | |
11503 | ||
11504 | 2023-11-01 Martin Uecker <uecker@tugraz.at> | |
11505 | ||
11506 | PR c/71219 | |
11507 | * doc/invoke.texi: Document -Walloc-size option. | |
11508 | ||
11509 | 2023-11-01 Edwin Lu <ewlu@rivosinc.com> | |
11510 | ||
11511 | * genautomata.cc (write_automata): move endif | |
11512 | ||
11513 | 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
11514 | ||
11515 | * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to | |
11516 | create return array and don't return new type. | |
11517 | (simd_clone_adjust_argument_types): Hoist out code that creates | |
11518 | ipa_param_body_adjustments and don't return them. | |
11519 | (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and | |
11520 | argument types have been vectorized, create adjustments and return array | |
11521 | after the hook. | |
11522 | (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and | |
11523 | argument types have been vectorized. | |
11524 | ||
11525 | 2023-11-01 Uros Bizjak <ubizjak@gmail.com> | |
11526 | ||
11527 | PR target/112332 | |
11528 | * config/i386/i386.md (stack_protexct_set_2 peephole2): | |
11529 | Use general_gr_operand as operand 4 predicate. | |
11530 | ||
11531 | 2023-11-01 Uros Bizjak <ubizjak@gmail.com> | |
11532 | ||
11533 | * config/i386/i386.md (stack_protect_set): Explicitly | |
11534 | generate scratch register in word mode. | |
11535 | (@stack_protect_set_1_<mode>): Rename to ... | |
11536 | (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this. | |
11537 | Use SWI48 mode iterator to match scratch register. | |
11538 | (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode | |
11539 | iterators to match peephole sequence. Use general_operand | |
11540 | predicate for operand 4. Allow different operand 2 and operand 3 | |
11541 | registers and use peep2_reg_dead_p to ensure new scratch | |
11542 | register is dead before peephole seqeunce. Use peep2_reg_dead_p | |
11543 | to ensure old scratch register is dead after peephole sequence. | |
11544 | (*stack_protect_set_2_<mode>): Rename to ... | |
11545 | (*stack_protect_set_2_<mode>_si): .. this. | |
11546 | (*stack_protect_set_3): Rename to ... | |
11547 | (*stack_protect_set_2_<mode>_di): ... this. | |
11548 | Use PTR mode iterator to match stack protector memory move. | |
11549 | Use earlyclobber for all alternatives of operand 1. | |
11550 | (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode | |
11551 | iterators to match peephole sequence. Use general_operand | |
11552 | predicate for operand 4. Allow different operand 2 and operand 3 | |
11553 | registers and use peep2_reg_dead_p to ensure new scratch | |
11554 | register is dead before peephole seqeunce. Use peep2_reg_dead_p | |
11555 | to ensure old scratch register is dead after peephole sequence. | |
11556 | ||
11557 | 2023-11-01 xuli <xuli1@eswincomputing.com> | |
11558 | ||
11559 | * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine | |
11560 | intrinsics for tuple types. | |
11561 | * config/riscv/riscv-vector-builtins.cc: Ditto. | |
11562 | * config/riscv/vector.md (@vundefined<mode>): Ditto. | |
11563 | ||
11564 | 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11565 | ||
11566 | * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace. | |
11567 | ||
11568 | 2023-10-31 David Malcolm <dmalcolm@redhat.com> | |
11569 | ||
11570 | * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o. | |
11571 | ||
11572 | 2023-10-31 David Malcolm <dmalcolm@redhat.com> | |
11573 | ||
11574 | * input.cc (dump_location_info): Update for removal of | |
11575 | MACRO_MAP_EXPANSION_POINT_LOCATION. | |
11576 | * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc): | |
11577 | Likewise. | |
11578 | ||
11579 | 2023-10-31 David Malcolm <dmalcolm@redhat.com> | |
11580 | ||
11581 | * opts.cc (get_option_url): Update comment; the requirement to | |
11582 | pass DOCUMENTATION_ROOT_URL's value via -D was removed in | |
11583 | r10-8065-ge33a1eae25b8a8. | |
11584 | ||
11585 | 2023-10-31 David Malcolm <dmalcolm@redhat.com> | |
11586 | ||
11587 | * pretty-print.cc (pretty_printer::pretty_printer): Initialize | |
11588 | m_skipping_null_url. | |
11589 | (pp_begin_url): Handle URL being null. | |
11590 | (pp_end_url): Likewise. | |
11591 | (selftest::test_null_urls): New. | |
11592 | (selftest::pretty_print_cc_tests): Call it. | |
11593 | * pretty-print.h (pretty_printer::m_skipping_null_url): New. | |
11594 | ||
11595 | 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
11596 | ||
11597 | * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD. | |
11598 | (vect_build_slp_tree_1): Ditto. | |
11599 | (vect_build_slp_tree_2): Ditto. | |
11600 | ||
11601 | 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com> | |
11602 | ||
11603 | * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass. | |
11604 | * config/bpf/bpf-protos.h: Added prototype for new pass. | |
11605 | * config/bpf/bpf.cc (bpf_delegitimize_address): New function. | |
11606 | * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed | |
11607 | name with '*'. | |
11608 | * config/bpf/core-builtins.cc (cr_builtins) Added access_node to | |
11609 | struct. | |
11610 | (is_attr_preserve_access): Improved check. | |
11611 | (core_field_info): Make use of root_for_core_field_info | |
11612 | function. | |
11613 | (process_field_expr): Adapted to new functions. | |
11614 | (pack_type): Small improvement. | |
11615 | (bpf_handle_plugin_finish_type): Adapted to GTY(()). | |
11616 | (bpf_init_core_builtins): Changed to new function names. | |
11617 | (construct_builtin_core_reloc): Improved implementation. | |
11618 | (bpf_resolve_overloaded_core_builtin): Changed how | |
11619 | __builtin_preserve_access_index is converted. | |
11620 | (compute_field_expr): Corrected implementation. Added | |
11621 | access_node argument. | |
11622 | (bpf_core_get_index): Added valid argument. | |
11623 | (root_for_core_field_info, pack_field_expr) | |
11624 | (core_expr_with_field_expr_plus_base, make_core_safe_access_index) | |
11625 | (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr) | |
11626 | (core_access_clean, core_is_access_index, core_mark_as_access_index) | |
11627 | (make_gimple_core_safe_access_index, execute_lower_bpf_core) | |
11628 | (make_pass_lower_bpf_core): Added functions. | |
11629 | (pass_data_lower_bpf_core): New pass struct. | |
11630 | (pass_lower_bpf_core): New gimple_opt_pass class. | |
11631 | (pack_field_expr_for_preserve_field) | |
11632 | (bpf_replace_core_move_operands): Removed function. | |
11633 | (bpf_enum_value_kind): Added GTY(()). | |
11634 | * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind) | |
11635 | (bpf_type_info_kind, bpf_enum_value_kind): New enum. | |
11636 | * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA. | |
11637 | ||
11638 | 2023-10-31 Neal Frager <neal.frager@amd.com> | |
11639 | ||
11640 | * config/microblaze/microblaze.cc: Fix mcpu version check. | |
11641 | ||
11642 | 2023-10-31 Patrick O'Neill <patrick@rivosinc.com> | |
11643 | ||
11644 | * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove | |
11645 | TARGET_ATOMIC constraint | |
11646 | (atomic_store_rvwmo<mode>): Ditto. | |
11647 | * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto. | |
11648 | (atomic_store_ztso<mode>): Ditto. | |
11649 | * config/riscv/sync.md (atomic_load<mode>): Ditto. | |
11650 | (atomic_store<mode>): Ditto. | |
11651 | ||
11652 | 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu> | |
11653 | ||
11654 | * config/riscv/riscv.cc (riscv_index_reg_class): | |
11655 | Return GR_REGS for XTheadFMemIdx. | |
11656 | (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx. | |
11657 | * config/riscv/riscv.h (HARDFP_REG_P): New macro. | |
11658 | * config/riscv/thead.cc (is_fmemidx_mode): New function. | |
11659 | (th_memidx_classify_address_index): Add support for XTheadFMemIdx. | |
11660 | (th_fmemidx_output_index): New function. | |
11661 | (th_output_move): Add support for XTheadFMemIdx. | |
11662 | * config/riscv/thead.md (TH_M_ANYF): New mode iterator. | |
11663 | (TH_M_NOEXTF): Likewise. | |
11664 | (*th_fmemidx_movsf_hardfloat): New INSN. | |
11665 | (*th_fmemidx_movdf_hardfloat_rv64): Likewise. | |
11666 | (*th_fmemidx_I_a): Likewise. | |
11667 | (*th_fmemidx_I_c): Likewise. | |
11668 | (*th_fmemidx_US_a): Likewise. | |
11669 | (*th_fmemidx_US_c): Likewise. | |
11670 | (*th_fmemidx_UZ_a): Likewise. | |
11671 | (*th_fmemidx_UZ_c): Likewise. | |
11672 | ||
11673 | 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu> | |
11674 | ||
11675 | * config/riscv/constraints.md (th_m_mia): New constraint. | |
11676 | (th_m_mib): Likewise. | |
11677 | (th_m_mir): Likewise. | |
11678 | (th_m_miu): Likewise. | |
11679 | * config/riscv/riscv-protos.h (enum riscv_address_type): | |
11680 | Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG, | |
11681 | and ADDRESS_REG_WB and their documentation. | |
11682 | (struct riscv_address_info): Add new field 'shift' and | |
11683 | document the field usage for the new address types. | |
11684 | (riscv_valid_base_register_p): New prototype. | |
11685 | (th_memidx_legitimate_modify_p): Likewise. | |
11686 | (th_memidx_legitimate_index_p): Likewise. | |
11687 | (th_classify_address): Likewise. | |
11688 | (th_output_move): Likewise. | |
11689 | (th_print_operand_address): Likewise. | |
11690 | * config/riscv/riscv.cc (riscv_index_reg_class): | |
11691 | Return GR_REGS for XTheadMemIdx. | |
11692 | (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx. | |
11693 | (riscv_classify_address): Call th_classify_address() on top. | |
11694 | (riscv_output_move): Call th_output_move() on top. | |
11695 | (riscv_print_operand_address): Call th_print_operand_address() | |
11696 | on top. | |
11697 | * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro. | |
11698 | (HAVE_PRE_MODIFY_DISP): Likewise. | |
11699 | * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable | |
11700 | for XTheadMemIdx. | |
11701 | (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand, | |
11702 | create INSN with same name and disable it for XTheadMemIdx. | |
11703 | (extendsidi2): Likewise. | |
11704 | (*extendsidi2_internal): Disable for XTheadMemIdx. | |
11705 | * config/riscv/thead.cc (valid_signed_immediate): New helper | |
11706 | function. | |
11707 | (th_memidx_classify_address_modify): New function. | |
11708 | (th_memidx_legitimate_modify_p): Likewise. | |
11709 | (th_memidx_output_modify): Likewise. | |
11710 | (is_memidx_mode): Likewise. | |
11711 | (th_memidx_classify_address_index): Likewise. | |
11712 | (th_memidx_legitimate_index_p): Likewise. | |
11713 | (th_memidx_output_index): Likewise. | |
11714 | (th_classify_address): Likewise. | |
11715 | (th_output_move): Likewise. | |
11716 | (th_print_operand_address): Likewise. | |
11717 | * config/riscv/thead.md (*th_memidx_operand): New splitter. | |
11718 | (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN. | |
11719 | (*th_memidx_extendsidi2): Likewise. | |
11720 | (*th_memidx_zero_extendsidi2): Likewise. | |
11721 | (*th_memidx_zero_extendhi<GPR:mode>2): Likewise. | |
11722 | (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise. | |
11723 | (*th_memidx_bb_zero_extendsidi2): Likewise. | |
11724 | (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise. | |
11725 | (*th_memidx_bb_extendhi<GPR:mode>2): Likewise. | |
11726 | (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise. | |
11727 | (TH_M_ANYI): New mode iterator. | |
11728 | (TH_M_NOEXTI): Likewise. | |
11729 | (*th_memidx_I_a): New combiner optimization. | |
11730 | (*th_memidx_I_b): Likewise. | |
11731 | (*th_memidx_I_c): Likewise. | |
11732 | (*th_memidx_US_a): Likewise. | |
11733 | (*th_memidx_US_b): Likewise. | |
11734 | (*th_memidx_US_c): Likewise. | |
11735 | (*th_memidx_UZ_a): Likewise. | |
11736 | (*th_memidx_UZ_b): Likewise. | |
11737 | (*th_memidx_UZ_c): Likewise. | |
11738 | ||
11739 | 2023-10-31 Carl Love <cel@us.ibm.com> | |
11740 | ||
11741 | * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add | |
11742 | documentation for the builti-ins. | |
11743 | ||
11744 | 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com> | |
11745 | ||
11746 | PR rtl-optimization/111971 | |
11747 | * lra-constraints.cc: (process_alt_operands): Don't check start | |
11748 | hard regs for regs originated from register variables. | |
11749 | ||
11750 | 2023-10-31 Robin Dapp <rdapp@ventanamicro.com> | |
11751 | ||
11752 | * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin | |
11753 | expanders. | |
11754 | (cond_<ieee_fmaxmin_op><mode>): Ditto. | |
11755 | (cond_len_<ieee_fmaxmin_op><mode>): Ditto. | |
11756 | (reduc_fmax_scal_<mode>): Ditto. | |
11757 | (reduc_fmin_scal_<mode>): Ditto. | |
11758 | * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax. | |
11759 | * config/riscv/vector-iterators.md (fmin): New UNSPEC. | |
11760 | (UNSPEC_VFMIN): Ditto. | |
11761 | * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add | |
11762 | UNSPEC insn patterns. | |
11763 | (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto. | |
11764 | ||
11765 | 2023-10-31 Robin Dapp <rdapp@ventanamicro.com> | |
11766 | ||
11767 | PR bootstrap/84402 | |
11768 | PR target/111600 | |
11769 | * Makefile.in: Handle split insn-emit.cc. | |
11770 | * configure: Regenerate. | |
11771 | * configure.ac: Add --with-insnemit-partitions. | |
11772 | * genemit.cc (output_peephole2_scratches): Print to file instead | |
11773 | of stdout. | |
11774 | (print_code): Ditto. | |
11775 | (gen_rtx_scratch): Ditto. | |
11776 | (gen_exp): Ditto. | |
11777 | (gen_emit_seq): Ditto. | |
11778 | (emit_c_code): Ditto. | |
11779 | (gen_insn): Ditto. | |
11780 | (gen_expand): Ditto. | |
11781 | (gen_split): Ditto. | |
11782 | (output_add_clobbers): Ditto. | |
11783 | (output_added_clobbers_hard_reg_p): Ditto. | |
11784 | (print_overload_arguments): Ditto. | |
11785 | (print_overload_test): Ditto. | |
11786 | (handle_overloaded_code_for): Ditto. | |
11787 | (handle_overloaded_gen): Ditto. | |
11788 | (print_header): New function. | |
11789 | (handle_arg): New function. | |
11790 | (main): Split output into 10 files. | |
11791 | * gensupport.cc (count_patterns): New function. | |
11792 | * gensupport.h (count_patterns): Define. | |
11793 | * read-md.cc (md_reader::print_md_ptr_loc): Add file argument. | |
11794 | * read-md.h (class md_reader): Change definition. | |
11795 | ||
11796 | 2023-10-31 Alexandre Oliva <oliva@adacore.com> | |
11797 | ||
11798 | PR tree-optimization/111943 | |
11799 | * gimple-harden-control-flow.cc: Adjust copyright year. | |
11800 | (rt_bb_visited): Add vfalse and vtrue data members. | |
11801 | Zero-initialize them in the ctor. | |
11802 | (rt_bb_visited::insert_exit_check_on_edge): Upon encountering | |
11803 | abnormal edges, insert initializers for vfalse and vtrue on | |
11804 | entry, and insert the check sequence guarded by a conditional | |
11805 | in the dest block. | |
11806 | ||
11807 | 2023-10-31 Richard Biener <rguenther@suse.de> | |
11808 | ||
11809 | PR tree-optimization/112305 | |
11810 | * tree-scalar-evolution.h (expression_expensive): Adjust. | |
11811 | * tree-scalar-evolution.cc (expression_expensive): Record | |
11812 | when we see a COND_EXPR. | |
11813 | (final_value_replacement_loop): When the replacement contains | |
11814 | a COND_EXPR, rewrite it to defined overflow. | |
11815 | * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust. | |
11816 | ||
11817 | 2023-10-31 Xi Ruoyao <xry111@xry111.site> | |
11818 | ||
11819 | PR target/112299 | |
11820 | * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0 | |
11821 | if not defined yet. | |
11822 | ||
11823 | 2023-10-31 Lehua Ding <lehua.ding@rivai.ai> | |
11824 | ||
11825 | * gimple-match.h (gimple_match_op::gimple_match_op): | |
11826 | Add interfaces for more arguments. | |
11827 | (gimple_match_op::set_op): Add interfaces for more arguments. | |
11828 | * match.pd: Add support of combining cond_len_op + vec_cond | |
11829 | ||
11830 | 2023-10-31 Haochen Jiang <haochen.jiang@intel.com> | |
11831 | ||
11832 | * config/i386/avx512cdintrin.h (target): Push evex512 for | |
11833 | avx512cd. | |
11834 | * config/i386/avx512vlintrin.h (target): Split avx512cdvl part | |
11835 | out from avx512vl. | |
11836 | * config/i386/i386-builtin.def (BDESC): Do not check evex512 | |
11837 | for builtins not needed. | |
11838 | ||
11839 | 2023-10-31 Lehua Ding <lehua.ding@rivai.ai> | |
11840 | ||
11841 | * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2): | |
11842 | Change to define_expand. | |
11843 | ||
11844 | 2023-10-31 liuhongt <hongtao.liu@intel.com> | |
11845 | ||
11846 | PR target/112276 | |
11847 | * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change | |
11848 | define_split to define_insn_and_split to handle | |
11849 | immediate_operand for comparison. | |
11850 | (*mmx_pblendvb_v8qi_2): Ditto. | |
11851 | (*mmx_pblendvb_<mode>_1): Ditto. | |
11852 | (*mmx_pblendvb_v4qi_2): Ditto. | |
11853 | (<code><mode>3): Remove define_split after it. | |
11854 | (<code>v8qi3): Ditto. | |
11855 | (<code><mode>3): Ditto. | |
11856 | (<ode>v2hi3): Ditto. | |
11857 | ||
11858 | 2023-10-31 Andrew Pinski <pinskia@gmail.com> | |
11859 | ||
11860 | * match.pd (`a == 1 ? b : a OP b`): New pattern. | |
11861 | (`a == -1 ? b : a & b`): New pattern. | |
11862 | ||
11863 | 2023-10-31 Andrew Pinski <pinskia@gmail.com> | |
11864 | ||
11865 | * match.pd: (`a == 0 ? b : b + a`, | |
11866 | `a == 0 ? b : b - a`): New patterns. | |
11867 | ||
11868 | 2023-10-31 Neal Frager <neal.frager@amd.com> | |
11869 | ||
11870 | * config/microblaze/microblaze.cc: Fix mcpu version check. | |
11871 | ||
11872 | 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com> | |
11873 | ||
11874 | * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng. | |
11875 | * common/config/i386/i386-common.cc: Add yongfeng. | |
11876 | * common/config/i386/i386-cpuinfo.h (enum processor_subtypes): | |
11877 | Add ZHAOXIN_FAM7H_YONGFENG. | |
11878 | * config.gcc: Add yongfeng. | |
11879 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
11880 | Let -march=native recognize yongfeng processors. | |
11881 | * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng. | |
11882 | * config/i386/i386-options.cc (m_YONGFENG): New definition. | |
11883 | (m_ZHAOXIN): Ditto. | |
11884 | * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG. | |
11885 | * config/i386/i386.md: Add yongfeng. | |
11886 | * config/i386/lujiazui.md: Fix typo. | |
11887 | * config/i386/x86-tune-costs.h (struct processor_costs): | |
11888 | Add yongfeng costs. | |
11889 | * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng. | |
11890 | (ix86_adjust_cost): Ditto. | |
11891 | * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace | |
11892 | m_LUJIAZUI with m_ZHAOXIN. | |
11893 | (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto. | |
11894 | (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto. | |
11895 | (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto. | |
11896 | (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto. | |
11897 | (X86_TUNE_MOVX): Ditto. | |
11898 | (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto. | |
11899 | (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto. | |
11900 | (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto. | |
11901 | (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto. | |
11902 | (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto. | |
11903 | (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto. | |
11904 | (X86_TUNE_USE_LEAVE): Ditto. | |
11905 | (X86_TUNE_PUSH_MEMORY): Ditto. | |
11906 | (X86_TUNE_LCP_STALL): Ditto. | |
11907 | (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto. | |
11908 | (X86_TUNE_OPT_AGU): Ditto. | |
11909 | (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto. | |
11910 | (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto. | |
11911 | (X86_TUNE_USE_SAHF): Ditto. | |
11912 | (X86_TUNE_USE_BT): Ditto. | |
11913 | (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto. | |
11914 | (X86_TUNE_ONE_IF_CONV_INSN): Ditto. | |
11915 | (X86_TUNE_AVOID_MFENCE): Ditto. | |
11916 | (X86_TUNE_EXPAND_ABS): Ditto. | |
11917 | (X86_TUNE_USE_SIMODE_FIOP): Ditto. | |
11918 | (X86_TUNE_USE_FFREEP): Ditto. | |
11919 | (X86_TUNE_EXT_80387_CONSTANTS): Ditto. | |
11920 | (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto. | |
11921 | (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto. | |
11922 | (X86_TUNE_SSE_TYPELESS_STORES): Ditto. | |
11923 | (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto. | |
11924 | (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG. | |
11925 | (X86_TUNE_USE_GATHER_4PARTS): Ditto. | |
11926 | (X86_TUNE_USE_GATHER_8PARTS): Ditto. | |
11927 | (X86_TUNE_AVOID_128FMA_CHAINS): Ditto. | |
11928 | * doc/extend.texi: Add details about yongfeng. | |
11929 | * doc/invoke.texi: Ditto. | |
11930 | * config/i386/yongfeng.md: New file to describe yongfeng processor. | |
11931 | ||
11932 | 2023-10-30 Martin Jambor <mjambor@suse.cz> | |
11933 | ||
11934 | PR ipa/111157 | |
11935 | * ipa-prop.h (struct ipa_argagg_value): Newf flag killed. | |
11936 | * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function. | |
11937 | (update_signature): Mark any any IPA-CP aggregate constants at | |
11938 | positions known to be killed as killed. Move check that there is | |
11939 | clone_info after this pruning. | |
11940 | * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag. | |
11941 | (ipa_argagg_value_list::push_adjusted_values): Clear the new flag. | |
11942 | (push_agg_values_from_plats): Likewise. | |
11943 | (ipa_push_agg_values_from_jfunc): Likewise. | |
11944 | (estimate_local_effects): Likewise. | |
11945 | (push_agg_values_for_index_from_edge): Likewise. | |
11946 | * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed | |
11947 | flag. | |
11948 | (read_ipcp_transformation_info): Likewise. | |
11949 | (ipcp_get_aggregate_const): Update comment, assert that encountered | |
11950 | record does not have killed flag set. | |
11951 | (ipcp_transform_function): Prune all aggregate constants with killed | |
11952 | set. | |
11953 | ||
11954 | 2023-10-30 Martin Jambor <mjambor@suse.cz> | |
11955 | ||
11956 | PR ipa/111157 | |
11957 | * ipa-prop.h (ipcp_transformation): New member function template | |
11958 | remove_argaggs_if. | |
11959 | * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to | |
11960 | filter aggreagate constants. | |
11961 | ||
11962 | 2023-10-30 Roger Sayle <roger@nextmovesoftware.com> | |
11963 | ||
11964 | PR middle-end/101955 | |
11965 | * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split | |
11966 | to convert sign extract of the least significant bit into an | |
11967 | AND $1 then a NEG when !TARGET_BARREL_SHIFTER. | |
11968 | ||
11969 | 2023-10-30 Roger Sayle <roger@nextmovesoftware.com> | |
11970 | ||
11971 | * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates. | |
11972 | Provide reasonable values for SHIFTS and ROTATES by constant | |
11973 | bit counts depending upon TARGET_BARREL_SHIFTER. | |
11974 | (arc_insn_cost): Use insn attributes if the instruction is | |
11975 | recognized. Avoid calling get_attr_length for type "multi", | |
11976 | i.e. define_insn_and_split patterns without explicit type. | |
11977 | Fall-back to set_rtx_cost for single_set and pattern_cost | |
11978 | otherwise. | |
11979 | * config/arc/arc.h (COSTS_N_BYTES): Define helper macro. | |
11980 | (BRANCH_COST): Improve/correct definition. | |
11981 | (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior. | |
11982 | ||
11983 | 2023-10-30 Roger Sayle <roger@nextmovesoftware.com> | |
11984 | ||
11985 | * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP. | |
11986 | (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP. | |
11987 | (arc_split_lshr): Use lsr16 on TARGET_SWAP. | |
11988 | (arc_split_rotl): Use swap on TARGET_SWAP. | |
11989 | (arc_split_rotr): Likewise. | |
11990 | * config/arc/arc.md (ANY_ROTATE): New code iterator. | |
11991 | (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of | |
11992 | swap instruction on TARGET_SWAP. | |
11993 | (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier. | |
11994 | (lshrsi2_cnt16): New define_insn for LSR16 instruction. | |
11995 | (*ashlsi2_cnt16): See above. | |
11996 | ||
11997 | 2023-10-30 Richard Ball <richard.ball@arm.com> | |
11998 | ||
11999 | * config/arm/aout.h: Change to use the Lrtx label. | |
12000 | * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets | |
12001 | from (!target_pure_code) condition. | |
12002 | (ADDR_VEC_ALIGN): Add align for tables in rodata section. | |
12003 | * config/arm/arm.cc (arm_output_casesi): Alter the function to include | |
12004 | .Lrtx label and remove adr instructions. | |
12005 | * config/arm/arm.md | |
12006 | (arm_casesi_internal): Use force_reg to generate ldr instructions that | |
12007 | would otherwise be out of range, and change rtl to accommodate force reg. | |
12008 | Additionally remove unnecessary register temp. | |
12009 | (casesi): Remove pure code check for Arm. | |
12010 | * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm | |
12011 | targets from JUMP_TABLES_IN_TEXT_SECTION definition. | |
12012 | ||
12013 | 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com> | |
12014 | ||
12015 | PR target/106907 | |
12016 | * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise | |
12017 | xor to an equality and fix comment indentation. | |
12018 | ||
12019 | 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12020 | ||
12021 | * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug. | |
12022 | * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto. | |
12023 | * config/riscv/vector.md: Ditto. | |
12024 | ||
12025 | 2023-10-30 liuhongt <hongtao.liu@intel.com> | |
12026 | ||
12027 | PR target/104610 | |
12028 | * config/i386/i386-expand.cc (ix86_expand_branch): Handle | |
12029 | 512-bit vector with vpcmpeq + kortest. | |
12030 | * config/i386/i386.md (cbranchxi4): New expander. | |
12031 | * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode | |
12032 | and V8DImode. | |
12033 | ||
12034 | 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org> | |
12035 | ||
12036 | PR target/111449 | |
12037 | * expr.cc (qi_vector_mode_supported_p): Rename to... | |
12038 | (by_pieces_mode_supported_p): ...this, and extends it to do | |
12039 | the checking for both scalar and vector mode. | |
12040 | (widest_fixed_size_mode_for_size): Call | |
12041 | by_pieces_mode_supported_p to examine the mode. | |
12042 | (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise. | |
12043 | ||
12044 | 2023-10-29 Martin Uecker <uecker@tugraz.at> | |
12045 | ||
12046 | PR tree-optimization/109334 | |
12047 | * tree-object-size.cc (parm_object_size): Allow size | |
12048 | computation for implicit access attributes. | |
12049 | ||
12050 | 2023-10-29 Max Filippov <jcmvbkbc@gmail.com> | |
12051 | ||
12052 | * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from | |
12053 | 260000 (which corresponds to RF-2014.0) to 270000 (which | |
12054 | corresponds to RG-2015.0, the release where salt/saltu opcodes | |
12055 | were introduced). | |
12056 | ||
12057 | 2023-10-29 Pan Li <pan2.li@intel.com> | |
12058 | ||
12059 | * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use | |
12060 | reference type to prevent copying. | |
12061 | ||
12062 | 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com> | |
12063 | ||
12064 | PR rtl-optimization/112107 | |
12065 | * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P | |
12066 | instead of INSN_P. | |
12067 | ||
12068 | 2023-10-27 Andrew Stubbs <ams@codesourcery.com> | |
12069 | ||
12070 | PR target/112088 | |
12071 | * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register | |
12072 | conflict. | |
12073 | ||
12074 | 2023-10-27 Andrew Stubbs <ams@codesourcery.com> | |
12075 | ||
12076 | * config/gcn/gcn-valu.md | |
12077 | (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in | |
12078 | condition to silence the warnings. | |
12079 | (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise. | |
12080 | * config/gcn/gcn.md (*movti_insn): Likewise. | |
12081 | ||
12082 | 2023-10-27 Richard Sandiford <richard.sandiford@arm.com> | |
12083 | ||
12084 | * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared | |
12085 | ASM_OPERANDS. | |
12086 | ||
12087 | 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn> | |
12088 | ||
12089 | * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost. | |
12090 | (sifive_7_tune_info, thead_c906_tune_info): Likewise. | |
12091 | ||
12092 | 2023-10-27 Robin Dapp <rdapp@ventanamicro.com> | |
12093 | ||
12094 | * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander. | |
12095 | * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx): | |
12096 | Define. | |
12097 | (expand_rawmemchr): Define. | |
12098 | * config/riscv/riscv-v.cc (force_vector_length_operand): Remove | |
12099 | static. | |
12100 | (expand_block_move): Move from here... | |
12101 | * config/riscv/riscv-string.cc (expand_block_move): ...to here. | |
12102 | (expand_rawmemchr): Add vectorized expander. | |
12103 | * internal-fn.cc (expand_RAWMEMCHR): Fix typo. | |
12104 | ||
12105 | 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com> | |
12106 | ||
12107 | * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains): | |
12108 | Process reg equivalence invariants. | |
12109 | ||
12110 | 2023-10-27 Uros Bizjak <ubizjak@gmail.com> | |
12111 | ||
12112 | * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL): | |
12113 | i386: Fiy typo in "partial_memory_read_stall" tune option. | |
12114 | ||
12115 | 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com> | |
12116 | ||
12117 | * config/aarch64/aarch64.cc (aarch64_print_operand): Add | |
12118 | support for CONST_STRING. | |
12119 | ||
12120 | 2023-10-27 Roger Sayle <roger@nextmovesoftware.com> | |
12121 | ||
12122 | PR target/110551 | |
12123 | * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and | |
12124 | 2 take "regiser_operand" and "nonimmediate_operand" respectively. | |
12125 | (<u>mulqihi3): Likewise. | |
12126 | (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand | |
12127 | matching the %d constraint. Use umul_highpart RTX to represent | |
12128 | the highpart multiplication. | |
12129 | (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand | |
12130 | predicate, and "a" rather than "0" as operands 0 and 2 have | |
12131 | different modes. | |
12132 | (define_split): For mul to mulx conversion, use the new | |
12133 | umul_highpart RTX representation. | |
12134 | (*mul<mode><dwi>3_1): Operand 1 should be register_operand | |
12135 | and the constraint %a as operands 0 and 1 have different modes. | |
12136 | (*<u>mulqihi3_1): Operand 1 should be register_operand matching | |
12137 | the constraint %0. | |
12138 | (define_peephole2): Providing widening multiplication variants | |
12139 | of the peephole2s that tweak highpart multiplication register | |
12140 | allocation. | |
12141 | ||
12142 | 2023-10-27 Lewis Hyatt <lhyatt@gmail.com> | |
12143 | ||
12144 | PR preprocessor/87299 | |
12145 | * toplev.cc (no_backend): New static global. | |
12146 | (finalize): Remove argument no_backend, which is now a | |
12147 | static global. | |
12148 | (process_options): Likewise. | |
12149 | (do_compile): Likewise. | |
12150 | (target_reinit): Don't do anything in preprocess-only mode. | |
12151 | (toplev::main): Adapt to no_backend change. | |
12152 | (toplev::finalize): Likewise. | |
12153 | ||
12154 | 2023-10-27 Andrew Pinski <apinski@marvell.com> | |
12155 | ||
12156 | PR tree-optimization/101590 | |
12157 | PR tree-optimization/94884 | |
12158 | * match.pd (`(X BIT_OP Y) CMP X`): New pattern. | |
12159 | ||
12160 | 2023-10-27 liuhongt <hongtao.liu@intel.com> | |
12161 | ||
12162 | PR target/103861 | |
12163 | * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle | |
12164 | V2HF/V2BF/V4HF/V4BFmode. | |
12165 | * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when | |
12166 | data_mode is V4HF/V2HFmode. | |
12167 | * config/i386/mmx.md (vec_cmpv4hfqi): New expander. | |
12168 | (vcond_mask_<mode>v4hi): Ditto. | |
12169 | (vcond_mask_<mode>qi): Ditto. | |
12170 | (vec_cmpv2hfqi): Ditto. | |
12171 | (vcond_mask_<mode>v2hi): Ditto. | |
12172 | (mmx_plendvb_<mode>): Add 2 combine splitters after the | |
12173 | patterns. | |
12174 | (mmx_pblendvb_v8qi): Ditto. | |
12175 | (<code>v2hi3): Add a combine splitter after the pattern. | |
12176 | (<code><mode>3): Ditto. | |
12177 | (<code>v8qi3): Ditto. | |
12178 | (<code><mode>3): Ditto. | |
12179 | * config/i386/sse.md (vcond<mode><mode>): Merge this with .. | |
12180 | (vcond<sseintvecmodelower><mode>): .. this into .. | |
12181 | (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this, | |
12182 | and extend to V8BF/V16BF/V32BFmode. | |
12183 | ||
12184 | 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12185 | ||
12186 | * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro. | |
12187 | * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro. | |
12188 | (autovectorize_vector_modes): Ditto. | |
12189 | (can_find_related_mode_p): Ditto. | |
12190 | ||
12191 | 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12192 | ||
12193 | PR target/111318 | |
12194 | PR target/111888 | |
12195 | * config.gcc: Add AVL propagation pass. | |
12196 | * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto. | |
12197 | * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto. | |
12198 | * config/riscv/t-riscv: Ditto. | |
12199 | * config/riscv/riscv-avlprop.cc: New file. | |
12200 | ||
12201 | 2023-10-26 David Malcolm <dmalcolm@redhat.com> | |
12202 | ||
12203 | * doc/extend.texi (Common Function Attributes): Add | |
12204 | null_terminated_string_arg. | |
12205 | ||
12206 | 2023-10-26 Andrew Pinski <pinskia@gmail.com> | |
12207 | ||
12208 | PR tree-optimization/111957 | |
12209 | * match.pd (`a != C1 ? abs(a) : C2`): New pattern. | |
12210 | ||
12211 | 2023-10-26 Aldy Hernandez <aldyh@redhat.com> | |
12212 | ||
12213 | * range-op-float.cc (range_operator::fold_range): Delete unused | |
12214 | variable. | |
12215 | ||
12216 | 2023-10-26 Aldy Hernandez <aldyh@redhat.com> | |
12217 | ||
12218 | * range-op-float.cc (range_operator::fold_range): Remove | |
12219 | superfluous code. | |
12220 | (range_operator::rv_fold): Remove unneeded arguments. | |
12221 | (operator_plus::rv_fold): Same. | |
12222 | (operator_minus::rv_fold): Same. | |
12223 | (operator_mult::rv_fold): Same. | |
12224 | (operator_div::rv_fold): Same. | |
12225 | * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from | |
12226 | rv_fold methods. | |
12227 | * range-op.h: Same. | |
12228 | ||
12229 | 2023-10-26 Aldy Hernandez <aldyh@redhat.com> | |
12230 | ||
12231 | * range-op-float.cc (range_operator::fold_range): Pass frange | |
12232 | argument to rv_fold. | |
12233 | (range_operator::rv_fold): Add frange argument. | |
12234 | (operator_plus::rv_fold): Same. | |
12235 | (operator_minus::rv_fold): Same. | |
12236 | (operator_mult::rv_fold): Same. | |
12237 | (operator_div::rv_fold): Same. | |
12238 | * range-op-mixed.h: Add frange argument to rv_fold methods. | |
12239 | * range-op.h: Same. | |
12240 | ||
12241 | 2023-10-26 Richard Ball <richard.ball@arm.com> | |
12242 | ||
12243 | * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output | |
12244 | for different machine modes for arm. | |
12245 | * config/arm/arm-protos.h (arm_output_casesi): New prototype. | |
12246 | * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use | |
12247 | ASM_OUTPUT_ADDR_DIFF_ELT. | |
12248 | (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for | |
12249 | TARGET_ARM. | |
12250 | (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2 | |
12251 | for TARGET_ARM. | |
12252 | * config/arm/arm.cc (arm_output_casesi): New function. | |
12253 | * config/arm/arm.md (arm_casesi_internal): Change casesi expand | |
12254 | and insn. | |
12255 | for arm to use new function arm_output_casesi. | |
12256 | ||
12257 | 2023-10-26 Iain Sandoe <iain@sandoe.co.uk> | |
12258 | ||
12259 | * config/darwin.h | |
12260 | (darwin_label_is_anonymous_local_objc_name): Make metadata names | |
12261 | linker-visibile for GNU objective C. | |
12262 | ||
12263 | 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com> | |
12264 | ||
12265 | * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when | |
12266 | LRA is used. | |
12267 | * ira-costs.cc: Include regset.h. | |
12268 | (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains): | |
12269 | New functions. | |
12270 | (find_costs_and_classes): Call calculate_equiv_gains and redefine | |
12271 | mem_cost of pseudos with equivs when LRA is used. | |
12272 | * var-tracking.cc: Include ira.h and lra.h. | |
12273 | (vt_initialize): Use lra_eliminate_regs when LRA is used. | |
12274 | ||
12275 | 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12276 | ||
12277 | * doc/md.texi: Adapt COND_LEN pseudo code. | |
12278 | ||
12279 | 2023-10-26 Roger Sayle <roger@nextmovesoftware.com> | |
12280 | Richard Biener <rguenther@suse.de> | |
12281 | ||
12282 | PR rtl-optimization/91865 | |
12283 | * combine.cc (make_compound_operation): Avoid creating a | |
12284 | ZERO_EXTEND of a ZERO_EXTEND. | |
12285 | ||
12286 | 2023-10-26 Jiahao Xu <xujiahao@loongson.cn> | |
12287 | ||
12288 | * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to | |
12289 | (vcond_mask_<mode><mode256_i>): this. | |
12290 | * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to | |
12291 | (vcond_mask_<mode><mode_i>): this. | |
12292 | ||
12293 | 2023-10-26 Thomas Schwinge <thomas@codesourcery.com> | |
12294 | ||
12295 | * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p): | |
12296 | 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before | |
12297 | 'return true;'. | |
12298 | * ipa-visibility.cc (function_and_variable_visibility): Change | |
12299 | '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'. | |
12300 | * varasm.cc (output_constant_pool_contents) | |
12301 | [#ifdef ASM_OUTPUT_DEF]: | |
12302 | 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'. | |
12303 | (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]: | |
12304 | 'if (!TARGET_SUPPORTS_ALIASES)', | |
12305 | 'gcc_checking_assert (seen_error ());'. | |
12306 | (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to | |
12307 | 'if (!TARGET_SUPPORTS_ALIASES)'. | |
12308 | (default_asm_output_anchor): | |
12309 | 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'. | |
12310 | ||
12311 | 2023-10-26 Alexandre Oliva <oliva@adacore.com> | |
12312 | ||
12313 | PR tree-optimization/111520 | |
12314 | * gimple-harden-conditionals.cc | |
12315 | (pass_harden_compares::execute): Set EH edge probability and | |
12316 | EH block execution count. | |
12317 | ||
12318 | 2023-10-26 Alexandre Oliva <oliva@adacore.com> | |
12319 | ||
12320 | * tree-eh.h (make_eh_edges): Rename to... | |
12321 | (make_eh_edge): ... this. | |
12322 | * tree-eh.cc: Likewise. Adjust all callers... | |
12323 | * gimple-harden-conditionals.cc: ... here, ... | |
12324 | * gimple-harden-control-flow.cc: ... here, ... | |
12325 | * tree-cfg.cc: ... here, ... | |
12326 | * tree-inline.cc: ... and here. | |
12327 | ||
12328 | 2023-10-25 Iain Sandoe <iain@sandoe.co.uk> | |
12329 | ||
12330 | * config/darwin.cc (darwin_override_options): Handle fPIE. | |
12331 | ||
12332 | 2023-10-25 Iain Sandoe <iain@sandoe.co.uk> | |
12333 | ||
12334 | * config.gcc: Use -E to to sed to indicate that we are using | |
12335 | extended REs. | |
12336 | ||
12337 | 2023-10-25 Jason Merrill <jason@redhat.com> | |
12338 | ||
12339 | * tree-core.h (struct tree_base): Update address_space comment. | |
12340 | ||
12341 | 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
12342 | ||
12343 | * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate) | |
12344 | Add support for immediates using MOV/EOR bitmask. | |
12345 | ||
12346 | 2023-10-25 Uros Bizjak <ubizjak@gmail.com> | |
12347 | ||
12348 | PR target/111698 | |
12349 | * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL): | |
12350 | New tune. | |
12351 | * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro. | |
12352 | * config/i386/i386.md: New peephole pattern to narrow test | |
12353 | instructions with immediate operands that test memory locations | |
12354 | for zero. | |
12355 | ||
12356 | 2023-10-25 Andrew MacLeod <amacleod@redhat.com> | |
12357 | ||
12358 | * value-range.cc (irange::union_append): New. | |
12359 | (irange::union_): Call union_append when appropriate. | |
12360 | * value-range.h (irange::union_append): New prototype. | |
12361 | ||
12362 | 2023-10-25 Chenghui Pan <panchenghui@loongson.cn> | |
12363 | ||
12364 | * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments. | |
12365 | (__lasx_xvfrintrne_s): Ditto. | |
12366 | (__lasx_xvfrintrne_d): Ditto. | |
12367 | (__lasx_xvfrintrz_s): Ditto. | |
12368 | (__lasx_xvfrintrz_d): Ditto. | |
12369 | (__lasx_xvfrintrp_s): Ditto. | |
12370 | (__lasx_xvfrintrp_d): Ditto. | |
12371 | (__lasx_xvfrintrm_s): Ditto. | |
12372 | (__lasx_xvfrintrm_d): Ditto. | |
12373 | * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto. | |
12374 | (__lsx_vfrintrne_s): Ditto. | |
12375 | (__lsx_vfrintrne_d): Ditto. | |
12376 | (__lsx_vfrintrz_s): Ditto. | |
12377 | (__lsx_vfrintrz_d): Ditto. | |
12378 | (__lsx_vfrintrp_s): Ditto. | |
12379 | (__lsx_vfrintrp_d): Ditto. | |
12380 | (__lsx_vfrintrm_s): Ditto. | |
12381 | (__lsx_vfrintrm_d): Ditto. | |
12382 | ||
12383 | 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn> | |
12384 | ||
12385 | * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the | |
12386 | instruction template corresponding to the __builtin_thread_pointer | |
12387 | function. | |
12388 | * doc/extend.texi:Add the __builtin_thread_pointer function support | |
12389 | description to the documentation. | |
12390 | ||
12391 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12392 | ||
12393 | * Makefile.in (OBJS): Add rtl-ssa/movement.o. | |
12394 | * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers) | |
12395 | (single_set_info): New functions. | |
12396 | (remove_uses_of_def, accesses_reference_same_resource): Declare. | |
12397 | (insn_clobbers_resources): Likewise. | |
12398 | * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function. | |
12399 | (rtl_ssa::accesses_reference_same_resource): Likewise. | |
12400 | (rtl_ssa::insn_clobbers_resources): Likewise. | |
12401 | * rtl-ssa/movement.h (can_move_insn_p): Declare. | |
12402 | * rtl-ssa/movement.cc: New file. | |
12403 | ||
12404 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12405 | ||
12406 | * rtl-ssa/functions.h (function_info::remains_available_at_insn): | |
12407 | New member function. | |
12408 | * rtl-ssa/accesses.cc (function_info::remains_available_at_insn): | |
12409 | Likewise. | |
12410 | (function_info::make_use_available): Avoid false negatives for | |
12411 | queries within an EBB. | |
12412 | ||
12413 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12414 | ||
12415 | * rtl-ssa/changes.cc: Include sreal.h. | |
12416 | (rtl_ssa::changes_are_worthwhile): When optimizing for speed, | |
12417 | scale the cost of each instruction by its execution frequency. | |
12418 | ||
12419 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12420 | ||
12421 | * rtl-ssa/access-utils.h (next_call_clobbers): New function. | |
12422 | (is_single_dominating_def, remains_available_on_exit): Replace with... | |
12423 | * rtl-ssa/functions.h (function_info::is_single_dominating_def) | |
12424 | (function_info::remains_available_on_exit): ...these new member | |
12425 | functions. | |
12426 | (function_info::m_clobbered_by_calls): New member variable. | |
12427 | * rtl-ssa/functions.cc (function_info::function_info): Explicitly | |
12428 | initialize m_clobbered_by_calls. | |
12429 | * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update | |
12430 | m_clobbered_by_calls for each call-clobber note. | |
12431 | * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def): | |
12432 | New function. Check for call clobbers. | |
12433 | * rtl-ssa/accesses.cc (function_info::remains_available_on_exit): | |
12434 | Likewise. | |
12435 | ||
12436 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12437 | ||
12438 | * rtl-ssa/internals.h (build_info::exit_block_dominator): New | |
12439 | member variable. | |
12440 | * rtl-ssa/blocks.cc (build_info::build_info): Initialize it. | |
12441 | (bb_walker::bb_walker): Use it, moving the computation of the | |
12442 | dominator to... | |
12443 | (function_info::process_all_blocks): ...here. | |
12444 | (function_info::place_phis): Add dominance frontiers for the | |
12445 | exit block. | |
12446 | ||
12447 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12448 | ||
12449 | * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def): | |
12450 | New member function. | |
12451 | * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def): | |
12452 | Likewise. | |
12453 | (function_info::change_insns): Use it. | |
12454 | ||
12455 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12456 | ||
12457 | * rtl-ssa/changes.cc (function_info::finalize_new_accesses): | |
12458 | If a change describes a set of memory, ensure that that set | |
12459 | is kept, regardless of the insn pattern. | |
12460 | ||
12461 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12462 | ||
12463 | * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove | |
12464 | call to add_reg_unused_notes and instead... | |
12465 | (function_info::change_insns): ...use a separate loop here. | |
12466 | ||
12467 | 2023-10-25 Richard Sandiford <richard.sandiford@arm.com> | |
12468 | ||
12469 | * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force | |
12470 | global registers to be live on exit. Handle any block with zero | |
12471 | successors like an exit block. | |
12472 | ||
12473 | 2023-10-25 Thomas Schwinge <thomas@codesourcery.com> | |
12474 | ||
12475 | * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1): | |
12476 | Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'. | |
12477 | * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for | |
12478 | 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'. | |
12479 | ||
12480 | 2023-10-25 Thomas Schwinge <thomas@codesourcery.com> | |
12481 | ||
12482 | * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after | |
12483 | 'OMP_CLAUSE_IF'. | |
12484 | * tree-pretty-print.cc (dump_omp_clause): Adjust. | |
12485 | * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise. | |
12486 | * tree.h: Likewise. | |
12487 | ||
12488 | 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12489 | ||
12490 | * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v | |
12491 | (tail_agnostic_p): Ditto. | |
12492 | (validate_change_or_fail): Ditto. | |
12493 | (nonvlmax_avl_type_p): Ditto. | |
12494 | (vlmax_avl_p): Ditto. | |
12495 | (get_sew): Ditto. | |
12496 | (enum vlmul_type): Ditto. | |
12497 | (count_regno_occurrences): Ditto. | |
12498 | * config/riscv/riscv-v.cc (has_vl_op): Ditto. | |
12499 | (get_default_ta): Ditto. | |
12500 | (tail_agnostic_p): Ditto. | |
12501 | (validate_change_or_fail): Ditto. | |
12502 | (nonvlmax_avl_type_p): Ditto. | |
12503 | (vlmax_avl_p): Ditto. | |
12504 | (get_sew): Ditto. | |
12505 | (enum vlmul_type): Ditto. | |
12506 | (get_vlmul): Ditto. | |
12507 | (count_regno_occurrences): Ditto. | |
12508 | * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto. | |
12509 | (has_vl_op): Ditto. | |
12510 | (get_sew): Ditto. | |
12511 | (get_vlmul): Ditto. | |
12512 | (get_default_ta): Ditto. | |
12513 | (tail_agnostic_p): Ditto. | |
12514 | (count_regno_occurrences): Ditto. | |
12515 | (validate_change_or_fail): Ditto. | |
12516 | ||
12517 | 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com> | |
12518 | ||
12519 | * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case. | |
12520 | (gimplify_adjust_omp_clauses): Likewise. | |
12521 | * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code, | |
12522 | * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case. | |
12523 | * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum. | |
12524 | * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF | |
12525 | case. | |
12526 | (convert_local_omp_clauses): Likewise. | |
12527 | * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case. | |
12528 | * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry. | |
12529 | (omp_clause_code_name): Likewise. | |
12530 | * tree.h (OMP_CLAUSE_SELF_EXPR): New macro. | |
12531 | ||
12532 | 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12533 | ||
12534 | * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function. | |
12535 | * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto. | |
12536 | * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function. | |
12537 | * config/riscv/vector.md: Change avl_type into avl_type_idx. | |
12538 | ||
12539 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12540 | ||
12541 | * recog.cc (constrain_operands): Remove UNARY_P handling. | |
12542 | * reload.cc (find_reloads): Likewise. | |
12543 | ||
12544 | 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com> | |
12545 | ||
12546 | * gcov-io.h: Fix record length encoding in comment. | |
12547 | ||
12548 | 2023-10-24 Roger Sayle <roger@nextmovesoftware.com> | |
12549 | ||
12550 | * config/i386/i386-features.cc (compute_convert_gain): Provide | |
12551 | more accurate values (sizes) for inter-unit moves with -Os. | |
12552 | ||
12553 | 2023-10-24 Roger Sayle <roger@nextmovesoftware.com> | |
12554 | Claudiu Zissulescu <claziss@gmail.com> | |
12555 | ||
12556 | * config/arc/arc-protos.h (output_shift): Rename to... | |
12557 | (output_shift_loop): Tweak API to take an explicit rtx_code. | |
12558 | (arc_split_ashl): Prototype new function here. | |
12559 | (arc_split_ashr): Likewise. | |
12560 | (arc_split_lshr): Likewise. | |
12561 | (arc_split_rotl): Likewise. | |
12562 | (arc_split_rotr): Likewise. | |
12563 | * config/arc/arc.cc (output_shift): Delete local prototype. Rename. | |
12564 | (output_shift_loop): New function replacing output_shift to output | |
12565 | a zero overheap loop for SImode shifts and rotates on ARC targets | |
12566 | without barrel shifter (i.e. no hardware support for these insns). | |
12567 | (arc_split_ashl): New helper function to split *ashlsi3_nobs. | |
12568 | (arc_split_ashr): New helper function to split *ashrsi3_nobs. | |
12569 | (arc_split_lshr): New helper function to split *lshrsi3_nobs. | |
12570 | (arc_split_rotl): New helper function to split *rotlsi3_nobs. | |
12571 | (arc_split_rotr): New helper function to split *rotrsi3_nobs. | |
12572 | (arc_print_operand): Correct whitespace. | |
12573 | (arc_rtx_costs): Likewise. | |
12574 | (hwloop_optimize): Likewise. | |
12575 | * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator. | |
12576 | (define_code_attr insn): New code attribute to map to pattern name. | |
12577 | (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3, | |
12578 | ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3. | |
12579 | (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that | |
12580 | unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs. | |
12581 | We now call arc_split_<insn> in arc.cc to implement each split. | |
12582 | (shift_si3): Delete define_insn, all shifts/rotates are now split. | |
12583 | (shift_si3_loop): Rename to... | |
12584 | (<insn>si3_loop): define_insn to handle loop implementations of | |
12585 | SImode shifts and rotates, calling ouput_shift_loop for template. | |
12586 | (rotrsi3): Rename to... | |
12587 | (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror. | |
12588 | (*rotlsi3): New define_insn_and_split to transform left rotates | |
12589 | into right rotates before reload. | |
12590 | (rotlsi3_cnt1): New define_insn_and_split to implement a left | |
12591 | rotate by one bit using an add.f followed by an adc. | |
12592 | * config/arc/predicates.md (shiftr4_operator): Delete. | |
12593 | ||
12594 | 2023-10-24 Claudiu Zissulescu <claziss@gmail.com> | |
12595 | ||
12596 | * config/arc/arc.md (mulsi3_700): Update pattern. | |
12597 | (mulsi3_v2): Likewise. | |
12598 | * config/arc/predicates.md (mpy_dest_reg_operand): Remove it. | |
12599 | ||
12600 | 2023-10-24 Andrew Pinski <pinskia@gmail.com> | |
12601 | ||
12602 | PR tree-optimization/104376 | |
12603 | PR tree-optimization/101541 | |
12604 | * tree-ssa-phiopt.cc (factor_out_conditional_operation): | |
12605 | Allow nop conversions even if it is defined by a statement | |
12606 | inside the conditional. | |
12607 | ||
12608 | 2023-10-24 Andrew Pinski <pinskia@gmail.com> | |
12609 | ||
12610 | PR tree-optimization/111913 | |
12611 | * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting | |
12612 | type for popcount. | |
12613 | ||
12614 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12615 | ||
12616 | * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check | |
12617 | whether the requested phi already exists. | |
12618 | ||
12619 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12620 | ||
12621 | * rtl-ssa.h: Include cfgbuild.h. | |
12622 | * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the | |
12623 | more comprehensive control_flow_insn_p. | |
12624 | ||
12625 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12626 | ||
12627 | * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check | |
12628 | whether an insn has been replaced by a note. | |
12629 | ||
12630 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12631 | ||
12632 | * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null | |
12633 | m_first_use. | |
12634 | ||
12635 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12636 | ||
12637 | * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the | |
12638 | destination to be wider than the sources. Take the mode from the | |
12639 | first source. | |
12640 | (ix86_expand_sse_extend): Pass the destination directly to | |
12641 | ix86_split_mmx_punpck, rather than using a fresh register that | |
12642 | is half the size. | |
12643 | ||
12644 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12645 | ||
12646 | * config/i386/predicates.md (aeswidekl_operation): Protect | |
12647 | REGNO check with REG_P. | |
12648 | ||
12649 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12650 | ||
12651 | * config/aarch64/aarch64.cc (aarch64_insn_cost): New function. | |
12652 | (TARGET_INSN_COST): Define. | |
12653 | ||
12654 | 2023-10-24 Richard Sandiford <richard.sandiford@arm.com> | |
12655 | ||
12656 | * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require | |
12657 | !TARGET_LSE. | |
12658 | ||
12659 | 2023-10-24 xuli <xuli1@eswincomputing.com> | |
12660 | ||
12661 | PR target/111935 | |
12662 | * config/riscv/riscv-vector-builtins-bases.cc: fix bug. | |
12663 | ||
12664 | 2023-10-24 Mark Harmstone <mark@harmstone.com> | |
12665 | ||
12666 | * opts.cc (debug_type_names): Remove stabs and xcoff. | |
12667 | (df_set_names): Adjust. | |
12668 | ||
12669 | 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12670 | ||
12671 | PR target/111947 | |
12672 | * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check. | |
12673 | ||
12674 | 2023-10-23 Lewis Hyatt <lhyatt@gmail.com> | |
12675 | ||
12676 | PR preprocessor/36887 | |
12677 | * toplev.h (ident_hash_extra): Declare... | |
12678 | * stringpool.cc (ident_hash_extra): ...this new global variable. | |
12679 | (init_stringpool): Handle ident_hash_extra as well as ident_hash. | |
12680 | (ggc_mark_stringpool): Likewise. | |
12681 | (ggc_purge_stringpool): Likewise. | |
12682 | (struct string_pool_data_extra): New struct. | |
12683 | (spd2): New GC root variable. | |
12684 | (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra, | |
12685 | analogous to how spd is used to handle ident_hash. | |
12686 | (gt_pch_restore_stringpool): Likewise. | |
12687 | ||
12688 | 2023-10-23 Robin Dapp <rdapp@ventanamicro.com> | |
12689 | ||
12690 | PR tree-optimization/111794 | |
12691 | * tree-vect-stmts.cc (vectorizable_assignment): Add | |
12692 | same-precision exception for dest and source. | |
12693 | ||
12694 | 2023-10-23 Robin Dapp <rdapp@ventanamicro.com> | |
12695 | ||
12696 | * config/riscv/autovec.md (popcount<mode>2): New expander. | |
12697 | * config/riscv/riscv-protos.h (expand_popcount): Define. | |
12698 | * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount | |
12699 | with the WWG algorithm. | |
12700 | ||
12701 | 2023-10-23 Richard Biener <rguenther@suse.de> | |
12702 | ||
12703 | PR tree-optimization/111916 | |
12704 | * tree-sra.cc (sra_modify_assign): Do not lower all | |
12705 | BIT_FIELD_REF reads that are sra_handled_bf_read_p. | |
12706 | ||
12707 | 2023-10-23 Richard Biener <rguenther@suse.de> | |
12708 | ||
12709 | PR tree-optimization/111915 | |
12710 | * tree-vect-slp.cc (vect_build_slp_tree_1): Check all | |
12711 | accesses are either grouped or not. | |
12712 | ||
12713 | 2023-10-23 Richard Biener <rguenther@suse.de> | |
12714 | ||
12715 | PR ipa/111914 | |
12716 | * tree-inline.cc (setup_one_parameter): Move code emitting | |
12717 | a dummy load when not optimizing ... | |
12718 | (initialize_inlined_parameters): ... here to after when | |
12719 | we remapped the parameter type. | |
12720 | ||
12721 | 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org> | |
12722 | ||
12723 | PR target/111001 | |
12724 | * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg): | |
12725 | Skip over nop move insns. | |
12726 | ||
12727 | 2023-10-23 Tamar Christina <tamar.christina@arm.com> | |
12728 | ||
12729 | PR tree-optimization/111860 | |
12730 | * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): | |
12731 | Drop .MEM nodes only. | |
12732 | ||
12733 | 2023-10-23 Andrew Pinski <apinski@marvell.com> | |
12734 | ||
12735 | * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`): | |
12736 | New patterns. | |
12737 | ||
12738 | 2023-10-23 Andrew Pinski <pinskia@gmail.com> | |
12739 | ||
12740 | * convert.cc (convert_to_pointer_1): Return error_mark_node | |
12741 | after an error. | |
12742 | (convert_to_real_1): Likewise. | |
12743 | (convert_to_integer_1): Likewise. | |
12744 | (convert_to_complex_1): Likewise. | |
12745 | ||
12746 | 2023-10-23 Andrew Pinski <pinskia@gmail.com> | |
12747 | ||
12748 | PR c/111903 | |
12749 | * convert.cc (convert_to_complex_1): Return | |
12750 | error_mark_node if either convert was an error | |
12751 | when converting from a scalar. | |
12752 | ||
12753 | 2023-10-23 Richard Biener <rguenther@suse.de> | |
12754 | ||
12755 | PR tree-optimization/111917 | |
12756 | * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert | |
12757 | new conditional after last stmt. | |
12758 | ||
12759 | 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12760 | ||
12761 | PR target/111927 | |
12762 | * config/riscv/riscv-vsetvl.cc: Fix bug. | |
12763 | ||
12764 | 2023-10-23 Pan Li <pan2.li@intel.com> | |
12765 | ||
12766 | * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type | |
12767 | arg. | |
12768 | (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz. | |
12769 | ||
12770 | 2023-10-23 Xi Ruoyao <xry111@xry111.site> | |
12771 | ||
12772 | * doc/invoke.texi (-mexplicit-relocs=style): Document. | |
12773 | (-mexplicit-relocs): Document as an alias of | |
12774 | -mexplicit-relocs=always. | |
12775 | (-mno-explicit-relocs): Document as an alias of | |
12776 | -mexplicit-relocs=none. | |
12777 | (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of | |
12778 | -mexplicit-relocs. | |
12779 | ||
12780 | 2023-10-23 Xi Ruoyao <xry111@xry111.site> | |
12781 | ||
12782 | * config/loongarch/predicates.md (symbolic_pcrel_operand): New | |
12783 | predicate. | |
12784 | * config/loongarch/loongarch.md (define_peephole2): Optimize | |
12785 | la.local + ld/st to pcalau12i + ld/st if the address is only used | |
12786 | once if -mexplicit-relocs=auto and -mcmodel=normal or medium. | |
12787 | ||
12788 | 2023-10-23 Xi Ruoyao <xry111@xry111.site> | |
12789 | ||
12790 | * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p): | |
12791 | Return true for TLS symbol types if -mexplicit-relocs=auto. | |
12792 | (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS | |
12793 | with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE. | |
12794 | (loongarch_legitimize_tls_address): Likewise. | |
12795 | * config/loongarch/loongarch.md (@tls_low<mode>): Remove | |
12796 | TARGET_EXPLICIT_RELOCS from insn condition. | |
12797 | ||
12798 | 2023-10-23 Xi Ruoyao <xry111@xry111.site> | |
12799 | ||
12800 | * config/loongarch/loongarch-protos.h | |
12801 | (loongarch_explicit_relocs_p): Declare new function. | |
12802 | * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p): | |
12803 | Implement. | |
12804 | (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for | |
12805 | SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS. | |
12806 | (loongarch_split_symbol): Call loongarch_explicit_relocs_p for | |
12807 | deciding if return early, instead of using | |
12808 | TARGET_EXPLICIT_RELOCS. | |
12809 | (loongarch_output_move): CAll loongarch_explicit_relocs_p | |
12810 | instead of using TARGET_EXPLICIT_RELOCS. | |
12811 | * config/loongarch/loongarch.md (*low<mode>): Remove | |
12812 | TARGET_EXPLICIT_RELOCS from insn condition. | |
12813 | (@ld_from_got<mode>): Likewise. | |
12814 | * config/loongarch/predicates.md (move_operand): Call | |
12815 | loongarch_explicit_relocs_p instead of using | |
12816 | TARGET_EXPLICIT_RELOCS. | |
12817 | ||
12818 | 2023-10-23 Xi Ruoyao <xry111@xry111.site> | |
12819 | ||
12820 | * config/loongarch/genopts/loongarch-strings: Add strings for | |
12821 | -mexplicit-relocs={auto,none,always}. | |
12822 | * config/loongarch/genopts/loongarch.opt.in: Add options for | |
12823 | -mexplicit-relocs={auto,none,always}. | |
12824 | * config/loongarch/loongarch-str.h: Regenerate. | |
12825 | * config/loongarch/loongarch.opt: Regenerate. | |
12826 | * config/loongarch/loongarch-def.h | |
12827 | (EXPLICIT_RELOCS_AUTO): Define. | |
12828 | (EXPLICIT_RELOCS_NONE): Define. | |
12829 | (EXPLICIT_RELOCS_ALWAYS): Define. | |
12830 | (N_EXPLICIT_RELOCS_TYPES): Define. | |
12831 | * config/loongarch/loongarch.cc | |
12832 | (loongarch_option_override_internal): Error out if the old-style | |
12833 | -m[no-]explicit-relocs option is used with | |
12834 | -mexplicit-relocs={auto,none,always} together. Map | |
12835 | -mno-explicit-relocs to -mexplicit-relocs=none and | |
12836 | -mexplicit-relocs to -mexplicit-relocs=always for backward | |
12837 | compatibility. Set a proper default for -mexplicit-relocs= | |
12838 | based on configure-time probed linker capability. Update a | |
12839 | diagnostic message to mention -mexplicit-relocs=always instead | |
12840 | of the old-style -mexplicit-relocs. | |
12841 | (loongarch_handle_model_attribute): Update a diagnostic message | |
12842 | to mention -mexplicit-relocs=always instead of the old-style | |
12843 | -mexplicit-relocs. | |
12844 | * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define. | |
12845 | ||
12846 | 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12847 | ||
12848 | * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo. | |
12849 | (pre_vsetvl::pre_global_vsetvl_info): Ditto. | |
12850 | ||
12851 | 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
12852 | ||
12853 | * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>. | |
12854 | ||
12855 | 2023-10-23 Kewen Lin <linkw@linux.ibm.com> | |
12856 | ||
12857 | PR tree-optimization/111784 | |
12858 | * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for | |
12859 | adjacent vector stores, by costing them with the total number | |
12860 | rather than costing them one by one. | |
12861 | (vectorizable_load): Adjust costing way for adjacent vector | |
12862 | loads, by costing them with the total number rather than costing | |
12863 | them one by one. | |
12864 | ||
12865 | 2023-10-23 Haochen Jiang <haochen.jiang@intel.com> | |
12866 | ||
12867 | PR target/111753 | |
12868 | * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p): | |
12869 | Do not split to xmm16+ when !TARGET_AVX512VL. | |
12870 | ||
12871 | 2023-10-23 Pan Li <pan2.li@intel.com> | |
12872 | ||
12873 | * config/riscv/riscv-protos.h (enum insn_type): Add new type | |
12874 | values. | |
12875 | * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge | |
12876 | operand handling. | |
12877 | (expand_vec_ceil): Take MA instead of MU for tmp register. | |
12878 | (expand_vec_floor): Ditto. | |
12879 | (expand_vec_nearbyint): Ditto. | |
12880 | (expand_vec_rint): Ditto. | |
12881 | (expand_vec_round): Ditto. | |
12882 | (expand_vec_roundeven): Ditto. | |
12883 | ||
12884 | 2023-10-23 Lulu Cheng <chenglulu@loongson.cn> | |
12885 | ||
12886 | * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition. | |
12887 | ||
12888 | 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org> | |
12889 | ||
12890 | PR target/111449 | |
12891 | * expr.cc (can_use_qi_vectors): New function to return true if | |
12892 | we know how to implement OP using vectors of bytes. | |
12893 | (qi_vector_mode_supported_p): New function to check if optabs | |
12894 | exists for the mode and certain by pieces operations. | |
12895 | (widest_fixed_size_mode_for_size): Replace the second argument | |
12896 | with the type of by pieces operations. Call can_use_qi_vectors | |
12897 | and qi_vector_mode_supported_p to do the check. Call | |
12898 | scalar_mode_supported_p to check if the scalar mode is supported. | |
12899 | (by_pieces_ninsns): Pass the type of by pieces operation to | |
12900 | widest_fixed_size_mode_for_size. | |
12901 | (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to | |
12902 | record the type of by pieces operations. | |
12903 | (op_by_pieces_d::op_by_pieces_d): Change last argument to the | |
12904 | type of by pieces operations, initialize m_op with it. Pass | |
12905 | m_op to function widest_fixed_size_mode_for_size. | |
12906 | (op_by_pieces_d::get_usable_mode): Pass m_op to function | |
12907 | widest_fixed_size_mode_for_size. | |
12908 | (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call | |
12909 | can_use_qi_vectors and qi_vector_mode_supported_p to do the | |
12910 | check. | |
12911 | (op_by_pieces_d::run): Pass m_op to function | |
12912 | widest_fixed_size_mode_for_size. | |
12913 | (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES. | |
12914 | (store_by_pieces_d::store_by_pieces_d): Set m_op with the op. | |
12915 | (can_store_by_pieces): Pass the type of by pieces operations to | |
12916 | widest_fixed_size_mode_for_size. | |
12917 | (clear_by_pieces): Initialize class store_by_pieces_d with | |
12918 | CLEAR_BY_PIECES. | |
12919 | (compare_by_pieces_d::compare_by_pieces_d): Set m_op to | |
12920 | COMPARE_BY_PIECES. | |
12921 | ||
12922 | 2023-10-23 liuhongt <hongtao.liu@intel.com> | |
12923 | ||
12924 | PR tree-optimization/111820 | |
12925 | PR tree-optimization/111833 | |
12926 | * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give | |
12927 | up vectorization for nonlinear iv vect_step_op_mul when | |
12928 | step_expr is not exact_log2 and niters is greater than | |
12929 | TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize | |
12930 | for nagative niters_skip which will be used by fully masked | |
12931 | loop. | |
12932 | (vect_can_advance_ivs_p): Pass whole phi_info to | |
12933 | vect_can_peel_nonlinear_iv_p. | |
12934 | * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize | |
12935 | init_expr * pow (step_expr, skipn) to init_expr | |
12936 | << (log2 (step_expr) * skipn) when step_expr is exact_log2. | |
12937 | ||
12938 | 2023-10-23 liuhongt <hongtao.liu@intel.com> | |
12939 | ||
12940 | * config/i386/mmx.md (mmx_pinsrw): Remove. | |
12941 | ||
12942 | 2023-10-22 Andrew Pinski <pinskia@gmail.com> | |
12943 | ||
12944 | PR target/110986 | |
12945 | * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern. | |
12946 | (*cmov_uxtw_insn_insv): Likewise. | |
12947 | ||
12948 | 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> | |
12949 | ||
12950 | * doc/invoke.texi: Document the new -nodefaultrpaths option. | |
12951 | * doc/install.texi: Document the new --with-darwin-extra-rpath | |
12952 | option. | |
12953 | ||
12954 | 2023-10-22 Iain Sandoe <iain@sandoe.co.uk> | |
12955 | ||
12956 | * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp. | |
12957 | ||
12958 | 2023-10-22 Iain Sandoe <iain@sandoe.co.uk> | |
12959 | ||
12960 | * configure.ac: Add --with-darwin-extra-rpath option. | |
12961 | * config/darwin.h: Handle DARWIN_EXTRA_RPATH. | |
12962 | * config.in: Regenerate. | |
12963 | * configure: Regenerate. | |
12964 | ||
12965 | 2023-10-22 Iain Sandoe <iain@sandoe.co.uk> | |
12966 | ||
12967 | * aclocal.m4: Regenerate. | |
12968 | * configure: Regenerate. | |
12969 | * configure.ac: Handle Darwin rpaths. | |
12970 | * config/darwin.h: Handle Darwin rpaths. | |
12971 | * config/darwin.opt: Handle Darwin rpaths. | |
12972 | * Makefile.in: Handle Darwin rpaths. | |
12973 | ||
12974 | 2023-10-22 Iain Sandoe <iain@sandoe.co.uk> | |
12975 | ||
12976 | * gcc.cc (RUNPATH_OPTION): New. | |
12977 | (do_spec_1): Provide '%P' as a spec to insert rpaths for | |
12978 | each compiler startfile path. | |
12979 | ||
12980 | 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com> | |
12981 | Maxim Blinov <maxim.blinov@embecosm.com> | |
12982 | Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> | |
12983 | Iain Sandoe <iain@sandoe.co.uk> | |
12984 | ||
12985 | * config.gcc: Default to heap trampolines on macOS 11 and above. | |
12986 | * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST. | |
12987 | * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST. | |
12988 | * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST. | |
12989 | ||
12990 | 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com> | |
12991 | Maxim Blinov <maxim.blinov@embecosm.com> | |
12992 | Iain Sandoe <iain@sandoe.co.uk> | |
12993 | Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> | |
12994 | ||
12995 | * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define. | |
12996 | (BUILT_IN_NESTED_PTR_DELETED): Ditto. | |
12997 | * common.opt (ftrampoline-impl): Add option to control | |
12998 | generation of trampoline instantiation (heap or stack). | |
12999 | * coretypes.h: Define enum trampoline_impl. | |
13000 | * tree-nested.cc (convert_tramp_reference_op): Don't bother calling | |
13001 | __builtin_adjust_trampoline for heap trampolines. | |
13002 | (finalize_nesting_tree_1): Emit calls to | |
13003 | __builtin_nested_...{created,deleted} if we're generating with | |
13004 | -ftrampoline-impl=heap. | |
13005 | * tree.cc (build_common_builtin_nodes): Build | |
13006 | __builtin_nested_...{created,deleted}. | |
13007 | * doc/invoke.texi (-ftrampoline-impl): Document. | |
13008 | ||
13009 | 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com> | |
13010 | ||
13011 | * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): | |
13012 | Prohibit 'E' and 'H' combinations. | |
13013 | ||
13014 | 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com> | |
13015 | ||
13016 | * common/config/riscv/riscv-common.cc (riscv_ext_version_table): | |
13017 | Change version number of the 'Zfa' extension to 1.0. | |
13018 | ||
13019 | 2023-10-21 Pan Li <pan2.li@intel.com> | |
13020 | ||
13021 | PR target/111857 | |
13022 | * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove. | |
13023 | * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl. | |
13024 | * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace | |
13025 | macro reference to func. | |
13026 | (vls_mode_valid_p): New func impl for vls mode valid or not. | |
13027 | * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace | |
13028 | macro reference to func. | |
13029 | * config/riscv/vector-iterators.md: Ditto. | |
13030 | ||
13031 | 2023-10-20 Roger Sayle <roger@nextmovesoftware.com> | |
13032 | Uros Bizjak <ubizjak@gmail.com> | |
13033 | ||
13034 | PR middle-end/101955 | |
13035 | PR tree-optimization/106245 | |
13036 | * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split. | |
13037 | ||
13038 | 2023-10-20 David Edelsohn <dje.gcc@gmail.com> | |
13039 | ||
13040 | * gimple-harden-control-flow.cc: Include memmodel.h. | |
13041 | ||
13042 | 2023-10-20 David Edelsohn <dje.gcc@gmail.com> | |
13043 | ||
13044 | * gimple-harden-control-flow.cc: Include tm_p.h. | |
13045 | ||
13046 | 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13047 | ||
13048 | PR tree-optimization/111882 | |
13049 | * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields | |
13050 | with non-constant offsets. | |
13051 | ||
13052 | 2023-10-20 Tamar Christina <tamar.christina@arm.com> | |
13053 | ||
13054 | PR tree-optimization/111866 | |
13055 | * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to | |
13056 | vect_set_loop_condition during prolog peeling. | |
13057 | ||
13058 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13059 | ||
13060 | PR tree-optimization/111445 | |
13061 | * tree-scalar-evolution.cc (simple_iv_with_niters): | |
13062 | Add missing check for a sign-conversion. | |
13063 | ||
13064 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13065 | ||
13066 | PR tree-optimization/110243 | |
13067 | PR tree-optimization/111336 | |
13068 | * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite | |
13069 | operations with undefined behavior on overflow to | |
13070 | unsigned arithmetic. | |
13071 | ||
13072 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13073 | ||
13074 | PR tree-optimization/111891 | |
13075 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix | |
13076 | assert. | |
13077 | ||
13078 | 2023-10-20 Andrew Stubbs <ams@codesourcery.com> | |
13079 | ||
13080 | * config.gcc: Allow --with-arch=gfx1030. | |
13081 | * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack. | |
13082 | (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set. | |
13083 | * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030. | |
13084 | (TARGET_GFX1030): New. | |
13085 | (TARGET_RDNA2): New. | |
13086 | * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2. | |
13087 | (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant. | |
13088 | (subc<mode>3<exec_vcc>): Likewise. | |
13089 | (<convop><mode><vndi>2_exec): Add RDNA2 alternatives. | |
13090 | (vec_cmp<mode>di): Likewise. | |
13091 | (vec_cmp<u><mode>di): Likewise. | |
13092 | (vec_cmp<mode>di_exec): Likewise. | |
13093 | (vec_cmp<u><mode>di_exec): Likewise. | |
13094 | (vec_cmp<mode>di_dup): Likewise. | |
13095 | (vec_cmp<mode>di_dup_exec): Likewise. | |
13096 | (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2. | |
13097 | (*<reduc_op>_dpp_shr_<mode>): Likewise. | |
13098 | (*plus_carry_dpp_shr_<mode>): Likewise. | |
13099 | (*plus_carry_in_dpp_shr_<mode>): Likewise. | |
13100 | * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030. | |
13101 | (gcn_global_address_p): RDNA2 only allows smaller offsets. | |
13102 | (gcn_addr_space_legitimate_address_p): Likewise. | |
13103 | (gcn_omp_device_kind_arch_isa): Recognise gfx1030. | |
13104 | (gcn_expand_epilogue): Use VGPRs instead of SGPRs. | |
13105 | (output_file_start): Configure gfx1030. | |
13106 | * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__; | |
13107 | (ASSEMBLER_DIALECT): New. | |
13108 | * config/gcn/gcn.md (rdna): New define_attr. | |
13109 | (enabled): Use "rdna" attribute. | |
13110 | (gcn_return): Remove s_dcache_wb. | |
13111 | (addcsi3_scalar): Add RDNA2 syntax variant. | |
13112 | (addcsi3_scalar_zero): Likewise. | |
13113 | (addptrdi3): Likewise. | |
13114 | (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA. | |
13115 | (*memory_barrier): Add RDNA2 syntax variant. | |
13116 | (atomic_load<mode>): Add RDNA2 cache control variants, and disable | |
13117 | scalar atomics for RDNA2. | |
13118 | (atomic_store<mode>): Likewise. | |
13119 | (atomic_exchange<mode>): Likewise. | |
13120 | * config/gcn/gcn.opt (gpu_type): Add gfx1030. | |
13121 | * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New. | |
13122 | (main): Recognise -march=gfx1030. | |
13123 | * config/gcn/t-omp-device: Add gfx1030 isa. | |
13124 | ||
13125 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13126 | ||
13127 | PR tree-optimization/111000 | |
13128 | * stor-layout.h (element_precision): Move .. | |
13129 | * tree.h (element_precision): .. here. | |
13130 | * tree-ssa-loop-im.cc (movement_possibility_1): Restrict | |
13131 | motion of shifts and rotates. | |
13132 | ||
13133 | 2023-10-20 Alexandre Oliva <oliva@adacore.com> | |
13134 | ||
13135 | * tree-core.h (ECF_XTHROW): New macro. | |
13136 | * tree.cc (set_call_expr): Add expected_throw attribute when | |
13137 | ECF_XTHROW is set. | |
13138 | (build_common_builtin_node): Add ECF_XTHROW to | |
13139 | __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume. | |
13140 | * calls.cc (flags_from_decl_or_type): Check for expected_throw | |
13141 | attribute to set ECF_XTHROW. | |
13142 | * gimple.cc (gimple_build_call_from_tree): Propagate | |
13143 | ECF_XTHROW from decl flags to gimple call... | |
13144 | (gimple_call_flags): ... and back. | |
13145 | * gimple.h (GF_CALL_XTHROW): New gf_mask flag. | |
13146 | (gimple_call_set_expected_throw): New. | |
13147 | (gimple_call_expected_throw_p): New. | |
13148 | * Makefile.in (OBJS): Add gimple-harden-control-flow.o. | |
13149 | * builtins.def (BUILT_IN___HARDCFR_CHECK): New. | |
13150 | * common.opt (fharden-control-flow-redundancy): New. | |
13151 | (-fhardcfr-check-returning-calls): New. | |
13152 | (-fhardcfr-check-exceptions): New. | |
13153 | (-fhardcfr-check-noreturn-calls=*): New. | |
13154 | (Enum hardcfr_check_noreturn_calls): New. | |
13155 | (fhardcfr-skip-leaf): New. | |
13156 | * doc/invoke.texi: Document them. | |
13157 | (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params. | |
13158 | * flag-types.h (enum hardcfr_noret): New. | |
13159 | * gimple-harden-control-flow.cc: New. | |
13160 | * params.opt (-param=hardcfr-max-blocks=): New. | |
13161 | (-param=hradcfr-max-inline-blocks=): New. | |
13162 | * passes.def (pass_harden_control_flow_redundancy): Add. | |
13163 | * tree-pass.h (make_pass_harden_control_flow_redundancy): | |
13164 | Declare. | |
13165 | * doc/extend.texi: Document expected_throw attribute. | |
13166 | ||
13167 | 2023-10-20 Alex Coplan <alex.coplan@arm.com> | |
13168 | ||
13169 | * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call | |
13170 | ::remove_insn on deleted insns. | |
13171 | ||
13172 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13173 | ||
13174 | * doc/generic.texi ({L,R}ROTATE_EXPR): Document. | |
13175 | ||
13176 | 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org> | |
13177 | ||
13178 | PR target/101177 | |
13179 | * config/sh/sh.md (unnamed split pattern): Fix comparison of | |
13180 | find_regno_note result. | |
13181 | ||
13182 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13183 | ||
13184 | * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite | |
13185 | both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER | |
13186 | stmt refs. | |
13187 | ||
13188 | 2023-10-20 Richard Biener <rguenther@suse.de> | |
13189 | ||
13190 | * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map, | |
13191 | off_arg3_arg2_map): New. | |
13192 | (vect_get_operand_map): Get flag whether the stmt was | |
13193 | recognized as gather or scatter and use the above | |
13194 | accordingly. | |
13195 | (vect_get_and_check_slp_defs): Adjust. | |
13196 | (vect_build_slp_tree_2): Likewise. | |
13197 | ||
13198 | 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
13199 | ||
13200 | * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables. | |
13201 | (pre_vsetvl::pre_global_vsetvl_info): Ditto. | |
13202 | (pre_vsetvl::emit_vsetvl): Ditto. | |
13203 | ||
13204 | 2023-10-20 Tamar Christina <tamar.christina@arm.com> | |
13205 | Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13206 | ||
13207 | * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ... | |
13208 | (get_loop_body_if_conv_order): ... to here. | |
13209 | (if_convertible_loop_p): Remove single_exit check. | |
13210 | (tree_if_conversion): Move single_exit check to if-conversion part and | |
13211 | support multiple exits. | |
13212 | ||
13213 | 2023-10-20 Tamar Christina <tamar.christina@arm.com> | |
13214 | Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13215 | ||
13216 | * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE | |
13217 | from original statement. | |
13218 | (vect_recog_bitfield_ref_pattern): Support bitfields in gcond. | |
13219 | ||
13220 | 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
13221 | ||
13222 | PR target/111848 | |
13223 | * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest. | |
13224 | * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter. | |
13225 | ||
13226 | 2023-10-20 Lehua Ding <lehua.ding@rivai.ai> | |
13227 | ||
13228 | PR target/111037 | |
13229 | PR target/111234 | |
13230 | PR target/111725 | |
13231 | * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New. | |
13232 | (debug): Removed. | |
13233 | (compute_reaching_defintion): New. | |
13234 | (enum vsetvl_type): Moved. | |
13235 | (vlmax_avl_p): Moved. | |
13236 | (enum emit_type): Moved. | |
13237 | (vlmul_to_str): Moved. | |
13238 | (vlmax_avl_insn_p): Removed. | |
13239 | (policy_to_str): Moved. | |
13240 | (loop_basic_block_p): Removed. | |
13241 | (valid_sew_p): Removed. | |
13242 | (vsetvl_insn_p): Moved. | |
13243 | (vsetvl_vtype_change_only_p): Removed. | |
13244 | (after_or_same_p): Removed. | |
13245 | (before_p): Removed. | |
13246 | (anticipatable_occurrence_p): Removed. | |
13247 | (available_occurrence_p): Removed. | |
13248 | (insn_should_be_added_p): Removed. | |
13249 | (get_all_sets): Moved. | |
13250 | (get_same_bb_set): Moved. | |
13251 | (gen_vsetvl_pat): Removed. | |
13252 | (calculate_vlmul): Moved. | |
13253 | (get_max_int_sew): New. | |
13254 | (emit_vsetvl_insn): Removed. | |
13255 | (get_max_float_sew): New. | |
13256 | (eliminate_insn): Removed. | |
13257 | (insert_vsetvl): Removed. | |
13258 | (count_regno_occurrences): Moved. | |
13259 | (get_vl_vtype_info): Removed. | |
13260 | (enum def_type): Moved. | |
13261 | (validate_change_or_fail): Moved. | |
13262 | (change_insn): Removed. | |
13263 | (get_all_real_uses): Moved. | |
13264 | (get_forward_read_vl_insn): Removed. | |
13265 | (get_backward_fault_first_load_insn): Removed. | |
13266 | (change_vsetvl_insn): Removed. | |
13267 | (avl_source_has_vsetvl_p): Removed. | |
13268 | (source_equal_p): Moved. | |
13269 | (calculate_sew): Removed. | |
13270 | (same_equiv_note_p): Moved. | |
13271 | (get_expr_id): New. | |
13272 | (incompatible_avl_p): Removed. | |
13273 | (get_regno): New. | |
13274 | (different_sew_p): Removed. | |
13275 | (get_bb_index): New. | |
13276 | (different_lmul_p): Removed. | |
13277 | (has_no_uses): Moved. | |
13278 | (different_ratio_p): Removed. | |
13279 | (different_tail_policy_p): Removed. | |
13280 | (different_mask_policy_p): Removed. | |
13281 | (possible_zero_avl_p): Removed. | |
13282 | (enum demand_flags): New. | |
13283 | (second_ratio_invalid_for_first_sew_p): Removed. | |
13284 | (second_ratio_invalid_for_first_lmul_p): Removed. | |
13285 | (enum class): New. | |
13286 | (float_insn_valid_sew_p): Removed. | |
13287 | (second_sew_less_than_first_sew_p): Removed. | |
13288 | (first_sew_less_than_second_sew_p): Removed. | |
13289 | (class vsetvl_info): New. | |
13290 | (compare_lmul): Removed. | |
13291 | (second_lmul_less_than_first_lmul_p): Removed. | |
13292 | (second_ratio_less_than_first_ratio_p): Removed. | |
13293 | (DEF_INCOMPATIBLE_COND): Removed. | |
13294 | (greatest_sew): Removed. | |
13295 | (first_sew): Removed. | |
13296 | (second_sew): Removed. | |
13297 | (first_vlmul): Removed. | |
13298 | (second_vlmul): Removed. | |
13299 | (first_ratio): Removed. | |
13300 | (second_ratio): Removed. | |
13301 | (vlmul_for_first_sew_second_ratio): Removed. | |
13302 | (vlmul_for_greatest_sew_second_ratio): Removed. | |
13303 | (ratio_for_second_sew_first_vlmul): Removed. | |
13304 | (class vsetvl_block_info): New. | |
13305 | (DEF_SEW_LMUL_FUSE_RULE): New. | |
13306 | (always_unavailable): Removed. | |
13307 | (avl_unavailable_p): Removed. | |
13308 | (class demand_system): New. | |
13309 | (sew_unavailable_p): Removed. | |
13310 | (lmul_unavailable_p): Removed. | |
13311 | (ge_sew_unavailable_p): Removed. | |
13312 | (ge_sew_lmul_unavailable_p): Removed. | |
13313 | (ge_sew_ratio_unavailable_p): Removed. | |
13314 | (DEF_UNAVAILABLE_COND): Removed. | |
13315 | (same_sew_lmul_demand_p): Removed. | |
13316 | (propagate_avl_across_demands_p): Removed. | |
13317 | (reg_available_p): Removed. | |
13318 | (support_relaxed_compatible_p): Removed. | |
13319 | (demands_can_be_fused_p): Removed. | |
13320 | (earliest_pred_can_be_fused_p): Removed. | |
13321 | (vsetvl_dominated_by_p): Removed. | |
13322 | (avl_info::avl_info): Removed. | |
13323 | (avl_info::single_source_equal_p): Removed. | |
13324 | (avl_info::multiple_source_equal_p): Removed. | |
13325 | (DEF_SEW_LMUL_RULE): New. | |
13326 | (avl_info::operator=): Removed. | |
13327 | (avl_info::operator==): Removed. | |
13328 | (DEF_POLICY_RULE): New. | |
13329 | (avl_info::operator!=): Removed. | |
13330 | (avl_info::has_non_zero_avl): Removed. | |
13331 | (vl_vtype_info::vl_vtype_info): Removed. | |
13332 | (vl_vtype_info::operator==): Removed. | |
13333 | (DEF_AVL_RULE): New. | |
13334 | (vl_vtype_info::operator!=): Removed. | |
13335 | (vl_vtype_info::same_avl_p): Removed. | |
13336 | (vl_vtype_info::same_vtype_p): Removed. | |
13337 | (vl_vtype_info::same_vlmax_p): Removed. | |
13338 | (vector_insn_info::operator>=): Removed. | |
13339 | (vector_insn_info::operator==): Removed. | |
13340 | (class pre_vsetvl): New. | |
13341 | (vector_insn_info::parse_insn): Removed. | |
13342 | (vector_insn_info::compatible_p): Removed. | |
13343 | (vector_insn_info::skip_avl_compatible_p): Removed. | |
13344 | (vector_insn_info::compatible_avl_p): Removed. | |
13345 | (vector_insn_info::compatible_vtype_p): Removed. | |
13346 | (vector_insn_info::available_p): Removed. | |
13347 | (vector_insn_info::fuse_avl): Removed. | |
13348 | (vector_insn_info::fuse_sew_lmul): Removed. | |
13349 | (vector_insn_info::fuse_tail_policy): Removed. | |
13350 | (vector_insn_info::fuse_mask_policy): Removed. | |
13351 | (vector_insn_info::local_merge): Removed. | |
13352 | (vector_insn_info::global_merge): Removed. | |
13353 | (vector_insn_info::get_avl_or_vl_reg): Removed. | |
13354 | (vector_insn_info::update_fault_first_load_avl): Removed. | |
13355 | (vector_insn_info::dump): Removed. | |
13356 | (vector_infos_manager::vector_infos_manager): Removed. | |
13357 | (vector_infos_manager::create_expr): Removed. | |
13358 | (vector_infos_manager::get_expr_id): Removed. | |
13359 | (vector_infos_manager::all_same_ratio_p): Removed. | |
13360 | (vector_infos_manager::all_avail_in_compatible_p): Removed. | |
13361 | (vector_infos_manager::all_same_avl_p): Removed. | |
13362 | (vector_infos_manager::expr_set_num): Removed. | |
13363 | (vector_infos_manager::release): Removed. | |
13364 | (vector_infos_manager::create_bitmap_vectors): Removed. | |
13365 | (vector_infos_manager::free_bitmap_vectors): Removed. | |
13366 | (vector_infos_manager::dump): Removed. | |
13367 | (class pass_vsetvl): Adjust. | |
13368 | (pass_vsetvl::get_vector_info): Removed. | |
13369 | (pass_vsetvl::get_block_info): Removed. | |
13370 | (pass_vsetvl::update_vector_info): Removed. | |
13371 | (pass_vsetvl::update_block_info): Removed. | |
13372 | (pre_vsetvl::compute_avl_def_data): New. | |
13373 | (pass_vsetvl::simple_vsetvl): Removed. | |
13374 | (pass_vsetvl::compute_local_backward_infos): Removed. | |
13375 | (pass_vsetvl::need_vsetvl): Removed. | |
13376 | (pass_vsetvl::transfer_before): Removed. | |
13377 | (pass_vsetvl::transfer_after): Removed. | |
13378 | (pre_vsetvl::compute_vsetvl_def_data): New. | |
13379 | (pass_vsetvl::emit_local_forward_vsetvls): Removed. | |
13380 | (pass_vsetvl::prune_expressions): Removed. | |
13381 | (pass_vsetvl::compute_local_properties): Removed. | |
13382 | (pre_vsetvl::compute_lcm_local_properties): New. | |
13383 | (pass_vsetvl::earliest_fusion): Removed. | |
13384 | (pre_vsetvl::fuse_local_vsetvl_info): New. | |
13385 | (pass_vsetvl::vsetvl_fusion): Removed. | |
13386 | (pass_vsetvl::can_refine_vsetvl_p): Removed. | |
13387 | (pre_vsetvl::earliest_fuse_vsetvl_info): New. | |
13388 | (pass_vsetvl::refine_vsetvls): Removed. | |
13389 | (pass_vsetvl::cleanup_vsetvls): Removed. | |
13390 | (pass_vsetvl::commit_vsetvls): Removed. | |
13391 | (pass_vsetvl::pre_vsetvl): Removed. | |
13392 | (pass_vsetvl::get_vsetvl_at_end): Removed. | |
13393 | (local_avl_compatible_p): Removed. | |
13394 | (pass_vsetvl::local_eliminate_vsetvl_insn): Removed. | |
13395 | (pre_vsetvl::pre_global_vsetvl_info): New. | |
13396 | (get_first_vsetvl_before_rvv_insns): Removed. | |
13397 | (pass_vsetvl::global_eliminate_vsetvl_insn): Removed. | |
13398 | (pre_vsetvl::emit_vsetvl): New. | |
13399 | (pass_vsetvl::ssa_post_optimization): Removed. | |
13400 | (pre_vsetvl::cleaup): New. | |
13401 | (pre_vsetvl::remove_avl_operand): New. | |
13402 | (pass_vsetvl::df_post_optimization): Removed. | |
13403 | (pre_vsetvl::remove_unused_dest_operand): New. | |
13404 | (pass_vsetvl::init): Removed. | |
13405 | (pass_vsetvl::done): Removed. | |
13406 | (pass_vsetvl::compute_probabilities): Removed. | |
13407 | (pass_vsetvl::lazy_vsetvl): Adjust. | |
13408 | (pass_vsetvl::execute): Adjust. | |
13409 | * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed. | |
13410 | (DEF_SEW_LMUL_RULE): New. | |
13411 | (DEF_SEW_LMUL_FUSE_RULE): Removed. | |
13412 | (DEF_POLICY_RULE): New. | |
13413 | (DEF_UNAVAILABLE_COND): Removed | |
13414 | (DEF_AVL_RULE): New demand type. | |
13415 | (sew_lmul): New demand type. | |
13416 | (ratio_only): New demand type. | |
13417 | (sew_only): New demand type. | |
13418 | (ge_sew): New demand type. | |
13419 | (ratio_and_ge_sew): New demand type. | |
13420 | (tail_mask_policy): New demand type. | |
13421 | (tail_policy_only): New demand type. | |
13422 | (mask_policy_only): New demand type. | |
13423 | (ignore_policy): New demand type. | |
13424 | (avl): New demand type. | |
13425 | (non_zero_avl): New demand type. | |
13426 | (ignore_avl): New demand type. | |
13427 | * config/riscv/t-riscv: Removed riscv-vsetvl.h | |
13428 | * config/riscv/riscv-vsetvl.h: Removed. | |
13429 | ||
13430 | 2023-10-20 Alexandre Oliva <oliva@adacore.com> | |
13431 | ||
13432 | * tree-eh.cc (make_eh_edges): Return the new edge. | |
13433 | * tree-eh.h (make_eh_edges): Likewise. | |
13434 | ||
13435 | 2023-10-19 Marek Polacek <polacek@redhat.com> | |
13436 | ||
13437 | * doc/contrib.texi: Add entry for Patrick Palka. | |
13438 | ||
13439 | 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13440 | ||
13441 | * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function | |
13442 | compatible with mask parameters in clone. | |
13443 | * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean | |
13444 | typed masks. | |
13445 | (vectorizable_simd_clone_call): Enable the use of masked clones in | |
13446 | fully masked loops. | |
13447 | ||
13448 | 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13449 | ||
13450 | PR tree-optimization/110485 | |
13451 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial | |
13452 | vectors usage if a notinbranch simdclone has been selected. | |
13453 | ||
13454 | 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13455 | ||
13456 | * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case | |
13457 | simd clone calls and only use types that are mapped to vectors. | |
13458 | (simd_clone_call_p): New helper function. | |
13459 | ||
13460 | 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13461 | ||
13462 | * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept | |
13463 | poly NIT and ALT_BOUND. | |
13464 | ||
13465 | 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13466 | ||
13467 | * tree-parloops.cc (create_loop_fn): Copy specific target and | |
13468 | optimization options to clone. | |
13469 | ||
13470 | 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13471 | ||
13472 | * omp-simd-clone.cc (simd_clone_subparts): Remove. | |
13473 | (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with | |
13474 | TYPE_VECTOR_SUBPARTS. | |
13475 | (ipa_simd_modify_function_body): Likewise. | |
13476 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise. | |
13477 | (simd_clone_subparts): Remove. | |
13478 | ||
13479 | 2023-10-19 Jason Merrill <jason@redhat.com> | |
13480 | ||
13481 | * ABOUT-GCC-NLS: Add usage guidance. | |
13482 | ||
13483 | 2023-10-19 Jason Merrill <jason@redhat.com> | |
13484 | ||
13485 | * diagnostic-core.h (permerror): Rename new overloads... | |
13486 | (permerror_opt): To this. | |
13487 | * diagnostic.cc: Likewise. | |
13488 | ||
13489 | 2023-10-19 Tamar Christina <tamar.christina@arm.com> | |
13490 | ||
13491 | PR tree-optimization/111860 | |
13492 | * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): | |
13493 | Remove PHI nodes that dominate loop. | |
13494 | ||
13495 | 2023-10-19 Richard Biener <rguenther@suse.de> | |
13496 | ||
13497 | PR tree-optimization/111131 | |
13498 | * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make | |
13499 | sure to update all gather/scatter stmt DRs, not only those | |
13500 | that eventually got VMAT_GATHER_SCATTER set. | |
13501 | * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add. | |
13502 | (vect_get_and_check_slp_defs): Handle gathers/scatters, | |
13503 | adding the offset as SLP operand and comparing base and scale. | |
13504 | (vect_build_slp_tree_1): Handle gathers. | |
13505 | (vect_build_slp_tree_2): Likewise. | |
13506 | ||
13507 | 2023-10-19 Richard Biener <rguenther@suse.de> | |
13508 | ||
13509 | * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename | |
13510 | to ... | |
13511 | (vect_build_one_gather_load_call): ... this. Refactor, | |
13512 | inline widening/narrowing support ... | |
13513 | (vectorizable_load): ... here, do gather vectorization | |
13514 | with builtin decls along other gather vectorization. | |
13515 | ||
13516 | 2023-10-19 Alex Coplan <alex.coplan@arm.com> | |
13517 | ||
13518 | * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ... | |
13519 | (load_pair_dw_<TX:mode><TX2:mode>): ... this. | |
13520 | (store_pair_dw_tftf): Rename to ... | |
13521 | (store_pair_dw_<TX:mode><TX2:mode>): ... this. | |
13522 | * config/aarch64/iterators.md (TX2): New. | |
13523 | ||
13524 | 2023-10-19 Alex Coplan <alex.coplan@arm.com> | |
13525 | ||
13526 | * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new | |
13527 | parameter to give final insn position, infer use of mem if it isn't | |
13528 | specified explicitly. | |
13529 | (function_info::change_insns): Pass down final insn position to | |
13530 | finalize_new_accesses. | |
13531 | * rtl-ssa/functions.h: Add parameter to finalize_new_accesses. | |
13532 | ||
13533 | 2023-10-19 Alex Coplan <alex.coplan@arm.com> | |
13534 | ||
13535 | * rtl-ssa/accesses.cc (function_info::reparent_use): New. | |
13536 | * rtl-ssa/functions.h (function_info): Declare new member | |
13537 | function reparent_use. | |
13538 | ||
13539 | 2023-10-19 Alex Coplan <alex.coplan@arm.com> | |
13540 | ||
13541 | * rtl-ssa/access-utils.h (drop_memory_access): New. | |
13542 | ||
13543 | 2023-10-19 Alex Coplan <alex.coplan@arm.com> | |
13544 | ||
13545 | * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we | |
13546 | update the prev pointer on the following nondebug insn in the | |
13547 | case that !insn->is_debug_insn () && next->is_debug_insn (). | |
13548 | ||
13549 | 2023-10-19 Haochen Jiang <haochen.jiang@intel.com> | |
13550 | ||
13551 | * config/i386/i386.h: Correct the ISA enabled for Arrow Lake. | |
13552 | Also make Clearwater Forest depends on Sierra Forest. | |
13553 | * config/i386/i386-options.cc: Revise the order of the macro | |
13554 | definition to avoid confusion. | |
13555 | * doc/extend.texi: Revise documentation. | |
13556 | * doc/invoke.texi: Correct documentation. | |
13557 | ||
13558 | 2023-10-19 Andrew Stubbs <ams@codesourcery.com> | |
13559 | ||
13560 | * config.gcc (amdgcn): Switch default to --with-arch=gfx900. | |
13561 | Implement support for --with-multilib-list. | |
13562 | * config/gcn/t-gcn-hsa: Likewise. | |
13563 | * doc/install.texi: Likewise. | |
13564 | * doc/invoke.texi: Mark Fiji deprecated. | |
13565 | ||
13566 | 2023-10-19 Jiahao Xu <xujiahao@loongson.cn> | |
13567 | ||
13568 | * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from | |
13569 | vector_costs. Add a constructor. | |
13570 | (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to | |
13571 | adjust the cost for inner loops. | |
13572 | (loongarch_vector_costs::count_operations): New function. | |
13573 | (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto. | |
13574 | (loongarch_vector_costs::finish_cost): Ditto. | |
13575 | (loongarch_builtin_vectorization_cost): Adjust. | |
13576 | * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter. | |
13577 | (loongarcg-vect-issue-info): Ditto. | |
13578 | (mmemvec-cost): Delete. | |
13579 | * config/loongarch/genopts/loongarch.opt.in | |
13580 | (loongarch-vect-unroll-limit): Ditto. | |
13581 | (loongarcg-vect-issue-info): Ditto. | |
13582 | (mmemvec-cost): Delete. | |
13583 | * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option. | |
13584 | ||
13585 | 2023-10-19 Jiahao Xu <xujiahao@loongson.cn> | |
13586 | ||
13587 | * config/loongarch/lasx.md | |
13588 | (vec_widen_<su>mult_even_v8si): New patterns. | |
13589 | (vec_widen_<su>add_hi_<mode>): Ditto. | |
13590 | (vec_widen_<su>add_lo_<mode>): Ditto. | |
13591 | (vec_widen_<su>sub_hi_<mode>): Ditto. | |
13592 | (vec_widen_<su>sub_lo_<mode>): Ditto. | |
13593 | (vec_widen_<su>mult_hi_<mode>): Ditto. | |
13594 | (vec_widen_<su>mult_lo_<mode>): Ditto. | |
13595 | * config/loongarch/loongarch.md (u_bool): New iterator. | |
13596 | * config/loongarch/loongarch-protos.h | |
13597 | (loongarch_expand_vec_widen_hilo): New prototype. | |
13598 | * config/loongarch/loongarch.cc | |
13599 | (loongarch_expand_vec_interleave): New function. | |
13600 | (loongarch_expand_vec_widen_hilo): New function. | |
13601 | ||
13602 | 2023-10-19 Jiahao Xu <xujiahao@loongson.cn> | |
13603 | ||
13604 | * config/loongarch/lasx.md | |
13605 | (avg<mode>3_ceil): New patterns. | |
13606 | (uavg<mode>3_ceil): Ditto. | |
13607 | (avg<mode>3_floor): Ditto. | |
13608 | (uavg<mode>3_floor): Ditto. | |
13609 | (usadv32qi): Ditto. | |
13610 | (ssadv32qi): Ditto. | |
13611 | * config/loongarch/lsx.md | |
13612 | (avg<mode>3_ceil): New patterns. | |
13613 | (uavg<mode>3_ceil): Ditto. | |
13614 | (avg<mode>3_floor): Ditto. | |
13615 | (uavg<mode>3_floor): Ditto. | |
13616 | (usadv16qi): Ditto. | |
13617 | (ssadv16qi): Ditto. | |
13618 | ||
13619 | 2023-10-18 Andrew Pinski <pinskia@gmail.com> | |
13620 | ||
13621 | PR middle-end/111863 | |
13622 | * expr.cc (do_store_flag): Don't over write arg0 | |
13623 | when stripping off `& POW2`. | |
13624 | ||
13625 | 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
13626 | ||
13627 | PR tree-optimization/111648 | |
13628 | * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1 | |
13629 | chooses base element from arg, ensure that it's a natural stepped | |
13630 | sequence. | |
13631 | (build_vec_cst_rand): New param natural_stepped and use it to | |
13632 | construct a naturally stepped sequence. | |
13633 | (test_nunits_min_2): Add new unit tests Case 6 and Case 7. | |
13634 | ||
13635 | 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu> | |
13636 | ||
13637 | * config/pru/pru.cc (pru_insn_cost): New function. | |
13638 | (TARGET_INSN_COST): Define for PRU. | |
13639 | ||
13640 | 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com> | |
13641 | ||
13642 | * config/aarch64/aarch64.cc (aarch64_test_fractional_cost): | |
13643 | Test <= instead of testing < twice. | |
13644 | ||
13645 | 2023-10-18 Jakub Jelinek <jakub@redhat.com> | |
13646 | ||
13647 | PR bootstrap/111852 | |
13648 | * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of | |
13649 | using rtx_def type for memory_extend_buf, use unsigned char | |
13650 | arrayy with size of rtx_def and its alignment. | |
13651 | ||
13652 | 2023-10-18 Jason Merrill <jason@redhat.com> | |
13653 | ||
13654 | * doc/invoke.texi: Move -fpermissive to Warning Options. | |
13655 | * diagnostic.cc (update_effective_level_from_pragmas): Remove | |
13656 | redundant system header check. | |
13657 | (diagnostic_report_diagnostic): Move down syshdr/-w check. | |
13658 | (diagnostic_impl): Handle DK_PERMERROR with an option number. | |
13659 | (permerror): Add new overloads. | |
13660 | * diagnostic-core.h (permerror): Declare them. | |
13661 | ||
13662 | 2023-10-18 Tobias Burnus <tobias@codesourcery.com> | |
13663 | ||
13664 | * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute | |
13665 | to avoid that auxillary statement list reaches LTO. | |
13666 | ||
13667 | 2023-10-18 Jakub Jelinek <jakub@redhat.com> | |
13668 | ||
13669 | PR tree-optimization/111845 | |
13670 | * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary | |
13671 | statements for the 4 operand addition or subtraction of 3 operands | |
13672 | from 1 operand cases and remove them when successful. Look for | |
13673 | nested additions even from rhs[2], not just rhs[1]. | |
13674 | ||
13675 | 2023-10-18 Tobias Burnus <tobias@codesourcery.com> | |
13676 | ||
13677 | PR target/111093 | |
13678 | * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error | |
13679 | instead of an assert ICE when no -march= has been specified. | |
13680 | ||
13681 | 2023-10-18 Iain Sandoe <iain@sandoe.co.uk> | |
13682 | ||
13683 | * config.in: Regenerate. | |
13684 | * config/darwin.cc (darwin_file_start): Add assembler directives | |
13685 | for the target OS version, where these are supported by the | |
13686 | assembler. | |
13687 | (darwin_override_options): Check for building >= macOS 10.14. | |
13688 | * configure: Regenerate. | |
13689 | * configure.ac: Check for assembler support of .build_version | |
13690 | directives. | |
13691 | ||
13692 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13693 | ||
13694 | PR tree-optimization/109154 | |
13695 | * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove. | |
13696 | (typedef struct ifcvt_arg_entry): New. | |
13697 | (cmp_arg_entry): New. | |
13698 | (gen_phi_arg_condition, gen_phi_nest_statement, | |
13699 | predicate_scalar_phi): Use them. | |
13700 | ||
13701 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13702 | ||
13703 | PR tree-optimization/109154 | |
13704 | * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): | |
13705 | Rewrite to new syntax. | |
13706 | (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in | |
13707 | splits. | |
13708 | ||
13709 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13710 | ||
13711 | PR tree-optimization/109154 | |
13712 | * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN. | |
13713 | ||
13714 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13715 | ||
13716 | PR tree-optimization/109154 | |
13717 | * match.pd: Add new cond_op rule. | |
13718 | ||
13719 | 2023-10-18 Xi Ruoyao <xry111@xry111.site> | |
13720 | ||
13721 | * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for | |
13722 | zeroing a fcc. | |
13723 | ||
13724 | 2023-10-18 Richard Biener <rguenther@suse.de> | |
13725 | ||
13726 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): | |
13727 | Relax check to again allow passing integer mode masks | |
13728 | as traditional vectors. | |
13729 | ||
13730 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13731 | ||
13732 | * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA. | |
13733 | * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional | |
13734 | asserts. | |
13735 | (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling. | |
13736 | (find_guard_arg): Look value up through explicit edge and original defs. | |
13737 | (vect_do_peeling): Use it. | |
13738 | (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge. | |
13739 | (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops): | |
13740 | Remove. | |
13741 | * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi. | |
13742 | * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add | |
13743 | optional param to turn off LCSSA mode. | |
13744 | ||
13745 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13746 | ||
13747 | * tree-if-conv.cc (tree_if_conversion): Record exits in aux. | |
13748 | * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use | |
13749 | it. | |
13750 | * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit. | |
13751 | (vec_init_loop_exit_info): Extend analysis when multiple exits. | |
13752 | (vect_analyze_loop_form): Record conds and determine main cond. | |
13753 | (vect_create_loop_vinfo): Extend bookkeeping of conds. | |
13754 | (vect_analyze_loop): Release conds. | |
13755 | * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS, | |
13756 | LOOP_VINFO_LOOP_IV_COND): New. | |
13757 | (struct vect_loop_form_info): Add conds, alt_loop_conds; | |
13758 | (struct loop_vec_info): Add conds, loop_iv_cond. | |
13759 | ||
13760 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13761 | ||
13762 | * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly. | |
13763 | (loop_distribution::distribute_loop): Bail out of not single exit. | |
13764 | * tree-scalar-evolution.cc (get_loop_exit_condition): New. | |
13765 | * tree-scalar-evolution.h (get_loop_exit_condition): New. | |
13766 | * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit | |
13767 | explicitly. | |
13768 | * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors, | |
13769 | vect_set_loop_condition_partial_vectors_avx512, | |
13770 | vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly | |
13771 | take exit. | |
13772 | (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and | |
13773 | return new peeled corresponding peeled exit. | |
13774 | (slpeel_can_duplicate_loop_p): Explicitly take exit. | |
13775 | (find_loop_location): Handle not knowing an explicit exit. | |
13776 | (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf, | |
13777 | find_guard_arg, slpeel_update_phi_nodes_for_loops, | |
13778 | slpeel_update_phi_nodes_for_guard2): Use new exits. | |
13779 | (vect_do_peeling): Update bookkeeping to keep track of exits. | |
13780 | * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to | |
13781 | analyze. | |
13782 | (vec_init_loop_exit_info): New. | |
13783 | (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv, | |
13784 | vec_epilogue_loop_iv, scalar_loop_iv. | |
13785 | (vect_analyze_loop_form): Initialize exits. | |
13786 | (vect_create_loop_vinfo): Set main exit. | |
13787 | (vect_create_epilog_for_reduction, vectorizable_live_operation, | |
13788 | vect_transform_loop): Use it. | |
13789 | (scale_profile_for_vect_loop): Explicitly take exit to scale. | |
13790 | * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit. | |
13791 | * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT, | |
13792 | LOOP_VINFO_SCALAR_IV_EXIT): New. | |
13793 | (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv, | |
13794 | scalar_loop_iv. | |
13795 | (vect_set_loop_condition, slpeel_can_duplicate_loop_p, | |
13796 | slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits. | |
13797 | (vec_init_loop_exit_info): New. | |
13798 | (struct vect_loop_form_info): Add loop_exit. | |
13799 | ||
13800 | 2023-10-18 Tamar Christina <tamar.christina@arm.com> | |
13801 | ||
13802 | * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body | |
13803 | to ... | |
13804 | (vectorizable_comparison_1): ...This. | |
13805 | ||
13806 | 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
13807 | ||
13808 | * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function. | |
13809 | (expand_vec_perm_const_1): Add consecutive pattern recognition. | |
13810 | ||
13811 | 2023-10-18 Haochen Jiang <haochen.jiang@intel.com> | |
13812 | ||
13813 | * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther | |
13814 | Lake. | |
13815 | * common/config/i386/i386-common.cc (processor_name): | |
13816 | Ditto. | |
13817 | (processor_alias_table): Ditto. | |
13818 | * common/config/i386/i386-cpuinfo.h (enum processor_types): | |
13819 | Add INTEL_PANTHERLAKE. | |
13820 | * config.gcc: Add -march=pantherlake. | |
13821 | * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor | |
13822 | the if clause. Handle pantherlake. | |
13823 | * config/i386/i386-c.cc (ix86_target_macros_internal): | |
13824 | Handle pantherlake. | |
13825 | * config/i386/i386-options.cc (processor_cost_table): Ditto. | |
13826 | (m_PANTHERLAKE): New. | |
13827 | (m_CORE_HYBRID): Add pantherlake. | |
13828 | * config/i386/i386.h (enum processor_type): Ditto. | |
13829 | * doc/extend.texi: Ditto. | |
13830 | * doc/invoke.texi: Ditto. | |
13831 | ||
13832 | 2023-10-18 Haochen Jiang <haochen.jiang@intel.com> | |
13833 | ||
13834 | * config/i386/i386-options.cc (m_CORE_HYBRID): New. | |
13835 | * config/i386/x86-tune.def: Replace hybrid client tune to | |
13836 | m_CORE_HYBRID. | |
13837 | ||
13838 | 2023-10-18 Haochen Jiang <haochen.jiang@intel.com> | |
13839 | ||
13840 | * common/config/i386/cpuinfo.h | |
13841 | (get_intel_cpu): Handle Clearwater Forest. | |
13842 | * common/config/i386/i386-common.cc (processor_name): | |
13843 | Add Clearwater Forest. | |
13844 | (processor_alias_table): Ditto. | |
13845 | * common/config/i386/i386-cpuinfo.h (enum processor_types): | |
13846 | Add INTEL_CLEARWATERFOREST. | |
13847 | * config.gcc: Add -march=clearwaterforest. | |
13848 | * config/i386/driver-i386.cc (host_detect_local_cpu): Handle | |
13849 | clearwaterforest. | |
13850 | * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto. | |
13851 | * config/i386/i386-options.cc (processor_cost_table): Ditto. | |
13852 | (m_CLEARWATERFOREST): New. | |
13853 | (m_CORE_ATOM): Add clearwaterforest. | |
13854 | * config/i386/i386.h (enum processor_type): Ditto. | |
13855 | * doc/extend.texi: Ditto. | |
13856 | * doc/invoke.texi: Ditto. | |
13857 | ||
13858 | 2023-10-18 liuhongt <hongtao.liu@intel.com> | |
13859 | ||
13860 | * config/i386/mmx.md (fma<mode>4): New expander. | |
13861 | (fms<mode>4): Ditto. | |
13862 | (fnma<mode>4): Ditto. | |
13863 | (fnms<mode>4): Ditto. | |
13864 | (vec_fmaddsubv4hf4): Ditto. | |
13865 | (vec_fmsubaddv4hf4): Ditto. | |
13866 | ||
13867 | 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
13868 | ||
13869 | PR target/111832 | |
13870 | * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function. | |
13871 | ||
13872 | 2023-10-17 Richard Sandiford <richard.sandiford@arm.com> | |
13873 | ||
13874 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make | |
13875 | the position of the LR save slot dependent on stack clash | |
13876 | protection unless shadow call stacks are enabled. | |
13877 | ||
13878 | 2023-10-17 Richard Sandiford <richard.sandiford@arm.com> | |
13879 | ||
13880 | * config/aarch64/aarch64.h (aarch64_frame): Add vectors that | |
13881 | store the list saved GPRs, FPRs and predicate registers. | |
13882 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize | |
13883 | the lists of saved registers. Use them to choose push candidates. | |
13884 | Invalidate pop candidates if we're not going to do a pop. | |
13885 | (aarch64_next_callee_save): Delete. | |
13886 | (aarch64_save_callee_saves): Take a list of registers, | |
13887 | rather than a range. Make !skip_wb select only write-back | |
13888 | candidates. | |
13889 | (aarch64_expand_prologue): Update calls accordingly. | |
13890 | (aarch64_restore_callee_saves): Take a list of registers, | |
13891 | rather than a range. Always skip pop candidates. Also skip | |
13892 | LR if shadow call stacks are enabled. | |
13893 | (aarch64_expand_epilogue): Update calls accordingly. | |
13894 | ||
13895 | 2023-10-17 Richard Sandiford <richard.sandiford@arm.com> | |
13896 | ||
13897 | * cfgbuild.h (find_sub_basic_blocks): Declare. | |
13898 | * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function, | |
13899 | split out from... | |
13900 | (find_many_sub_basic_blocks): ...here. | |
13901 | (find_sub_basic_blocks): New function. | |
13902 | * function.cc (thread_prologue_and_epilogue_insns): Handle | |
13903 | epilogues that contain jumps. | |
13904 | ||
13905 | 2023-10-17 Andrew Pinski <apinski@marvell.com> | |
13906 | ||
13907 | PR tree-optimization/110817 | |
13908 | * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the | |
13909 | check for boolean type as they don't have "[0,1]" range. | |
13910 | ||
13911 | 2023-10-17 Andrew Pinski <pinskia@gmail.com> | |
13912 | ||
13913 | PR tree-optimization/111432 | |
13914 | * match.pd (`a & (x | CST)`): New pattern. | |
13915 | ||
13916 | 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
13917 | ||
13918 | * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for | |
13919 | new basic block. | |
13920 | ||
13921 | 2023-10-17 Richard Biener <rguenther@suse.de> | |
13922 | ||
13923 | PR tree-optimization/111846 | |
13924 | * tree-vectorizer.h (_slp_tree::simd_clone_info): Add. | |
13925 | (SLP_TREE_SIMD_CLONE_INFO): New. | |
13926 | * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize | |
13927 | SLP_TREE_SIMD_CLONE_INFO. | |
13928 | (_slp_tree::~_slp_tree): Release it. | |
13929 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use | |
13930 | SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO | |
13931 | dependent on if we're doing SLP. | |
13932 | ||
13933 | 2023-10-17 Jakub Jelinek <jakub@redhat.com> | |
13934 | ||
13935 | * wide-int-print.h (print_dec_buf_size): For length, divide number | |
13936 | of bits by 3 and add 3 instead of division by 4 and adding 4. | |
13937 | * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call | |
13938 | print_hex, instead call print_decu on either negated value after | |
13939 | printing - or on wi itself. | |
13940 | (print_decu): Don't call print_hex, instead print even large numbers | |
13941 | decimally. | |
13942 | (pp_wide_int_large): Assume len from print_dec_buf_size is big enough | |
13943 | even if it returns false. | |
13944 | * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if | |
13945 | pp_wide_int_large should be used. | |
13946 | * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size | |
13947 | to compute needed buffer size. | |
13948 | ||
13949 | 2023-10-17 Richard Biener <rguenther@suse.de> | |
13950 | ||
13951 | PR middle-end/111818 | |
13952 | * tree-ssa.cc (maybe_optimize_var): When clearing | |
13953 | DECL_NOT_GIMPLE_REG_P always rewrite into SSA. | |
13954 | ||
13955 | 2023-10-17 Richard Biener <rguenther@suse.de> | |
13956 | ||
13957 | PR tree-optimization/111807 | |
13958 | * tree-sra.cc (build_ref_for_model): Only call | |
13959 | build_reconstructed_reference when the offsets are the same. | |
13960 | ||
13961 | 2023-10-17 Vineet Gupta <vineetg@rivosinc.com> | |
13962 | ||
13963 | PR target/111466 | |
13964 | * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P. | |
13965 | ||
13966 | 2023-10-17 Chenghui Pan <panchenghui@loongson.cn> | |
13967 | ||
13968 | * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init): | |
13969 | fix impl related to vec_initv32qiv16qi template to avoid ICE. | |
13970 | ||
13971 | 2023-10-17 Lulu Cheng <chenglulu@loongson.cn> | |
13972 | Chenghua Xu <xuchenghua@loongson.cn> | |
13973 | ||
13974 | * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP): | |
13975 | Delete. | |
13976 | ||
13977 | 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
13978 | ||
13979 | * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue. | |
13980 | (get_store_value): New function. | |
13981 | ||
13982 | 2023-10-16 Jeff Law <jlaw@ventanamicro.com> | |
13983 | ||
13984 | * explow.cc (probe_stack_range): Handle case when expand_binop | |
13985 | does not construct its result in the expected location. | |
13986 | ||
13987 | 2023-10-16 David Malcolm <dmalcolm@redhat.com> | |
13988 | ||
13989 | * diagnostic.cc (diagnostic_initialize): When LANG=C, update | |
13990 | default for -fdiagnostics-text-art-charset from emoji to ascii. | |
13991 | * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above. | |
13992 | ||
13993 | 2023-10-16 David Malcolm <dmalcolm@redhat.com> | |
13994 | ||
13995 | * diagnostic.cc (diagnostic_initialize): Ensure | |
13996 | context->extra_output_kind is initialized. | |
13997 | ||
13998 | 2023-10-16 Uros Bizjak <ubizjak@gmail.com> | |
13999 | ||
14000 | * config/i386/i386.cc (ix86_can_inline_p): | |
14001 | Handle CM_LARGE and CM_LARGE_PIC. | |
14002 | (x86_elf_aligned_decl_common): Ditto. | |
14003 | (x86_output_aligned_bss): Ditto. | |
14004 | * config/i386/i386.opt: Update doc for -mlarge-data-threshold=. | |
14005 | * doc/invoke.texi: Update doc for -mlarge-data-threshold=. | |
14006 | ||
14007 | 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu> | |
14008 | ||
14009 | * config/riscv/riscv-protos.h (emit_block_move): Remove redundant | |
14010 | prototype. Improve comment. | |
14011 | * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc | |
14012 | into riscv-string.cc. | |
14013 | (riscv_adjust_block_mem, riscv_block_move_loop): Likewise. | |
14014 | (riscv_expand_block_move): Likewise. | |
14015 | * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved | |
14016 | function. | |
14017 | (riscv_adjust_block_mem, riscv_block_move_loop): Likewise. | |
14018 | (riscv_expand_block_move): Likewise. | |
14019 | ||
14020 | 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu> | |
14021 | ||
14022 | * Makefile.in: Add fold-mem-offsets.o. | |
14023 | * passes.def: Schedule a new pass. | |
14024 | * tree-pass.h (make_pass_fold_mem_offsets): Declare. | |
14025 | * common.opt: New options. | |
14026 | * doc/invoke.texi: Document new option. | |
14027 | * fold-mem-offsets.cc: New file. | |
14028 | ||
14029 | 2023-10-16 Andrew Pinski <pinskia@gmail.com> | |
14030 | ||
14031 | PR tree-optimization/101541 | |
14032 | * match.pd (A CMP 0 ? A : -A): Improve | |
14033 | using bitwise_equal_p. | |
14034 | ||
14035 | 2023-10-16 Andrew Pinski <pinskia@gmail.com> | |
14036 | ||
14037 | PR tree-optimization/31531 | |
14038 | * match.pd (~X op ~Y): Allow for an optional nop convert. | |
14039 | (~X op C): Likewise. | |
14040 | ||
14041 | 2023-10-16 Roger Sayle <roger@nextmovesoftware.com> | |
14042 | ||
14043 | * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to | |
14044 | use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER. | |
14045 | ||
14046 | 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
14047 | ||
14048 | * config/s390/vector.md (popcountv8hi2_vx): Sign extend each | |
14049 | unsigned vector element. | |
14050 | ||
14051 | 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
14052 | ||
14053 | * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes. | |
14054 | ||
14055 | 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com> | |
14056 | ||
14057 | * fold-const.cc (expr_not_equal_to): Replace get_global_range_query | |
14058 | by get_range_query. | |
14059 | * gimple-fold.cc (size_must_be_zero_p): Likewise. | |
14060 | * gimple-range-fold.cc (fur_source::fur_source): Likewise. | |
14061 | * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise. | |
14062 | * tree-dfa.cc (get_ref_base_and_extent): Likewise. | |
14063 | ||
14064 | 2023-10-16 liuhongt <hongtao.liu@intel.com> | |
14065 | ||
14066 | * config/i386/mmx.md (V2FI_32): New mode iterator | |
14067 | (movd_v2hf_to_sse): Rename to .. | |
14068 | (movd_<mode>_to_sse): .. this. | |
14069 | (movd_v2hf_to_sse_reg): Rename to .. | |
14070 | (movd_<mode>_to_sse_reg): .. this. | |
14071 | (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New | |
14072 | expander. | |
14073 | (fix<fixunssuffix>_truncv2hfv2si2): Ditto. | |
14074 | (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto. | |
14075 | (float<floatunssuffix>v2siv2hf2): Ditto. | |
14076 | (extendv2hfv2sf2): Ditto. | |
14077 | (truncv2sfv2hf2): Ditto. | |
14078 | * config/i386/sse.md (*vec_concatv8hf_movss): Rename to .. | |
14079 | (*vec_concat<mode>_movss): .. this. | |
14080 | ||
14081 | 2023-10-16 liuhongt <hongtao.liu@intel.com> | |
14082 | ||
14083 | * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive): | |
14084 | Handle HFmode. | |
14085 | (ix86_expand_round_sse4): Ditto. | |
14086 | * config/i386/i386.md (roundhf2): New expander. | |
14087 | (lroundhf<mode>2): Ditto. | |
14088 | (lrinthf<mode>2): Ditto. | |
14089 | (l<rounding_insn>hf<mode>2): Ditto. | |
14090 | * config/i386/mmx.md (sqrt<mode>2): Ditto. | |
14091 | (btrunc<mode>2): Ditto. | |
14092 | (nearbyint<mode>2): Ditto. | |
14093 | (rint<mode>2): Ditto. | |
14094 | (lrint<mode><mmxintvecmodelower>2): Ditto. | |
14095 | (floor<mode>2): Ditto. | |
14096 | (lfloor<mode><mmxintvecmodelower>2): Ditto. | |
14097 | (ceil<mode>2): Ditto. | |
14098 | (lceil<mode><mmxintvecmodelower>2): Ditto. | |
14099 | (round<mode>2): Ditto. | |
14100 | (lround<mode><mmxintvecmodelower>2): Ditto. | |
14101 | * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto. | |
14102 | (lfloor<mode><sseintvecmodelower>2): Ditto. | |
14103 | (lceil<mode><sseintvecmodelower>2): Ditto. | |
14104 | (lround<mode><sseintvecmodelower>2): Ditto. | |
14105 | (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF. | |
14106 | (round<mode>2): Extend to V8HF/V16HF/V32HF. | |
14107 | ||
14108 | 2023-10-15 Tobias Burnus <tobias@codesourcery.com> | |
14109 | ||
14110 | * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not | |
14111 | @code; document more completely the supported Fortran sentinels. | |
14112 | ||
14113 | 2023-10-15 Roger Sayle <roger@nextmovesoftware.com> | |
14114 | ||
14115 | * optabs.cc (expand_subword_shift): Call simplify_expand_binop | |
14116 | instead of expand_binop. Optimize cases (i.e. avoid generating | |
14117 | RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab | |
14118 | (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1. | |
14119 | ||
14120 | 2023-10-15 Jakub Jelinek <jakub@redhat.com> | |
14121 | ||
14122 | PR tree-optimization/111800 | |
14123 | * wide-int-print.h (print_dec_buf_size, print_decs_buf_size, | |
14124 | print_decu_buf_size, print_hex_buf_size): New inline functions. | |
14125 | * wide-int.cc (assert_deceq): Use print_dec_buf_size. | |
14126 | (assert_hexeq): Use print_hex_buf_size. | |
14127 | * wide-int-print.cc (print_decs): Use print_decs_buf_size. | |
14128 | (print_decu): Use print_decu_buf_size. | |
14129 | (print_hex): Use print_hex_buf_size. | |
14130 | (pp_wide_int_large): Use print_dec_buf_size. | |
14131 | * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size. | |
14132 | * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks): | |
14133 | Likewise. | |
14134 | * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use | |
14135 | print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument. | |
14136 | ||
14137 | 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
14138 | ||
14139 | * combine.cc (simplify_compare_const): Fix handling of unsigned | |
14140 | constants. | |
14141 | ||
14142 | 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
14143 | ||
14144 | * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI. | |
14145 | ||
14146 | 2023-10-14 Tobias Burnus <tobias@codesourcery.com> | |
14147 | ||
14148 | * gimplify.cc (gimplify_bind_expr): Handle Fortran's | |
14149 | 'omp allocate' for stack variables. | |
14150 | ||
14151 | 2023-10-14 Jakub Jelinek <jakub@redhat.com> | |
14152 | ||
14153 | PR c/102989 | |
14154 | * tree-core.h (struct tree_base): Remove int_length.offset | |
14155 | member, change type of int_length.unextended and int_length.extended | |
14156 | from unsigned char to unsigned short. | |
14157 | * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove. | |
14158 | (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS, | |
14159 | instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and | |
14160 | TREE_INT_CST_NUNITS. | |
14161 | * tree.cc (wide_int_to_tree_1): Don't assert | |
14162 | TREE_INT_CST_OFFSET_NUNITS value. | |
14163 | (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS. | |
14164 | * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024. | |
14165 | (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment. | |
14166 | (trailing_wide_int_storage): Change m_len type from unsigned char * | |
14167 | to unsigned short *. | |
14168 | (trailing_wide_int_storage::trailing_wide_int_storage): Change second | |
14169 | argument from unsigned char * to unsigned short *. | |
14170 | (trailing_wide_ints): Change m_max_len type from unsigned char to | |
14171 | unsigned short. Change m_len element type from | |
14172 | struct{unsigned char len;} to unsigned short. | |
14173 | (trailing_wide_ints <N>::operator []): Remove .len from m_len | |
14174 | accesses. | |
14175 | * value-range-storage.h (irange_storage::lengths_address): Change | |
14176 | return type from const unsigned char * to const unsigned short *. | |
14177 | (irange_storage::write_lengths_address): Change return type from | |
14178 | unsigned char * to unsigned short *. | |
14179 | * value-range-storage.cc (irange_storage::write_lengths_address): | |
14180 | Likewise. | |
14181 | (irange_storage::lengths_address): Change return type from | |
14182 | const unsigned char * to const unsigned short *. | |
14183 | (write_wide_int): Change len argument type from unsigned char *& | |
14184 | to unsigned short *&. | |
14185 | (irange_storage::set_irange): Change len variable type from | |
14186 | unsigned char * to unsigned short *. | |
14187 | (read_wide_int): Change len argument type from unsigned char to | |
14188 | unsigned short. Use trailing_wide_int_storage <unsigned short> | |
14189 | instead of trailing_wide_int_storage and | |
14190 | trailing_wide_int <unsigned short> instead of trailing_wide_int. | |
14191 | (irange_storage::get_irange): Change len variable type from | |
14192 | unsigned char * to unsigned short *. | |
14193 | (irange_storage::size): Multiply n by sizeof (unsigned short) | |
14194 | in len_size variable initialization. | |
14195 | (irange_storage::dump): Change len variable type from | |
14196 | unsigned char * to unsigned short *. | |
14197 | ||
14198 | 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
14199 | ||
14200 | * config/riscv/vector-iterators.md: Remove redundant iterators. | |
14201 | ||
14202 | 2023-10-13 Andrew MacLeod <amacleod@redhat.com> | |
14203 | ||
14204 | PR tree-optimization/111622 | |
14205 | * value-relation.cc (equiv_oracle::add_partial_equiv): Do not | |
14206 | register a partial equivalence if an operand has no uses. | |
14207 | ||
14208 | 2023-10-13 Richard Biener <rguenther@suse.de> | |
14209 | ||
14210 | PR tree-optimization/111795 | |
14211 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle | |
14212 | integer mode mask arguments. | |
14213 | ||
14214 | 2023-10-13 Richard Biener <rguenther@suse.de> | |
14215 | ||
14216 | * tree-vect-slp.cc (mask_call_maps): New. | |
14217 | (vect_get_operand_map): Handle IFN_MASK_CALL. | |
14218 | (vect_build_slp_tree_1): Likewise. | |
14219 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle | |
14220 | SLP. | |
14221 | ||
14222 | 2023-10-13 Richard Biener <rguenther@suse.de> | |
14223 | ||
14224 | PR tree-optimization/111779 | |
14225 | * tree-sra.cc (sra_handled_bf_read_p): New function. | |
14226 | (build_access_from_expr_1): Handle some BIT_FIELD_REFs. | |
14227 | (sra_modify_expr): Likewise. | |
14228 | (make_fancy_name_1): Skip over BIT_FIELD_REF. | |
14229 | ||
14230 | 2023-10-13 Richard Biener <rguenther@suse.de> | |
14231 | ||
14232 | PR tree-optimization/111773 | |
14233 | * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do | |
14234 | not elide noreturn calls that are reflected to the IL. | |
14235 | ||
14236 | 2023-10-13 Kito Cheng <kito.cheng@sifive.com> | |
14237 | ||
14238 | * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump | |
14239 | max_power to 64. | |
14240 | * config/riscv/riscv.h (MAX_POLY_VARIANT): New. | |
14241 | ||
14242 | 2023-10-13 Pan Li <pan2.li@intel.com> | |
14243 | ||
14244 | * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New | |
14245 | pattern for lfloor/lfloorf. | |
14246 | * config/riscv/riscv-protos.h (enum insn_type): New enum value. | |
14247 | (expand_vec_lfloor): New func decl for expanding lfloor. | |
14248 | * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl | |
14249 | for expanding lfloor. | |
14250 | ||
14251 | 2023-10-13 Pan Li <pan2.li@intel.com> | |
14252 | ||
14253 | * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New | |
14254 | pattern] for lceil/lceilf. | |
14255 | * config/riscv/riscv-protos.h (enum insn_type): New enum value. | |
14256 | (expand_vec_lceil): New func decl for expanding lceil. | |
14257 | * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl | |
14258 | for expanding lceil. | |
14259 | ||
14260 | 2023-10-12 Michael Meissner <meissner@linux.ibm.com> | |
14261 | ||
14262 | PR target/111778 | |
14263 | * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect | |
14264 | code from shifts that are undefined. | |
14265 | (can_be_built_by_li_lis_and_rldicr): Likewise. | |
14266 | (can_be_built_by_li_and_rldic): Protect code from shifts that | |
14267 | undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U. | |
14268 | ||
14269 | 2023-10-12 Alex Coplan <alex.coplan@arm.com> | |
14270 | ||
14271 | * reg-notes.def (NOALIAS): Correct comment. | |
14272 | ||
14273 | 2023-10-12 Jakub Jelinek <jakub@redhat.com> | |
14274 | ||
14275 | PR bootstrap/111787 | |
14276 | * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New | |
14277 | static data member. | |
14278 | (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise. | |
14279 | (wi::ints_for): Provide separate partial specializations for | |
14280 | generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that | |
14281 | and CONST_PRECISION, rather than using | |
14282 | int_traits <extended_tree <N> >::precision_type as the second template | |
14283 | argument. | |
14284 | * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New | |
14285 | static data member. | |
14286 | * double-int.h (wi::int_traits <double_int>::needs_write_val_arg): | |
14287 | Likewise. | |
14288 | ||
14289 | 2023-10-12 Mary Bennett <mary.bennett@embecosm.com> | |
14290 | ||
14291 | PR middle-end/111777 | |
14292 | * doc/extend.texi: Change subsubsection to subsection for | |
14293 | CORE-V built-ins. | |
14294 | ||
14295 | 2023-10-12 Tamar Christina <tamar.christina@arm.com> | |
14296 | ||
14297 | * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef. | |
14298 | ||
14299 | 2023-10-12 Jakub Jelinek <jakub@redhat.com> | |
14300 | ||
14301 | * wide-int.h (widest_int_storage <N>::write_val): If l is small | |
14302 | and there is space in u.val array, store a canary value at the | |
14303 | end when checking. | |
14304 | (widest_int_storage <N>::set_len): Check the canary hasn't been | |
14305 | overwritten. | |
14306 | ||
14307 | 2023-10-12 Jakub Jelinek <jakub@redhat.com> | |
14308 | ||
14309 | PR c/102989 | |
14310 | * wide-int.h: Adjust file comment. | |
14311 | (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS. | |
14312 | (WIDE_INT_MAX_INL_PRECISION): Define. | |
14313 | (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS | |
14314 | is smaller than WIDE_INT_MAX_ELTS. | |
14315 | (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS, | |
14316 | WIDEST_INT_MAX_PRECISION): Define. | |
14317 | (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers | |
14318 | to pass 0 as a new argument. | |
14319 | (class widest_int_storage): Likewise. | |
14320 | (widest_int, widest2_int): Change typedefs to use widest_int_storage | |
14321 | rather than fixed_wide_int_storage. | |
14322 | (enum wi::precision_type): Add INL_CONST_PRECISION enumerator. | |
14323 | (struct binary_traits): Add partial specializations for | |
14324 | INL_CONST_PRECISION. | |
14325 | (generic_wide_int): Add needs_write_val_arg static data member. | |
14326 | (int_traits): Likewise. | |
14327 | (wide_int_storage): Replace val non-static data member with a union | |
14328 | u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy | |
14329 | assignment operator and destructor. Add unsigned int argument to | |
14330 | write_val. | |
14331 | (wide_int_storage::wide_int_storage): Initialize precision to 0 | |
14332 | in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs. | |
14333 | Assert in non-default ctor T's precision_type is not | |
14334 | INL_CONST_PRECISION and allocate u.valp for large precision. Add | |
14335 | copy constructor. | |
14336 | (wide_int_storage::~wide_int_storage): New. | |
14337 | (wide_int_storage::operator=): Add copy assignment operator. In | |
14338 | assignment operator remove unnecessary {}s around STATIC_ASSERTs, | |
14339 | assert ctor T's precision_type is not INL_CONST_PRECISION and | |
14340 | if precision changes, deallocate and/or allocate u.valp. | |
14341 | (wide_int_storage::get_val): Return u.valp rather than u.val for | |
14342 | large precision. | |
14343 | (wide_int_storage::write_val): Likewise. Add an unused unsigned int | |
14344 | argument. | |
14345 | (wide_int_storage::set_len): Use write_val instead of writing val | |
14346 | directly. | |
14347 | (wide_int_storage::from, wide_int_storage::from_array): Adjust | |
14348 | write_val callers. | |
14349 | (wide_int_storage::create): Allocate u.valp for large precisions. | |
14350 | (wi::int_traits <wide_int_storage>::get_binary_precision): New. | |
14351 | (fixed_wide_int_storage::fixed_wide_int_storage): Make default | |
14352 | ctor defaulted. | |
14353 | (fixed_wide_int_storage::write_val): Add unused unsigned int argument. | |
14354 | (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array): | |
14355 | Adjust write_val callers. | |
14356 | (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New. | |
14357 | (WIDEST_INT): Define. | |
14358 | (widest_int_storage): New template class. | |
14359 | (wi::int_traits <widest_int_storage>): New. | |
14360 | (trailing_wide_int_storage::write_val): Add unused unsigned int | |
14361 | argument. | |
14362 | (wi::get_binary_precision): Use | |
14363 | wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision | |
14364 | rather than get_precision on get_binary_result. | |
14365 | (wi::copy): Adjust write_val callers. Don't call set_len if | |
14366 | needs_write_val_arg. | |
14367 | (wi::bit_not): If result.needs_write_val_arg, call write_val | |
14368 | again with upper bound estimate of len. | |
14369 | (wi::sext, wi::zext, wi::set_bit): Likewise. | |
14370 | (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not, | |
14371 | wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc, | |
14372 | wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc, | |
14373 | wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round, | |
14374 | wi::lshift, wi::lrshift, wi::arshift): Likewise. | |
14375 | (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg | |
14376 | is false. | |
14377 | (gt_ggc_mx, gt_pch_nx): Remove generic template for all | |
14378 | generic_wide_int, instead add functions and templates for each | |
14379 | storage of generic_wide_int. Make functions for | |
14380 | generic_wide_int <wide_int_storage> and templates for | |
14381 | generic_wide_int <widest_int_storage <N>> deleted. | |
14382 | (wi::mask, wi::shifted_mask): Adjust write_val calls. | |
14383 | * wide-int.cc (zeros): Decrease array size to 1. | |
14384 | (BLOCKS_NEEDED): Use CEIL. | |
14385 | (canonize): Use HOST_WIDE_INT_M1. | |
14386 | (wi::from_buffer): Pass 0 to write_val. | |
14387 | (wi::to_mpz): Use CEIL. | |
14388 | (wi::from_mpz): Likewise. Pass 0 to write_val. Use | |
14389 | WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS. | |
14390 | (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of | |
14391 | MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec | |
14392 | above WIDE_INT_MAX_INL_PRECISION estimate precision from | |
14393 | lengths of operands. Use XALLOCAVEC allocated buffers for | |
14394 | prec above WIDE_INT_MAX_INL_PRECISION. | |
14395 | (wi::divmod_internal): Likewise. | |
14396 | (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate | |
14397 | it from xlen and skip. | |
14398 | (rshift_large_common): Remove xprecision argument, add len | |
14399 | argument with len computed in caller. Don't return anything. | |
14400 | (wi::lrshift_large, wi::arshift_large): Compute len here | |
14401 | and pass it to rshift_large_common, for lengths above | |
14402 | WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible. | |
14403 | (assert_deceq, assert_hexeq): For lengths above | |
14404 | WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer. | |
14405 | (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of | |
14406 | WIDE_INT_MAX_PRECISION. | |
14407 | * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use | |
14408 | WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION. | |
14409 | * wide-int-print.cc (print_decs, print_decu, print_hex): For | |
14410 | lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer. | |
14411 | * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type | |
14412 | to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION. | |
14413 | (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of | |
14414 | WIDE_INT_MAX_PRECISION. | |
14415 | (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type | |
14416 | instead of hard coded CONST_PRECISION. | |
14417 | (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of | |
14418 | WIDE_INT_MAX_PRECISION. | |
14419 | (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather | |
14420 | than WIDE_INT_MAX_PRECISION. | |
14421 | (wi::ints_for::zero): Use | |
14422 | wi::int_traits <wi::extended_tree <N> >::precision_type instead of | |
14423 | wi::CONST_PRECISION. | |
14424 | * tree.cc (build_replicated_int_cst): Formatting fix. Use | |
14425 | WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS. | |
14426 | * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on | |
14427 | INTEGER_CSTs, TREE_VECs or SSA_NAMEs. | |
14428 | * double-int.h (wi::int_traits <double_int>::precision_type): Change | |
14429 | to INL_CONST_PRECISION from CONST_PRECISION. | |
14430 | * poly-int.h (struct poly_coeff_traits): Add partial specialization | |
14431 | for wi::INL_CONST_PRECISION. | |
14432 | * cfgloop.h (bound_wide_int): New typedef. | |
14433 | (struct nb_iter_bound): Change bound type from widest_int to | |
14434 | bound_wide_int. | |
14435 | (struct loop): Change nb_iterations_upper_bound, | |
14436 | nb_iterations_likely_upper_bound and nb_iterations_estimate type from | |
14437 | widest_int to bound_wide_int. | |
14438 | * cfgloop.cc (record_niter_bound): Return early if wi::min_precision | |
14439 | of i_bound is too large for bound_wide_int. Adjustments for the | |
14440 | widest_int to bound_wide_int type change in non-static data members. | |
14441 | (get_estimated_loop_iterations, get_max_loop_iterations, | |
14442 | get_likely_max_loop_iterations): Adjustments for the widest_int to | |
14443 | bound_wide_int type change in non-static data members. | |
14444 | * tree-vect-loop.cc (vect_transform_loop): Likewise. | |
14445 | * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use | |
14446 | XALLOCAVEC allocated buffer for i_bound len above | |
14447 | WIDE_INT_MAX_INL_ELTS. | |
14448 | (record_estimate): Return early if wi::min_precision of i_bound is too | |
14449 | large for bound_wide_int. Adjustments for the widest_int to | |
14450 | bound_wide_int type change in non-static data members. | |
14451 | (wide_int_cmp): Use bound_wide_int instead of widest_int. | |
14452 | (bound_index): Use bound_wide_int instead of widest_int. | |
14453 | (discover_iteration_bound_by_body_walk): Likewise. Use | |
14454 | widest_int::from to convert it to widest_int when passed to | |
14455 | record_niter_bound. | |
14456 | (maybe_lower_iteration_bound): Use widest_int::from to convert it to | |
14457 | widest_int when passed to record_niter_bound. | |
14458 | (estimate_numbers_of_iteration): Don't record upper bound if | |
14459 | loop->nb_iterations has too large precision for bound_wide_int. | |
14460 | (n_of_executions_at_most): Use widest_int::from. | |
14461 | * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for | |
14462 | the widest_int to bound_wide_int changes. | |
14463 | * match.pd (fold_sign_changed_comparison simplification): Use | |
14464 | wide_int::from on wi::to_wide instead of wi::to_widest. | |
14465 | * value-range.h (irange::maybe_resize): Avoid using memcpy on | |
14466 | non-trivially copyable elements. | |
14467 | * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated | |
14468 | buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE. | |
14469 | * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc): | |
14470 | Use wide_int::from on wi::to_wide instead of wi::to_widest. | |
14471 | * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width | |
14472 | before calling wi::udiv_trunc. | |
14473 | * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to | |
14474 | bound_wide_int type change in non-static data members. | |
14475 | * lto-streamer-in.cc (input_cfg): Likewise. | |
14476 | (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than | |
14477 | WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use | |
14478 | XALLOCAVEC allocated buffer. Formatting fix. | |
14479 | * data-streamer-in.cc (streamer_read_wide_int, | |
14480 | streamer_read_widest_int): Likewise. | |
14481 | * tree-affine.cc (aff_combination_expand): Use placement new to | |
14482 | construct name_expansion. | |
14483 | (free_name_expansion): Destruct name_expansion. | |
14484 | * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change | |
14485 | index type from widest_int to offset_int. | |
14486 | (class incr_info_d): Change incr type from widest_int to offset_int. | |
14487 | (alloc_cand_and_find_basis, backtrace_base_for_ref, | |
14488 | restructure_reference, slsr_process_ref, create_mul_ssa_cand, | |
14489 | create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand, | |
14490 | slsr_process_add, cand_abs_increment, replace_mult_candidate, | |
14491 | replace_unconditional_candidate, incr_vec_index, | |
14492 | create_add_on_incoming_edge, create_phi_basis_1, | |
14493 | replace_conditional_candidate, record_increment, | |
14494 | record_phi_increments_1, phi_incr_cost_1, phi_incr_cost, | |
14495 | lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis, | |
14496 | nearest_common_dominator_for_cands, insert_initializers, | |
14497 | all_phi_incrs_profitable_1, replace_one_candidate, | |
14498 | replace_profitable_candidates): Use offset_int rather than widest_int | |
14499 | and wi::to_offset rather than wi::to_widest. | |
14500 | * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than | |
14501 | 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC | |
14502 | allocated buffer. | |
14503 | * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new | |
14504 | to construct tree_niter_desc and destruct it on failure. | |
14505 | (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL. | |
14506 | * gengtype.cc (main): Remove widest_int handling. | |
14507 | * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use | |
14508 | WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS. | |
14509 | * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use | |
14510 | WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and | |
14511 | assert get_len () fits into it. | |
14512 | * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks): | |
14513 | For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC | |
14514 | allocated buffer. | |
14515 | * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use | |
14516 | wide_int::from on wi::to_wide instead of wi::to_widest. | |
14517 | * omp-general.cc (score_wide_int): New typedef. | |
14518 | (omp_context_compute_score): Use score_wide_int instead of widest_int | |
14519 | and adjust for those changes. | |
14520 | (struct omp_declare_variant_entry): Change score and | |
14521 | score_in_declare_simd_clone non-static data member type from widest_int | |
14522 | to score_wide_int. | |
14523 | (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use | |
14524 | score_wide_int instead of widest_int and adjust for those changes. | |
14525 | (omp_lto_output_declare_variant_alt): Likewise. | |
14526 | (omp_lto_input_declare_variant_alt): Likewise. | |
14527 | * godump.cc (go_output_typedef): Assert get_len () is smaller than | |
14528 | WIDE_INT_MAX_INL_ELTS. | |
14529 | ||
14530 | 2023-10-12 Pan Li <pan2.li@intel.com> | |
14531 | ||
14532 | * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New | |
14533 | pattern for lround/lroundf. | |
14534 | * config/riscv/riscv-protos.h (enum insn_type): New enum value. | |
14535 | (expand_vec_lround): New func decl for expanding lround. | |
14536 | * config/riscv/riscv-v.cc (expand_vec_lround): New func impl | |
14537 | for expanding lround. | |
14538 | ||
14539 | 2023-10-12 Jakub Jelinek <jakub@redhat.com> | |
14540 | ||
14541 | * dwarf2out.h (wide_int_ptr): Remove. | |
14542 | (dw_wide_int_ptr): New typedef. | |
14543 | (struct dw_val_node): Change type of val_wide from wide_int_ptr | |
14544 | to dw_wide_int_ptr. | |
14545 | (struct dw_wide_int): New type. | |
14546 | (dw_wide_int::elt): New method. | |
14547 | (dw_wide_int::operator ==): Likewise. | |
14548 | * dwarf2out.cc (get_full_len): Change argument type to | |
14549 | const dw_wide_int & from const wide_int &. Use CEIL. Call | |
14550 | get_precision method instead of calling wi::get_precision. | |
14551 | (alloc_dw_wide_int): New function. | |
14552 | (add_AT_wide): Change w argument type to const wide_int_ref & | |
14553 | from const wide_int &. Use alloc_dw_wide_int. | |
14554 | (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int. | |
14555 | (insert_wide_int): Change val argument type to const wide_int_ref & | |
14556 | from const wide_int &. | |
14557 | (add_const_value_attribute): Pass rtx_mode_t temporary directly to | |
14558 | add_AT_wide instead of using a temporary variable. | |
14559 | ||
14560 | 2023-10-12 Richard Biener <rguenther@suse.de> | |
14561 | ||
14562 | PR tree-optimization/111764 | |
14563 | * tree-vect-loop.cc (check_reduction_path): Remove the attempt | |
14564 | to allow x + x via special-casing of assigns. | |
14565 | ||
14566 | 2023-10-12 Hu, Lin1 <lin1.hu@intel.com> | |
14567 | ||
14568 | * common/config/i386/cpuinfo.h (get_available_features): | |
14569 | Detect USER_MSR. | |
14570 | * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New. | |
14571 | (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto. | |
14572 | (ix86_handle_option): Handle -musermsr. | |
14573 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
14574 | Add FEATURE_USER_MSR. | |
14575 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr. | |
14576 | * config.gcc: Add usermsrintrin.h | |
14577 | * config/i386/cpuid.h (bit_USER_MSR): New. | |
14578 | * config/i386/i386-builtin-types.def: | |
14579 | Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64). | |
14580 | * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): | |
14581 | Add __builtin_urdmsr and __builtin_uwrmsr. | |
14582 | * config/i386/i386-builtins.h (ix86_builtins): | |
14583 | Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR. | |
14584 | * config/i386/i386-c.cc (ix86_target_macros_internal): | |
14585 | Define __USER_MSR__. | |
14586 | * config/i386/i386-expand.cc (ix86_expand_builtin): | |
14587 | Handle new builtins. | |
14588 | * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR). | |
14589 | * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p): | |
14590 | Handle usermsr. | |
14591 | * config/i386/i386.md (urdmsr): New define_insn. | |
14592 | (uwrmsr): Ditto. | |
14593 | * config/i386/i386.opt: Add option -musermsr. | |
14594 | * config/i386/x86gprintrin.h: Include usermsrintrin.h | |
14595 | * doc/extend.texi: Document usermsr. | |
14596 | * doc/invoke.texi: Document -musermsr. | |
14597 | * doc/sourcebuild.texi: Document target usermsr. | |
14598 | * config/i386/usermsrintrin.h: New file. | |
14599 | ||
14600 | 2023-10-12 Yang Yujie <yangyujie@loongson.cn> | |
14601 | ||
14602 | * config.gcc: Add loongarch-driver.h to tm_files. | |
14603 | * config/loongarch/loongarch.h: Do not include loongarch-driver.h. | |
14604 | * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H) | |
14605 | instead of $(TM_H) for building generator programs. | |
14606 | ||
14607 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14608 | ||
14609 | PR target/111367 | |
14610 | * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed | |
14611 | instruction emission and incorporate to stack_protect_set<mode>. | |
14612 | (stack_protect_setdi): Rename to ... | |
14613 | (stack_protect_set<mode>): ... this, adjust constraint. | |
14614 | (stack_protect_testsi): Support prefixed instruction emission and | |
14615 | incorporate to stack_protect_test<mode>. | |
14616 | (stack_protect_testdi): Rename to ... | |
14617 | (stack_protect_test<mode>): ... this, adjust constraint. | |
14618 | ||
14619 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14620 | ||
14621 | * tree-vect-stmts.cc (vectorizable_store): Consider generated | |
14622 | VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as | |
14623 | vec_perm. | |
14624 | ||
14625 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14626 | ||
14627 | * tree-vect-stmts.cc (vect_model_store_cost): Remove. | |
14628 | (vectorizable_store): Adjust the costing for the remaining memory | |
14629 | access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}. | |
14630 | ||
14631 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14632 | ||
14633 | * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never | |
14634 | get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related | |
14635 | handlings. | |
14636 | (vectorizable_store): Adjust the cost handling on | |
14637 | VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost. | |
14638 | ||
14639 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14640 | ||
14641 | * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never | |
14642 | get VMAT_LOAD_STORE_LANES. | |
14643 | (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES | |
14644 | without calling vect_model_store_cost. Factor out new lambda function | |
14645 | update_prologue_cost. | |
14646 | ||
14647 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14648 | ||
14649 | * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get | |
14650 | VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their | |
14651 | related handlings. | |
14652 | (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE | |
14653 | and VMAT_STRIDED_SLP without calling vect_model_store_cost. | |
14654 | ||
14655 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14656 | ||
14657 | * tree-vect-stmts.cc (vectorizable_store): Adjust costing on | |
14658 | vectorizable_scan_store without calling vect_model_store_cost | |
14659 | any more. | |
14660 | ||
14661 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14662 | ||
14663 | * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get | |
14664 | VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related | |
14665 | handlings and the related parameter gs_info. | |
14666 | (vect_build_scatter_store_calls): Add the handlings on costing with | |
14667 | one more argument cost_vec. | |
14668 | (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER | |
14669 | without calling vect_model_store_cost any more. | |
14670 | ||
14671 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14672 | ||
14673 | * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call | |
14674 | to vect_model_store_cost down to some different transform paths | |
14675 | according to the handlings of different vect_memory_access_types | |
14676 | or some special handling need. | |
14677 | ||
14678 | 2023-10-12 Kewen Lin <linkw@linux.ibm.com> | |
14679 | ||
14680 | * tree-vect-stmts.cc (vectorizable_store): Ensure the generated | |
14681 | vector store for some case of VMAT_ELEMENTWISE is supported. | |
14682 | ||
14683 | 2023-10-12 Mo, Zewei <zewei.mo@intel.com> | |
14684 | Hu Lin1 <lin1.hu@intel.com> | |
14685 | Hongyu Wang <hongyu.wang@intel.com> | |
14686 | ||
14687 | * config/i386/i386.cc (gen_push2): New function to emit push2 | |
14688 | and adjust cfa offset. | |
14689 | (ix86_pro_and_epilogue_can_use_push2_pop2): New function to | |
14690 | determine whether push2/pop2 can be used. | |
14691 | (ix86_compute_frame_layout): Adjust preferred stack boundary | |
14692 | and stack alignment needed for push2/pop2. | |
14693 | (ix86_emit_save_regs): Emit push2 when available. | |
14694 | (ix86_emit_restore_reg_using_pop2): New function to emit pop2 | |
14695 | and adjust cfa info. | |
14696 | (ix86_emit_restore_regs_using_pop2): New function to loop | |
14697 | through the saved regs and call above. | |
14698 | (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2 | |
14699 | when push2pop2 available. | |
14700 | * config/i386/i386.md (push2_di): New pattern for push2. | |
14701 | (pop2_di): Likewise for pop2. | |
14702 | ||
14703 | 2023-10-12 Pan Li <pan2.li@intel.com> | |
14704 | ||
14705 | * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from. | |
14706 | (lrint<mode><v_i_l_ll_convert>2): Rename to. | |
14707 | * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT. | |
14708 | ||
14709 | 2023-10-11 Kito Cheng <kito.cheng@sifive.com> | |
14710 | ||
14711 | * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New. | |
14712 | ||
14713 | 2023-10-11 Jeff Law <jlaw@ventanamicro.com> | |
14714 | ||
14715 | * config/riscv/riscv.md (jump): Adjust sequence to use a "jump" | |
14716 | pseudo op instead of a "call" pseudo op. | |
14717 | ||
14718 | 2023-10-11 Kito Cheng <kito.cheng@sifive.com> | |
14719 | ||
14720 | * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext): | |
14721 | New. | |
14722 | (riscv_subset_list::parse_single_multiletter_ext): Ditto. | |
14723 | (riscv_subset_list::clone): Ditto. | |
14724 | (riscv_subset_list::parse_single_ext): Ditto. | |
14725 | (riscv_subset_list::set_loc): Ditto. | |
14726 | (riscv_set_arch_by_subset_list): Ditto. | |
14727 | * common/config/riscv/riscv-common.cc | |
14728 | (riscv_subset_list::parse_single_std_ext): New. | |
14729 | (riscv_subset_list::parse_single_multiletter_ext): Ditto. | |
14730 | (riscv_subset_list::clone): Ditto. | |
14731 | (riscv_subset_list::parse_single_ext): Ditto. | |
14732 | (riscv_subset_list::set_loc): Ditto. | |
14733 | (riscv_set_arch_by_subset_list): Ditto. | |
14734 | ||
14735 | 2023-10-11 Kito Cheng <kito.cheng@sifive.com> | |
14736 | ||
14737 | * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting | |
14738 | from argument rather than get setting from global setting. | |
14739 | (riscv_override_options_internal): New, splited from | |
14740 | riscv_override_options, also take a gcc_options argument. | |
14741 | (riscv_option_override): Splited most part to | |
14742 | riscv_override_options_internal. | |
14743 | ||
14744 | 2023-10-11 Kito Cheng <kito.cheng@sifive.com> | |
14745 | ||
14746 | * doc/options.texi (Mask): Document TARGET_<NAME>_P and | |
14747 | TARGET_<NAME>_OPTS_P. | |
14748 | (InverseMask): Ditto. | |
14749 | * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and | |
14750 | TARGET_<NAME>_OPTS_P macro. | |
14751 | (InverseMask): Ditto. | |
14752 | ||
14753 | 2023-10-11 Andrew Pinski <pinskia@gmail.com> | |
14754 | ||
14755 | PR tree-optimization/111282 | |
14756 | * match.pd (`a & ~(a ^ b)`, `a & (a == b)`, | |
14757 | `a & ((~a) ^ b)`): New patterns. | |
14758 | ||
14759 | 2023-10-11 Mary Bennett <mary.bennett@embecosm.com> | |
14760 | ||
14761 | * common/config/riscv/riscv-common.cc: Add the XCValu | |
14762 | extension. | |
14763 | * config/riscv/constraints.md: Add builtins for the XCValu | |
14764 | extension. | |
14765 | * config/riscv/predicates.md (immediate_register_operand): | |
14766 | Likewise. | |
14767 | * config/riscv/corev.def: Likewise. | |
14768 | * config/riscv/corev.md: Likewise. | |
14769 | * config/riscv/riscv-builtins.cc (AVAIL): Likewise. | |
14770 | (RISCV_ATYPE_UHI): Likewise. | |
14771 | * config/riscv/riscv-ftypes.def: Likewise. | |
14772 | * config/riscv/riscv.opt: Likewise. | |
14773 | * config/riscv/riscv.cc (riscv_print_operand): Likewise. | |
14774 | * doc/extend.texi: Add XCValu documentation. | |
14775 | * doc/sourcebuild.texi: Likewise. | |
14776 | ||
14777 | 2023-10-11 Mary Bennett <mary.bennett@embecosm.com> | |
14778 | ||
14779 | * common/config/riscv/riscv-common.cc: Add XCVmac. | |
14780 | * config/riscv/riscv-ftypes.def: Add XCVmac builtins. | |
14781 | * config/riscv/riscv-builtins.cc: Likewise. | |
14782 | * config/riscv/riscv.md: Likewise. | |
14783 | * config/riscv/riscv.opt: Likewise. | |
14784 | * doc/extend.texi: Add XCVmac builtin documentation. | |
14785 | * doc/sourcebuild.texi: Likewise. | |
14786 | * config/riscv/corev.def: New file. | |
14787 | * config/riscv/corev.md: New file. | |
14788 | ||
14789 | 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
14790 | ||
14791 | * config/riscv/autovec.md: Fix index bug. | |
14792 | * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function. | |
14793 | * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug. | |
14794 | (gather_scatter_valid_offset_mode_p): New function. | |
14795 | ||
14796 | 2023-10-11 Pan Li <pan2.li@intel.com> | |
14797 | ||
14798 | * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern | |
14799 | for lrint/lintf. | |
14800 | * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl | |
14801 | for expanding lint. | |
14802 | * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl | |
14803 | for vfcvt.x.f.v. | |
14804 | (expand_vec_lrint): New function impl for expanding lint. | |
14805 | * config/riscv/vector-iterators.md: New mode attr and iterator. | |
14806 | ||
14807 | 2023-10-11 Richard Biener <rguenther@suse.de> | |
14808 | Jakub Jelinek <jakub@redhat.com> | |
14809 | ||
14810 | PR tree-optimization/111519 | |
14811 | * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse | |
14812 | argument and pass it through to recursive calls and | |
14813 | count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but | |
14814 | change stmt for gimple_assign_single_p statements for which we don't | |
14815 | immediately punt. | |
14816 | (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass | |
14817 | it through to recursive calls and count_nonzero_bytes calls. Don't | |
14818 | use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't | |
14819 | shadow the stmt argument. | |
14820 | ||
14821 | 2023-10-11 Roger Sayle <roger@nextmovesoftware.com> | |
14822 | ||
14823 | PR middle-end/101955 | |
14824 | PR tree-optimization/106245 | |
14825 | * simplify-rtx.cc (simplify_relational_operation_1): Simplify | |
14826 | the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1). | |
14827 | ||
14828 | 2023-10-11 liuhongt <hongtao.liu@intel.com> | |
14829 | ||
14830 | PR target/111745 | |
14831 | * config/i386/mmx.md (divv4hf3): Refine predicate of | |
14832 | operands[2] with register_operand. | |
14833 | ||
14834 | 2023-10-10 Andrew Waterman <andrew@sifive.com> | |
14835 | Philipp Tomsich <philipp.tomsich@vrull.eu> | |
14836 | Jeff Law <jlaw@ventanamicro.com> | |
14837 | ||
14838 | * config/riscv/riscv.cc (struct machine_function): Track if a | |
14839 | far-branch/jump is used within a function (and $ra needs to be | |
14840 | saved). | |
14841 | (riscv_print_operand): Implement 'N' (inverse integer branch). | |
14842 | (riscv_far_jump_used_p): Implement. | |
14843 | (riscv_save_return_addr_reg_p): New function. | |
14844 | (riscv_save_reg_p): Use riscv_save_return_addr_reg_p. | |
14845 | * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra. | |
14846 | (CALL_USED_REGISTERS): Update $ra. | |
14847 | * config/riscv/riscv.md: Add new types "ret" and "jalr". | |
14848 | (length attribute): Handle long conditional and unconditional | |
14849 | branches. | |
14850 | (conditional branch pattern): Handle case where jump can not | |
14851 | reach the intended target. | |
14852 | (indirect_jump, tablejump): Use new "jalr" type. | |
14853 | (simple_return): Use new "ret" type. | |
14854 | (simple_return_internal, eh_return_internal): Likewise. | |
14855 | (gpr_restore_return, riscv_mret): Likewise. | |
14856 | (riscv_uret, riscv_sret): Likewise. | |
14857 | * config/riscv/generic.md (generic_branch): Also recognize jalr & ret | |
14858 | types. | |
14859 | * config/riscv/sifive-7.md (sifive_7_jump): Likewise. | |
14860 | ||
14861 | 2023-10-10 Andrew Pinski <pinskia@gmail.com> | |
14862 | ||
14863 | PR tree-optimization/111679 | |
14864 | * match.pd (`a | ((~a) ^ b)`): New pattern. | |
14865 | ||
14866 | 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
14867 | ||
14868 | PR target/111751 | |
14869 | * config/riscv/autovec.md: Add VLS BOOL modes. | |
14870 | ||
14871 | 2023-10-10 Richard Biener <rguenther@suse.de> | |
14872 | ||
14873 | PR tree-optimization/111751 | |
14874 | * fold-const.cc (fold_view_convert_expr): Up the buffer size | |
14875 | to 128 bytes. | |
14876 | * tree-ssa-sccvn.cc (visit_reference_op_load): Special case | |
14877 | constants, giving up when re-interpretation to the target type | |
14878 | fails. | |
14879 | ||
14880 | 2023-10-10 Richard Biener <rguenther@suse.de> | |
14881 | ||
14882 | PR tree-optimization/111751 | |
14883 | * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt | |
14884 | BLKmode result from the padding bits check. | |
14885 | ||
14886 | 2023-10-10 Claudiu Zissulescu <claziss@gmail.com> | |
14887 | ||
14888 | * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with | |
14889 | the first operand. | |
14890 | * config/arc/arc.md (addsi_compare): Make pattern canonical. | |
14891 | (addsi_compare_2): Fix identation, constraint letters. | |
14892 | (addsi_compare_3): Likewise. | |
14893 | ||
14894 | 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com> | |
14895 | ||
14896 | * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons | |
14897 | * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count | |
14898 | when scaling loop profile | |
14899 | ||
14900 | 2023-10-09 Andrew MacLeod <amacleod@redhat.com> | |
14901 | ||
14902 | PR tree-optimization/111694 | |
14903 | * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust | |
14904 | equivalence range. | |
14905 | * value-relation.cc (adjust_equivalence_range): New. | |
14906 | * value-relation.h (adjust_equivalence_range): New prototype. | |
14907 | ||
14908 | 2023-10-09 Andrew MacLeod <amacleod@redhat.com> | |
14909 | ||
14910 | * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do | |
14911 | not call get_identity_relation. | |
14912 | (gori_compute::compute_operand2_range): Ditto. | |
14913 | * value-relation.cc (get_identity_relation): Remove. | |
14914 | * value-relation.h (get_identity_relation): Remove protyotype. | |
14915 | ||
14916 | 2023-10-09 Robin Dapp <rdapp@ventanamicro.com> | |
14917 | ||
14918 | * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter. | |
14919 | * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): | |
14920 | Add generic_ooo. | |
14921 | * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement | |
14922 | scheduler hook. | |
14923 | (TARGET_SCHED_ADJUST_COST): Define. | |
14924 | * config/riscv/riscv.md (no,yes"): Include generic-ooo.md | |
14925 | * config/riscv/riscv.opt: Add -madjust-lmul-cost. | |
14926 | * config/riscv/generic-ooo.md: New file. | |
14927 | * config/riscv/vector.md: Add vsetvl_pre. | |
14928 | ||
14929 | 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
14930 | ||
14931 | * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro. | |
14932 | * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern. | |
14933 | * config/riscv/vector.md (movmisalign<mode>): New pattern. | |
14934 | ||
14935 | 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
14936 | ||
14937 | * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI | |
14938 | directives for store-pair instruction. | |
14939 | ||
14940 | 2023-10-09 Richard Biener <rguenther@suse.de> | |
14941 | ||
14942 | PR tree-optimization/111715 | |
14943 | * alias.cc (reference_alias_ptr_type_1): When we have | |
14944 | a type-punning ref at the base search for the access | |
14945 | path part that's still semantically valid. | |
14946 | ||
14947 | 2023-10-09 Pan Li <pan2.li@intel.com> | |
14948 | ||
14949 | * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl | |
14950 | for shuffle bswap. | |
14951 | (expand_vec_perm_const_1): Add handling for shuffle bswap pattern. | |
14952 | ||
14953 | 2023-10-09 Roger Sayle <roger@nextmovesoftware.com> | |
14954 | ||
14955 | * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by | |
14956 | one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR | |
14957 | or -Oz. | |
14958 | (ix86_split_lshr): Likewise, split shifts by one bit into | |
14959 | lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz. | |
14960 | * config/i386/i386.h (TARGET_USE_RCR): New backend macro. | |
14961 | * config/i386/i386.md (rcrsi2): New define_insn for rcrl. | |
14962 | (rcrdi2): New define_insn for rcrq. | |
14963 | (<anyshiftrt><mode>3_carry): New define_insn for right shifts that | |
14964 | set the carry flag from the least significant bit, modelled using | |
14965 | UNSPEC_CC_NE. | |
14966 | * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter | |
14967 | controlling use of rcr 1 vs. shrd, which is significantly faster on | |
14968 | AMD processors. | |
14969 | ||
14970 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
14971 | ||
14972 | * config/i386/i386.opt: Allow -mno-evex512. | |
14973 | ||
14974 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
14975 | Hu, Lin1 <lin1.hu@intel.com> | |
14976 | ||
14977 | * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512. | |
14978 | (VFH): Ditto. | |
14979 | (VF2H): Ditto. | |
14980 | (VFH_AVX512VL): Ditto. | |
14981 | (VHFBF): Ditto. | |
14982 | (VHF_AVX512VL): Ditto. | |
14983 | (VI2H_AVX512VL): Ditto. | |
14984 | (VI2F_256_512): Ditto. | |
14985 | (VF48_I1248): Remove unused iterator. | |
14986 | (VF48H_AVX512VL): Add TARGET_EVEX512. | |
14987 | (VF_AVX512): Remove unused iterator. | |
14988 | (REDUC_PLUS_MODE): Add TARGET_EVEX512. | |
14989 | (REDUC_SMINMAX_MODE): Ditto. | |
14990 | (FMAMODEM): Ditto. | |
14991 | (VFH_SF_AVX512VL): Ditto. | |
14992 | (VEC_PERM_AVX2): Ditto. | |
14993 | ||
14994 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
14995 | Hu, Lin1 <lin1.hu@intel.com> | |
14996 | ||
14997 | * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512. | |
14998 | (VI8_FVL): Ditto. | |
14999 | (VI1_AVX512F): Ditto. | |
15000 | (VI1_AVX512VNNI): Ditto. | |
15001 | (VI1_AVX512VL_F): Ditto. | |
15002 | (VI12_VI48F_AVX512VL): Ditto. | |
15003 | (*avx512f_permvar_truncv32hiv32qi_1): Ditto. | |
15004 | (sdot_prod<mode>): Ditto. | |
15005 | (VEC_PERM_AVX2): Ditto. | |
15006 | (VPERMI2): Ditto. | |
15007 | (VPERMI2I): Ditto. | |
15008 | (vpmadd52<vpmadd52type>v8di): Ditto. | |
15009 | (usdot_prod<mode>): Ditto. | |
15010 | (vpdpbusd_v16si): Ditto. | |
15011 | (vpdpbusds_v16si): Ditto. | |
15012 | (vpdpwssd_v16si): Ditto. | |
15013 | (vpdpwssds_v16si): Ditto. | |
15014 | (VI48_AVX512VP2VL): Ditto. | |
15015 | (avx512vp2intersect_2intersectv16si): Ditto. | |
15016 | (VF_AVX512BF16VL): Ditto. | |
15017 | (VF1_AVX512_256): Ditto. | |
15018 | ||
15019 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15020 | ||
15021 | * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): | |
15022 | Make sure there is EVEX512 enabled. | |
15023 | (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512. | |
15024 | * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask | |
15025 | when !TARGET_EVEX512. | |
15026 | * config/i386/i386.md (avx512bw_512): New. | |
15027 | (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512. | |
15028 | (*zero_extendsidi2): Change isa to avx512bw_512. | |
15029 | (kmov_isa): Ditto. | |
15030 | (*anddi_1): Ditto. | |
15031 | (*andn<mode>_1): Change isa to kmov_isa. | |
15032 | (*<code><mode>_1): Ditto. | |
15033 | (*notxor<mode>_1): Ditto. | |
15034 | (*one_cmpl<mode>2_1): Ditto. | |
15035 | (*one_cmplsi2_1_zext): Change isa to avx512bw_512. | |
15036 | (*ashl<mode>3_1): Change isa to kmov_isa. | |
15037 | (*lshr<mode>3_1): Ditto. | |
15038 | * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512. | |
15039 | (VI1248_AVX512VLBW): Ditto. | |
15040 | (VHFBF_AVX512VL): Ditto. | |
15041 | (VI): Ditto. | |
15042 | (VIHFBF): Ditto. | |
15043 | (VI_AVX2): Ditto. | |
15044 | (VI1_AVX512): Ditto. | |
15045 | (VI12_256_512_AVX512VL): Ditto. | |
15046 | (VI2_AVX2_AVX512BW): Ditto. | |
15047 | (VI2_AVX512VNNIBW): Ditto. | |
15048 | (VI2_AVX512VL): Ditto. | |
15049 | (VI2HFBF_AVX512VL): Ditto. | |
15050 | (VI8_AVX2_AVX512BW): Ditto. | |
15051 | (VIMAX_AVX2_AVX512BW): Ditto. | |
15052 | (VIMAX_AVX512VL): Ditto. | |
15053 | (VI12_AVX2_AVX512BW): Ditto. | |
15054 | (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto. | |
15055 | (VI248_AVX512VL): Ditto. | |
15056 | (VI248_AVX512VLBW): Ditto. | |
15057 | (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto. | |
15058 | (VI248_AVX512BW): Ditto. | |
15059 | (VI248_AVX512BW_AVX512VL): Ditto. | |
15060 | (VI248_512): Ditto. | |
15061 | (VI124_256_AVX512F_AVX512BW): Ditto. | |
15062 | (VI_AVX512BW): Ditto. | |
15063 | (VIHFBF_AVX512BW): Ditto. | |
15064 | (SWI1248_AVX512BWDQ): Ditto. | |
15065 | (SWI1248_AVX512BW): Ditto. | |
15066 | (SWI1248_AVX512BWDQ2): Ditto. | |
15067 | (*knotsi_1_zext): Ditto. | |
15068 | (define_split for zero_extend + not): Ditto. | |
15069 | (kunpckdi): Ditto. | |
15070 | (REDUC_SMINMAX_MODE): Ditto. | |
15071 | (VEC_EXTRACT_MODE): Ditto. | |
15072 | (*avx512bw_permvar_truncv16siv16hi_1): Ditto. | |
15073 | (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto. | |
15074 | (truncv32hiv32qi2): Ditto. | |
15075 | (avx512bw_<code>v32hiv32qi2): Ditto. | |
15076 | (avx512bw_<code>v32hiv32qi2_mask): Ditto. | |
15077 | (avx512bw_<code>v32hiv32qi2_mask_store): Ditto. | |
15078 | (usadv64qi): Ditto. | |
15079 | (VEC_PERM_AVX2): Ditto. | |
15080 | (AVX512ZEXTMASK): Ditto. | |
15081 | (SWI24_MASK): New. | |
15082 | (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK. | |
15083 | (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512. | |
15084 | (avx512bw_packssdw<mask_name>): Ditto. | |
15085 | (avx512bw_interleave_highv64qi<mask_name>): Ditto. | |
15086 | (avx512bw_interleave_lowv64qi<mask_name>): Ditto. | |
15087 | (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto. | |
15088 | (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto. | |
15089 | (vec_unpacks_lo_di): Ditto. | |
15090 | (SWI48x_MASK): New. | |
15091 | (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK. | |
15092 | (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512. | |
15093 | (VI1248_AVX512VL_AVX512BW): Ditto. | |
15094 | (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto. | |
15095 | (*avx512bw_zero_extendv32qiv32hi2_1): Ditto. | |
15096 | (*avx512bw_zero_extendv32qiv32hi2_2): Ditto. | |
15097 | (<insn>v32qiv32hi2): Ditto. | |
15098 | (pbroadcast_evex_isa): Change isa attribute to avx512bw_512. | |
15099 | (VPERMI2): Add TARGET_EVEX512. | |
15100 | (VPERMI2I): Ditto. | |
15101 | ||
15102 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15103 | ||
15104 | * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3): | |
15105 | Add TARGET_EVEX512 for 512 bit usage. | |
15106 | * config/i386/i386.cc (standard_sse_constant_opcode): Ditto. | |
15107 | * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto. | |
15108 | (VF1_128_256VL): Ditto. | |
15109 | (VF2_AVX512VL): Ditto. | |
15110 | (VI8_256_512): Ditto. | |
15111 | (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>): | |
15112 | Ditto. | |
15113 | (AVX512_VEC): Ditto. | |
15114 | (AVX512_VEC_2): Ditto. | |
15115 | (VI4F_BRCST32x2): Ditto. | |
15116 | (VI8F_BRCST64x2): Ditto. | |
15117 | ||
15118 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15119 | ||
15120 | * config/i386/i386-builtins.cc | |
15121 | (ix86_vectorize_builtin_gather): Disable 512 bit gather | |
15122 | when !TARGET_EVEX512. | |
15123 | * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode): | |
15124 | Add TARGET_EVEX512. | |
15125 | (ix86_expand_int_sse_cmp): Ditto. | |
15126 | (ix86_expand_vector_init_one_nonzero): Disable subroutine | |
15127 | when !TARGET_EVEX512. | |
15128 | (ix86_emit_swsqrtsf): Add TARGET_EVEX512. | |
15129 | (ix86_vectorize_vec_perm_const): Disable subroutine when | |
15130 | !TARGET_EVEX512. | |
15131 | * config/i386/i386.cc | |
15132 | (standard_sse_constant_p): Add TARGET_EVEX512. | |
15133 | (standard_sse_constant_opcode): Ditto. | |
15134 | (ix86_get_ssemov): Ditto. | |
15135 | (ix86_legitimate_constant_p): Ditto. | |
15136 | (ix86_vectorize_builtin_scatter): Diable 512 bit scatter | |
15137 | when !TARGET_EVEX512. | |
15138 | * config/i386/i386.md (avx512f_512): New. | |
15139 | (movxi): Add TARGET_EVEX512. | |
15140 | (*movxi_internal_avx512f): Ditto. | |
15141 | (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode | |
15142 | for alternative 13. | |
15143 | (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for | |
15144 | alternative 9. | |
15145 | (*movhi_internal): Change alternative 11 to *Yv. | |
15146 | (*movdf_internal): Change alternative 12 to Yv. | |
15147 | (*movsf_internal): Change alternative 5 to Yv. Adjust mode for | |
15148 | alternative 5 and 6. | |
15149 | (*mov<mode>_internal): Change alternative 4 to Yv. | |
15150 | (define_split for convert SF to DF): Add TARGET_EVEX512. | |
15151 | (extendbfsf2_1): Ditto. | |
15152 | * config/i386/predicates.md (bcst_mem_operand): Disable predicate | |
15153 | for 512 bit when !TARGET_EVEX512. | |
15154 | * config/i386/sse.md (VMOVE): Add TARGET_EVEX512. | |
15155 | (V48_AVX512VL): Ditto. | |
15156 | (V48_256_512_AVX512VL): Ditto. | |
15157 | (V48H_AVX512VL): Ditto. | |
15158 | (VI12_AVX512VL): Ditto. | |
15159 | (V): Ditto. | |
15160 | (V_512): Ditto. | |
15161 | (V_256_512): Ditto. | |
15162 | (VF): Ditto. | |
15163 | (VF1_VF2_AVX512DQ): Ditto. | |
15164 | (VFH): Ditto. | |
15165 | (VFB): Ditto. | |
15166 | (VF1): Ditto. | |
15167 | (VF1_AVX2): Ditto. | |
15168 | (VF2): Ditto. | |
15169 | (VF2H): Ditto. | |
15170 | (VF2_512_256): Ditto. | |
15171 | (VF2_512_256VL): Ditto. | |
15172 | (VF_512): Ditto. | |
15173 | (VFB_512): Ditto. | |
15174 | (VI48_AVX512VL): Ditto. | |
15175 | (VI1248_AVX512VLBW): Ditto. | |
15176 | (VF_AVX512VL): Ditto. | |
15177 | (VFH_AVX512VL): Ditto. | |
15178 | (VF1_AVX512VL): Ditto. | |
15179 | (VI): Ditto. | |
15180 | (VIHFBF): Ditto. | |
15181 | (VI_AVX2): Ditto. | |
15182 | (VI8): Ditto. | |
15183 | (VI8_AVX512VL): Ditto. | |
15184 | (VI2_AVX512F): Ditto. | |
15185 | (VI4_AVX512F): Ditto. | |
15186 | (VI4_AVX512VL): Ditto. | |
15187 | (VI48_AVX512F_AVX512VL): Ditto. | |
15188 | (VI8_AVX2_AVX512F): Ditto. | |
15189 | (VI8_AVX_AVX512F): Ditto. | |
15190 | (V8FI): Ditto. | |
15191 | (V16FI): Ditto. | |
15192 | (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto. | |
15193 | (VI248_AVX512VLBW): Ditto. | |
15194 | (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto. | |
15195 | (VI248_AVX512BW): Ditto. | |
15196 | (VI248_AVX512BW_AVX512VL): Ditto. | |
15197 | (VI48_AVX512F): Ditto. | |
15198 | (VI48_AVX_AVX512F): Ditto. | |
15199 | (VI12_AVX_AVX512F): Ditto. | |
15200 | (VI148_512): Ditto. | |
15201 | (VI124_256_AVX512F_AVX512BW): Ditto. | |
15202 | (VI48_512): Ditto. | |
15203 | (VI_AVX512BW): Ditto. | |
15204 | (VIHFBF_AVX512BW): Ditto. | |
15205 | (VI4F_256_512): Ditto. | |
15206 | (VI48F_256_512): Ditto. | |
15207 | (VI48F): Ditto. | |
15208 | (VI12_VI48F_AVX512VL): Ditto. | |
15209 | (V32_512): Ditto. | |
15210 | (AVX512MODE2P): Ditto. | |
15211 | (STORENT_MODE): Ditto. | |
15212 | (REDUC_PLUS_MODE): Ditto. | |
15213 | (REDUC_SMINMAX_MODE): Ditto. | |
15214 | (*andnot<mode>3): Change isa attribute to avx512f_512. | |
15215 | (*andnot<mode>3): Ditto. | |
15216 | (<code><mode>3): Ditto. | |
15217 | (<code>tf3): Ditto. | |
15218 | (FMAMODEM): Add TARGET_EVEX512. | |
15219 | (FMAMODE_AVX512): Ditto. | |
15220 | (VFH_SF_AVX512VL): Ditto. | |
15221 | (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto. | |
15222 | (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>): | |
15223 | Ditto. | |
15224 | (avx512f_cvtdq2pd512_2): Ditto. | |
15225 | (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto. | |
15226 | (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>): | |
15227 | Ditto. | |
15228 | (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto. | |
15229 | (vec_unpacks_lo_v16sf): Ditto. | |
15230 | (vec_unpacks_hi_v16sf): Ditto. | |
15231 | (vec_unpacks_float_hi_v16si): Ditto. | |
15232 | (vec_unpacks_float_lo_v16si): Ditto. | |
15233 | (vec_unpacku_float_hi_v16si): Ditto. | |
15234 | (vec_unpacku_float_lo_v16si): Ditto. | |
15235 | (vec_pack_sfix_trunc_v8df): Ditto. | |
15236 | (avx512f_vec_pack_sfix_v8df): Ditto. | |
15237 | (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto. | |
15238 | (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto. | |
15239 | (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto. | |
15240 | (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto. | |
15241 | (AVX512_VEC): Ditto. | |
15242 | (AVX512_VEC_2): Ditto. | |
15243 | (vec_extract_lo_v64qi): Ditto. | |
15244 | (vec_extract_hi_v64qi): Ditto. | |
15245 | (VEC_EXTRACT_MODE): Ditto. | |
15246 | (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto. | |
15247 | (avx512f_movddup512<mask_name>): Ditto. | |
15248 | (avx512f_unpcklpd512<mask_name>): Ditto. | |
15249 | (*<avx512>_vternlog<mode>_all): Ditto. | |
15250 | (*<avx512>_vpternlog<mode>_1): Ditto. | |
15251 | (*<avx512>_vpternlog<mode>_2): Ditto. | |
15252 | (*<avx512>_vpternlog<mode>_3): Ditto. | |
15253 | (avx512f_shufps512_mask): Ditto. | |
15254 | (avx512f_shufps512_1<mask_name>): Ditto. | |
15255 | (avx512f_shufpd512_mask): Ditto. | |
15256 | (avx512f_shufpd512_1<mask_name>): Ditto. | |
15257 | (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto. | |
15258 | (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto. | |
15259 | (vec_dupv2df<mask_name>): Ditto. | |
15260 | (trunc<pmov_src_lower><mode>2): Ditto. | |
15261 | (*avx512f_<code><pmov_src_lower><mode>2): Ditto. | |
15262 | (*avx512f_vpermvar_truncv8div8si_1): Ditto. | |
15263 | (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto. | |
15264 | (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto. | |
15265 | (truncv8div8qi2): Ditto. | |
15266 | (avx512f_<code>v8div16qi2): Ditto. | |
15267 | (*avx512f_<code>v8div16qi2_store_1): Ditto. | |
15268 | (*avx512f_<code>v8div16qi2_store_2): Ditto. | |
15269 | (avx512f_<code>v8div16qi2_mask): Ditto. | |
15270 | (*avx512f_<code>v8div16qi2_mask_1): Ditto. | |
15271 | (*avx512f_<code>v8div16qi2_mask_store_1): Ditto. | |
15272 | (avx512f_<code>v8div16qi2_mask_store_2): Ditto. | |
15273 | (vec_widen_umult_even_v16si<mask_name>): Ditto. | |
15274 | (*vec_widen_umult_even_v16si<mask_name>): Ditto. | |
15275 | (vec_widen_smult_even_v16si<mask_name>): Ditto. | |
15276 | (*vec_widen_smult_even_v16si<mask_name>): Ditto. | |
15277 | (VEC_PERM_AVX2): Ditto. | |
15278 | (one_cmpl<mode>2): Ditto. | |
15279 | (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto. | |
15280 | (*one_cmpl<mode>2_pternlog_false_dep): Ditto. | |
15281 | (define_split to xor): Ditto. | |
15282 | (*andnot<mode>3): Ditto. | |
15283 | (define_split for ior): Ditto. | |
15284 | (*iornot<mode>3): Ditto. | |
15285 | (*xnor<mode>3): Ditto. | |
15286 | (*<nlogic><mode>3): Ditto. | |
15287 | (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto. | |
15288 | (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto. | |
15289 | (avx512f_pshufdv3_mask): Ditto. | |
15290 | (avx512f_pshufd_1<mask_name>): Ditto. | |
15291 | (*vec_extractv4ti): Ditto. | |
15292 | (VEXTRACTI128_MODE): Ditto. | |
15293 | (define_split to vec_extract): Ditto. | |
15294 | (VI1248_AVX512VL_AVX512BW): Ditto. | |
15295 | (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto. | |
15296 | (<insn>v16qiv16si2): Ditto. | |
15297 | (avx512f_<code>v16hiv16si2<mask_name>): Ditto. | |
15298 | (<insn>v16hiv16si2): Ditto. | |
15299 | (avx512f_zero_extendv16hiv16si2_1): Ditto. | |
15300 | (avx512f_<code>v8qiv8di2<mask_name>): Ditto. | |
15301 | (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto. | |
15302 | (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto. | |
15303 | (<insn>v8qiv8di2): Ditto. | |
15304 | (avx512f_<code>v8hiv8di2<mask_name>): Ditto. | |
15305 | (<insn>v8hiv8di2): Ditto. | |
15306 | (avx512f_<code>v8siv8di2<mask_name>): Ditto. | |
15307 | (*avx512f_zero_extendv8siv8di2_1): Ditto. | |
15308 | (*avx512f_zero_extendv8siv8di2_2): Ditto. | |
15309 | (<insn>v8siv8di2): Ditto. | |
15310 | (avx512f_roundps512_sfix): Ditto. | |
15311 | (vashrv8di3): Ditto. | |
15312 | (vashrv16si3): Ditto. | |
15313 | (pbroadcast_evex_isa): Change isa attribute to avx512f_512. | |
15314 | (vec_dupv4sf): Add TARGET_EVEX512. | |
15315 | (*vec_dupv4si): Ditto. | |
15316 | (*vec_dupv2di): Ditto. | |
15317 | (vec_dup<mode>): Change isa attribute to avx512f_512. | |
15318 | (VPERMI2): Add TARGET_EVEX512. | |
15319 | (VPERMI2I): Ditto. | |
15320 | (VEC_INIT_MODE): Ditto. | |
15321 | (VEC_INIT_HALF_MODE): Ditto. | |
15322 | (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>): | |
15323 | Ditto. | |
15324 | (avx512f_vcvtps2ph512_mask_sae): Ditto. | |
15325 | (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>): | |
15326 | Ditto. | |
15327 | (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto. | |
15328 | (INT_BROADCAST_MODE): Ditto. | |
15329 | ||
15330 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15331 | ||
15332 | * config/i386/i386-expand.cc (ix86_broadcast_from_constant): | |
15333 | Disable zmm broadcast for !TARGET_EVEX512. | |
15334 | * config/i386/i386-options.cc (ix86_option_override_internal): | |
15335 | Do not use PVW_512 when no-evex512. | |
15336 | (ix86_simd_clone_adjust): Add evex512 target into string. | |
15337 | * config/i386/i386.cc (type_natural_mode): Report ABI warning | |
15338 | when using zmm register w/o evex512. | |
15339 | (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512. | |
15340 | (ix86_hard_regno_mode_ok): Ditto. | |
15341 | (ix86_set_reg_reg_cost): Ditto. | |
15342 | (ix86_rtx_costs): Ditto. | |
15343 | (ix86_vector_mode_supported_p): Ditto. | |
15344 | (ix86_preferred_simd_mode): Ditto. | |
15345 | (ix86_get_mask_mode): Ditto. | |
15346 | (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit | |
15347 | libmvec call when !TARGET_EVEX512. | |
15348 | (ix86_simd_clone_usable): Ditto. | |
15349 | * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment | |
15350 | when !TARGET_EVEX512 | |
15351 | (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512. | |
15352 | (STORE_MAX_PIECES): Ditto. | |
15353 | ||
15354 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15355 | ||
15356 | * config/i386/i386-builtin.def (BDESC): Add | |
15357 | OPTION_MASK_ISA2_EVEX512. | |
15358 | ||
15359 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15360 | ||
15361 | * config/i386/i386-builtin.def (BDESC): Add | |
15362 | OPTION_MASK_ISA2_EVEX512. | |
15363 | ||
15364 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15365 | ||
15366 | * config/i386/i386-builtin.def (BDESC): Add | |
15367 | OPTION_MASK_ISA2_EVEX512. | |
15368 | ||
15369 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15370 | ||
15371 | * config/i386/i386-builtin.def (BDESC): Add | |
15372 | OPTION_MASK_ISA2_EVEX512. | |
15373 | ||
15374 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15375 | ||
15376 | * config/i386/i386-builtin.def (BDESC): Add | |
15377 | OPTION_MASK_ISA2_EVEX512. | |
15378 | * config/i386/i386-builtins.cc | |
15379 | (ix86_init_mmx_sse_builtins): Ditto. | |
15380 | ||
15381 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15382 | Hu, Lin1 <lin1.hu@intel.com> | |
15383 | ||
15384 | * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit | |
15385 | intrins. | |
15386 | ||
15387 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15388 | ||
15389 | * config.gcc: Add avx512bitalgvlintrin.h. | |
15390 | * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit | |
15391 | intrins. | |
15392 | * config/i386/avx5124vnniwintrin.h: Ditto. | |
15393 | * config/i386/avx512bf16intrin.h: Ditto. | |
15394 | * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit | |
15395 | intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h. | |
15396 | * config/i386/avx512erintrin.h: Add evex512 target for 512 bit | |
15397 | intrins | |
15398 | * config/i386/avx512ifmaintrin.h: Ditto | |
15399 | * config/i386/avx512pfintrin.h: Ditto | |
15400 | * config/i386/avx512vbmi2intrin.h: Ditto. | |
15401 | * config/i386/avx512vbmiintrin.h: Ditto. | |
15402 | * config/i386/avx512vnniintrin.h: Ditto. | |
15403 | * config/i386/avx512vp2intersectintrin.h: Ditto. | |
15404 | * config/i386/avx512vpopcntdqintrin.h: Ditto. | |
15405 | * config/i386/gfniintrin.h: Ditto. | |
15406 | * config/i386/immintrin.h: Add avx512bitalgvlintrin.h. | |
15407 | * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins. | |
15408 | * config/i386/vpclmulqdqintrin.h: Ditto. | |
15409 | * config/i386/avx512bitalgvlintrin.h: New. | |
15410 | ||
15411 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15412 | ||
15413 | * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit | |
15414 | intrins. | |
15415 | ||
15416 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15417 | ||
15418 | * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit | |
15419 | intrins. | |
15420 | ||
15421 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15422 | ||
15423 | * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins. | |
15424 | ||
15425 | 2023-10-09 Haochen Jiang <haochen.jiang@intel.com> | |
15426 | ||
15427 | * common/config/i386/i386-common.cc | |
15428 | (OPTION_MASK_ISA2_EVEX512_SET): New. | |
15429 | (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto. | |
15430 | (ix86_handle_option): Handle EVEX512. | |
15431 | * config/i386/i386-c.cc | |
15432 | (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__ | |
15433 | when AVX512VL is set. | |
15434 | * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512. | |
15435 | (ix86_valid_target_attribute_inner_p): Ditto. | |
15436 | (ix86_option_override_internal): Set EVEX512 target if it is not | |
15437 | explicitly set when AVX512 is enabled. Disable | |
15438 | AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512. | |
15439 | * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative. | |
15440 | ||
15441 | 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org> | |
15442 | ||
15443 | PR target/88558 | |
15444 | * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND | |
15445 | from insn condition. | |
15446 | (lrint<mode>si2): New insn pattern for 32bit lrint. | |
15447 | ||
15448 | 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org> | |
15449 | ||
15450 | PR target/88558 | |
15451 | * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): | |
15452 | Enable SImode on FP registers for P7. | |
15453 | * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode | |
15454 | move between FP registers. Set attribute isa of stfiwx to "*" | |
15455 | and attribute of stxsiwx to "p7". | |
15456 | ||
15457 | 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
15458 | ||
15459 | * config/s390/s390.md: Make use of new copysign RTL. | |
15460 | ||
15461 | 2023-10-09 Hongyu Wang <hongyu.wang@intel.com> | |
15462 | ||
15463 | * config/i386/sse.md (vec_concatv2di): Replace constraint "m" | |
15464 | with "jm" for alternative 0 and 1 of operand 2. | |
15465 | (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with | |
15466 | "ja" for alternative 0 and 1 of operand2. | |
15467 | ||
15468 | 2023-10-08 David Malcolm <dmalcolm@redhat.com> | |
15469 | ||
15470 | PR analyzer/111155 | |
15471 | * text-art/table.cc (table::maybe_set_cell_span): New. | |
15472 | (table::add_other_table): New. | |
15473 | * text-art/table.h (class table::cell_placement): Add class table | |
15474 | as a friend. | |
15475 | (table::add_rows): New. | |
15476 | (table::add_row): Reimplement in terms of add_rows. | |
15477 | (table::maybe_set_cell_span): New decl. | |
15478 | (table::add_other_table): New decl. | |
15479 | * text-art/types.h (operator+): New operator for rect + coord. | |
15480 | ||
15481 | 2023-10-08 David Malcolm <dmalcolm@redhat.com> | |
15482 | ||
15483 | * genmatch.cc (main): Update for "m_" prefix of some fields of | |
15484 | line_maps. | |
15485 | * input.cc (make_location): Update for removal of | |
15486 | COMBINE_LOCATION_DATA. | |
15487 | (dump_line_table_statistics): Update for "m_" prefix of some | |
15488 | fields of line_maps. | |
15489 | (location_with_discriminator): Update for removal of | |
15490 | COMBINE_LOCATION_DATA. | |
15491 | (line_table_test::line_table_test): Update for "m_" prefix of some | |
15492 | fields of line_maps. | |
15493 | * toplev.cc (general_init): Likewise. | |
15494 | * tree.cc (set_block): Update for removal of | |
15495 | COMBINE_LOCATION_DATA. | |
15496 | (set_source_range): Likewise. | |
15497 | ||
15498 | 2023-10-08 David Malcolm <dmalcolm@redhat.com> | |
15499 | ||
15500 | * input.cc (make_location): Move implementation to | |
15501 | line_maps::make_location. | |
15502 | ||
15503 | 2023-10-08 David Malcolm <dmalcolm@redhat.com> | |
15504 | ||
15505 | PR driver/111700 | |
15506 | * input.cc (file_cache::add_file): Update leading comment to | |
15507 | clarify that it can fail. | |
15508 | (file_cache::lookup_or_add_file): Likewise. | |
15509 | (file_cache::get_source_file_content): Gracefully handle | |
15510 | lookup_or_add_file failing. | |
15511 | ||
15512 | 2023-10-08 liuhongt <hongtao.liu@intel.com> | |
15513 | ||
15514 | * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF | |
15515 | and V4HFmode. | |
15516 | (ix86_build_signbit_mask): Ditto. | |
15517 | * config/i386/mmx.md (mmxintvecmode): Ditto. | |
15518 | (<code><mode>2): New define_expand. | |
15519 | (*mmx_<code><mode>): New define_insn_and_split. | |
15520 | (*mmx_nabs<mode>2): Ditto. | |
15521 | (*mmx_andnot<mode>3): New define_insn. | |
15522 | (<code><mode>3): Ditto. | |
15523 | (copysign<mode>3): New define_expand. | |
15524 | (xorsign<mode>3): Ditto. | |
15525 | (signbit<mode>2): Ditto. | |
15526 | ||
15527 | 2023-10-08 liuhongt <hongtao.liu@intel.com> | |
15528 | ||
15529 | * config/i386/mmx.md (VHF_32_64): New mode iterator. | |
15530 | (<insn><mode>3): New define_expand, merged from .. | |
15531 | (<insn>v4hf3): .. this and | |
15532 | (<insn>v2hf3): .. this. | |
15533 | (movd_v2hf_to_sse_reg): New define_expand, splitted from .. | |
15534 | (movd_v2hf_to_sse): .. this. | |
15535 | (<code><mode>3): New define_expand. | |
15536 | ||
15537 | 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com> | |
15538 | ||
15539 | * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function. | |
15540 | (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic. | |
15541 | ||
15542 | 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com> | |
15543 | ||
15544 | * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New | |
15545 | function. | |
15546 | (can_be_built_by_li_lis_and_rldicr): New function. | |
15547 | (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and | |
15548 | can_be_built_by_li_lis_and_rldicl. | |
15549 | ||
15550 | 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com> | |
15551 | ||
15552 | * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New | |
15553 | function. | |
15554 | (can_be_built_by_li_and_rotldi): Rename to ... | |
15555 | (can_be_built_by_li_lis_and_rotldi): ... this function. | |
15556 | (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi. | |
15557 | ||
15558 | 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com> | |
15559 | ||
15560 | * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function. | |
15561 | (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi. | |
15562 | ||
15563 | 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com> | |
15564 | ||
15565 | * config/riscv/linux.h: Pass the static-pie specific options to | |
15566 | the linker. | |
15567 | ||
15568 | 2023-10-07 Saurabh Jha <saurabh.jha@arm.com> | |
15569 | ||
15570 | * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for | |
15571 | cortex-x4 core. | |
15572 | * config/aarch64/aarch64-tune.md: Regenerated. | |
15573 | * doc/invoke.texi: Add command-line option for cortex-x4 core. | |
15574 | ||
15575 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15576 | Hongyu Wang <hongyu.wang@intel.com> | |
15577 | Hongtao Liu <hongtao.liu@intel.com> | |
15578 | ||
15579 | * config/i386/constraints.md (jb): New constraint for vsib memory | |
15580 | that does not allow gpr32. | |
15581 | * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx | |
15582 | alternative and set attr_gpr32 to 0. | |
15583 | (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for | |
15584 | avx alternative. | |
15585 | (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace | |
15586 | "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0. | |
15587 | (*rsqrtsf2_sse): Likewise. | |
15588 | * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to | |
15589 | avx/noavx and assign jr/r constraint to dest. | |
15590 | * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>): | |
15591 | Split avx/noavx alternatives and replace "r" to "jr" for avx alternative. | |
15592 | (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise. | |
15593 | (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise. | |
15594 | (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise. | |
15595 | (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise. | |
15596 | (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise. | |
15597 | (<sse2_avx2>_pmovmskb): Likewise. | |
15598 | (*<sse2_avx2>_pmovmskb_zext): Likewise. | |
15599 | (*sse2_pmovmskb_ext): Likewise. | |
15600 | (*<sse2_avx2>_pmovmskb_lt): Likewise. | |
15601 | (*<sse2_avx2>_pmovmskb_zext_lt): Likewise. | |
15602 | (*sse2_pmovmskb_ext_lt): Likewise. | |
15603 | (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace | |
15604 | "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0. | |
15605 | (sse_vmrcpv4sf2): Likewise. | |
15606 | (*sse_vmrcpv4sf2): Likewise. | |
15607 | (rsqrt<mode>2): Likewise. | |
15608 | (sse_vmrsqrtv4sf2): Likewise. | |
15609 | (*sse_vmrsqrtv4sf2): Likewise. | |
15610 | (avx_h<insn>v4df3): Likewise. | |
15611 | (sse3_hsubv2df3): Likewise. | |
15612 | (avx_h<insn>v8sf3): Likewise. | |
15613 | (sse3_h<insn>v4sf3): Likewise. | |
15614 | (<sse3>_lddqu<avxsizesuffix>): Likewise. | |
15615 | (avx_cmp<mode>3): Likewise. | |
15616 | (avx_vmcmp<mode>3): Likewise. | |
15617 | (*sse2_gt<mode>3): Likewise. | |
15618 | (sse_ldmxcsr): Likewise. | |
15619 | (sse_stmxcsr): Likewise. | |
15620 | (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for | |
15621 | avx alternative and set attr_gpr32 to 0. | |
15622 | (avx2_permv2ti): Likewise. | |
15623 | (*avx_vperm2f128<mode>_full): Likewise. | |
15624 | (*avx_vperm2f128<mode>_nozero): Likewise. | |
15625 | (vec_set_lo_v32qi): Likewise. | |
15626 | (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise. | |
15627 | (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise. | |
15628 | (avx_cmp<mode>3): Likewise. | |
15629 | (avx_vmcmp<mode>3): Likewise. | |
15630 | (*<sse>_maskcmp<mode>3_comm): Likewise. | |
15631 | (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set | |
15632 | attr_gpr32 to 0. | |
15633 | (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise. | |
15634 | (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise. | |
15635 | (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise. | |
15636 | (*avx2_gatherdi<VI4F_256:mode>_3): Likewise. | |
15637 | (*avx2_gatherdi<VI4F_256:mode>_4): Likewise. | |
15638 | (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to | |
15639 | noavx512vl, set its constraint to jm and set attr_gpr32 to 0. | |
15640 | (vec_set_lo_<mode><mask_name>): Likewise. | |
15641 | (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes. | |
15642 | (vec_set_hi_<mode><mask_name>): Likewise. | |
15643 | (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes. | |
15644 | (vec_set_hi_<mode>): Likewise. | |
15645 | (vec_set_lo_<mode>): Likewise. | |
15646 | (avx2_set_hi_v32qi): Likewise. | |
15647 | ||
15648 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15649 | Hongyu Wang <hongyu.wang@intel.com> | |
15650 | Hongtao Liu <hongtao.liu@intel.com> | |
15651 | ||
15652 | * config/i386/i386.md (*movhi_internal): Split out non-gpr | |
15653 | supported pextrw with mem constraint to avx/noavx alternatives, | |
15654 | set jm and attr gpr32 0 to the noavx alternative. | |
15655 | (*mov<mode>_internal): Likewise. | |
15656 | * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to | |
15657 | "jr/jm/ja" and set_attr gpr32 0 for noavx alternative. | |
15658 | (mmx_pshufbv4qi3): Likewise. | |
15659 | (*mmx_pinsrd): Likewise. | |
15660 | (*mmx_pinsrb): Likewise. | |
15661 | (*pinsrb): Likewise. | |
15662 | (mmx_pshufbv8qi3): Likewise. | |
15663 | (mmx_pshufbv4qi3): Likewise. | |
15664 | (@sse4_1_insertps_<mode>): Likewise. | |
15665 | (*mmx_pextrw): Split altrenatives and map non-EGPR | |
15666 | constraints, attr_gpr32 and attr_isa to noavx mnemonics. | |
15667 | (*movv2qi_internal): Likewise. | |
15668 | (*pextrw): Likewise. | |
15669 | (*mmx_pextrb): Likewise. | |
15670 | (*mmx_pextrb_zext): Likewise. | |
15671 | (*pextrb): Likewise. | |
15672 | (*pextrb_zext): Likewise. | |
15673 | (vec_extractv2si_1): Likewise. | |
15674 | (vec_extractv2si_1_zext): Likewise. | |
15675 | * config/i386/sse.md: (vi128_h_r): New mode attr for | |
15676 | pinsr{bw}/pextr{bw} with reg operand. | |
15677 | (*abs<mode>2): Split altrenatives and %v in mnemonics, map | |
15678 | non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics. | |
15679 | (*vec_extract<mode>): Likewise. | |
15680 | (*vec_extract<mode>): Likewise for HFBF pattern. | |
15681 | (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise. | |
15682 | (*vec_extractv4si_1): Likewise. | |
15683 | (*vec_extractv4si_zext): Likewise. | |
15684 | (*vec_extractv2di_1): Likewise. | |
15685 | (*vec_concatv2si_sse4_1): Likewise. | |
15686 | (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise. | |
15687 | (vec_concatv2di): Likewise. | |
15688 | (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise. | |
15689 | (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to | |
15690 | "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split | |
15691 | %v for avx/noavx alternatives if necessary. | |
15692 | (*vec_concatv2sf_sse4_1): Likewise. | |
15693 | (*sse4_1_extractps): Likewise. | |
15694 | (vec_set<mode>_0): Likewise for VI4F_128. | |
15695 | (*vec_setv4sf_sse4_1): Likewise. | |
15696 | (@sse4_1_insertps<mode>): Likewise. | |
15697 | (ssse3_pmaddubsw128): Likewise. | |
15698 | (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise. | |
15699 | (<sse4_1_avx2>_packusdw<mask_name>): Likewise. | |
15700 | (<ssse3_avx2>_palignr<mode>): Likewise. | |
15701 | (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise. | |
15702 | (<sse4_1_avx2>_mpsadbw): Likewise. | |
15703 | (*sse4_1_mulv2siv2di3<mask_name>): Likewise. | |
15704 | (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise. | |
15705 | (*sse4_1_<code><mode>3<mask_name>): Likewise. | |
15706 | (*<code>v8hi3): Likewise. | |
15707 | (*<code>v16qi3): Likewise. | |
15708 | (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise. | |
15709 | (*sse4_1_zero_extendv8qiv8hi2_3): Likewise. | |
15710 | (*sse4_1_zero_extendv8qiv8hi2_4): Likewise. | |
15711 | (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise. | |
15712 | (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise. | |
15713 | (*sse4_1_zero_extendv4hiv4si2_3): Likewise. | |
15714 | (*sse4_1_zero_extendv4hiv4si2_4): Likewise. | |
15715 | (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise. | |
15716 | (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise. | |
15717 | (*sse4_1_zero_extendv2siv2di2_3): Likewise. | |
15718 | (*sse4_1_zero_extendv2siv2di2_4): Likewise. | |
15719 | (aesdec): Likewise. | |
15720 | (aesdeclast): Likewise. | |
15721 | (aesenc): Likewise. | |
15722 | (aesenclast): Likewise. | |
15723 | (pclmulqdq): Likewise. | |
15724 | (vgf2p8affineinvqb_<mode><mask_name>): Likewise. | |
15725 | (vgf2p8affineqb_<mode><mask_name>): Likewise. | |
15726 | (vgf2p8mulb_<mode><mask_name>): Likewise. | |
15727 | ||
15728 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15729 | Hongyu Wang <hongyu.wang@intel.com> | |
15730 | Hongtao Liu <hongtao.liu@intel.com> | |
15731 | ||
15732 | * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New | |
15733 | prototype. | |
15734 | * config/i386/i386.cc (x86_evex_reg_mentioned_p): New | |
15735 | function. | |
15736 | * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0 | |
15737 | and constraint jm to all non-evex alternatives, adjust | |
15738 | alternative outputs if evex reg is mentioned. | |
15739 | * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0 | |
15740 | and constraint jm/ja to all non-evex alternatives. | |
15741 | (ptesttf2): Likewise. | |
15742 | (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise. | |
15743 | (sse4_1_round<ssescalarmodesuffix>): Likewise. | |
15744 | (sse4_2_pcmpestri): Likewise. | |
15745 | (sse4_2_pcmpestrm): Likewise. | |
15746 | (sse4_2_pcmpestr_cconly): Likewise. | |
15747 | (sse4_2_pcmpistr): Likewise. | |
15748 | (sse4_2_pcmpistri): Likewise. | |
15749 | (sse4_2_pcmpistrm): Likewise. | |
15750 | (sse4_2_pcmpistr_cconly): Likewise. | |
15751 | (aesimc): Likewise. | |
15752 | (aeskeygenassist): Likewise. | |
15753 | ||
15754 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15755 | Hongyu Wang <hongyu.wang@intel.com> | |
15756 | Hongtao Liu <hongtao.liu@intel.com> | |
15757 | ||
15758 | * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set | |
15759 | attr gpr32 0 and constraint jm/ja to all mem alternatives. | |
15760 | (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise. | |
15761 | (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise. | |
15762 | (avx2_ph<plusminus_mnemonic>dv8si3): Likewise. | |
15763 | (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise. | |
15764 | (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise. | |
15765 | (<ssse3_avx2>_psign<mode>3): Likewise. | |
15766 | (ssse3_psign<mode>3): Likewise. | |
15767 | (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise. | |
15768 | (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise. | |
15769 | (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise. | |
15770 | (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise. | |
15771 | (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise. | |
15772 | (<sse4_1_avx2>_mpsadbw): Likewise. | |
15773 | (<sse4_1_avx2>_pblendvb): Likewise. | |
15774 | (*<sse4_1_avx2>_pblendvb_lt): Likewise. | |
15775 | (sse4_1_pblend<ssemodesuffix>): Likewise. | |
15776 | (*avx2_pblend<ssemodesuffix>): Likewise. | |
15777 | (avx2_permv2ti): Likewise. | |
15778 | (*avx_vperm2f128<mode>_nozero): Likewise. | |
15779 | (*avx2_eq<mode>3): Likewise. | |
15780 | (*sse4_1_eqv2di3): Likewise. | |
15781 | (sse4_2_gtv2di3): Likewise. | |
15782 | (avx2_gt<mode>3): Likewise. | |
15783 | ||
15784 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15785 | Hongyu Wang <hongyu.wang@intel.com> | |
15786 | Hongtao Liu <hongtao.liu@intel.com> | |
15787 | ||
15788 | * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint | |
15789 | jm. | |
15790 | (<xsave>_rex64): Likewise. | |
15791 | (<xrstor>_rex64): Likewise. | |
15792 | (<xrstor>64): Likewise. | |
15793 | (fxsave64): Likewise. | |
15794 | (fxstore64): Likewise. | |
15795 | ||
15796 | 2023-10-07 Hongyu Wang <hongyu.wang@intel.com> | |
15797 | Kong Lingling <lingling.kong@intel.com> | |
15798 | Hongtao Liu <hongtao.liu@intel.com> | |
15799 | ||
15800 | * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used, | |
15801 | adjust mnemonic for vmovduq/vmovdqa. | |
15802 | * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0): | |
15803 | Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa. | |
15804 | (avx_vec_concat<mode>): Likewise, and separate alternative 0 to | |
15805 | avx_noavx512f. | |
15806 | ||
15807 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15808 | Hongyu Wang <hongyu.wang@intel.com> | |
15809 | Hongtao Liu <hongtao.liu@intel.com> | |
15810 | ||
15811 | * config/i386/i386.cc (map_egpr_constraints): New funciton to | |
15812 | map common constraints to EGPR prohibited constraints. | |
15813 | (ix86_md_asm_adjust): Calls map_egpr_constraints. | |
15814 | * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32. | |
15815 | ||
15816 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15817 | Hongyu Wang <hongyu.wang@intel.com> | |
15818 | Hongtao Liu <hongtao.liu@intel.com> | |
15819 | ||
15820 | * config/i386/i386-protos.h (ix86_insn_base_reg_class): New | |
15821 | prototype. | |
15822 | (ix86_regno_ok_for_insn_base_p): Likewise. | |
15823 | (ix86_insn_index_reg_class): Likewise. | |
15824 | * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p): | |
15825 | New helper function to scan the insn. | |
15826 | (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS. | |
15827 | (ix86_regno_ok_for_insn_base_p): Likewise for base regno. | |
15828 | (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS. | |
15829 | * config/i386/i386.h (INSN_BASE_REG_CLASS): Define. | |
15830 | (REGNO_OK_FOR_INSN_BASE_P): Likewise. | |
15831 | (INSN_INDEX_REG_CLASS): Likewise. | |
15832 | (enum reg_class): Add INDEX_GPR16. | |
15833 | (GENERAL_GPR16_REGNO_P): Define. | |
15834 | * config/i386/i386.md (gpr32): New attribute. | |
15835 | ||
15836 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15837 | Hongyu Wang <hongyu.wang@intel.com> | |
15838 | Hongtao Liu <hongtao.liu@intel.com> | |
15839 | ||
15840 | * config/i386/constraints.md (jr): New register constraint | |
15841 | that prohibits EGPR. | |
15842 | (jR): Constraint that force usage of EGPR. | |
15843 | (jm): New memory constraint that prohibits EGPR. | |
15844 | (ja): Likewise for Bm constraint. | |
15845 | (jb): Likewise for Tv constraint. | |
15846 | (j<): New auto-dec memory constraint that prohibits EGPR. | |
15847 | (j>): Likewise for ">" constraint. | |
15848 | (jo): Likewise for "o" constraint. | |
15849 | (jv): Likewise for "V" constraint. | |
15850 | (jp): Likewise for "p" constraint. | |
15851 | * config/i386/i386.h (enum reg_class): Add new reg class | |
15852 | GENERAL_GPR16. | |
15853 | ||
15854 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15855 | Hongyu Wang <hongyu.wang@intel.com> | |
15856 | Hongtao Liu <hongtao.liu@intel.com> | |
15857 | ||
15858 | * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p): | |
15859 | New function prototype. | |
15860 | * config/i386/i386.cc (regclass_map): Add mapping for 16 new | |
15861 | general registers. | |
15862 | (debugger64_register_map): Likewise. | |
15863 | (ix86_conditional_register_usage): Clear REX2 register when APX | |
15864 | disabled. | |
15865 | (ix86_code_end): Add handling for REX2 reg. | |
15866 | (print_reg): Likewise. | |
15867 | (ix86_output_jmp_thunk_or_indirect): Likewise. | |
15868 | (ix86_output_indirect_branch_via_reg): Likewise. | |
15869 | (ix86_attr_length_vex_default): Likewise. | |
15870 | (ix86_emit_save_regs): Adjust to allow saving r31. | |
15871 | (ix86_register_priority): Set REX2 reg priority same as REX. | |
15872 | (x86_extended_reg_mentioned_p): Add check for REX2 regs. | |
15873 | (x86_extended_rex2reg_mentioned_p): New function. | |
15874 | * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended | |
15875 | registers. | |
15876 | (REG_ALLOC_ORDER): Likewise. | |
15877 | (FIRST_REX2_INT_REG): Define. | |
15878 | (LAST_REX2_INT_REG): Ditto. | |
15879 | (GENERAL_REGS): Add 16 new registers. | |
15880 | (INT_SSE_REGS): Likewise. | |
15881 | (FLOAT_INT_REGS): Likewise. | |
15882 | (FLOAT_INT_SSE_REGS): Likewise. | |
15883 | (INT_MASK_REGS): Likewise. | |
15884 | (ALL_REGS):Likewise. | |
15885 | (REX2_INT_REG_P): Define. | |
15886 | (REX2_INT_REGNO_P): Ditto. | |
15887 | (GENERAL_REGNO_P): Add REX2_INT_REGNO_P. | |
15888 | (REGNO_OK_FOR_INDEX_P): Ditto. | |
15889 | (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers. | |
15890 | * config/i386/i386.md: Add 16 new integer general | |
15891 | registers. | |
15892 | ||
15893 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15894 | Hongyu Wang <hongyu.wang@intel.com> | |
15895 | Hongtao Liu <hongtao.liu@intel.com> | |
15896 | ||
15897 | * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro. | |
15898 | (XCR_APX_F_ENABLED_MASK): Likewise. | |
15899 | (get_available_features): Detect APX_F under | |
15900 | * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New. | |
15901 | (OPTION_MASK_ISA2_APX_F_UNSET): Likewise. | |
15902 | (ix86_handle_option): Handle -mapxf. | |
15903 | * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New. | |
15904 | * common/config/i386/i386-isas.h: Add entry for APX_F. | |
15905 | * config/i386/cpuid.h (bit_APX_F): New. | |
15906 | * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR, | |
15907 | TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define. | |
15908 | * config/i386/i386-opts.h (enum apx_features): New enum. | |
15909 | * config/i386/i386-isa.def (APX_F): New DEF_PTA. | |
15910 | * config/i386/i386-options.cc (ix86_function_specific_save): | |
15911 | Save ix86_apx_features. | |
15912 | (ix86_function_specific_restore): Restore it. | |
15913 | (ix86_valid_target_attribute_inner_p): Add mapxf. | |
15914 | (ix86_option_override_internal): Set ix86_apx_features for PTA | |
15915 | and TARGET_APX_F. Also reports error when APX_F is set but not | |
15916 | having TARGET_64BIT. | |
15917 | * config/i386/i386.opt: (-mapxf): New ISA flag option. | |
15918 | (-mapx=): New enumeration option. | |
15919 | (apx_features): New enum type. | |
15920 | (apx_none): New enum value. | |
15921 | (apx_egpr): Likewise. | |
15922 | (apx_push2pop2): Likewise. | |
15923 | (apx_ndd): Likewise. | |
15924 | (apx_all): Likewise. | |
15925 | * doc/invoke.texi: Document mapxf. | |
15926 | ||
15927 | 2023-10-07 Hongyu Wang <hongyu.wang@intel.com> | |
15928 | Kong Lingling <lingling.kong@intel.com> | |
15929 | Hongtao Liu <hongtao.liu@intel.com> | |
15930 | ||
15931 | * addresses.h (index_reg_class): New wrapper function like | |
15932 | base_reg_class. | |
15933 | * doc/tm.texi: Document INSN_INDEX_REG_CLASS. | |
15934 | * doc/tm.texi.in: Ditto. | |
15935 | * lra-constraints.cc (index_part_to_reg): Pass index_class. | |
15936 | (process_address_1): Calls index_reg_class with curr_insn and | |
15937 | replace INDEX_REG_CLASS with its return value index_cl. | |
15938 | * reload.cc (find_reloads_address): Likewise. | |
15939 | (find_reloads_address_1): Likewise. | |
15940 | ||
15941 | 2023-10-07 Kong Lingling <lingling.kong@intel.com> | |
15942 | Hongyu Wang <hongyu.wang@intel.com> | |
15943 | Hongtao Liu <hongtao.liu@intel.com> | |
15944 | ||
15945 | * addresses.h (base_reg_class): Add insn argument and new macro | |
15946 | INSN_BASE_REG_CLASS. | |
15947 | (regno_ok_for_base_p_1): Add insn argument and new macro | |
15948 | REGNO_OK_FOR_INSN_BASE_P. | |
15949 | (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1. | |
15950 | * doc/tm.texi: Document INSN_BASE_REG_CLASS and | |
15951 | REGNO_OK_FOR_INSN_BASE_P. | |
15952 | * doc/tm.texi.in: Ditto. | |
15953 | * lra-constraints.cc (process_address_1): Pass insn to | |
15954 | base_reg_class. | |
15955 | (curr_insn_transform): Ditto. | |
15956 | * reload.cc (find_reloads): Ditto. | |
15957 | (find_reloads_address): Ditto. | |
15958 | (find_reloads_address_1): Ditto. | |
15959 | (find_reloads_subreg_address): Ditto. | |
15960 | * reload1.cc (maybe_fix_stack_asms): Ditto. | |
15961 | ||
15962 | 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com> | |
15963 | ||
15964 | PR target/108338 | |
15965 | * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws | |
15966 | for P9. | |
15967 | ||
15968 | 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com> | |
15969 | ||
15970 | PR target/108338 | |
15971 | * config/rs6000/predicates.md (lowpart_subreg_operator): New | |
15972 | define_predicate. | |
15973 | * config/rs6000/rs6000.md (any_rshift): New code_iterator. | |
15974 | (movsf_from_si2): Rename to ... | |
15975 | (movsf_from_si2_<code>): ... this. | |
15976 | ||
15977 | 2023-10-07 Pan Li <pan2.li@intel.com> | |
15978 | ||
15979 | PR target/111634 | |
15980 | * config/riscv/riscv.cc (riscv_legitimize_address): Ensure | |
15981 | object is a REG before extracting its' REGNO. | |
15982 | ||
15983 | 2023-10-06 Roger Sayle <roger@nextmovesoftware.com> | |
15984 | ||
15985 | * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by | |
15986 | one into add3_cc_overflow_1 followed by add3_carry. | |
15987 | * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from | |
15988 | "*add<mode>3_cc_overflow_1" to provide generator function. | |
15989 | ||
15990 | 2023-10-06 Roger Sayle <roger@nextmovesoftware.com> | |
15991 | Uros Bizjak <ubizjak@gmail.com> | |
15992 | ||
15993 | * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used | |
15994 | to perform left shifts into shorter instructions with -Oz. | |
15995 | ||
15996 | 2023-10-06 Vineet Gupta <vineetg@rivosinc.com> | |
15997 | ||
15998 | * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress. | |
15999 | ||
16000 | 2023-10-06 Sandra Loosemore <sandra@codesourcery.com> | |
16001 | ||
16002 | * doc/extend.texi (Function Attributes): Mention standard attribute | |
16003 | syntax. | |
16004 | (Variable Attributes): Likewise. | |
16005 | (Type Attributes): Likewise. | |
16006 | (Attribute Syntax): Likewise. | |
16007 | ||
16008 | 2023-10-06 Andrew Stubbs <ams@codesourcery.com> | |
16009 | ||
16010 | * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax. | |
16011 | (mov<mode>_exec): Likewise. | |
16012 | (mov<mode>_sgprbase): Likewise. | |
16013 | * config/gcn/gcn.md (*mov<mode>_insn): Likewise. | |
16014 | (*movti_insn): Likewise. | |
16015 | ||
16016 | 2023-10-06 Andrew Stubbs <ams@codesourcery.com> | |
16017 | ||
16018 | * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning. | |
16019 | ||
16020 | 2023-10-06 Andrew Pinski <pinskia@gmail.com> | |
16021 | ||
16022 | PR middle-end/111699 | |
16023 | * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e), | |
16024 | (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE. | |
16025 | ||
16026 | 2023-10-06 Jakub Jelinek <jakub@redhat.com> | |
16027 | ||
16028 | * ipa-prop.h (ipa_bits): Remove. | |
16029 | (struct ipa_jump_func): Remove bits member. | |
16030 | (struct ipcp_transformation): Remove bits member, adjust | |
16031 | ctor and dtor. | |
16032 | (ipa_get_ipa_bits_for_value): Remove. | |
16033 | * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove. | |
16034 | (ipa_bits_hash_table): Remove. | |
16035 | (ipa_print_node_jump_functions_for_edge): Don't print bits. | |
16036 | (ipa_get_ipa_bits_for_value): Remove. | |
16037 | (ipa_set_jfunc_bits): Remove. | |
16038 | (ipa_compute_jump_functions_for_edge): For pointers query | |
16039 | pointer alignment before ipa_set_jfunc_vr and update_bitmask | |
16040 | in there. For integral types, just rely on bitmask already | |
16041 | being handled in value ranges. | |
16042 | (ipa_check_create_edge_args): Don't create ipa_bits_hash_table. | |
16043 | (ipcp_transformation_initialize): Neither here. | |
16044 | (ipcp_transformation_t::duplicate): Don't copy bits vector. | |
16045 | (ipa_write_jump_function): Don't stream bits here. | |
16046 | (ipa_read_jump_function): Neither here. | |
16047 | (useful_ipcp_transformation_info_p): Don't test bits vec. | |
16048 | (write_ipcp_transformation_info): Don't stream bits here. | |
16049 | (read_ipcp_transformation_info): Neither here. | |
16050 | (ipcp_get_parm_bits): Get mask and value from m_vr rather | |
16051 | than bits. | |
16052 | (ipcp_update_bits): Remove. | |
16053 | (ipcp_update_vr): For pointers, set_ptr_info_alignment from | |
16054 | bitmask stored in value range. | |
16055 | (ipcp_transform_function): Don't test bits vector, don't call | |
16056 | ipcp_update_bits. | |
16057 | * ipa-cp.cc (propagate_bits_across_jump_function): Don't use | |
16058 | jfunc->bits, instead get mask and value from jfunc->m_vr. | |
16059 | (ipcp_store_bits_results): Remove. | |
16060 | (ipcp_store_vr_results): Incorporate parts of | |
16061 | ipcp_store_bits_results here, merge the bitmasks with value | |
16062 | range if both are supplied. | |
16063 | (ipcp_driver): Don't call ipcp_store_bits_results. | |
16064 | * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits | |
16065 | clearing. | |
16066 | ||
16067 | 2023-10-06 Pan Li <pan2.li@intel.com> | |
16068 | ||
16069 | * config/riscv/autovec.md: Update comments. | |
16070 | ||
16071 | 2023-10-05 John David Anglin <danglin@gcc.gnu.org> | |
16072 | ||
16073 | * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete. | |
16074 | ||
16075 | 2023-10-05 Andrew MacLeod <amacleod@redhat.com> | |
16076 | ||
16077 | * timevar.def (TV_TREE_FAST_VRP): New. | |
16078 | * tree-pass.h (make_pass_fast_vrp): New prototype. | |
16079 | * tree-vrp.cc (class fvrp_folder): New. | |
16080 | (fvrp_folder::fvrp_folder): New. | |
16081 | (fvrp_folder::~fvrp_folder): New. | |
16082 | (fvrp_folder::value_of_expr): New. | |
16083 | (fvrp_folder::value_on_edge): New. | |
16084 | (fvrp_folder::value_of_stmt): New. | |
16085 | (fvrp_folder::pre_fold_bb): New. | |
16086 | (fvrp_folder::post_fold_bb): New. | |
16087 | (fvrp_folder::pre_fold_stmt): New. | |
16088 | (fvrp_folder::fold_stmt): New. | |
16089 | (execute_fast_vrp): New. | |
16090 | (pass_data_fast_vrp): New. | |
16091 | (pass_vrp:execute): Check for fast VRP pass. | |
16092 | (make_pass_fast_vrp): New. | |
16093 | ||
16094 | 2023-10-05 Andrew MacLeod <amacleod@redhat.com> | |
16095 | ||
16096 | * gimple-range.cc (dom_ranger::dom_ranger): New. | |
16097 | (dom_ranger::~dom_ranger): New. | |
16098 | (dom_ranger::range_of_expr): New. | |
16099 | (dom_ranger::edge_range): New. | |
16100 | (dom_ranger::range_on_edge): New. | |
16101 | (dom_ranger::range_in_bb): New. | |
16102 | (dom_ranger::range_of_stmt): New. | |
16103 | (dom_ranger::maybe_push_edge): New. | |
16104 | (dom_ranger::pre_bb): New. | |
16105 | (dom_ranger::post_bb): New. | |
16106 | * gimple-range.h (class dom_ranger): New. | |
16107 | ||
16108 | 2023-10-05 Andrew MacLeod <amacleod@redhat.com> | |
16109 | ||
16110 | * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New. | |
16111 | (gori_calc_operands): New. | |
16112 | (gori_on_edge): New. | |
16113 | (gori_name_helper): New. | |
16114 | (gori_name_on_edge): New. | |
16115 | * gimple-range-gori.h (gori_on_edge): New prototype. | |
16116 | (gori_name_on_edge): New prototype. | |
16117 | ||
16118 | 2023-10-05 Sergei Trofimovich <siarheit@google.com> | |
16119 | ||
16120 | PR ipa/111283 | |
16121 | PR gcov-profile/111559 | |
16122 | * ipa-utils.cc (ipa_merge_profiles): Avoid producing | |
16123 | uninitialized probabilities when merging counters with zero | |
16124 | denominators. | |
16125 | ||
16126 | 2023-10-05 Uros Bizjak <ubizjak@gmail.com> | |
16127 | ||
16128 | PR target/111657 | |
16129 | * config/i386/i386-expand.cc (alg_usable_p): Reject libcall | |
16130 | strategy for non-default address spaces. | |
16131 | (decide_alg): Use loop strategy as a fallback strategy for | |
16132 | non-default address spaces. | |
16133 | ||
16134 | 2023-10-05 Jakub Jelinek <jakub@redhat.com> | |
16135 | ||
16136 | * sreal.cc (verify_aritmetics): Rename to ... | |
16137 | (verify_arithmetics): ... this. | |
16138 | (sreal_verify_arithmetics): Adjust caller. | |
16139 | ||
16140 | 2023-10-05 Martin Jambor <mjambor@suse.cz> | |
16141 | ||
16142 | Revert: | |
16143 | 2023-10-03 Martin Jambor <mjambor@suse.cz> | |
16144 | ||
16145 | PR ipa/108007 | |
16146 | * cgraph.h (cgraph_edge): Add a parameter to | |
16147 | redirect_call_stmt_to_callee. | |
16148 | * ipa-param-manipulation.h (ipa_param_adjustments): Add a | |
16149 | parameter to modify_call. | |
16150 | * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New | |
16151 | parameter killed_ssas, pass it to padjs->modify_call. | |
16152 | * ipa-param-manipulation.cc (purge_transitive_uses): New function. | |
16153 | (ipa_param_adjustments::modify_call): New parameter killed_ssas. | |
16154 | Instead of substituting uses, invoke purge_transitive_uses. If | |
16155 | hash of killed SSAs has not been provided, create a temporary one | |
16156 | and release SSAs that have been added to it. | |
16157 | * tree-inline.cc (redirect_all_calls): Create | |
16158 | id->killed_new_ssa_names earlier, pass it to edge redirection, | |
16159 | adjust a comment. | |
16160 | (copy_body): Release SSAs in id->killed_new_ssa_names. | |
16161 | ||
16162 | 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
16163 | ||
16164 | * config/riscv/autovec.md (@vec_series<mode>): Remove @. | |
16165 | (vec_series<mode>): Ditto. | |
16166 | * config/riscv/riscv-v.cc (expand_const_vector): Ditto. | |
16167 | (shuffle_decompress_patterns): Ditto. | |
16168 | ||
16169 | 2023-10-05 Claudiu Zissulescu <claziss@gmail.com> | |
16170 | ||
16171 | * config/arc/arc-passes.def: Remove arc_ifcvt pass. | |
16172 | * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove. | |
16173 | (arc_ccfsm_record_branch_deleted): Likewise. | |
16174 | (arc_ccfsm_cond_exec_p): Likewise. | |
16175 | (arc_ccfsm): Likewise. | |
16176 | (arc_ccfsm_record_condition): Likewise. | |
16177 | (make_pass_arc_ifcvt): Likewise. | |
16178 | * config/arc/arc.cc (arc_ccfsm): Remove. | |
16179 | (arc_ccfsm_current): Likewise. | |
16180 | (ARC_CCFSM_BRANCH_DELETED_P): Likewise. | |
16181 | (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise. | |
16182 | (ARC_CCFSM_COND_EXEC_P): Likewise. | |
16183 | (CCFSM_ISCOMPACT): Likewise. | |
16184 | (CCFSM_DBR_ISCOMPACT): Likewise. | |
16185 | (machine_function): Remove ccfsm related fields. | |
16186 | (arc_ifcvt): Remove pass. | |
16187 | (arc_print_operand): Remove `#` punct operand and other ccfsm | |
16188 | related code. | |
16189 | (arc_ccfsm_advance): Remove. | |
16190 | (arc_ccfsm_at_label): Likewise. | |
16191 | (arc_ccfsm_record_condition): Likewise. | |
16192 | (arc_ccfsm_post_advance): Likewise. | |
16193 | (arc_ccfsm_branch_deleted_p): Likewise. | |
16194 | (arc_ccfsm_record_branch_deleted): Likewise. | |
16195 | (arc_ccfsm_cond_exec_p): Likewise. | |
16196 | (arc_get_ccfsm_cond): Likewise. | |
16197 | (arc_final_prescan_insn): Remove ccfsm references. | |
16198 | (arc_internal_label): Likewise. | |
16199 | (arc_reorg): Likewise. | |
16200 | (arc_output_libcall): Likewise. | |
16201 | * config/arc/arc.md: Remove ccfsm references and update related | |
16202 | instruction patterns. | |
16203 | ||
16204 | 2023-10-05 Claudiu Zissulescu <claziss@gmail.com> | |
16205 | ||
16206 | * config/arc/arc.cc (arc_init): Remove '^' punct char. | |
16207 | (arc_print_operand): Remove related code. | |
16208 | * config/arc/arc.md: Update patterns which uses '%&'. | |
16209 | ||
16210 | 2023-10-05 Claudiu Zissulescu <claziss@gmail.com> | |
16211 | ||
16212 | * config/arc/arc-protos.h (arc_clear_unalign): Remove. | |
16213 | (arc_toggle_unalign): Likewise. | |
16214 | * config/arc/arc.cc (machine_function) Remove unalign. | |
16215 | (arc_init): Remove `&` punct character. | |
16216 | (arc_print_operand): Remove `&` related functions. | |
16217 | (arc_verify_short): Update function's number of parameters. | |
16218 | (output_short_suffix): Update function. | |
16219 | (arc_short_long): Likewise. | |
16220 | (arc_clear_unalign): Remove. | |
16221 | (arc_toggle_unalign): Likewise. | |
16222 | * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove. | |
16223 | (ASM_OUTPUT_ALIGN): Update. | |
16224 | * config/arc/arc.md: Remove all `%&` references. | |
16225 | * config/arc/arc.opt (mannotate-align): Ignore option. | |
16226 | * doc/invoke.texi (mannotate-align): Update description. | |
16227 | ||
16228 | 2023-10-05 Richard Biener <rguenther@suse.de> | |
16229 | ||
16230 | * tree-vect-slp.cc (vect_build_slp_tree_1): Do not | |
16231 | ask for internal_fn_p (CFN_LAST). | |
16232 | ||
16233 | 2023-10-05 Richard Biener <rguenther@suse.de> | |
16234 | ||
16235 | * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not | |
16236 | visited value numbers are available itself. | |
16237 | ||
16238 | 2023-10-05 Richard Biener <rguenther@suse.de> | |
16239 | ||
16240 | PR ipa/111643 | |
16241 | * doc/extend.texi (attribute flatten): Clarify. | |
16242 | ||
16243 | 2023-10-04 Roger Sayle <roger@nextmovesoftware.com> | |
16244 | ||
16245 | * config/arc/arc-protos.h (emit_shift): Delete prototype. | |
16246 | (arc_pre_reload_split): New function prototype. | |
16247 | * config/arc/arc.cc (emit_shift): Delete function. | |
16248 | (arc_pre_reload_split): New predicate function, copied from i386, | |
16249 | to schedule define_insn_and_split splitters to the split1 pass. | |
16250 | * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally. | |
16251 | (ashrsi3): Likewise. | |
16252 | (lshrsi3): Likewise. | |
16253 | (shift_si3): Move after other shift patterns, and disable when | |
16254 | operands[2] is one (which is handled by its own define_insn). | |
16255 | Use shiftr4_operator, instead of shift4_operator, as this is no | |
16256 | longer used for left shifts. | |
16257 | (shift_si3_loop): Likewise. Additionally remove match_scratch. | |
16258 | (*ashlsi3_nobs): New pre-reload define_insn_and_split. | |
16259 | (*ashrsi3_nobs): Likewise. | |
16260 | (*lshrsi3_nobs): Likewise. | |
16261 | (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1. | |
16262 | (add_shift): Rename define_insn from *add_shift. | |
16263 | * config/arc/predicates.md (shiftl4_operator): Delete. | |
16264 | (shift4_operator): Delete. | |
16265 | ||
16266 | 2023-10-04 Roger Sayle <roger@nextmovesoftware.com> | |
16267 | ||
16268 | * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1. | |
16269 | Change type attribute to "unary", as this doesn't have operands[2]. | |
16270 | Change length attribute to "*,4" to allow compact representation. | |
16271 | (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change | |
16272 | insn type attribute to "unary", as this doesn't have operands[2]. | |
16273 | (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change | |
16274 | insn type attribute to "unary", as this doesn't have operands[2]. | |
16275 | ||
16276 | 2023-10-04 Roger Sayle <roger@nextmovesoftware.com> | |
16277 | ||
16278 | PR rtl-optimization/110701 | |
16279 | * combine.cc (record_dead_and_set_regs_1): Split comment into | |
16280 | pieces placed before the relevant clauses. When the SET_DEST | |
16281 | is a partial_subreg_p, mark the bits outside of the updated | |
16282 | portion of the destination as undefined. | |
16283 | ||
16284 | 2023-10-04 Kito Cheng <kito.cheng@sifive.com> | |
16285 | ||
16286 | PR bootstrap/111664 | |
16287 | * opt-read.awk: Drop multidimensional arrays. | |
16288 | * opth-gen.awk: Ditto. | |
16289 | ||
16290 | 2023-10-04 Xi Ruoyao <xry111@xry111.site> | |
16291 | ||
16292 | * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete. | |
16293 | (copysign<mode>3): Use copysign RTL instead of UNSPEC. | |
16294 | ||
16295 | 2023-10-04 Jakub Jelinek <jakub@redhat.com> | |
16296 | ||
16297 | PR middle-end/111369 | |
16298 | * match.pd (x == cstN ? cst4 : cst3): Use | |
16299 | build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE. | |
16300 | Fix comment typo. Formatting fix. | |
16301 | (a?~t:t -> (-(a))^t): Always convert to type rather | |
16302 | than using build_nonstandard_integer_type. Perform negation | |
16303 | only if type has precision > 1 and is not signed BOOLEAN_TYPE. | |
16304 | ||
16305 | 2023-10-04 Jakub Jelinek <jakub@redhat.com> | |
16306 | ||
16307 | PR tree-optimization/111668 | |
16308 | * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and | |
16309 | a ? 0 : -1 cases before the powerof2cst cases and differentiate | |
16310 | between 1-bit precision types, larger precision boolean types | |
16311 | and other integral types. Fix comment pastos and formatting. | |
16312 | ||
16313 | 2023-10-03 Andrew MacLeod <amacleod@redhat.com> | |
16314 | ||
16315 | * tree-ssanames.cc (set_range_info): Use get_ptr_info for | |
16316 | pointers rather than range_info_get_range. | |
16317 | ||
16318 | 2023-10-03 Martin Jambor <mjambor@suse.cz> | |
16319 | ||
16320 | * ipa-modref.h (modref_summary::dump): Make const. | |
16321 | * ipa-modref.cc (modref_summary::dump): Likewise. | |
16322 | (dump_lto_records): Dump to out instead of dump_file. | |
16323 | ||
16324 | 2023-10-03 Martin Jambor <mjambor@suse.cz> | |
16325 | ||
16326 | PR ipa/110378 | |
16327 | * ipa-param-manipulation.cc | |
16328 | (ipa_param_body_adjustments::mark_dead_statements): Verify that any | |
16329 | return uses of PARAM will be removed. | |
16330 | (ipa_param_body_adjustments::mark_clobbers_dead): Likewise. | |
16331 | * ipa-sra.cc (isra_param_desc): New fields | |
16332 | remove_only_when_retval_removed and split_only_when_retval_removed. | |
16333 | (struct gensum_param_desc): Likewise. Fix comment long line. | |
16334 | (ipa_sra_function_summaries::duplicate): Copy the new flags. | |
16335 | (dump_gensum_param_descriptor): Dump the new flags. | |
16336 | (dump_isra_param_descriptor): Likewise. | |
16337 | (isra_track_scalar_value_uses): New parameter desc. Set its flag | |
16338 | remove_only_when_retval_removed when encountering a simple return. | |
16339 | (isra_track_scalar_param_local_uses): Replace parameter call_uses_p | |
16340 | with desc. Pass it to isra_track_scalar_value_uses and set its | |
16341 | call_uses. | |
16342 | (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a | |
16343 | parameter. If there is a direct return use, mark any.. | |
16344 | (create_parameter_descriptors): Pass the whole parameter descriptor to | |
16345 | isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses. | |
16346 | (process_scan_results): Copy the new flags. | |
16347 | (isra_write_node_summary): Stream the new flags. | |
16348 | (isra_read_node_info): Likewise. | |
16349 | (adjust_parameter_descriptions): Check that transformations | |
16350 | requring return removal only happen when return value is removed. | |
16351 | Restructure main loop. Adjust dump message. | |
16352 | ||
16353 | 2023-10-03 Martin Jambor <mjambor@suse.cz> | |
16354 | ||
16355 | PR ipa/108007 | |
16356 | * cgraph.h (cgraph_edge): Add a parameter to | |
16357 | redirect_call_stmt_to_callee. | |
16358 | * ipa-param-manipulation.h (ipa_param_adjustments): Add a | |
16359 | parameter to modify_call. | |
16360 | * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New | |
16361 | parameter killed_ssas, pass it to padjs->modify_call. | |
16362 | * ipa-param-manipulation.cc (purge_transitive_uses): New function. | |
16363 | (ipa_param_adjustments::modify_call): New parameter killed_ssas. | |
16364 | Instead of substituting uses, invoke purge_transitive_uses. If | |
16365 | hash of killed SSAs has not been provided, create a temporary one | |
16366 | and release SSAs that have been added to it. | |
16367 | * tree-inline.cc (redirect_all_calls): Create | |
16368 | id->killed_new_ssa_names earlier, pass it to edge redirection, | |
16369 | adjust a comment. | |
16370 | (copy_body): Release SSAs in id->killed_new_ssa_names. | |
16371 | ||
16372 | 2023-10-03 Andrew MacLeod <amacleod@redhat.com> | |
16373 | ||
16374 | * passes.def (pass_vrp): Pass "final pass" flag as parameter. | |
16375 | * tree-vrp.cc (vrp_pass_num): Remove. | |
16376 | (pass_vrp::my_pass): Remove. | |
16377 | (pass_vrp::pass_vrp): Add warn_p as a parameter. | |
16378 | (pass_vrp::final_p): New. | |
16379 | (pass_vrp::set_pass_param): Set final_p param. | |
16380 | (pass_vrp::execute): Call execute_range_vrp with no conditions. | |
16381 | (make_pass_vrp): Pass additional parameter. | |
16382 | (make_pass_early_vrp): Ditto. | |
16383 | ||
16384 | 2023-10-03 Andrew MacLeod <amacleod@redhat.com> | |
16385 | ||
16386 | * tree-ssanames.cc (set_range_info): Return true only if the | |
16387 | current value changes. | |
16388 | ||
16389 | 2023-10-03 David Malcolm <dmalcolm@redhat.com> | |
16390 | ||
16391 | * diagnostic.cc (diagnostic_set_info_translated): Update for "m_" | |
16392 | prefixes to text_info fields. | |
16393 | (diagnostic_report_diagnostic): Likewise. | |
16394 | (verbatim): Use text_info ctor. | |
16395 | (simple_diagnostic_path::add_event): Likewise. | |
16396 | (simple_diagnostic_path::add_thread_event): Likewise. | |
16397 | * dumpfile.cc (dump_pretty_printer::decode_format): Update for | |
16398 | "m_" prefixes to text_info fields. | |
16399 | (dump_context::dump_printf_va): Use text_info ctor. | |
16400 | * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor. | |
16401 | (graphviz_out::print): Likewise. | |
16402 | * opt-problem.cc (opt_problem::opt_problem): Likewise. | |
16403 | * pretty-print.cc (pp_format): Update for "m_" prefixes to | |
16404 | text_info fields. | |
16405 | (pp_printf): Use text_info ctor. | |
16406 | (pp_verbatim): Likewise. | |
16407 | (assert_pp_format_va): Likewise. | |
16408 | * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix | |
16409 | to all fields. | |
16410 | * text-art/styled-string.cc (styled_string::from_fmt_va): Use | |
16411 | text_info ctor. | |
16412 | * tree-diagnostic.cc (default_tree_printer): Update for "m_" | |
16413 | prefixes to text_info fields. | |
16414 | * tree-pretty-print.h (pp_ti_abstract_origin): Likewise. | |
16415 | ||
16416 | 2023-10-03 Roger Sayle <roger@nextmovesoftware.com> | |
16417 | ||
16418 | * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C. | |
16419 | (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn. | |
16420 | (*scc_insn): Don't split to a conditional move sequence for LTU. | |
16421 | ||
16422 | 2023-10-03 Andrea Corallo <andrea.corallo@arm.com> | |
16423 | ||
16424 | * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>) | |
16425 | (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn) | |
16426 | (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>) | |
16427 | (load_pair_dw_<DX:mode><DX2:mode>) | |
16428 | (store_pair_sw_<SX:mode><SX2:mode>) | |
16429 | (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64) | |
16430 | (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64) | |
16431 | (*extend<SHORT:mode><GPI:mode>2_aarch64) | |
16432 | (*zero_extend<SHORT:mode><GPI:mode>2_aarch64) | |
16433 | (*extendqihi2_aarch64, *zero_extendqihi2_aarch64) | |
16434 | (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1) | |
16435 | (add<mode>3_compare0, *addsi3_compare0_uxtw) | |
16436 | (*add<mode>3_compareC_cconly, add<mode>3_compareC) | |
16437 | (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm) | |
16438 | (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm) | |
16439 | (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2) | |
16440 | (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn) | |
16441 | (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw) | |
16442 | (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2) | |
16443 | (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0) | |
16444 | (*aarch64_ashl_sisd_or_int_<mode>3) | |
16445 | (*aarch64_lshr_sisd_or_int_<mode>3) | |
16446 | (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn) | |
16447 | (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2) | |
16448 | (<optab><fcvt_target><GPF:mode>2) | |
16449 | (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3) | |
16450 | (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3) | |
16451 | (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update | |
16452 | to new syntax. | |
16453 | * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>) | |
16454 | (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>) | |
16455 | (*aarch64_mul_unpredicated_<mode>) | |
16456 | (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2) | |
16457 | (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any) | |
16458 | (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>) | |
16459 | (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3) | |
16460 | (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>) | |
16461 | (@aarch64_sve_<sve_int_op>_lane_<mode>) | |
16462 | (@aarch64_sve_add_mul_lane_<mode>) | |
16463 | (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>) | |
16464 | (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>) | |
16465 | (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>) | |
16466 | (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>) | |
16467 | (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>) | |
16468 | (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>) | |
16469 | (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>) | |
16470 | (@aarch64_sve_add_<sve_int_op>_lane_<mode>) | |
16471 | (@aarch64_sve_qadd_<sve_int_op><mode>) | |
16472 | (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>) | |
16473 | (@aarch64_sve_sub_<sve_int_op><mode>) | |
16474 | (@aarch64_sve_sub_<sve_int_op>_lane_<mode>) | |
16475 | (@aarch64_sve_qsub_<sve_int_op><mode>) | |
16476 | (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>) | |
16477 | (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>) | |
16478 | (@aarch64_pred_<sve_int_op><mode>) | |
16479 | (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2) | |
16480 | (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>) | |
16481 | (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>) | |
16482 | (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>) | |
16483 | (*cond_<sve_fp_op><mode>_any_relaxed) | |
16484 | (*cond_<sve_fp_op><mode>_any_strict) | |
16485 | (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>) | |
16486 | (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>) | |
16487 | (*cond_<sve_fp_op><mode>_strict): Update to new syntax. | |
16488 | * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str) | |
16489 | (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>) | |
16490 | (*aarch64_sve_mov<mode>, aarch64_wrffr) | |
16491 | (mask_scatter_store<mode><v_int_container>) | |
16492 | (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked) | |
16493 | (*mask_scatter_store<mode><v_int_container>_sxtw) | |
16494 | (*mask_scatter_store<mode><v_int_container>_uxtw) | |
16495 | (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>) | |
16496 | (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>) | |
16497 | (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw) | |
16498 | (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw) | |
16499 | (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>) | |
16500 | (vec_series<mode>, @extract_<last_op>_<mode>) | |
16501 | (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2) | |
16502 | (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>) | |
16503 | (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>) | |
16504 | (@cond_<optab><mode>) | |
16505 | (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2) | |
16506 | (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>) | |
16507 | (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>) | |
16508 | (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>) | |
16509 | (*cond_cnot<mode>_2, *cond_cnot<mode>_any) | |
16510 | (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed) | |
16511 | (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed) | |
16512 | (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>) | |
16513 | (*cond_<optab><mode>_2, *cond_<optab><mode>_3) | |
16514 | (*cond_<optab><mode>_any, add<mode>3, sub<mode>3) | |
16515 | (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2) | |
16516 | (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any) | |
16517 | (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>) | |
16518 | (*cond_<optab><mode>_2, *cond_<optab><mode>_z) | |
16519 | (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2) | |
16520 | (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3) | |
16521 | (*cond_bic<mode>_2, *cond_bic<mode>_any) | |
16522 | (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const) | |
16523 | (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m) | |
16524 | (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3) | |
16525 | (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any) | |
16526 | (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed) | |
16527 | (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed) | |
16528 | (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>) | |
16529 | (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict) | |
16530 | (*cond_<optab><mode>_2_const_relaxed) | |
16531 | (*cond_<optab><mode>_2_const_strict) | |
16532 | (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict) | |
16533 | (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict) | |
16534 | (*cond_<optab><mode>_any_const_relaxed) | |
16535 | (*cond_<optab><mode>_any_const_strict) | |
16536 | (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed) | |
16537 | (*cond_add<mode>_2_const_strict) | |
16538 | (*cond_add<mode>_any_const_relaxed) | |
16539 | (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>) | |
16540 | (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict) | |
16541 | (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict) | |
16542 | (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed) | |
16543 | (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed) | |
16544 | (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed) | |
16545 | (*aarch64_pred_abd<mode>_strict) | |
16546 | (*aarch64_cond_abd<mode>_2_relaxed) | |
16547 | (*aarch64_cond_abd<mode>_2_strict) | |
16548 | (*aarch64_cond_abd<mode>_3_relaxed) | |
16549 | (*aarch64_cond_abd<mode>_3_strict) | |
16550 | (*aarch64_cond_abd<mode>_any_relaxed) | |
16551 | (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>) | |
16552 | (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4) | |
16553 | (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>) | |
16554 | (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any) | |
16555 | (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>) | |
16556 | (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>) | |
16557 | (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>) | |
16558 | (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict) | |
16559 | (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict) | |
16560 | (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict) | |
16561 | (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>) | |
16562 | (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict) | |
16563 | (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict) | |
16564 | (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>) | |
16565 | (@aarch64_sve_<sve_fp_op>vnx4sf) | |
16566 | (@aarch64_sve_<sve_fp_op>_lanevnx4sf) | |
16567 | (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>) | |
16568 | (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>) | |
16569 | (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest) | |
16570 | (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>) | |
16571 | (@aarch64_fold_extract_vector_<last_op>_<mode>) | |
16572 | (@aarch64_sve_splice<mode>) | |
16573 | (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>) | |
16574 | (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>) | |
16575 | (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed) | |
16576 | (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict) | |
16577 | (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>) | |
16578 | (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>) | |
16579 | (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>) | |
16580 | (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed) | |
16581 | (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict) | |
16582 | (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>) | |
16583 | (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>) | |
16584 | (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>) | |
16585 | (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>) | |
16586 | (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>) | |
16587 | (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>) | |
16588 | (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>) | |
16589 | (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update | |
16590 | to new syntax. | |
16591 | * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>) | |
16592 | (load_pair<DREG:mode><DREG2:mode>) | |
16593 | (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>) | |
16594 | (aarch64_simd_mov_from_<mode>low) | |
16595 | (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>) | |
16596 | (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>) | |
16597 | (aarch64_simd_bsl<mode>_internal<vczle><vczbe>) | |
16598 | (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>) | |
16599 | (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt) | |
16600 | (store_pair_lanes<mode>, *aarch64_combine_internal<mode>) | |
16601 | (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>) | |
16602 | (*aarch64_combinez_be<mode>) | |
16603 | (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di) | |
16604 | (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>) | |
16605 | (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax. | |
16606 | ||
16607 | 2023-10-03 Andrea Corallo <andrea.corallo@arm.com> | |
16608 | ||
16609 | * gensupport.cc (convert_syntax): Skip spaces before "cons:" | |
16610 | in new compact pattern syntax. | |
16611 | ||
16612 | 2023-10-03 Richard Sandiford <richard.sandiford@arm.com> | |
16613 | ||
16614 | * gensupport.cc (convert_syntax): Updated to support unordered | |
16615 | constraints in compact syntax. | |
16616 | ||
16617 | 2023-10-02 Michael Meissner <meissner@linux.ibm.com> | |
16618 | ||
16619 | * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete. | |
16620 | (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC. | |
16621 | (copysign<mode>3_hard): Likewise. | |
16622 | (copysign<mode>3_soft): Likewise. | |
16623 | * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL | |
16624 | instead of UNSPEC. | |
16625 | * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead | |
16626 | of UNSPEC. | |
16627 | ||
16628 | 2023-10-02 David Malcolm <dmalcolm@redhat.com> | |
16629 | ||
16630 | * diagnostic-format-json.cc (toplevel_array): Remove global in | |
16631 | favor of json_output_format::m_top_level_array. | |
16632 | (cur_group): Likewise, for json_output_format::m_cur_group. | |
16633 | (cur_children_array): Likewise, for | |
16634 | json_output_format::m_cur_children_array. | |
16635 | (class json_output_format): New. | |
16636 | (json_begin_diagnostic): Remove, in favor of | |
16637 | json_output_format::on_begin_diagnostic. | |
16638 | (json_end_diagnostic): Convert to... | |
16639 | (json_output_format::on_end_diagnostic): ...this. | |
16640 | (json_begin_group): Remove, in favor of | |
16641 | json_output_format::on_begin_group. | |
16642 | (json_end_group): Remove, in favor of | |
16643 | json_output_format::on_end_group. | |
16644 | (json_flush_to_file): Remove, in favor of | |
16645 | json_output_format::flush_to_file. | |
16646 | (json_stderr_final_cb): Remove, in favor of json_output_format | |
16647 | dtor. | |
16648 | (json_output_base_file_name): Remove global. | |
16649 | (class json_stderr_output_format): New. | |
16650 | (json_file_final_cb): Remove. | |
16651 | (class json_file_output_format): New. | |
16652 | (json_emit_diagram): Remove. | |
16653 | (diagnostic_output_format_init_json): Update. | |
16654 | (diagnostic_output_format_init_json_file): Update. | |
16655 | * diagnostic-format-sarif.cc (the_builder): Remove this global, | |
16656 | moving to a field of the sarif_output_format. | |
16657 | (sarif_builder::maybe_make_artifact_content_object): Use the | |
16658 | context's m_file_cache. | |
16659 | (get_source_lines): Convert to... | |
16660 | (sarif_builder::get_source_lines): ...this, using context's | |
16661 | m_file_cache. | |
16662 | (sarif_begin_diagnostic): Remove, in favor of | |
16663 | sarif_output_format::on_begin_diagnostic. | |
16664 | (sarif_end_diagnostic): Remove, in favor of | |
16665 | sarif_output_format::on_end_diagnostic. | |
16666 | (sarif_begin_group): Remove, in favor of | |
16667 | sarif_output_format::on_begin_group. | |
16668 | (sarif_end_group): Remove, in favor of | |
16669 | sarif_output_format::on_end_group. | |
16670 | (sarif_flush_to_file): Delete. | |
16671 | (sarif_stderr_final_cb): Delete. | |
16672 | (sarif_output_base_file_name): Delete. | |
16673 | (sarif_file_final_cb): Delete. | |
16674 | (class sarif_output_format): New. | |
16675 | (sarif_emit_diagram): Delete. | |
16676 | (class sarif_stream_output_format): New. | |
16677 | (class sarif_file_output_format): New. | |
16678 | (diagnostic_output_format_init_sarif): Update. | |
16679 | (diagnostic_output_format_init_sarif_stderr): Update. | |
16680 | (diagnostic_output_format_init_sarif_file): Update. | |
16681 | (diagnostic_output_format_init_sarif_stream): Update. | |
16682 | * diagnostic-show-locus.cc (diagnostic_show_locus): Update. | |
16683 | * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to | |
16684 | diagnostic_text_output_format's dtor. | |
16685 | (diagnostic_initialize): Update, making a new instance of | |
16686 | diagnostic_text_output_format. | |
16687 | (diagnostic_finish): Delete m_output_format, rather than calling | |
16688 | final_cb. | |
16689 | (diagnostic_report_diagnostic): Assert that m_output_format is | |
16690 | non-NULL. Replace call to begin_group_cb with call to | |
16691 | m_output_format->on_begin_group. Replace call to | |
16692 | diagnostic_starter with call to | |
16693 | m_output_format->on_begin_diagnostic. Replace call to | |
16694 | diagnostic_finalizer with call to | |
16695 | m_output_format->on_end_diagnostic. | |
16696 | (diagnostic_emit_diagram): Replace both optional call to | |
16697 | m_diagrams.m_emission_cb and default implementation with call to | |
16698 | m_output_format->on_diagram. Move default implementation to | |
16699 | diagnostic_text_output_format::on_diagram. | |
16700 | (auto_diagnostic_group::~auto_diagnostic_group): Replace call to | |
16701 | end_group_cb with call to m_output_format->on_end_group. | |
16702 | (diagnostic_text_output_format::~diagnostic_text_output_format): | |
16703 | New, based on default_diagnostic_final_cb. | |
16704 | (diagnostic_text_output_format::on_begin_diagnostic): New, based | |
16705 | on code from diagnostic_report_diagnostic. | |
16706 | (diagnostic_text_output_format::on_end_diagnostic): Likewise. | |
16707 | (diagnostic_text_output_format::on_diagram): New, based on code | |
16708 | from diagnostic_emit_diagram. | |
16709 | * diagnostic.h (class diagnostic_output_format): New. | |
16710 | (class diagnostic_text_output_format): New. | |
16711 | (diagnostic_context::begin_diagnostic): Move to... | |
16712 | (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here. | |
16713 | (diagnostic_context::start_span): Move to... | |
16714 | (diagnostic_context::m_text_callbacks::start_span): ...here. | |
16715 | (diagnostic_context::end_diagnostic): Move to... | |
16716 | (diagnostic_context::m_text_callbacks::end_diagnostic): ...here. | |
16717 | (diagnostic_context::begin_group_cb): Remove, in favor of | |
16718 | m_output_format->on_begin_group. | |
16719 | (diagnostic_context::end_group_cb): Remove, in favor of | |
16720 | m_output_format->on_end_group. | |
16721 | (diagnostic_context::final_cb): Remove, in favor of | |
16722 | m_output_format's dtor. | |
16723 | (diagnostic_context::m_output_format): New field. | |
16724 | (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor | |
16725 | of m_output_format->on_diagram. | |
16726 | (diagnostic_starter): Update. | |
16727 | (diagnostic_finalizer): Update. | |
16728 | (diagnostic_output_format_init_sarif_stream): New. | |
16729 | * input.cc (location_get_source_line): Move implementation apart from | |
16730 | call to diagnostic_file_cache_init to... | |
16731 | (file_cache::get_source_line): ...this new function... | |
16732 | (location_get_source_line): ...and reintroduce, rewritten in terms of | |
16733 | file_cache::get_source_line. | |
16734 | (get_source_file_content): Likewise, refactor into... | |
16735 | (file_cache::get_source_file_content): ...this new function. | |
16736 | * input.h (file_cache::get_source_line): New decl. | |
16737 | (file_cache::get_source_file_content): New decl. | |
16738 | * selftest-diagnostic.cc | |
16739 | (test_diagnostic_context::test_diagnostic_context): Update. | |
16740 | * tree-diagnostic-path.cc (event_range::print): Update for | |
16741 | change to diagnostic_context's start_span callback. | |
16742 | ||
16743 | 2023-10-02 David Malcolm <dmalcolm@redhat.com> | |
16744 | ||
16745 | * diagnostic-show-locus.cc: Update for reorganization of | |
16746 | source-printing fields of diagnostic_context. | |
16747 | * diagnostic.cc (diagnostic_set_caret_max_width): Likewise. | |
16748 | (diagnostic_initialize): Likewise. | |
16749 | * diagnostic.h (diagnostic_context::show_caret): Move to... | |
16750 | (diagnostic_context::m_source_printing::enabled): ...here. | |
16751 | (diagnostic_context::caret_max_width): Move to... | |
16752 | (diagnostic_context::m_source_printing::max_width): ...here. | |
16753 | (diagnostic_context::caret_chars): Move to... | |
16754 | (diagnostic_context::m_source_printing::caret_chars): ...here. | |
16755 | (diagnostic_context::colorize_source_p): Move to... | |
16756 | (diagnostic_context::m_source_printing::colorize_source_p): ...here. | |
16757 | (diagnostic_context::show_labels_p): Move to... | |
16758 | (diagnostic_context::m_source_printing::show_labels_p): ...here. | |
16759 | (diagnostic_context::show_line_numbers_p): Move to... | |
16760 | (diagnostic_context::m_source_printing::show_line_numbers_p): ...here. | |
16761 | (diagnostic_context::min_margin_width): Move to... | |
16762 | (diagnostic_context::m_source_printing::min_margin_width): ...here. | |
16763 | (diagnostic_context::show_ruler_p): Move to... | |
16764 | (diagnostic_context::m_source_printing::show_ruler_p): ...here. | |
16765 | (diagnostic_same_line): Update for above changes. | |
16766 | * opts.cc (common_handle_option): Update for reorganization of | |
16767 | source-printing fields of diagnostic_context. | |
16768 | * selftest-diagnostic.cc | |
16769 | (test_diagnostic_context::test_diagnostic_context): Likewise. | |
16770 | * toplev.cc (general_init): Likewise. | |
16771 | * tree-diagnostic-path.cc (struct event_range): Likewise. | |
16772 | ||
16773 | 2023-10-02 David Malcolm <dmalcolm@redhat.com> | |
16774 | ||
16775 | * diagnostic.cc (diagnostic_initialize): Initialize | |
16776 | set_locations_cb to nullptr. | |
16777 | ||
16778 | 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
16779 | ||
16780 | PR target/111235 | |
16781 | * config/arm/constraints.md: Remove Pf constraint. | |
16782 | * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern. | |
16783 | (arm_atomic_load_acquire<mode>): Likewise. | |
16784 | (arm_atomic_store<mode>): Likewise. | |
16785 | (arm_atomic_store_release<mode>): Likewise. | |
16786 | (atomic_load<mode>): Switch patterns to define_expand. | |
16787 | (atomic_store<mode>): Likewise. | |
16788 | (arm_atomic_loaddi2_ldrd): Remove predication. | |
16789 | (arm_load_exclusive<mode>): Likewise. | |
16790 | (arm_load_acquire_exclusive<mode>): Likewise. | |
16791 | (arm_load_exclusivesi): Likewise. | |
16792 | (arm_load_acquire_exclusivesi): Likewise. | |
16793 | (arm_load_exclusivedi): Likewise. | |
16794 | (arm_load_acquire_exclusivedi): Likewise. | |
16795 | (arm_store_exclusive<mode>): Likewise. | |
16796 | (arm_store_release_exclusivedi): Likewise. | |
16797 | (arm_store_release_exclusive<mode>): Likewise. | |
16798 | * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR. | |
16799 | ||
16800 | 2023-10-02 Tamar Christina <tamar.christina@arm.com> | |
16801 | ||
16802 | Revert: | |
16803 | 2023-10-02 Tamar Christina <tamar.christina@arm.com> | |
16804 | ||
16805 | PR tree-optimization/109154 | |
16806 | * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove. | |
16807 | (cmp_arg_entry): New. | |
16808 | (predicate_scalar_phi): Use it. | |
16809 | ||
16810 | 2023-10-02 Tamar Christina <tamar.christina@arm.com> | |
16811 | ||
16812 | * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to.. | |
16813 | (@xorsign<mode>3): ...This. | |
16814 | * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to... | |
16815 | (@xorsign<mode>3): ..This and emit vectors directly | |
16816 | * config/aarch64/iterators.md (VCONQ): Add SF and DF. | |
16817 | ||
16818 | 2023-10-02 Tamar Christina <tamar.christina@arm.com> | |
16819 | ||
16820 | * emit-rtl.cc (validate_subreg): Relax subreg rule. | |
16821 | ||
16822 | 2023-10-02 Tamar Christina <tamar.christina@arm.com> | |
16823 | ||
16824 | PR tree-optimization/109154 | |
16825 | * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove. | |
16826 | (cmp_arg_entry): New. | |
16827 | (predicate_scalar_phi): Use it. | |
16828 | ||
16829 | 2023-10-02 Richard Sandiford <richard.sandiford@arm.com> | |
16830 | ||
16831 | PR bootstrap/111642 | |
16832 | * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local | |
16833 | poly_int64 typedef. | |
16834 | * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise. | |
16835 | ||
16836 | 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com> | |
16837 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
16838 | ||
16839 | * config/riscv/riscv-protos.h (riscv_vector::expand_block_move): | |
16840 | Declare. | |
16841 | * config/riscv/riscv-v.cc (riscv_vector::expand_block_move): | |
16842 | New function. | |
16843 | * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move. | |
16844 | Change to .. | |
16845 | (cpymem<P:mode>) .. this. | |
16846 | ||
16847 | 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
16848 | ||
16849 | * combine.cc (simplify_compare_const): Properly handle unsigned | |
16850 | constants while narrowing comparison of memory and constants. | |
16851 | ||
16852 | 2023-10-01 Feng Wang <wangfeng@eswincomputing.com> | |
16853 | ||
16854 | * config/riscv/riscv-opts.h (MASK_ZICSR): Delete. | |
16855 | (MASK_ZIFENCEI): Delete; | |
16856 | (MASK_ZIHINTNTL): Ditto. | |
16857 | (MASK_ZIHINTPAUSE): Ditto. | |
16858 | (TARGET_ZICSR): Ditto. | |
16859 | (TARGET_ZIFENCEI): Ditto. | |
16860 | (TARGET_ZIHINTNTL): Ditto. | |
16861 | (TARGET_ZIHINTPAUSE): Ditto. | |
16862 | (MASK_ZAWRS): Ditto. | |
16863 | (TARGET_ZAWRS): Ditto. | |
16864 | (MASK_ZBA): Ditto. | |
16865 | (MASK_ZBB): Ditto. | |
16866 | (MASK_ZBC): Ditto. | |
16867 | (MASK_ZBS): Ditto. | |
16868 | (TARGET_ZBA): Ditto. | |
16869 | (TARGET_ZBB): Ditto. | |
16870 | (TARGET_ZBC): Ditto. | |
16871 | (TARGET_ZBS): Ditto. | |
16872 | (MASK_ZFINX): Ditto. | |
16873 | (MASK_ZDINX): Ditto. | |
16874 | (MASK_ZHINX): Ditto. | |
16875 | (MASK_ZHINXMIN): Ditto. | |
16876 | (TARGET_ZFINX): Ditto. | |
16877 | (TARGET_ZDINX): Ditto. | |
16878 | (TARGET_ZHINX): Ditto. | |
16879 | (TARGET_ZHINXMIN): Ditto. | |
16880 | (MASK_ZBKB): Ditto. | |
16881 | (MASK_ZBKC): Ditto. | |
16882 | (MASK_ZBKX): Ditto. | |
16883 | (MASK_ZKNE): Ditto. | |
16884 | (MASK_ZKND): Ditto. | |
16885 | (MASK_ZKNH): Ditto. | |
16886 | (MASK_ZKR): Ditto. | |
16887 | (MASK_ZKSED): Ditto. | |
16888 | (MASK_ZKSH): Ditto. | |
16889 | (MASK_ZKT): Ditto. | |
16890 | (TARGET_ZBKB): Ditto. | |
16891 | (TARGET_ZBKC): Ditto. | |
16892 | (TARGET_ZBKX): Ditto. | |
16893 | (TARGET_ZKNE): Ditto. | |
16894 | (TARGET_ZKND): Ditto. | |
16895 | (TARGET_ZKNH): Ditto. | |
16896 | (TARGET_ZKR): Ditto. | |
16897 | (TARGET_ZKSED): Ditto. | |
16898 | (TARGET_ZKSH): Ditto. | |
16899 | (TARGET_ZKT): Ditto. | |
16900 | (MASK_ZTSO): Ditto. | |
16901 | (TARGET_ZTSO): Ditto. | |
16902 | (MASK_VECTOR_ELEN_32): Ditto. | |
16903 | (MASK_VECTOR_ELEN_64): Ditto. | |
16904 | (MASK_VECTOR_ELEN_FP_32): Ditto. | |
16905 | (MASK_VECTOR_ELEN_FP_64): Ditto. | |
16906 | (MASK_VECTOR_ELEN_FP_16): Ditto. | |
16907 | (TARGET_VECTOR_ELEN_32): Ditto. | |
16908 | (TARGET_VECTOR_ELEN_64): Ditto. | |
16909 | (TARGET_VECTOR_ELEN_FP_32): Ditto. | |
16910 | (TARGET_VECTOR_ELEN_FP_64): Ditto. | |
16911 | (TARGET_VECTOR_ELEN_FP_16): Ditto. | |
16912 | (MASK_ZVBB): Ditto. | |
16913 | (MASK_ZVBC): Ditto. | |
16914 | (TARGET_ZVBB): Ditto. | |
16915 | (TARGET_ZVBC): Ditto. | |
16916 | (MASK_ZVKG): Ditto. | |
16917 | (MASK_ZVKNED): Ditto. | |
16918 | (MASK_ZVKNHA): Ditto. | |
16919 | (MASK_ZVKNHB): Ditto. | |
16920 | (MASK_ZVKSED): Ditto. | |
16921 | (MASK_ZVKSH): Ditto. | |
16922 | (MASK_ZVKN): Ditto. | |
16923 | (MASK_ZVKNC): Ditto. | |
16924 | (MASK_ZVKNG): Ditto. | |
16925 | (MASK_ZVKS): Ditto. | |
16926 | (MASK_ZVKSC): Ditto. | |
16927 | (MASK_ZVKSG): Ditto. | |
16928 | (MASK_ZVKT): Ditto. | |
16929 | (TARGET_ZVKG): Ditto. | |
16930 | (TARGET_ZVKNED): Ditto. | |
16931 | (TARGET_ZVKNHA): Ditto. | |
16932 | (TARGET_ZVKNHB): Ditto. | |
16933 | (TARGET_ZVKSED): Ditto. | |
16934 | (TARGET_ZVKSH): Ditto. | |
16935 | (TARGET_ZVKN): Ditto. | |
16936 | (TARGET_ZVKNC): Ditto. | |
16937 | (TARGET_ZVKNG): Ditto. | |
16938 | (TARGET_ZVKS): Ditto. | |
16939 | (TARGET_ZVKSC): Ditto. | |
16940 | (TARGET_ZVKSG): Ditto. | |
16941 | (TARGET_ZVKT): Ditto. | |
16942 | (MASK_ZVL32B): Ditto. | |
16943 | (MASK_ZVL64B): Ditto. | |
16944 | (MASK_ZVL128B): Ditto. | |
16945 | (MASK_ZVL256B): Ditto. | |
16946 | (MASK_ZVL512B): Ditto. | |
16947 | (MASK_ZVL1024B): Ditto. | |
16948 | (MASK_ZVL2048B): Ditto. | |
16949 | (MASK_ZVL4096B): Ditto. | |
16950 | (MASK_ZVL8192B): Ditto. | |
16951 | (MASK_ZVL16384B): Ditto. | |
16952 | (MASK_ZVL32768B): Ditto. | |
16953 | (MASK_ZVL65536B): Ditto. | |
16954 | (TARGET_ZVL32B): Ditto. | |
16955 | (TARGET_ZVL64B): Ditto. | |
16956 | (TARGET_ZVL128B): Ditto. | |
16957 | (TARGET_ZVL256B): Ditto. | |
16958 | (TARGET_ZVL512B): Ditto. | |
16959 | (TARGET_ZVL1024B): Ditto. | |
16960 | (TARGET_ZVL2048B): Ditto. | |
16961 | (TARGET_ZVL4096B): Ditto. | |
16962 | (TARGET_ZVL8192B): Ditto. | |
16963 | (TARGET_ZVL16384B): Ditto. | |
16964 | (TARGET_ZVL32768B): Ditto. | |
16965 | (TARGET_ZVL65536B): Ditto. | |
16966 | (MASK_ZICBOZ): Ditto. | |
16967 | (MASK_ZICBOM): Ditto. | |
16968 | (MASK_ZICBOP): Ditto. | |
16969 | (TARGET_ZICBOZ): Ditto. | |
16970 | (TARGET_ZICBOM): Ditto. | |
16971 | (TARGET_ZICBOP): Ditto. | |
16972 | (MASK_ZICOND): Ditto. | |
16973 | (TARGET_ZICOND): Ditto. | |
16974 | (MASK_ZFA): Ditto. | |
16975 | (TARGET_ZFA): Ditto. | |
16976 | (MASK_ZFHMIN): Ditto. | |
16977 | (MASK_ZFH): Ditto. | |
16978 | (MASK_ZVFHMIN): Ditto. | |
16979 | (MASK_ZVFH): Ditto. | |
16980 | (TARGET_ZFHMIN): Ditto. | |
16981 | (TARGET_ZFH): Ditto. | |
16982 | (TARGET_ZVFHMIN): Ditto. | |
16983 | (TARGET_ZVFH): Ditto. | |
16984 | (MASK_ZMMUL): Ditto. | |
16985 | (TARGET_ZMMUL): Ditto. | |
16986 | (MASK_ZCA): Ditto. | |
16987 | (MASK_ZCB): Ditto. | |
16988 | (MASK_ZCE): Ditto. | |
16989 | (MASK_ZCF): Ditto. | |
16990 | (MASK_ZCD): Ditto. | |
16991 | (MASK_ZCMP): Ditto. | |
16992 | (MASK_ZCMT): Ditto. | |
16993 | (TARGET_ZCA): Ditto. | |
16994 | (TARGET_ZCB): Ditto. | |
16995 | (TARGET_ZCE): Ditto. | |
16996 | (TARGET_ZCF): Ditto. | |
16997 | (TARGET_ZCD): Ditto. | |
16998 | (TARGET_ZCMP): Ditto. | |
16999 | (TARGET_ZCMT): Ditto. | |
17000 | (MASK_SVINVAL): Ditto. | |
17001 | (MASK_SVNAPOT): Ditto. | |
17002 | (TARGET_SVINVAL): Ditto. | |
17003 | (TARGET_SVNAPOT): Ditto. | |
17004 | (MASK_XTHEADBA): Ditto. | |
17005 | (MASK_XTHEADBB): Ditto. | |
17006 | (MASK_XTHEADBS): Ditto. | |
17007 | (MASK_XTHEADCMO): Ditto. | |
17008 | (MASK_XTHEADCONDMOV): Ditto. | |
17009 | (MASK_XTHEADFMEMIDX): Ditto. | |
17010 | (MASK_XTHEADFMV): Ditto. | |
17011 | (MASK_XTHEADINT): Ditto. | |
17012 | (MASK_XTHEADMAC): Ditto. | |
17013 | (MASK_XTHEADMEMIDX): Ditto. | |
17014 | (MASK_XTHEADMEMPAIR): Ditto. | |
17015 | (MASK_XTHEADSYNC): Ditto. | |
17016 | (TARGET_XTHEADBA): Ditto. | |
17017 | (TARGET_XTHEADBB): Ditto. | |
17018 | (TARGET_XTHEADBS): Ditto. | |
17019 | (TARGET_XTHEADCMO): Ditto. | |
17020 | (TARGET_XTHEADCONDMOV): Ditto. | |
17021 | (TARGET_XTHEADFMEMIDX): Ditto. | |
17022 | (TARGET_XTHEADFMV): Ditto. | |
17023 | (TARGET_XTHEADINT): Ditto. | |
17024 | (TARGET_XTHEADMAC): Ditto. | |
17025 | (TARGET_XTHEADMEMIDX): Ditto. | |
17026 | (TARGET_XTHEADMEMPAIR): Ditto. | |
17027 | (TARGET_XTHEADSYNC): Ditto. | |
17028 | (MASK_XVENTANACONDOPS): Ditto. | |
17029 | (TARGET_XVENTANACONDOPS): Ditto. | |
17030 | * config/riscv/riscv.opt: Add new Mask defination. | |
17031 | * doc/options.texi: Add explanation for this new usage. | |
17032 | * opt-functions.awk: Add new function to find the index | |
17033 | of target variable from extra_target_vars. | |
17034 | * opt-read.awk: Add new function to store the Mask flags. | |
17035 | * opth-gen.awk: Add new function to output the defination of | |
17036 | Mask Macro and Target Macro. | |
17037 | ||
17038 | 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com> | |
17039 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17040 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17041 | ||
17042 | PR target/111566 | |
17043 | * config/riscv/riscv-protos.h (riscv_vector::legitimize_move): | |
17044 | Change second parameter to rtx *. | |
17045 | * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise. | |
17046 | * config/riscv/vector.md: Changed callers of | |
17047 | riscv_vector::legitimize_move. | |
17048 | (*mov<mode>_mem_to_mem): Remove. | |
17049 | ||
17050 | 2023-09-30 Jakub Jelinek <jakub@redhat.com> | |
17051 | ||
17052 | PR target/111649 | |
17053 | * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager): | |
17054 | Replace safe_grow with safe_grow_cleared. | |
17055 | ||
17056 | 2023-09-30 Jakub Jelinek <jakub@redhat.com> | |
17057 | ||
17058 | * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto | |
17059 | in function comment. | |
17060 | ||
17061 | 2023-09-30 Jakub Jelinek <jakub@redhat.com> | |
17062 | ||
17063 | PR middle-end/111625 | |
17064 | PR middle-end/111637 | |
17065 | * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if | |
17066 | r.undefined_p (). | |
17067 | (bitint_large_huge::handle_operand_addr): For uninitialized operands | |
17068 | use limb_prec or -limb_prec precision. | |
17069 | ||
17070 | 2023-09-30 Jakub Jelinek <jakub@redhat.com> | |
17071 | ||
17072 | * vec.h (quick_grow): Uncomment static_assert. | |
17073 | ||
17074 | 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
17075 | ||
17076 | * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute | |
17077 | ||
17078 | 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com> | |
17079 | ||
17080 | * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing | |
17081 | SETs when the outer code is INSN. | |
17082 | ||
17083 | 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
17084 | ||
17085 | * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split | |
17086 | pattern. | |
17087 | ||
17088 | 2023-09-29 Richard Sandiford <richard.sandiford@arm.com> | |
17089 | ||
17090 | * poly-int.h (poly_int_pod): Delete. | |
17091 | (poly_coeff_traits::init_cast): New type. | |
17092 | (poly_int_full, poly_int_hungry, poly_int_fullness): New structures. | |
17093 | (poly_int): Replace constructors that take 1 and 2 coefficients with | |
17094 | a general one that takes an arbitrary number of coefficients. | |
17095 | Delegate initialization to two new private constructors, one of | |
17096 | which uses the coefficients as-is and one of which adds an extra | |
17097 | zero of the appropriate type (and precision, where applicable). | |
17098 | (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods. | |
17099 | * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod) | |
17100 | (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete. | |
17101 | * gengtype.cc (main): Don't register poly_int64_pod. | |
17102 | * calls.cc (initialize_argument_information): Use poly_int rather | |
17103 | than poly_int_pod. | |
17104 | (combine_pending_stack_adjustment_and_call): Likewise. | |
17105 | * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise. | |
17106 | * data-streamer.h (bp_unpack_poly_value): Likewise. | |
17107 | * dwarf2cfi.cc (struct dw_trace_info): Likewise. | |
17108 | (struct queued_reg_save): Likewise. | |
17109 | * dwarf2out.h (struct dw_cfa_location): Likewise. | |
17110 | * emit-rtl.h (struct incoming_args): Likewise. | |
17111 | (struct rtl_data): Likewise. | |
17112 | * expr.cc (get_bit_range): Likewise. | |
17113 | (get_inner_reference): Likewise. | |
17114 | * expr.h (get_bit_range): Likewise. | |
17115 | * fold-const.cc (split_address_to_core_and_offset): Likewise. | |
17116 | (ptr_difference_const): Likewise. | |
17117 | * fold-const.h (ptr_difference_const): Likewise. | |
17118 | * function.cc (try_fit_stack_local): Likewise. | |
17119 | (instantiate_new_reg): Likewise. | |
17120 | * function.h (struct expr_status): Likewise. | |
17121 | (struct args_size): Likewise. | |
17122 | * genmodes.cc (ZERO_COEFFS): Likewise. | |
17123 | (mode_size_inline): Likewise. | |
17124 | (mode_nunits_inline): Likewise. | |
17125 | (emit_mode_precision): Likewise. | |
17126 | (emit_mode_size): Likewise. | |
17127 | (emit_mode_nunits): Likewise. | |
17128 | * gimple-fold.cc (get_base_constructor): Likewise. | |
17129 | * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise. | |
17130 | * inchash.h (class hash): Likewise. | |
17131 | * ipa-modref-tree.cc (modref_access_node::dump): Likewise. | |
17132 | * ipa-modref.cc (modref_access_analysis::merge_call_side_effects): | |
17133 | Likewise. | |
17134 | * ira-int.h (ira_spilled_reg_stack_slot): Likewise. | |
17135 | * lra-eliminations.cc (self_elim_offsets): Likewise. | |
17136 | * machmode.h (mode_size, mode_precision, mode_nunits): Likewise. | |
17137 | * omp-low.cc (omplow_simd_context): Likewise. | |
17138 | * pretty-print.cc (pp_wide_integer): Likewise. | |
17139 | * pretty-print.h (pp_wide_integer): Likewise. | |
17140 | * reload.cc (struct decomposition): Likewise. | |
17141 | * reload.h (struct reload): Likewise. | |
17142 | * reload1.cc (spill_stack_slot_width): Likewise. | |
17143 | (struct elim_table): Likewise. | |
17144 | (offsets_at): Likewise. | |
17145 | (init_eliminable_invariants): Likewise. | |
17146 | * rtl.h (union rtunion): Likewise. | |
17147 | (poly_int_rtx_p): Likewise. | |
17148 | (strip_offset): Likewise. | |
17149 | (strip_offset_and_add): Likewise. | |
17150 | * rtlanal.cc (strip_offset): Likewise. | |
17151 | * tree-dfa.cc (get_ref_base_and_extent): Likewise. | |
17152 | (get_addr_base_and_unit_offset_1): Likewise. | |
17153 | (get_addr_base_and_unit_offset): Likewise. | |
17154 | * tree-dfa.h (get_ref_base_and_extent): Likewise. | |
17155 | (get_addr_base_and_unit_offset_1): Likewise. | |
17156 | (get_addr_base_and_unit_offset): Likewise. | |
17157 | * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise. | |
17158 | (strip_offset): Likewise. | |
17159 | * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise. | |
17160 | * tree.cc (ptrdiff_tree_p): Likewise. | |
17161 | * tree.h (poly_int_tree_p): Likewise. | |
17162 | (ptrdiff_tree_p): Likewise. | |
17163 | (get_inner_reference): Likewise. | |
17164 | ||
17165 | 2023-09-29 John David Anglin <danglin@gcc.gnu.org> | |
17166 | ||
17167 | * config/pa/pa.md (memory_barrier): Revise comment. | |
17168 | (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0. | |
17169 | * config/pa/pa.opt (coherent-ldcw): Change default to disabled. | |
17170 | ||
17171 | 2023-09-29 Jakub Jelinek <jakub@redhat.com> | |
17172 | ||
17173 | * vec.h (quick_insert, ordered_remove, unordered_remove, | |
17174 | block_remove, qsort, sort, stablesort, quick_grow): Guard | |
17175 | std::is_trivially_{copyable,default_constructible} and | |
17176 | vec_detail::is_trivially_copyable_or_pair static assertions | |
17177 | with GCC_VERSION >= 5000. | |
17178 | (vec_detail::is_trivially_copyable_or_pair): Guard definition | |
17179 | with GCC_VERSION >= 5000. | |
17180 | ||
17181 | 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu> | |
17182 | ||
17183 | * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed. | |
17184 | (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy | |
17185 | and aarch64_stp_policy to aarch64_ldp_stp_policy. | |
17186 | (enum aarch64_stp_policy): Removed. | |
17187 | * config/aarch64/aarch64-protos.h (struct tune_params): Removed | |
17188 | aarch64_ldp_policy_model and aarch64_stp_policy_model enum types | |
17189 | and left only the definitions to the aarch64-opts one. | |
17190 | * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed. | |
17191 | (aarch64_parse_stp_policy): Removed. | |
17192 | (aarch64_override_options_internal): Removed calls to parsing | |
17193 | functions and added obvious direct assignments. | |
17194 | (aarch64_mem_ok_with_ldpstp_policy_model): Improved | |
17195 | code quality based on the new changes. | |
17196 | * config/aarch64/aarch64.opt: Use single enum type | |
17197 | aarch64_ldp_stp_policy for both ldp and stp options. | |
17198 | ||
17199 | 2023-09-29 Richard Biener <rguenther@suse.de> | |
17200 | ||
17201 | PR tree-optimization/111583 | |
17202 | * tree-loop-distribution.cc (find_single_drs): Ensure the | |
17203 | load/store are always executed. | |
17204 | ||
17205 | 2023-09-29 Jakub Jelinek <jakub@redhat.com> | |
17206 | ||
17207 | * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use | |
17208 | quick_grow_cleared method on unprom rather than quick_grow. | |
17209 | ||
17210 | 2023-09-29 Sergei Trofimovich <siarheit@google.com> | |
17211 | ||
17212 | PR middle-end/111505 | |
17213 | * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize): | |
17214 | Add new helper. Use helper instead of memset() to wipe out pointers. | |
17215 | ||
17216 | 2023-09-29 Richard Sandiford <richard.sandiford@arm.com> | |
17217 | ||
17218 | * builtins.h (c_readstr): Take a fixed_size_mode rather than a | |
17219 | scalar_int_mode. | |
17220 | * builtins.cc (c_readstr): Likewise. Build a local array of | |
17221 | bytes and use native_decode_rtx to get the rtx image. | |
17222 | (builtin_memcpy_read_str): Simplify accordingly. | |
17223 | (builtin_strncpy_read_str): Likewise. | |
17224 | (builtin_memset_read_str): Likewise. | |
17225 | (builtin_memset_gen_str): Likewise. | |
17226 | * expr.cc (string_cst_read_str): Likewise. | |
17227 | ||
17228 | 2023-09-29 Jakub Jelinek <jakub@redhat.com> | |
17229 | ||
17230 | * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared | |
17231 | instead of quick_grow on vec<bitmap_head> members. | |
17232 | * cfganal.cc (control_dependences::control_dependences): Likewise. | |
17233 | * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise. | |
17234 | (function_info::place_phis): Use safe_grow_cleared instead of safe_grow | |
17235 | on auto_vec<bitmap_head> vars. | |
17236 | * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead | |
17237 | of quick_grow on vec<bitmap_head> var. | |
17238 | ||
17239 | 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com> | |
17240 | ||
17241 | Revert: | |
17242 | 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com> | |
17243 | ||
17244 | * ira-costs.cc (find_costs_and_classes): Decrease memory cost | |
17245 | by equiv savings. | |
17246 | ||
17247 | 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
17248 | ||
17249 | PR target/111121 | |
17250 | * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander. | |
17251 | (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion. | |
17252 | * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support | |
17253 | for memmove. | |
17254 | * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new | |
17255 | function. | |
17256 | ||
17257 | 2023-09-28 Pan Li <pan2.li@intel.com> | |
17258 | ||
17259 | PR target/111506 | |
17260 | * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2): | |
17261 | New pattern. | |
17262 | * config/riscv/vector-iterators.md: New iterator. | |
17263 | ||
17264 | 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com> | |
17265 | ||
17266 | * rtl.h (lra_in_progress): Change type to bool. | |
17267 | (ira_in_progress): Add new extern. | |
17268 | * ira.cc (ira_in_progress): New global. | |
17269 | (pass_ira::execute): Set up ira_in_progress. | |
17270 | * lra.cc: (lra_in_progress): Change type to bool and initialize. | |
17271 | (lra): Use bool values for lra_in_progress. | |
17272 | * lra-eliminations.cc (init_elim_table): Ditto. | |
17273 | ||
17274 | 2023-09-28 Richard Biener <rguenther@suse.de> | |
17275 | ||
17276 | PR target/111600 | |
17277 | * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): | |
17278 | Use a heap allocated worklist for CFG traversal instead of | |
17279 | recursion. | |
17280 | ||
17281 | 2023-09-28 Jakub Jelinek <jakub@redhat.com> | |
17282 | Jonathan Wakely <jwakely@redhat.com> | |
17283 | ||
17284 | * vec.h: Mention in file comment limited support for non-POD types | |
17285 | in some operations. | |
17286 | (vec_destruct): New function template. | |
17287 | (release): Use it for non-trivially destructible T. | |
17288 | (truncate): Likewise. | |
17289 | (quick_push): Perform a placement new into slot | |
17290 | instead of assignment. | |
17291 | (pop): For non-trivially destructible T return void | |
17292 | rather than T & and destruct the popped element. | |
17293 | (quick_insert, ordered_remove): Note that they aren't suitable | |
17294 | for non-trivially copyable types. Add static_asserts for that. | |
17295 | (block_remove): Assert T is trivially copyable. | |
17296 | (vec_detail::is_trivially_copyable_or_pair): New trait. | |
17297 | (qsort, sort, stablesort): Assert T is trivially copyable or | |
17298 | std::pair with both trivally copyable types. | |
17299 | (quick_grow): Add assert T is trivially default constructible, | |
17300 | for now commented out. | |
17301 | (quick_grow_cleared): Don't call quick_grow, instead inline it | |
17302 | by hand except for the new static_assert. | |
17303 | (gt_ggc_mx): Assert T is trivially destructable. | |
17304 | (auto_vec::operator=): Formatting fixes. | |
17305 | (auto_vec::auto_vec): Likewise. | |
17306 | (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline | |
17307 | it manually and call quick_grow_cleared method rather than quick_grow. | |
17308 | (safe_grow_cleared): Likewise. | |
17309 | * edit-context.cc (class line_event): Move definition earlier. | |
17310 | * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor | |
17311 | defaulted. | |
17312 | * ipa-fnsummary.cc (evaluate_properties_for_edge): Use | |
17313 | safe_grow_cleared instead of safe_grow followed by placement new | |
17314 | constructing the elements. | |
17315 | ||
17316 | 2023-09-28 Richard Sandiford <richard.sandiford@arm.com> | |
17317 | ||
17318 | * dwarf2out.cc (mem_loc_descriptor): Remove unused variables. | |
17319 | * tree-affine.cc (expr_to_aff_combination): Likewise. | |
17320 | ||
17321 | 2023-09-28 Richard Biener <rguenther@suse.de> | |
17322 | ||
17323 | PR tree-optimization/111614 | |
17324 | * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly | |
17325 | convert the first vector when required. | |
17326 | ||
17327 | 2023-09-28 xuli <xuli1@eswincomputing.com> | |
17328 | ||
17329 | PR target/111533 | |
17330 | * config/riscv/riscv-v.cc (expand_const_vector): Fix bug. | |
17331 | * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug. | |
17332 | ||
17333 | 2023-09-27 Sandra Loosemore <sandra@codesourcery.com> | |
17334 | ||
17335 | * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK. | |
17336 | ||
17337 | 2023-09-27 Iain Sandoe <iain@sandoe.co.uk> | |
17338 | ||
17339 | PR target/111610 | |
17340 | * configure: Regenerate. | |
17341 | * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN". | |
17342 | ||
17343 | 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu> | |
17344 | Philipp Tomsich <philipp.tomsich@vrull.eu> | |
17345 | Manolis Tsamis <manolis.tsamis@vrull.eu> | |
17346 | ||
17347 | * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New | |
17348 | enum type. | |
17349 | (enum aarch64_stp_policy): New enum type. | |
17350 | * config/aarch64/aarch64-protos.h (struct tune_params): Add | |
17351 | appropriate enums for the policies. | |
17352 | (aarch64_mem_ok_with_ldpstp_policy_model): New declaration. | |
17353 | * config/aarch64/aarch64-tuning-flags.def | |
17354 | (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning | |
17355 | options. | |
17356 | * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New | |
17357 | function to parse ldp-policy parameter. | |
17358 | (aarch64_parse_stp_policy): New function to parse stp-policy parameter. | |
17359 | (aarch64_override_options_internal): Call parsing functions. | |
17360 | (aarch64_mem_ok_with_ldpstp_policy_model): New function. | |
17361 | (aarch64_operands_ok_for_ldpstp): Add call to | |
17362 | aarch64_mem_ok_with_ldpstp_policy_model for parameter-value | |
17363 | check and alignment check and remove superseded ones. | |
17364 | (aarch64_operands_adjust_ok_for_ldpstp): Add call to | |
17365 | aarch64_mem_ok_with_ldpstp_policy_model for parameter-value | |
17366 | check and alignment check and remove superseded ones. | |
17367 | * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param. | |
17368 | (aarch64-stp-policy): New param. | |
17369 | * doc/invoke.texi: Document the parameters accordingly. | |
17370 | ||
17371 | 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
17372 | ||
17373 | * tree-data-ref.cc (include calls.h): Add new include. | |
17374 | (get_references_in_stmt): Correctly handle IFN_MASK_CALL. | |
17375 | ||
17376 | 2023-09-27 Richard Biener <rguenther@suse.de> | |
17377 | ||
17378 | * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern. | |
17379 | ||
17380 | 2023-09-27 Jakub Jelinek <jakub@redhat.com> | |
17381 | ||
17382 | PR c++/105606 | |
17383 | * system.h (BROKEN_VALUE_INITIALIZATION): Don't define. | |
17384 | * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION | |
17385 | workaround. | |
17386 | * function.cc (assign_parm_find_data_types): Likewise. | |
17387 | ||
17388 | 2023-09-27 Pan Li <pan2.li@intel.com> | |
17389 | ||
17390 | * config/riscv/autovec.md (roundeven<mode>2): New pattern. | |
17391 | * config/riscv/riscv-protos.h (enum insn_flags): New enum type. | |
17392 | (enum insn_type): Ditto. | |
17393 | (expand_vec_roundeven): New func decl. | |
17394 | * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl. | |
17395 | ||
17396 | 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17397 | ||
17398 | PR target/111590 | |
17399 | * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target. | |
17400 | ||
17401 | 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17402 | ||
17403 | * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments. | |
17404 | ||
17405 | 2023-09-27 Pan Li <pan2.li@intel.com> | |
17406 | ||
17407 | * config/riscv/autovec.md (btrunc<mode>2): New pattern. | |
17408 | * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl. | |
17409 | * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl. | |
17410 | (expand_vec_trunc): Ditto. | |
17411 | ||
17412 | 2023-09-26 Hans-Peter Nilsson <hp@axis.com> | |
17413 | ||
17414 | PR target/107567 | |
17415 | PR target/109166 | |
17416 | * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>: | |
17417 | Handle failure from expand_builtin_atomic_test_and_set. | |
17418 | * optabs.cc (expand_atomic_test_and_set): When all attempts fail to | |
17419 | generate atomic code through target support, return NULL | |
17420 | instead of emitting non-atomic code. Also, for code handling | |
17421 | targetm.atomic_test_and_set_trueval != 1, gcc_assert result | |
17422 | from calling emit_store_flag_force instead of returning NULL. | |
17423 | ||
17424 | 2023-09-26 Andrew MacLeod <amacleod@redhat.com> | |
17425 | ||
17426 | PR tree-optimization/111599 | |
17427 | * value-relation.cc (relation_oracle::valid_equivs): Ensure | |
17428 | ssa_name is valid. | |
17429 | ||
17430 | 2023-09-26 Andrew Pinski <apinski@marvell.com> | |
17431 | ||
17432 | PR tree-optimization/106164 | |
17433 | PR tree-optimization/111456 | |
17434 | * match.pd (`(A ==/!= B) & (A CMP C)`): | |
17435 | Support an optional cast on the second A. | |
17436 | (`(A ==/!= B) | (A CMP C)`): Likewise. | |
17437 | ||
17438 | 2023-09-26 Andrew Pinski <apinski@marvell.com> | |
17439 | ||
17440 | PR tree-optimization/111469 | |
17441 | * tree-ssa-phiopt.cc (minmax_replacement): Fix | |
17442 | the assumption for the `non-diamond` handling cases | |
17443 | of diamond code. | |
17444 | ||
17445 | 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17446 | ||
17447 | * match.pd: Optimize COND_ADD reduction pattern. | |
17448 | ||
17449 | 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17450 | ||
17451 | PR tree-optimization/111594 | |
17452 | PR tree-optimization/110660 | |
17453 | * match.pd: Optimize COND_LEN_ADD reduction. | |
17454 | ||
17455 | 2023-09-26 Pan Li <pan2.li@intel.com> | |
17456 | ||
17457 | * config/riscv/autovec.md (round<mode>2): New pattern. | |
17458 | * config/riscv/riscv-protos.h (enum insn_flags): New enum type. | |
17459 | (enum insn_type): Ditto. | |
17460 | (expand_vec_round): New function decl. | |
17461 | * config/riscv/riscv-v.cc (expand_vec_round): New function impl. | |
17462 | ||
17463 | 2023-09-26 Iain Sandoe <iain@sandoe.co.uk> | |
17464 | ||
17465 | * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib. | |
17466 | ||
17467 | 2023-09-26 Tobias Burnus <tobias@codesourcery.com> | |
17468 | ||
17469 | PR middle-end/111547 | |
17470 | * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax. | |
17471 | (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic. | |
17472 | ||
17473 | 2023-09-26 Pan Li <pan2.li@intel.com> | |
17474 | ||
17475 | * config/riscv/autovec.md (rint<mode>2): New pattern. | |
17476 | * config/riscv/riscv-protos.h (expand_vec_rint): New function decl. | |
17477 | * config/riscv/riscv-v.cc (expand_vec_rint): New function impl. | |
17478 | ||
17479 | 2023-09-26 Pan Li <pan2.li@intel.com> | |
17480 | ||
17481 | * config/riscv/autovec.md (nearbyint<mode>2): New pattern. | |
17482 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
17483 | (expand_vec_nearbyint): New function decl. | |
17484 | * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl. | |
17485 | ||
17486 | 2023-09-26 Pan Li <pan2.li@intel.com> | |
17487 | ||
17488 | * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove. | |
17489 | (get_fp_rounding_coefficient): Rename. | |
17490 | (gen_floor_const_fp): Remove. | |
17491 | (expand_vec_ceil): Take renamed func. | |
17492 | (expand_vec_floor): Ditto. | |
17493 | ||
17494 | 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com> | |
17495 | ||
17496 | PR middle-end/111497 | |
17497 | * lra-constraints.cc (lra_constraints): Copy substituted | |
17498 | equivalence. | |
17499 | * lra.cc (lra): Change comment for calling unshare_all_rtl_again. | |
17500 | ||
17501 | 2023-09-25 Eric Botcazou <ebotcazou@adacore.com> | |
17502 | ||
17503 | * gimple-range-gori.cc (gori_compute::logical_combine): Add missing | |
17504 | return statement in the varying case. | |
17505 | ||
17506 | 2023-09-25 Xi Ruoyao <xry111@xry111.site> | |
17507 | ||
17508 | * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160. | |
17509 | ||
17510 | 2023-09-25 Andrew Pinski <apinski@marvell.com> | |
17511 | ||
17512 | PR tree-optimization/110386 | |
17513 | * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR. | |
17514 | ||
17515 | 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17516 | ||
17517 | PR target/111548 | |
17518 | * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix | |
17519 | ||
17520 | 2023-09-25 Kewen Lin <linkw@linux.ibm.com> | |
17521 | ||
17522 | PR target/111366 | |
17523 | * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip | |
17524 | empty inline asm. | |
17525 | ||
17526 | 2023-09-25 Kewen Lin <linkw@linux.ibm.com> | |
17527 | ||
17528 | PR target/111380 | |
17529 | * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt | |
17530 | target_option_default_node when the callee has no option | |
17531 | attributes, also simplify the existing code accordingly. | |
17532 | ||
17533 | 2023-09-25 Guo Jie <guojie@loongson.cn> | |
17534 | ||
17535 | * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New | |
17536 | pattern for vector construction. | |
17537 | (vec_set<mode>_internal): Ditto. | |
17538 | (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto. | |
17539 | (lasx_xvilvl_<lasxfmt_f>_internal): Ditto. | |
17540 | * config/loongarch/loongarch.cc (loongarch_expand_vector_init): | |
17541 | Optimized the implementation of vector construction. | |
17542 | (loongarch_expand_vector_init_same): New function. | |
17543 | * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New | |
17544 | pattern for vector construction. | |
17545 | (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector | |
17546 | construction. | |
17547 | (vec_concatv2df): Ditto. | |
17548 | (vec_concatv4sf): Ditto. | |
17549 | ||
17550 | 2023-09-24 Pan Li <pan2.li@intel.com> | |
17551 | ||
17552 | PR target/111546 | |
17553 | * config/riscv/riscv-v.cc | |
17554 | (expand_vector_init_merge_repeating_sequence): Bugfix | |
17555 | ||
17556 | 2023-09-24 Andrew Pinski <apinski@marvell.com> | |
17557 | ||
17558 | PR tree-optimization/111543 | |
17559 | * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns. | |
17560 | ||
17561 | 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17562 | ||
17563 | * config/riscv/autovec-opt.md: Extend VLS modes | |
17564 | * config/riscv/vector-iterators.md: Ditto. | |
17565 | ||
17566 | 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17567 | ||
17568 | * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT. | |
17569 | ||
17570 | 2023-09-23 Pan Li <pan2.li@intel.com> | |
17571 | ||
17572 | * config/riscv/autovec.md (floor<mode>2): New pattern. | |
17573 | * config/riscv/riscv-protos.h (enum insn_flags): New enum type. | |
17574 | (enum insn_type): Ditto. | |
17575 | (expand_vec_floor): New function decl. | |
17576 | * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl. | |
17577 | (expand_vec_floor): Ditto. | |
17578 | ||
17579 | 2023-09-22 Pan Li <pan2.li@intel.com> | |
17580 | ||
17581 | * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor. | |
17582 | (emit_vec_float_cmp_mask): Rename. | |
17583 | (expand_vec_copysign): Ditto. | |
17584 | (emit_vec_copysign): Ditto. | |
17585 | (emit_vec_abs): New function impl. | |
17586 | (emit_vec_cvt_x_f): Ditto. | |
17587 | (emit_vec_cvt_f_x): Ditto. | |
17588 | (expand_vec_ceil): Ditto. | |
17589 | ||
17590 | 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17591 | ||
17592 | * config/riscv/vector-iterators.md: Extend VLS modes. | |
17593 | ||
17594 | 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17595 | ||
17596 | * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function. | |
17597 | * config/riscv/vector.md (@vec_duplicate<mode>): Remove @. | |
17598 | (vec_duplicate<mode>): Ditto. | |
17599 | ||
17600 | 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17601 | ||
17602 | * config/riscv/autovec.md: Add VLS conditional patterns. | |
17603 | * config/riscv/riscv-protos.h (expand_cond_unop): Ditto. | |
17604 | (expand_cond_binop): Ditto. | |
17605 | (expand_cond_ternop): Ditto. | |
17606 | * config/riscv/riscv-v.cc (expand_cond_unop): Ditto. | |
17607 | (expand_cond_binop): Ditto. | |
17608 | (expand_cond_ternop): Ditto. | |
17609 | ||
17610 | 2023-09-22 xuli <xuli1@eswincomputing.com> | |
17611 | ||
17612 | PR target/111451 | |
17613 | * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv | |
17614 | into vrgatherei16.vv. | |
17615 | ||
17616 | 2023-09-22 Lehua Ding <lehua.ding@rivai.ai> | |
17617 | ||
17618 | * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>): | |
17619 | New combine patterns. | |
17620 | * config/riscv/riscv-protos.h (enum insn_type): New insn_type. | |
17621 | ||
17622 | 2023-09-22 Lehua Ding <lehua.ding@rivai.ai> | |
17623 | ||
17624 | * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type. | |
17625 | * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments. | |
17626 | ||
17627 | 2023-09-22 Pan Li <pan2.li@intel.com> | |
17628 | ||
17629 | * config/riscv/autovec.md (ceil<mode>2): New pattern. | |
17630 | * config/riscv/riscv-protos.h (enum insn_flags): New enum type. | |
17631 | (enum insn_type): Ditto. | |
17632 | (expand_vec_ceil): New function decl. | |
17633 | * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl. | |
17634 | (expand_vec_float_cmp_mask): Ditto. | |
17635 | (expand_vec_copysign): Ditto. | |
17636 | (expand_vec_ceil): Ditto. | |
17637 | * config/riscv/vector.md: Add VLS mode support. | |
17638 | ||
17639 | 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17640 | ||
17641 | * config/riscv/autovec.md: Extend VLS modes. | |
17642 | ||
17643 | 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17644 | ||
17645 | * config/riscv/vector-iterators.md: Extend VLS modes. | |
17646 | ||
17647 | 2023-09-21 Lehua Ding <lehua.ding@rivai.ai> | |
17648 | Robin Dapp <rdapp.gcc@gmail.com> | |
17649 | ||
17650 | * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments. | |
17651 | (emit_nonvlmax_insn): Adjust comments. | |
17652 | (emit_vlmax_insn_lra): Adjust comments. | |
17653 | ||
17654 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17655 | ||
17656 | * config.gcc (*linux*): Set rust target_objs, and | |
17657 | target_has_targetrustm, | |
17658 | * config/t-linux (linux-rust.o): New rule. | |
17659 | * config/linux-rust.cc: New file. | |
17660 | ||
17661 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17662 | ||
17663 | * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set | |
17664 | rust_target_objs and target_has_targetrustm. | |
17665 | * config/t-winnt (winnt-rust.o): New rule. | |
17666 | * config/winnt-rust.cc: New file. | |
17667 | ||
17668 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17669 | ||
17670 | * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs, | |
17671 | and target_has_targetrustm. | |
17672 | * config/fuchsia-rust.cc: New file. | |
17673 | * config/t-fuchsia: New file. | |
17674 | ||
17675 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17676 | ||
17677 | * config.gcc (*-*-vxworks*): Set rust_target_objs and | |
17678 | target_has_targetrustm. | |
17679 | * config/t-vxworks (vxworks-rust.o): New rule. | |
17680 | * config/vxworks-rust.cc: New file. | |
17681 | ||
17682 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17683 | ||
17684 | * config.gcc (*-*-dragonfly*): Set rust_target_objs and | |
17685 | target_has_targetrustm. | |
17686 | * config/t-dragonfly (dragonfly-rust.o): New rule. | |
17687 | * config/dragonfly-rust.cc: New file. | |
17688 | ||
17689 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17690 | ||
17691 | * config.gcc (*-*-solaris2*): Set rust_target_objs and | |
17692 | target_has_targetrustm. | |
17693 | * config/t-sol2 (sol2-rust.o): New rule. | |
17694 | * config/sol2-rust.cc: New file. | |
17695 | ||
17696 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17697 | ||
17698 | * config.gcc (*-*-openbsd*): Set rust_target_objs and | |
17699 | target_has_targetrustm. | |
17700 | * config/t-openbsd (openbsd-rust.o): New rule. | |
17701 | * config/openbsd-rust.cc: New file. | |
17702 | ||
17703 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17704 | ||
17705 | * config.gcc (*-*-netbsd*): Set rust_target_objs and | |
17706 | target_has_targetrustm. | |
17707 | * config/t-netbsd (netbsd-rust.o): New rule. | |
17708 | * config/netbsd-rust.cc: New file. | |
17709 | ||
17710 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17711 | ||
17712 | * config.gcc (*-*-freebsd*): Set rust_target_objs and | |
17713 | target_has_targetrustm. | |
17714 | * config/t-freebsd (freebsd-rust.o): New rule. | |
17715 | * config/freebsd-rust.cc: New file. | |
17716 | ||
17717 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17718 | ||
17719 | * config.gcc (*-*-darwin*): Set rust_target_objs and | |
17720 | target_has_targetrustm. | |
17721 | * config/t-darwin (darwin-rust.o): New rule. | |
17722 | * config/darwin-rust.cc: New file. | |
17723 | ||
17724 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17725 | ||
17726 | * config/i386/t-i386 (i386-rust.o): New rule. | |
17727 | * config/i386/i386-rust.cc: New file. | |
17728 | * config/i386/i386-rust.h: New file. | |
17729 | ||
17730 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17731 | ||
17732 | * doc/tm.texi: Regenerate. | |
17733 | * doc/tm.texi.in: Document TARGET_RUST_OS_INFO. | |
17734 | ||
17735 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17736 | ||
17737 | * doc/tm.texi: Regenerate. | |
17738 | * doc/tm.texi.in: Add @node for Rust language and ABI, and document | |
17739 | TARGET_RUST_CPU_INFO. | |
17740 | ||
17741 | 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org> | |
17742 | ||
17743 | * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H, | |
17744 | RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables. | |
17745 | (tm_rust.h, cs-tm_rust.h, default-rust.o, | |
17746 | rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules. | |
17747 | (s-tm-texi): Also check timestamp on rust-target.def. | |
17748 | (generated_files): Add TM_RUST_H and rust-target-hooks-def.h. | |
17749 | (build/genhooks.o): Also depend on RUST_TARGET_DEF. | |
17750 | * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm): | |
17751 | New variables. | |
17752 | * configure: Regenerate. | |
17753 | * configure.ac (tm_rust_file_list, tm_rust_include_list, | |
17754 | rust_target_objs): Add substitutes. | |
17755 | * doc/tm.texi: Regenerate. | |
17756 | * doc/tm.texi.in (targetrustm): Document. | |
17757 | (target_has_targetrustm): Document. | |
17758 | * genhooks.cc: Include rust/rust-target.def. | |
17759 | * config/default-rust.cc: New file. | |
17760 | ||
17761 | 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17762 | ||
17763 | PR target/110751 | |
17764 | * config/riscv/autovec.md: Enable scratch rtx in ELSE operand. | |
17765 | * config/riscv/predicates.md (autovec_else_operand): New predicate. | |
17766 | * config/riscv/riscv-v.cc (get_else_operand): New function. | |
17767 | (expand_cond_len_unop): Adapt ELSE value. | |
17768 | (expand_cond_len_binop): Ditto. | |
17769 | (expand_cond_len_ternop): Ditto. | |
17770 | * config/riscv/riscv.cc (riscv_preferred_else_value): New function. | |
17771 | (TARGET_PREFERRED_ELSE_VALUE): New targethook. | |
17772 | ||
17773 | 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17774 | ||
17775 | PR target/111486 | |
17776 | * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug. | |
17777 | ||
17778 | 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com> | |
17779 | ||
17780 | PR tree-optimization/111355 | |
17781 | * match.pd ((X + C) / N): Update pattern. | |
17782 | ||
17783 | 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com> | |
17784 | ||
17785 | * match.pd ((t * 2) / 2): Update to use overflow_free_p. | |
17786 | ||
17787 | 2023-09-21 xuli <xuli1@eswincomputing.com> | |
17788 | ||
17789 | PR target/111450 | |
17790 | * config/riscv/constraints.md (c01): const_int 1. | |
17791 | (c02): const_int 2. | |
17792 | (c04): const_int 4. | |
17793 | (c08): const_int 8. | |
17794 | * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand. | |
17795 | (vector_eew16_stride_operand): Ditto. | |
17796 | (vector_eew32_stride_operand): Ditto. | |
17797 | (vector_eew64_stride_operand): Ditto. | |
17798 | * config/riscv/vector-iterators.md: New iterator for stride operand. | |
17799 | * config/riscv/vector.md: Add stride = element width constraint. | |
17800 | ||
17801 | 2023-09-21 Lehua Ding <lehua.ding@rivai.ai> | |
17802 | ||
17803 | * config/riscv/predicates.md (const_1_or_2_operand): Rename. | |
17804 | (const_1_or_4_operand): Ditto. | |
17805 | (vector_gs_scale_operand_16): Ditto. | |
17806 | (vector_gs_scale_operand_32): Ditto. | |
17807 | * config/riscv/vector-iterators.md: Adjust. | |
17808 | ||
17809 | 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17810 | ||
17811 | * config/riscv/autovec.md: Extend VLS modes. | |
17812 | * config/riscv/vector-iterators.md: Ditto. | |
17813 | * config/riscv/vector.md: Ditto. | |
17814 | ||
17815 | 2023-09-20 Andrew MacLeod <amacleod@redhat.com> | |
17816 | ||
17817 | * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning | |
17818 | of the return value. | |
17819 | (ssa_cache::dump): Don't print GLOBAL RANGE header. | |
17820 | (ssa_lazy_cache::merge_range): Adjust return value meaning. | |
17821 | (ranger_cache::dump): Print GLOBAL RANGE header. | |
17822 | ||
17823 | 2023-09-20 Aldy Hernandez <aldyh@redhat.com> | |
17824 | ||
17825 | * range-op-float.cc (foperator_unordered_ge::fold_range): Remove | |
17826 | special casing. | |
17827 | (foperator_unordered_gt::fold_range): Same. | |
17828 | (foperator_unordered_lt::fold_range): Same. | |
17829 | (foperator_unordered_le::fold_range): Same. | |
17830 | ||
17831 | 2023-09-20 Jakub Jelinek <jakub@redhat.com> | |
17832 | ||
17833 | * builtins.h (type_to_class): Declare. | |
17834 | * builtins.cc (type_to_class): No longer static. Return | |
17835 | int rather than enum. | |
17836 | * doc/extend.texi (__builtin_classify_type): Document. | |
17837 | ||
17838 | 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17839 | ||
17840 | PR target/110751 | |
17841 | * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value. | |
17842 | * optabs.cc (maybe_legitimize_operand): Ditto. | |
17843 | (can_reuse_operands_p): Ditto. | |
17844 | * optabs.h (enum expand_operand_type): Ditto. | |
17845 | (create_undefined_input_operand): Ditto. | |
17846 | ||
17847 | 2023-09-20 Tobias Burnus <tobias@codesourcery.com> | |
17848 | ||
17849 | * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for | |
17850 | 'omp allocate' variables; move stack cleanup after other | |
17851 | cleanup. | |
17852 | (omp_notice_variable): Process original decl when decl | |
17853 | of the value-expression for a 'omp allocate' variable is passed. | |
17854 | * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables | |
17855 | ||
17856 | 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com> | |
17857 | ||
17858 | * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): | |
17859 | support simplifying vector int not only scalar int. | |
17860 | ||
17861 | 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17862 | ||
17863 | * config/riscv/vector-iterators.md: Extend VLS floating-point. | |
17864 | ||
17865 | 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17866 | ||
17867 | * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug. | |
17868 | ||
17869 | 2023-09-20 Iain Sandoe <iain@sandoe.co.uk> | |
17870 | ||
17871 | * config/darwin.h: | |
17872 | (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same | |
17873 | specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'. | |
17874 | ||
17875 | 2023-09-20 Richard Biener <rguenther@suse.de> | |
17876 | ||
17877 | PR tree-optimization/111489 | |
17878 | * params.opt (-param uninit-max-chain-len=): Raise default to 8. | |
17879 | ||
17880 | 2023-09-20 Richard Biener <rguenther@suse.de> | |
17881 | ||
17882 | PR tree-optimization/111489 | |
17883 | * doc/invoke.texi (--param uninit-max-chain-len): Document. | |
17884 | (--param uninit-max-num-chains): Likewise. | |
17885 | * params.opt (-param=uninit-max-chain-len=): New. | |
17886 | (-param=uninit-max-num-chains=): Likewise. | |
17887 | * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to | |
17888 | param_uninit_max_num_chains. | |
17889 | (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len. | |
17890 | (uninit_analysis::init_use_preds): Avoid VLA. | |
17891 | (uninit_analysis::init_from_phi_def): Likewise. | |
17892 | (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in | |
17893 | template parameter. | |
17894 | ||
17895 | 2023-09-20 Jakub Jelinek <jakub@redhat.com> | |
17896 | ||
17897 | * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of | |
17898 | GET_MODE_PRECISION of TImode or DImode depending on whether | |
17899 | TImode is supported scalar mode. | |
17900 | * gimple-lower-bitint.cc (bitint_precision_kind): Likewise. | |
17901 | * expr.cc (expand_expr_real_1): Likewise. | |
17902 | * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise. | |
17903 | * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise. | |
17904 | ||
17905 | 2023-09-20 Lehua Ding <lehua.ding@rivai.ai> | |
17906 | ||
17907 | * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename. | |
17908 | (*n<optab><mode>): Ditto. | |
17909 | (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto. | |
17910 | (*<any_shiftrt:optab>trunc<mode>): Ditto. | |
17911 | (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto. | |
17912 | (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto. | |
17913 | (*single_widen_mult<any_extend:su><mode>): Ditto. | |
17914 | (*single_widen_mul<any_extend:su><mode>): Ditto. | |
17915 | (*single_widen_mult<mode>): Ditto. | |
17916 | (*single_widen_mul<mode>): Ditto. | |
17917 | (*dual_widen_fma<mode>): Ditto. | |
17918 | (*dual_widen_fma<su><mode>): Ditto. | |
17919 | (*single_widen_fma<mode>): Ditto. | |
17920 | (*single_widen_fma<su><mode>): Ditto. | |
17921 | (*dual_fma<mode>): Ditto. | |
17922 | (*single_fma<mode>): Ditto. | |
17923 | (*dual_fnma<mode>): Ditto. | |
17924 | (*dual_widen_fnma<mode>): Ditto. | |
17925 | (*single_fnma<mode>): Ditto. | |
17926 | (*single_widen_fnma<mode>): Ditto. | |
17927 | (*dual_fms<mode>): Ditto. | |
17928 | (*dual_widen_fms<mode>): Ditto. | |
17929 | (*single_fms<mode>): Ditto. | |
17930 | (*single_widen_fms<mode>): Ditto. | |
17931 | (*dual_fnms<mode>): Ditto. | |
17932 | (*dual_widen_fnms<mode>): Ditto. | |
17933 | (*single_fnms<mode>): Ditto. | |
17934 | (*single_widen_fnms<mode>): Ditto. | |
17935 | ||
17936 | 2023-09-20 Jakub Jelinek <jakub@redhat.com> | |
17937 | ||
17938 | PR c++/111392 | |
17939 | * attribs.cc (decl_attributes): Don't warn on omp::directive attribute | |
17940 | on vars or function decls if -fopenmp or -fopenmp-simd. | |
17941 | ||
17942 | 2023-09-20 Lehua Ding <lehua.ding@rivai.ai> | |
17943 | ||
17944 | PR target/111488 | |
17945 | * config/riscv/autovec-opt.md: Add missed operand. | |
17946 | ||
17947 | 2023-09-20 Omar Sandoval <osandov@osandov.com> | |
17948 | ||
17949 | PR debug/111409 | |
17950 | * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if | |
17951 | dwarf_split_debug_info. | |
17952 | ||
17953 | 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
17954 | ||
17955 | * config/riscv/riscv-v.cc (can_find_related_mode_p): New function. | |
17956 | (vectorize_related_mode): Add VLS related modes. | |
17957 | * config/riscv/vector-iterators.md: Extend VLS modes. | |
17958 | ||
17959 | 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com> | |
17960 | ||
17961 | PR rtl-optimization/110071 | |
17962 | * ira-color.cc (improve_allocation): Consider cost of callee | |
17963 | save registers. | |
17964 | ||
17965 | 2023-09-20 mengqinggang <mengqinggang@loongson.cn> | |
17966 | Xi Ruoyao <xry111@xry111.site> | |
17967 | ||
17968 | * configure: Regenerate. | |
17969 | * configure.ac: Checking assembler for -mno-relax support. | |
17970 | Disable relaxation when probing leb128 support. | |
17971 | ||
17972 | 2023-09-20 Lulu Cheng <chenglulu@loongson.cn> | |
17973 | ||
17974 | * config.in: Regenerate. | |
17975 | * config/loongarch/genopts/loongarch.opt.in: Add compilation option | |
17976 | mrelax. And set the initial value of explicit-relocs according to the | |
17977 | detection status. | |
17978 | * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the | |
17979 | --no-relax option to the linker. | |
17980 | * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with | |
17981 | -mno-relax, pass the -mno-relax option to the assembler. | |
17982 | * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro. | |
17983 | * config/loongarch/loongarch.opt: Regenerate. | |
17984 | * configure: Regenerate. | |
17985 | * configure.ac: Add detection of support for binutils relax function. | |
17986 | ||
17987 | 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com> | |
17988 | ||
17989 | * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and | |
17990 | -fdeps-target= flags. | |
17991 | * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when | |
17992 | only -fdeps-format= is specified. | |
17993 | * json.h: Add a TODO item to refactor out to share with | |
17994 | `libcpp/mkdeps.cc`. | |
17995 | ||
17996 | 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com> | |
17997 | Jason Merrill <jason@redhat.com> | |
17998 | ||
17999 | * gcc.cc (join_spec_func): Add a spec function to join all | |
18000 | arguments. | |
18001 | ||
18002 | 2023-09-19 Patrick O'Neill <patrick@rivosinc.com> | |
18003 | ||
18004 | * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate | |
18005 | src_op_0 var to avoid rtl check error. | |
18006 | ||
18007 | 2023-09-19 Aldy Hernandez <aldyh@redhat.com> | |
18008 | ||
18009 | * range-op-float.cc (frelop_early_resolve): Clean-up and remove | |
18010 | special casing. | |
18011 | (operator_not_equal::fold_range): Handle VREL_EQ. | |
18012 | (operator_lt::fold_range): Remove special casing for VREL_EQ. | |
18013 | (operator_gt::fold_range): Same. | |
18014 | (foperator_unordered_equal::fold_range): Same. | |
18015 | ||
18016 | 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com> | |
18017 | ||
18018 | * doc/extend.texi: Document attributes hot, cold on C++ types. | |
18019 | ||
18020 | 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com> | |
18021 | ||
18022 | * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the | |
18023 | modulo instruction is disabled. | |
18024 | * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New. | |
18025 | * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it. | |
18026 | (define_expand umod<mode>3): New. | |
18027 | (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo | |
18028 | instruction is disabled. | |
18029 | (umodti3, modti3): Check if the modulo instruction is disabled. | |
18030 | ||
18031 | 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com> | |
18032 | ||
18033 | * doc/gm2.texi (fdebug-builtins): Correct description. | |
18034 | ||
18035 | 2023-09-19 Jeff Law <jlaw@ventanamicro.com> | |
18036 | ||
18037 | * config/iq2000/predicates.md (uns_arith_constant): New predicate. | |
18038 | * config/iq2000/iq2000.md (rotrsi3): Use it. | |
18039 | ||
18040 | 2023-09-19 Aldy Hernandez <aldyh@redhat.com> | |
18041 | ||
18042 | * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check. | |
18043 | (operator_lt::op2_range): Same. | |
18044 | (operator_le::op1_range): Same. | |
18045 | (operator_le::op2_range): Same. | |
18046 | (operator_gt::op1_range): Same. | |
18047 | (operator_gt::op2_range): Same. | |
18048 | (operator_ge::op1_range): Same. | |
18049 | (operator_ge::op2_range): Same. | |
18050 | (foperator_unordered_lt::op1_range): Same. | |
18051 | (foperator_unordered_lt::op2_range): Same. | |
18052 | (foperator_unordered_le::op1_range): Same. | |
18053 | (foperator_unordered_le::op2_range): Same. | |
18054 | (foperator_unordered_gt::op1_range): Same. | |
18055 | (foperator_unordered_gt::op2_range): Same. | |
18056 | (foperator_unordered_ge::op1_range): Same. | |
18057 | (foperator_unordered_ge::op2_range): Same. | |
18058 | ||
18059 | 2023-09-19 Aldy Hernandez <aldyh@redhat.com> | |
18060 | ||
18061 | * value-range.h (frange::update_nan): New. | |
18062 | ||
18063 | 2023-09-19 Aldy Hernandez <aldyh@redhat.com> | |
18064 | ||
18065 | * range-op-float.cc (operator_not_equal::op2_range): New. | |
18066 | * range-op-mixed.h: Add operator_not_equal::op2_range. | |
18067 | ||
18068 | 2023-09-19 Andrew MacLeod <amacleod@redhat.com> | |
18069 | ||
18070 | PR tree-optimization/110080 | |
18071 | PR tree-optimization/110249 | |
18072 | * tree-vrp.cc (remove_unreachable::final_p): New. | |
18073 | (remove_unreachable::maybe_register): Rename from | |
18074 | maybe_register_block and call early or final routine. | |
18075 | (fully_replaceable): New. | |
18076 | (remove_unreachable::handle_early): New. | |
18077 | (remove_unreachable::remove_and_update_globals): Remove | |
18078 | non-final processing. | |
18079 | (rvrp_folder::rvrp_folder): Add final flag to constructor. | |
18080 | (rvrp_folder::post_fold_bb): Remove unreachable registration. | |
18081 | (rvrp_folder::pre_fold_stmt): Move unreachable processing to here. | |
18082 | (execute_ranger_vrp): Adjust some call parameters. | |
18083 | ||
18084 | 2023-09-19 Richard Biener <rguenther@suse.de> | |
18085 | ||
18086 | PR c/111468 | |
18087 | * tree-pretty-print.h (op_symbol_code): Add defaulted flags | |
18088 | argument. | |
18089 | * tree-pretty-print.cc (op_symbol): Likewise. | |
18090 | (op_symbol_code): Print TDF_GIMPLE variant if requested. | |
18091 | * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to | |
18092 | op_symbol_code. | |
18093 | (dump_gimple_cond): Likewise. | |
18094 | ||
18095 | 2023-09-19 Thomas Schwinge <thomas@codesourcery.com> | |
18096 | Pan Li <pan2.li@intel.com> | |
18097 | ||
18098 | * tree-streamer.h (bp_unpack_machine_mode): If | |
18099 | 'ib->file_data->mode_table' not available, apply 1-to-1 mapping. | |
18100 | ||
18101 | 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18102 | ||
18103 | * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes. | |
18104 | ||
18105 | 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18106 | ||
18107 | * config/riscv/autovec.md: Extend VLS modes. | |
18108 | * config/riscv/vector.md: Ditto. | |
18109 | ||
18110 | 2023-09-19 Richard Biener <rguenther@suse.de> | |
18111 | ||
18112 | PR tree-optimization/111465 | |
18113 | * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1): | |
18114 | Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty. | |
18115 | ||
18116 | 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18117 | ||
18118 | * config/riscv/autovec.md: Extend VLS floating-point modes. | |
18119 | * config/riscv/vector.md: Ditto. | |
18120 | ||
18121 | 2023-09-19 Jakub Jelinek <jakub@redhat.com> | |
18122 | ||
18123 | * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type | |
18124 | nor check type_has_mode_precision_p for width larger than [TD]Imode | |
18125 | precision. | |
18126 | (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert | |
18127 | to type. Use boolean_true_node instead of | |
18128 | constant_boolean_node (true, boolean_type_node). Formatting fixes. | |
18129 | ||
18130 | 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18131 | ||
18132 | * config/riscv/autovec.md: Add VLS modes. | |
18133 | * config/riscv/vector.md: Ditto. | |
18134 | ||
18135 | 2023-09-19 Jakub Jelinek <jakub@redhat.com> | |
18136 | ||
18137 | * tree.cc (build_bitint_type): Assert precision is not 0, or | |
18138 | for signed types 1. | |
18139 | (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant | |
18140 | of unsigned _BitInt(1). | |
18141 | ||
18142 | 2023-09-19 Lehua Ding <lehua.ding@rivai.ai> | |
18143 | ||
18144 | * config/riscv/autovec-opt.md (*<optab>_fma<mode>): | |
18145 | Removed old combine patterns. | |
18146 | (*single_<optab>mult_plus<mode>): Ditto. | |
18147 | (*double_<optab>mult_plus<mode>): Ditto. | |
18148 | (*sign_zero_extend_fma): Ditto. | |
18149 | (*zero_sign_extend_fma): Ditto. | |
18150 | (*double_widen_fma<mode>): Ditto. | |
18151 | (*single_widen_fma<mode>): Ditto. | |
18152 | (*double_widen_fnma<mode>): Ditto. | |
18153 | (*single_widen_fnma<mode>): Ditto. | |
18154 | (*double_widen_fms<mode>): Ditto. | |
18155 | (*single_widen_fms<mode>): Ditto. | |
18156 | (*double_widen_fnms<mode>): Ditto. | |
18157 | (*single_widen_fnms<mode>): Ditto. | |
18158 | (*reduc_plus_scal_<mode>): Adjust name. | |
18159 | (*widen_reduc_plus_scal_<mode>): Adjust name. | |
18160 | (*dual_widen_fma<mode>): New combine pattern. | |
18161 | (*dual_widen_fmasu<mode>): Ditto. | |
18162 | (*dual_widen_fmaus<mode>): Ditto. | |
18163 | (*dual_fma<mode>): Ditto. | |
18164 | (*single_fma<mode>): Ditto. | |
18165 | (*dual_fnma<mode>): Ditto. | |
18166 | (*single_fnma<mode>): Ditto. | |
18167 | (*dual_fms<mode>): Ditto. | |
18168 | (*single_fms<mode>): Ditto. | |
18169 | (*dual_fnms<mode>): Ditto. | |
18170 | (*single_fnms<mode>): Ditto. | |
18171 | * config/riscv/autovec.md (fma<mode>4): | |
18172 | Reafctor fma pattern. | |
18173 | (*fma<VI:mode><P:mode>): Removed. | |
18174 | (fnma<mode>4): Reafctor. | |
18175 | (*fnma<VI:mode><P:mode>): Removed. | |
18176 | (*fma<VF:mode><P:mode>): Removed. | |
18177 | (*fnma<VF:mode><P:mode>): Removed. | |
18178 | (fms<mode>4): Reafctor. | |
18179 | (*fms<VF:mode><P:mode>): Removed. | |
18180 | (fnms<mode>4): Reafctor. | |
18181 | (*fnms<VF:mode><P:mode>): Removed. | |
18182 | * config/riscv/riscv-protos.h (prepare_ternary_operands): | |
18183 | Adjust prototype. | |
18184 | * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor. | |
18185 | * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern. | |
18186 | (*pred_mul_plus<mode>): Removed. | |
18187 | (*pred_mul_plus<mode>_scalar): Removed. | |
18188 | (*pred_mul_plus<mode>_extended_scalar): Removed. | |
18189 | (*pred_minus_mul<mode>_undef): New pattern. | |
18190 | (*pred_minus_mul<mode>): Removed. | |
18191 | (*pred_minus_mul<mode>_scalar): Removed. | |
18192 | (*pred_minus_mul<mode>_extended_scalar): Removed. | |
18193 | (*pred_mul_<optab><mode>_undef): New pattern. | |
18194 | (*pred_mul_<optab><mode>): Removed. | |
18195 | (*pred_mul_<optab><mode>_scalar): Removed. | |
18196 | (*pred_mul_neg_<optab><mode>_undef): New pattern. | |
18197 | (*pred_mul_neg_<optab><mode>): Removed. | |
18198 | (*pred_mul_neg_<optab><mode>_scalar): Removed. | |
18199 | ||
18200 | 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com> | |
18201 | ||
18202 | * config/riscv/riscv-vector-builtins.cc | |
18203 | (builtin_decl, expand_builtin): Replace SVE with RVV. | |
18204 | ||
18205 | 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com> | |
18206 | ||
18207 | * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc, | |
18208 | riscv-cmo.def and riscv-scalar-crypto.def. | |
18209 | ||
18210 | 2023-09-18 Pan Li <pan2.li@intel.com> | |
18211 | ||
18212 | * config/riscv/autovec.md: Extend to vls mode. | |
18213 | ||
18214 | 2023-09-18 Pan Li <pan2.li@intel.com> | |
18215 | ||
18216 | * config/riscv/autovec.md: Bugfix. | |
18217 | * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum. | |
18218 | ||
18219 | 2023-09-18 Andrew Pinski <apinski@marvell.com> | |
18220 | ||
18221 | PR tree-optimization/111442 | |
18222 | * match.pd (zero_one_valued_p): Have the bit_and match not be | |
18223 | recursive. | |
18224 | ||
18225 | 2023-09-18 Andrew Pinski <apinski@marvell.com> | |
18226 | ||
18227 | PR tree-optimization/111435 | |
18228 | * match.pd (zero_one_valued_p): Don't do recursion | |
18229 | on converts. | |
18230 | ||
18231 | 2023-09-18 Iain Sandoe <iain@sandoe.co.uk> | |
18232 | ||
18233 | * config/darwin-protos.h (enum darwin_external_toolchain): New. | |
18234 | * config/darwin.cc (DSYMUTIL_VERSION): New. | |
18235 | (darwin_override_options): Choose the default debug DWARF version | |
18236 | depending on the configured dsymutil version. | |
18237 | ||
18238 | 2023-09-18 Iain Sandoe <iain@sandoe.co.uk> | |
18239 | ||
18240 | * configure: Regenerate. | |
18241 | * configure.ac: Handle explict disable of stdlib option, set | |
18242 | defaults for Darwin. | |
18243 | ||
18244 | 2023-09-18 Andrew Pinski <apinski@marvell.com> | |
18245 | ||
18246 | PR tree-optimization/111431 | |
18247 | * match.pd (`(a == CST) & a`): New pattern. | |
18248 | ||
18249 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18250 | ||
18251 | * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests. | |
18252 | * config/riscv/vector.md (@vec_duplicate<mode>): Remove. | |
18253 | ||
18254 | 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
18255 | ||
18256 | PR target/105928 | |
18257 | * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate) | |
18258 | Add support for immediates using shifted ORR/BIC. | |
18259 | (aarch64_split_dimode_const_store): Apply if we save one instruction. | |
18260 | * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3): | |
18261 | Make pattern global. | |
18262 | ||
18263 | 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com> | |
18264 | ||
18265 | * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares. | |
18266 | (neoverse-v1): Place before zeus. | |
18267 | (neoverse-v2): Place before demeter. | |
18268 | * config/aarch64/aarch64-tune.md: Regenerate. | |
18269 | ||
18270 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18271 | ||
18272 | * config/riscv/autovec.md: Add VLS modes. | |
18273 | * config/riscv/vector-iterators.md: Ditto. | |
18274 | * config/riscv/vector.md: Ditto. | |
18275 | ||
18276 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18277 | ||
18278 | * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function. | |
18279 | * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug. | |
18280 | ||
18281 | 2023-09-18 Richard Biener <rguenther@suse.de> | |
18282 | ||
18283 | PR tree-optimization/111294 | |
18284 | * tree-ssa-threadbackward.cc (back_threader_profitability::m_name): | |
18285 | Remove | |
18286 | (back_threader::find_paths_to_names): Adjust. | |
18287 | (back_threader::maybe_thread_block): Likewise. | |
18288 | (back_threader_profitability::possibly_profitable_path_p): Remove | |
18289 | code applying extra costs to copies PHIs. | |
18290 | ||
18291 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18292 | ||
18293 | * config/riscv/autovec.md: Extend VLS modes. | |
18294 | * config/riscv/vector.md: Ditto. | |
18295 | ||
18296 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18297 | ||
18298 | * config/riscv/vector.md (mov<mode>): New pattern. | |
18299 | (*mov<mode>_mem_to_mem): Ditto. | |
18300 | (*mov<mode>): Ditto. | |
18301 | (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto. | |
18302 | (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto. | |
18303 | (*mov<mode>_vls): Ditto. | |
18304 | (movmisalign<mode>): Ditto. | |
18305 | (@vec_duplicate<mode>): Ditto. | |
18306 | * config/riscv/autovec-vls.md: Removed. | |
18307 | ||
18308 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18309 | ||
18310 | PR target/111153 | |
18311 | * config/riscv/autovec.md: Add VLS modes. | |
18312 | ||
18313 | 2023-09-18 Jason Merrill <jason@redhat.com> | |
18314 | ||
18315 | * doc/gty.texi: Add discussion of cache vs. deletable. | |
18316 | ||
18317 | 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18318 | ||
18319 | * config/riscv/autovec-vls.md (<optab><mode>3): Deleted. | |
18320 | (copysign<mode>3): Ditto. | |
18321 | (xorsign<mode>3): Ditto. | |
18322 | (<optab><mode>2): Ditto. | |
18323 | * config/riscv/autovec.md: Extend VLS modes. | |
18324 | ||
18325 | 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com> | |
18326 | ||
18327 | PR middle-end/111303 | |
18328 | * match.pd ((t * 2) / 2): Update pattern. | |
18329 | ||
18330 | 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com> | |
18331 | ||
18332 | * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn. | |
18333 | ||
18334 | 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18335 | ||
18336 | PR target/111391 | |
18337 | * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @. | |
18338 | (vec_extract<mode><vel>): Ditto. | |
18339 | * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug. | |
18340 | (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug. | |
18341 | * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move. | |
18342 | ||
18343 | 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com> | |
18344 | ||
18345 | * config/riscv/crypto.md (riscv_sha256sig0_<mode>, | |
18346 | riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>, | |
18347 | riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>, | |
18348 | riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with | |
18349 | new insn/expansions. | |
18350 | (SHA256_OP, SM3_OP, SM4_OP): New iterators. | |
18351 | (sha256_op, sm3_op, sm4_op): New attributes for iteration. | |
18352 | (*riscv_<sha256_op>_si): New raw instruction for RV32. | |
18353 | (*riscv_<sm3_op>_si): Ditto. | |
18354 | (*riscv_<sm4_op>_si): Ditto. | |
18355 | (riscv_<sha256_op>_di_extended): New base instruction for RV64. | |
18356 | (riscv_<sm3_op>_di_extended): Ditto. | |
18357 | (riscv_<sm4_op>_di_extended): Ditto. | |
18358 | (riscv_<sha256_op>_si): New common instruction expansion. | |
18359 | (riscv_<sm3_op>_si): Ditto. | |
18360 | (riscv_<sm4_op>_si): Ditto. | |
18361 | * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh", | |
18362 | "crypto_zksh" and "crypto_zksed". Remove availability | |
18363 | "crypto_zksh{32,64}" and "crypto_zksed{32,64}". | |
18364 | * config/riscv/riscv-ftypes.def: Remove unused function type. | |
18365 | * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4 | |
18366 | intrinsics to operate on uint32_t. | |
18367 | ||
18368 | 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com> | |
18369 | ||
18370 | * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for | |
18371 | uint8_t. (RISCV_ATYPE_UHI): New for uint16_t. | |
18372 | (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI): | |
18373 | Removed as no longer used. | |
18374 | (RISCV_ATYPE_UDI): New for uint64_t. | |
18375 | * config/riscv/riscv-cmo.def: Make types unsigned for not working | |
18376 | "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin | |
18377 | argument/return types. | |
18378 | * config/riscv/riscv-ftypes.def: Make bit manipulation, round | |
18379 | number and shift amount types unsigned. | |
18380 | * config/riscv/riscv-scalar-crypto.def: Ditto. | |
18381 | ||
18382 | 2023-09-16 Pan Li <pan2.li@intel.com> | |
18383 | ||
18384 | * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern. | |
18385 | ||
18386 | 2023-09-15 Fei Gao <gaofei@eswincomputing.com> | |
18387 | ||
18388 | * config/riscv/predicates.md: Restrict predicate | |
18389 | to allow 'reg' only. | |
18390 | ||
18391 | 2023-09-15 Andrew Pinski <apinski@marvell.com> | |
18392 | ||
18393 | * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p. | |
18394 | Also match `a & zero_one_valued_p` too. | |
18395 | ||
18396 | 2023-09-15 Andrew Pinski <apinski@marvell.com> | |
18397 | ||
18398 | PR tree-optimization/111414 | |
18399 | * match.pd (`(1 >> X) != 0`): Check to see if | |
18400 | the integer_onep was an integral type (not a vector type). | |
18401 | ||
18402 | 2023-09-15 Andrew MacLeod <amacleod@redhat.com> | |
18403 | ||
18404 | * gimple-range-fold.cc (fold_using_range::range_of_phi): Always | |
18405 | run phi analysis, and do it before loop analysis. | |
18406 | ||
18407 | 2023-09-15 Andrew MacLeod <amacleod@redhat.com> | |
18408 | ||
18409 | * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix | |
18410 | indentation. | |
18411 | ||
18412 | 2023-09-15 Qing Zhao <qing.zhao@oracle.com> | |
18413 | ||
18414 | PR tree-optimization/111407 | |
18415 | * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform | |
18416 | when one of the operands is subject to abnormal coalescing. | |
18417 | ||
18418 | 2023-09-15 Lehua Ding <lehua.ding@rivai.ai> | |
18419 | ||
18420 | * config/riscv/riscv-protos.h (enum insn_flags): Change name. | |
18421 | (enum insn_type): Ditto. | |
18422 | * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed. | |
18423 | (emit_vlmax_insn): Adjust. | |
18424 | (emit_nonvlmax_insn): Adjust. | |
18425 | (emit_vlmax_insn_lra): Adjust. | |
18426 | ||
18427 | 2023-09-15 Lehua Ding <lehua.ding@rivai.ai> | |
18428 | ||
18429 | * config/riscv/autovec-opt.md: Adjust. | |
18430 | * config/riscv/autovec.md: Ditto. | |
18431 | * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type. | |
18432 | (expand_reduction): Adjust expand_reduction prototype. | |
18433 | * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function. | |
18434 | (expand_reduction): Refactor expand_reduction. | |
18435 | ||
18436 | 2023-09-15 Richard Sandiford <richard.sandiford@arm.com> | |
18437 | ||
18438 | PR target/111411 | |
18439 | * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require | |
18440 | the lower memory access to a mem-pair operand. | |
18441 | ||
18442 | 2023-09-15 Yang Yujie <yangyujie@loongson.cn> | |
18443 | ||
18444 | * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG. | |
18445 | * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS | |
18446 | before the driver canonicalization routines. | |
18447 | * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc. | |
18448 | to loongarch-driver.h | |
18449 | * config/loongarch/t-linux: Move multilib-related definitions to | |
18450 | t-multilib. | |
18451 | * config/loongarch/t-multilib: New file. Inject library build | |
18452 | options obtained from --with-multilib-list. | |
18453 | * config/loongarch/t-loongarch: Same. | |
18454 | ||
18455 | 2023-09-15 Lehua Ding <lehua.ding@rivai.ai> | |
18456 | ||
18457 | PR target/111381 | |
18458 | * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>): | |
18459 | New combine pattern. | |
18460 | (*fold_left_widen_plus_<mode>): Ditto. | |
18461 | (*mask_len_fold_left_widen_plus_<mode>): Ditto. | |
18462 | * config/riscv/autovec.md (reduc_plus_scal_<mode>): | |
18463 | Change from define_expand to define_insn_and_split. | |
18464 | (fold_left_plus_<mode>): Ditto. | |
18465 | (mask_len_fold_left_plus_<mode>): Ditto. | |
18466 | * config/riscv/riscv-v.cc (expand_reduction): | |
18467 | Support widen reduction. | |
18468 | * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM): | |
18469 | Add new iterators and attrs. | |
18470 | ||
18471 | 2023-09-14 David Malcolm <dmalcolm@redhat.com> | |
18472 | ||
18473 | * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef. | |
18474 | * diagnostic-format-sarif.cc (class sarif_thread_flow): New. | |
18475 | (sarif_thread_flow::sarif_thread_flow): New. | |
18476 | (sarif_builder::make_code_flow_object): Reimplement, creating | |
18477 | per-thread threadFlow objects, populating them with the relevant | |
18478 | events. | |
18479 | (sarif_builder::make_thread_flow_object): Delete, moving the | |
18480 | code into sarif_builder::make_code_flow_object. | |
18481 | (sarif_builder::make_thread_flow_location_object): Add | |
18482 | "path_event_idx" param. Use it to set "executionOrder" | |
18483 | property. | |
18484 | * diagnostic-path.h (diagnostic_event::get_thread_id): New | |
18485 | pure-virtual vfunc. | |
18486 | (class diagnostic_thread): New. | |
18487 | (diagnostic_path::num_threads): New pure-virtual vfunc. | |
18488 | (diagnostic_path::get_thread): New pure-virtual vfunc. | |
18489 | (diagnostic_path::multithreaded_p): New decl. | |
18490 | (simple_diagnostic_event::simple_diagnostic_event): Add optional | |
18491 | thread_id param. | |
18492 | (simple_diagnostic_event::get_thread_id): New accessor. | |
18493 | (simple_diagnostic_event::m_thread_id): New. | |
18494 | (class simple_diagnostic_thread): New. | |
18495 | (simple_diagnostic_path::simple_diagnostic_path): Move definition | |
18496 | to diagnostic.cc. | |
18497 | (simple_diagnostic_path::num_threads): New. | |
18498 | (simple_diagnostic_path::get_thread): New. | |
18499 | (simple_diagnostic_path::add_thread): New. | |
18500 | (simple_diagnostic_path::add_thread_event): New. | |
18501 | (simple_diagnostic_path::m_threads): New. | |
18502 | * diagnostic-show-locus.cc (layout::layout): Add pretty_printer | |
18503 | param for overriding the context's printer. | |
18504 | (diagnostic_show_locus): Likwise. | |
18505 | * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path): | |
18506 | Move here from diagnostic-path.h. Add main thread. | |
18507 | (simple_diagnostic_path::num_threads): New. | |
18508 | (simple_diagnostic_path::get_thread): New. | |
18509 | (simple_diagnostic_path::add_thread): New. | |
18510 | (simple_diagnostic_path::add_thread_event): New. | |
18511 | (simple_diagnostic_event::simple_diagnostic_event): Add thread_id | |
18512 | param and use it to initialize m_thread_id. Reformat. | |
18513 | * diagnostic.h: Add pretty_printer param for overriding the | |
18514 | context's printer. | |
18515 | * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR. | |
18516 | (can_consolidate_events): Compare thread ids. | |
18517 | (class per_thread_summary): New. | |
18518 | (event_range::event_range): Add per_thread_summary arg. | |
18519 | (event_range::print): Add "pp" param and use it rather than dc's | |
18520 | printer. | |
18521 | (event_range::m_thread_id): New field. | |
18522 | (event_range::m_per_thread_summary): New field. | |
18523 | (path_summary::multithreaded_p): New. | |
18524 | (path_summary::get_events_for_thread_id): New. | |
18525 | (path_summary::m_per_thread_summary): New field. | |
18526 | (path_summary::m_thread_id_to_events): New field. | |
18527 | (path_summary::get_or_create_events_for_thread_id): New. | |
18528 | (path_summary::path_summary): Create per_thread_summary instances | |
18529 | as needed and associate the event_range instances with them. | |
18530 | (base_indent): Move here from print_path_summary_as_text. | |
18531 | (per_frame_indent): Likewise. | |
18532 | (class thread_event_printer): New, adapted from parts of | |
18533 | print_path_summary_as_text. | |
18534 | (print_path_summary_as_text): Make static. Reimplement to | |
18535 | moving most of existing code to class thread_event_printer, | |
18536 | capturing state as per-thread as appropriate. | |
18537 | (default_tree_diagnostic_path_printer): Add missing 'break' on | |
18538 | final case. | |
18539 | ||
18540 | 2023-09-14 David Malcolm <dmalcolm@redhat.com> | |
18541 | ||
18542 | * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New. | |
18543 | * dwarf2out.h (dwarf2cfi_cc_finalize): New decl. | |
18544 | * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when | |
18545 | clearing the deletable gcc_root_tab_t. | |
18546 | (ggc_common_finalize): New. | |
18547 | * ggc.h (ggc_common_finalize): New decl. | |
18548 | * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and | |
18549 | ggc_common_finalize. | |
18550 | ||
18551 | 2023-09-14 Max Filippov <jcmvbkbc@gmail.com> | |
18552 | ||
18553 | * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add | |
18554 | unsigned comparisons. | |
18555 | * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code | |
18556 | generation of salt/saltu instructions. | |
18557 | * config/xtensa/xtensa.h (TARGET_SALT): New macro. | |
18558 | * config/xtensa/xtensa.md (salt, saltu): New instruction | |
18559 | patterns. | |
18560 | ||
18561 | 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com> | |
18562 | ||
18563 | * ira-costs.cc (find_costs_and_classes): Decrease memory cost | |
18564 | by equiv savings. | |
18565 | ||
18566 | 2023-09-14 Lehua Ding <lehua.ding@rivai.ai> | |
18567 | ||
18568 | * config/riscv/autovec.md: Change rtx code to unspec. | |
18569 | * config/riscv/riscv-protos.h (expand_reduction): Change prototype. | |
18570 | * config/riscv/riscv-v.cc (expand_reduction): Change prototype. | |
18571 | * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop): | |
18572 | Removed. | |
18573 | (class widen_freducop): Removed. | |
18574 | * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs. | |
18575 | * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name. | |
18576 | (@pred_<reduc_op><mode>): New name. | |
18577 | (@pred_widen_reduc_plus<v_su><mode>): Change name. | |
18578 | (@pred_reduc_plus<order><mode>): Change name. | |
18579 | (@pred_widen_reduc_plus<order><mode>): Change name. | |
18580 | ||
18581 | 2023-09-14 Lehua Ding <lehua.ding@rivai.ai> | |
18582 | ||
18583 | * config/riscv/riscv-v.cc (expand_reduction): Adjust call. | |
18584 | * config/riscv/riscv-vector-builtins-bases.cc: Adjust call. | |
18585 | * config/riscv/vector-iterators.md: New iterators and attrs. | |
18586 | * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): | |
18587 | Removed. | |
18588 | (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed. | |
18589 | (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed. | |
18590 | (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed. | |
18591 | (@pred_reduc_<reduc><mode>): Added. | |
18592 | (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed. | |
18593 | (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed. | |
18594 | (@pred_widen_reduc_plus<v_su><mode>): Added. | |
18595 | (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed. | |
18596 | (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed. | |
18597 | (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed. | |
18598 | (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed. | |
18599 | (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed. | |
18600 | (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed. | |
18601 | (@pred_reduc_plus<order><mode>): Added. | |
18602 | (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed. | |
18603 | (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed. | |
18604 | (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed. | |
18605 | (@pred_widen_reduc_plus<order><mode>): Added. | |
18606 | ||
18607 | 2023-09-14 Richard Sandiford <richard.sandiford@arm.com> | |
18608 | ||
18609 | * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info): | |
18610 | Move WHILELO handling to... | |
18611 | (aarch64_vector_costs::finish_cost): ...here. Check whether the | |
18612 | vectorizer has decided to use a predicated loop. | |
18613 | ||
18614 | 2023-09-14 Andrew Pinski <apinski@marvell.com> | |
18615 | ||
18616 | PR tree-optimization/106164 | |
18617 | * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`): | |
18618 | Expand to support constants that are off by one. | |
18619 | ||
18620 | 2023-09-14 Andrew Pinski <apinski@marvell.com> | |
18621 | ||
18622 | * genmatch.cc (parser::parse_result): For an else clause | |
18623 | of an if statement inside a switch, error out explictly. | |
18624 | ||
18625 | 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18626 | ||
18627 | * config/riscv/autovec-opt.md: Add VLS mask modes. | |
18628 | * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @. | |
18629 | (vcond_mask_<mode><vm>): Add VLS mask modes. | |
18630 | * config/riscv/vector.md: Ditto. | |
18631 | ||
18632 | 2023-09-14 Richard Biener <rguenther@suse.de> | |
18633 | ||
18634 | PR tree-optimization/111294 | |
18635 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Track | |
18636 | operands that eventually become dead and use simple_dce_from_worklist | |
18637 | to remove their definitions if they did so. | |
18638 | ||
18639 | 2023-09-14 Richard Sandiford <richard.sandiford@arm.com> | |
18640 | ||
18641 | * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le): | |
18642 | Accept all nonimmediate_operands, but keep the existing constraints. | |
18643 | If the instruction is split before RA, load invalid addresses into | |
18644 | a temporary register. | |
18645 | * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete. | |
18646 | ||
18647 | 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18648 | ||
18649 | PR target/111395 | |
18650 | * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE. | |
18651 | (vector_insn_info::global_merge): Ditto. | |
18652 | (vector_insn_info::get_avl_or_vl_reg): Ditto. | |
18653 | ||
18654 | 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18655 | ||
18656 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it. | |
18657 | ||
18658 | 2023-09-14 Lulu Cheng <chenglulu@loongson.cn> | |
18659 | ||
18660 | * config/loongarch/loongarch-def.c: Modify the default value of | |
18661 | branch_cost. | |
18662 | ||
18663 | 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
18664 | ||
18665 | * config/xtensa/xtensa.cc (xtensa_expand_scc): | |
18666 | Revert the changes from the last patch, as the work in the RTL | |
18667 | expansion pass is too far to determine the physical registers. | |
18668 | * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto. | |
18669 | (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns. | |
18670 | ||
18671 | 2023-09-14 Lulu Cheng <chenglulu@loongson.cn> | |
18672 | ||
18673 | PR target/111334 | |
18674 | * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'. | |
18675 | ||
18676 | 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18677 | ||
18678 | * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes. | |
18679 | (@vec_extract<mode><vel>): Ditto. | |
18680 | * config/riscv/vector.md: Ditto | |
18681 | ||
18682 | 2023-09-13 Andrew Pinski <apinski@marvell.com> | |
18683 | ||
18684 | * match.pd (`X <= MAX(X, Y)`): | |
18685 | Move before `MIN (X, C1) < C2` pattern. | |
18686 | ||
18687 | 2023-09-13 Andrew Pinski <apinski@marvell.com> | |
18688 | ||
18689 | PR tree-optimization/111364 | |
18690 | * match.pd (`MIN (X, Y) == X`): Extend | |
18691 | to min/lt, min/ge, max/gt, max/le. | |
18692 | ||
18693 | 2023-09-13 Andrew Pinski <apinski@marvell.com> | |
18694 | ||
18695 | PR tree-optimization/111345 | |
18696 | * match.pd (`Y > (X % Y)`): Merge | |
18697 | into ... | |
18698 | (`(X % Y) < Y`): Pattern by adding `:c` | |
18699 | on the comparison. | |
18700 | ||
18701 | 2023-09-13 Richard Biener <rguenther@suse.de> | |
18702 | ||
18703 | PR tree-optimization/111387 | |
18704 | * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check | |
18705 | EDGE_DFS_BACK when doing BB vectorization. | |
18706 | (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme | |
18707 | to compute RPO and mark backedges. | |
18708 | ||
18709 | 2023-09-13 Lehua Ding <lehua.ding@rivai.ai> | |
18710 | ||
18711 | * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart): | |
18712 | New combine pattern. | |
18713 | * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul. | |
18714 | (<mulh_table><mode>3_highpart): Merged pattern. | |
18715 | (umul<mode>3_highpart): Mrege smul and umul. | |
18716 | * config/riscv/vector-iterators.md (umul): New iterators. | |
18717 | (UNSPEC_VMULHU): New iterators. | |
18718 | ||
18719 | 2023-09-13 Lehua Ding <lehua.ding@rivai.ai> | |
18720 | ||
18721 | * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>): | |
18722 | New combine pattern. | |
18723 | (*cond_<any_shiftrt:optab>trunc<mode>): Ditto. | |
18724 | ||
18725 | 2023-09-13 Lehua Ding <lehua.ding@rivai.ai> | |
18726 | ||
18727 | * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move. | |
18728 | (*cond_copysign<mode>): New combine pattern. | |
18729 | * config/riscv/riscv-v.cc (needs_fp_rounding): Extend. | |
18730 | ||
18731 | 2023-09-13 Richard Biener <rguenther@suse.de> | |
18732 | ||
18733 | PR tree-optimization/111397 | |
18734 | * tree-ssa-propagate.cc (may_propagate_copy): Change optional | |
18735 | argument to specify whether the PHI destination doesn't flow in | |
18736 | from an abnormal PHI. | |
18737 | (propagate_value): Adjust. | |
18738 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal | |
18739 | PHI dest. | |
18740 | * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children): | |
18741 | Likewise. | |
18742 | (process_bb): Likewise. | |
18743 | ||
18744 | 2023-09-13 Pan Li <pan2.li@intel.com> | |
18745 | ||
18746 | PR target/111362 | |
18747 | * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix. | |
18748 | ||
18749 | 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com> | |
18750 | ||
18751 | PR tree-optimization/111303 | |
18752 | * match.pd ((X - N * M) / N): Add undefined_p checking. | |
18753 | ((X + N * M) / N): Likewise. | |
18754 | ((X + C) div_rshift N): Likewise. | |
18755 | ||
18756 | 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18757 | ||
18758 | PR target/111337 | |
18759 | * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern. | |
18760 | ||
18761 | 2023-09-12 Martin Jambor <mjambor@suse.cz> | |
18762 | ||
18763 | * dbgcnt.def (form_fma): New. | |
18764 | * tree-ssa-math-opts.cc: Include dbgcnt.h. | |
18765 | (convert_mult_to_fma): Bail out if the debug counter say so. | |
18766 | ||
18767 | 2023-09-12 Edwin Lu <ewlu@rivosinc.com> | |
18768 | ||
18769 | * config/riscv/autovec-opt.md: Update type | |
18770 | * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert | |
18771 | ||
18772 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18773 | ||
18774 | * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p): | |
18775 | New function. | |
18776 | (aarch64_layout_frame): Use it to decide whether locals should | |
18777 | go above or below the saved registers. | |
18778 | (aarch64_expand_prologue): Update stack layout comment. | |
18779 | Emit a stack tie after the final adjustment. | |
18780 | ||
18781 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18782 | ||
18783 | * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) | |
18784 | (aarch64_frame::below_hard_fp_saved_regs_size): Delete. | |
18785 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly. | |
18786 | ||
18787 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18788 | ||
18789 | * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) | |
18790 | (aarch64_frame::hard_fp_save_and_probe): New fields. | |
18791 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them. | |
18792 | Rather than asserting that a leaf function saves LR, instead assert | |
18793 | that a leaf function saves something. | |
18794 | (aarch64_get_separate_components): Prevent the chosen probe | |
18795 | registers from being individually shrink-wrapped. | |
18796 | (aarch64_allocate_and_probe_stack_space): Remove workaround for | |
18797 | probe registers that aren't at the bottom of the previous allocation. | |
18798 | ||
18799 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18800 | ||
18801 | * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): | |
18802 | Always probe the residual allocation at offset 1024, asserting | |
18803 | that that is in range. | |
18804 | ||
18805 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18806 | ||
18807 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that | |
18808 | the LR save slot is in the first 16 bytes of the register save area. | |
18809 | Only form STP/LDP push/pop candidates if both registers are valid. | |
18810 | (aarch64_allocate_and_probe_stack_space): Remove workaround for | |
18811 | when LR was not in the first 16 bytes. | |
18812 | ||
18813 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18814 | ||
18815 | * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): | |
18816 | Don't probe final allocations that are exactly 1KiB in size (after | |
18817 | unprobed space above the final allocation has been deducted). | |
18818 | ||
18819 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18820 | ||
18821 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak | |
18822 | calculation of initial_adjust for frames in which all saves | |
18823 | are SVE saves. | |
18824 | ||
18825 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18826 | ||
18827 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify | |
18828 | the allocation of the top of the frame. | |
18829 | ||
18830 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18831 | ||
18832 | * config/aarch64/aarch64.h (aarch64_frame): Add comment above | |
18833 | reg_offset. | |
18834 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets | |
18835 | from the bottom of the frame, rather than the bottom of the saved | |
18836 | register area. Measure reg_offset from the bottom of the frame | |
18837 | rather than the bottom of the saved register area. | |
18838 | (aarch64_save_callee_saves): Update accordingly. | |
18839 | (aarch64_restore_callee_saves): Likewise. | |
18840 | (aarch64_get_separate_components): Likewise. | |
18841 | (aarch64_process_components): Likewise. | |
18842 | ||
18843 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18844 | ||
18845 | * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. | |
18846 | ||
18847 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18848 | ||
18849 | * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename | |
18850 | to... | |
18851 | (aarch64_frame::bytes_above_hard_fp): ...this. | |
18852 | * config/aarch64/aarch64.cc (aarch64_layout_frame) | |
18853 | (aarch64_expand_prologue): Update accordingly. | |
18854 | (aarch64_initial_elimination_offset): Likewise. | |
18855 | ||
18856 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18857 | ||
18858 | * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... | |
18859 | (aarch64_frame::bytes_above_locals): ...this. | |
18860 | * config/aarch64/aarch64.cc (aarch64_layout_frame) | |
18861 | (aarch64_initial_elimination_offset): Update accordingly. | |
18862 | ||
18863 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18864 | ||
18865 | * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the | |
18866 | calculation of chain_offset into the emit_frame_chain block. | |
18867 | ||
18868 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18869 | ||
18870 | * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. | |
18871 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove | |
18872 | callee_offset handling. | |
18873 | (aarch64_save_callee_saves): Replace the start_offset parameter | |
18874 | with a bytes_below_sp parameter. | |
18875 | (aarch64_restore_callee_saves): Likewise. | |
18876 | (aarch64_expand_prologue): Update accordingly. | |
18877 | (aarch64_expand_epilogue): Likewise. | |
18878 | ||
18879 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18880 | ||
18881 | * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New | |
18882 | field. | |
18883 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it. | |
18884 | (aarch64_expand_epilogue): Use it instead of | |
18885 | below_hard_fp_saved_regs_size. | |
18886 | ||
18887 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18888 | ||
18889 | * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New | |
18890 | field. | |
18891 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it, | |
18892 | and use it instead of crtl->outgoing_args_size. | |
18893 | (aarch64_get_separate_components): Use bytes_below_saved_regs instead | |
18894 | of outgoing_args_size. | |
18895 | (aarch64_process_components): Likewise. | |
18896 | ||
18897 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18898 | ||
18899 | * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly | |
18900 | allocate the frame in one go if there are no saved registers. | |
18901 | ||
18902 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18903 | ||
18904 | * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use | |
18905 | chain_offset rather than callee_offset. | |
18906 | ||
18907 | 2023-09-12 Richard Sandiford <richard.sandiford@arm.com> | |
18908 | ||
18909 | * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use | |
18910 | a local shorthand for cfun->machine->frame. | |
18911 | (aarch64_restore_callee_saves, aarch64_get_separate_components): | |
18912 | (aarch64_process_components): Likewise. | |
18913 | (aarch64_allocate_and_probe_stack_space): Likewise. | |
18914 | (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. | |
18915 | (aarch64_layout_frame): Use existing shorthand for one more case. | |
18916 | ||
18917 | 2023-09-12 Andrew Pinski <apinski@marvell.com> | |
18918 | ||
18919 | PR tree-optimization/107881 | |
18920 | * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern. | |
18921 | (`(a CMP1 b) == (a CMP2 b)`): New pattern. | |
18922 | ||
18923 | 2023-09-12 Pan Li <pan2.li@intel.com> | |
18924 | ||
18925 | * config/riscv/riscv-vector-costs.h (struct range): Removed. | |
18926 | ||
18927 | 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
18928 | ||
18929 | * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function. | |
18930 | (compute_nregs_for_mode): Ditto. | |
18931 | (live_range_conflict_p): Ditto. | |
18932 | (max_number_of_live_regs): Ditto. | |
18933 | (compute_lmul): Ditto. | |
18934 | (costs::prefer_new_lmul_p): Ditto. | |
18935 | (costs::better_main_loop_than_p): Ditto. | |
18936 | * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct. | |
18937 | (struct var_live_range): Ditto. | |
18938 | (struct autovec_info): Ditto. | |
18939 | * config/riscv/t-riscv: Update makefile for COST model. | |
18940 | ||
18941 | 2023-09-12 Jakub Jelinek <jakub@redhat.com> | |
18942 | ||
18943 | * fold-const.cc (range_check_type): Handle BITINT_TYPE like | |
18944 | OFFSET_TYPE. | |
18945 | ||
18946 | 2023-09-12 Jakub Jelinek <jakub@redhat.com> | |
18947 | ||
18948 | PR middle-end/111338 | |
18949 | * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static | |
18950 | data member. | |
18951 | (vn_walk_cb_data::push_partial_def): Remove bufsize variable. | |
18952 | (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2 | |
18953 | optimization if type's precision is too large for | |
18954 | vn_walk_cb_data::bufsize. | |
18955 | ||
18956 | 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com> | |
18957 | ||
18958 | * doc/gm2.texi (Compiler options): Document new option | |
18959 | -Wcase-enum. | |
18960 | ||
18961 | 2023-09-12 Thomas Schwinge <thomas@codesourcery.com> | |
18962 | ||
18963 | * doc/sourcebuild.texi (stack_size): Update. | |
18964 | ||
18965 | 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
18966 | ||
18967 | * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name. | |
18968 | (<optab>_not<mode>3): Likewise. | |
18969 | * config/riscv/riscv-protos.h (riscv_expand_strcmp): New | |
18970 | prototype. | |
18971 | * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper | |
18972 | macros. | |
18973 | (GEN_EMIT_HELPER2): Likewise. | |
18974 | (emit_strcmp_scalar_compare_byte): New function. | |
18975 | (emit_strcmp_scalar_compare_subword): Likewise. | |
18976 | (emit_strcmp_scalar_compare_word): Likewise. | |
18977 | (emit_strcmp_scalar_load_and_compare): Likewise. | |
18978 | (emit_strcmp_scalar_call_to_libc): Likewise. | |
18979 | (emit_strcmp_scalar_result_calculation_nonul): Likewise. | |
18980 | (emit_strcmp_scalar_result_calculation): Likewise. | |
18981 | (riscv_expand_strcmp_scalar): Likewise. | |
18982 | (riscv_expand_strcmp): Likewise. | |
18983 | * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export | |
18984 | INSN name. | |
18985 | (@slt<u>_<X:mode><GPR:mode>3): Likewise. | |
18986 | (cmpstrnsi): Invoke expansion function for str(n)cmp. | |
18987 | (cmpstrsi): Likewise. | |
18988 | * config/riscv/riscv.opt: Add new parameter | |
18989 | '-mstring-compare-inline-limit'. | |
18990 | * doc/invoke.texi: Document new parameter | |
18991 | '-mstring-compare-inline-limit'. | |
18992 | ||
18993 | 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
18994 | ||
18995 | * config.gcc: Add new object riscv-string.o. | |
18996 | riscv-string.cc. | |
18997 | * config/riscv/riscv-protos.h (riscv_expand_strlen): | |
18998 | New function. | |
18999 | * config/riscv/riscv.md (strlen<mode>): New expand INSN. | |
19000 | * config/riscv/riscv.opt: New flag 'minline-strlen'. | |
19001 | * config/riscv/t-riscv: Add new object riscv-string.o. | |
19002 | * config/riscv/thead.md (th_rev<mode>2): Export INSN name. | |
19003 | (th_rev<mode>2): Likewise. | |
19004 | (th_tstnbz<mode>2): New INSN. | |
19005 | * doc/invoke.texi: Document '-minline-strlen'. | |
19006 | * emit-rtl.cc (emit_likely_jump_insn): New helper function. | |
19007 | (emit_unlikely_jump_insn): Likewise. | |
19008 | * rtl.h (emit_likely_jump_insn): New prototype. | |
19009 | (emit_unlikely_jump_insn): Likewise. | |
19010 | * config/riscv/riscv-string.cc: New file. | |
19011 | ||
19012 | 2023-09-12 Thomas Schwinge <thomas@codesourcery.com> | |
19013 | ||
19014 | * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P) | |
19015 | (TARGET_SUPPORTS_ALIASES): Define. | |
19016 | ||
19017 | 2023-09-12 Thomas Schwinge <thomas@codesourcery.com> | |
19018 | ||
19019 | * doc/sourcebuild.texi (check-function-bodies): Update. | |
19020 | ||
19021 | 2023-09-12 Tobias Burnus <tobias@codesourcery.com> | |
19022 | ||
19023 | * gimplify.cc (gimplify_bind_expr): Check for | |
19024 | insertion after variable cleanup. Convert 'omp allocate' | |
19025 | var-decl attribute to GOMP_alloc/GOMP_free calls. | |
19026 | ||
19027 | 2023-09-12 xuli <xuli1@eswincomputing.com> | |
19028 | ||
19029 | * config/riscv/riscv-vector-builtins-bases.cc: remove unused | |
19030 | parameter e and replace NULL_RTX with gcc_unreachable. | |
19031 | ||
19032 | 2023-09-12 xuli <xuli1@eswincomputing.com> | |
19033 | ||
19034 | * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class. | |
19035 | (BASE): Ditto. | |
19036 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
19037 | * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support. | |
19038 | * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto. | |
19039 | (SHAPE): Ditto. | |
19040 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
19041 | * config/riscv/riscv-vector-builtins.cc: Add args type. | |
19042 | ||
19043 | 2023-09-12 Fei Gao <gaofei@eswincomputing.com> | |
19044 | ||
19045 | * config/riscv/riscv.cc | |
19046 | (riscv_avoid_shrink_wrapping_separate): wrap the condition check in | |
19047 | riscv_avoid_shrink_wrapping_separate. | |
19048 | (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate | |
19049 | is active. | |
19050 | (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate | |
19051 | ||
19052 | 2023-09-12 Fei Gao <gaofei@eswincomputing.com> | |
19053 | ||
19054 | * shrink-wrap.cc (try_shrink_wrapping_separate):call | |
19055 | use_shrink_wrapping_separate. | |
19056 | (use_shrink_wrapping_separate): wrap the condition | |
19057 | check in use_shrink_wrapping_separate. | |
19058 | * shrink-wrap.h (use_shrink_wrapping_separate): add to extern | |
19059 | ||
19060 | 2023-09-11 Andrew Pinski <apinski@marvell.com> | |
19061 | ||
19062 | PR tree-optimization/111348 | |
19063 | * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on | |
19064 | the cmp part of the pattern. | |
19065 | ||
19066 | 2023-09-11 Uros Bizjak <ubizjak@gmail.com> | |
19067 | ||
19068 | PR target/111340 | |
19069 | * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT. | |
19070 | Call output_addr_const for CASE_CONST_SCALAR_INT. | |
19071 | ||
19072 | 2023-09-11 Edwin Lu <ewlu@rivosinc.com> | |
19073 | ||
19074 | * config/riscv/thead.md: Update types | |
19075 | ||
19076 | 2023-09-11 Edwin Lu <ewlu@rivosinc.com> | |
19077 | ||
19078 | * config/riscv/riscv.md: Update types | |
19079 | ||
19080 | 2023-09-11 Edwin Lu <ewlu@rivosinc.com> | |
19081 | ||
19082 | * config/riscv/riscv.md: Add "zicond" type | |
19083 | * config/riscv/zicond.md: Update types | |
19084 | ||
19085 | 2023-09-11 Edwin Lu <ewlu@rivosinc.com> | |
19086 | ||
19087 | * config/riscv/riscv.md: Add "pushpop" and "mvpair" types | |
19088 | * config/riscv/zc.md: Update types | |
19089 | ||
19090 | 2023-09-11 Edwin Lu <ewlu@rivosinc.com> | |
19091 | ||
19092 | * config/riscv/autovec-opt.md: Update types | |
19093 | * config/riscv/autovec.md: likewise | |
19094 | ||
19095 | 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
19096 | ||
19097 | * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix | |
19098 | builtin flag. | |
19099 | (s390_vec_unsigned_flt): Ditto. | |
19100 | (s390_vec_revb_flt): Ditto. | |
19101 | (s390_vec_reve_flt): Ditto. | |
19102 | (s390_vclfnhs): Fix operand flags. | |
19103 | (s390_vclfnls): Ditto. | |
19104 | (s390_vcrnfs): Ditto. | |
19105 | (s390_vcfn): Ditto. | |
19106 | (s390_vcnf): Ditto. | |
19107 | ||
19108 | 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
19109 | ||
19110 | * config/s390/s390-builtins.def (O_U64): New. | |
19111 | (O1_U64): Ditto. | |
19112 | (O2_U64): Ditto. | |
19113 | (O3_U64): Ditto. | |
19114 | (O4_U64): Ditto. | |
19115 | (O_M12): Change bit position. | |
19116 | (O_S2): Ditto. | |
19117 | (O_S3): Ditto. | |
19118 | (O_S4): Ditto. | |
19119 | (O_S5): Ditto. | |
19120 | (O_S8): Ditto. | |
19121 | (O_S12): Ditto. | |
19122 | (O_S16): Ditto. | |
19123 | (O_S32): Ditto. | |
19124 | (O_ELEM): Ditto. | |
19125 | (O_LIT): Ditto. | |
19126 | (OB_DEF_VAR): Add operand constraints. | |
19127 | (B_DEF): Ditto. | |
19128 | * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit | |
19129 | operands. | |
19130 | ||
19131 | 2023-09-11 Andrew Pinski <apinski@marvell.com> | |
19132 | ||
19133 | PR tree-optimization/111349 | |
19134 | * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on | |
19135 | the cmp part of the pattern. | |
19136 | ||
19137 | 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19138 | ||
19139 | PR target/111311 | |
19140 | * config/riscv/riscv.opt: Set default as scalable vectorization. | |
19141 | ||
19142 | 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19143 | ||
19144 | * config/riscv/riscv-protos.h (get_all_predecessors): Remove. | |
19145 | (get_all_successors): Ditto. | |
19146 | * config/riscv/riscv-v.cc (get_all_predecessors): Ditto. | |
19147 | (get_all_successors): Ditto. | |
19148 | ||
19149 | 2023-09-11 Jakub Jelinek <jakub@redhat.com> | |
19150 | ||
19151 | PR middle-end/111329 | |
19152 | * pretty-print.h (pp_wide_int): Rewrite from macro into inline | |
19153 | function. For printing values which don't fit into digit_buffer | |
19154 | use out-of-line function. | |
19155 | * wide-int-print.h (pp_wide_int_large): Declare. | |
19156 | * wide-int-print.cc: Include pretty-print.h. | |
19157 | (pp_wide_int_large): Define. | |
19158 | ||
19159 | 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19160 | ||
19161 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): | |
19162 | Use dominance analysis. | |
19163 | (pass_vsetvl::init): Ditto. | |
19164 | (pass_vsetvl::done): Ditto. | |
19165 | ||
19166 | 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19167 | ||
19168 | PR target/111311 | |
19169 | * config/riscv/autovec.md: Add VLS modes. | |
19170 | * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function. | |
19171 | (cmp_lmul_gt_one): Ditto. | |
19172 | * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto. | |
19173 | (cmp_lmul_gt_one): Ditto. | |
19174 | * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes. | |
19175 | (riscv_vectorize_vec_perm_const): Ditto. | |
19176 | * config/riscv/vector-iterators.md: Ditto. | |
19177 | * config/riscv/vector.md: Ditto. | |
19178 | ||
19179 | 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19180 | ||
19181 | * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern. | |
19182 | * config/riscv/vector-iterators.md: New iterator | |
19183 | ||
19184 | 2023-09-11 Andrew Pinski <apinski@marvell.com> | |
19185 | ||
19186 | PR tree-optimization/111346 | |
19187 | * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part | |
19188 | of the pattern | |
19189 | ||
19190 | 2023-09-11 liuhongt <hongtao.liu@intel.com> | |
19191 | ||
19192 | PR target/111306 | |
19193 | PR target/111335 | |
19194 | * config/i386/sse.md (int_comm): New int_attr. | |
19195 | (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): | |
19196 | Remove % for Complex conjugate operations since they're not | |
19197 | commutative. | |
19198 | (fma_<complexpairopname>_<mode>_pair): Ditto. | |
19199 | (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto. | |
19200 | (cmul<conj_op><mode>3): Ditto. | |
19201 | ||
19202 | 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19203 | ||
19204 | * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand | |
19205 | fixed-vlmax/vls vector permutation. | |
19206 | ||
19207 | 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19208 | ||
19209 | * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup. | |
19210 | ||
19211 | 2023-09-10 Andrew Pinski <apinski@marvell.com> | |
19212 | ||
19213 | PR tree-optimization/111331 | |
19214 | * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): | |
19215 | Fix the LE/GE comparison to the correct value. | |
19216 | * tree-ssa-phiopt.cc (minmax_replacement): | |
19217 | Fix the LE/GE comparison for the | |
19218 | `(a CMP CST1) ? max<a,CST2> : a` optimization. | |
19219 | ||
19220 | 2023-09-10 Iain Sandoe <iain@sandoe.co.uk> | |
19221 | ||
19222 | * config/darwin.cc (darwin_function_section): Place unlikely | |
19223 | executed global init code into the standard cold section. | |
19224 | ||
19225 | 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19226 | ||
19227 | PR target/111311 | |
19228 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS. | |
19229 | (pass_vsetvl::pre_vsetvl): Ditto. | |
19230 | (pass_vsetvl::init): Ditto. | |
19231 | (pass_vsetvl::lazy_vsetvl): Ditto. | |
19232 | ||
19233 | 2023-09-09 Lulu Cheng <chenglulu@loongson.cn> | |
19234 | ||
19235 | * config/loongarch/loongarch.md (mulsidi3_64bit): | |
19236 | Field unsigned extension support. | |
19237 | (<u>muldi3_highpart): Modify template name. | |
19238 | (<u>mulsi3_highpart): Likewise. | |
19239 | (<u>mulsidi3_64bit): Field unsigned extension support. | |
19240 | (<su>muldi3_highpart): Modify muldi3_highpart to | |
19241 | smuldi3_highpart. | |
19242 | (<su>mulsi3_highpart): Modify mulsi3_highpart to | |
19243 | smulsi3_highpart. | |
19244 | ||
19245 | 2023-09-09 Xi Ruoyao <xry111@xry111.site> | |
19246 | ||
19247 | * config/loongarch/loongarch.cc (loongarch_block_move_straight): | |
19248 | Check precondition (delta must be a power of 2) and use | |
19249 | popcount_hwi instead of a homebrew loop. | |
19250 | ||
19251 | 2023-09-09 Xi Ruoyao <xry111@xry111.site> | |
19252 | ||
19253 | * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN): | |
19254 | Define to the maximum amount of bytes able to be loaded or | |
19255 | stored with one machine instruction. | |
19256 | * config/loongarch/loongarch.cc (loongarch_mode_for_move_size): | |
19257 | New static function. | |
19258 | (loongarch_block_move_straight): Call | |
19259 | loongarch_mode_for_move_size for machine_mode to be moved. | |
19260 | (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN | |
19261 | instead of UNITS_PER_WORD. | |
19262 | ||
19263 | 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19264 | ||
19265 | * config/riscv/vector-iterators.md: Fix floating-point operations predicate. | |
19266 | ||
19267 | 2023-09-09 Lehua Ding <lehua.ding@rivai.ai> | |
19268 | ||
19269 | * fold-const.cc (can_min_p): New function. | |
19270 | (poly_int_binop): Try fold MIN_EXPR. | |
19271 | ||
19272 | 2023-09-08 Aldy Hernandez <aldyh@redhat.com> | |
19273 | ||
19274 | * range-op-float.cc (foperator_ltgt::fold_range): Do not special | |
19275 | case VREL_EQ nor call frelop_early_resolve. | |
19276 | ||
19277 | 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu> | |
19278 | ||
19279 | * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext): | |
19280 | Remove broken INSN. | |
19281 | (*extendhi<SUPERQI:mode>2_th_ext): New INSN. | |
19282 | (*extendqi<SUPERQI:mode>2_th_ext): New INSN. | |
19283 | ||
19284 | 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu> | |
19285 | ||
19286 | * config/riscv/thead.md: Use more appropriate mode attributes | |
19287 | for extensions. | |
19288 | ||
19289 | 2023-09-08 Guo Jie <guojie@loongson.cn> | |
19290 | ||
19291 | * common/config/loongarch/loongarch-common.cc: | |
19292 | (default_options loongarch_option_optimization_table): | |
19293 | Default to -fsched-pressure. | |
19294 | ||
19295 | 2023-09-08 Yang Yujie <yangyujie@loongson.cn> | |
19296 | ||
19297 | * config.gcc: remove non-POSIX syntax "<<<". | |
19298 | ||
19299 | 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu> | |
19300 | ||
19301 | * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb): | |
19302 | Rename postfix to _bitmanip. | |
19303 | (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern. | |
19304 | (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern. | |
19305 | ||
19306 | 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19307 | ||
19308 | * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type. | |
19309 | ||
19310 | 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19311 | ||
19312 | * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug. | |
19313 | ||
19314 | 2023-09-07 liuhongt <hongtao.liu@intel.com> | |
19315 | ||
19316 | * config/i386/sse.md | |
19317 | (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn. | |
19318 | (VHFBF_AVX512VL): New mode iterator. | |
19319 | (VI2HFBF_AVX512VL): New mode iterator. | |
19320 | ||
19321 | 2023-09-07 Aldy Hernandez <aldyh@redhat.com> | |
19322 | ||
19323 | * value-range.h (contains_zero_p): Return false for undefined ranges. | |
19324 | * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for | |
19325 | contains_zero_p change above. | |
19326 | (operator_ge::op1_op2_relation): Same. | |
19327 | (operator_equal::op1_op2_relation): Same. | |
19328 | (operator_not_equal::op1_op2_relation): Same. | |
19329 | (operator_lt::op1_op2_relation): Same. | |
19330 | (operator_le::op1_op2_relation): Same. | |
19331 | (operator_ge::op1_op2_relation): Same. | |
19332 | * range-op.cc (operator_equal::op1_op2_relation): Same. | |
19333 | (operator_not_equal::op1_op2_relation): Same. | |
19334 | (operator_lt::op1_op2_relation): Same. | |
19335 | (operator_le::op1_op2_relation): Same. | |
19336 | (operator_cast::op1_range): Same. | |
19337 | (set_nonzero_range_from_mask): Same. | |
19338 | (operator_bitwise_xor::op1_range): Same. | |
19339 | (operator_addr_expr::fold_range): Same. | |
19340 | (operator_addr_expr::op1_range): Same. | |
19341 | ||
19342 | 2023-09-07 Andrew MacLeod <amacleod@redhat.com> | |
19343 | ||
19344 | PR tree-optimization/110875 | |
19345 | * gimple-range.cc (gimple_ranger::prefill_name): Only invoke | |
19346 | cache-prefilling routine when the ssa-name has no global value. | |
19347 | ||
19348 | 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com> | |
19349 | ||
19350 | PR target/111225 | |
19351 | * lra-constraints.cc (goal_reuse_alt_p): New global flag. | |
19352 | (process_alt_operands): Set up the flag. Clear flag for chosen | |
19353 | alternative with special memory constraints. | |
19354 | (process_alt_operands): Set up used insn alternative depending on the flag. | |
19355 | ||
19356 | 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19357 | ||
19358 | * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns. | |
19359 | * config/riscv/riscv.md: Ditto. | |
19360 | * config/riscv/vector-iterators.md: Ditto. | |
19361 | * config/riscv/vector.md: Ditto. | |
19362 | ||
19363 | 2023-09-07 David Malcolm <dmalcolm@redhat.com> | |
19364 | ||
19365 | * diagnostic-core.h (error_meta): New decl. | |
19366 | * diagnostic.cc (error_meta): New. | |
19367 | ||
19368 | 2023-09-07 Jakub Jelinek <jakub@redhat.com> | |
19369 | ||
19370 | PR c/102989 | |
19371 | * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info | |
19372 | inside gcc_assert, as later code relies on it filling info variable. | |
19373 | * gimple-fold.cc (clear_padding_bitint_needs_padding_p, | |
19374 | clear_padding_type): Likewise. | |
19375 | * varasm.cc (output_constant): Likewise. | |
19376 | * fold-const.cc (native_encode_int, native_interpret_int): Likewise. | |
19377 | * stor-layout.cc (finish_bitfield_representative, layout_type): | |
19378 | Likewise. | |
19379 | * gimple-lower-bitint.cc (bitint_precision_kind): Likewise. | |
19380 | ||
19381 | 2023-09-07 Xi Ruoyao <xry111@xry111.site> | |
19382 | ||
19383 | PR target/111252 | |
19384 | * config/loongarch/loongarch-protos.h | |
19385 | (loongarch_pre_reload_split): Declare new function. | |
19386 | (loongarch_use_bstrins_for_ior_with_mask): Likewise. | |
19387 | * config/loongarch/loongarch.cc | |
19388 | (loongarch_pre_reload_split): Implement. | |
19389 | (loongarch_use_bstrins_for_ior_with_mask): Likewise. | |
19390 | * config/loongarch/predicates.md (ins_zero_bitmask_operand): | |
19391 | New predicate. | |
19392 | * config/loongarch/loongarch.md (bstrins_<mode>_for_mask): | |
19393 | New define_insn_and_split. | |
19394 | (bstrins_<mode>_for_ior_mask): Likewise. | |
19395 | (define_peephole2): Further optimize code sequence produced by | |
19396 | bstrins_<mode>_for_ior_mask if possible. | |
19397 | ||
19398 | 2023-09-07 Richard Sandiford <richard.sandiford@arm.com> | |
19399 | ||
19400 | * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary | |
19401 | rather than gen_rtx_PLUS. | |
19402 | ||
19403 | 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19404 | ||
19405 | PR target/111313 | |
19406 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove. | |
19407 | (pass_vsetvl::df_post_optimization): Remove incorrect function. | |
19408 | ||
19409 | 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com> | |
19410 | ||
19411 | * common/config/riscv/riscv-common.cc (riscv_ext_flag_table): | |
19412 | Parse 'XVentanaCondOps' extension. | |
19413 | * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New. | |
19414 | (TARGET_XVENTANACONDOPS): Ditto. | |
19415 | (TARGET_ZICOND_LIKE): New to represent targets with conditional | |
19416 | moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'. | |
19417 | * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND | |
19418 | with TARGET_ZICOND_LIKE. | |
19419 | (riscv_expand_conditional_move): Ditto. | |
19420 | * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with | |
19421 | TARGET_ZICOND_LIKE. | |
19422 | * config/riscv/riscv.opt: Add new riscv_xventana_subext. | |
19423 | * config/riscv/zicond.md: Modify description. | |
19424 | (eqz_ventana): New to match corresponding czero instructions. | |
19425 | (nez_ventana): Ditto. | |
19426 | (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if | |
19427 | 'Zicond' is not available but 'XVentanaCondOps' + RV64 is. | |
19428 | (*czero.<eqz>.<GPR><X>): Ditto. | |
19429 | (*czero.eqz.<GPR><X>.opt1): Ditto. | |
19430 | (*czero.nez.<GPR><X>.opt2): Ditto. | |
19431 | ||
19432 | 2023-09-06 Ian Lance Taylor <iant@golang.org> | |
19433 | ||
19434 | PR go/111310 | |
19435 | * godump.cc (go_format_type): Handle BITINT_TYPE. | |
19436 | ||
19437 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19438 | ||
19439 | PR c/102989 | |
19440 | * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE | |
19441 | like INTEGER_TYPE. | |
19442 | ||
19443 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19444 | ||
19445 | PR c/102989 | |
19446 | * gimple-lower-bitint.cc (bitint_large_huge::if_then_else, | |
19447 | bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge | |
19448 | rather than make_edge, initialize bb->count. | |
19449 | ||
19450 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19451 | ||
19452 | PR c/102989 | |
19453 | * doc/libgcc.texi (Bit-precise integer arithmetic functions): | |
19454 | Document general rules for _BitInt support library functions | |
19455 | and document __mulbitint3 and __divmodbitint4. | |
19456 | (Conversion functions): Document __fix{s,d,x,t}fbitint, | |
19457 | __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and | |
19458 | __bid_floatbitint{s,d,t}d. | |
19459 | ||
19460 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19461 | ||
19462 | PR c/102989 | |
19463 | * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is | |
19464 | predefined. | |
19465 | ||
19466 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19467 | ||
19468 | PR c/102989 | |
19469 | * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and | |
19470 | DO_ERROR arguments. For non-mode precision BITINT_TYPE results | |
19471 | check if all padding bits up to mode precision are zeros or sign | |
19472 | bit copies and if not, jump to DO_ERROR. | |
19473 | (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow): | |
19474 | Adjust expand_ubsan_result_store callers. | |
19475 | * ubsan.cc: Include target.h and langhooks.h. | |
19476 | (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer | |
19477 | size converted to pointer sized integer, pass BITINT_TYPE values | |
19478 | which fit into TImode (if supported) or DImode as those integer types | |
19479 | or otherwise for now punt (pass 0). | |
19480 | (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of | |
19481 | UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a | |
19482 | TImode/DImode precision rather than TK_Unknown used otherwise for | |
19483 | large/huge BITINT_TYPEs. | |
19484 | (instrument_si_overflow): Instrument BITINT_TYPE operations even when | |
19485 | they don't have mode precision. | |
19486 | * ubsan.h (enum ubsan_print_style): New enumerator. | |
19487 | ||
19488 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19489 | ||
19490 | PR c/102989 | |
19491 | * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE. | |
19492 | (ix86_bitint_type_info): New function. | |
19493 | (TARGET_C_BITINT_TYPE_INFO): Redefine. | |
19494 | ||
19495 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19496 | ||
19497 | PR c/102989 | |
19498 | * Makefile.in (OBJS): Add gimple-lower-bitint.o. | |
19499 | * passes.def: Add pass_lower_bitint after pass_lower_complex and | |
19500 | pass_lower_bitint_O0 after pass_lower_complex_O0. | |
19501 | * tree-pass.h (PROP_gimple_lbitint): Define. | |
19502 | (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare. | |
19503 | * gimple-lower-bitint.h: New file. | |
19504 | * tree-ssa-live.h (struct _var_map): Add bitint member. | |
19505 | (init_var_map): Adjust declaration. | |
19506 | (region_contains_p): Handle map->bitint like map->outofssa_p. | |
19507 | * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize | |
19508 | map->bitint and set map->outofssa_p to false if it is non-NULL. | |
19509 | * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h. | |
19510 | (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if | |
19511 | map->bitint. | |
19512 | (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs | |
19513 | not in that bitmap, and allow res without default def. | |
19514 | (compute_optimized_partition_bases): In map->bitint mode try hard to | |
19515 | coalesce any SSA_NAMEs with the same size. | |
19516 | (coalesce_bitint): New function. | |
19517 | (coalesce_ssa_name): In map->bitint mode, or map->bitmap into | |
19518 | used_in_copies and call coalesce_bitint. | |
19519 | * gimple-lower-bitint.cc: New file. | |
19520 | ||
19521 | 2023-09-06 Jakub Jelinek <jakub@redhat.com> | |
19522 | ||
19523 | PR c/102989 | |
19524 | * tree.def (BITINT_TYPE): New type. | |
19525 | * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define. | |
19526 | (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include | |
19527 | BITINT_TYPE. | |
19528 | (BITINT_TYPE_P): Define. | |
19529 | (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if | |
19530 | they have BITINT_TYPE type. | |
19531 | (tree_check6, tree_not_check6): New inline functions. | |
19532 | (any_integral_type_check): Include BITINT_TYPE. | |
19533 | (build_bitint_type): Declare. | |
19534 | * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst, | |
19535 | build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal, | |
19536 | type_hash_canon): Handle BITINT_TYPE. | |
19537 | (bitint_type_cache): New variable. | |
19538 | (build_bitint_type): New function. | |
19539 | (signed_or_unsigned_type_for, verify_type_variant, verify_type): | |
19540 | Handle BITINT_TYPE. | |
19541 | (tree_cc_finalize): Free bitint_type_cache. | |
19542 | * builtins.cc (type_to_class): Handle BITINT_TYPE. | |
19543 | (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE. | |
19544 | * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE | |
19545 | INTEGER_CSTs. | |
19546 | * convert.cc (convert_to_pointer_1, convert_to_real_1, | |
19547 | convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE. | |
19548 | (convert_to_integer_1): Likewise. For BITINT_TYPE don't check | |
19549 | GET_MODE_PRECISION (TYPE_MODE (type)). | |
19550 | * doc/generic.texi (BITINT_TYPE): Document. | |
19551 | * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New. | |
19552 | * doc/tm.texi: Regenerated. | |
19553 | * dwarf2out.cc (base_type_die, is_base_type, modified_type_die, | |
19554 | gen_type_die_with_usage): Handle BITINT_TYPE. | |
19555 | (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or | |
19556 | handle those which fit into shwi. | |
19557 | * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce | |
19558 | to bitfield precision reads from BITINT_TYPE vars, parameters or | |
19559 | memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into | |
19560 | memory. | |
19561 | * fold-const.cc (fold_convert_loc, make_range_step): Handle | |
19562 | BITINT_TYPE. | |
19563 | (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than | |
19564 | GET_MODE_SIZE (SCALAR_INT_TYPE_MODE). | |
19565 | (native_encode_int, native_interpret_int, native_interpret_expr): | |
19566 | Handle BITINT_TYPE. | |
19567 | * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE | |
19568 | to some other integral type or vice versa conversions non-useless. | |
19569 | * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE. | |
19570 | (clear_padding_unit): Mention in comment that _BitInt types don't need | |
19571 | to fit either. | |
19572 | (clear_padding_bitint_needs_padding_p): New function. | |
19573 | (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE. | |
19574 | (clear_padding_type): Likewise. | |
19575 | * internal-fn.cc (expand_mul_overflow): For unsigned non-mode | |
19576 | precision operands force pos_neg? to 1. | |
19577 | (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT, | |
19578 | expand_BITINTTOFLOAT): New functions. | |
19579 | * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT, | |
19580 | BITINTTOFLOAT): New internal functions. | |
19581 | * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT, | |
19582 | expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare. | |
19583 | * match.pd (non-equality compare simplifications from fold_binary): | |
19584 | Punt if TYPE_MODE (arg1_type) is BLKmode. | |
19585 | * pretty-print.h (pp_wide_int): Handle printing of large precision | |
19586 | wide_ints which would buffer overflow digit_buffer. | |
19587 | * stor-layout.cc (finish_bitfield_representative): For bit-fields | |
19588 | with BITINT_TYPE, prefer representatives with precisions in | |
19589 | multiple of limb precision. | |
19590 | (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode | |
19591 | element type and assert it is BITINT_TYPE. | |
19592 | * target.def (bitint_type_info): New C target hook. | |
19593 | * target.h (struct bitint_info): New type. | |
19594 | * targhooks.cc (default_bitint_type_info): New function. | |
19595 | * targhooks.h (default_bitint_type_info): Declare. | |
19596 | * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE. | |
19597 | Handle printing large wide_ints which would buffer overflow | |
19598 | digit_buffer. | |
19599 | * tree-ssa-sccvn.cc: Include target.h. | |
19600 | (eliminate_dom_walker::eliminate_stmt): Punt for large/huge | |
19601 | BITINT_TYPE. | |
19602 | * tree-switch-conversion.cc (jump_table_cluster::emit): For more than | |
19603 | 64-bit BITINT_TYPE subtract low bound from expression and cast to | |
19604 | 64-bit integer type both the controlling expression and case labels. | |
19605 | * typeclass.h (enum type_class): Add bitint_type_class enumerator. | |
19606 | * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs. | |
19607 | * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather | |
19608 | than widest_int. | |
19609 | (simplify_using_ranges::simplify_internal_call_using_ranges): Use | |
19610 | unsigned_type_for rather than build_nonstandard_integer_type. | |
19611 | ||
19612 | 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19613 | ||
19614 | PR target/111296 | |
19615 | * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode | |
19616 | tieable for RVV modes. | |
19617 | ||
19618 | 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19619 | ||
19620 | PR target/111295 | |
19621 | * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix. | |
19622 | ||
19623 | 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
19624 | ||
19625 | * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT | |
19626 | ||
19627 | 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
19628 | ||
19629 | * config/xtensa/xtensa.cc (xtensa_expand_scc): | |
19630 | Add code for particular constants (only 0 and INT_MIN for now) | |
19631 | for EQ/NE boolean evaluation in SImode. | |
19632 | * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its | |
19633 | implementation has been integrated into the above. | |
19634 | ||
19635 | 2023-09-06 Lehua Ding <lehua.ding@rivai.ai> | |
19636 | ||
19637 | PR target/111232 | |
19638 | * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): | |
19639 | Delete. | |
19640 | (*pred_widen_mulsu<mode>): Delete. | |
19641 | (*pred_single_widen_mul<mode>): Delete. | |
19642 | (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>): | |
19643 | Add new combine patterns. | |
19644 | (*single_widen_sub<any_extend:su><mode>): Ditto. | |
19645 | (*single_widen_add<any_extend:su><mode>): Ditto. | |
19646 | (*single_widen_mult<any_extend:su><mode>): Ditto. | |
19647 | (*dual_widen_mulsu<mode>): Ditto. | |
19648 | (*dual_widen_mulus<mode>): Ditto. | |
19649 | (*dual_widen_<optab><mode>): Ditto. | |
19650 | (*single_widen_add<mode>): Ditto. | |
19651 | (*single_widen_sub<mode>): Ditto. | |
19652 | (*single_widen_mult<mode>): Ditto. | |
19653 | * config/riscv/autovec.md (<optab><mode>3): | |
19654 | Change define_expand to define_insn_and_split. | |
19655 | (<optab><mode>2): Ditto. | |
19656 | (abs<mode>2): Ditto. | |
19657 | (smul<mode>3_highpart): Ditto. | |
19658 | (umul<mode>3_highpart): Ditto. | |
19659 | ||
19660 | 2023-09-06 Lehua Ding <lehua.ding@rivai.ai> | |
19661 | ||
19662 | * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos. | |
19663 | (riscv_asm_output_alias): Ditto. | |
19664 | (riscv_asm_output_external): Ditto. | |
19665 | * config/riscv/riscv.cc (riscv_asm_output_variant_cc): | |
19666 | Output .variant_cc directive for vector function. | |
19667 | (riscv_declare_function_name): Ditto. | |
19668 | (riscv_asm_output_alias): Ditto. | |
19669 | (riscv_asm_output_external): Ditto. | |
19670 | * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME): | |
19671 | Implement ASM_DECLARE_FUNCTION_NAME. | |
19672 | (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS. | |
19673 | (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL. | |
19674 | ||
19675 | 2023-09-06 Lehua Ding <lehua.ding@rivai.ai> | |
19676 | ||
19677 | * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc. | |
19678 | * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds. | |
19679 | (riscv_frame_info::reset): Reset new fileds. | |
19680 | (riscv_call_tls_get_addr): Pass riscv_cc. | |
19681 | (riscv_function_arg): Return riscv_cc for call patterm. | |
19682 | (get_riscv_cc): New function return riscv_cc from rtl call_insn. | |
19683 | (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI. | |
19684 | (riscv_save_reg_p): Add vector callee-saved check. | |
19685 | (riscv_stack_align): Add vector save area comment. | |
19686 | (riscv_compute_frame_info): Ditto. | |
19687 | (riscv_restore_reg): Update for type change. | |
19688 | (riscv_for_each_saved_v_reg): New function save vector registers. | |
19689 | (riscv_first_stack_step): Handle funciton with vector callee-saved registers. | |
19690 | (riscv_expand_prologue): Ditto. | |
19691 | (riscv_expand_epilogue): Ditto. | |
19692 | (riscv_output_mi_thunk): Pass riscv_cc. | |
19693 | (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI. | |
19694 | * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function. | |
19695 | * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern. | |
19696 | ||
19697 | 2023-09-06 Lehua Ding <lehua.ding@rivai.ai> | |
19698 | ||
19699 | * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type. | |
19700 | * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto. | |
19701 | * config/riscv/riscv.cc (struct riscv_arg_info): New fields. | |
19702 | (riscv_init_cumulative_args): Setup variant_cc field. | |
19703 | (riscv_vector_type_p): New function for checking vector type. | |
19704 | (riscv_hard_regno_nregs): Hoist declare. | |
19705 | (riscv_get_vector_arg): Subroutine of riscv_get_arg_info. | |
19706 | (riscv_get_arg_info): Support vector cc. | |
19707 | (riscv_function_arg_advance): Update cum. | |
19708 | (riscv_pass_by_reference): Handle vector args. | |
19709 | (riscv_v_abi): New function return vector abi. | |
19710 | (riscv_return_value_is_vector_type_p): New function for check vector arguments. | |
19711 | (riscv_arguments_is_vector_type_p): New function for check vector returns. | |
19712 | (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI. | |
19713 | (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI. | |
19714 | * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi. | |
19715 | (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto. | |
19716 | (MAX_ARGS_IN_MASK_REGISTERS): Ditto. | |
19717 | (V_ARG_FIRST): Ditto. | |
19718 | (V_ARG_LAST): Ditto. | |
19719 | (enum riscv_cc): Define all RISCV_CC variants. | |
19720 | * config/riscv/riscv.opt: Add --param=riscv-vector-abi. | |
19721 | ||
19722 | 2023-09-06 Lehua Ding <lehua.ding@rivai.ai> | |
19723 | ||
19724 | * config/riscv/autovec-opt.md (*cond_<optab><mode>): | |
19725 | Add sqrt + vcond_mask combine pattern. | |
19726 | * config/riscv/autovec.md (<optab><mode>2): | |
19727 | Change define_expand to define_insn_and_split. | |
19728 | ||
19729 | 2023-09-06 Jason Merrill <jason@redhat.com> | |
19730 | ||
19731 | * common.opt: Update -fabi-version=19. | |
19732 | ||
19733 | 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com> | |
19734 | ||
19735 | * config/riscv/zicond.md: Add closing parent to a comment. | |
19736 | ||
19737 | 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com> | |
19738 | ||
19739 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Force | |
19740 | large constant cons/alt into a register. | |
19741 | ||
19742 | 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu> | |
19743 | ||
19744 | * config/riscv/riscv.cc (riscv_build_integer_1): Don't | |
19745 | require one zero bit in the upper 32 bits for LI+RORI synthesis. | |
19746 | ||
19747 | 2023-09-05 Jeff Law <jlaw@ventanamicro.com> | |
19748 | ||
19749 | * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT. | |
19750 | ||
19751 | 2023-09-05 Andrew Pinski <apinski@marvell.com> | |
19752 | ||
19753 | PR tree-optimization/98710 | |
19754 | * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern. | |
19755 | (`x & ~(y | x)`, `x | ~(y & x)`): New patterns. | |
19756 | ||
19757 | 2023-09-05 Andrew Pinski <apinski@marvell.com> | |
19758 | ||
19759 | PR tree-optimization/103536 | |
19760 | * match.pd (`(x | y) & (x & z)`, | |
19761 | `(x & y) | (x | z)`): New patterns. | |
19762 | ||
19763 | 2023-09-05 Andrew Pinski <apinski@marvell.com> | |
19764 | ||
19765 | PR tree-optimization/107137 | |
19766 | * match.pd (`(nop_convert)-(convert)a`): New pattern. | |
19767 | ||
19768 | 2023-09-05 Andrew Pinski <apinski@marvell.com> | |
19769 | ||
19770 | PR tree-optimization/96694 | |
19771 | * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns. | |
19772 | ||
19773 | 2023-09-05 Andrew Pinski <apinski@marvell.com> | |
19774 | ||
19775 | PR tree-optimization/105832 | |
19776 | * match.pd (`(1 >> X) != 0`): New pattern | |
19777 | ||
19778 | 2023-09-05 Edwin Lu <ewlu@rivosinc.com> | |
19779 | ||
19780 | * config/riscv/riscv.md: Update/Add types | |
19781 | ||
19782 | 2023-09-05 Edwin Lu <ewlu@rivosinc.com> | |
19783 | ||
19784 | * config/riscv/pic.md: Update types | |
19785 | ||
19786 | 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu> | |
19787 | ||
19788 | * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant | |
19789 | synthesis with rotate-right for XTheadBb. | |
19790 | ||
19791 | 2023-09-05 Vineet Gupta <vineetg@rivosinc.com> | |
19792 | ||
19793 | * config/riscv/zicond.md: Fix op2 pattern. | |
19794 | ||
19795 | 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com> | |
19796 | ||
19797 | * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup. | |
19798 | ||
19799 | 2023-09-05 Xi Ruoyao <xry111@xry111.site> | |
19800 | ||
19801 | * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS): | |
19802 | Define to 0 if not defined yet. | |
19803 | ||
19804 | 2023-09-05 Kito Cheng <kito.cheng@sifive.com> | |
19805 | ||
19806 | * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ... | |
19807 | * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here. | |
19808 | ||
19809 | 2023-09-05 Pan Li <pan2.li@intel.com> | |
19810 | ||
19811 | * config/riscv/autovec-vls.md (copysign<mode>3): New pattern. | |
19812 | * config/riscv/vector.md: Extend iterator for VLS. | |
19813 | ||
19814 | 2023-09-05 Lulu Cheng <chenglulu@loongson.cn> | |
19815 | ||
19816 | * config.gcc: Export the header file lasxintrin.h. | |
19817 | * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type): | |
19818 | Add Loongson ASX builtin functions support. | |
19819 | (AVAIL_ALL): Ditto. | |
19820 | (LASX_BUILTIN): Ditto. | |
19821 | (LASX_NO_TARGET_BUILTIN): Ditto. | |
19822 | (LASX_BUILTIN_TEST_BRANCH): Ditto. | |
19823 | (CODE_FOR_lasx_xvsadd_b): Ditto. | |
19824 | (CODE_FOR_lasx_xvsadd_h): Ditto. | |
19825 | (CODE_FOR_lasx_xvsadd_w): Ditto. | |
19826 | (CODE_FOR_lasx_xvsadd_d): Ditto. | |
19827 | (CODE_FOR_lasx_xvsadd_bu): Ditto. | |
19828 | (CODE_FOR_lasx_xvsadd_hu): Ditto. | |
19829 | (CODE_FOR_lasx_xvsadd_wu): Ditto. | |
19830 | (CODE_FOR_lasx_xvsadd_du): Ditto. | |
19831 | (CODE_FOR_lasx_xvadd_b): Ditto. | |
19832 | (CODE_FOR_lasx_xvadd_h): Ditto. | |
19833 | (CODE_FOR_lasx_xvadd_w): Ditto. | |
19834 | (CODE_FOR_lasx_xvadd_d): Ditto. | |
19835 | (CODE_FOR_lasx_xvaddi_bu): Ditto. | |
19836 | (CODE_FOR_lasx_xvaddi_hu): Ditto. | |
19837 | (CODE_FOR_lasx_xvaddi_wu): Ditto. | |
19838 | (CODE_FOR_lasx_xvaddi_du): Ditto. | |
19839 | (CODE_FOR_lasx_xvand_v): Ditto. | |
19840 | (CODE_FOR_lasx_xvandi_b): Ditto. | |
19841 | (CODE_FOR_lasx_xvbitsel_v): Ditto. | |
19842 | (CODE_FOR_lasx_xvseqi_b): Ditto. | |
19843 | (CODE_FOR_lasx_xvseqi_h): Ditto. | |
19844 | (CODE_FOR_lasx_xvseqi_w): Ditto. | |
19845 | (CODE_FOR_lasx_xvseqi_d): Ditto. | |
19846 | (CODE_FOR_lasx_xvslti_b): Ditto. | |
19847 | (CODE_FOR_lasx_xvslti_h): Ditto. | |
19848 | (CODE_FOR_lasx_xvslti_w): Ditto. | |
19849 | (CODE_FOR_lasx_xvslti_d): Ditto. | |
19850 | (CODE_FOR_lasx_xvslti_bu): Ditto. | |
19851 | (CODE_FOR_lasx_xvslti_hu): Ditto. | |
19852 | (CODE_FOR_lasx_xvslti_wu): Ditto. | |
19853 | (CODE_FOR_lasx_xvslti_du): Ditto. | |
19854 | (CODE_FOR_lasx_xvslei_b): Ditto. | |
19855 | (CODE_FOR_lasx_xvslei_h): Ditto. | |
19856 | (CODE_FOR_lasx_xvslei_w): Ditto. | |
19857 | (CODE_FOR_lasx_xvslei_d): Ditto. | |
19858 | (CODE_FOR_lasx_xvslei_bu): Ditto. | |
19859 | (CODE_FOR_lasx_xvslei_hu): Ditto. | |
19860 | (CODE_FOR_lasx_xvslei_wu): Ditto. | |
19861 | (CODE_FOR_lasx_xvslei_du): Ditto. | |
19862 | (CODE_FOR_lasx_xvdiv_b): Ditto. | |
19863 | (CODE_FOR_lasx_xvdiv_h): Ditto. | |
19864 | (CODE_FOR_lasx_xvdiv_w): Ditto. | |
19865 | (CODE_FOR_lasx_xvdiv_d): Ditto. | |
19866 | (CODE_FOR_lasx_xvdiv_bu): Ditto. | |
19867 | (CODE_FOR_lasx_xvdiv_hu): Ditto. | |
19868 | (CODE_FOR_lasx_xvdiv_wu): Ditto. | |
19869 | (CODE_FOR_lasx_xvdiv_du): Ditto. | |
19870 | (CODE_FOR_lasx_xvfadd_s): Ditto. | |
19871 | (CODE_FOR_lasx_xvfadd_d): Ditto. | |
19872 | (CODE_FOR_lasx_xvftintrz_w_s): Ditto. | |
19873 | (CODE_FOR_lasx_xvftintrz_l_d): Ditto. | |
19874 | (CODE_FOR_lasx_xvftintrz_wu_s): Ditto. | |
19875 | (CODE_FOR_lasx_xvftintrz_lu_d): Ditto. | |
19876 | (CODE_FOR_lasx_xvffint_s_w): Ditto. | |
19877 | (CODE_FOR_lasx_xvffint_d_l): Ditto. | |
19878 | (CODE_FOR_lasx_xvffint_s_wu): Ditto. | |
19879 | (CODE_FOR_lasx_xvffint_d_lu): Ditto. | |
19880 | (CODE_FOR_lasx_xvfsub_s): Ditto. | |
19881 | (CODE_FOR_lasx_xvfsub_d): Ditto. | |
19882 | (CODE_FOR_lasx_xvfmul_s): Ditto. | |
19883 | (CODE_FOR_lasx_xvfmul_d): Ditto. | |
19884 | (CODE_FOR_lasx_xvfdiv_s): Ditto. | |
19885 | (CODE_FOR_lasx_xvfdiv_d): Ditto. | |
19886 | (CODE_FOR_lasx_xvfmax_s): Ditto. | |
19887 | (CODE_FOR_lasx_xvfmax_d): Ditto. | |
19888 | (CODE_FOR_lasx_xvfmin_s): Ditto. | |
19889 | (CODE_FOR_lasx_xvfmin_d): Ditto. | |
19890 | (CODE_FOR_lasx_xvfsqrt_s): Ditto. | |
19891 | (CODE_FOR_lasx_xvfsqrt_d): Ditto. | |
19892 | (CODE_FOR_lasx_xvflogb_s): Ditto. | |
19893 | (CODE_FOR_lasx_xvflogb_d): Ditto. | |
19894 | (CODE_FOR_lasx_xvmax_b): Ditto. | |
19895 | (CODE_FOR_lasx_xvmax_h): Ditto. | |
19896 | (CODE_FOR_lasx_xvmax_w): Ditto. | |
19897 | (CODE_FOR_lasx_xvmax_d): Ditto. | |
19898 | (CODE_FOR_lasx_xvmaxi_b): Ditto. | |
19899 | (CODE_FOR_lasx_xvmaxi_h): Ditto. | |
19900 | (CODE_FOR_lasx_xvmaxi_w): Ditto. | |
19901 | (CODE_FOR_lasx_xvmaxi_d): Ditto. | |
19902 | (CODE_FOR_lasx_xvmax_bu): Ditto. | |
19903 | (CODE_FOR_lasx_xvmax_hu): Ditto. | |
19904 | (CODE_FOR_lasx_xvmax_wu): Ditto. | |
19905 | (CODE_FOR_lasx_xvmax_du): Ditto. | |
19906 | (CODE_FOR_lasx_xvmaxi_bu): Ditto. | |
19907 | (CODE_FOR_lasx_xvmaxi_hu): Ditto. | |
19908 | (CODE_FOR_lasx_xvmaxi_wu): Ditto. | |
19909 | (CODE_FOR_lasx_xvmaxi_du): Ditto. | |
19910 | (CODE_FOR_lasx_xvmin_b): Ditto. | |
19911 | (CODE_FOR_lasx_xvmin_h): Ditto. | |
19912 | (CODE_FOR_lasx_xvmin_w): Ditto. | |
19913 | (CODE_FOR_lasx_xvmin_d): Ditto. | |
19914 | (CODE_FOR_lasx_xvmini_b): Ditto. | |
19915 | (CODE_FOR_lasx_xvmini_h): Ditto. | |
19916 | (CODE_FOR_lasx_xvmini_w): Ditto. | |
19917 | (CODE_FOR_lasx_xvmini_d): Ditto. | |
19918 | (CODE_FOR_lasx_xvmin_bu): Ditto. | |
19919 | (CODE_FOR_lasx_xvmin_hu): Ditto. | |
19920 | (CODE_FOR_lasx_xvmin_wu): Ditto. | |
19921 | (CODE_FOR_lasx_xvmin_du): Ditto. | |
19922 | (CODE_FOR_lasx_xvmini_bu): Ditto. | |
19923 | (CODE_FOR_lasx_xvmini_hu): Ditto. | |
19924 | (CODE_FOR_lasx_xvmini_wu): Ditto. | |
19925 | (CODE_FOR_lasx_xvmini_du): Ditto. | |
19926 | (CODE_FOR_lasx_xvmod_b): Ditto. | |
19927 | (CODE_FOR_lasx_xvmod_h): Ditto. | |
19928 | (CODE_FOR_lasx_xvmod_w): Ditto. | |
19929 | (CODE_FOR_lasx_xvmod_d): Ditto. | |
19930 | (CODE_FOR_lasx_xvmod_bu): Ditto. | |
19931 | (CODE_FOR_lasx_xvmod_hu): Ditto. | |
19932 | (CODE_FOR_lasx_xvmod_wu): Ditto. | |
19933 | (CODE_FOR_lasx_xvmod_du): Ditto. | |
19934 | (CODE_FOR_lasx_xvmul_b): Ditto. | |
19935 | (CODE_FOR_lasx_xvmul_h): Ditto. | |
19936 | (CODE_FOR_lasx_xvmul_w): Ditto. | |
19937 | (CODE_FOR_lasx_xvmul_d): Ditto. | |
19938 | (CODE_FOR_lasx_xvclz_b): Ditto. | |
19939 | (CODE_FOR_lasx_xvclz_h): Ditto. | |
19940 | (CODE_FOR_lasx_xvclz_w): Ditto. | |
19941 | (CODE_FOR_lasx_xvclz_d): Ditto. | |
19942 | (CODE_FOR_lasx_xvnor_v): Ditto. | |
19943 | (CODE_FOR_lasx_xvor_v): Ditto. | |
19944 | (CODE_FOR_lasx_xvori_b): Ditto. | |
19945 | (CODE_FOR_lasx_xvnori_b): Ditto. | |
19946 | (CODE_FOR_lasx_xvpcnt_b): Ditto. | |
19947 | (CODE_FOR_lasx_xvpcnt_h): Ditto. | |
19948 | (CODE_FOR_lasx_xvpcnt_w): Ditto. | |
19949 | (CODE_FOR_lasx_xvpcnt_d): Ditto. | |
19950 | (CODE_FOR_lasx_xvxor_v): Ditto. | |
19951 | (CODE_FOR_lasx_xvxori_b): Ditto. | |
19952 | (CODE_FOR_lasx_xvsll_b): Ditto. | |
19953 | (CODE_FOR_lasx_xvsll_h): Ditto. | |
19954 | (CODE_FOR_lasx_xvsll_w): Ditto. | |
19955 | (CODE_FOR_lasx_xvsll_d): Ditto. | |
19956 | (CODE_FOR_lasx_xvslli_b): Ditto. | |
19957 | (CODE_FOR_lasx_xvslli_h): Ditto. | |
19958 | (CODE_FOR_lasx_xvslli_w): Ditto. | |
19959 | (CODE_FOR_lasx_xvslli_d): Ditto. | |
19960 | (CODE_FOR_lasx_xvsra_b): Ditto. | |
19961 | (CODE_FOR_lasx_xvsra_h): Ditto. | |
19962 | (CODE_FOR_lasx_xvsra_w): Ditto. | |
19963 | (CODE_FOR_lasx_xvsra_d): Ditto. | |
19964 | (CODE_FOR_lasx_xvsrai_b): Ditto. | |
19965 | (CODE_FOR_lasx_xvsrai_h): Ditto. | |
19966 | (CODE_FOR_lasx_xvsrai_w): Ditto. | |
19967 | (CODE_FOR_lasx_xvsrai_d): Ditto. | |
19968 | (CODE_FOR_lasx_xvsrl_b): Ditto. | |
19969 | (CODE_FOR_lasx_xvsrl_h): Ditto. | |
19970 | (CODE_FOR_lasx_xvsrl_w): Ditto. | |
19971 | (CODE_FOR_lasx_xvsrl_d): Ditto. | |
19972 | (CODE_FOR_lasx_xvsrli_b): Ditto. | |
19973 | (CODE_FOR_lasx_xvsrli_h): Ditto. | |
19974 | (CODE_FOR_lasx_xvsrli_w): Ditto. | |
19975 | (CODE_FOR_lasx_xvsrli_d): Ditto. | |
19976 | (CODE_FOR_lasx_xvsub_b): Ditto. | |
19977 | (CODE_FOR_lasx_xvsub_h): Ditto. | |
19978 | (CODE_FOR_lasx_xvsub_w): Ditto. | |
19979 | (CODE_FOR_lasx_xvsub_d): Ditto. | |
19980 | (CODE_FOR_lasx_xvsubi_bu): Ditto. | |
19981 | (CODE_FOR_lasx_xvsubi_hu): Ditto. | |
19982 | (CODE_FOR_lasx_xvsubi_wu): Ditto. | |
19983 | (CODE_FOR_lasx_xvsubi_du): Ditto. | |
19984 | (CODE_FOR_lasx_xvpackod_d): Ditto. | |
19985 | (CODE_FOR_lasx_xvpackev_d): Ditto. | |
19986 | (CODE_FOR_lasx_xvpickod_d): Ditto. | |
19987 | (CODE_FOR_lasx_xvpickev_d): Ditto. | |
19988 | (CODE_FOR_lasx_xvrepli_b): Ditto. | |
19989 | (CODE_FOR_lasx_xvrepli_h): Ditto. | |
19990 | (CODE_FOR_lasx_xvrepli_w): Ditto. | |
19991 | (CODE_FOR_lasx_xvrepli_d): Ditto. | |
19992 | (CODE_FOR_lasx_xvandn_v): Ditto. | |
19993 | (CODE_FOR_lasx_xvorn_v): Ditto. | |
19994 | (CODE_FOR_lasx_xvneg_b): Ditto. | |
19995 | (CODE_FOR_lasx_xvneg_h): Ditto. | |
19996 | (CODE_FOR_lasx_xvneg_w): Ditto. | |
19997 | (CODE_FOR_lasx_xvneg_d): Ditto. | |
19998 | (CODE_FOR_lasx_xvbsrl_v): Ditto. | |
19999 | (CODE_FOR_lasx_xvbsll_v): Ditto. | |
20000 | (CODE_FOR_lasx_xvfmadd_s): Ditto. | |
20001 | (CODE_FOR_lasx_xvfmadd_d): Ditto. | |
20002 | (CODE_FOR_lasx_xvfmsub_s): Ditto. | |
20003 | (CODE_FOR_lasx_xvfmsub_d): Ditto. | |
20004 | (CODE_FOR_lasx_xvfnmadd_s): Ditto. | |
20005 | (CODE_FOR_lasx_xvfnmadd_d): Ditto. | |
20006 | (CODE_FOR_lasx_xvfnmsub_s): Ditto. | |
20007 | (CODE_FOR_lasx_xvfnmsub_d): Ditto. | |
20008 | (CODE_FOR_lasx_xvpermi_q): Ditto. | |
20009 | (CODE_FOR_lasx_xvpermi_d): Ditto. | |
20010 | (CODE_FOR_lasx_xbnz_v): Ditto. | |
20011 | (CODE_FOR_lasx_xbz_v): Ditto. | |
20012 | (CODE_FOR_lasx_xvssub_b): Ditto. | |
20013 | (CODE_FOR_lasx_xvssub_h): Ditto. | |
20014 | (CODE_FOR_lasx_xvssub_w): Ditto. | |
20015 | (CODE_FOR_lasx_xvssub_d): Ditto. | |
20016 | (CODE_FOR_lasx_xvssub_bu): Ditto. | |
20017 | (CODE_FOR_lasx_xvssub_hu): Ditto. | |
20018 | (CODE_FOR_lasx_xvssub_wu): Ditto. | |
20019 | (CODE_FOR_lasx_xvssub_du): Ditto. | |
20020 | (CODE_FOR_lasx_xvabsd_b): Ditto. | |
20021 | (CODE_FOR_lasx_xvabsd_h): Ditto. | |
20022 | (CODE_FOR_lasx_xvabsd_w): Ditto. | |
20023 | (CODE_FOR_lasx_xvabsd_d): Ditto. | |
20024 | (CODE_FOR_lasx_xvabsd_bu): Ditto. | |
20025 | (CODE_FOR_lasx_xvabsd_hu): Ditto. | |
20026 | (CODE_FOR_lasx_xvabsd_wu): Ditto. | |
20027 | (CODE_FOR_lasx_xvabsd_du): Ditto. | |
20028 | (CODE_FOR_lasx_xvavg_b): Ditto. | |
20029 | (CODE_FOR_lasx_xvavg_h): Ditto. | |
20030 | (CODE_FOR_lasx_xvavg_w): Ditto. | |
20031 | (CODE_FOR_lasx_xvavg_d): Ditto. | |
20032 | (CODE_FOR_lasx_xvavg_bu): Ditto. | |
20033 | (CODE_FOR_lasx_xvavg_hu): Ditto. | |
20034 | (CODE_FOR_lasx_xvavg_wu): Ditto. | |
20035 | (CODE_FOR_lasx_xvavg_du): Ditto. | |
20036 | (CODE_FOR_lasx_xvavgr_b): Ditto. | |
20037 | (CODE_FOR_lasx_xvavgr_h): Ditto. | |
20038 | (CODE_FOR_lasx_xvavgr_w): Ditto. | |
20039 | (CODE_FOR_lasx_xvavgr_d): Ditto. | |
20040 | (CODE_FOR_lasx_xvavgr_bu): Ditto. | |
20041 | (CODE_FOR_lasx_xvavgr_hu): Ditto. | |
20042 | (CODE_FOR_lasx_xvavgr_wu): Ditto. | |
20043 | (CODE_FOR_lasx_xvavgr_du): Ditto. | |
20044 | (CODE_FOR_lasx_xvmuh_b): Ditto. | |
20045 | (CODE_FOR_lasx_xvmuh_h): Ditto. | |
20046 | (CODE_FOR_lasx_xvmuh_w): Ditto. | |
20047 | (CODE_FOR_lasx_xvmuh_d): Ditto. | |
20048 | (CODE_FOR_lasx_xvmuh_bu): Ditto. | |
20049 | (CODE_FOR_lasx_xvmuh_hu): Ditto. | |
20050 | (CODE_FOR_lasx_xvmuh_wu): Ditto. | |
20051 | (CODE_FOR_lasx_xvmuh_du): Ditto. | |
20052 | (CODE_FOR_lasx_xvssran_b_h): Ditto. | |
20053 | (CODE_FOR_lasx_xvssran_h_w): Ditto. | |
20054 | (CODE_FOR_lasx_xvssran_w_d): Ditto. | |
20055 | (CODE_FOR_lasx_xvssran_bu_h): Ditto. | |
20056 | (CODE_FOR_lasx_xvssran_hu_w): Ditto. | |
20057 | (CODE_FOR_lasx_xvssran_wu_d): Ditto. | |
20058 | (CODE_FOR_lasx_xvssrarn_b_h): Ditto. | |
20059 | (CODE_FOR_lasx_xvssrarn_h_w): Ditto. | |
20060 | (CODE_FOR_lasx_xvssrarn_w_d): Ditto. | |
20061 | (CODE_FOR_lasx_xvssrarn_bu_h): Ditto. | |
20062 | (CODE_FOR_lasx_xvssrarn_hu_w): Ditto. | |
20063 | (CODE_FOR_lasx_xvssrarn_wu_d): Ditto. | |
20064 | (CODE_FOR_lasx_xvssrln_bu_h): Ditto. | |
20065 | (CODE_FOR_lasx_xvssrln_hu_w): Ditto. | |
20066 | (CODE_FOR_lasx_xvssrln_wu_d): Ditto. | |
20067 | (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto. | |
20068 | (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto. | |
20069 | (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto. | |
20070 | (CODE_FOR_lasx_xvftint_w_s): Ditto. | |
20071 | (CODE_FOR_lasx_xvftint_l_d): Ditto. | |
20072 | (CODE_FOR_lasx_xvftint_wu_s): Ditto. | |
20073 | (CODE_FOR_lasx_xvftint_lu_d): Ditto. | |
20074 | (CODE_FOR_lasx_xvsllwil_h_b): Ditto. | |
20075 | (CODE_FOR_lasx_xvsllwil_w_h): Ditto. | |
20076 | (CODE_FOR_lasx_xvsllwil_d_w): Ditto. | |
20077 | (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto. | |
20078 | (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto. | |
20079 | (CODE_FOR_lasx_xvsllwil_du_wu): Ditto. | |
20080 | (CODE_FOR_lasx_xvsat_b): Ditto. | |
20081 | (CODE_FOR_lasx_xvsat_h): Ditto. | |
20082 | (CODE_FOR_lasx_xvsat_w): Ditto. | |
20083 | (CODE_FOR_lasx_xvsat_d): Ditto. | |
20084 | (CODE_FOR_lasx_xvsat_bu): Ditto. | |
20085 | (CODE_FOR_lasx_xvsat_hu): Ditto. | |
20086 | (CODE_FOR_lasx_xvsat_wu): Ditto. | |
20087 | (CODE_FOR_lasx_xvsat_du): Ditto. | |
20088 | (loongarch_builtin_vectorized_function): Ditto. | |
20089 | (loongarch_expand_builtin_insn): Ditto. | |
20090 | (loongarch_expand_builtin): Ditto. | |
20091 | * config/loongarch/loongarch-ftypes.def (1): Ditto. | |
20092 | (2): Ditto. | |
20093 | (3): Ditto. | |
20094 | (4): Ditto. | |
20095 | * config/loongarch/lasxintrin.h: New file. | |
20096 | ||
20097 | 2023-09-05 Lulu Cheng <chenglulu@loongson.cn> | |
20098 | ||
20099 | * config/loongarch/loongarch-modes.def | |
20100 | (VECTOR_MODES): Add Loongson ASX instruction support. | |
20101 | * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto. | |
20102 | (loongarch_split_256bit_move_p): Ditto. | |
20103 | (loongarch_expand_vector_group_init): Ditto. | |
20104 | (loongarch_expand_vec_perm_1): Ditto. | |
20105 | * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto. | |
20106 | (loongarch_valid_offset_p): Ditto. | |
20107 | (loongarch_address_insns): Ditto. | |
20108 | (loongarch_const_insns): Ditto. | |
20109 | (loongarch_legitimize_move): Ditto. | |
20110 | (loongarch_builtin_vectorization_cost): Ditto. | |
20111 | (loongarch_split_move_p): Ditto. | |
20112 | (loongarch_split_move): Ditto. | |
20113 | (loongarch_output_move_index_float): Ditto. | |
20114 | (loongarch_split_256bit_move_p): Ditto. | |
20115 | (loongarch_split_256bit_move): Ditto. | |
20116 | (loongarch_output_move): Ditto. | |
20117 | (loongarch_print_operand_reloc): Ditto. | |
20118 | (loongarch_print_operand): Ditto. | |
20119 | (loongarch_hard_regno_mode_ok_uncached): Ditto. | |
20120 | (loongarch_hard_regno_nregs): Ditto. | |
20121 | (loongarch_class_max_nregs): Ditto. | |
20122 | (loongarch_can_change_mode_class): Ditto. | |
20123 | (loongarch_mode_ok_for_mov_fmt_p): Ditto. | |
20124 | (loongarch_vector_mode_supported_p): Ditto. | |
20125 | (loongarch_preferred_simd_mode): Ditto. | |
20126 | (loongarch_autovectorize_vector_modes): Ditto. | |
20127 | (loongarch_lsx_output_division): Ditto. | |
20128 | (loongarch_expand_lsx_shuffle): Ditto. | |
20129 | (loongarch_expand_vec_perm): Ditto. | |
20130 | (loongarch_expand_vec_perm_interleave): Ditto. | |
20131 | (loongarch_try_expand_lsx_vshuf_const): Ditto. | |
20132 | (loongarch_expand_vec_perm_even_odd_1): Ditto. | |
20133 | (loongarch_expand_vec_perm_even_odd): Ditto. | |
20134 | (loongarch_expand_vec_perm_1): Ditto. | |
20135 | (loongarch_expand_vec_perm_const_2): Ditto. | |
20136 | (loongarch_is_quad_duplicate): Ditto. | |
20137 | (loongarch_is_double_duplicate): Ditto. | |
20138 | (loongarch_is_odd_extraction): Ditto. | |
20139 | (loongarch_is_even_extraction): Ditto. | |
20140 | (loongarch_is_extraction_permutation): Ditto. | |
20141 | (loongarch_is_center_extraction): Ditto. | |
20142 | (loongarch_is_reversing_permutation): Ditto. | |
20143 | (loongarch_is_di_misalign_extract): Ditto. | |
20144 | (loongarch_is_si_misalign_extract): Ditto. | |
20145 | (loongarch_is_lasx_lowpart_interleave): Ditto. | |
20146 | (loongarch_is_lasx_lowpart_interleave_2): Ditto. | |
20147 | (COMPARE_SELECTOR): Ditto. | |
20148 | (loongarch_is_lasx_lowpart_extract): Ditto. | |
20149 | (loongarch_is_lasx_highpart_interleave): Ditto. | |
20150 | (loongarch_is_lasx_highpart_interleave_2): Ditto. | |
20151 | (loongarch_is_elem_duplicate): Ditto. | |
20152 | (loongarch_is_op_reverse_perm): Ditto. | |
20153 | (loongarch_is_single_op_perm): Ditto. | |
20154 | (loongarch_is_divisible_perm): Ditto. | |
20155 | (loongarch_is_triple_stride_extract): Ditto. | |
20156 | (loongarch_vectorize_vec_perm_const): Ditto. | |
20157 | (loongarch_cpu_sched_reassociation_width): Ditto. | |
20158 | (loongarch_expand_vector_extract): Ditto. | |
20159 | (emit_reduc_half): Ditto. | |
20160 | (loongarch_expand_vec_unpack): Ditto. | |
20161 | (loongarch_expand_vector_group_init): Ditto. | |
20162 | (loongarch_expand_vector_init): Ditto. | |
20163 | (loongarch_expand_lsx_cmp): Ditto. | |
20164 | (loongarch_builtin_support_vector_misalignment): Ditto. | |
20165 | * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto. | |
20166 | (BITS_PER_LASX_REG): Ditto. | |
20167 | (STRUCTURE_SIZE_BOUNDARY): Ditto. | |
20168 | (LASX_REG_FIRST): Ditto. | |
20169 | (LASX_REG_LAST): Ditto. | |
20170 | (LASX_REG_NUM): Ditto. | |
20171 | (LASX_REG_P): Ditto. | |
20172 | (LASX_REG_RTX_P): Ditto. | |
20173 | (LASX_SUPPORTED_MODE_P): Ditto. | |
20174 | * config/loongarch/loongarch.md: Ditto. | |
20175 | * config/loongarch/lasx.md: New file. | |
20176 | ||
20177 | 2023-09-05 Lulu Cheng <chenglulu@loongson.cn> | |
20178 | ||
20179 | * config.gcc: Export the header file lsxintrin.h. | |
20180 | * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support. | |
20181 | (enum loongarch_builtin_type): Ditto. | |
20182 | (AVAIL_ALL): Ditto. | |
20183 | (LARCH_BUILTIN): Ditto. | |
20184 | (LSX_BUILTIN): Ditto. | |
20185 | (LSX_BUILTIN_TEST_BRANCH): Ditto. | |
20186 | (LSX_NO_TARGET_BUILTIN): Ditto. | |
20187 | (CODE_FOR_lsx_vsadd_b): Ditto. | |
20188 | (CODE_FOR_lsx_vsadd_h): Ditto. | |
20189 | (CODE_FOR_lsx_vsadd_w): Ditto. | |
20190 | (CODE_FOR_lsx_vsadd_d): Ditto. | |
20191 | (CODE_FOR_lsx_vsadd_bu): Ditto. | |
20192 | (CODE_FOR_lsx_vsadd_hu): Ditto. | |
20193 | (CODE_FOR_lsx_vsadd_wu): Ditto. | |
20194 | (CODE_FOR_lsx_vsadd_du): Ditto. | |
20195 | (CODE_FOR_lsx_vadd_b): Ditto. | |
20196 | (CODE_FOR_lsx_vadd_h): Ditto. | |
20197 | (CODE_FOR_lsx_vadd_w): Ditto. | |
20198 | (CODE_FOR_lsx_vadd_d): Ditto. | |
20199 | (CODE_FOR_lsx_vaddi_bu): Ditto. | |
20200 | (CODE_FOR_lsx_vaddi_hu): Ditto. | |
20201 | (CODE_FOR_lsx_vaddi_wu): Ditto. | |
20202 | (CODE_FOR_lsx_vaddi_du): Ditto. | |
20203 | (CODE_FOR_lsx_vand_v): Ditto. | |
20204 | (CODE_FOR_lsx_vandi_b): Ditto. | |
20205 | (CODE_FOR_lsx_bnz_v): Ditto. | |
20206 | (CODE_FOR_lsx_bz_v): Ditto. | |
20207 | (CODE_FOR_lsx_vbitsel_v): Ditto. | |
20208 | (CODE_FOR_lsx_vseqi_b): Ditto. | |
20209 | (CODE_FOR_lsx_vseqi_h): Ditto. | |
20210 | (CODE_FOR_lsx_vseqi_w): Ditto. | |
20211 | (CODE_FOR_lsx_vseqi_d): Ditto. | |
20212 | (CODE_FOR_lsx_vslti_b): Ditto. | |
20213 | (CODE_FOR_lsx_vslti_h): Ditto. | |
20214 | (CODE_FOR_lsx_vslti_w): Ditto. | |
20215 | (CODE_FOR_lsx_vslti_d): Ditto. | |
20216 | (CODE_FOR_lsx_vslti_bu): Ditto. | |
20217 | (CODE_FOR_lsx_vslti_hu): Ditto. | |
20218 | (CODE_FOR_lsx_vslti_wu): Ditto. | |
20219 | (CODE_FOR_lsx_vslti_du): Ditto. | |
20220 | (CODE_FOR_lsx_vslei_b): Ditto. | |
20221 | (CODE_FOR_lsx_vslei_h): Ditto. | |
20222 | (CODE_FOR_lsx_vslei_w): Ditto. | |
20223 | (CODE_FOR_lsx_vslei_d): Ditto. | |
20224 | (CODE_FOR_lsx_vslei_bu): Ditto. | |
20225 | (CODE_FOR_lsx_vslei_hu): Ditto. | |
20226 | (CODE_FOR_lsx_vslei_wu): Ditto. | |
20227 | (CODE_FOR_lsx_vslei_du): Ditto. | |
20228 | (CODE_FOR_lsx_vdiv_b): Ditto. | |
20229 | (CODE_FOR_lsx_vdiv_h): Ditto. | |
20230 | (CODE_FOR_lsx_vdiv_w): Ditto. | |
20231 | (CODE_FOR_lsx_vdiv_d): Ditto. | |
20232 | (CODE_FOR_lsx_vdiv_bu): Ditto. | |
20233 | (CODE_FOR_lsx_vdiv_hu): Ditto. | |
20234 | (CODE_FOR_lsx_vdiv_wu): Ditto. | |
20235 | (CODE_FOR_lsx_vdiv_du): Ditto. | |
20236 | (CODE_FOR_lsx_vfadd_s): Ditto. | |
20237 | (CODE_FOR_lsx_vfadd_d): Ditto. | |
20238 | (CODE_FOR_lsx_vftintrz_w_s): Ditto. | |
20239 | (CODE_FOR_lsx_vftintrz_l_d): Ditto. | |
20240 | (CODE_FOR_lsx_vftintrz_wu_s): Ditto. | |
20241 | (CODE_FOR_lsx_vftintrz_lu_d): Ditto. | |
20242 | (CODE_FOR_lsx_vffint_s_w): Ditto. | |
20243 | (CODE_FOR_lsx_vffint_d_l): Ditto. | |
20244 | (CODE_FOR_lsx_vffint_s_wu): Ditto. | |
20245 | (CODE_FOR_lsx_vffint_d_lu): Ditto. | |
20246 | (CODE_FOR_lsx_vfsub_s): Ditto. | |
20247 | (CODE_FOR_lsx_vfsub_d): Ditto. | |
20248 | (CODE_FOR_lsx_vfmul_s): Ditto. | |
20249 | (CODE_FOR_lsx_vfmul_d): Ditto. | |
20250 | (CODE_FOR_lsx_vfdiv_s): Ditto. | |
20251 | (CODE_FOR_lsx_vfdiv_d): Ditto. | |
20252 | (CODE_FOR_lsx_vfmax_s): Ditto. | |
20253 | (CODE_FOR_lsx_vfmax_d): Ditto. | |
20254 | (CODE_FOR_lsx_vfmin_s): Ditto. | |
20255 | (CODE_FOR_lsx_vfmin_d): Ditto. | |
20256 | (CODE_FOR_lsx_vfsqrt_s): Ditto. | |
20257 | (CODE_FOR_lsx_vfsqrt_d): Ditto. | |
20258 | (CODE_FOR_lsx_vflogb_s): Ditto. | |
20259 | (CODE_FOR_lsx_vflogb_d): Ditto. | |
20260 | (CODE_FOR_lsx_vmax_b): Ditto. | |
20261 | (CODE_FOR_lsx_vmax_h): Ditto. | |
20262 | (CODE_FOR_lsx_vmax_w): Ditto. | |
20263 | (CODE_FOR_lsx_vmax_d): Ditto. | |
20264 | (CODE_FOR_lsx_vmaxi_b): Ditto. | |
20265 | (CODE_FOR_lsx_vmaxi_h): Ditto. | |
20266 | (CODE_FOR_lsx_vmaxi_w): Ditto. | |
20267 | (CODE_FOR_lsx_vmaxi_d): Ditto. | |
20268 | (CODE_FOR_lsx_vmax_bu): Ditto. | |
20269 | (CODE_FOR_lsx_vmax_hu): Ditto. | |
20270 | (CODE_FOR_lsx_vmax_wu): Ditto. | |
20271 | (CODE_FOR_lsx_vmax_du): Ditto. | |
20272 | (CODE_FOR_lsx_vmaxi_bu): Ditto. | |
20273 | (CODE_FOR_lsx_vmaxi_hu): Ditto. | |
20274 | (CODE_FOR_lsx_vmaxi_wu): Ditto. | |
20275 | (CODE_FOR_lsx_vmaxi_du): Ditto. | |
20276 | (CODE_FOR_lsx_vmin_b): Ditto. | |
20277 | (CODE_FOR_lsx_vmin_h): Ditto. | |
20278 | (CODE_FOR_lsx_vmin_w): Ditto. | |
20279 | (CODE_FOR_lsx_vmin_d): Ditto. | |
20280 | (CODE_FOR_lsx_vmini_b): Ditto. | |
20281 | (CODE_FOR_lsx_vmini_h): Ditto. | |
20282 | (CODE_FOR_lsx_vmini_w): Ditto. | |
20283 | (CODE_FOR_lsx_vmini_d): Ditto. | |
20284 | (CODE_FOR_lsx_vmin_bu): Ditto. | |
20285 | (CODE_FOR_lsx_vmin_hu): Ditto. | |
20286 | (CODE_FOR_lsx_vmin_wu): Ditto. | |
20287 | (CODE_FOR_lsx_vmin_du): Ditto. | |
20288 | (CODE_FOR_lsx_vmini_bu): Ditto. | |
20289 | (CODE_FOR_lsx_vmini_hu): Ditto. | |
20290 | (CODE_FOR_lsx_vmini_wu): Ditto. | |
20291 | (CODE_FOR_lsx_vmini_du): Ditto. | |
20292 | (CODE_FOR_lsx_vmod_b): Ditto. | |
20293 | (CODE_FOR_lsx_vmod_h): Ditto. | |
20294 | (CODE_FOR_lsx_vmod_w): Ditto. | |
20295 | (CODE_FOR_lsx_vmod_d): Ditto. | |
20296 | (CODE_FOR_lsx_vmod_bu): Ditto. | |
20297 | (CODE_FOR_lsx_vmod_hu): Ditto. | |
20298 | (CODE_FOR_lsx_vmod_wu): Ditto. | |
20299 | (CODE_FOR_lsx_vmod_du): Ditto. | |
20300 | (CODE_FOR_lsx_vmul_b): Ditto. | |
20301 | (CODE_FOR_lsx_vmul_h): Ditto. | |
20302 | (CODE_FOR_lsx_vmul_w): Ditto. | |
20303 | (CODE_FOR_lsx_vmul_d): Ditto. | |
20304 | (CODE_FOR_lsx_vclz_b): Ditto. | |
20305 | (CODE_FOR_lsx_vclz_h): Ditto. | |
20306 | (CODE_FOR_lsx_vclz_w): Ditto. | |
20307 | (CODE_FOR_lsx_vclz_d): Ditto. | |
20308 | (CODE_FOR_lsx_vnor_v): Ditto. | |
20309 | (CODE_FOR_lsx_vor_v): Ditto. | |
20310 | (CODE_FOR_lsx_vori_b): Ditto. | |
20311 | (CODE_FOR_lsx_vnori_b): Ditto. | |
20312 | (CODE_FOR_lsx_vpcnt_b): Ditto. | |
20313 | (CODE_FOR_lsx_vpcnt_h): Ditto. | |
20314 | (CODE_FOR_lsx_vpcnt_w): Ditto. | |
20315 | (CODE_FOR_lsx_vpcnt_d): Ditto. | |
20316 | (CODE_FOR_lsx_vxor_v): Ditto. | |
20317 | (CODE_FOR_lsx_vxori_b): Ditto. | |
20318 | (CODE_FOR_lsx_vsll_b): Ditto. | |
20319 | (CODE_FOR_lsx_vsll_h): Ditto. | |
20320 | (CODE_FOR_lsx_vsll_w): Ditto. | |
20321 | (CODE_FOR_lsx_vsll_d): Ditto. | |
20322 | (CODE_FOR_lsx_vslli_b): Ditto. | |
20323 | (CODE_FOR_lsx_vslli_h): Ditto. | |
20324 | (CODE_FOR_lsx_vslli_w): Ditto. | |
20325 | (CODE_FOR_lsx_vslli_d): Ditto. | |
20326 | (CODE_FOR_lsx_vsra_b): Ditto. | |
20327 | (CODE_FOR_lsx_vsra_h): Ditto. | |
20328 | (CODE_FOR_lsx_vsra_w): Ditto. | |
20329 | (CODE_FOR_lsx_vsra_d): Ditto. | |
20330 | (CODE_FOR_lsx_vsrai_b): Ditto. | |
20331 | (CODE_FOR_lsx_vsrai_h): Ditto. | |
20332 | (CODE_FOR_lsx_vsrai_w): Ditto. | |
20333 | (CODE_FOR_lsx_vsrai_d): Ditto. | |
20334 | (CODE_FOR_lsx_vsrl_b): Ditto. | |
20335 | (CODE_FOR_lsx_vsrl_h): Ditto. | |
20336 | (CODE_FOR_lsx_vsrl_w): Ditto. | |
20337 | (CODE_FOR_lsx_vsrl_d): Ditto. | |
20338 | (CODE_FOR_lsx_vsrli_b): Ditto. | |
20339 | (CODE_FOR_lsx_vsrli_h): Ditto. | |
20340 | (CODE_FOR_lsx_vsrli_w): Ditto. | |
20341 | (CODE_FOR_lsx_vsrli_d): Ditto. | |
20342 | (CODE_FOR_lsx_vsub_b): Ditto. | |
20343 | (CODE_FOR_lsx_vsub_h): Ditto. | |
20344 | (CODE_FOR_lsx_vsub_w): Ditto. | |
20345 | (CODE_FOR_lsx_vsub_d): Ditto. | |
20346 | (CODE_FOR_lsx_vsubi_bu): Ditto. | |
20347 | (CODE_FOR_lsx_vsubi_hu): Ditto. | |
20348 | (CODE_FOR_lsx_vsubi_wu): Ditto. | |
20349 | (CODE_FOR_lsx_vsubi_du): Ditto. | |
20350 | (CODE_FOR_lsx_vpackod_d): Ditto. | |
20351 | (CODE_FOR_lsx_vpackev_d): Ditto. | |
20352 | (CODE_FOR_lsx_vpickod_d): Ditto. | |
20353 | (CODE_FOR_lsx_vpickev_d): Ditto. | |
20354 | (CODE_FOR_lsx_vrepli_b): Ditto. | |
20355 | (CODE_FOR_lsx_vrepli_h): Ditto. | |
20356 | (CODE_FOR_lsx_vrepli_w): Ditto. | |
20357 | (CODE_FOR_lsx_vrepli_d): Ditto. | |
20358 | (CODE_FOR_lsx_vsat_b): Ditto. | |
20359 | (CODE_FOR_lsx_vsat_h): Ditto. | |
20360 | (CODE_FOR_lsx_vsat_w): Ditto. | |
20361 | (CODE_FOR_lsx_vsat_d): Ditto. | |
20362 | (CODE_FOR_lsx_vsat_bu): Ditto. | |
20363 | (CODE_FOR_lsx_vsat_hu): Ditto. | |
20364 | (CODE_FOR_lsx_vsat_wu): Ditto. | |
20365 | (CODE_FOR_lsx_vsat_du): Ditto. | |
20366 | (CODE_FOR_lsx_vavg_b): Ditto. | |
20367 | (CODE_FOR_lsx_vavg_h): Ditto. | |
20368 | (CODE_FOR_lsx_vavg_w): Ditto. | |
20369 | (CODE_FOR_lsx_vavg_d): Ditto. | |
20370 | (CODE_FOR_lsx_vavg_bu): Ditto. | |
20371 | (CODE_FOR_lsx_vavg_hu): Ditto. | |
20372 | (CODE_FOR_lsx_vavg_wu): Ditto. | |
20373 | (CODE_FOR_lsx_vavg_du): Ditto. | |
20374 | (CODE_FOR_lsx_vavgr_b): Ditto. | |
20375 | (CODE_FOR_lsx_vavgr_h): Ditto. | |
20376 | (CODE_FOR_lsx_vavgr_w): Ditto. | |
20377 | (CODE_FOR_lsx_vavgr_d): Ditto. | |
20378 | (CODE_FOR_lsx_vavgr_bu): Ditto. | |
20379 | (CODE_FOR_lsx_vavgr_hu): Ditto. | |
20380 | (CODE_FOR_lsx_vavgr_wu): Ditto. | |
20381 | (CODE_FOR_lsx_vavgr_du): Ditto. | |
20382 | (CODE_FOR_lsx_vssub_b): Ditto. | |
20383 | (CODE_FOR_lsx_vssub_h): Ditto. | |
20384 | (CODE_FOR_lsx_vssub_w): Ditto. | |
20385 | (CODE_FOR_lsx_vssub_d): Ditto. | |
20386 | (CODE_FOR_lsx_vssub_bu): Ditto. | |
20387 | (CODE_FOR_lsx_vssub_hu): Ditto. | |
20388 | (CODE_FOR_lsx_vssub_wu): Ditto. | |
20389 | (CODE_FOR_lsx_vssub_du): Ditto. | |
20390 | (CODE_FOR_lsx_vabsd_b): Ditto. | |
20391 | (CODE_FOR_lsx_vabsd_h): Ditto. | |
20392 | (CODE_FOR_lsx_vabsd_w): Ditto. | |
20393 | (CODE_FOR_lsx_vabsd_d): Ditto. | |
20394 | (CODE_FOR_lsx_vabsd_bu): Ditto. | |
20395 | (CODE_FOR_lsx_vabsd_hu): Ditto. | |
20396 | (CODE_FOR_lsx_vabsd_wu): Ditto. | |
20397 | (CODE_FOR_lsx_vabsd_du): Ditto. | |
20398 | (CODE_FOR_lsx_vftint_w_s): Ditto. | |
20399 | (CODE_FOR_lsx_vftint_l_d): Ditto. | |
20400 | (CODE_FOR_lsx_vftint_wu_s): Ditto. | |
20401 | (CODE_FOR_lsx_vftint_lu_d): Ditto. | |
20402 | (CODE_FOR_lsx_vandn_v): Ditto. | |
20403 | (CODE_FOR_lsx_vorn_v): Ditto. | |
20404 | (CODE_FOR_lsx_vneg_b): Ditto. | |
20405 | (CODE_FOR_lsx_vneg_h): Ditto. | |
20406 | (CODE_FOR_lsx_vneg_w): Ditto. | |
20407 | (CODE_FOR_lsx_vneg_d): Ditto. | |
20408 | (CODE_FOR_lsx_vshuf4i_d): Ditto. | |
20409 | (CODE_FOR_lsx_vbsrl_v): Ditto. | |
20410 | (CODE_FOR_lsx_vbsll_v): Ditto. | |
20411 | (CODE_FOR_lsx_vfmadd_s): Ditto. | |
20412 | (CODE_FOR_lsx_vfmadd_d): Ditto. | |
20413 | (CODE_FOR_lsx_vfmsub_s): Ditto. | |
20414 | (CODE_FOR_lsx_vfmsub_d): Ditto. | |
20415 | (CODE_FOR_lsx_vfnmadd_s): Ditto. | |
20416 | (CODE_FOR_lsx_vfnmadd_d): Ditto. | |
20417 | (CODE_FOR_lsx_vfnmsub_s): Ditto. | |
20418 | (CODE_FOR_lsx_vfnmsub_d): Ditto. | |
20419 | (CODE_FOR_lsx_vmuh_b): Ditto. | |
20420 | (CODE_FOR_lsx_vmuh_h): Ditto. | |
20421 | (CODE_FOR_lsx_vmuh_w): Ditto. | |
20422 | (CODE_FOR_lsx_vmuh_d): Ditto. | |
20423 | (CODE_FOR_lsx_vmuh_bu): Ditto. | |
20424 | (CODE_FOR_lsx_vmuh_hu): Ditto. | |
20425 | (CODE_FOR_lsx_vmuh_wu): Ditto. | |
20426 | (CODE_FOR_lsx_vmuh_du): Ditto. | |
20427 | (CODE_FOR_lsx_vsllwil_h_b): Ditto. | |
20428 | (CODE_FOR_lsx_vsllwil_w_h): Ditto. | |
20429 | (CODE_FOR_lsx_vsllwil_d_w): Ditto. | |
20430 | (CODE_FOR_lsx_vsllwil_hu_bu): Ditto. | |
20431 | (CODE_FOR_lsx_vsllwil_wu_hu): Ditto. | |
20432 | (CODE_FOR_lsx_vsllwil_du_wu): Ditto. | |
20433 | (CODE_FOR_lsx_vssran_b_h): Ditto. | |
20434 | (CODE_FOR_lsx_vssran_h_w): Ditto. | |
20435 | (CODE_FOR_lsx_vssran_w_d): Ditto. | |
20436 | (CODE_FOR_lsx_vssran_bu_h): Ditto. | |
20437 | (CODE_FOR_lsx_vssran_hu_w): Ditto. | |
20438 | (CODE_FOR_lsx_vssran_wu_d): Ditto. | |
20439 | (CODE_FOR_lsx_vssrarn_b_h): Ditto. | |
20440 | (CODE_FOR_lsx_vssrarn_h_w): Ditto. | |
20441 | (CODE_FOR_lsx_vssrarn_w_d): Ditto. | |
20442 | (CODE_FOR_lsx_vssrarn_bu_h): Ditto. | |
20443 | (CODE_FOR_lsx_vssrarn_hu_w): Ditto. | |
20444 | (CODE_FOR_lsx_vssrarn_wu_d): Ditto. | |
20445 | (CODE_FOR_lsx_vssrln_bu_h): Ditto. | |
20446 | (CODE_FOR_lsx_vssrln_hu_w): Ditto. | |
20447 | (CODE_FOR_lsx_vssrln_wu_d): Ditto. | |
20448 | (CODE_FOR_lsx_vssrlrn_bu_h): Ditto. | |
20449 | (CODE_FOR_lsx_vssrlrn_hu_w): Ditto. | |
20450 | (CODE_FOR_lsx_vssrlrn_wu_d): Ditto. | |
20451 | (loongarch_builtin_vector_type): Ditto. | |
20452 | (loongarch_build_cvpointer_type): Ditto. | |
20453 | (LARCH_ATYPE_CVPOINTER): Ditto. | |
20454 | (LARCH_ATYPE_BOOLEAN): Ditto. | |
20455 | (LARCH_ATYPE_V2SF): Ditto. | |
20456 | (LARCH_ATYPE_V2HI): Ditto. | |
20457 | (LARCH_ATYPE_V2SI): Ditto. | |
20458 | (LARCH_ATYPE_V4QI): Ditto. | |
20459 | (LARCH_ATYPE_V4HI): Ditto. | |
20460 | (LARCH_ATYPE_V8QI): Ditto. | |
20461 | (LARCH_ATYPE_V2DI): Ditto. | |
20462 | (LARCH_ATYPE_V4SI): Ditto. | |
20463 | (LARCH_ATYPE_V8HI): Ditto. | |
20464 | (LARCH_ATYPE_V16QI): Ditto. | |
20465 | (LARCH_ATYPE_V2DF): Ditto. | |
20466 | (LARCH_ATYPE_V4SF): Ditto. | |
20467 | (LARCH_ATYPE_V4DI): Ditto. | |
20468 | (LARCH_ATYPE_V8SI): Ditto. | |
20469 | (LARCH_ATYPE_V16HI): Ditto. | |
20470 | (LARCH_ATYPE_V32QI): Ditto. | |
20471 | (LARCH_ATYPE_V4DF): Ditto. | |
20472 | (LARCH_ATYPE_V8SF): Ditto. | |
20473 | (LARCH_ATYPE_UV2DI): Ditto. | |
20474 | (LARCH_ATYPE_UV4SI): Ditto. | |
20475 | (LARCH_ATYPE_UV8HI): Ditto. | |
20476 | (LARCH_ATYPE_UV16QI): Ditto. | |
20477 | (LARCH_ATYPE_UV4DI): Ditto. | |
20478 | (LARCH_ATYPE_UV8SI): Ditto. | |
20479 | (LARCH_ATYPE_UV16HI): Ditto. | |
20480 | (LARCH_ATYPE_UV32QI): Ditto. | |
20481 | (LARCH_ATYPE_UV2SI): Ditto. | |
20482 | (LARCH_ATYPE_UV4HI): Ditto. | |
20483 | (LARCH_ATYPE_UV8QI): Ditto. | |
20484 | (loongarch_builtin_vectorized_function): Ditto. | |
20485 | (LARCH_GET_BUILTIN): Ditto. | |
20486 | (loongarch_expand_builtin_insn): Ditto. | |
20487 | (loongarch_expand_builtin_lsx_test_branch): Ditto. | |
20488 | (loongarch_expand_builtin): Ditto. | |
20489 | * config/loongarch/loongarch-ftypes.def (1): Ditto. | |
20490 | (2): Ditto. | |
20491 | (3): Ditto. | |
20492 | (4): Ditto. | |
20493 | * config/loongarch/lsxintrin.h: New file. | |
20494 | ||
20495 | 2023-09-05 Lulu Cheng <chenglulu@loongson.cn> | |
20496 | ||
20497 | * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support. | |
20498 | (N): Ditto. | |
20499 | (O): Ditto. | |
20500 | (P): Ditto. | |
20501 | (R): Ditto. | |
20502 | (S): Ditto. | |
20503 | (YG): Ditto. | |
20504 | (YA): Ditto. | |
20505 | (YB): Ditto. | |
20506 | (Yb): Ditto. | |
20507 | (Yh): Ditto. | |
20508 | (Yw): Ditto. | |
20509 | (YI): Ditto. | |
20510 | (YC): Ditto. | |
20511 | (YZ): Ditto. | |
20512 | (Unv5): Ditto. | |
20513 | (Uuv5): Ditto. | |
20514 | (Usv5): Ditto. | |
20515 | (Uuv6): Ditto. | |
20516 | (Urv8): Ditto. | |
20517 | * config/loongarch/genopts/loongarch.opt.in: Ditto. | |
20518 | * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto. | |
20519 | * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto. | |
20520 | (VECTOR_MODE): Ditto. | |
20521 | (INT_MODE): Ditto. | |
20522 | * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto. | |
20523 | (loongarch_split_move_insn): Ditto. | |
20524 | (loongarch_split_128bit_move): Ditto. | |
20525 | (loongarch_split_128bit_move_p): Ditto. | |
20526 | (loongarch_split_lsx_copy_d): Ditto. | |
20527 | (loongarch_split_lsx_insert_d): Ditto. | |
20528 | (loongarch_split_lsx_fill_d): Ditto. | |
20529 | (loongarch_expand_vec_cmp): Ditto. | |
20530 | (loongarch_const_vector_same_val_p): Ditto. | |
20531 | (loongarch_const_vector_same_bytes_p): Ditto. | |
20532 | (loongarch_const_vector_same_int_p): Ditto. | |
20533 | (loongarch_const_vector_shuffle_set_p): Ditto. | |
20534 | (loongarch_const_vector_bitimm_set_p): Ditto. | |
20535 | (loongarch_const_vector_bitimm_clr_p): Ditto. | |
20536 | (loongarch_lsx_vec_parallel_const_half): Ditto. | |
20537 | (loongarch_gen_const_int_vector): Ditto. | |
20538 | (loongarch_lsx_output_division): Ditto. | |
20539 | (loongarch_expand_vector_init): Ditto. | |
20540 | (loongarch_expand_vec_unpack): Ditto. | |
20541 | (loongarch_expand_vec_perm): Ditto. | |
20542 | (loongarch_expand_vector_extract): Ditto. | |
20543 | (loongarch_expand_vector_reduc): Ditto. | |
20544 | (loongarch_ldst_scaled_shift): Ditto. | |
20545 | (loongarch_expand_vec_cond_expr): Ditto. | |
20546 | (loongarch_expand_vec_cond_mask_expr): Ditto. | |
20547 | (loongarch_builtin_vectorized_function): Ditto. | |
20548 | (loongarch_gen_const_int_vector_shuffle): Ditto. | |
20549 | (loongarch_build_signbit_mask): Ditto. | |
20550 | * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto. | |
20551 | (loongarch_setup_incoming_varargs): Ditto. | |
20552 | (loongarch_emit_move): Ditto. | |
20553 | (loongarch_const_vector_bitimm_set_p): Ditto. | |
20554 | (loongarch_const_vector_bitimm_clr_p): Ditto. | |
20555 | (loongarch_const_vector_same_val_p): Ditto. | |
20556 | (loongarch_const_vector_same_bytes_p): Ditto. | |
20557 | (loongarch_const_vector_same_int_p): Ditto. | |
20558 | (loongarch_const_vector_shuffle_set_p): Ditto. | |
20559 | (loongarch_symbol_insns): Ditto. | |
20560 | (loongarch_cannot_force_const_mem): Ditto. | |
20561 | (loongarch_valid_offset_p): Ditto. | |
20562 | (loongarch_valid_index_p): Ditto. | |
20563 | (loongarch_classify_address): Ditto. | |
20564 | (loongarch_address_insns): Ditto. | |
20565 | (loongarch_ldst_scaled_shift): Ditto. | |
20566 | (loongarch_const_insns): Ditto. | |
20567 | (loongarch_split_move_insn_p): Ditto. | |
20568 | (loongarch_subword_at_byte): Ditto. | |
20569 | (loongarch_legitimize_move): Ditto. | |
20570 | (loongarch_builtin_vectorization_cost): Ditto. | |
20571 | (loongarch_split_move_p): Ditto. | |
20572 | (loongarch_split_move): Ditto. | |
20573 | (loongarch_split_move_insn): Ditto. | |
20574 | (loongarch_output_move_index_float): Ditto. | |
20575 | (loongarch_split_128bit_move_p): Ditto. | |
20576 | (loongarch_split_128bit_move): Ditto. | |
20577 | (loongarch_split_lsx_copy_d): Ditto. | |
20578 | (loongarch_split_lsx_insert_d): Ditto. | |
20579 | (loongarch_split_lsx_fill_d): Ditto. | |
20580 | (loongarch_output_move): Ditto. | |
20581 | (loongarch_extend_comparands): Ditto. | |
20582 | (loongarch_print_operand_reloc): Ditto. | |
20583 | (loongarch_print_operand): Ditto. | |
20584 | (loongarch_hard_regno_mode_ok_uncached): Ditto. | |
20585 | (loongarch_hard_regno_call_part_clobbered): Ditto. | |
20586 | (loongarch_hard_regno_nregs): Ditto. | |
20587 | (loongarch_class_max_nregs): Ditto. | |
20588 | (loongarch_can_change_mode_class): Ditto. | |
20589 | (loongarch_mode_ok_for_mov_fmt_p): Ditto. | |
20590 | (loongarch_secondary_reload): Ditto. | |
20591 | (loongarch_vector_mode_supported_p): Ditto. | |
20592 | (loongarch_preferred_simd_mode): Ditto. | |
20593 | (loongarch_autovectorize_vector_modes): Ditto. | |
20594 | (loongarch_lsx_output_division): Ditto. | |
20595 | (loongarch_option_override_internal): Ditto. | |
20596 | (loongarch_hard_regno_caller_save_mode): Ditto. | |
20597 | (MAX_VECT_LEN): Ditto. | |
20598 | (loongarch_spill_class): Ditto. | |
20599 | (struct expand_vec_perm_d): Ditto. | |
20600 | (loongarch_promote_function_mode): Ditto. | |
20601 | (loongarch_expand_vselect): Ditto. | |
20602 | (loongarch_starting_frame_offset): Ditto. | |
20603 | (loongarch_expand_vselect_vconcat): Ditto. | |
20604 | (TARGET_ASM_ALIGNED_DI_OP): Ditto. | |
20605 | (TARGET_OPTION_OVERRIDE): Ditto. | |
20606 | (TARGET_LEGITIMIZE_ADDRESS): Ditto. | |
20607 | (TARGET_ASM_SELECT_RTX_SECTION): Ditto. | |
20608 | (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto. | |
20609 | (loongarch_expand_lsx_shuffle): Ditto. | |
20610 | (TARGET_SCHED_INIT): Ditto. | |
20611 | (TARGET_SCHED_REORDER): Ditto. | |
20612 | (TARGET_SCHED_REORDER2): Ditto. | |
20613 | (TARGET_SCHED_VARIABLE_ISSUE): Ditto. | |
20614 | (TARGET_SCHED_ADJUST_COST): Ditto. | |
20615 | (TARGET_SCHED_ISSUE_RATE): Ditto. | |
20616 | (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto. | |
20617 | (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto. | |
20618 | (TARGET_VALID_POINTER_MODE): Ditto. | |
20619 | (TARGET_REGISTER_MOVE_COST): Ditto. | |
20620 | (TARGET_MEMORY_MOVE_COST): Ditto. | |
20621 | (TARGET_RTX_COSTS): Ditto. | |
20622 | (TARGET_ADDRESS_COST): Ditto. | |
20623 | (TARGET_IN_SMALL_DATA_P): Ditto. | |
20624 | (TARGET_PREFERRED_RELOAD_CLASS): Ditto. | |
20625 | (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto. | |
20626 | (TARGET_EXPAND_BUILTIN_VA_START): Ditto. | |
20627 | (loongarch_expand_vec_perm): Ditto. | |
20628 | (TARGET_PROMOTE_FUNCTION_MODE): Ditto. | |
20629 | (TARGET_RETURN_IN_MEMORY): Ditto. | |
20630 | (TARGET_FUNCTION_VALUE): Ditto. | |
20631 | (TARGET_LIBCALL_VALUE): Ditto. | |
20632 | (loongarch_try_expand_lsx_vshuf_const): Ditto. | |
20633 | (TARGET_ASM_OUTPUT_MI_THUNK): Ditto. | |
20634 | (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto. | |
20635 | (TARGET_PRINT_OPERAND): Ditto. | |
20636 | (TARGET_PRINT_OPERAND_ADDRESS): Ditto. | |
20637 | (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto. | |
20638 | (TARGET_SETUP_INCOMING_VARARGS): Ditto. | |
20639 | (TARGET_STRICT_ARGUMENT_NAMING): Ditto. | |
20640 | (TARGET_MUST_PASS_IN_STACK): Ditto. | |
20641 | (TARGET_PASS_BY_REFERENCE): Ditto. | |
20642 | (TARGET_ARG_PARTIAL_BYTES): Ditto. | |
20643 | (TARGET_FUNCTION_ARG): Ditto. | |
20644 | (TARGET_FUNCTION_ARG_ADVANCE): Ditto. | |
20645 | (TARGET_FUNCTION_ARG_BOUNDARY): Ditto. | |
20646 | (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto. | |
20647 | (TARGET_INIT_BUILTINS): Ditto. | |
20648 | (loongarch_expand_vec_perm_const_1): Ditto. | |
20649 | (loongarch_expand_vec_perm_const_2): Ditto. | |
20650 | (loongarch_vectorize_vec_perm_const): Ditto. | |
20651 | (loongarch_cpu_sched_reassociation_width): Ditto. | |
20652 | (loongarch_sched_reassociation_width): Ditto. | |
20653 | (loongarch_expand_vector_extract): Ditto. | |
20654 | (emit_reduc_half): Ditto. | |
20655 | (loongarch_expand_vector_reduc): Ditto. | |
20656 | (loongarch_expand_vec_unpack): Ditto. | |
20657 | (loongarch_lsx_vec_parallel_const_half): Ditto. | |
20658 | (loongarch_constant_elt_p): Ditto. | |
20659 | (loongarch_gen_const_int_vector_shuffle): Ditto. | |
20660 | (loongarch_expand_vector_init): Ditto. | |
20661 | (loongarch_expand_lsx_cmp): Ditto. | |
20662 | (loongarch_expand_vec_cond_expr): Ditto. | |
20663 | (loongarch_expand_vec_cond_mask_expr): Ditto. | |
20664 | (loongarch_expand_vec_cmp): Ditto. | |
20665 | (loongarch_case_values_threshold): Ditto. | |
20666 | (loongarch_build_const_vector): Ditto. | |
20667 | (loongarch_build_signbit_mask): Ditto. | |
20668 | (loongarch_builtin_support_vector_misalignment): Ditto. | |
20669 | (TARGET_ASM_ALIGNED_HI_OP): Ditto. | |
20670 | (TARGET_ASM_ALIGNED_SI_OP): Ditto. | |
20671 | (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto. | |
20672 | (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto. | |
20673 | (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto. | |
20674 | (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto. | |
20675 | (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto. | |
20676 | (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto. | |
20677 | (TARGET_CASE_VALUES_THRESHOLD): Ditto. | |
20678 | (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto. | |
20679 | (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto. | |
20680 | * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto. | |
20681 | (UNITS_PER_LSX_REG): Ditto. | |
20682 | (BITS_PER_LSX_REG): Ditto. | |
20683 | (BIGGEST_ALIGNMENT): Ditto. | |
20684 | (LSX_REG_FIRST): Ditto. | |
20685 | (LSX_REG_LAST): Ditto. | |
20686 | (LSX_REG_NUM): Ditto. | |
20687 | (LSX_REG_P): Ditto. | |
20688 | (LSX_REG_RTX_P): Ditto. | |
20689 | (IMM13_OPERAND): Ditto. | |
20690 | (LSX_SUPPORTED_MODE_P): Ditto. | |
20691 | * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto. | |
20692 | (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto. | |
20693 | (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto. | |
20694 | (mode" ): Ditto. | |
20695 | (DF): Ditto. | |
20696 | (SF): Ditto. | |
20697 | (sf): Ditto. | |
20698 | (DI): Ditto. | |
20699 | (SI): Ditto. | |
20700 | * config/loongarch/loongarch.opt: Ditto. | |
20701 | * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto. | |
20702 | (const_uimm3_operand): Ditto. | |
20703 | (const_8_to_11_operand): Ditto. | |
20704 | (const_12_to_15_operand): Ditto. | |
20705 | (const_uimm4_operand): Ditto. | |
20706 | (const_uimm6_operand): Ditto. | |
20707 | (const_uimm7_operand): Ditto. | |
20708 | (const_uimm8_operand): Ditto. | |
20709 | (const_imm5_operand): Ditto. | |
20710 | (const_imm10_operand): Ditto. | |
20711 | (const_imm13_operand): Ditto. | |
20712 | (reg_imm10_operand): Ditto. | |
20713 | (aq8b_operand): Ditto. | |
20714 | (aq8h_operand): Ditto. | |
20715 | (aq8w_operand): Ditto. | |
20716 | (aq8d_operand): Ditto. | |
20717 | (aq10b_operand): Ditto. | |
20718 | (aq10h_operand): Ditto. | |
20719 | (aq10w_operand): Ditto. | |
20720 | (aq10d_operand): Ditto. | |
20721 | (aq12b_operand): Ditto. | |
20722 | (aq12h_operand): Ditto. | |
20723 | (aq12w_operand): Ditto. | |
20724 | (aq12d_operand): Ditto. | |
20725 | (const_m1_operand): Ditto. | |
20726 | (reg_or_m1_operand): Ditto. | |
20727 | (const_exp_2_operand): Ditto. | |
20728 | (const_exp_4_operand): Ditto. | |
20729 | (const_exp_8_operand): Ditto. | |
20730 | (const_exp_16_operand): Ditto. | |
20731 | (const_exp_32_operand): Ditto. | |
20732 | (const_0_or_1_operand): Ditto. | |
20733 | (const_0_to_3_operand): Ditto. | |
20734 | (const_0_to_7_operand): Ditto. | |
20735 | (const_2_or_3_operand): Ditto. | |
20736 | (const_4_to_7_operand): Ditto. | |
20737 | (const_8_to_15_operand): Ditto. | |
20738 | (const_16_to_31_operand): Ditto. | |
20739 | (qi_mask_operand): Ditto. | |
20740 | (hi_mask_operand): Ditto. | |
20741 | (si_mask_operand): Ditto. | |
20742 | (d_operand): Ditto. | |
20743 | (db4_operand): Ditto. | |
20744 | (db7_operand): Ditto. | |
20745 | (db8_operand): Ditto. | |
20746 | (ib3_operand): Ditto. | |
20747 | (sb4_operand): Ditto. | |
20748 | (sb5_operand): Ditto. | |
20749 | (sb8_operand): Ditto. | |
20750 | (sd8_operand): Ditto. | |
20751 | (ub4_operand): Ditto. | |
20752 | (ub8_operand): Ditto. | |
20753 | (uh4_operand): Ditto. | |
20754 | (uw4_operand): Ditto. | |
20755 | (uw5_operand): Ditto. | |
20756 | (uw6_operand): Ditto. | |
20757 | (uw8_operand): Ditto. | |
20758 | (addiur2_operand): Ditto. | |
20759 | (addiusp_operand): Ditto. | |
20760 | (andi16_operand): Ditto. | |
20761 | (movep_src_register): Ditto. | |
20762 | (movep_src_operand): Ditto. | |
20763 | (fcc_reload_operand): Ditto. | |
20764 | (muldiv_target_operand): Ditto. | |
20765 | (const_vector_same_val_operand): Ditto. | |
20766 | (const_vector_same_simm5_operand): Ditto. | |
20767 | (const_vector_same_uimm5_operand): Ditto. | |
20768 | (const_vector_same_ximm5_operand): Ditto. | |
20769 | (const_vector_same_uimm6_operand): Ditto. | |
20770 | (par_const_vector_shf_set_operand): Ditto. | |
20771 | (reg_or_vector_same_val_operand): Ditto. | |
20772 | (reg_or_vector_same_simm5_operand): Ditto. | |
20773 | (reg_or_vector_same_uimm5_operand): Ditto. | |
20774 | (reg_or_vector_same_ximm5_operand): Ditto. | |
20775 | (reg_or_vector_same_uimm6_operand): Ditto. | |
20776 | * doc/md.texi: Ditto. | |
20777 | * config/loongarch/lsx.md: New file. | |
20778 | ||
20779 | 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
20780 | ||
20781 | * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global. | |
20782 | (get_all_predecessors): New function. | |
20783 | (get_all_successors): Ditto. | |
20784 | * config/riscv/riscv-v.cc (get_all_predecessors): Ditto. | |
20785 | (get_all_successors): Ditto. | |
20786 | * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global. | |
20787 | * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it. | |
20788 | ||
20789 | 2023-09-05 Claudiu Zissulescu <claziss@gmail.com> | |
20790 | ||
20791 | * config/arc/arc-protos.h (arc_output_addsi): Remove declaration. | |
20792 | (split_addsi): Likewise. | |
20793 | * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S', | |
20794 | 'N', 'x', and 'J' code letters. | |
20795 | (arc_output_addsi): Make it static. | |
20796 | (split_addsi): Remove it. | |
20797 | * config/arc/arc.h (UNSIGNED_INT*): New defines. | |
20798 | (SINNED_INT*): Likewise. | |
20799 | * config/arc/arc.md (type): Add add, sub, bxor types. | |
20800 | (tst_movb): Change code letter from 's' to 'x'. | |
20801 | (andsi3_i): Likewise. | |
20802 | (addsi3_mixed): Refurbish the pattern. | |
20803 | (call_i): Change code letter from 'S' to 'J'. | |
20804 | * config/arc/arc700.md: Add newly introduced types. | |
20805 | * config/arc/arcHS.md: Likewsie. | |
20806 | * config/arc/arcHS4x.md: Likewise. | |
20807 | * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it. | |
20808 | (CM4): Update description. | |
20809 | (CP4, C6u, C6n, CIs, C4p): New constraint. | |
20810 | ||
20811 | 2023-09-05 Claudiu Zissulescu <claziss@gmail.com> | |
20812 | ||
20813 | * common/config/arc/arc-common.cc (arc_option_optimization_table): | |
20814 | Remove mbbit_peephole. | |
20815 | * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove. | |
20816 | (store_direct): Likewise. | |
20817 | (BBIT peephole2): Likewise. | |
20818 | * config/arc/arc.opt (mbbit-peephole): Ignore option. | |
20819 | * doc/invoke.texi (mbbit-peephole): Update document. | |
20820 | ||
20821 | 2023-09-05 Jakub Jelinek <jakub@redhat.com> | |
20822 | ||
20823 | * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo: | |
20824 | avreage -> average. | |
20825 | ||
20826 | 2023-09-05 Yang Yujie <yangyujie@loongson.cn> | |
20827 | ||
20828 | * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized | |
20829 | options passed from driver to gnat1 as explicit for multilib. | |
20830 | ||
20831 | 2023-09-05 Yang Yujie <yangyujie@loongson.cn> | |
20832 | ||
20833 | * config.gcc: add loongarch*-elf target. | |
20834 | * config/loongarch/elf.h: New file. | |
20835 | Link against newlib by default. | |
20836 | ||
20837 | 2023-09-05 Yang Yujie <yangyujie@loongson.cn> | |
20838 | ||
20839 | * config.gcc: use -mstrict-align for building libraries | |
20840 | if --with-strict-align-lib is given. | |
20841 | * doc/install.texi: likewise. | |
20842 | ||
20843 | 2023-09-05 Yang Yujie <yangyujie@loongson.cn> | |
20844 | ||
20845 | * config/loongarch/loongarch-c.cc: Export macros | |
20846 | "__loongarch_{arch,tune}" in the preprocessor. | |
20847 | ||
20848 | 2023-09-05 Yang Yujie <yangyujie@loongson.cn> | |
20849 | ||
20850 | * config.gcc: Make --with-abi= obsolete, decide the default ABI | |
20851 | with target triplet. Allow specifying multilib library build | |
20852 | options with --with-multilib-list and --with-multilib-default. | |
20853 | * config/loongarch/t-linux: Likewise. | |
20854 | * config/loongarch/genopts/loongarch-strings: Likewise. | |
20855 | * config/loongarch/loongarch-str.h: Likewise. | |
20856 | * doc/install.texi: Likewise. | |
20857 | * config/loongarch/genopts/loongarch.opt.in: Introduce | |
20858 | -m[no-]l[a]sx options. Only process -m*-float and | |
20859 | -m[no-]l[a]sx in the GCC driver. | |
20860 | * config/loongarch/loongarch.opt: Likewise. | |
20861 | * config/loongarch/la464.md: Likewise. | |
20862 | * config/loongarch/loongarch-c.cc: Likewise. | |
20863 | * config/loongarch/loongarch-cpu.cc: Likewise. | |
20864 | * config/loongarch/loongarch-cpu.h: Likewise. | |
20865 | * config/loongarch/loongarch-def.c: Likewise. | |
20866 | * config/loongarch/loongarch-def.h: Likewise. | |
20867 | * config/loongarch/loongarch-driver.cc: Likewise. | |
20868 | * config/loongarch/loongarch-driver.h: Likewise. | |
20869 | * config/loongarch/loongarch-opts.cc: Likewise. | |
20870 | * config/loongarch/loongarch-opts.h: Likewise. | |
20871 | * config/loongarch/loongarch.cc: Likewise. | |
20872 | * doc/invoke.texi: Likewise. | |
20873 | ||
20874 | 2023-09-05 liuhongt <hongtao.liu@intel.com> | |
20875 | ||
20876 | * config/i386/sse.md: (V8BFH_128): Renamed to .. | |
20877 | (VHFBF_128): .. this. | |
20878 | (V16BFH_256): Renamed to .. | |
20879 | (VHFBF_256): .. this. | |
20880 | (avx512f_mov<mode>): Extend to V_128. | |
20881 | (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128. | |
20882 | (vcvtneo<bf16_ph>2ps_<mode>): Ditto. | |
20883 | (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256. | |
20884 | (vcvtneo<bf16_ph>2ps_<mode>): Ditto. | |
20885 | * config/i386/i386-expand.cc (expand_vec_perm_blend): | |
20886 | Canonicalize vec_merge. | |
20887 | ||
20888 | 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
20889 | ||
20890 | * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status. | |
20891 | * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto. | |
20892 | (autovectorize_vector_modes): Ditto. | |
20893 | (vectorize_related_mode): Ditto. | |
20894 | ||
20895 | 2023-09-04 Iain Sandoe <iain@sandoe.co.uk> | |
20896 | ||
20897 | * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for | |
20898 | all 32b Darwin PowerPC cases. | |
20899 | ||
20900 | 2023-09-04 Iain Sandoe <iain@sandoe.co.uk> | |
20901 | ||
20902 | * config/darwin-sections.def (static_init_section): Add the | |
20903 | __TEXT,__StaticInit section. | |
20904 | * config/darwin.cc (darwin_function_section): Use the static init | |
20905 | section for global initializers, to match other platform toolchains. | |
20906 | ||
20907 | 2023-09-04 Iain Sandoe <iain@sandoe.co.uk> | |
20908 | ||
20909 | * config/darwin-sections.def (darwin_exception_section): Move to | |
20910 | the __TEXT segment. | |
20911 | * config/darwin.cc (darwin_emit_except_table_label): Align before | |
20912 | the exception table label. | |
20913 | * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC- | |
20914 | relative 4byte relocs. | |
20915 | ||
20916 | 2023-09-04 Iain Sandoe <iain@sandoe.co.uk> | |
20917 | ||
20918 | * config/darwin.cc (dump_machopic_symref_flags): New. | |
20919 | (debug_machopic_symref_flags): New. | |
20920 | ||
20921 | 2023-09-04 Pan Li <pan2.li@intel.com> | |
20922 | ||
20923 | * config/riscv/riscv-vector-builtins-types.def | |
20924 | (vfloat16mf4_t): Add FP16 intrinsic def. | |
20925 | (vfloat16mf2_t): Ditto. | |
20926 | (vfloat16m1_t): Ditto. | |
20927 | (vfloat16m2_t): Ditto. | |
20928 | (vfloat16m4_t): Ditto. | |
20929 | (vfloat16m8_t): Ditto. | |
20930 | ||
20931 | 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com> | |
20932 | ||
20933 | PR tree-optimization/108757 | |
20934 | * match.pd ((X - N * M) / N): New pattern. | |
20935 | ((X + N * M) / N): New pattern. | |
20936 | ((X + C) div_rshift N): New pattern. | |
20937 | ||
20938 | 2023-09-04 Guo Jie <guojie@loongson.cn> | |
20939 | ||
20940 | * config/loongarch/loongarch.md: Support 'G' -> 'k' in | |
20941 | movsf_hardfloat and movdf_hardfloat. | |
20942 | ||
20943 | 2023-09-04 Lulu Cheng <chenglulu@loongson.cn> | |
20944 | ||
20945 | * config/loongarch/loongarch.cc (loongarch_extend_comparands): | |
20946 | In unsigned QImode test, check for sign extended subreg and/or | |
20947 | constant operands, and do a sign extension in that case. | |
20948 | * config/loongarch/loongarch.md (TARGET_64BIT): Define | |
20949 | template cbranchqi4. | |
20950 | ||
20951 | 2023-09-04 Lulu Cheng <chenglulu@loongson.cn> | |
20952 | ||
20953 | * config/loongarch/loongarch.md: Allows fixed-point values to be loaded | |
20954 | from memory into floating-point registers. | |
20955 | ||
20956 | 2023-09-03 Pan Li <pan2.li@intel.com> | |
20957 | ||
20958 | * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for | |
20959 | fmax/fmin | |
20960 | * config/riscv/vector.md: Add VLS modes to vfmax/vfmin. | |
20961 | ||
20962 | 2023-09-02 Mikael Morin <mikael@gcc.gnu.org> | |
20963 | ||
20964 | * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated | |
20965 | pointer before overwriting it. | |
20966 | ||
20967 | 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn> | |
20968 | ||
20969 | * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins): | |
20970 | Associate the __float128 type to float128_type_node so that it can | |
20971 | be recognized by the compiler. | |
20972 | * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins): | |
20973 | Add the flag "FLOAT128_TYPE" to gcc and associate a function | |
20974 | with the suffix "q" to "f128". | |
20975 | * doc/extend.texi:Added support for 128-bit floating-point functions on | |
20976 | the LoongArch architecture. | |
20977 | ||
20978 | 2023-09-01 Jakub Jelinek <jakub@redhat.com> | |
20979 | ||
20980 | PR c++/111069 | |
20981 | * common.opt (fabi-version=): Document version 19. | |
20982 | * doc/invoke.texi (-fabi-version=): Likewise. | |
20983 | ||
20984 | 2023-09-01 Lehua Ding <lehua.ding@rivai.ai> | |
20985 | ||
20986 | * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>): | |
20987 | New combine pattern. | |
20988 | (*cond_<float_cvt><vconvert><mode>): Ditto. | |
20989 | (*cond_<optab><vnconvert><mode>): Ditto. | |
20990 | (*cond_<float_cvt><vnconvert><mode>): Ditto. | |
20991 | (*cond_<optab><mode><vnconvert>): Ditto. | |
20992 | (*cond_<float_cvt><mode><vnconvert>2): Ditto. | |
20993 | * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust. | |
20994 | (<float_cvt><vconvert><mode>2): Adjust. | |
20995 | (<optab><vnconvert><mode>2): Adjust. | |
20996 | (<float_cvt><vnconvert><mode>2): Adjust. | |
20997 | (<optab><mode><vnconvert>2): Adjust. | |
20998 | (<float_cvt><mode><vnconvert>2): Adjust. | |
20999 | * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend. | |
21000 | ||
21001 | 2023-09-01 Lehua Ding <lehua.ding@rivai.ai> | |
21002 | ||
21003 | * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>): | |
21004 | New combine pattern. | |
21005 | (*cond_trunc<mode><v_double_trunc>): Ditto. | |
21006 | * config/riscv/autovec.md: Adjust. | |
21007 | * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend. | |
21008 | ||
21009 | 2023-09-01 Lehua Ding <lehua.ding@rivai.ai> | |
21010 | ||
21011 | * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>): | |
21012 | New combine pattern. | |
21013 | (*cond_<optab><v_quad_trunc><mode>): Ditto. | |
21014 | (*cond_<optab><v_oct_trunc><mode>): Ditto. | |
21015 | (*cond_trunc<mode><v_double_trunc>): Ditto. | |
21016 | * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust. | |
21017 | (<optab><v_oct_trunc><mode>2): Ditto. | |
21018 | ||
21019 | 2023-09-01 Lehua Ding <lehua.ding@rivai.ai> | |
21020 | ||
21021 | * config/riscv/autovec.md: Adjust. | |
21022 | * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto. | |
21023 | (expand_cond_len_binop): Ditto. | |
21024 | * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto. | |
21025 | (expand_cond_len_op): Ditto. | |
21026 | (expand_cond_len_unop): Ditto. | |
21027 | (expand_cond_len_binop): Ditto. | |
21028 | (expand_cond_len_ternop): Ditto. | |
21029 | ||
21030 | 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21031 | ||
21032 | * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable | |
21033 | VECT_COMPARE_COSTS by default. | |
21034 | ||
21035 | 2023-09-01 Robin Dapp <rdapp@ventanamicro.com> | |
21036 | ||
21037 | * config/riscv/autovec.md (vec_extract<mode>qi): New expander. | |
21038 | ||
21039 | 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21040 | ||
21041 | * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add | |
21042 | dynamic enum. | |
21043 | * config/riscv/riscv.opt: Add dynamic compile option. | |
21044 | ||
21045 | 2023-09-01 Pan Li <pan2.li@intel.com> | |
21046 | ||
21047 | * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for | |
21048 | vls floating-point autovec. | |
21049 | * config/riscv/vector-iterators.md: New iterator for | |
21050 | floating-point V and VLS. | |
21051 | * config/riscv/vector.md: Add VLS to floating-point binop. | |
21052 | ||
21053 | 2023-09-01 Andrew Pinski <apinski@marvell.com> | |
21054 | ||
21055 | PR tree-optimization/19832 | |
21056 | * match.pd: Add pattern to optimize | |
21057 | `(a != b) ? a OP b : c`. | |
21058 | ||
21059 | 2023-09-01 Lulu Cheng <chenglulu@loongson.cn> | |
21060 | Guo Jie <guojie@loongson.cn> | |
21061 | ||
21062 | PR target/110484 | |
21063 | * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the | |
21064 | frame_pointer_needed to determine whether to use the $fp register. | |
21065 | ||
21066 | 2023-08-31 Andrew Pinski <apinski@marvell.com> | |
21067 | ||
21068 | PR tree-optimization/110915 | |
21069 | * match.pd (min_value, max_value): Extend to vector constants. | |
21070 | ||
21071 | 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> | |
21072 | ||
21073 | * config.in: Regenerate. | |
21074 | * config/darwin-c.cc: Change spelling to macOS. | |
21075 | * config/darwin-driver.cc: Likewise. | |
21076 | * config/darwin.h: Likewise. | |
21077 | * configure.ac: Likewise. | |
21078 | * doc/contrib.texi: Likewise. | |
21079 | * doc/extend.texi: Likewise. | |
21080 | * doc/invoke.texi: Likewise. | |
21081 | * doc/plugins.texi: Likewise. | |
21082 | * doc/tm.texi: Regenerate. | |
21083 | * doc/tm.texi.in: Change spelling to macOS. | |
21084 | * plugin.cc: Likewise. | |
21085 | ||
21086 | 2023-08-31 Pan Li <pan2.li@intel.com> | |
21087 | ||
21088 | * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc. | |
21089 | * config/riscv/autovec.md: Ditto. | |
21090 | ||
21091 | 2023-08-31 Pan Li <pan2.li@intel.com> | |
21092 | ||
21093 | * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub | |
21094 | * config/riscv/autovec.md: Ditto. | |
21095 | ||
21096 | 2023-08-31 Richard Sandiford <richard.sandiford@arm.com> | |
21097 | ||
21098 | * config/aarch64/aarch64.md (untyped_call): Emit a call_value | |
21099 | rather than a call. List each possible destination register | |
21100 | in the call pattern. | |
21101 | ||
21102 | 2023-08-31 Pan Li <pan2.li@intel.com> | |
21103 | ||
21104 | * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub | |
21105 | * config/riscv/autovec.md: Ditto. | |
21106 | ||
21107 | 2023-08-31 Pan Li <pan2.li@intel.com> | |
21108 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
21109 | ||
21110 | * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc. | |
21111 | * config/riscv/autovec.md: Ditto. | |
21112 | * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA. | |
21113 | ||
21114 | 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com> | |
21115 | ||
21116 | * config/riscv/autovec.md (shifts): Use | |
21117 | vector_scalar_shift_operand. | |
21118 | * config/riscv/predicates.md (vector_scalar_shift_operand): New | |
21119 | predicate. | |
21120 | ||
21121 | 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21122 | ||
21123 | * config.gcc: Add vector cost model framework for RVV. | |
21124 | * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto. | |
21125 | (TARGET_VECTORIZE_CREATE_COSTS): Ditto. | |
21126 | * config/riscv/t-riscv: Ditto. | |
21127 | * config/riscv/riscv-vector-costs.cc: New file. | |
21128 | * config/riscv/riscv-vector-costs.h: New file. | |
21129 | ||
21130 | 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com> | |
21131 | ||
21132 | PR target/110411 | |
21133 | * config/rs6000/mma.md (define_insn_and_split movoo): Disallow | |
21134 | AltiVec address operands. | |
21135 | (define_insn_and_split movxo): Likewise. | |
21136 | * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove | |
21137 | redundant mode size check. | |
21138 | ||
21139 | 2023-08-31 Lehua Ding <lehua.ding@rivai.ai> | |
21140 | ||
21141 | * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here. | |
21142 | * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx): | |
21143 | Change to default policy. | |
21144 | * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy. | |
21145 | * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete. | |
21146 | * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test. | |
21147 | ||
21148 | 2023-08-31 Lehua Ding <lehua.ding@rivai.ai> | |
21149 | ||
21150 | * config/riscv/autovec-opt.md: Adjust. | |
21151 | * config/riscv/autovec-vls.md: Ditto. | |
21152 | * config/riscv/autovec.md: Ditto. | |
21153 | * config/riscv/riscv-protos.h (enum insn_type): Add insn_type. | |
21154 | (enum insn_flags): Add insn flags. | |
21155 | (emit_vlmax_insn): Adjust. | |
21156 | (emit_vlmax_fp_insn): Delete. | |
21157 | (emit_vlmax_ternary_insn): Delete. | |
21158 | (emit_vlmax_fp_ternary_insn): Delete. | |
21159 | (emit_nonvlmax_insn): Adjust. | |
21160 | (emit_vlmax_slide_insn): Delete. | |
21161 | (emit_nonvlmax_slide_tu_insn): Delete. | |
21162 | (emit_vlmax_merge_insn): Delete. | |
21163 | (emit_vlmax_cmp_insn): Delete. | |
21164 | (emit_vlmax_cmp_mu_insn): Delete. | |
21165 | (emit_vlmax_masked_mu_insn): Delete. | |
21166 | (emit_scalar_move_insn): Delete. | |
21167 | (emit_nonvlmax_integer_move_insn): Delete. | |
21168 | (emit_vlmax_insn_lra): Add. | |
21169 | * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New. | |
21170 | (emit_vlmax_insn): Adjust. | |
21171 | (emit_nonvlmax_insn): Adjust. | |
21172 | (emit_vlmax_insn_lra): Add. | |
21173 | (emit_vlmax_fp_insn): Delete. | |
21174 | (emit_vlmax_ternary_insn): Delete. | |
21175 | (emit_vlmax_fp_ternary_insn): Delete. | |
21176 | (emit_vlmax_slide_insn): Delete. | |
21177 | (emit_nonvlmax_slide_tu_insn): Delete. | |
21178 | (emit_nonvlmax_slide_insn): Delete. | |
21179 | (emit_vlmax_merge_insn): Delete. | |
21180 | (emit_vlmax_cmp_insn): Delete. | |
21181 | (emit_vlmax_cmp_mu_insn): Delete. | |
21182 | (emit_vlmax_masked_insn): Delete. | |
21183 | (emit_nonvlmax_masked_insn): Delete. | |
21184 | (emit_vlmax_masked_store_insn): Delete. | |
21185 | (emit_nonvlmax_masked_store_insn): Delete. | |
21186 | (emit_vlmax_masked_mu_insn): Delete. | |
21187 | (emit_vlmax_masked_fp_mu_insn): Delete. | |
21188 | (emit_nonvlmax_tu_insn): Delete. | |
21189 | (emit_nonvlmax_fp_tu_insn): Delete. | |
21190 | (emit_nonvlmax_tumu_insn): Delete. | |
21191 | (emit_nonvlmax_fp_tumu_insn): Delete. | |
21192 | (emit_scalar_move_insn): Delete. | |
21193 | (emit_cpop_insn): Delete. | |
21194 | (emit_vlmax_integer_move_insn): Delete. | |
21195 | (emit_nonvlmax_integer_move_insn): Delete. | |
21196 | (emit_vlmax_gather_insn): Delete. | |
21197 | (emit_vlmax_masked_gather_mu_insn): Delete. | |
21198 | (emit_vlmax_compress_insn): Delete. | |
21199 | (emit_nonvlmax_compress_insn): Delete. | |
21200 | (emit_vlmax_reduction_insn): Delete. | |
21201 | (emit_vlmax_fp_reduction_insn): Delete. | |
21202 | (emit_nonvlmax_fp_reduction_insn): Delete. | |
21203 | (expand_vec_series): Adjust. | |
21204 | (expand_const_vector): Adjust. | |
21205 | (legitimize_move): Adjust. | |
21206 | (sew64_scalar_helper): Adjust. | |
21207 | (expand_tuple_move): Adjust. | |
21208 | (expand_vector_init_insert_elems): Adjust. | |
21209 | (expand_vector_init_merge_repeating_sequence): Adjust. | |
21210 | (expand_vec_cmp): Adjust. | |
21211 | (expand_vec_cmp_float): Adjust. | |
21212 | (expand_vec_perm): Adjust. | |
21213 | (shuffle_merge_patterns): Adjust. | |
21214 | (shuffle_compress_patterns): Adjust. | |
21215 | (shuffle_decompress_patterns): Adjust. | |
21216 | (expand_load_store): Adjust. | |
21217 | (expand_cond_len_op): Adjust. | |
21218 | (expand_cond_len_unop): Adjust. | |
21219 | (expand_cond_len_binop): Adjust. | |
21220 | (expand_gather_scatter): Adjust. | |
21221 | (expand_cond_len_ternop): Adjust. | |
21222 | (expand_reduction): Adjust. | |
21223 | (expand_lanes_load_store): Adjust. | |
21224 | (expand_fold_extract_last): Adjust. | |
21225 | * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust. | |
21226 | * config/riscv/vector.md: Adjust. | |
21227 | ||
21228 | 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org> | |
21229 | ||
21230 | PR target/96762 | |
21231 | * config/rs6000/rs6000-string.cc (expand_block_move): Call vector | |
21232 | load/store with length only on 64-bit Power10. | |
21233 | ||
21234 | 2023-08-31 Claudiu Zissulescu <claziss@gmail.com> | |
21235 | ||
21236 | * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when | |
21237 | SWAP option is enabled. | |
21238 | * config/arc/arc.md (ashlsi2_cnt16): Likewise. | |
21239 | ||
21240 | 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com> | |
21241 | ||
21242 | * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270): | |
21243 | Use common insn for signed and unsigned front-end definitions. | |
21244 | * config/arm/arm_mve_builtins.def | |
21245 | (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common. | |
21246 | (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove. | |
21247 | * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs. | |
21248 | (isu): Likewise. | |
21249 | (rot): Likewise. | |
21250 | (mve_rot): Likewise. | |
21251 | (supf): Likewise. | |
21252 | (VxCADDQ_M): Likewise. | |
21253 | * config/arm/unspecs.md (unspec): Likewise. | |
21254 | * config/arm/mve.md: Fix minor typo. | |
21255 | ||
21256 | 2023-08-31 liuhongt <hongtao.liu@intel.com> | |
21257 | ||
21258 | * config/i386/sse.md (<avx512>_blendm<mode>): Merge | |
21259 | VF_AVX512HFBFVL into VI12HFBF_AVX512VL. | |
21260 | (VF_AVX512HFBF16): Renamed to VHFBF. | |
21261 | (VF_AVX512FP16VL): Renamed to VHF_AVX512VL. | |
21262 | (VF_AVX512FP16): Removed. | |
21263 | (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL. | |
21264 | (avx512fp16_rcp<mode>2<mask_name>): Ditto. | |
21265 | (rsqrt<mode>2): Ditto. | |
21266 | (<sse>_rsqrt<mode>2<mask_name>): Ditto. | |
21267 | (vcond<mode><code>): Ditto. | |
21268 | (vcond<sseintvecmodelower><mode>): Ditto. | |
21269 | (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto. | |
21270 | (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto. | |
21271 | (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto. | |
21272 | (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto. | |
21273 | (cmla<conj_op><mode>4): Ditto. | |
21274 | (fma_<mode>_fadd_fmul): Ditto. | |
21275 | (fma_<mode>_fadd_fcmul): Ditto. | |
21276 | (fma_<complexopname>_<mode>_fma_zero): Ditto. | |
21277 | (fma_<mode>_fmaddc_bcst): Ditto. | |
21278 | (fma_<mode>_fcmaddc_bcst): Ditto. | |
21279 | (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto. | |
21280 | (cmul<conj_op><mode>3): Ditto. | |
21281 | (<avx512>_<complexopname>_<mode><maskc_name><round_name>): | |
21282 | Ditto. | |
21283 | (vec_unpacks_lo_<mode>): Ditto. | |
21284 | (vec_unpacks_hi_<mode>): Ditto. | |
21285 | (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto. | |
21286 | (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto. | |
21287 | (*vec_extract<mode>_0): Ditto. | |
21288 | (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL. | |
21289 | ||
21290 | 2023-08-31 Lehua Ding <lehua.ding@rivai.ai> | |
21291 | ||
21292 | PR target/111234 | |
21293 | * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition. | |
21294 | ||
21295 | 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com> | |
21296 | ||
21297 | * range-op-mixed.h (operator_plus::overflow_free_p): New declare. | |
21298 | (operator_minus::overflow_free_p): New declare. | |
21299 | (operator_mult::overflow_free_p): New declare. | |
21300 | * range-op.cc (range_op_handler::overflow_free_p): New function. | |
21301 | (range_operator::overflow_free_p): New default function. | |
21302 | (operator_plus::overflow_free_p): New function. | |
21303 | (operator_minus::overflow_free_p): New function. | |
21304 | (operator_mult::overflow_free_p): New function. | |
21305 | * range-op.h (range_op_handler::overflow_free_p): New declare. | |
21306 | (range_operator::overflow_free_p): New declare. | |
21307 | * value-range.cc (irange::nonnegative_p): New function. | |
21308 | (irange::nonpositive_p): New function. | |
21309 | * value-range.h (irange::nonnegative_p): New declare. | |
21310 | (irange::nonpositive_p): New declare. | |
21311 | ||
21312 | 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu> | |
21313 | ||
21314 | PR target/106562 | |
21315 | * config/pru/predicates.md (const_0_operand): New predicate. | |
21316 | (pru_cstore_comparison_operator): Ditto. | |
21317 | * config/pru/pru.md (cstore<mode>4): New pattern. | |
21318 | (cstoredi4): Ditto. | |
21319 | ||
21320 | 2023-08-30 Richard Biener <rguenther@suse.de> | |
21321 | ||
21322 | PR tree-optimization/111228 | |
21323 | * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)): | |
21324 | New simplifications. | |
21325 | ||
21326 | 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21327 | ||
21328 | * config/riscv/autovec.md (movmisalign<mode>): Delete. | |
21329 | ||
21330 | 2023-08-30 Die Li <lidie@eswincomputing.com> | |
21331 | Fei Gao <gaofei@eswincomputing.com> | |
21332 | ||
21333 | * config/riscv/peephole.md: New pattern. | |
21334 | * config/riscv/predicates.md (a0a1_reg_operand): New predicate. | |
21335 | (zcmp_mv_sreg_operand): New predicate. | |
21336 | * config/riscv/riscv.md: New predicate. | |
21337 | * config/riscv/zc.md (*mva01s<X:mode>): New pattern. | |
21338 | (*mvsa01<X:mode>): New pattern. | |
21339 | ||
21340 | 2023-08-30 Fei Gao <gaofei@eswincomputing.com> | |
21341 | ||
21342 | * config/riscv/riscv.cc | |
21343 | (riscv_zcmp_can_use_popretz): true if popretz can be used | |
21344 | (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z] | |
21345 | (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue | |
21346 | * config/riscv/riscv.md: define A0_REGNUM | |
21347 | * config/riscv/zc.md | |
21348 | (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra | |
21349 | (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0 | |
21350 | (@gpr_multi_popretz_up_to_s1_<mode>): likewise | |
21351 | (@gpr_multi_popretz_up_to_s2_<mode>): likewise | |
21352 | (@gpr_multi_popretz_up_to_s3_<mode>): likewise | |
21353 | (@gpr_multi_popretz_up_to_s4_<mode>): likewise | |
21354 | (@gpr_multi_popretz_up_to_s5_<mode>): likewise | |
21355 | (@gpr_multi_popretz_up_to_s6_<mode>): likewise | |
21356 | (@gpr_multi_popretz_up_to_s7_<mode>): likewise | |
21357 | (@gpr_multi_popretz_up_to_s8_<mode>): likewise | |
21358 | (@gpr_multi_popretz_up_to_s9_<mode>): likewise | |
21359 | (@gpr_multi_popretz_up_to_s11_<mode>): likewise | |
21360 | ||
21361 | 2023-08-30 Fei Gao <gaofei@eswincomputing.com> | |
21362 | ||
21363 | * config/riscv/iterators.md | |
21364 | (slot0_offset): slot 0 offset in stack GPRs area in bytes | |
21365 | (slot1_offset): slot 1 offset in stack GPRs area in bytes | |
21366 | (slot2_offset): likewise | |
21367 | (slot3_offset): likewise | |
21368 | (slot4_offset): likewise | |
21369 | (slot5_offset): likewise | |
21370 | (slot6_offset): likewise | |
21371 | (slot7_offset): likewise | |
21372 | (slot8_offset): likewise | |
21373 | (slot9_offset): likewise | |
21374 | (slot10_offset): likewise | |
21375 | (slot11_offset): likewise | |
21376 | (slot12_offset): likewise | |
21377 | * config/riscv/predicates.md | |
21378 | (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra | |
21379 | (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0 | |
21380 | (stack_push_up_to_s1_operand): likewise | |
21381 | (stack_push_up_to_s2_operand): likewise | |
21382 | (stack_push_up_to_s3_operand): likewise | |
21383 | (stack_push_up_to_s4_operand): likewise | |
21384 | (stack_push_up_to_s5_operand): likewise | |
21385 | (stack_push_up_to_s6_operand): likewise | |
21386 | (stack_push_up_to_s7_operand): likewise | |
21387 | (stack_push_up_to_s8_operand): likewise | |
21388 | (stack_push_up_to_s9_operand): likewise | |
21389 | (stack_push_up_to_s11_operand): likewise | |
21390 | (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra | |
21391 | (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0 | |
21392 | (stack_pop_up_to_s1_operand): likewise | |
21393 | (stack_pop_up_to_s2_operand): likewise | |
21394 | (stack_pop_up_to_s3_operand): likewise | |
21395 | (stack_pop_up_to_s4_operand): likewise | |
21396 | (stack_pop_up_to_s5_operand): likewise | |
21397 | (stack_pop_up_to_s6_operand): likewise | |
21398 | (stack_pop_up_to_s7_operand): likewise | |
21399 | (stack_pop_up_to_s8_operand): likewise | |
21400 | (stack_pop_up_to_s9_operand): likewise | |
21401 | (stack_pop_up_to_s11_operand): likewise | |
21402 | * config/riscv/riscv-protos.h | |
21403 | (riscv_zcmp_valid_stack_adj_bytes_p):declaration | |
21404 | * config/riscv/riscv.cc (struct riscv_frame_info): comment change | |
21405 | (riscv_avoid_multi_push): helper function of riscv_use_multi_push | |
21406 | (riscv_use_multi_push): true if multi push is used | |
21407 | (riscv_multi_push_sregs_count): num of sregs in multi-push | |
21408 | (riscv_multi_push_regs_count): num of regs in multi-push | |
21409 | (riscv_16bytes_align): align to 16 bytes | |
21410 | (riscv_stack_align): moved to a better place | |
21411 | (riscv_save_libcall_count): no functional change | |
21412 | (riscv_compute_frame_info): add zcmp frame info | |
21413 | (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp | |
21414 | (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push | |
21415 | (riscv_gen_multi_push_pop_insn): gen function for multi push and pop | |
21416 | (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push | |
21417 | (riscv_expand_prologue): allocate stack by cm.push | |
21418 | (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret] | |
21419 | (riscv_expand_epilogue): allocate stack by cm.pop[ret] | |
21420 | (zcmp_base_adj): calculate stack adjustment base size | |
21421 | (zcmp_additional_adj): calculate stack adjustment additional size | |
21422 | (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid | |
21423 | * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra | |
21424 | (S0_MASK): likewise | |
21425 | (S1_MASK): likewise | |
21426 | (S2_MASK): likewise | |
21427 | (S3_MASK): likewise | |
21428 | (S4_MASK): likewise | |
21429 | (S5_MASK): likewise | |
21430 | (S6_MASK): likewise | |
21431 | (S7_MASK): likewise | |
21432 | (S8_MASK): likewise | |
21433 | (S9_MASK): likewise | |
21434 | (S10_MASK): likewise | |
21435 | (S11_MASK): likewise | |
21436 | (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most | |
21437 | (ZCMP_MAX_SPIMM): max spimm value | |
21438 | (ZCMP_SP_INC_STEP): zcmp sp increment step | |
21439 | (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10 | |
21440 | (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11 | |
21441 | (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp | |
21442 | (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11) | |
21443 | * config/riscv/riscv.md: include zc.md | |
21444 | * config/riscv/zc.md: New file. machine description for zcmp | |
21445 | ||
21446 | 2023-08-30 Jakub Jelinek <jakub@redhat.com> | |
21447 | ||
21448 | PR tree-optimization/110914 | |
21449 | * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call | |
21450 | adjust_last_stmt unless len is known constant. | |
21451 | ||
21452 | 2023-08-30 Jakub Jelinek <jakub@redhat.com> | |
21453 | ||
21454 | PR tree-optimization/111015 | |
21455 | * gimple-ssa-store-merging.cc | |
21456 | (imm_store_chain_info::output_merged_store): Use wi::mask and | |
21457 | wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and | |
21458 | build_int_cst to build BIT_AND_EXPR mask. | |
21459 | ||
21460 | 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21461 | ||
21462 | * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant. | |
21463 | (call_may_clobber_ref_p_1): Ditto. | |
21464 | * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto. | |
21465 | (get_alias_ptr_type_for_ptr_address): Ditto. | |
21466 | ||
21467 | 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21468 | ||
21469 | * config/riscv/riscv-vsetvl.cc | |
21470 | (vector_insn_info::get_avl_or_vl_reg): Fix bug. | |
21471 | ||
21472 | 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21473 | ||
21474 | * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern. | |
21475 | * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support | |
21476 | VLS misalign. | |
21477 | ||
21478 | 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
21479 | ||
21480 | * config/riscv/zicond.md: New splitters to rewrite single bit | |
21481 | sign extension as the condition to a czero in the desired form. | |
21482 | ||
21483 | 2023-08-29 David Malcolm <dmalcolm@redhat.com> | |
21484 | ||
21485 | PR analyzer/99860 | |
21486 | * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers. | |
21487 | ||
21488 | 2023-08-29 David Malcolm <dmalcolm@redhat.com> | |
21489 | ||
21490 | PR analyzer/99860 | |
21491 | * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o. | |
21492 | ||
21493 | 2023-08-29 Jin Ma <jinma@linux.alibaba.com> | |
21494 | ||
21495 | * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): | |
21496 | zvfh can generate zfa extended instruction fli.h, just like zfh. | |
21497 | ||
21498 | 2023-08-29 Edwin Lu <ewlu@rivosinc.com> | |
21499 | Vineet Gupta <vineetg@rivosinc.com> | |
21500 | ||
21501 | * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate | |
21502 | __riscv_unaligned_avoid with value 1 or | |
21503 | __riscv_unaligned_slow with value 1 or | |
21504 | __riscv_unaligned_fast with value 1 | |
21505 | * config/riscv/riscv.cc (riscv_option_override): Define | |
21506 | riscv_user_wants_strict_align. Set | |
21507 | riscv_user_wants_strict_align to TARGET_STRICT_ALIGN | |
21508 | * config/riscv/riscv.h: Declare riscv_user_wants_strict_align | |
21509 | ||
21510 | 2023-08-29 Edwin Lu <ewlu@rivosinc.com> | |
21511 | ||
21512 | * config/riscv/autovec-vls.md: Update types | |
21513 | * config/riscv/riscv.md: Add vector placeholder type | |
21514 | * config/riscv/vector.md: Update types | |
21515 | ||
21516 | 2023-08-29 Carl Love <cel@us.ibm.com> | |
21517 | ||
21518 | * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec. | |
21519 | (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn. | |
21520 | * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua, | |
21521 | __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi): | |
21522 | New buit-in definitions. | |
21523 | * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New | |
21524 | overloaded definition. | |
21525 | * doc/extend.texi: Add documentation for __builtin_dfp_quantize. | |
21526 | ||
21527 | 2023-08-29 Pan Li <pan2.li@intel.com> | |
21528 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
21529 | ||
21530 | * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration. | |
21531 | (riscv_legitimize_const_move): Handle ref plus const poly. | |
21532 | ||
21533 | 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com> | |
21534 | ||
21535 | * common/config/riscv/riscv-common.cc | |
21536 | (riscv_implied_info): Add implications from unprivileged extensions. | |
21537 | (riscv_ext_version_table): Add stub support for all unprivileged | |
21538 | extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'. | |
21539 | ||
21540 | 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com> | |
21541 | ||
21542 | * common/config/riscv/riscv-common.cc (riscv_ext_version_table): | |
21543 | Add stub support for all vendor extensions supported by Binutils. | |
21544 | ||
21545 | 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com> | |
21546 | ||
21547 | * common/config/riscv/riscv-common.cc | |
21548 | (riscv_implied_info): Add implications from privileged extensions. | |
21549 | (riscv_ext_version_table): Add stub support for all privileged | |
21550 | extensions supported by Binutils. | |
21551 | ||
21552 | 2023-08-29 Lehua Ding <lehua.ding@rivai.ai> | |
21553 | ||
21554 | * config/riscv/autovec.md: Adjust | |
21555 | * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean. | |
21556 | (get_vlmax_rtx): Exported. | |
21557 | * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted. | |
21558 | (emit_vlmax_masked_gather_mu_insn): Adjust. | |
21559 | (get_vlmax_rtx): New func. | |
21560 | (expand_load_store): Adjust. | |
21561 | (expand_cond_len_unop): Call expand_cond_len_op. | |
21562 | (expand_cond_len_op): New subroutine. | |
21563 | (expand_cond_len_binop): Call expand_cond_len_op. | |
21564 | (expand_cond_len_ternop): Call expand_cond_len_op. | |
21565 | (expand_lanes_load_store): Adjust. | |
21566 | ||
21567 | 2023-08-29 Jakub Jelinek <jakub@redhat.com> | |
21568 | ||
21569 | PR middle-end/79173 | |
21570 | PR middle-end/111209 | |
21571 | * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also | |
21572 | just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored | |
21573 | carry-out on higher limb. Don't match it though if it could be | |
21574 | matched later on 4 argument addition/subtraction. | |
21575 | ||
21576 | 2023-08-29 Andrew Pinski <apinski@marvell.com> | |
21577 | ||
21578 | PR tree-optimization/111147 | |
21579 | * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p | |
21580 | instead of matching bit_not. | |
21581 | ||
21582 | 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org> | |
21583 | ||
21584 | * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing | |
21585 | initializer. | |
21586 | ||
21587 | 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21588 | ||
21589 | * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function. | |
21590 | (pass_vsetvl::compute_local_properties): Fix bug. | |
21591 | (pass_vsetvl::commit_vsetvls): Ditto. | |
21592 | * config/riscv/riscv-vsetvl.h: New function. | |
21593 | ||
21594 | 2023-08-29 Lehua Ding <lehua.ding@rivai.ai> | |
21595 | ||
21596 | PR target/110943 | |
21597 | * config/riscv/predicates.md (vector_const_int_or_double_0_operand): | |
21598 | New predicate. | |
21599 | * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander): | |
21600 | force_reg mem target operand. | |
21601 | * config/riscv/vector.md (@pred_mov<mode>): Wrapper. | |
21602 | (*pred_mov<mode>): Remove imm -> reg pattern. | |
21603 | (*pred_broadcast<mode>_imm): Add imm -> reg pattern. | |
21604 | ||
21605 | 2023-08-29 Lulu Cheng <chenglulu@loongson.cn> | |
21606 | ||
21607 | * common/config/loongarch/loongarch-common.cc: | |
21608 | Enable '-free' on O2 and above. | |
21609 | * doc/invoke.texi: Modify the description information | |
21610 | of the '-free' compilation option and add the LoongArch | |
21611 | description. | |
21612 | ||
21613 | 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com> | |
21614 | ||
21615 | * doc/extend.texi: Fix the description of __builtin_riscv_pause. | |
21616 | ||
21617 | 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com> | |
21618 | ||
21619 | * common/config/riscv/riscv-common.cc (riscv_ext_version_table): | |
21620 | Implement the 'Zihintpause' extension, version 2.0. | |
21621 | (riscv_ext_flag_table) Add 'Zihintpause' handling. | |
21622 | * config/riscv/riscv-builtins.cc: Remove availability predicate | |
21623 | "always" and add "hint_pause". | |
21624 | (riscv_builtins) : Add "pause" extension. | |
21625 | * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New. | |
21626 | * config/riscv/riscv.md (riscv_pause): Adjust output based on | |
21627 | TARGET_ZIHINTPAUSE. | |
21628 | ||
21629 | 2023-08-28 Andrew Pinski <apinski@marvell.com> | |
21630 | ||
21631 | * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p | |
21632 | instead of specifically checking for ~X. | |
21633 | ||
21634 | 2023-08-28 Andrew Pinski <apinski@marvell.com> | |
21635 | ||
21636 | PR tree-optimization/111146 | |
21637 | * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove | |
21638 | redundant pattern. | |
21639 | ||
21640 | 2023-08-28 Andrew Pinski <apinski@marvell.com> | |
21641 | ||
21642 | * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information | |
21643 | when resimplify returns true. | |
21644 | (match_simplify_replacement): Print only if accepted the match-and-simplify | |
21645 | result rather than the full sequence. | |
21646 | ||
21647 | 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21648 | ||
21649 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip | |
21650 | never probability. | |
21651 | (pass_vsetvl::compute_probabilities): Fix unitialized probability. | |
21652 | ||
21653 | 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21654 | ||
21655 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug. | |
21656 | ||
21657 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21658 | ||
21659 | * config/arm/arm-mve-builtins-base.cc (vmullbq_poly) | |
21660 | (vmulltq_poly): New. | |
21661 | * config/arm/arm-mve-builtins-base.def (vmullbq_poly) | |
21662 | (vmulltq_poly): New. | |
21663 | * config/arm/arm-mve-builtins-base.h (vmullbq_poly) | |
21664 | (vmulltq_poly): New. | |
21665 | * config/arm/arm_mve.h (vmulltq_poly): Remove. | |
21666 | (vmullbq_poly): Remove. | |
21667 | (vmullbq_poly_m): Remove. | |
21668 | (vmulltq_poly_m): Remove. | |
21669 | (vmullbq_poly_x): Remove. | |
21670 | (vmulltq_poly_x): Remove. | |
21671 | (vmulltq_poly_p8): Remove. | |
21672 | (vmullbq_poly_p8): Remove. | |
21673 | (vmulltq_poly_p16): Remove. | |
21674 | (vmullbq_poly_p16): Remove. | |
21675 | (vmullbq_poly_m_p8): Remove. | |
21676 | (vmullbq_poly_m_p16): Remove. | |
21677 | (vmulltq_poly_m_p8): Remove. | |
21678 | (vmulltq_poly_m_p16): Remove. | |
21679 | (vmullbq_poly_x_p8): Remove. | |
21680 | (vmullbq_poly_x_p16): Remove. | |
21681 | (vmulltq_poly_x_p8): Remove. | |
21682 | (vmulltq_poly_x_p16): Remove. | |
21683 | (__arm_vmulltq_poly_p8): Remove. | |
21684 | (__arm_vmullbq_poly_p8): Remove. | |
21685 | (__arm_vmulltq_poly_p16): Remove. | |
21686 | (__arm_vmullbq_poly_p16): Remove. | |
21687 | (__arm_vmullbq_poly_m_p8): Remove. | |
21688 | (__arm_vmullbq_poly_m_p16): Remove. | |
21689 | (__arm_vmulltq_poly_m_p8): Remove. | |
21690 | (__arm_vmulltq_poly_m_p16): Remove. | |
21691 | (__arm_vmullbq_poly_x_p8): Remove. | |
21692 | (__arm_vmullbq_poly_x_p16): Remove. | |
21693 | (__arm_vmulltq_poly_x_p8): Remove. | |
21694 | (__arm_vmulltq_poly_x_p16): Remove. | |
21695 | (__arm_vmulltq_poly): Remove. | |
21696 | (__arm_vmullbq_poly): Remove. | |
21697 | (__arm_vmullbq_poly_m): Remove. | |
21698 | (__arm_vmulltq_poly_m): Remove. | |
21699 | (__arm_vmullbq_poly_x): Remove. | |
21700 | (__arm_vmulltq_poly_x): Remove. | |
21701 | ||
21702 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21703 | ||
21704 | * config/arm/arm-mve-builtins-functions.h (class | |
21705 | unspec_mve_function_exact_insn_vmull_poly): New. | |
21706 | ||
21707 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21708 | ||
21709 | * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New. | |
21710 | * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New. | |
21711 | ||
21712 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21713 | ||
21714 | * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add | |
21715 | support for 'U' and 'p' format specifiers. | |
21716 | ||
21717 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21718 | ||
21719 | * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p | |
21720 | field.. | |
21721 | (TYPES_poly_8_16): New. | |
21722 | (poly_8_16): New. | |
21723 | * config/arm/arm-mve-builtins.def (p8): New type suffix. | |
21724 | (p16): Likewise. | |
21725 | * config/arm/arm-mve-builtins.h (enum type_class_index): Add | |
21726 | TYPE_poly. | |
21727 | (struct type_suffix_info): Add poly_p field. | |
21728 | ||
21729 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21730 | ||
21731 | * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int): | |
21732 | New. | |
21733 | * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int): | |
21734 | New. | |
21735 | * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int): | |
21736 | New. | |
21737 | * config/arm/arm_mve.h (vmulltq_int): Remove. | |
21738 | (vmullbq_int): Remove. | |
21739 | (vmullbq_int_m): Remove. | |
21740 | (vmulltq_int_m): Remove. | |
21741 | (vmullbq_int_x): Remove. | |
21742 | (vmulltq_int_x): Remove. | |
21743 | (vmulltq_int_u8): Remove. | |
21744 | (vmullbq_int_u8): Remove. | |
21745 | (vmulltq_int_s8): Remove. | |
21746 | (vmullbq_int_s8): Remove. | |
21747 | (vmulltq_int_u16): Remove. | |
21748 | (vmullbq_int_u16): Remove. | |
21749 | (vmulltq_int_s16): Remove. | |
21750 | (vmullbq_int_s16): Remove. | |
21751 | (vmulltq_int_u32): Remove. | |
21752 | (vmullbq_int_u32): Remove. | |
21753 | (vmulltq_int_s32): Remove. | |
21754 | (vmullbq_int_s32): Remove. | |
21755 | (vmullbq_int_m_s8): Remove. | |
21756 | (vmullbq_int_m_s32): Remove. | |
21757 | (vmullbq_int_m_s16): Remove. | |
21758 | (vmullbq_int_m_u8): Remove. | |
21759 | (vmullbq_int_m_u32): Remove. | |
21760 | (vmullbq_int_m_u16): Remove. | |
21761 | (vmulltq_int_m_s8): Remove. | |
21762 | (vmulltq_int_m_s32): Remove. | |
21763 | (vmulltq_int_m_s16): Remove. | |
21764 | (vmulltq_int_m_u8): Remove. | |
21765 | (vmulltq_int_m_u32): Remove. | |
21766 | (vmulltq_int_m_u16): Remove. | |
21767 | (vmullbq_int_x_s8): Remove. | |
21768 | (vmullbq_int_x_s16): Remove. | |
21769 | (vmullbq_int_x_s32): Remove. | |
21770 | (vmullbq_int_x_u8): Remove. | |
21771 | (vmullbq_int_x_u16): Remove. | |
21772 | (vmullbq_int_x_u32): Remove. | |
21773 | (vmulltq_int_x_s8): Remove. | |
21774 | (vmulltq_int_x_s16): Remove. | |
21775 | (vmulltq_int_x_s32): Remove. | |
21776 | (vmulltq_int_x_u8): Remove. | |
21777 | (vmulltq_int_x_u16): Remove. | |
21778 | (vmulltq_int_x_u32): Remove. | |
21779 | (__arm_vmulltq_int_u8): Remove. | |
21780 | (__arm_vmullbq_int_u8): Remove. | |
21781 | (__arm_vmulltq_int_s8): Remove. | |
21782 | (__arm_vmullbq_int_s8): Remove. | |
21783 | (__arm_vmulltq_int_u16): Remove. | |
21784 | (__arm_vmullbq_int_u16): Remove. | |
21785 | (__arm_vmulltq_int_s16): Remove. | |
21786 | (__arm_vmullbq_int_s16): Remove. | |
21787 | (__arm_vmulltq_int_u32): Remove. | |
21788 | (__arm_vmullbq_int_u32): Remove. | |
21789 | (__arm_vmulltq_int_s32): Remove. | |
21790 | (__arm_vmullbq_int_s32): Remove. | |
21791 | (__arm_vmullbq_int_m_s8): Remove. | |
21792 | (__arm_vmullbq_int_m_s32): Remove. | |
21793 | (__arm_vmullbq_int_m_s16): Remove. | |
21794 | (__arm_vmullbq_int_m_u8): Remove. | |
21795 | (__arm_vmullbq_int_m_u32): Remove. | |
21796 | (__arm_vmullbq_int_m_u16): Remove. | |
21797 | (__arm_vmulltq_int_m_s8): Remove. | |
21798 | (__arm_vmulltq_int_m_s32): Remove. | |
21799 | (__arm_vmulltq_int_m_s16): Remove. | |
21800 | (__arm_vmulltq_int_m_u8): Remove. | |
21801 | (__arm_vmulltq_int_m_u32): Remove. | |
21802 | (__arm_vmulltq_int_m_u16): Remove. | |
21803 | (__arm_vmullbq_int_x_s8): Remove. | |
21804 | (__arm_vmullbq_int_x_s16): Remove. | |
21805 | (__arm_vmullbq_int_x_s32): Remove. | |
21806 | (__arm_vmullbq_int_x_u8): Remove. | |
21807 | (__arm_vmullbq_int_x_u16): Remove. | |
21808 | (__arm_vmullbq_int_x_u32): Remove. | |
21809 | (__arm_vmulltq_int_x_s8): Remove. | |
21810 | (__arm_vmulltq_int_x_s16): Remove. | |
21811 | (__arm_vmulltq_int_x_s32): Remove. | |
21812 | (__arm_vmulltq_int_x_u8): Remove. | |
21813 | (__arm_vmulltq_int_x_u16): Remove. | |
21814 | (__arm_vmulltq_int_x_u32): Remove. | |
21815 | (__arm_vmulltq_int): Remove. | |
21816 | (__arm_vmullbq_int): Remove. | |
21817 | (__arm_vmullbq_int_m): Remove. | |
21818 | (__arm_vmulltq_int_m): Remove. | |
21819 | (__arm_vmullbq_int_x): Remove. | |
21820 | (__arm_vmulltq_int_x): Remove. | |
21821 | ||
21822 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21823 | ||
21824 | * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New. | |
21825 | * config/arm/arm-mve-builtins-shapes.h (binary_widen): New. | |
21826 | ||
21827 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21828 | ||
21829 | * config/arm/arm-mve-builtins-functions.h (class | |
21830 | unspec_mve_function_exact_insn_vmull): New. | |
21831 | ||
21832 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21833 | ||
21834 | * config/arm/iterators.md (mve_insn): Add vmullb, vmullt. | |
21835 | (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S, | |
21836 | VMULLTQ_INT_U. | |
21837 | (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P, | |
21838 | VMULLTQ_POLY_M_P. | |
21839 | (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete. | |
21840 | (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New. | |
21841 | * config/arm/mve.md (mve_vmullbq_int_<supf><mode>) | |
21842 | (mve_vmulltq_int_<supf><mode>): Merge into ... | |
21843 | (@mve_<mve_insn>q_int_<supf><mode>) ... this. | |
21844 | (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ... | |
21845 | (@mve_<mve_insn>q_poly_<supf><mode>): ... this. | |
21846 | (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ... | |
21847 | (@mve_<mve_insn>q_int_m_<supf><mode>): ... this. | |
21848 | (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ... | |
21849 | (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this. | |
21850 | ||
21851 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21852 | ||
21853 | * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): | |
21854 | Remove dead check. | |
21855 | ||
21856 | 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org> | |
21857 | ||
21858 | * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound. | |
21859 | (binary_acca_int64): Likewise. | |
21860 | ||
21861 | 2023-08-28 Aldy Hernandez <aldyh@redhat.com> | |
21862 | ||
21863 | * range-op-float.cc (fold_range): Handle relations. | |
21864 | ||
21865 | 2023-08-28 Lulu Cheng <chenglulu@loongson.cn> | |
21866 | ||
21867 | * config/loongarch/loongarch.cc (loongarch_expand_conditional_move): | |
21868 | Optimize the function implementation. | |
21869 | ||
21870 | 2023-08-28 liuhongt <hongtao.liu@intel.com> | |
21871 | ||
21872 | PR target/111119 | |
21873 | * config/i386/sse.md (V48_AVX2): Rename to .. | |
21874 | (V48_128_256): .. this. | |
21875 | (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF. | |
21876 | (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change | |
21877 | V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for | |
21878 | integral modes when TARGET_AVX2 is not available. | |
21879 | (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto. | |
21880 | (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to | |
21881 | V48_128_256. | |
21882 | (maskstore<mode><sseintvecmodelower>): Ditto. | |
21883 | ||
21884 | 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21885 | ||
21886 | * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p): | |
21887 | New function. | |
21888 | (after_or_same_p): Ditto. | |
21889 | (find_reg_killed_by): Delete. | |
21890 | (has_vsetvl_killed_avl_p): Ditto. | |
21891 | (anticipatable_occurrence_p): Refactor. | |
21892 | (any_set_in_bb_p): Delete. | |
21893 | (count_regno_occurrences): Ditto. | |
21894 | (backward_propagate_worthwhile_p): Ditto. | |
21895 | (demands_can_be_fused_p): Ditto. | |
21896 | (earliest_pred_can_be_fused_p): New function. | |
21897 | (vsetvl_dominated_by_p): Ditto. | |
21898 | (vector_insn_info::parse_insn): Refactor. | |
21899 | (vector_insn_info::merge): Refactor. | |
21900 | (vector_insn_info::dump): Refactor. | |
21901 | (vector_infos_manager::vector_infos_manager): Refactor. | |
21902 | (vector_infos_manager::all_empty_predecessor_p): Delete. | |
21903 | (vector_infos_manager::all_same_avl_p): Ditto. | |
21904 | (vector_infos_manager::create_bitmap_vectors): Refactor. | |
21905 | (vector_infos_manager::free_bitmap_vectors): Refactor. | |
21906 | (vector_infos_manager::dump): Refactor. | |
21907 | (pass_vsetvl::update_block_info): New function. | |
21908 | (enum fusion_type): Ditto. | |
21909 | (pass_vsetvl::get_backward_fusion_type): Delete. | |
21910 | (pass_vsetvl::hard_empty_block_p): Ditto. | |
21911 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
21912 | (pass_vsetvl::forward_demand_fusion): Ditto. | |
21913 | (pass_vsetvl::demand_fusion): Ditto. | |
21914 | (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto. | |
21915 | (pass_vsetvl::compute_local_properties): Ditto. | |
21916 | (pass_vsetvl::earliest_fusion): New function. | |
21917 | (pass_vsetvl::vsetvl_fusion): Ditto. | |
21918 | (pass_vsetvl::commit_vsetvls): Refactor. | |
21919 | (get_first_vsetvl_before_rvv_insns): Ditto. | |
21920 | (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto. | |
21921 | (pass_vsetvl::cleanup_earliest_vsetvls): New function. | |
21922 | (pass_vsetvl::df_post_optimization): Refactor. | |
21923 | (pass_vsetvl::lazy_vsetvl): Ditto. | |
21924 | * config/riscv/riscv-vsetvl.h: Ditto. | |
21925 | ||
21926 | 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
21927 | ||
21928 | * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern. | |
21929 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
21930 | (expand_fold_extract_last): New function. | |
21931 | * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto. | |
21932 | (emit_cpop_insn): Ditto. | |
21933 | (emit_nonvlmax_compress_insn): Ditto. | |
21934 | (expand_fold_extract_last): Ditto. | |
21935 | * config/riscv/vector.md: Fix vcpop.m ratio demand. | |
21936 | ||
21937 | 2023-08-25 Edwin Lu <ewlu@rivosinc.com> | |
21938 | ||
21939 | * config/riscv/sync-rvwmo.md: updated types to "multi" or | |
21940 | "atomic" based on number of assembly lines generated | |
21941 | * config/riscv/sync-ztso.md: likewise | |
21942 | * config/riscv/sync.md: likewise | |
21943 | ||
21944 | 2023-08-25 Jin Ma <jinma@linux.alibaba.com> | |
21945 | ||
21946 | * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on | |
21947 | the F extension. | |
21948 | * config/riscv/constraints.md (zfli): Constrain the floating point number that the | |
21949 | instructions FLI.H/S/D can load. | |
21950 | * config/riscv/iterators.md (ceil): New. | |
21951 | * config/riscv/riscv-opts.h (MASK_ZFA): New. | |
21952 | (TARGET_ZFA): New. | |
21953 | * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New. | |
21954 | * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New. | |
21955 | (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is | |
21956 | not applicable. | |
21957 | (riscv_const_insns): Likewise. | |
21958 | (riscv_legitimize_const_move): Likewise. | |
21959 | (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is | |
21960 | required. | |
21961 | (riscv_split_doubleword_move): Likewise. | |
21962 | (riscv_output_move): Output the mov instructions in zfa extension. | |
21963 | (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate | |
21964 | in assembly. | |
21965 | (riscv_secondary_memory_needed): Likewise. | |
21966 | * config/riscv/riscv.md (fminm<mode>3): New. | |
21967 | (fmaxm<mode>3): New. | |
21968 | (movsidf2_low_rv32): New. | |
21969 | (movsidf2_high_rv32): New. | |
21970 | (movdfsisi3_rv32): New. | |
21971 | (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New. | |
21972 | * config/riscv/riscv.opt: New. | |
21973 | ||
21974 | 2023-08-25 Sandra Loosemore <sandra@codesourcery.com> | |
21975 | ||
21976 | * omp-api.h: New. | |
21977 | * omp-general.cc (omp_runtime_api_procname): New. | |
21978 | (omp_runtime_api_call): Moved here from omp-low.cc, and make | |
21979 | non-static. | |
21980 | * omp-general.h: Include omp-api.h. | |
21981 | * omp-low.cc (omp_runtime_api_call): Delete this copy. | |
21982 | ||
21983 | 2023-08-25 Sandra Loosemore <sandra@codesourcery.com> | |
21984 | ||
21985 | * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK. | |
21986 | * doc/gimple.texi (GIMPLE instruction set): Add | |
21987 | GIMPLE_OMP_STRUCTURED_BLOCK. | |
21988 | (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection. | |
21989 | * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK. | |
21990 | * gimple-pretty-print.cc (dump_gimple_omp_block): Handle | |
21991 | GIMPLE_OMP_STRUCTURED_BLOCK. | |
21992 | (pp_gimple_stmt_1): Likewise. | |
21993 | * gimple-walk.cc (walk_gimple_stmt): Likewise. | |
21994 | * gimple.cc (gimple_build_omp_structured_block): New. | |
21995 | * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New. | |
21996 | * gimple.h (gimple_build_omp_structured_block): Declare. | |
21997 | (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK. | |
21998 | (CASE_GIMPLE_OMP): Likewise. | |
21999 | * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK. | |
22000 | (gimplify_expr): Likewise. | |
22001 | * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on | |
22002 | GIMPLE_OMP_STRUCTURED_BLOCK. | |
22003 | * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK. | |
22004 | (lower_omp_1): Likewise. | |
22005 | (diagnose_sb_1): Likewise. | |
22006 | (diagnose_sb_2): Likewise. | |
22007 | * tree-inline.cc (remap_gimple_stmt): Handle | |
22008 | GIMPLE_OMP_STRUCTURED_BLOCK. | |
22009 | (estimate_num_insns): Likewise. | |
22010 | * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise. | |
22011 | (convert_local_reference_stmt): Likewise. | |
22012 | (convert_gimple_call): Likewise. | |
22013 | * tree-pretty-print.cc (dump_generic_node): Handle | |
22014 | OMP_STRUCTURED_BLOCK. | |
22015 | * tree.def (OMP_STRUCTURED_BLOCK): New. | |
22016 | * tree.h (OMP_STRUCTURED_BLOCK_BODY): New. | |
22017 | ||
22018 | 2023-08-25 Vineet Gupta <vineetg@rivosinc.com> | |
22019 | ||
22020 | * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int | |
22021 | cost. Add some comments about different constants handling. | |
22022 | ||
22023 | 2023-08-25 Andrew Pinski <apinski@marvell.com> | |
22024 | ||
22025 | * match.pd (`a ? one_zero : one_zero`): Move | |
22026 | below detection of minmax. | |
22027 | ||
22028 | 2023-08-25 Andrew Pinski <apinski@marvell.com> | |
22029 | ||
22030 | * match.pd (`a | C -> C`): New pattern. | |
22031 | ||
22032 | 2023-08-25 Uros Bizjak <ubizjak@gmail.com> | |
22033 | ||
22034 | * caller-save.cc (new_saved_hard_reg): | |
22035 | Rename TRUE/FALSE to true/false. | |
22036 | (setup_save_areas): Ditto. | |
22037 | * gcc.cc (set_collect_gcc_options): Ditto. | |
22038 | (driver::build_multilib_strings): Ditto. | |
22039 | (print_multilib_info): Ditto. | |
22040 | * genautomata.cc (gen_cpu_unit): Ditto. | |
22041 | (gen_query_cpu_unit): Ditto. | |
22042 | (gen_bypass): Ditto. | |
22043 | (gen_excl_set): Ditto. | |
22044 | (gen_presence_absence_set): Ditto. | |
22045 | (gen_presence_set): Ditto. | |
22046 | (gen_final_presence_set): Ditto. | |
22047 | (gen_absence_set): Ditto. | |
22048 | (gen_final_absence_set): Ditto. | |
22049 | (gen_automaton): Ditto. | |
22050 | (gen_regexp_repeat): Ditto. | |
22051 | (gen_regexp_allof): Ditto. | |
22052 | (gen_regexp_oneof): Ditto. | |
22053 | (gen_regexp_sequence): Ditto. | |
22054 | (process_decls): Ditto. | |
22055 | (reserv_sets_are_intersected): Ditto. | |
22056 | (initiate_excl_sets): Ditto. | |
22057 | (form_reserv_sets_list): Ditto. | |
22058 | (check_presence_pattern_sets): Ditto. | |
22059 | (check_absence_pattern_sets): Ditto. | |
22060 | (check_regexp_units_distribution): Ditto. | |
22061 | (check_unit_distributions_to_automata): Ditto. | |
22062 | (create_ainsns): Ditto. | |
22063 | (output_insn_code_cases): Ditto. | |
22064 | (output_internal_dead_lock_func): Ditto. | |
22065 | (form_important_insn_automata_lists): Ditto. | |
22066 | * gengtype-state.cc (read_state_files_list): Ditto. | |
22067 | * gengtype.cc (main): Ditto. | |
22068 | * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds): | |
22069 | Ditto. | |
22070 | * gimple.cc (gimple_build_call_from_tree): Ditto. | |
22071 | (preprocess_case_label_vec_for_gimple): Ditto. | |
22072 | * gimplify.cc (gimplify_call_expr): Ditto. | |
22073 | * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto. | |
22074 | ||
22075 | 2023-08-25 Richard Biener <rguenther@suse.de> | |
22076 | ||
22077 | PR tree-optimization/111137 | |
22078 | * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences): | |
22079 | Properly handle grouped stores from other SLP instances. | |
22080 | ||
22081 | 2023-08-25 Richard Biener <rguenther@suse.de> | |
22082 | ||
22083 | * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences): | |
22084 | Split out from vect_slp_analyze_node_dependences, remove | |
22085 | dead code. | |
22086 | (vect_slp_analyze_load_dependences): Split out from | |
22087 | vect_slp_analyze_node_dependences, adjust comments. Process | |
22088 | queued stores before any disambiguation. | |
22089 | (vect_slp_analyze_node_dependences): Remove. | |
22090 | (vect_slp_analyze_instance_dependence): Adjust. | |
22091 | ||
22092 | 2023-08-25 Aldy Hernandez <aldyh@redhat.com> | |
22093 | ||
22094 | * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN | |
22095 | handling. | |
22096 | (operator_not_equal::fold_range): Adjust for relations. | |
22097 | (operator_lt::fold_range): Same. | |
22098 | (operator_gt::fold_range): Same. | |
22099 | (foperator_unordered_equal::fold_range): Same. | |
22100 | (foperator_unordered_lt::fold_range): Same. | |
22101 | (foperator_unordered_le::fold_range): Same. | |
22102 | (foperator_unordered_gt::fold_range): Same. | |
22103 | (foperator_unordered_ge::fold_range): Same. | |
22104 | ||
22105 | 2023-08-25 Richard Biener <rguenther@suse.de> | |
22106 | ||
22107 | PR tree-optimization/111136 | |
22108 | * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For | |
22109 | stores force STMT_VINFO_STRIDED_P and also duplicate that | |
22110 | to all elements. | |
22111 | ||
22112 | 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22113 | ||
22114 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties): | |
22115 | Add early continue. | |
22116 | ||
22117 | 2023-08-25 liuhongt <hongtao.liu@intel.com> | |
22118 | ||
22119 | * config/i386/sse.md (vec_set<mode>): Removed. | |
22120 | (V_128H): Merge into .. | |
22121 | (V_128): .. this. | |
22122 | (V_256H): Merge into .. | |
22123 | (V_256): .. this. | |
22124 | (V_512): Add V32HF, V32BF. | |
22125 | (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H | |
22126 | to V_128. | |
22127 | (vcond<mode><sseintvecmodelower>): Removed | |
22128 | (vcondu<mode><sseintvecmodelower>): Removed. | |
22129 | (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256. | |
22130 | ||
22131 | 2023-08-25 Hongyu Wang <hongyu.wang@intel.com> | |
22132 | ||
22133 | PR target/111127 | |
22134 | * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz): | |
22135 | Adjust paramter order. | |
22136 | ||
22137 | 2023-08-24 Uros Bizjak <ubizjak@gmail.com> | |
22138 | ||
22139 | PR target/94866 | |
22140 | * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern. | |
22141 | ||
22142 | 2023-08-24 David Malcolm <dmalcolm@redhat.com> | |
22143 | ||
22144 | PR analyzer/105899 | |
22145 | * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the | |
22146 | list of functions known to the analyzer. | |
22147 | ||
22148 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22149 | ||
22150 | PR tree-optimization/111123 | |
22151 | * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not | |
22152 | remove indirect clobbers here ... | |
22153 | * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here. | |
22154 | (remove_indirect_clobbers): New function. | |
22155 | ||
22156 | 2023-08-24 Jan Hubicka <jh@suse.cz> | |
22157 | ||
22158 | * cfg.h (struct control_flow_graph): New field full_profile. | |
22159 | * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true. | |
22160 | * cfg.cc (init_flow): Set full_profile to false. | |
22161 | * graphite.cc (graphite_transform_loops): Set full_profile to false. | |
22162 | * lto-streamer-in.cc (input_cfg): Initialize full_profile flag. | |
22163 | * predict.cc (pass_profile::execute): Set full_profile to true. | |
22164 | * symtab-thunks.cc (expand_thunk): Set full_profile to true. | |
22165 | * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full | |
22166 | if full_profile is set. | |
22167 | * tree-inline.cc (initialize_cfun): Initialize full_profile. | |
22168 | (expand_call_inline): Combine full_profile. | |
22169 | ||
22170 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22171 | ||
22172 | * tree-vect-slp.cc (vect_build_slp_tree_1): Rename | |
22173 | load_p to ldst_p, fix mistakes and rely on | |
22174 | STMT_VINFO_DATA_REF. | |
22175 | ||
22176 | 2023-08-24 Jan Hubicka <jh@suse.cz> | |
22177 | ||
22178 | * gimple-harden-conditionals.cc (insert_check_and_trap): Set count | |
22179 | of newly build trap bb. | |
22180 | ||
22181 | 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22182 | ||
22183 | * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since | |
22184 | it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold. | |
22185 | (TARGET_PREFERRED_ELSE_VALUE): Ditto. | |
22186 | ||
22187 | 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com> | |
22188 | ||
22189 | * common/config/riscv/riscv-common.cc: Add -fsched-pressure. | |
22190 | * config/riscv/riscv.cc (riscv_option_override): Set sched | |
22191 | pressure algorithm. | |
22192 | ||
22193 | 2023-08-24 Robin Dapp <rdapp@ventanamicro.com> | |
22194 | ||
22195 | * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand. | |
22196 | ||
22197 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22198 | ||
22199 | PR tree-optimization/111125 | |
22200 | * tree-vect-slp.cc (vect_slp_function): Split at novector | |
22201 | loop entry, do not push blocks in novector loops. | |
22202 | ||
22203 | 2023-08-24 Richard Sandiford <richard.sandiford@arm.com> | |
22204 | ||
22205 | * doc/extend.texi: Document the C [[__extension__ ...]] construct. | |
22206 | ||
22207 | 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22208 | ||
22209 | * genmatch.cc (decision_tree::gen): Support | |
22210 | COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold. | |
22211 | * gimple-match-exports.cc (gimple_simplify): Ditto. | |
22212 | (gimple_resimplify6): New function. | |
22213 | (gimple_resimplify7): New function. | |
22214 | (gimple_match_op::resimplify): Support | |
22215 | COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold. | |
22216 | (convert_conditional_op): Ditto. | |
22217 | (build_call_internal): Ditto. | |
22218 | (try_conditional_simplification): Ditto. | |
22219 | (gimple_extract): Ditto. | |
22220 | * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto. | |
22221 | * internal-fn.cc (CASE): Ditto. | |
22222 | ||
22223 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22224 | ||
22225 | PR tree-optimization/111115 | |
22226 | * tree-vectorizer.h (vect_slp_child_index_for_operand): New. | |
22227 | * tree-vect-data-refs.cc (can_group_stmts_p): Also group | |
22228 | .MASK_STORE. | |
22229 | * tree-vect-slp.cc (arg3_arg2_map): New. | |
22230 | (vect_get_operand_map): Handle IFN_MASK_STORE. | |
22231 | (vect_slp_child_index_for_operand): New function. | |
22232 | (vect_build_slp_tree_1): Handle statements with no LHS, | |
22233 | masked store ifns. | |
22234 | (vect_remove_slp_scalar_calls): Likewise. | |
22235 | * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the | |
22236 | SLP child corresponding to the ifn value index. | |
22237 | (vectorizable_store): Likewise for the mask index. Support | |
22238 | masked stores. | |
22239 | (vectorizable_load): Lookup the SLP child corresponding to the | |
22240 | ifn mask index. | |
22241 | ||
22242 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22243 | ||
22244 | PR tree-optimization/111125 | |
22245 | * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account | |
22246 | for the remain_defs processing. | |
22247 | ||
22248 | 2023-08-24 Richard Sandiford <richard.sandiford@arm.com> | |
22249 | ||
22250 | * config/aarch64/aarch64.cc: Include ssa.h. | |
22251 | (aarch64_multiply_add_p): Require the second operand of an | |
22252 | Advanced SIMD subtraction to be a multiplication. Assume that | |
22253 | such an operation won't be fused if the second operand is used | |
22254 | multiple times and if the first operand is also a multiplication. | |
22255 | ||
22256 | 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22257 | ||
22258 | * tree-vect-loop.cc (vectorizable_reduction): Apply | |
22259 | LEN_FOLD_EXTRACT_LAST. | |
22260 | * tree-vect-stmts.cc (vectorizable_condition): Ditto. | |
22261 | ||
22262 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22263 | ||
22264 | PR tree-optimization/111128 | |
22265 | * tree-vect-patterns.cc (vect_recog_over_widening_pattern): | |
22266 | Emit external shift operand inline if we promoted it with | |
22267 | another pattern stmt. | |
22268 | ||
22269 | 2023-08-24 Pan Li <pan2.li@intel.com> | |
22270 | ||
22271 | * config/riscv/autovec.md: Fix typo. | |
22272 | ||
22273 | 2023-08-24 Pan Li <pan2.li@intel.com> | |
22274 | ||
22275 | * config/riscv/riscv-vector-builtins-bases.cc | |
22276 | (class binop_frm): Removed. | |
22277 | (class reverse_binop_frm): Ditto. | |
22278 | (class widen_binop_frm): Ditto. | |
22279 | (class vfmacc_frm): Ditto. | |
22280 | (class vfnmacc_frm): Ditto. | |
22281 | (class vfmsac_frm): Ditto. | |
22282 | (class vfnmsac_frm): Ditto. | |
22283 | (class vfmadd_frm): Ditto. | |
22284 | (class vfnmadd_frm): Ditto. | |
22285 | (class vfmsub_frm): Ditto. | |
22286 | (class vfnmsub_frm): Ditto. | |
22287 | (class vfwmacc_frm): Ditto. | |
22288 | (class vfwnmacc_frm): Ditto. | |
22289 | (class vfwmsac_frm): Ditto. | |
22290 | (class vfwnmsac_frm): Ditto. | |
22291 | (class unop_frm): Ditto. | |
22292 | (class vfrec7_frm): Ditto. | |
22293 | (class binop): Add frm_op_type template arg. | |
22294 | (class unop): Ditto. | |
22295 | (class widen_binop): Ditto. | |
22296 | (class widen_binop_fp): Ditto. | |
22297 | (class reverse_binop): Ditto. | |
22298 | (class vfmacc): Ditto. | |
22299 | (class vfnmsac): Ditto. | |
22300 | (class vfmadd): Ditto. | |
22301 | (class vfnmsub): Ditto. | |
22302 | (class vfnmacc): Ditto. | |
22303 | (class vfmsac): Ditto. | |
22304 | (class vfnmadd): Ditto. | |
22305 | (class vfmsub): Ditto. | |
22306 | (class vfwmacc): Ditto. | |
22307 | (class vfwnmacc): Ditto. | |
22308 | (class vfwmsac): Ditto. | |
22309 | (class vfwnmsac): Ditto. | |
22310 | (class float_misc): Ditto. | |
22311 | ||
22312 | 2023-08-24 Andrew Pinski <apinski@marvell.com> | |
22313 | ||
22314 | PR tree-optimization/111109 | |
22315 | * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)): | |
22316 | Add check to make sure cmp and icmp are inverse. | |
22317 | ||
22318 | 2023-08-24 Andrew Pinski <apinski@marvell.com> | |
22319 | ||
22320 | PR tree-optimization/95929 | |
22321 | * match.pd (convert?(-a)): New pattern | |
22322 | for 1bit integer types. | |
22323 | ||
22324 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22325 | ||
22326 | Revert: | |
22327 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
22328 | ||
22329 | * common/config/i386/cpuinfo.h (get_available_features): | |
22330 | Add avx10_set and version and detect avx10.1. | |
22331 | (cpu_indicator_init): Handle avx10.1-512. | |
22332 | * common/config/i386/i386-common.cc | |
22333 | (OPTION_MASK_ISA2_AVX10_512BIT_SET): New. | |
22334 | (OPTION_MASK_ISA2_AVX10_1_SET): Ditto. | |
22335 | (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto. | |
22336 | (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto. | |
22337 | (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1. | |
22338 | (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and | |
22339 | -mavx10.1-512. | |
22340 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
22341 | Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and | |
22342 | FEATURE_AVX10_512BIT. | |
22343 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
22344 | AVX10_512BIT, AVX10_1 and AVX10_1_512. | |
22345 | * config/i386/constraints.md (Yk): Add AVX10_1. | |
22346 | (Yv): Ditto. | |
22347 | (k): Ditto. | |
22348 | * config/i386/cpuid.h (bit_AVX10): New. | |
22349 | (bit_AVX10_256): Ditto. | |
22350 | (bit_AVX10_512): Ditto. | |
22351 | * config/i386/i386-c.cc (ix86_target_macros_internal): | |
22352 | Define AVX10_512BIT and AVX10_1. | |
22353 | * config/i386/i386-isa.def | |
22354 | (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT). | |
22355 | (AVX10_1): Add DEF_PTA(AVX10_1). | |
22356 | * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1. | |
22357 | (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1 | |
22358 | and avx10.1-512. | |
22359 | (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16, | |
22360 | FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512. | |
22361 | (ix86_valid_target_attribute_inner_p): Handle AVX10_1. | |
22362 | * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1. | |
22363 | (ix86_conditional_register_usage): Ditto. | |
22364 | (ix86_hard_regno_mode_ok): Ditto. | |
22365 | (ix86_rtx_costs): Ditto. | |
22366 | * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro. | |
22367 | * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and | |
22368 | -mavx10.1-512. | |
22369 | * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512. | |
22370 | * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512. | |
22371 | * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256 | |
22372 | and avx10.1-512. | |
22373 | ||
22374 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22375 | ||
22376 | Revert: | |
22377 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
22378 | ||
22379 | * common/config/i386/i386-common.cc | |
22380 | (ix86_check_avx10): New function to check isa_flags and | |
22381 | isa_flags_explicit to emit warning when AVX10 is enabled | |
22382 | by "-m" option. | |
22383 | (ix86_check_avx512): New function to check isa_flags and | |
22384 | isa_flags_explicit to emit warning when AVX512 is enabled | |
22385 | by "-m" option. | |
22386 | (ix86_handle_option): Do not change the flags when warning | |
22387 | is emitted. | |
22388 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
22389 | Do not append -mno-avx10.1 for -march=native. | |
22390 | ||
22391 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22392 | ||
22393 | Revert: | |
22394 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
22395 | ||
22396 | * common/config/i386/i386-common.cc | |
22397 | (ix86_check_avx10_vector_width): New function to check isa_flags | |
22398 | to emit a warning when there is a conflict in AVX10 options for | |
22399 | vector width. | |
22400 | (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512. | |
22401 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
22402 | Do not append -mno-avx10-max-512bit for -march=native. | |
22403 | ||
22404 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22405 | ||
22406 | Revert: | |
22407 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
22408 | ||
22409 | * config/i386/avx512vldqintrin.h: Remove target attribute. | |
22410 | * config/i386/i386-builtin.def (BDESC): | |
22411 | Add OPTION_MASK_ISA2_AVX10_1. | |
22412 | * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1. | |
22413 | * config/i386/i386-expand.cc | |
22414 | (ix86_check_builtin_isa_match): Ditto. | |
22415 | (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1. | |
22416 | * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq | |
22417 | and avx10_1_or_avx512vl. | |
22418 | * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New. | |
22419 | (VF1_128_256VLDQ_AVX10_1): Ditto. | |
22420 | (VI8_AVX512VLDQ_AVX10_1): Ditto. | |
22421 | (<sse>_andnot<mode>3<mask_name>): | |
22422 | Add TARGET_AVX10_1 and change isa attr from avx512dq to | |
22423 | avx10_1_or_avx512dq. | |
22424 | (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from | |
22425 | avx512vl to avx10_1_or_avx512vl. | |
22426 | (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>): | |
22427 | Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check. | |
22428 | (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>): | |
22429 | Ditto. | |
22430 | (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>): | |
22431 | Ditto. | |
22432 | (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>): | |
22433 | Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check. | |
22434 | (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>): | |
22435 | Add TARGET_AVX10_1. | |
22436 | (fix<fixunssuffix>_truncv2sfv2di2): Ditto. | |
22437 | (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL. | |
22438 | Remove target check. | |
22439 | (avx512dq_mul<mode>3<mask_name>): Ditto. | |
22440 | (*avx512dq_mul<mode>3<mask_name>): Ditto. | |
22441 | (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1. | |
22442 | (<mask_codefor>avx512dq_broadcast<mode><mask_name>): | |
22443 | Remove target check. | |
22444 | (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1. | |
22445 | (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): | |
22446 | Remove target check. | |
22447 | * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1. | |
22448 | (mask_avx512vl_condition): Ditto. | |
22449 | (mask): Ditto. | |
22450 | ||
22451 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22452 | ||
22453 | Revert: | |
22454 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
22455 | ||
22456 | * config/i386/avx512vldqintrin.h: Remove target attribute. | |
22457 | * config/i386/i386-builtin.def (BDESC): | |
22458 | Add OPTION_MASK_ISA2_AVX10_1. | |
22459 | * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1. | |
22460 | * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New. | |
22461 | (VI48_AVX512VLDQ_AVX10_1): Ditto. | |
22462 | (VF2_AVX512VL): Remove. | |
22463 | (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512. | |
22464 | Add TARGET_AVX10_1. | |
22465 | (*<code><mode>3<mask_name>): Change isa attribute to | |
22466 | avx10_1_or_avx512dq. Add TARGET_AVX10_1. | |
22467 | (<code><mode>3): Add TARGET_AVX10_1. Change isa attr | |
22468 | to avx10_1_or_avx512vl. | |
22469 | (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>): | |
22470 | Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check. | |
22471 | (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>): | |
22472 | Add TARGET_AVX10_1. | |
22473 | (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>): | |
22474 | Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check. | |
22475 | (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>): | |
22476 | Add TARGET_AVX10_1. | |
22477 | (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>): | |
22478 | Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check. | |
22479 | (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>): | |
22480 | Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check. | |
22481 | (float<floatunssuffix>v4div4sf2<mask_name>): | |
22482 | Add TARGET_AVX10_1. | |
22483 | (avx512dq_float<floatunssuffix>v2div2sf2): Ditto. | |
22484 | (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto. | |
22485 | (float<floatunssuffix>v2div2sf2): Ditto. | |
22486 | (float<floatunssuffix>v2div2sf2_mask): Ditto. | |
22487 | (*float<floatunssuffix>v2div2sf2_mask): Ditto. | |
22488 | (*float<floatunssuffix>v2div2sf2_mask_1): Ditto. | |
22489 | (<avx512>_cvt<ssemodesuffix>2mask<mode>): | |
22490 | Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check. | |
22491 | (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto. | |
22492 | (*<avx512>_cvtmask2<ssemodesuffix><mode>): | |
22493 | Change iterator to VI48_AVX512VL_AVX10_1. Remove target check. | |
22494 | Change when constraint is enabled. | |
22495 | ||
22496 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22497 | ||
22498 | Revert: | |
22499 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
22500 | ||
22501 | * config/i386/avx512vldqintrin.h: Remove target attribute. | |
22502 | * config/i386/i386-builtin.def (BDESC): | |
22503 | Add OPTION_MASK_ISA2_AVX10_1. | |
22504 | * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New. | |
22505 | (VFH_AVX512VLDQ_AVX10_1): Ditto. | |
22506 | (VF1_AVX512VLDQ_AVX10_1): Ditto. | |
22507 | (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>): | |
22508 | Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check. | |
22509 | (vec_pack<floatprefix>_float_<mode>): Change iterator to | |
22510 | VI8_AVX512VLDQ_AVX10_1. Remove target check. | |
22511 | (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to | |
22512 | VF1_AVX512VLDQ_AVX10_1. Remove target check. | |
22513 | (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto. | |
22514 | (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ. | |
22515 | (avx512vl_vextractf128<mode>): Change iterator to | |
22516 | VI48F_256_DQVL_AVX10_1. Remove target check. | |
22517 | (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1. | |
22518 | (vec_extract_hi_<mode>): Ditto. | |
22519 | (avx512vl_vinsert<mode>): Ditto. | |
22520 | (vec_set_lo_<mode><mask_name>): Ditto. | |
22521 | (vec_set_hi_<mode><mask_name>): Ditto. | |
22522 | (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change | |
22523 | iterator to VF_AVX512VLDQ_AVX10_1. Remove target check. | |
22524 | (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change | |
22525 | iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check. | |
22526 | * config/i386/subst.md (mask_avx512dq_condition): Add | |
22527 | TARGET_AVX10_1. | |
22528 | (mask_scalar_merge): Ditto. | |
22529 | ||
22530 | 2023-08-24 Haochen Jiang <haochen.jiang@intel.com> | |
22531 | ||
22532 | Revert: | |
22533 | 2023-08-18 Haochen Jiang <haochen.jiang@intel.com> | |
22534 | ||
22535 | PR target/111051 | |
22536 | * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is | |
22537 | disabled. | |
22538 | ||
22539 | 2023-08-24 Richard Biener <rguenther@suse.de> | |
22540 | ||
22541 | PR debug/111080 | |
22542 | * dwarf2out.cc (prune_unused_types_walk): Handle | |
22543 | DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type, | |
22544 | DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type | |
22545 | and DW_TAG_dynamic_type as to only output them when referenced. | |
22546 | ||
22547 | 2023-08-24 liuhongt <hongtao.liu@intel.com> | |
22548 | ||
22549 | * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC | |
22550 | V13 to GCC 13.1. | |
22551 | ||
22552 | 2023-08-24 liuhongt <hongtao.liu@intel.com> | |
22553 | ||
22554 | * common/config/i386/i386-common.cc (processor_names): Add new | |
22555 | member graniterapids-s and arrowlake-s. | |
22556 | * config/i386/i386-options.cc (processor_alias_table): Update | |
22557 | table with PROCESSOR_ARROWLAKE_S and | |
22558 | PROCESSOR_GRANITERAPIDS_D. | |
22559 | (m_GRANITERAPID_D): New macro. | |
22560 | (m_ARROWLAKE_S): Ditto. | |
22561 | (m_CORE_AVX512): Add m_GRANITERAPIDS_D. | |
22562 | (processor_cost_table): Add icelake_cost for | |
22563 | PROCESSOR_GRANITERAPIDS_D and alderlake_cost for | |
22564 | PROCESSOR_ARROWLAKE_S. | |
22565 | * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as | |
22566 | m_ARROWLAKE. | |
22567 | * config/i386/i386.h (enum processor_type): Add new member | |
22568 | PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S. | |
22569 | * config/i386/i386-c.cc (ix86_target_macros_internal): Handle | |
22570 | PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S | |
22571 | ||
22572 | 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
22573 | ||
22574 | * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to | |
22575 | to help simplify code further. | |
22576 | ||
22577 | 2023-08-23 Andrew MacLeod <amacleod@redhat.com> | |
22578 | ||
22579 | * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output. | |
22580 | * gimple-range-phi.cc (phi_group::phi_group): Remove unused members. | |
22581 | Initialize using a range instead of value and edge. | |
22582 | (phi_group::calculate_using_modifier): Use initializer value and | |
22583 | process for relations after trying for iteration convergence. | |
22584 | (phi_group::refine_using_relation): Use initializer range. | |
22585 | (phi_group::dump): Rework the dump output. | |
22586 | (phi_analyzer::process_phi): Allow multiple constant initilizers. | |
22587 | Dump groups immediately as created. | |
22588 | (phi_analyzer::dump): Tweak output. | |
22589 | * gimple-range-phi.h (phi_group::phi_group): Adjust prototype. | |
22590 | (phi_group::initial_value): Delete. | |
22591 | (phi_group::refine_using_relation): Adjust prototype. | |
22592 | (phi_group::m_initial_value): Delete. | |
22593 | (phi_group::m_initial_edge): Delete. | |
22594 | (phi_group::m_vr): Use int_range_max. | |
22595 | * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups. | |
22596 | ||
22597 | 2023-08-23 Andrew MacLeod <amacleod@redhat.com> | |
22598 | ||
22599 | * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if | |
22600 | no group was created. | |
22601 | (phi_analyzer::process_phi): Do not create groups of one phi node. | |
22602 | ||
22603 | 2023-08-23 Richard Earnshaw <rearnsha@arm.com> | |
22604 | ||
22605 | * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for | |
22606 | CODE, CMP_CODE and BIT_CODE arguments. | |
22607 | * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise. | |
22608 | (aarch64_gen_ccmp_next): Likewise. | |
22609 | * doc/tm.texi: Regenerated. | |
22610 | ||
22611 | 2023-08-23 Richard Earnshaw <rearnsha@arm.com> | |
22612 | ||
22613 | * coretypes.h (rtx_code): Add forward declaration. | |
22614 | * rtl.h (rtx_code): Make compatible with forward declaration. | |
22615 | ||
22616 | 2023-08-23 Uros Bizjak <ubizjak@gmail.com> | |
22617 | ||
22618 | PR target/111010 | |
22619 | * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3): | |
22620 | Merge pattern from *concatditi3_3 and *concatsidi3_3 using | |
22621 | DWIH mode iterator. Disable (=&r,m,m) alternative for | |
22622 | 32-bit targets. | |
22623 | (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m) | |
22624 | alternative for 32-bit targets. | |
22625 | ||
22626 | 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com> | |
22627 | ||
22628 | * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more | |
22629 | appropriate type attribute. | |
22630 | ||
22631 | 2023-08-23 Lehua Ding <lehua.ding@rivai.ai> | |
22632 | ||
22633 | * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern. | |
22634 | (*copysign<mode>_neg): Ditto. | |
22635 | * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust. | |
22636 | (<optab><mode>2): Ditto. | |
22637 | (cond_<optab><mode>): New. | |
22638 | (cond_len_<optab><mode>): Ditto. | |
22639 | * config/riscv/riscv-protos.h (enum insn_type): New. | |
22640 | (expand_cond_len_unop): New helper func. | |
22641 | * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust. | |
22642 | (expand_cond_len_unop): New helper func. | |
22643 | ||
22644 | 2023-08-23 Jan Hubicka <jh@suse.cz> | |
22645 | ||
22646 | * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment. | |
22647 | (should_duplicate_loop_header_p): Fix return value for static exits. | |
22648 | (ch_base::copy_headers): Improve handling of ch_possible_zero_cost. | |
22649 | ||
22650 | 2023-08-23 Kewen Lin <linkw@linux.ibm.com> | |
22651 | ||
22652 | * tree-vect-stmts.cc (vectorizable_store): Move the handlings on | |
22653 | VMAT_GATHER_SCATTER in the final loop nest to its own loop, | |
22654 | and update the final nest accordingly. | |
22655 | ||
22656 | 2023-08-23 Kewen Lin <linkw@linux.ibm.com> | |
22657 | ||
22658 | * tree-vect-stmts.cc (vectorizable_store): Move the handlings on | |
22659 | VMAT_LOAD_STORE_LANES in the final loop nest to its own loop, | |
22660 | and update the final nest accordingly. | |
22661 | ||
22662 | 2023-08-23 Kewen Lin <linkw@linux.ibm.com> | |
22663 | ||
22664 | * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds, | |
22665 | adjust vec result_chain, vec_oprnd with auto_vec, and adjust | |
22666 | gvec_oprnds with auto_delete_vec. | |
22667 | ||
22668 | 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22669 | ||
22670 | * config/riscv/riscv-vsetvl.cc | |
22671 | (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE. | |
22672 | ||
22673 | 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22674 | ||
22675 | * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p): | |
22676 | Fix fuse rule bug. | |
22677 | * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto. | |
22678 | ||
22679 | 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22680 | ||
22681 | * config/riscv/vector.md: Add attribute. | |
22682 | ||
22683 | 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22684 | ||
22685 | * config/riscv/riscv-vsetvl.cc (change_insn): Clang format. | |
22686 | (vector_infos_manager::all_same_ratio_p): Ditto. | |
22687 | (vector_infos_manager::all_same_avl_p): Ditto. | |
22688 | (pass_vsetvl::refine_vsetvls): Ditto. | |
22689 | (pass_vsetvl::cleanup_vsetvls): Ditto. | |
22690 | (pass_vsetvl::commit_vsetvls): Ditto. | |
22691 | (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto. | |
22692 | (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto. | |
22693 | (pass_vsetvl::compute_probabilities): Ditto. | |
22694 | ||
22695 | 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22696 | ||
22697 | * config/riscv/t-riscv: Add riscv-vsetvl.def | |
22698 | ||
22699 | 2023-08-22 Vineet Gupta <vineetg@rivosinc.com> | |
22700 | ||
22701 | * config/riscv/riscv.opt: Add --param names | |
22702 | riscv-autovec-preference and riscv-autovec-lmul | |
22703 | ||
22704 | 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com> | |
22705 | ||
22706 | * config/riscv/t-linux: Add MULTIARCH_DIRNAME. | |
22707 | ||
22708 | 2023-08-22 Tobias Burnus <tobias@codesourcery.com> | |
22709 | ||
22710 | * tree-core.h (enum omp_clause_defaultmap_kind): Add | |
22711 | OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL. | |
22712 | * gimplify.cc (gimplify_scan_omp_clauses): Handle it. | |
22713 | * tree-pretty-print.cc (dump_omp_clause): Likewise. | |
22714 | ||
22715 | 2023-08-22 Jakub Jelinek <jakub@redhat.com> | |
22716 | ||
22717 | PR c++/106652 | |
22718 | * doc/extend.texi (_Float<n>): Drop obsolete sentence that the | |
22719 | types aren't supported in C++. | |
22720 | ||
22721 | 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22722 | ||
22723 | * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern. | |
22724 | * internal-fn.cc (fold_len_extract_direct): Ditto. | |
22725 | (expand_fold_len_extract_optab_fn): Ditto. | |
22726 | (direct_fold_len_extract_optab_supported_p): Ditto. | |
22727 | * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto. | |
22728 | * optabs.def (OPTAB_D): Ditto. | |
22729 | ||
22730 | 2023-08-22 Richard Biener <rguenther@suse.de> | |
22731 | ||
22732 | * tree-vect-stmts.cc (vectorizable_store): Do not bump | |
22733 | DR_GROUP_STORE_COUNT here. Remove early out. | |
22734 | (vect_transform_stmt): Only call vectorizable_store on | |
22735 | the last element of an interleaving chain. | |
22736 | ||
22737 | 2023-08-22 Richard Biener <rguenther@suse.de> | |
22738 | ||
22739 | PR tree-optimization/94864 | |
22740 | PR tree-optimization/94865 | |
22741 | PR tree-optimization/93080 | |
22742 | * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern | |
22743 | for vector insertion from vector extraction. | |
22744 | ||
22745 | 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22746 | Kewen.Lin <linkw@linux.ibm.com> | |
22747 | ||
22748 | * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check. | |
22749 | (vectorizable_live_operation): Add live vectorization for length loop | |
22750 | control. | |
22751 | ||
22752 | 2023-08-22 David Malcolm <dmalcolm@redhat.com> | |
22753 | ||
22754 | PR analyzer/105899 | |
22755 | * doc/invoke.texi: Remove -Wanalyzer-unterminated-string. | |
22756 | ||
22757 | 2023-08-22 Pan Li <pan2.li@intel.com> | |
22758 | ||
22759 | * config/riscv/riscv-vector-builtins-bases.cc | |
22760 | (vfwredusum_frm_obj): New declaration. | |
22761 | (BASE): Ditto. | |
22762 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
22763 | * config/riscv/riscv-vector-builtins-functions.def | |
22764 | (vfwredusum_frm): New intrinsic function def. | |
22765 | ||
22766 | 2023-08-21 David Faust <david.faust@oracle.com> | |
22767 | ||
22768 | * config/bpf/bpf.md (neg): Second operand must be a register. | |
22769 | ||
22770 | 2023-08-21 Edwin Lu <ewlu@rivosinc.com> | |
22771 | ||
22772 | * config/riscv/bitmanip.md: Added bitmanip type to insns | |
22773 | that are missing types. | |
22774 | ||
22775 | 2023-08-21 Jeff Law <jlaw@ventanamicro.com> | |
22776 | ||
22777 | * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous | |
22778 | newline. | |
22779 | ||
22780 | 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> | |
22781 | ||
22782 | * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list): | |
22783 | Fix format specifier. | |
22784 | ||
22785 | 2023-08-21 Aldy Hernandez <aldyh@redhat.com> | |
22786 | ||
22787 | * value-range.cc (frange::union_nans): Return false if nothing | |
22788 | changed. | |
22789 | (range_tests_floats): New test. | |
22790 | ||
22791 | 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
22792 | ||
22793 | PR tree-optimization/111048 | |
22794 | * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns | |
22795 | correctly. | |
22796 | (fold_vec_perm_cst): Remove workaround and again call | |
22797 | valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors. | |
22798 | (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case. | |
22799 | ||
22800 | 2023-08-21 Richard Biener <rguenther@suse.de> | |
22801 | ||
22802 | PR tree-optimization/111082 | |
22803 | * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only | |
22804 | pun operations that can overflow. | |
22805 | ||
22806 | 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
22807 | ||
22808 | * lcm.cc (compute_antinout_edge): Export as global use. | |
22809 | (compute_earliest): Ditto. | |
22810 | (compute_rev_insert_delete): Ditto. | |
22811 | * lcm.h (compute_antinout_edge): Ditto. | |
22812 | (compute_earliest): Ditto. | |
22813 | ||
22814 | 2023-08-21 Richard Biener <rguenther@suse.de> | |
22815 | ||
22816 | PR tree-optimization/111070 | |
22817 | * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have | |
22818 | an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI. | |
22819 | ||
22820 | 2023-08-21 Andrew Pinski <apinski@marvell.com> | |
22821 | ||
22822 | PR tree-optimization/111002 | |
22823 | * match.pd (view_convert(vec_cond(a,b,c))): New pattern. | |
22824 | ||
22825 | 2023-08-21 liuhongt <hongtao.liu@intel.com> | |
22826 | ||
22827 | * common/config/i386/cpuinfo.h (get_intel_cpu): Detect | |
22828 | Alderlake-N. | |
22829 | * common/config/i386/i386-common.cc (alias_table): Support | |
22830 | -march=gracemont as an alias of -march=alderlake. | |
22831 | ||
22832 | 2023-08-20 Uros Bizjak <ubizjak@gmail.com> | |
22833 | ||
22834 | * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1] | |
22835 | instead of src in the call to ix86_expand_sse_cmp. | |
22836 | * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not | |
22837 | force operands[1] to a register. | |
22838 | (<any_extend:insn>v4hiv4si2): Ditto. | |
22839 | (<any_extend:insn>v2siv2di2): Ditto. | |
22840 | ||
22841 | 2023-08-20 Andrew Pinski <apinski@marvell.com> | |
22842 | ||
22843 | PR tree-optimization/111006 | |
22844 | PR tree-optimization/110986 | |
22845 | * match.pd: (op(vec_cond(a,b,c))): Handle convert for op. | |
22846 | ||
22847 | 2023-08-20 Eric Gallager <egallager@gcc.gnu.org> | |
22848 | ||
22849 | PR target/90835 | |
22850 | * Makefile.in: improve error message when /usr/include is | |
22851 | missing | |
22852 | ||
22853 | 2023-08-19 Tobias Burnus <tobias@codesourcery.com> | |
22854 | ||
22855 | PR middle-end/111017 | |
22856 | * omp-expand.cc (expand_omp_for_init_vars): Pass after=true | |
22857 | to expand_omp_build_cond for 'factor != 0' condition, resulting | |
22858 | in pre-r12-5295-g47de0b56ee455e code for the gimple insert. | |
22859 | ||
22860 | 2023-08-19 Guo Jie <guojie@loongson.cn> | |
22861 | Lulu Cheng <chenglulu@loongson.cn> | |
22862 | ||
22863 | * config/loongarch/t-loongarch: Add loongarch-driver.h into | |
22864 | TM_H. Add loongarch-def.h and loongarch-tune.h into | |
22865 | OPTIONS_H_EXTRA. | |
22866 | ||
22867 | 2023-08-18 Uros Bizjak <ubizjak@gmail.com> | |
22868 | ||
22869 | PR target/111023 | |
22870 | * config/i386/i386-expand.cc (ix86_split_mmx_punpck): | |
22871 | Also handle V2QImode. | |
22872 | (ix86_expand_sse_extend): New function. | |
22873 | * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype. | |
22874 | * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for | |
22875 | TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1. | |
22876 | (<any_extend:insn>v2hiv2si2): Ditto. | |
22877 | (<any_extend:insn>v2qiv2hi2): Ditto. | |
22878 | * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto. | |
22879 | (<any_extend:insn>v4hiv4si2): Ditto. | |
22880 | (<any_extend:insn>v2siv2di2): Ditto. | |
22881 | ||
22882 | 2023-08-18 Aldy Hernandez <aldyh@redhat.com> | |
22883 | ||
22884 | PR ipa/110753 | |
22885 | * value-range.cc (irange::union_bitmask): Return FALSE if updated | |
22886 | bitmask is semantically equivalent to the original mask. | |
22887 | (irange::intersect_bitmask): Same. | |
22888 | (irange::get_bitmask): Add comment. | |
22889 | ||
22890 | 2023-08-18 Richard Biener <rguenther@suse.de> | |
22891 | ||
22892 | PR tree-optimization/111019 | |
22893 | * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing | |
22894 | also scrap base and offset in case the ref is indirect. | |
22895 | ||
22896 | 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com> | |
22897 | ||
22898 | * config/bpf/bpf.opt (mframe-limit): Set default to 32767. | |
22899 | ||
22900 | 2023-08-18 Kewen Lin <linkw@linux.ibm.com> | |
22901 | ||
22902 | PR bootstrap/111021 | |
22903 | * Makefile.in (TM_P_H): Add $(TREE_H) as dependence. | |
22904 | ||
22905 | 2023-08-18 Kewen Lin <linkw@linux.ibm.com> | |
22906 | ||
22907 | * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor | |
22908 | out from ... | |
22909 | (vectorizable_store): ... here. | |
22910 | ||
22911 | 2023-08-18 Richard Biener <rguenther@suse.de> | |
22912 | ||
22913 | PR tree-optimization/111048 | |
22914 | * fold-const.cc (fold_vec_perm_cst): Check for non-VLA | |
22915 | vectors first. | |
22916 | ||
22917 | 2023-08-18 Haochen Jiang <haochen.jiang@intel.com> | |
22918 | ||
22919 | PR target/111051 | |
22920 | * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is | |
22921 | disabled. | |
22922 | ||
22923 | 2023-08-18 Kewen Lin <linkw@linux.ibm.com> | |
22924 | ||
22925 | * tree-vect-stmts.cc (vectorizable_load): Move the handlings on | |
22926 | VMAT_GATHER_SCATTER in the final loop nest to its own loop, | |
22927 | and update the final nest accordingly. | |
22928 | ||
22929 | 2023-08-18 Andrew Pinski <apinski@marvell.com> | |
22930 | ||
22931 | * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl, | |
22932 | cond_len_neg and cond_len_one_cmpl. | |
22933 | ||
22934 | 2023-08-18 Lehua Ding <lehua.ding@rivai.ai> | |
22935 | ||
22936 | * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New. | |
22937 | * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF. | |
22938 | (*local_pic_load<ANYLSF:mode>): To ANYLSF. | |
22939 | (*local_pic_load_32d<ANYF:mode>): Ditto. | |
22940 | (*local_pic_load_32d<ANYLSF:mode>): Ditto. | |
22941 | (*local_pic_store<ANYF:mode>): Ditto. | |
22942 | (*local_pic_store<ANYLSF:mode>): Ditto. | |
22943 | (*local_pic_store_32d<ANYF:mode>): Ditto. | |
22944 | (*local_pic_store_32d<ANYLSF:mode>): Ditto. | |
22945 | ||
22946 | 2023-08-18 Lehua Ding <lehua.ding@rivai.ai> | |
22947 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
22948 | ||
22949 | * config/riscv/predicates.md (vector_const_0_operand): New. | |
22950 | * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto. | |
22951 | ||
22952 | 2023-08-18 Lehua Ding <lehua.ding@rivai.ai> | |
22953 | ||
22954 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): | |
22955 | Forbidden. | |
22956 | ||
22957 | 2023-08-17 Andrew MacLeod <amacleod@redhat.com> | |
22958 | ||
22959 | PR tree-optimization/111009 | |
22960 | * range-op.cc (operator_addr_expr::op1_range): Be more restrictive. | |
22961 | ||
22962 | 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com> | |
22963 | ||
22964 | * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving | |
22965 | slots_num initialization from here ... | |
22966 | (lra_spill): ... to here before the 1st call of | |
22967 | assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after | |
22968 | fp->sp elimination. | |
22969 | ||
22970 | 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com> | |
22971 | ||
22972 | PR c/106537 | |
22973 | * doc/invoke.texi (Option Summary): Mention | |
22974 | -Wcompare-distinct-pointer-types under `Warning Options'. | |
22975 | (Warning Options): Document -Wcompare-distinct-pointer-types. | |
22976 | ||
22977 | 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de> | |
22978 | ||
22979 | * recog.cc (memory_address_addr_space_p): Mark possibly unused | |
22980 | argument as unused. | |
22981 | ||
22982 | 2023-08-17 Richard Biener <rguenther@suse.de> | |
22983 | ||
22984 | PR tree-optimization/111039 | |
22985 | * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for | |
22986 | SSA_NAME_OCCURS_IN_ABNORMAL_PHI. | |
22987 | ||
22988 | 2023-08-17 Alex Coplan <alex.coplan@arm.com> | |
22989 | ||
22990 | * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes. | |
22991 | ||
22992 | 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com> | |
22993 | ||
22994 | PR target/111046 | |
22995 | * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the | |
22996 | `naked' function attribute. | |
22997 | (bpf_warn_func_return): New function. | |
22998 | (TARGET_WARN_FUNC_RETURN): Define. | |
22999 | (bpf_expand_prologue): Add preventive comment. | |
23000 | (bpf_expand_epilogue): Likewise. | |
23001 | * doc/extend.texi (BPF Function Attributes): Document the `naked' | |
23002 | function attribute. | |
23003 | ||
23004 | 2023-08-17 Richard Biener <rguenther@suse.de> | |
23005 | ||
23006 | * tree-vect-slp.cc (vect_slp_check_for_roots): Use | |
23007 | !needs_fold_left_reduction_p to decide whether we can | |
23008 | handle the reduction with association. | |
23009 | (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED | |
23010 | reductions perform all arithmetic in an unsigned type. | |
23011 | ||
23012 | 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> | |
23013 | ||
23014 | * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v | |
23015 | output. | |
23016 | * configure: Regenerate. | |
23017 | ||
23018 | 2023-08-17 Pan Li <pan2.li@intel.com> | |
23019 | ||
23020 | * config/riscv/riscv-vector-builtins-bases.cc | |
23021 | (widen_freducop): Add frm_opt_type template arg. | |
23022 | (vfwredosum_frm_obj): New declaration. | |
23023 | (BASE): Ditto. | |
23024 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23025 | * config/riscv/riscv-vector-builtins-functions.def | |
23026 | (vfwredosum_frm): New intrinsic function def. | |
23027 | ||
23028 | 2023-08-17 Pan Li <pan2.li@intel.com> | |
23029 | ||
23030 | * config/riscv/riscv-vector-builtins-bases.cc | |
23031 | (vfredosum_frm_obj): New declaration. | |
23032 | (BASE): Ditto. | |
23033 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23034 | * config/riscv/riscv-vector-builtins-functions.def | |
23035 | (vfredosum_frm): New intrinsic function def. | |
23036 | ||
23037 | 2023-08-17 Pan Li <pan2.li@intel.com> | |
23038 | ||
23039 | * config/riscv/riscv-vector-builtins-bases.cc | |
23040 | (class freducop): Add frm_op_type template arg. | |
23041 | (vfredusum_frm_obj): New declaration. | |
23042 | (BASE): Ditto. | |
23043 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23044 | * config/riscv/riscv-vector-builtins-functions.def | |
23045 | (vfredusum_frm): New intrinsic function def. | |
23046 | * config/riscv/riscv-vector-builtins-shapes.cc | |
23047 | (struct reduc_alu_frm_def): New class for frm shape. | |
23048 | (SHAPE): New declaration. | |
23049 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
23050 | ||
23051 | 2023-08-17 Pan Li <pan2.li@intel.com> | |
23052 | ||
23053 | * config/riscv/riscv-vector-builtins-bases.cc | |
23054 | (class vfncvt_f): Add frm_op_type template arg. | |
23055 | (vfncvt_f_frm_obj): New declaration. | |
23056 | (BASE): Ditto. | |
23057 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23058 | * config/riscv/riscv-vector-builtins-functions.def | |
23059 | (vfncvt_f_frm): New intrinsic function def. | |
23060 | ||
23061 | 2023-08-17 Pan Li <pan2.li@intel.com> | |
23062 | ||
23063 | * config/riscv/riscv-vector-builtins-bases.cc | |
23064 | (vfncvt_xu_frm_obj): New declaration. | |
23065 | (BASE): Ditto. | |
23066 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23067 | * config/riscv/riscv-vector-builtins-functions.def | |
23068 | (vfncvt_xu_frm): New intrinsic function def. | |
23069 | ||
23070 | 2023-08-17 Pan Li <pan2.li@intel.com> | |
23071 | ||
23072 | * config/riscv/riscv-vector-builtins-bases.cc | |
23073 | (class vfncvt_x): Add frm_op_type template arg. | |
23074 | (BASE): New declaration. | |
23075 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23076 | * config/riscv/riscv-vector-builtins-functions.def | |
23077 | (vfncvt_x_frm): New intrinsic function def. | |
23078 | * config/riscv/riscv-vector-builtins-shapes.cc | |
23079 | (struct narrow_alu_frm_def): New shape function for frm. | |
23080 | (SHAPE): New declaration. | |
23081 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
23082 | ||
23083 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
23084 | ||
23085 | * config/i386/avx512vldqintrin.h: Remove target attribute. | |
23086 | * config/i386/i386-builtin.def (BDESC): | |
23087 | Add OPTION_MASK_ISA2_AVX10_1. | |
23088 | * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New. | |
23089 | (VFH_AVX512VLDQ_AVX10_1): Ditto. | |
23090 | (VF1_AVX512VLDQ_AVX10_1): Ditto. | |
23091 | (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>): | |
23092 | Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check. | |
23093 | (vec_pack<floatprefix>_float_<mode>): Change iterator to | |
23094 | VI8_AVX512VLDQ_AVX10_1. Remove target check. | |
23095 | (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to | |
23096 | VF1_AVX512VLDQ_AVX10_1. Remove target check. | |
23097 | (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto. | |
23098 | (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ. | |
23099 | (avx512vl_vextractf128<mode>): Change iterator to | |
23100 | VI48F_256_DQVL_AVX10_1. Remove target check. | |
23101 | (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1. | |
23102 | (vec_extract_hi_<mode>): Ditto. | |
23103 | (avx512vl_vinsert<mode>): Ditto. | |
23104 | (vec_set_lo_<mode><mask_name>): Ditto. | |
23105 | (vec_set_hi_<mode><mask_name>): Ditto. | |
23106 | (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change | |
23107 | iterator to VF_AVX512VLDQ_AVX10_1. Remove target check. | |
23108 | (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change | |
23109 | iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check. | |
23110 | * config/i386/subst.md (mask_avx512dq_condition): Add | |
23111 | TARGET_AVX10_1. | |
23112 | (mask_scalar_merge): Ditto. | |
23113 | ||
23114 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
23115 | ||
23116 | * config/i386/avx512vldqintrin.h: Remove target attribute. | |
23117 | * config/i386/i386-builtin.def (BDESC): | |
23118 | Add OPTION_MASK_ISA2_AVX10_1. | |
23119 | * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1. | |
23120 | * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New. | |
23121 | (VI48_AVX512VLDQ_AVX10_1): Ditto. | |
23122 | (VF2_AVX512VL): Remove. | |
23123 | (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512. | |
23124 | Add TARGET_AVX10_1. | |
23125 | (*<code><mode>3<mask_name>): Change isa attribute to | |
23126 | avx10_1_or_avx512dq. Add TARGET_AVX10_1. | |
23127 | (<code><mode>3): Add TARGET_AVX10_1. Change isa attr | |
23128 | to avx10_1_or_avx512vl. | |
23129 | (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>): | |
23130 | Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check. | |
23131 | (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>): | |
23132 | Add TARGET_AVX10_1. | |
23133 | (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>): | |
23134 | Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check. | |
23135 | (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>): | |
23136 | Add TARGET_AVX10_1. | |
23137 | (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>): | |
23138 | Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check. | |
23139 | (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>): | |
23140 | Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check. | |
23141 | (float<floatunssuffix>v4div4sf2<mask_name>): | |
23142 | Add TARGET_AVX10_1. | |
23143 | (avx512dq_float<floatunssuffix>v2div2sf2): Ditto. | |
23144 | (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto. | |
23145 | (float<floatunssuffix>v2div2sf2): Ditto. | |
23146 | (float<floatunssuffix>v2div2sf2_mask): Ditto. | |
23147 | (*float<floatunssuffix>v2div2sf2_mask): Ditto. | |
23148 | (*float<floatunssuffix>v2div2sf2_mask_1): Ditto. | |
23149 | (<avx512>_cvt<ssemodesuffix>2mask<mode>): | |
23150 | Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check. | |
23151 | (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto. | |
23152 | (*<avx512>_cvtmask2<ssemodesuffix><mode>): | |
23153 | Change iterator to VI48_AVX512VL_AVX10_1. Remove target check. | |
23154 | Change when constraint is enabled. | |
23155 | ||
23156 | 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23157 | ||
23158 | PR target/111037 | |
23159 | * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function. | |
23160 | (second_sew_less_than_first_sew_p): Fix bug. | |
23161 | (first_sew_less_than_second_sew_p): Ditto. | |
23162 | ||
23163 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
23164 | ||
23165 | * config/i386/avx512vldqintrin.h: Remove target attribute. | |
23166 | * config/i386/i386-builtin.def (BDESC): | |
23167 | Add OPTION_MASK_ISA2_AVX10_1. | |
23168 | * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1. | |
23169 | * config/i386/i386-expand.cc | |
23170 | (ix86_check_builtin_isa_match): Ditto. | |
23171 | (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1. | |
23172 | * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq | |
23173 | and avx10_1_or_avx512vl. | |
23174 | * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New. | |
23175 | (VF1_128_256VLDQ_AVX10_1): Ditto. | |
23176 | (VI8_AVX512VLDQ_AVX10_1): Ditto. | |
23177 | (<sse>_andnot<mode>3<mask_name>): | |
23178 | Add TARGET_AVX10_1 and change isa attr from avx512dq to | |
23179 | avx10_1_or_avx512dq. | |
23180 | (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from | |
23181 | avx512vl to avx10_1_or_avx512vl. | |
23182 | (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>): | |
23183 | Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check. | |
23184 | (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>): | |
23185 | Ditto. | |
23186 | (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>): | |
23187 | Ditto. | |
23188 | (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>): | |
23189 | Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check. | |
23190 | (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>): | |
23191 | Add TARGET_AVX10_1. | |
23192 | (fix<fixunssuffix>_truncv2sfv2di2): Ditto. | |
23193 | (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL. | |
23194 | Remove target check. | |
23195 | (avx512dq_mul<mode>3<mask_name>): Ditto. | |
23196 | (*avx512dq_mul<mode>3<mask_name>): Ditto. | |
23197 | (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1. | |
23198 | (<mask_codefor>avx512dq_broadcast<mode><mask_name>): | |
23199 | Remove target check. | |
23200 | (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1. | |
23201 | (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): | |
23202 | Remove target check. | |
23203 | * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1. | |
23204 | (mask_avx512vl_condition): Ditto. | |
23205 | (mask): Ditto. | |
23206 | ||
23207 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
23208 | ||
23209 | * common/config/i386/i386-common.cc | |
23210 | (ix86_check_avx10_vector_width): New function to check isa_flags | |
23211 | to emit a warning when there is a conflict in AVX10 options for | |
23212 | vector width. | |
23213 | (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512. | |
23214 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
23215 | Do not append -mno-avx10-max-512bit for -march=native. | |
23216 | ||
23217 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
23218 | ||
23219 | * common/config/i386/i386-common.cc | |
23220 | (ix86_check_avx10): New function to check isa_flags and | |
23221 | isa_flags_explicit to emit warning when AVX10 is enabled | |
23222 | by "-m" option. | |
23223 | (ix86_check_avx512): New function to check isa_flags and | |
23224 | isa_flags_explicit to emit warning when AVX512 is enabled | |
23225 | by "-m" option. | |
23226 | (ix86_handle_option): Do not change the flags when warning | |
23227 | is emitted. | |
23228 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
23229 | Do not append -mno-avx10.1 for -march=native. | |
23230 | ||
23231 | 2023-08-17 Haochen Jiang <haochen.jiang@intel.com> | |
23232 | ||
23233 | * common/config/i386/cpuinfo.h (get_available_features): | |
23234 | Add avx10_set and version and detect avx10.1. | |
23235 | (cpu_indicator_init): Handle avx10.1-512. | |
23236 | * common/config/i386/i386-common.cc | |
23237 | (OPTION_MASK_ISA2_AVX10_512BIT_SET): New. | |
23238 | (OPTION_MASK_ISA2_AVX10_1_SET): Ditto. | |
23239 | (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto. | |
23240 | (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto. | |
23241 | (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1. | |
23242 | (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and | |
23243 | -mavx10.1-512. | |
23244 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
23245 | Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and | |
23246 | FEATURE_AVX10_512BIT. | |
23247 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
23248 | AVX10_512BIT, AVX10_1 and AVX10_1_512. | |
23249 | * config/i386/constraints.md (Yk): Add AVX10_1. | |
23250 | (Yv): Ditto. | |
23251 | (k): Ditto. | |
23252 | * config/i386/cpuid.h (bit_AVX10): New. | |
23253 | (bit_AVX10_256): Ditto. | |
23254 | (bit_AVX10_512): Ditto. | |
23255 | * config/i386/i386-c.cc (ix86_target_macros_internal): | |
23256 | Define AVX10_512BIT and AVX10_1. | |
23257 | * config/i386/i386-isa.def | |
23258 | (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT). | |
23259 | (AVX10_1): Add DEF_PTA(AVX10_1). | |
23260 | * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1. | |
23261 | (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1 | |
23262 | and avx10.1-512. | |
23263 | (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16, | |
23264 | FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512. | |
23265 | (ix86_valid_target_attribute_inner_p): Handle AVX10_1. | |
23266 | * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1. | |
23267 | (ix86_conditional_register_usage): Ditto. | |
23268 | (ix86_hard_regno_mode_ok): Ditto. | |
23269 | (ix86_rtx_costs): Ditto. | |
23270 | * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro. | |
23271 | * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and | |
23272 | -mavx10.1-512. | |
23273 | * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512. | |
23274 | * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512. | |
23275 | * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256 | |
23276 | and avx10.1-512. | |
23277 | ||
23278 | 2023-08-17 Sergei Trofimovich <siarheit@google.com> | |
23279 | ||
23280 | * flag-types.h (vrp_mode): Remove unused. | |
23281 | ||
23282 | 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com> | |
23283 | ||
23284 | * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use | |
23285 | CONSTM1_RTX. | |
23286 | ||
23287 | 2023-08-17 Andrew Pinski <apinski@marvell.com> | |
23288 | ||
23289 | * internal-fn.def (COND_NOT): New internal function. | |
23290 | * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not | |
23291 | to the lists. | |
23292 | (`vec (a ? -1 : 0) ^ b`): New pattern to convert | |
23293 | into conditional not. | |
23294 | * optabs.def (cond_one_cmpl): New optab. | |
23295 | (cond_len_one_cmpl): Likewise. | |
23296 | ||
23297 | 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com> | |
23298 | ||
23299 | PR rtl-optimization/110254 | |
23300 | * ira-color.cc (improve_allocation): Update array | |
23301 | allocated_hard_reg_p. | |
23302 | ||
23303 | 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com> | |
23304 | ||
23305 | * lra-int.h (lra_update_fp2sp_elimination): Change the prototype. | |
23306 | * lra-eliminations.cc (spill_pseudos): Record spilled pseudos. | |
23307 | (lra_update_fp2sp_elimination): Ditto. | |
23308 | (update_reg_eliminate): Adjust spill_pseudos call. | |
23309 | * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled | |
23310 | in lra_update_fp2sp_elimination. | |
23311 | ||
23312 | 2023-08-16 Richard Ball <richard.ball@arm.com> | |
23313 | ||
23314 | * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU. | |
23315 | * config/aarch64/aarch64-tune.md: Regenerate. | |
23316 | * doc/invoke.texi: Document Cortex-A720 CPU. | |
23317 | ||
23318 | 2023-08-16 Robin Dapp <rdapp@ventanamicro.com> | |
23319 | ||
23320 | * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor): | |
23321 | Implement expander. | |
23322 | (<u>avg<v_double_trunc>3_ceil): Ditto. | |
23323 | * config/riscv/vector-iterators.md (ashiftrt): New iterator. | |
23324 | (ASHIFTRT): Ditto. | |
23325 | ||
23326 | 2023-08-16 Robin Dapp <rdapp@ventanamicro.com> | |
23327 | ||
23328 | * internal-fn.cc (vec_extract_direct): Change type argument | |
23329 | numbers. | |
23330 | (expand_vec_extract_optab_fn): Call convert_optab_fn. | |
23331 | (direct_vec_extract_optab_supported_p): Use | |
23332 | convert_optab_supported_p. | |
23333 | ||
23334 | 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
23335 | Richard Sandiford <richard.sandiford@arm.com> | |
23336 | ||
23337 | * fold-const.cc (INCLUDE_ALGORITHM): Add Include. | |
23338 | (valid_mask_for_fold_vec_perm_cst_p): New function. | |
23339 | (fold_vec_perm_cst): Likewise. | |
23340 | (fold_vec_perm): Adjust assert and call fold_vec_perm_cst. | |
23341 | (test_fold_vec_perm_cst): New namespace. | |
23342 | (test_fold_vec_perm_cst::build_vec_cst_rand): New function. | |
23343 | (test_fold_vec_perm_cst::validate_res): Likewise. | |
23344 | (test_fold_vec_perm_cst::validate_res_vls): Likewise. | |
23345 | (test_fold_vec_perm_cst::builder_push_elems): Likewise. | |
23346 | (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise. | |
23347 | (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise. | |
23348 | (test_fold_vec_perm_cst::test_all_nunits): Likewise. | |
23349 | (test_fold_vec_perm_cst::test_nunits_min_2): Likewise. | |
23350 | (test_fold_vec_perm_cst::test_nunits_min_4): Likewise. | |
23351 | (test_fold_vec_perm_cst::test_nunits_min_8): Likewise. | |
23352 | (test_fold_vec_perm_cst::test_nunits_max_4): Likewise. | |
23353 | (test_fold_vec_perm_cst::is_simple_vla_size): Likewise. | |
23354 | (test_fold_vec_perm_cst::test): Likewise. | |
23355 | (fold_const_cc_tests): Call test_fold_vec_perm_cst::test. | |
23356 | ||
23357 | 2023-08-16 Pan Li <pan2.li@intel.com> | |
23358 | ||
23359 | * config/riscv/riscv-vector-builtins-bases.cc | |
23360 | (BASE): New declaration. | |
23361 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23362 | * config/riscv/riscv-vector-builtins-functions.def | |
23363 | (vfwcvt_xu_frm): New intrinsic function def. | |
23364 | ||
23365 | 2023-08-16 Pan Li <pan2.li@intel.com> | |
23366 | ||
23367 | * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument. | |
23368 | ||
23369 | 2023-08-16 Pan Li <pan2.li@intel.com> | |
23370 | ||
23371 | * config/riscv/riscv-vector-builtins-bases.cc | |
23372 | (BASE): New declaration. | |
23373 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23374 | * config/riscv/riscv-vector-builtins-functions.def | |
23375 | (vfwcvt_x_frm): New intrinsic function def. | |
23376 | ||
23377 | 2023-08-16 Pan Li <pan2.li@intel.com> | |
23378 | ||
23379 | * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration. | |
23380 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23381 | * config/riscv/riscv-vector-builtins-functions.def | |
23382 | (vfcvt_f_frm): New intrinsic function def. | |
23383 | ||
23384 | 2023-08-16 Pan Li <pan2.li@intel.com> | |
23385 | ||
23386 | * config/riscv/riscv-vector-builtins-bases.cc | |
23387 | (BASE): New declaration. | |
23388 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23389 | * config/riscv/riscv-vector-builtins-functions.def | |
23390 | (vfcvt_xu_frm): New intrinsic function def.. | |
23391 | ||
23392 | 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org> | |
23393 | ||
23394 | PR target/110429 | |
23395 | * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector | |
23396 | extract when the element is 7 on BE while 8 on LE for byte or 3 on | |
23397 | BE while 4 on LE for halfword. | |
23398 | ||
23399 | 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org> | |
23400 | ||
23401 | PR target/106769 | |
23402 | * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only | |
23403 | for V8HI and V16QI. | |
23404 | (vsx_extract_v4si): New expand for V4SI extraction. | |
23405 | (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on | |
23406 | word 1 from BE order. | |
23407 | (*mfvsrwz): New insn pattern for mfvsrwz. | |
23408 | (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on | |
23409 | word 1 from BE order. | |
23410 | (*vsx_extract_si): Remove. | |
23411 | (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2, | |
23412 | 3 from BE order. | |
23413 | ||
23414 | 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23415 | ||
23416 | * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>): | |
23417 | New pattern. | |
23418 | (vec_mask_len_store_lanes<mode><vsingle>): Ditto. | |
23419 | * config/riscv/riscv-protos.h (expand_lanes_load_store): New function. | |
23420 | * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode. | |
23421 | (expand_lanes_load_store): New function. | |
23422 | * config/riscv/vector-iterators.md: New iterator. | |
23423 | ||
23424 | 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23425 | ||
23426 | * internal-fn.cc (internal_load_fn_p): Apply | |
23427 | MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer. | |
23428 | (internal_store_fn_p): Ditto. | |
23429 | (internal_fn_len_index): Ditto. | |
23430 | (internal_fn_mask_index): Ditto. | |
23431 | (internal_fn_stored_value_index): Ditto. | |
23432 | * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto. | |
23433 | (vect_load_lanes_supported): Ditto. | |
23434 | * tree-vect-loop.cc: Ditto. | |
23435 | * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto. | |
23436 | * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto. | |
23437 | (get_group_load_store_type): Ditto. | |
23438 | (vectorizable_store): Ditto. | |
23439 | (vectorizable_load): Ditto. | |
23440 | * tree-vectorizer.h (vect_store_lanes_supported): Ditto. | |
23441 | (vect_load_lanes_supported): Ditto. | |
23442 | ||
23443 | 2023-08-16 Pan Li <pan2.li@intel.com> | |
23444 | ||
23445 | * config/riscv/riscv-vector-builtins-bases.cc | |
23446 | (enum frm_op_type): New type for frm. | |
23447 | (BASE): New declaration. | |
23448 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23449 | * config/riscv/riscv-vector-builtins-functions.def | |
23450 | (vfcvt_x_frm): New intrinsic function def. | |
23451 | ||
23452 | 2023-08-16 liuhongt <hongtao.liu@intel.com> | |
23453 | ||
23454 | * config/i386/i386-builtins.cc | |
23455 | (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts. | |
23456 | * config/i386/i386-options.cc (parse_mtune_ctrl_str): | |
23457 | Set/Clear tune features use_{gather,scatter}_{2parts, 4parts, | |
23458 | 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}. | |
23459 | * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust | |
23460 | for use_scatter_8parts | |
23461 | * config/i386/i386.h (TARGET_USE_GATHER): Rename to .. | |
23462 | (TARGET_USE_GATHER_8PARTS): .. this. | |
23463 | (TARGET_USE_SCATTER): Rename to .. | |
23464 | (TARGET_USE_SCATTER_8PARTS): .. this. | |
23465 | * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to | |
23466 | (X86_TUNE_USE_GATHER_8PARTS): .. this. | |
23467 | (X86_TUNE_USE_SCATTER): Rename to | |
23468 | (X86_TUNE_USE_SCATTER_8PARTS): .. this. | |
23469 | * config/i386/i386.opt: Add new options mgather, mscatter. | |
23470 | ||
23471 | 2023-08-16 liuhongt <hongtao.liu@intel.com> | |
23472 | ||
23473 | * config/i386/i386-options.cc (m_GDS): New macro. | |
23474 | * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't | |
23475 | enable for m_GDS. | |
23476 | (X86_TUNE_USE_GATHER_4PARTS): Ditto. | |
23477 | (X86_TUNE_USE_GATHER): Ditto. | |
23478 | ||
23479 | 2023-08-16 liuhongt <hongtao.liu@intel.com> | |
23480 | ||
23481 | * config/i386/i386.md (movdf_internal): Generate vmovapd instead of | |
23482 | vmovsd when moving DFmode between SSE_REGS. | |
23483 | (movhi_internal): Generate vmovdqa instead of vmovsh when | |
23484 | moving HImode between SSE_REGS. | |
23485 | (mov<mode>_internal): Use vmovaps instead of vmovsh when | |
23486 | moving HF/BFmode between SSE_REGS. | |
23487 | ||
23488 | 2023-08-15 David Faust <david.faust@oracle.com> | |
23489 | ||
23490 | * config/bpf/bpf.md (extendsisi2): Delete useless define_insn. | |
23491 | ||
23492 | 2023-08-15 David Faust <david.faust@oracle.com> | |
23493 | ||
23494 | PR target/111029 | |
23495 | * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers | |
23496 | for any mode 32-bits or smaller, not just SImode. | |
23497 | ||
23498 | 2023-08-15 Martin Jambor <mjambor@suse.cz> | |
23499 | ||
23500 | PR ipa/68930 | |
23501 | PR ipa/92497 | |
23502 | * ipa-prop.h (ipcp_get_aggregate_const): Declare. | |
23503 | * ipa-prop.cc (ipcp_get_aggregate_const): New function. | |
23504 | (ipcp_transform_function): Do not deallocate transformation info. | |
23505 | * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and | |
23506 | ipa-prop.h. | |
23507 | (vn_reference_lookup_2): When hitting default-def vuse, query | |
23508 | IPA-CP transformation info for any known constants. | |
23509 | ||
23510 | 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com> | |
23511 | Thomas Schwinge <thomas@codesourcery.com> | |
23512 | ||
23513 | * gimplify.cc (oacc_region_type_name): New function. | |
23514 | (oacc_default_clause): If no 'default' clause appears on this | |
23515 | compute construct, see if one appears on a lexically containing | |
23516 | 'data' construct. | |
23517 | (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set | |
23518 | ctx->oacc_default_clause_ctx to current context. | |
23519 | ||
23520 | 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23521 | ||
23522 | PR target/110989 | |
23523 | * config/riscv/predicates.md: Fix predicate. | |
23524 | ||
23525 | 2023-08-15 Richard Biener <rguenther@suse.de> | |
23526 | ||
23527 | * tree-vect-slp.cc (vect_analyze_slp_instance): Remove | |
23528 | slp_inst_kind_ctor handling. | |
23529 | (vect_analyze_slp): Simplify. | |
23530 | (vect_build_slp_instance): Dump when we analyze a CTOR. | |
23531 | (vect_slp_check_for_constructors): Rename to ... | |
23532 | (vect_slp_check_for_roots): ... this. Register a | |
23533 | slp_root for CONSTRUCTORs instead of shoving them to | |
23534 | the set of grouped stores. | |
23535 | (vect_slp_analyze_bb_1): Adjust. | |
23536 | ||
23537 | 2023-08-15 Richard Biener <rguenther@suse.de> | |
23538 | ||
23539 | * tree-vectorizer.h (_slp_instance::remain_stmts): Change | |
23540 | to ... | |
23541 | (_slp_instance::remain_defs): ... this. | |
23542 | (SLP_INSTANCE_REMAIN_STMTS): Rename to ... | |
23543 | (SLP_INSTANCE_REMAIN_DEFS): ... this. | |
23544 | (slp_root::remain): New. | |
23545 | (slp_root::slp_root): Adjust. | |
23546 | * tree-vect-slp.cc (vect_free_slp_instance): Adjust. | |
23547 | (vect_build_slp_instance): Get extra remain parameter, | |
23548 | adjust former handling of a cut off stmt. | |
23549 | (vect_analyze_slp_instance): Adjust. | |
23550 | (vect_analyze_slp): Likewise. | |
23551 | (_bb_vec_info::~_bb_vec_info): Likewise. | |
23552 | (vectorizable_bb_reduc_epilogue): Dump something if we fail. | |
23553 | (vect_slp_check_for_constructors): Handle non-internal | |
23554 | defs as remain defs of a reduction. | |
23555 | (vectorize_slp_instance_root_stmt): Adjust. | |
23556 | ||
23557 | 2023-08-15 Richard Biener <rguenther@suse.de> | |
23558 | ||
23559 | * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h | |
23560 | (canonicalize_loop_induction_variables): Use find_loop_location. | |
23561 | ||
23562 | 2023-08-15 Hans-Peter Nilsson <hp@axis.com> | |
23563 | ||
23564 | PR bootstrap/111021 | |
23565 | * config/cris/cris-protos.h: Revert recent change. | |
23566 | * config/cris/cris.cc (cris_legitimate_address_p): Remove | |
23567 | code_helper unused parameter. | |
23568 | (cris_legitimate_address_p_hook): New wrapper function. | |
23569 | (TARGET_LEGITIMATE_ADDRESS_P): Change to | |
23570 | cris_legitimate_address_p_hook. | |
23571 | ||
23572 | 2023-08-15 Richard Biener <rguenther@suse.de> | |
23573 | ||
23574 | PR tree-optimization/110963 | |
23575 | * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert | |
23576 | a PHI node when the expression is available on all edges | |
23577 | and we insert at most one copy from a constant. | |
23578 | ||
23579 | 2023-08-15 Richard Biener <rguenther@suse.de> | |
23580 | ||
23581 | PR tree-optimization/110991 | |
23582 | * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle | |
23583 | VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles | |
23584 | that will end up constant. | |
23585 | ||
23586 | 2023-08-15 Kewen Lin <linkw@linux.ibm.com> | |
23587 | ||
23588 | PR bootstrap/111021 | |
23589 | * Makefile.in (RECOG_H): Add $(TREE_H) as dependence. | |
23590 | ||
23591 | 2023-08-15 Kewen Lin <linkw@linux.ibm.com> | |
23592 | ||
23593 | * tree-vect-stmts.cc (vectorizable_load): Move the handlings on | |
23594 | VMAT_LOAD_STORE_LANES in the final loop nest to its own loop, | |
23595 | and update the final nest accordingly. | |
23596 | ||
23597 | 2023-08-15 Kewen Lin <linkw@linux.ibm.com> | |
23598 | ||
23599 | * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks | |
23600 | on VMAT_INVARIANT. | |
23601 | ||
23602 | 2023-08-15 Pan Li <pan2.li@intel.com> | |
23603 | ||
23604 | * mode-switching.cc (create_pre_exit): Add SET insn check. | |
23605 | ||
23606 | 2023-08-15 Pan Li <pan2.li@intel.com> | |
23607 | ||
23608 | * config/riscv/riscv-vector-builtins-bases.cc | |
23609 | (class vfrec7_frm): New class for frm. | |
23610 | (vfrec7_frm_obj): New declaration. | |
23611 | (BASE): Ditto. | |
23612 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23613 | * config/riscv/riscv-vector-builtins-functions.def | |
23614 | (vfrec7_frm): New intrinsic function definition. | |
23615 | * config/riscv/vector-iterators.md | |
23616 | (VFMISC): Remove VFREC7. | |
23617 | (misc_op): Ditto. | |
23618 | (float_insn_type): Ditto. | |
23619 | (VFMISC_FRM): New int iterator. | |
23620 | (misc_frm_op): New op for frm. | |
23621 | (float_frm_insn_type): New type for frm. | |
23622 | * config/riscv/vector.md (@pred_<misc_frm_op><mode>): | |
23623 | New pattern for misc frm. | |
23624 | ||
23625 | 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com> | |
23626 | ||
23627 | * lra-constraints.cc (curr_insn_transform): Process output stack | |
23628 | pointer reloads before emitting reload insns. | |
23629 | ||
23630 | 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org> | |
23631 | ||
23632 | PR analyzer/110543 | |
23633 | * doc/invoke.texi: Add documentation of | |
23634 | fanalyzer-show-events-in-system-headers | |
23635 | ||
23636 | 2023-08-14 Jan Hubicka <jh@suse.cz> | |
23637 | ||
23638 | PR gcov-profile/110988 | |
23639 | * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero. | |
23640 | ||
23641 | 2023-08-14 Jiawei <jiawei@iscas.ac.cn> | |
23642 | ||
23643 | * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): | |
23644 | Enable compressed builtins when ZC* extensions enabled. | |
23645 | * config/riscv/riscv-shorten-memrefs.cc: | |
23646 | Enable shorten_memrefs pass when ZC* extensions enabled. | |
23647 | * config/riscv/riscv.cc (riscv_compressed_reg_p): | |
23648 | Enable compressible registers when ZC* extensions enabled. | |
23649 | (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled. | |
23650 | (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled. | |
23651 | (riscv_first_stack_step): Allow compression of the register saves | |
23652 | without adding extra instructions. | |
23653 | * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary | |
23654 | to 16 bits when ZC* extensions enabled. | |
23655 | ||
23656 | 2023-08-14 Jiawei <jiawei@iscas.ac.cn> | |
23657 | ||
23658 | * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions. | |
23659 | * config/riscv/riscv-opts.h (MASK_ZCA): New mask. | |
23660 | (MASK_ZCB): Ditto. | |
23661 | (MASK_ZCE): Ditto. | |
23662 | (MASK_ZCF): Ditto. | |
23663 | (MASK_ZCD): Ditto. | |
23664 | (MASK_ZCMP): Ditto. | |
23665 | (MASK_ZCMT): Ditto. | |
23666 | (TARGET_ZCA): New target. | |
23667 | (TARGET_ZCB): Ditto. | |
23668 | (TARGET_ZCE): Ditto. | |
23669 | (TARGET_ZCF): Ditto. | |
23670 | (TARGET_ZCD): Ditto. | |
23671 | (TARGET_ZCMP): Ditto. | |
23672 | (TARGET_ZCMT): Ditto. | |
23673 | * config/riscv/riscv.opt: New target variable. | |
23674 | ||
23675 | 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23676 | ||
23677 | Revert: | |
23678 | 2023-05-17 Jin Ma <jinma@linux.alibaba.com> | |
23679 | ||
23680 | * genrecog.cc (print_nonbool_test): Fix type error of | |
23681 | switch (SUBREG_BYTE (op))'. | |
23682 | ||
23683 | 2023-08-14 Richard Biener <rguenther@suse.de> | |
23684 | ||
23685 | * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'. | |
23686 | ||
23687 | 2023-08-14 Pan Li <pan2.li@intel.com> | |
23688 | ||
23689 | * config/riscv/riscv-vector-builtins-bases.cc | |
23690 | (class unop_frm): New class for frm. | |
23691 | (vfsqrt_frm_obj): New declaration. | |
23692 | (BASE): Ditto. | |
23693 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23694 | * config/riscv/riscv-vector-builtins-functions.def | |
23695 | (vfsqrt_frm): New intrinsic function definition. | |
23696 | ||
23697 | 2023-08-14 Pan Li <pan2.li@intel.com> | |
23698 | ||
23699 | * config/riscv/riscv-vector-builtins-bases.cc | |
23700 | (class vfwnmsac_frm): New class for frm. | |
23701 | (vfwnmsac_frm_obj): New declaration. | |
23702 | (BASE): Ditto. | |
23703 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23704 | * config/riscv/riscv-vector-builtins-functions.def | |
23705 | (vfwnmsac_frm): New intrinsic function definition. | |
23706 | ||
23707 | 2023-08-14 Pan Li <pan2.li@intel.com> | |
23708 | ||
23709 | * config/riscv/riscv-vector-builtins-bases.cc | |
23710 | (class vfwmsac_frm): New class for frm. | |
23711 | (vfwmsac_frm_obj): New declaration. | |
23712 | (BASE): Ditto. | |
23713 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23714 | * config/riscv/riscv-vector-builtins-functions.def | |
23715 | (vfwmsac_frm): New intrinsic function definition. | |
23716 | ||
23717 | 2023-08-14 Pan Li <pan2.li@intel.com> | |
23718 | ||
23719 | * config/riscv/riscv-vector-builtins-bases.cc | |
23720 | (class vfwnmacc_frm): New class for frm. | |
23721 | (vfwnmacc_frm_obj): New declaration. | |
23722 | (BASE): Ditto. | |
23723 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23724 | * config/riscv/riscv-vector-builtins-functions.def | |
23725 | (vfwnmacc_frm): New intrinsic function definition. | |
23726 | ||
23727 | 2023-08-14 Cui, Lili <lili.cui@intel.com> | |
23728 | ||
23729 | * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba | |
23730 | to Raptorlake. | |
23731 | ||
23732 | 2023-08-14 Hans-Peter Nilsson <hp@axis.com> | |
23733 | ||
23734 | * config/mmix/predicates.md (mmix_address_operand): Use | |
23735 | lra_in_progress, not reload_in_progress. | |
23736 | ||
23737 | 2023-08-14 Hans-Peter Nilsson <hp@axis.com> | |
23738 | ||
23739 | * config/mmix/mmix.cc: Re-enable LRA. | |
23740 | ||
23741 | 2023-08-14 Hans-Peter Nilsson <hp@axis.com> | |
23742 | ||
23743 | * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset | |
23744 | when lra_in_progress. | |
23745 | ||
23746 | 2023-08-14 Hans-Peter Nilsson <hp@axis.com> | |
23747 | ||
23748 | * config/mmix/mmix.cc: Disable LRA for MMIX. | |
23749 | ||
23750 | 2023-08-14 Pan Li <pan2.li@intel.com> | |
23751 | ||
23752 | * config/riscv/riscv-vector-builtins-bases.cc | |
23753 | (class vfwmacc_frm): New class for vfwmacc frm. | |
23754 | (vfwmacc_frm_obj): New declaration. | |
23755 | (BASE): Ditto. | |
23756 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23757 | * config/riscv/riscv-vector-builtins-functions.def | |
23758 | (vfwmacc_frm): Function definition for vfwmacc. | |
23759 | * config/riscv/riscv-vector-builtins.cc | |
23760 | (function_expander::use_widen_ternop_insn): Add frm support. | |
23761 | ||
23762 | 2023-08-14 Pan Li <pan2.li@intel.com> | |
23763 | ||
23764 | * config/riscv/riscv-vector-builtins-bases.cc | |
23765 | (class vfnmsub_frm): New class for vfnmsub frm. | |
23766 | (vfnmsub_frm): New declaration. | |
23767 | (BASE): Ditto. | |
23768 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23769 | * config/riscv/riscv-vector-builtins-functions.def | |
23770 | (vfnmsub_frm): New function declaration. | |
23771 | ||
23772 | 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com> | |
23773 | ||
23774 | * lra-constraints.cc (curr_insn_transform): Set done_p up and | |
23775 | check it on true after processing output stack pointer reload. | |
23776 | ||
23777 | 2023-08-12 Jakub Jelinek <jakub@redhat.com> | |
23778 | ||
23779 | * Makefile.in (USER_H): Add stdckdint.h. | |
23780 | * ginclude/stdckdint.h: New file. | |
23781 | ||
23782 | 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23783 | ||
23784 | PR target/110994 | |
23785 | * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR. | |
23786 | ||
23787 | 2023-08-12 Patrick Palka <ppalka@redhat.com> | |
23788 | ||
23789 | * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>: | |
23790 | Delimit output with braces. | |
23791 | ||
23792 | 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23793 | ||
23794 | PR target/110985 | |
23795 | * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander. | |
23796 | ||
23797 | 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23798 | ||
23799 | * config/riscv/autovec.md: Add VLS CONST_VECTOR. | |
23800 | * config/riscv/riscv.cc (riscv_const_insns): Ditto. | |
23801 | * config/riscv/vector.md: Ditto. | |
23802 | ||
23803 | 2023-08-11 David Malcolm <dmalcolm@redhat.com> | |
23804 | ||
23805 | PR analyzer/105899 | |
23806 | * doc/analyzer.texi (__analyzer_get_strlen): New. | |
23807 | * doc/invoke.texi: Add -Wanalyzer-unterminated-string. | |
23808 | ||
23809 | 2023-08-11 Jeff Law <jlaw@ventanamicro.com> | |
23810 | ||
23811 | * config/rx/rx.md (subdi3): Fix test for borrow. | |
23812 | ||
23813 | 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23814 | ||
23815 | PR middle-end/110989 | |
23816 | * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype. | |
23817 | (vectorizable_load): Ditto. | |
23818 | ||
23819 | 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com> | |
23820 | ||
23821 | * config/bpf/bpf.md (allocate_stack): Define. | |
23822 | * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake | |
23823 | stack pointer register. | |
23824 | (FIXED_REGISTERS): Adjust accordingly. | |
23825 | (CALL_USED_REGISTERS): Likewise. | |
23826 | (REG_CLASS_CONTENTS): Likewise. | |
23827 | (REGISTER_NAMES): Likewise. | |
23828 | * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve | |
23829 | space for callee-saved registers. | |
23830 | (bpf_expand_prologue): Do not save callee-saved registers in xbpf. | |
23831 | (bpf_expand_epilogue): Do not restore callee-saved registers in | |
23832 | xbpf. | |
23833 | ||
23834 | 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com> | |
23835 | ||
23836 | * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain | |
23837 | about too many arguments if function is always inlined. | |
23838 | ||
23839 | 2023-08-11 Patrick Palka <ppalka@redhat.com> | |
23840 | ||
23841 | * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>: | |
23842 | Don't call component_ref_field_offset if the RHS isn't a decl. | |
23843 | ||
23844 | 2023-08-11 John David Anglin <danglin@gcc.gnu.org> | |
23845 | ||
23846 | PR bootstrap/110646 | |
23847 | * gensupport.cc(class conlist): Use strtol instead of std::stoi. | |
23848 | ||
23849 | 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com> | |
23850 | ||
23851 | * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag. | |
23852 | (process_alt_operands): Set the flag. | |
23853 | (curr_insn_transform): Modify stack pointer offsets if output | |
23854 | stack pointer reload is generated. | |
23855 | ||
23856 | 2023-08-11 Joseph Myers <joseph@codesourcery.com> | |
23857 | ||
23858 | * configure: Regenerate. | |
23859 | ||
23860 | 2023-08-11 Richard Biener <rguenther@suse.de> | |
23861 | ||
23862 | PR tree-optimization/110979 | |
23863 | * tree-vect-loop.cc (vectorizable_reduction): For | |
23864 | FOLD_LEFT_REDUCTION without target support make sure | |
23865 | we don't need to honor signed zeros and sign dependent rounding. | |
23866 | ||
23867 | 2023-08-11 Richard Biener <rguenther@suse.de> | |
23868 | ||
23869 | * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP | |
23870 | subgraph entries. Dump the used vector size based on the | |
23871 | SLP subgraph entry root vector type. | |
23872 | ||
23873 | 2023-08-11 Pan Li <pan2.li@intel.com> | |
23874 | ||
23875 | * config/riscv/riscv-vector-builtins-bases.cc | |
23876 | (class vfmsub_frm): New class for vfmsub frm. | |
23877 | (vfmsub_frm): New declaration. | |
23878 | (BASE): Ditto. | |
23879 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23880 | * config/riscv/riscv-vector-builtins-functions.def | |
23881 | (vfmsub_frm): New function declaration. | |
23882 | ||
23883 | 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
23884 | ||
23885 | * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns. | |
23886 | * internal-fn.cc (expand_partial_load_optab_fn): Ditto. | |
23887 | (expand_partial_store_optab_fn): Ditto. | |
23888 | * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto. | |
23889 | (MASK_LEN_STORE_LANES): Ditto. | |
23890 | * optabs.def (OPTAB_CD): Ditto. | |
23891 | ||
23892 | 2023-08-11 Pan Li <pan2.li@intel.com> | |
23893 | ||
23894 | * config/riscv/riscv-vector-builtins-bases.cc | |
23895 | (class vfnmadd_frm): New class for vfnmadd frm. | |
23896 | (vfnmadd_frm): New declaration. | |
23897 | (BASE): Ditto. | |
23898 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23899 | * config/riscv/riscv-vector-builtins-functions.def | |
23900 | (vfnmadd_frm): New function declaration. | |
23901 | ||
23902 | 2023-08-11 Drew Ross <drross@redhat.com> | |
23903 | Jakub Jelinek <jakub@redhat.com> | |
23904 | ||
23905 | PR tree-optimization/109938 | |
23906 | * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification. | |
23907 | ||
23908 | 2023-08-11 Pan Li <pan2.li@intel.com> | |
23909 | ||
23910 | * config/riscv/riscv-vector-builtins-bases.cc | |
23911 | (class vfmadd_frm): New class for vfmadd frm. | |
23912 | (vfmadd_frm_obj): New declaration. | |
23913 | (BASE): Ditto. | |
23914 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23915 | * config/riscv/riscv-vector-builtins-functions.def | |
23916 | (vfmadd_frm): New function definition. | |
23917 | ||
23918 | 2023-08-11 Pan Li <pan2.li@intel.com> | |
23919 | ||
23920 | * config/riscv/riscv-vector-builtins-bases.cc | |
23921 | (class vfnmsac_frm): New class for vfnmsac frm. | |
23922 | (vfnmsac_frm_obj): New declaration. | |
23923 | (BASE): Ditto. | |
23924 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23925 | * config/riscv/riscv-vector-builtins-functions.def | |
23926 | (vfnmsac_frm): New function definition. | |
23927 | ||
23928 | 2023-08-11 Jakub Jelinek <jakub@redhat.com> | |
23929 | ||
23930 | * doc/extend.texi (Typeof): Document typeof_unqual | |
23931 | and __typeof_unqual__. | |
23932 | ||
23933 | 2023-08-11 Andrew Pinski <apinski@marvell.com> | |
23934 | ||
23935 | PR tree-optimization/110954 | |
23936 | * generic-match-head.cc (bitwise_inverted_equal_p): Add | |
23937 | wascmp argument and set it accordingly. | |
23938 | * gimple-match-head.cc (bitwise_inverted_equal_p): Add | |
23939 | wascmp argument to the macro. | |
23940 | (gimple_bitwise_inverted_equal_p): Add | |
23941 | wascmp argument and set it accordingly. | |
23942 | * match.pd (`a & ~a`, `a ^| ~a`): Update call | |
23943 | to bitwise_inverted_equal_p and handle wascmp case. | |
23944 | (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update | |
23945 | call to bitwise_inverted_equal_p and check to see | |
23946 | if was !wascmp or if precision was 1. | |
23947 | ||
23948 | 2023-08-11 Martin Uecker <uecker@tugraz.at> | |
23949 | ||
23950 | PR c/84510 | |
23951 | * doc/invoke.texi: Update. | |
23952 | ||
23953 | 2023-08-11 Pan Li <pan2.li@intel.com> | |
23954 | ||
23955 | * config/riscv/riscv-vector-builtins-bases.cc | |
23956 | (class vfmsac_frm): New class for vfmsac frm. | |
23957 | (vfmsac_frm_obj): New declaration. | |
23958 | (BASE): Ditto. | |
23959 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
23960 | * config/riscv/riscv-vector-builtins-functions.def | |
23961 | (vfmsac_frm): New function definition | |
23962 | ||
23963 | 2023-08-10 Jan Hubicka <jh@suse.cz> | |
23964 | ||
23965 | PR middle-end/110923 | |
23966 | * tree-ssa-loop-split.cc (split_loop): Watch for division by zero. | |
23967 | ||
23968 | 2023-08-10 Patrick O'Neill <patrick@rivosinc.com> | |
23969 | ||
23970 | * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as | |
23971 | dependent on 'a' extension. | |
23972 | * config/riscv/riscv-opts.h (MASK_ZTSO): New mask. | |
23973 | (TARGET_ZTSO): New target. | |
23974 | * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add | |
23975 | Ztso case. | |
23976 | (riscv_memmodel_needs_amo_release): Add Ztso case. | |
23977 | (riscv_print_operand): Add Ztso case for LR/SC annotations. | |
23978 | * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md. | |
23979 | * config/riscv/riscv.opt: Add Ztso target variable. | |
23980 | * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or | |
23981 | Ztso specific insn. | |
23982 | (atomic_load<mode>): Expand to RVWMO or Ztso specific insn. | |
23983 | (atomic_store<mode>): Expand to RVWMO or Ztso specific insn. | |
23984 | * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO | |
23985 | specific load/store/fence mappings. | |
23986 | * config/riscv/sync-ztso.md: New file. Seperate out Ztso | |
23987 | specific load/store/fence mappings. | |
23988 | ||
23989 | 2023-08-10 Jan Hubicka <jh@suse.cz> | |
23990 | ||
23991 | * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with | |
23992 | 0 iteration count. | |
23993 | ||
23994 | 2023-08-10 Jan Hubicka <jh@suse.cz> | |
23995 | ||
23996 | * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update. | |
23997 | ||
23998 | 2023-08-10 Jan Hubicka <jh@suse.cz> | |
23999 | ||
24000 | * profile-count.cc (profile_count::differs_from_p): Fix overflow and | |
24001 | handling of undefined values. | |
24002 | ||
24003 | 2023-08-10 Jakub Jelinek <jakub@redhat.com> | |
24004 | ||
24005 | PR c/102989 | |
24006 | * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never | |
24007 | return virtual phis and return NULL if there is a virtual phi | |
24008 | where the arguments from E0 and E1 edges aren't equal. | |
24009 | ||
24010 | 2023-08-10 Richard Biener <rguenther@suse.de> | |
24011 | ||
24012 | * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK, | |
24013 | VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW. | |
24014 | ||
24015 | 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24016 | ||
24017 | PR target/110962 | |
24018 | * config/riscv/autovec.md (vec_duplicate<mode>): New pattern. | |
24019 | ||
24020 | 2023-08-10 Pan Li <pan2.li@intel.com> | |
24021 | ||
24022 | * config/riscv/riscv-vector-builtins-bases.cc | |
24023 | (class vfnmacc_frm): New class for vfnmacc. | |
24024 | (vfnmacc_frm_obj): New declaration. | |
24025 | (BASE): Ditto. | |
24026 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
24027 | * config/riscv/riscv-vector-builtins-functions.def | |
24028 | (vfnmacc_frm): New function definition. | |
24029 | ||
24030 | 2023-08-10 Pan Li <pan2.li@intel.com> | |
24031 | ||
24032 | * config/riscv/riscv-vector-builtins-bases.cc | |
24033 | (class vfmacc_frm): New class for vfmacc frm. | |
24034 | (vfmacc_frm_obj): New declaration. | |
24035 | (BASE): Ditto. | |
24036 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
24037 | * config/riscv/riscv-vector-builtins-functions.def | |
24038 | (vfmacc_frm): New function definition. | |
24039 | ||
24040 | 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24041 | ||
24042 | PR target/110964 | |
24043 | * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary. | |
24044 | ||
24045 | 2023-08-10 Richard Biener <rguenther@suse.de> | |
24046 | ||
24047 | * tree-vectorizer.h (vectorizable_live_operation): Remove | |
24048 | gimple_stmt_iterator * argument. | |
24049 | * tree-vect-loop.cc (vectorizable_live_operation): Likewise. | |
24050 | Adjust plumbing around vect_get_loop_mask. | |
24051 | (vect_analyze_loop_operations): Adjust. | |
24052 | * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise. | |
24053 | (vect_bb_slp_mark_live_stmts): Likewise. | |
24054 | (vect_schedule_slp_node): Likewise. | |
24055 | * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise. | |
24056 | Remove gimple_stmt_iterator * argument. | |
24057 | (vect_transform_stmt): Adjust. | |
24058 | ||
24059 | 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24060 | ||
24061 | * config/riscv/vector-iterators.md: Add missing modes. | |
24062 | ||
24063 | 2023-08-10 Jakub Jelinek <jakub@redhat.com> | |
24064 | ||
24065 | PR c/102989 | |
24066 | * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION | |
24067 | is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT. | |
24068 | ||
24069 | 2023-08-10 Jakub Jelinek <jakub@redhat.com> | |
24070 | ||
24071 | PR c/102989 | |
24072 | * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for | |
24073 | EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple | |
24074 | times. | |
24075 | ||
24076 | 2023-08-10 liuhongt <hongtao.liu@intel.com> | |
24077 | ||
24078 | PR target/110832 | |
24079 | * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not | |
24080 | sanitize upper part of V4HFmode register with | |
24081 | -fno-trapping-math. | |
24082 | (<insn>v4hf3): Enable for ix86_partial_vec_fp_math. | |
24083 | (<divv4hf3): Ditto. | |
24084 | (<insn>v2hf3): Ditto. | |
24085 | (divv2hf3): Ditto. | |
24086 | (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode | |
24087 | register with -fno-trapping-math. | |
24088 | ||
24089 | 2023-08-10 Pan Li <pan2.li@intel.com> | |
24090 | Kito Cheng <kito.cheng@sifive.com> | |
24091 | ||
24092 | * config/riscv/riscv-protos.h | |
24093 | (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL. | |
24094 | (get_frm_mode): New declaration. | |
24095 | * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode. | |
24096 | * config/riscv/riscv-vector-builtins.cc | |
24097 | (function_expander::use_ternop_insn): Take care of frm reg. | |
24098 | * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX. | |
24099 | (riscv_emit_frm_mode_set): Ditto. | |
24100 | (riscv_emit_mode_set): Ditto. | |
24101 | (riscv_frm_adjust_mode_after_call): Ditto. | |
24102 | (riscv_frm_mode_needed): Ditto. | |
24103 | (riscv_frm_mode_after): Ditto. | |
24104 | (riscv_mode_entry): Ditto. | |
24105 | (riscv_mode_exit): Ditto. | |
24106 | * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto. | |
24107 | * config/riscv/vector.md | |
24108 | (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed | |
24109 | (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly. | |
24110 | ||
24111 | 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24112 | ||
24113 | * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix | |
24114 | incorrect anticipate info. | |
24115 | ||
24116 | 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com> | |
24117 | ||
24118 | * common/config/riscv/riscv-common.cc (riscv_ext_version_table): | |
24119 | Remove 'Zve32d' from the version list. | |
24120 | ||
24121 | 2023-08-09 Jin Ma <jinma@linux.alibaba.com> | |
24122 | ||
24123 | * config/riscv/riscv.cc (riscv_sched_variable_issue): New function. | |
24124 | (TARGET_SCHED_VARIABLE_ISSUE): New macro. | |
24125 | Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu> | |
24126 | Co-authored-by: Jeff Law <jlaw@ventanamicro.com> | |
24127 | ||
24128 | 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
24129 | ||
24130 | * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding. | |
24131 | (mem_shadd_or_shadd_rtx_p): New function. | |
24132 | ||
24133 | 2023-08-09 Andrew Pinski <apinski@marvell.com> | |
24134 | ||
24135 | PR tree-optimization/110937 | |
24136 | PR tree-optimization/100798 | |
24137 | * match.pd (`a ? ~b : b`): Handle this | |
24138 | case. | |
24139 | ||
24140 | 2023-08-09 Uros Bizjak <ubizjak@gmail.com> | |
24141 | ||
24142 | * config/i386/i386.opt (mpartial-vector-fp-math): Add dot. | |
24143 | ||
24144 | 2023-08-09 Richard Ball <richard.ball@arm.com> | |
24145 | ||
24146 | * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU. | |
24147 | * config/aarch64/aarch64-tune.md: Regenerate. | |
24148 | * doc/invoke.texi: Document Cortex-A520 CPU. | |
24149 | ||
24150 | 2023-08-09 Carl Love <cel@us.ibm.com> | |
24151 | ||
24152 | * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew): | |
24153 | Move definitions to Altivec stanza. | |
24154 | * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New | |
24155 | define_expand. | |
24156 | ||
24157 | 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24158 | ||
24159 | PR target/110950 | |
24160 | * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1 | |
24161 | stepped vector support. | |
24162 | ||
24163 | 2023-08-09 liuhongt <hongtao.liu@intel.com> | |
24164 | ||
24165 | * common/config/i386/cpuinfo.h (get_available_features): | |
24166 | Rename local variable subleaf_level to max_subleaf_level. | |
24167 | ||
24168 | 2023-08-09 Richard Biener <rguenther@suse.de> | |
24169 | ||
24170 | PR rtl-optimization/110587 | |
24171 | * lra-assigns.cc (find_hard_regno_for_1): Re-order checks. | |
24172 | ||
24173 | 2023-08-09 Kewen Lin <linkw@linux.ibm.com> | |
24174 | ||
24175 | PR tree-optimization/110248 | |
24176 | * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if | |
24177 | the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not | |
24178 | legitimate when outer code is PLUS. | |
24179 | ||
24180 | 2023-08-09 Kewen Lin <linkw@linux.ibm.com> | |
24181 | ||
24182 | PR tree-optimization/110248 | |
24183 | * recog.cc (memory_address_addr_space_p): Add one more argument ch of | |
24184 | type code_helper and pass it to targetm.addr_space.legitimate_address_p | |
24185 | instead of ERROR_MARK. | |
24186 | (offsettable_address_addr_space_p): Update one function pointer with | |
24187 | one more argument of type code_helper as its assignees | |
24188 | memory_address_addr_space_p and strict_memory_address_addr_space_p | |
24189 | have been adjusted, and adjust some call sites with ERROR_MARK. | |
24190 | * recog.h (tree.h): New include header file for tree_code ERROR_MARK. | |
24191 | (memory_address_addr_space_p): Adjust with one more unnamed argument | |
24192 | of type code_helper with default ERROR_MARK. | |
24193 | (strict_memory_address_addr_space_p): Likewise. | |
24194 | * reload.cc (strict_memory_address_addr_space_p): Add one unnamed | |
24195 | argument of type code_helper. | |
24196 | * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of | |
24197 | type code_helper and pass it to memory_address_addr_space_p. | |
24198 | * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with | |
24199 | one more unnamed argument of type code_helper with default value | |
24200 | ERROR_MARK. | |
24201 | * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code | |
24202 | by default, change it with ifn code for USE_PTR_ADDRESS type use, and | |
24203 | pass it to all valid_mem_ref_p calls. | |
24204 | ||
24205 | 2023-08-09 Kewen Lin <linkw@linux.ibm.com> | |
24206 | ||
24207 | PR tree-optimization/110248 | |
24208 | * coretypes.h (class code_helper): Add forward declaration. | |
24209 | * doc/tm.texi: Regenerate. | |
24210 | * lra-constraints.cc (valid_address_p): Call target hook | |
24211 | targetm.addr_space.legitimate_address_p with an extra parameter | |
24212 | ERROR_MARK as its prototype changes. | |
24213 | * recog.cc (memory_address_addr_space_p): Likewise. | |
24214 | * reload.cc (strict_memory_address_addr_space_p): Likewise. | |
24215 | * target.def (legitimate_address_p, addr_space.legitimate_address_p): | |
24216 | Extend with one more argument of type code_helper, update the | |
24217 | documentation accordingly. | |
24218 | * targhooks.cc (default_legitimate_address_p): Adjust for the | |
24219 | new code_helper argument. | |
24220 | (default_addr_space_legitimate_address_p): Likewise. | |
24221 | * targhooks.h (default_legitimate_address_p): Likewise. | |
24222 | (default_addr_space_legitimate_address_p): Likewise. | |
24223 | * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust | |
24224 | with extra unnamed code_helper argument with default ERROR_MARK. | |
24225 | * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise. | |
24226 | * config/arc/arc.cc (arc_legitimate_address_p): Likewise. | |
24227 | * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise. | |
24228 | (tree.h): New include for tree_code ERROR_MARK. | |
24229 | * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra | |
24230 | unnamed code_helper argument with default ERROR_MARK. | |
24231 | * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise. | |
24232 | * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise. | |
24233 | * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise. | |
24234 | * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise. | |
24235 | * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise. | |
24236 | (tree.h): New include for tree_code ERROR_MARK. | |
24237 | * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra | |
24238 | unnamed code_helper argument with default ERROR_MARK. | |
24239 | * config/csky/csky.cc (csky_legitimate_address_p): Likewise. | |
24240 | * config/epiphany/epiphany.cc (epiphany_legitimate_address_p): | |
24241 | Likewise. | |
24242 | * config/frv/frv.cc (frv_legitimate_address_p): Likewise. | |
24243 | * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise. | |
24244 | * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise. | |
24245 | * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise. | |
24246 | * config/i386/i386.cc (ix86_legitimate_address_p): Likewise. | |
24247 | * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise. | |
24248 | * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise. | |
24249 | * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise. | |
24250 | * config/loongarch/loongarch.cc (loongarch_legitimate_address_p): | |
24251 | Likewise. | |
24252 | * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise. | |
24253 | (m32c_addr_space_legitimate_address_p): Likewise. | |
24254 | * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise. | |
24255 | * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise. | |
24256 | * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise. | |
24257 | * config/microblaze/microblaze-protos.h (tree.h): New include for | |
24258 | tree_code ERROR_MARK. | |
24259 | (microblaze_legitimate_address_p): Adjust with extra unnamed | |
24260 | code_helper argument with default ERROR_MARK. | |
24261 | * config/microblaze/microblaze.cc (microblaze_legitimate_address_p): | |
24262 | Likewise. | |
24263 | * config/mips/mips.cc (mips_legitimate_address_p): Likewise. | |
24264 | * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise. | |
24265 | * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise. | |
24266 | * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise. | |
24267 | * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise. | |
24268 | (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper | |
24269 | argument with default ERROR_MARK and adjust the call to function | |
24270 | msp430_legitimate_address_p. | |
24271 | * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra | |
24272 | unnamed code_helper argument with default ERROR_MARK. | |
24273 | * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise. | |
24274 | * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise. | |
24275 | * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise. | |
24276 | * config/pa/pa.cc (pa_legitimate_address_p): Likewise. | |
24277 | * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise. | |
24278 | * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise. | |
24279 | * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise. | |
24280 | * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise. | |
24281 | (tree.h): New include for tree_code ERROR_MARK. | |
24282 | * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with | |
24283 | extra unnamed code_helper argument with default ERROR_MARK. | |
24284 | * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise. | |
24285 | (rs6000_debug_legitimate_address_p): Adjust with extra code_helper | |
24286 | argument and adjust the call to function rs6000_legitimate_address_p. | |
24287 | * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra | |
24288 | unnamed code_helper argument with default ERROR_MARK. | |
24289 | * config/s390/s390.cc (s390_legitimate_address_p): Likewise. | |
24290 | * config/sh/sh.cc (sh_legitimate_address_p): Likewise. | |
24291 | * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise. | |
24292 | * config/v850/v850.cc (v850_legitimate_address_p): Likewise. | |
24293 | * config/vax/vax.cc (vax_legitimate_address_p): Likewise. | |
24294 | * config/visium/visium.cc (visium_legitimate_address_p): Likewise. | |
24295 | * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise. | |
24296 | * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p): | |
24297 | Likewise. | |
24298 | (tree.h): New include for tree_code ERROR_MARK. | |
24299 | * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p): | |
24300 | Adjust with extra unnamed code_helper argument with default | |
24301 | ERROR_MARK. | |
24302 | ||
24303 | 2023-08-09 liuhongt <hongtao.liu@intel.com> | |
24304 | ||
24305 | * common/config/i386/cpuinfo.h (get_available_features): Check | |
24306 | EAX for valid subleaf before use CPUID. | |
24307 | ||
24308 | 2023-08-08 Jeff Law <jlaw@ventanamicro.com> | |
24309 | ||
24310 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode | |
24311 | for the temporary when canonicalizing the condition. | |
24312 | ||
24313 | 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com> | |
24314 | ||
24315 | * config/bpf/core-builtins.cc: Cleaned include headers. | |
24316 | (struct cr_builtins): Added GTY. | |
24317 | (cr_builtins_ref): Created. | |
24318 | (builtins_data) Changed to GC root. | |
24319 | (allocate_builtin_data): Changed. | |
24320 | Included gt-core-builtins.h. | |
24321 | * config/bpf/coreout.cc: (bpf_core_extra) Added GTY. | |
24322 | (bpf_core_extra_ref): Created. | |
24323 | (bpf_comment_info): Changed to GC root. | |
24324 | (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed. | |
24325 | ||
24326 | 2023-08-08 Uros Bizjak <ubizjak@gmail.com> | |
24327 | ||
24328 | PR target/110832 | |
24329 | * config/i386/i386.opt (mpartial-vector-fp-math): New option. | |
24330 | * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize | |
24331 | upper part of V2SFmode register with -fno-trapping-math. | |
24332 | (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math. | |
24333 | (divv2sf3): Ditto. | |
24334 | (<smaxmin:code>v2sf3): Ditto. | |
24335 | (sqrtv2sf2): Ditto. | |
24336 | (*mmx_haddv2sf3_low): Ditto. | |
24337 | (*mmx_hsubv2sf3_low): Ditto. | |
24338 | (vec_addsubv2sf3): Ditto. | |
24339 | (vec_cmpv2sfv2si): Ditto. | |
24340 | (vcond<V2FI:mode>v2sf): Ditto. | |
24341 | (fmav2sf4): Ditto. | |
24342 | (fmsv2sf4): Ditto. | |
24343 | (fnmav2sf4): Ditto. | |
24344 | (fnmsv2sf4): Ditto. | |
24345 | (fix_truncv2sfv2si2): Ditto. | |
24346 | (fixuns_truncv2sfv2si2): Ditto. | |
24347 | (floatv2siv2sf2): Ditto. | |
24348 | (floatunsv2siv2sf2): Ditto. | |
24349 | (nearbyintv2sf2): Ditto. | |
24350 | (rintv2sf2): Ditto. | |
24351 | (lrintv2sfv2si2): Ditto. | |
24352 | (ceilv2sf2): Ditto. | |
24353 | (lceilv2sfv2si2): Ditto. | |
24354 | (floorv2sf2): Ditto. | |
24355 | (lfloorv2sfv2si2): Ditto. | |
24356 | (btruncv2sf2): Ditto. | |
24357 | (roundv2sf2): Ditto. | |
24358 | (lroundv2sfv2si2): Ditto. | |
24359 | * doc/invoke.texi (x86 Options): Document | |
24360 | -mpartial-vector-fp-math option. | |
24361 | ||
24362 | 2023-08-08 Andrew Pinski <apinski@marvell.com> | |
24363 | ||
24364 | PR tree-optimization/103281 | |
24365 | PR tree-optimization/28794 | |
24366 | * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out | |
24367 | majority to ... | |
24368 | (simplify_using_ranges::simplify_compare_using_ranges_1): Here. | |
24369 | (simplify_using_ranges::simplify_casted_cond): Rename to ... | |
24370 | (simplify_using_ranges::simplify_casted_compare): This | |
24371 | and change arguments to take op0 and op1. | |
24372 | (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method. | |
24373 | (simplify_using_ranges::simplify): For tcc_comparison assignments call | |
24374 | simplify_compare_assign_using_ranges_1. | |
24375 | * vr-values.h (simplify_using_ranges): Add | |
24376 | new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1. | |
24377 | Rename simplify_casted_cond and simplify_casted_compare and | |
24378 | update argument types. | |
24379 | ||
24380 | 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com> | |
24381 | ||
24382 | * genmatch.cc: Log line numbers indirectly. | |
24383 | ||
24384 | 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com> | |
24385 | ||
24386 | * genmatch.cc: Make sinfo map ordered. | |
24387 | * Makefile.in: Require the ordered map header for genmatch.o. | |
24388 | ||
24389 | 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com> | |
24390 | ||
24391 | * ordered-hash-map.h: Add get_or_insert. | |
24392 | * ordered-hash-map-tests.cc: Use get_or_insert in tests. | |
24393 | ||
24394 | 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24395 | ||
24396 | * config/riscv/autovec.md (cond_<optab><mode>): New pattern. | |
24397 | (cond_len_<optab><mode>): Ditto. | |
24398 | (cond_fma<mode>): Ditto. | |
24399 | (cond_len_fma<mode>): Ditto. | |
24400 | (cond_fnma<mode>): Ditto. | |
24401 | (cond_len_fnma<mode>): Ditto. | |
24402 | (cond_fms<mode>): Ditto. | |
24403 | (cond_len_fms<mode>): Ditto. | |
24404 | (cond_fnms<mode>): Ditto. | |
24405 | (cond_len_fnms<mode>): Ditto. | |
24406 | * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export | |
24407 | global. | |
24408 | (enum insn_type): Add new enum type. | |
24409 | (prepare_ternary_operands): New function. | |
24410 | * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto. | |
24411 | (emit_nonvlmax_tumu_insn): Ditto. | |
24412 | (emit_nonvlmax_fp_tumu_insn): Ditto. | |
24413 | (expand_cond_len_binop): Add condtional operations. | |
24414 | (expand_cond_len_ternop): Ditto. | |
24415 | (prepare_ternary_operands): New function. | |
24416 | * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export | |
24417 | riscv_get_v_regno_alignment as global scope. | |
24418 | * config/riscv/vector.md: Fix ternary bugs. | |
24419 | ||
24420 | 2023-08-08 Richard Biener <rguenther@suse.de> | |
24421 | ||
24422 | PR tree-optimization/49955 | |
24423 | * tree-vectorizer.h (_slp_instance::remain_stmts): New. | |
24424 | (SLP_INSTANCE_REMAIN_STMTS): Likewise. | |
24425 | * tree-vect-slp.cc (vect_free_slp_instance): Release | |
24426 | SLP_INSTANCE_REMAIN_STMTS. | |
24427 | (vect_build_slp_instance): Make the number of lanes of | |
24428 | a BB reduction even. | |
24429 | (vectorize_slp_instance_root_stmt): Handle unvectorized | |
24430 | defs of a BB reduction. | |
24431 | ||
24432 | 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
24433 | ||
24434 | * internal-fn.cc (get_len_internal_fn): New function. | |
24435 | (DEF_INTERNAL_COND_FN): Ditto. | |
24436 | (DEF_INTERNAL_SIGNED_COND_FN): Ditto. | |
24437 | * internal-fn.h (get_len_internal_fn): Ditto. | |
24438 | * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization. | |
24439 | ||
24440 | 2023-08-08 Richard Biener <rguenther@suse.de> | |
24441 | ||
24442 | PR tree-optimization/110924 | |
24443 | * tree-ssa-live.h (virtual_operand_live): Update comment. | |
24444 | * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove | |
24445 | optimization, look at each predecessor. | |
24446 | * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges. | |
24447 | ||
24448 | 2023-08-08 yulong <shiyulong@iscas.ac.cn> | |
24449 | ||
24450 | * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify. | |
24451 | ||
24452 | 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24453 | ||
24454 | * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg. | |
24455 | * config/riscv/vector.md: Ditto. | |
24456 | ||
24457 | 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24458 | ||
24459 | * config/riscv/autovec.md: Add VLS shift. | |
24460 | ||
24461 | 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24462 | ||
24463 | * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes. | |
24464 | * config/riscv/vector-iterators.md: Ditto. | |
24465 | * config/riscv/vector.md: Ditto. | |
24466 | ||
24467 | 2023-08-07 Jonathan Wakely <jwakely@redhat.com> | |
24468 | ||
24469 | * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar. | |
24470 | ||
24471 | 2023-08-07 Nick Alcock <nick.alcock@oracle.com> | |
24472 | ||
24473 | * configure: Regenerate. | |
24474 | ||
24475 | 2023-08-07 John Ericson <git@JohnEricson.me> | |
24476 | ||
24477 | * configure: Regenerate. | |
24478 | ||
24479 | 2023-08-07 Alan Modra <amodra@gmail.com> | |
24480 | ||
24481 | * configure: Regenerate. | |
24482 | ||
24483 | 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com> | |
24484 | ||
24485 | * configure: Regenerate. | |
24486 | ||
24487 | 2023-08-07 Nick Alcock <nick.alcock@oracle.com> | |
24488 | ||
24489 | * configure: Regenerate. | |
24490 | ||
24491 | 2023-08-07 Nick Alcock <nick.alcock@oracle.com> | |
24492 | ||
24493 | * configure: Regenerate. | |
24494 | ||
24495 | 2023-08-07 H.J. Lu <hjl.tools@gmail.com> | |
24496 | ||
24497 | * configure: Regenerate. | |
24498 | ||
24499 | 2023-08-07 H.J. Lu <hjl.tools@gmail.com> | |
24500 | ||
24501 | * configure: Regenerate. | |
24502 | ||
24503 | 2023-08-07 Jeff Law <jlaw@ventanamicro.com> | |
24504 | ||
24505 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow | |
24506 | VOIDmode operands to conditional before canonicalization. | |
24507 | ||
24508 | 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu> | |
24509 | ||
24510 | * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function. | |
24511 | (find_oldest_value_reg): Inline stack_pointer_rtx check. | |
24512 | (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check. | |
24513 | ||
24514 | 2023-08-07 Martin Jambor <mjambor@suse.cz> | |
24515 | ||
24516 | PR ipa/110378 | |
24517 | * ipa-param-manipulation.h (class ipa_param_body_adjustments): New | |
24518 | members get_ddef_if_exists_and_is_used and mark_clobbers_dead. | |
24519 | * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers. | |
24520 | (ptr_parm_has_nonarg_uses): Likewise. | |
24521 | * ipa-param-manipulation.cc | |
24522 | (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New. | |
24523 | (ipa_param_body_adjustments::mark_dead_statements): Move initial | |
24524 | checks to get_ddef_if_exists_and_is_used. | |
24525 | (ipa_param_body_adjustments::mark_clobbers_dead): New. | |
24526 | (ipa_param_body_adjustments::common_initialization): Call | |
24527 | mark_clobbers_dead when splitting. | |
24528 | ||
24529 | 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com> | |
24530 | ||
24531 | * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr | |
24532 | as an argument and pass it to riscv_emit_int_order_test. | |
24533 | (riscv_expand_conditional_move): Handle cases where the condition | |
24534 | is not EQ/NE or the second argument to the conditional is not | |
24535 | (const_int 0). | |
24536 | * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype. | |
24537 | Co-authored-by: Jeff Law <jlaw@ventanamicro.com> | |
24538 | ||
24539 | 2023-08-07 Andrew Pinski <apinski@marvell.com> | |
24540 | ||
24541 | PR tree-optimization/109959 | |
24542 | * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`): | |
24543 | New patterns. | |
24544 | ||
24545 | 2023-08-07 Richard Biener <rguenther@suse.de> | |
24546 | ||
24547 | * tree-ssa-sink.cc (pass_sink_code::execute): Do not | |
24548 | calculate post-dominators. Calculate RPO on the inverted | |
24549 | graph and process blocks in that order. | |
24550 | ||
24551 | 2023-08-07 liuhongt <hongtao.liu@intel.com> | |
24552 | ||
24553 | PR target/110926 | |
24554 | * config/i386/i386-protos.h | |
24555 | (vpternlog_redundant_operand_mask): Adjust parameter type. | |
24556 | * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use | |
24557 | INTVAL instead of XINT, also adjust parameter type from rtx* | |
24558 | to rtx since the function only needs operands[4] in vpternlog | |
24559 | pattern. | |
24560 | (substitute_vpternlog_operands): Pass operands[4] instead of | |
24561 | operands to vpternlog_redundant_operand_mask. | |
24562 | * config/i386/sse.md: Ditto. | |
24563 | ||
24564 | 2023-08-07 Richard Biener <rguenther@suse.de> | |
24565 | ||
24566 | * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location | |
24567 | around dumping code. | |
24568 | ||
24569 | 2023-08-07 liuhongt <hongtao.liu@intel.com> | |
24570 | ||
24571 | PR target/110762 | |
24572 | * config/i386/mmx.md (<insn><mode>3): Changed from define_insn | |
24573 | to define_expand and break into .. | |
24574 | (<insn>v4hf3): .. this. | |
24575 | (divv4hf3): .. this. | |
24576 | (<insn>v2hf3): .. this. | |
24577 | (divv2hf3): .. this. | |
24578 | (movd_v2hf_to_sse): New define_expand. | |
24579 | (movq_<mode>_to_sse): Extend to V4HFmode. | |
24580 | (mmxdoublevecmode): Ditto. | |
24581 | (V2FI_V4HF): New mode iterator. | |
24582 | * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF | |
24583 | by using mode iterator V4SF_V8HF, renamed to .. | |
24584 | (*vec_concat<mode>): .. this. | |
24585 | (*vec_concatv4sf_0): Extend to handle V8HF by using mode | |
24586 | iterator V4SF_V8HF, renamed to .. | |
24587 | (*vec_concat<mode>_0): .. this. | |
24588 | (*vec_concatv8hf_movss): New define_insn. | |
24589 | (V4SF_V8HF): New mode iterator. | |
24590 | ||
24591 | 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
24592 | ||
24593 | * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype. | |
24594 | ||
24595 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24596 | ||
24597 | * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16". | |
24598 | (*mmx_pinsrb): Likewise. | |
24599 | (*mmx_pextrb): Likewise. | |
24600 | (*mmx_pextrb_zext): Likewise. | |
24601 | (mmx_pshufbv8qi3): Likewise. | |
24602 | (mmx_pshufbv4qi3): Likewise. | |
24603 | (mmx_pswapdv2si2): Likewise. | |
24604 | (*pinsrb): Likewise. | |
24605 | (*pextrb): Likewise. | |
24606 | (*pextrb_zext): Likewise. | |
24607 | * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise. | |
24608 | (*sse2_eq<mode>3): Likewise. | |
24609 | (*sse2_gt<mode>3): Likewise. | |
24610 | (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise. | |
24611 | (*vec_extract<mode>): Likewise. | |
24612 | (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise. | |
24613 | (*vec_extractv16qi_zext): Likewise. | |
24614 | (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise. | |
24615 | (ssse3_pmaddubsw128): Likewise. | |
24616 | (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise. | |
24617 | (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise. | |
24618 | (<ssse3_avx2>_psign<mode>3): Likewise. | |
24619 | (<ssse3_avx2>_palignr<mode>): Likewise. | |
24620 | (*abs<mode>2): Likewise. | |
24621 | (sse4_2_pcmpestr): Likewise. | |
24622 | (sse4_2_pcmpestri): Likewise. | |
24623 | (sse4_2_pcmpestrm): Likewise. | |
24624 | (sse4_2_pcmpestr_cconly): Likewise. | |
24625 | (sse4_2_pcmpistr): Likewise. | |
24626 | (sse4_2_pcmpistri): Likewise. | |
24627 | (sse4_2_pcmpistrm): Likewise. | |
24628 | (sse4_2_pcmpistr_cconly): Likewise. | |
24629 | (vgf2p8affineinvqb_<mode><mask_name>): Likewise. | |
24630 | (vgf2p8affineqb_<mode><mask_name>): Likewise. | |
24631 | (vgf2p8mulb_<mode><mask_name>): Likewise. | |
24632 | (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and | |
24633 | "prefix_extra". | |
24634 | (*<code>v16qi3 [umaxmin]): Likewise. | |
24635 | ||
24636 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24637 | ||
24638 | * config/i386/i386.md (sse4_1_round<mode>2): Make | |
24639 | "length_immediate" uniformly 1. | |
24640 | * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise. | |
24641 | (mmx_pblendvb_<mode>): Likewise. | |
24642 | ||
24643 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24644 | ||
24645 | * config/i386/sse.md | |
24646 | (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add | |
24647 | "prefix" attribute. | |
24648 | (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>): | |
24649 | Likewise. | |
24650 | ||
24651 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24652 | ||
24653 | * config/i386/sse.md (xop_phadd<u>bw): Add "prefix", | |
24654 | "prefix_extra", and "mode" attributes. | |
24655 | (xop_phadd<u>bd): Likewise. | |
24656 | (xop_phadd<u>bq): Likewise. | |
24657 | (xop_phadd<u>wd): Likewise. | |
24658 | (xop_phadd<u>wq): Likewise. | |
24659 | (xop_phadd<u>dq): Likewise. | |
24660 | (xop_phsubbw): Likewise. | |
24661 | (xop_phsubwd): Likewise. | |
24662 | (xop_phsubdq): Likewise. | |
24663 | (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes. | |
24664 | (xop_rotr<mode>3): Likewise. | |
24665 | (xop_frcz<mode>2): Likewise. | |
24666 | (*xop_vmfrcz<mode>2): Likewise. | |
24667 | (xop_vrotl<mode>3): Add "prefix" attribute. Change | |
24668 | "prefix_extra" to 1. | |
24669 | (xop_sha<mode>3): Likewise. | |
24670 | (xop_shl<mode>3): Likewise. | |
24671 | ||
24672 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24673 | ||
24674 | * config/i386/sse.md | |
24675 | (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop | |
24676 | "prefix_extra". | |
24677 | (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise. | |
24678 | (*avx512dq_vextract<shuffletype>64x2_1): Likewise. | |
24679 | (avx512f_vextract<shuffletype>32x4_1_mask): Likewise. | |
24680 | (*avx512f_vextract<shuffletype>32x4_1): Likewise. | |
24681 | (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise. | |
24682 | (vec_extract_lo_<mode> [AVX512 forms]): Likewise. | |
24683 | (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise. | |
24684 | (vec_extract_hi_<mode> [AVX512 forms]): Likewise. | |
24685 | (@vec_extract_lo_<mode> [AVX512 forms]): Likewise. | |
24686 | (@vec_extract_hi_<mode> [AVX512 forms]): Likewise. | |
24687 | (vec_extract_lo_v64qi): Likewise. | |
24688 | (vec_extract_hi_v64qi): Likewise. | |
24689 | (*vec_widen_umult_even_v16si<mask_name>): Likewise. | |
24690 | (*vec_widen_smult_even_v16si<mask_name>): Likewise. | |
24691 | (*avx512f_<code><mode>3<mask_name>): Likewise. | |
24692 | (*vec_extractv4ti): Likewise. | |
24693 | (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise. | |
24694 | (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise. | |
24695 | Add "length_immediate". | |
24696 | ||
24697 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24698 | ||
24699 | * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop | |
24700 | "prefix_extra". | |
24701 | (@rdseed<mode>): Likewise. | |
24702 | * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]): | |
24703 | Adjust "prefix_extra". | |
24704 | * config/i386/sse.md (@vec_set<mode>_0): Likewise. | |
24705 | (*sse4_1_<code><mode>3<mask_name>): Likewise. | |
24706 | (*avx2_eq<mode>3): Likewise. | |
24707 | (avx2_gt<mode>3): Likewise. | |
24708 | (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise. | |
24709 | (*vec_extract<mode>): Likewise. | |
24710 | (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise. | |
24711 | ||
24712 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24713 | ||
24714 | * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and | |
24715 | "prefix_rep". Drop "prefix_extra". | |
24716 | (wr<fsgs>base<mode>): Likewise. | |
24717 | (ptwrite<mode>): Likewise. | |
24718 | ||
24719 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24720 | ||
24721 | * config/i386/i386.md (isa): Move up. | |
24722 | (length_immediate): Handle "fma4". | |
24723 | (prefix): Handle "ssemuladd". | |
24724 | * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute. | |
24725 | (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>): | |
24726 | Likewise. | |
24727 | (<avx512>_fmadd_<mode>_mask<round_name>): Likewise. | |
24728 | (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise. | |
24729 | (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>): | |
24730 | Likewise. | |
24731 | (<avx512>_fmsub_<mode>_mask<round_name>): Likewise. | |
24732 | (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise. | |
24733 | (*fma_fnmadd_<mode>): Likewise. | |
24734 | (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>): | |
24735 | Likewise. | |
24736 | (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise. | |
24737 | (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise. | |
24738 | (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>): | |
24739 | Likewise. | |
24740 | (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise. | |
24741 | (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise. | |
24742 | (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>): | |
24743 | Likewise. | |
24744 | (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise. | |
24745 | (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise. | |
24746 | (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>): | |
24747 | Likewise. | |
24748 | (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise. | |
24749 | (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise. | |
24750 | (*fmai_fmadd_<mode>): Likewise. | |
24751 | (*fmai_fmsub_<mode>): Likewise. | |
24752 | (*fmai_fnmadd_<mode><round_name>): Likewise. | |
24753 | (*fmai_fnmsub_<mode><round_name>): Likewise. | |
24754 | (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise. | |
24755 | (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise. | |
24756 | (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise. | |
24757 | (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise. | |
24758 | (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise. | |
24759 | (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise. | |
24760 | (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise. | |
24761 | (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise. | |
24762 | (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise. | |
24763 | (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise. | |
24764 | (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise. | |
24765 | (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise. | |
24766 | (*fma4i_vmfmadd_<mode>): Likewise. | |
24767 | (*fma4i_vmfmsub_<mode>): Likewise. | |
24768 | (*fma4i_vmfnmadd_<mode>): Likewise. | |
24769 | (*fma4i_vmfnmsub_<mode>): Likewise. | |
24770 | (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise. | |
24771 | (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise. | |
24772 | (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>): | |
24773 | Likewise. | |
24774 | (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise. | |
24775 | (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise. | |
24776 | (xop_p<macs>dql): Likewise. | |
24777 | (xop_p<macs>dqh): Likewise. | |
24778 | (xop_p<macs>wd): Likewise. | |
24779 | (xop_p<madcs>wd): Likewise. | |
24780 | (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute. | |
24781 | ||
24782 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24783 | ||
24784 | * config/i386/i386.md (length_immediate): Handle "sse4arg". | |
24785 | (prefix): Likewise. | |
24786 | (*xop_pcmov_<mode>): Add "mode" attribute. | |
24787 | * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16", | |
24788 | "prefix_rep", "prefix_extra", and "length_immediate" attributes. | |
24789 | (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg". | |
24790 | (*xop_pcmov_<mode>): Add "mode" attribute. | |
24791 | * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode" | |
24792 | attribute. | |
24793 | (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep", | |
24794 | "prefix_extra", and "length_immediate" attributes. | |
24795 | (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg". | |
24796 | (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra", | |
24797 | and "length_immediate" attributes. Switch "type" to "sse4arg". | |
24798 | (xop_pcom_tf<mode>3): Likewise. | |
24799 | (xop_vpermil2<mode>3): Drop "length_immediate" attribute. | |
24800 | ||
24801 | 2023-08-07 Jan Beulich <jbeulich@suse.com> | |
24802 | ||
24803 | * config/i386/i386.md (prefix_extra): Correct comment. Fold | |
24804 | cases yielding 2 into ones yielding 1. | |
24805 | ||
24806 | 2023-08-07 Jan Hubicka <jh@suse.cz> | |
24807 | ||
24808 | PR tree-optimization/106293 | |
24809 | * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update. | |
24810 | * tree-vect-loop.cc (vect_transform_loop): Likewise. | |
24811 | ||
24812 | 2023-08-07 Andrew Pinski <apinski@marvell.com> | |
24813 | ||
24814 | PR tree-optimization/96695 | |
24815 | * match.pd (min_value, max_value): Extend to | |
24816 | pointer types too. | |
24817 | ||
24818 | 2023-08-06 Jan Hubicka <jh@suse.cz> | |
24819 | ||
24820 | * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add | |
24821 | __builtin_expect that CPU likely supports cpuid. | |
24822 | ||
24823 | 2023-08-06 Jan Hubicka <jh@suse.cz> | |
24824 | ||
24825 | * tree-loop-distribution.cc (loop_distribution::execute): Disable | |
24826 | distribution for loops with estimated iterations 0. | |
24827 | ||
24828 | 2023-08-06 Jan Hubicka <jh@suse.cz> | |
24829 | ||
24830 | * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues. | |
24831 | ||
24832 | 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com> | |
24833 | ||
24834 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize | |
24835 | more Zicond patterns. Fix whitespace typo. | |
24836 | (riscv_rtx_costs): Remove accidental code duplication. | |
24837 | Co-authored-by: Jeff Law <jlaw@ventanamicro.com> | |
24838 | ||
24839 | 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru> | |
24840 | ||
24841 | PR target/110202 | |
24842 | * config/i386/i386-protos.h | |
24843 | (vpternlog_redundant_operand_mask): Declare. | |
24844 | (substitute_vpternlog_operands): Declare. | |
24845 | * config/i386/i386.cc | |
24846 | (vpternlog_redundant_operand_mask): New helper. | |
24847 | (substitute_vpternlog_operands): New function. Use them... | |
24848 | * config/i386/sse.md: ... here in new VPTERNLOG define_splits. | |
24849 | ||
24850 | 2023-08-04 Roger Sayle <roger@nextmovesoftware.com> | |
24851 | ||
24852 | * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP | |
24853 | value of -1 is equivalent to don't care. | |
24854 | (extract_integral_bit_field): Indicate that we don't require | |
24855 | the most significant word to be zero extended, if we're about | |
24856 | to sign extend it. | |
24857 | (extract_fixed_bit_field_1): Document that an UNSIGNEDP value | |
24858 | of -1 is equivalent to don't care. Don't clear the most | |
24859 | significant bits with AND mask when UNSIGNEDP is -1. | |
24860 | ||
24861 | 2023-08-04 Roger Sayle <roger@nextmovesoftware.com> | |
24862 | ||
24863 | * config/i386/sse.md (define_split): Convert highpart:DF extract | |
24864 | from V2DFmode register into a sse2_storehpd instruction. | |
24865 | (define_split): Likewise, convert lowpart:DF extract from V2DF | |
24866 | register into a sse2_storelpd instruction. | |
24867 | ||
24868 | 2023-08-04 Qing Zhao <qing.zhao@oracle.com> | |
24869 | ||
24870 | * doc/invoke.texi (-Wflex-array-member-not-at-end): Document | |
24871 | new option. | |
24872 | ||
24873 | 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com> | |
24874 | ||
24875 | * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs | |
24876 | against early clobber hard regs. | |
24877 | ||
24878 | 2023-08-04 Tamar Christina <tamar.christina@arm.com> | |
24879 | ||
24880 | * doc/extend.texi: Document it. | |
24881 | ||
24882 | 2023-08-04 Tamar Christina <tamar.christina@arm.com> | |
24883 | ||
24884 | PR target/106346 | |
24885 | * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>, | |
24886 | vec_widen_<sur>shiftl_hi_<mode>): Remove. | |
24887 | (aarch64_<sur>shll<mode>_internal): Renamed to... | |
24888 | (aarch64_<su>shll<mode>): .. This. | |
24889 | (aarch64_<sur>shll2<mode>_internal): Renamed to... | |
24890 | (aarch64_<su>shll2<mode>): .. This. | |
24891 | (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new | |
24892 | optabs. | |
24893 | * config/aarch64/constraints.md (D2, DL): New. | |
24894 | * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New. | |
24895 | ||
24896 | 2023-08-04 Tamar Christina <tamar.christina@arm.com> | |
24897 | ||
24898 | * gensupport.cc (conlist): Support length 0 attribute. | |
24899 | ||
24900 | 2023-08-04 Tamar Christina <tamar.christina@arm.com> | |
24901 | ||
24902 | * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New. | |
24903 | (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it. | |
24904 | ||
24905 | 2023-08-04 Tamar Christina <tamar.christina@arm.com> | |
24906 | ||
24907 | * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling | |
24908 | of constants. | |
24909 | (aarch64_adjust_stmt_cost): Use it. | |
24910 | (aarch64_vector_costs::count_ops): Likewise. | |
24911 | (aarch64_vector_costs::add_stmt_cost): Pass vinfo to | |
24912 | aarch64_adjust_stmt_cost. | |
24913 | ||
24914 | 2023-08-04 Richard Biener <rguenther@suse.de> | |
24915 | ||
24916 | PR tree-optimization/110838 | |
24917 | * tree-vect-patterns.cc (vect_recog_over_widening_pattern): | |
24918 | Fix right-shift value sanitizing. Properly emit external | |
24919 | def mangling in the preheader rather than in the pattern | |
24920 | def sequence where it will fail vectorizing. | |
24921 | ||
24922 | 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com> | |
24923 | ||
24924 | PR middle-end/110316 | |
24925 | PR middle-end/9903 | |
24926 | * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC, | |
24927 | CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New. | |
24928 | (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros. | |
24929 | (timer::validate_phases): Use integral arithmetic to check | |
24930 | validity. | |
24931 | (timer::print_row, timer::print): Convert from integral | |
24932 | nanoseconds to floating point seconds before printing. | |
24933 | (timer::all_zero): Change limit to nanosec count instead of | |
24934 | fractional count of seconds. | |
24935 | (make_json_for_timevar_time_def): Convert from integral | |
24936 | nanoseconds to floating point seconds before recording. | |
24937 | * timevar.h (struct timevar_time_def): Update all measurements | |
24938 | to use uint64_t nanoseconds rather than seconds stored in a | |
24939 | double. | |
24940 | ||
24941 | 2023-08-04 Richard Biener <rguenther@suse.de> | |
24942 | ||
24943 | PR tree-optimization/110838 | |
24944 | * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict | |
24945 | the arithmetic right-shift case to non-negative operands. | |
24946 | ||
24947 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24948 | ||
24949 | Revert: | |
24950 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24951 | ||
24952 | * config/riscv/riscv-vector-builtins-bases.cc | |
24953 | (class vfmacc_frm): New class for vfmacc frm. | |
24954 | (vfmacc_frm_obj): New declaration. | |
24955 | (BASE): Ditto. | |
24956 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
24957 | * config/riscv/riscv-vector-builtins-functions.def | |
24958 | (vfmacc_frm): New function definition. | |
24959 | * config/riscv/riscv-vector-builtins.cc | |
24960 | (function_expander::use_ternop_insn): Add frm operand support. | |
24961 | * config/riscv/vector.md: Add vfmuladd to frm_mode. | |
24962 | ||
24963 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24964 | ||
24965 | Revert: | |
24966 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24967 | ||
24968 | * config/riscv/riscv-vector-builtins-bases.cc | |
24969 | (class vfnmacc_frm): New class for vfnmacc. | |
24970 | (vfnmacc_frm_obj): New declaration. | |
24971 | (BASE): Ditto. | |
24972 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
24973 | * config/riscv/riscv-vector-builtins-functions.def | |
24974 | (vfnmacc_frm): New function definition. | |
24975 | ||
24976 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24977 | ||
24978 | Revert: | |
24979 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24980 | ||
24981 | * config/riscv/riscv-vector-builtins-bases.cc | |
24982 | (class vfmsac_frm): New class for vfmsac frm. | |
24983 | (vfmsac_frm_obj): New declaration. | |
24984 | (BASE): Ditto. | |
24985 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
24986 | * config/riscv/riscv-vector-builtins-functions.def | |
24987 | (vfmsac_frm): New function definition. | |
24988 | ||
24989 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24990 | ||
24991 | Revert: | |
24992 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
24993 | ||
24994 | * config/riscv/riscv-vector-builtins-bases.cc | |
24995 | (class vfnmsac_frm): New class for vfnmsac frm. | |
24996 | (vfnmsac_frm_obj): New declaration. | |
24997 | (BASE): Ditto. | |
24998 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
24999 | * config/riscv/riscv-vector-builtins-functions.def | |
25000 | (vfnmsac_frm): New function definition. | |
25001 | ||
25002 | 2023-08-04 Georg-Johann Lay <avr@gjlay.de> | |
25003 | ||
25004 | * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32) | |
25005 | (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427) | |
25006 | (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627) | |
25007 | (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28) | |
25008 | (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32) | |
25009 | (attiny102, attiny104): New devices. | |
25010 | * doc/avr-mmcu.texi: Regenerate. | |
25011 | ||
25012 | 2023-08-04 Georg-Johann Lay <avr@gjlay.de> | |
25013 | ||
25014 | * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE | |
25015 | and PM_OFFSET entries. | |
25016 | ||
25017 | 2023-08-04 Andrew Pinski <apinski@marvell.com> | |
25018 | ||
25019 | PR tree-optimization/110874 | |
25020 | * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration. | |
25021 | (gimple_maybe_cmp): Likewise. | |
25022 | (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop | |
25023 | and gimple_maybe_cmp instead of being recursive. | |
25024 | * match.pd (bit_not_with_nop): New match pattern. | |
25025 | (maybe_cmp): Likewise. | |
25026 | ||
25027 | 2023-08-04 Drew Ross <drross@redhat.com> | |
25028 | ||
25029 | PR middle-end/101955 | |
25030 | * match.pd ((signed x << c) >> c): New canonicalization. | |
25031 | ||
25032 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
25033 | ||
25034 | * config/riscv/riscv-vector-builtins-bases.cc | |
25035 | (class vfnmsac_frm): New class for vfnmsac frm. | |
25036 | (vfnmsac_frm_obj): New declaration. | |
25037 | (BASE): Ditto. | |
25038 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
25039 | * config/riscv/riscv-vector-builtins-functions.def | |
25040 | (vfnmsac_frm): New function definition. | |
25041 | ||
25042 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
25043 | ||
25044 | * config/riscv/riscv-vector-builtins-bases.cc | |
25045 | (class vfmsac_frm): New class for vfmsac frm. | |
25046 | (vfmsac_frm_obj): New declaration. | |
25047 | (BASE): Ditto. | |
25048 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
25049 | * config/riscv/riscv-vector-builtins-functions.def | |
25050 | (vfmsac_frm): New function definition. | |
25051 | ||
25052 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
25053 | ||
25054 | * config/riscv/riscv-vector-builtins-bases.cc | |
25055 | (class vfnmacc_frm): New class for vfnmacc. | |
25056 | (vfnmacc_frm_obj): New declaration. | |
25057 | (BASE): Ditto. | |
25058 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
25059 | * config/riscv/riscv-vector-builtins-functions.def | |
25060 | (vfnmacc_frm): New function definition. | |
25061 | ||
25062 | 2023-08-04 Hao Liu <hliu@os.amperecomputing.com> | |
25063 | ||
25064 | PR target/110625 | |
25065 | * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check | |
25066 | STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction. | |
25067 | ||
25068 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
25069 | ||
25070 | * config/riscv/riscv-vector-builtins-bases.cc | |
25071 | (class vfmacc_frm): New class for vfmacc frm. | |
25072 | (vfmacc_frm_obj): New declaration. | |
25073 | (BASE): Ditto. | |
25074 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
25075 | * config/riscv/riscv-vector-builtins-functions.def | |
25076 | (vfmacc_frm): New function definition. | |
25077 | * config/riscv/riscv-vector-builtins.cc | |
25078 | (function_expander::use_ternop_insn): Add frm operand support. | |
25079 | * config/riscv/vector.md: Add vfmuladd to frm_mode. | |
25080 | ||
25081 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
25082 | ||
25083 | * config/riscv/riscv-vector-builtins-bases.cc | |
25084 | (vfwmul_frm_obj): New declaration. | |
25085 | (vfwmul_frm): Ditto. | |
25086 | * config/riscv/riscv-vector-builtins-bases.h: | |
25087 | (vfwmul_frm): Ditto. | |
25088 | * config/riscv/riscv-vector-builtins-functions.def | |
25089 | (vfwmul_frm): New function definition. | |
25090 | * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode. | |
25091 | ||
25092 | 2023-08-04 Pan Li <pan2.li@intel.com> | |
25093 | ||
25094 | * config/riscv/riscv-vector-builtins-bases.cc | |
25095 | (binop_frm): New declaration. | |
25096 | (reverse_binop_frm): Likewise. | |
25097 | (BASE): Likewise. | |
25098 | * config/riscv/riscv-vector-builtins-bases.h: | |
25099 | (vfdiv_frm): New extern declaration. | |
25100 | (vfrdiv_frm): Likewise. | |
25101 | * config/riscv/riscv-vector-builtins-functions.def | |
25102 | (vfdiv_frm): New function definition. | |
25103 | (vfrdiv_frm): Likewise. | |
25104 | * config/riscv/vector.md: Add vfdiv to frm_mode. | |
25105 | ||
25106 | 2023-08-03 Jan Hubicka <jh@suse.cz> | |
25107 | ||
25108 | * tree-cfg.cc (print_loop_info): Print entry count. | |
25109 | ||
25110 | 2023-08-03 Jan Hubicka <jh@suse.cz> | |
25111 | ||
25112 | * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts. | |
25113 | ||
25114 | 2023-08-03 Jan Hubicka <jh@suse.cz> | |
25115 | ||
25116 | PR bootstrap/110857 | |
25117 | * cfgloopmanip.cc (scale_loop_profile): (Un)initialize | |
25118 | unadjusted_exit_count. | |
25119 | ||
25120 | 2023-08-03 Aldy Hernandez <aldyh@redhat.com> | |
25121 | ||
25122 | * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global | |
25123 | value/mask. | |
25124 | ||
25125 | 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com> | |
25126 | ||
25127 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize | |
25128 | various Zicond patterns. | |
25129 | * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use | |
25130 | sfb_alu_operand for both arms of the conditional move. | |
25131 | Co-authored-by: Jeff Law <jlaw@ventanamicro.com> | |
25132 | ||
25133 | 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com> | |
25134 | ||
25135 | PR target/107844 | |
25136 | PR target/107479 | |
25137 | PR target/107480 | |
25138 | PR target/107481 | |
25139 | * config.gcc: Added core-builtins.cc and .o files. | |
25140 | * config/bpf/bpf-passes.def: Removed file. | |
25141 | * config/bpf/bpf-protos.h (bpf_add_core_reloc, | |
25142 | bpf_replace_core_move_operands): New prototypes. | |
25143 | * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access, | |
25144 | maybe_make_core_relo, bpf_core_field_info, bpf_core_compute, | |
25145 | bpf_core_get_index, bpf_core_new_decl, bpf_core_walk, | |
25146 | bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access, | |
25147 | handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr): | |
25148 | Removed. | |
25149 | (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed. | |
25150 | * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed. | |
25151 | (mov_reloc_core<mode>): Added. | |
25152 | * config/bpf/core-builtins.cc (struct cr_builtin, enum | |
25153 | cr_decision struct cr_local, struct cr_final, struct | |
25154 | core_builtin_helpers, enum bpf_plugin_states): Added types. | |
25155 | (builtins_data, core_builtin_helpers, core_builtin_type_defs): | |
25156 | Added variables. | |
25157 | (allocate_builtin_data, get_builtin-data, search_builtin_data, | |
25158 | remove_parser_plugin, compare_same_kind, compare_same_ptr_expr, | |
25159 | compare_same_ptr_type, is_attr_preserve_access, core_field_info, | |
25160 | bpf_core_get_index, compute_field_expr, | |
25161 | pack_field_expr_for_access_index, pack_field_expr_for_preserve_field, | |
25162 | process_field_expr, pack_enum_value, process_enum_value, pack_type, | |
25163 | process_type, bpf_require_core_support, make_core_relo, read_kind, | |
25164 | kind_access_index, kind_preserve_field_info, kind_enum_value, | |
25165 | kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type, | |
25166 | bpf_handle_plugin_finish_type, bpf_init_core_builtins, | |
25167 | construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin, | |
25168 | bpf_expand_core_builtin, bpf_add_core_reloc, | |
25169 | bpf_replace_core_move_operands): Added functions. | |
25170 | * config/bpf/core-builtins.h (enum bpf_builtins): Added. | |
25171 | (bpf_init_core_builtins, bpf_expand_core_builtin, | |
25172 | bpf_resolve_overloaded_core_builtin): Added functions. | |
25173 | * config/bpf/coreout.cc (struct bpf_core_extra): Added. | |
25174 | (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed. | |
25175 | * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype. | |
25176 | * config/bpf/t-bpf: Added core-builtins.o. | |
25177 | * doc/extend.texi: Added documentation for new BPF builtins. | |
25178 | ||
25179 | 2023-08-03 Andrew MacLeod <amacleod@redhat.com> | |
25180 | ||
25181 | * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add | |
25182 | ranges to the call to relation_fold_and_or. | |
25183 | (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges. | |
25184 | (fur_source::register_outgoing_edges): Add op1 and op2 ranges. | |
25185 | * gimple-range-fold.h (relation_fold_and_or): Adjust params. | |
25186 | * gimple-range-gori.cc (gori_compute::compute_operand_range): Add | |
25187 | a varying op1 and op2 to call. | |
25188 | * range-op-float.cc (range_operator::op1_op2_relation): New dafaults. | |
25189 | (operator_equal::op1_op2_relation): New float version. | |
25190 | (operator_not_equal::op1_op2_relation): Ditto. | |
25191 | (operator_lt::op1_op2_relation): Ditto. | |
25192 | (operator_le::op1_op2_relation): Ditto. | |
25193 | (operator_gt::op1_op2_relation): Ditto. | |
25194 | (operator_ge::op1_op2_relation) Ditto. | |
25195 | * range-op-mixed.h (operator_equal::op1_op2_relation): New float | |
25196 | prototype. | |
25197 | (operator_not_equal::op1_op2_relation): Ditto. | |
25198 | (operator_lt::op1_op2_relation): Ditto. | |
25199 | (operator_le::op1_op2_relation): Ditto. | |
25200 | (operator_gt::op1_op2_relation): Ditto. | |
25201 | (operator_ge::op1_op2_relation): Ditto. | |
25202 | * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new | |
25203 | variations. | |
25204 | (range_operator::op1_op2_relation): Add extra params. | |
25205 | (operator_equal::op1_op2_relation): Ditto. | |
25206 | (operator_not_equal::op1_op2_relation): Ditto. | |
25207 | (operator_lt::op1_op2_relation): Ditto. | |
25208 | (operator_le::op1_op2_relation): Ditto. | |
25209 | (operator_gt::op1_op2_relation): Ditto. | |
25210 | (operator_ge::op1_op2_relation): Ditto. | |
25211 | * range-op.h (range_operator): New prototypes. | |
25212 | (range_op_handler): Ditto. | |
25213 | ||
25214 | 2023-08-03 Andrew MacLeod <amacleod@redhat.com> | |
25215 | ||
25216 | * gimple-range-gori.cc (gori_compute::compute_operand1_range): | |
25217 | Use identity relation. | |
25218 | (gori_compute::compute_operand2_range): Ditto. | |
25219 | * value-relation.cc (get_identity_relation): New. | |
25220 | * value-relation.h (get_identity_relation): New prototype. | |
25221 | ||
25222 | 2023-08-03 Andrew MacLeod <amacleod@redhat.com> | |
25223 | ||
25224 | * value-range.h (Value_Range::set_varying): Set the type. | |
25225 | (Value_Range::set_zero): Ditto. | |
25226 | (Value_Range::set_nonzero): Ditto. | |
25227 | ||
25228 | 2023-08-03 Jeff Law <jeffreyalaw@gmail.com> | |
25229 | ||
25230 | * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from | |
25231 | recent commit. | |
25232 | ||
25233 | 2023-08-03 Pan Li <pan2.li@intel.com> | |
25234 | ||
25235 | * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub. | |
25236 | ||
25237 | 2023-08-03 Richard Sandiford <richard.sandiford@arm.com> | |
25238 | ||
25239 | * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions. | |
25240 | ||
25241 | 2023-08-03 Richard Biener <rguenther@suse.de> | |
25242 | ||
25243 | PR tree-optimization/110838 | |
25244 | * tree-vect-patterns.cc (vect_recog_over_widening_pattern): | |
25245 | Adjust the shift operand of RSHIFT_EXPRs. | |
25246 | ||
25247 | 2023-08-03 Richard Biener <rguenther@suse.de> | |
25248 | ||
25249 | PR tree-optimization/110702 | |
25250 | * tree-ssa-loop-ivopts.cc (rewrite_use_address): When | |
25251 | we created a NULL pointer based access rewrite that to | |
25252 | a LEA. | |
25253 | ||
25254 | 2023-08-03 Richard Biener <rguenther@suse.de> | |
25255 | ||
25256 | * tree-ssa-sink.cc: Include tree-ssa-live.h. | |
25257 | (pass_sink_code::execute): Instantiate virtual_operand_live | |
25258 | and pass it down. | |
25259 | (sink_code_in_bb): Pass down virtual_operand_live. | |
25260 | (statement_sink_location): Get virtual_operand_live and | |
25261 | verify we are not sinking loads across stores by looking up | |
25262 | the live virtual operand at the sink location. | |
25263 | ||
25264 | 2023-08-03 Richard Biener <rguenther@suse.de> | |
25265 | ||
25266 | * tree-ssa-live.h (class virtual_operand_live): New. | |
25267 | * tree-ssa-live.cc (virtual_operand_live::init): New. | |
25268 | (virtual_operand_live::get_live_in): Likewise. | |
25269 | (virtual_operand_live::get_live_out): Likewise. | |
25270 | ||
25271 | 2023-08-03 Richard Biener <rguenther@suse.de> | |
25272 | ||
25273 | * passes.def: Exchange loop splitting and final value | |
25274 | replacement passes. | |
25275 | ||
25276 | 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
25277 | ||
25278 | * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate): | |
25279 | New function which handles bswap patterns for vec_perm_const. | |
25280 | (vectorize_vec_perm_const_1): Call new function. | |
25281 | * config/s390/vector.md (*bswap<mode>): Fix operands in output | |
25282 | template. | |
25283 | (*vstbr<mode>): New insn. | |
25284 | ||
25285 | 2023-08-03 Alexandre Oliva <oliva@adacore.com> | |
25286 | ||
25287 | * config/vxworks-smp.opt: New. Introduce -msmp. | |
25288 | * config.gcc: Enable it on powerpc* vxworks prior to 7r*. | |
25289 | * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose | |
25290 | lib_smp when -msmp is present in the command line. | |
25291 | * doc/invoke.texi: Document it. | |
25292 | ||
25293 | 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com> | |
25294 | ||
25295 | * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf | |
25296 | when enabling -mno-omit-leaf-frame-pointer | |
25297 | (riscv_option_override): Override omit-frame-pointer. | |
25298 | (riscv_frame_pointer_required): Save s0 for non-leaf function | |
25299 | (TARGET_FRAME_POINTER_REQUIRED): Override defination | |
25300 | * config/riscv/riscv.opt: Add option support. | |
25301 | ||
25302 | 2023-08-03 Roger Sayle <roger@nextmovesoftware.com> | |
25303 | ||
25304 | PR target/110792 | |
25305 | * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits | |
25306 | place operand in a register before gen_<insn>64ti2_doubleword. | |
25307 | (<any_rotate>di3): Likewise, for rotations by 32 bits, place | |
25308 | operand in a register before gen_<insn>32di2_doubleword. | |
25309 | (<any_rotate>32di2_doubleword): Constrain operand to be in register. | |
25310 | (<any_rotate>64ti2_doubleword): Likewise. | |
25311 | ||
25312 | 2023-08-03 Pan Li <pan2.li@intel.com> | |
25313 | ||
25314 | * config/riscv/riscv-vector-builtins-bases.cc | |
25315 | (vfmul_frm_obj): New declaration. | |
25316 | (Base): Likewise. | |
25317 | * config/riscv/riscv-vector-builtins-bases.h: Likewise. | |
25318 | * config/riscv/riscv-vector-builtins-functions.def | |
25319 | (vfmul_frm): New function definition. | |
25320 | * config/riscv/vector.md: Add vfmul to frm_mode. | |
25321 | ||
25322 | 2023-08-03 Andrew Pinski <apinski@marvell.com> | |
25323 | ||
25324 | * match.pd (`~X & X`): Check that the types match. | |
25325 | (`~x | x`, `~x ^ x`): Likewise. | |
25326 | ||
25327 | 2023-08-03 Pan Li <pan2.li@intel.com> | |
25328 | ||
25329 | * config/riscv/riscv-vector-builtins-bases.h: Remove | |
25330 | redudant declaration. | |
25331 | ||
25332 | 2023-08-03 Pan Li <pan2.li@intel.com> | |
25333 | ||
25334 | * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add | |
25335 | vfwsub frm. | |
25336 | * config/riscv/riscv-vector-builtins-bases.h: Add declaration. | |
25337 | * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm): | |
25338 | Add vfwsub function definitions. | |
25339 | ||
25340 | 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
25341 | ||
25342 | PR rtl-optimization/110867 | |
25343 | * combine.cc (simplify_compare_const): Try the optimization only | |
25344 | in case the constant fits into the comparison mode. | |
25345 | ||
25346 | 2023-08-02 Jeff Law <jlaw@ventanamicro.com> | |
25347 | ||
25348 | * config/riscv/zicond.md: Remove incorrect zicond patterns and | |
25349 | renumber/rename them. | |
25350 | (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string. | |
25351 | ||
25352 | 2023-08-02 Richard Biener <rguenther@suse.de> | |
25353 | ||
25354 | * tree-phinodes.h (add_phi_node_to_bb): Remove. | |
25355 | * tree-phinodes.cc (add_phi_node_to_bb): Make static. | |
25356 | ||
25357 | 2023-08-02 Jan Beulich <jbeulich@suse.com> | |
25358 | ||
25359 | * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle | |
25360 | two of the alternatives. | |
25361 | ||
25362 | 2023-08-02 Richard Biener <rguenther@suse.de> | |
25363 | ||
25364 | PR tree-optimization/92335 | |
25365 | * tree-ssa-sink.cc (select_best_block): Before loop | |
25366 | optimizations avoid sinking unconditional loads/stores | |
25367 | in innermost loops to conditional executed places. | |
25368 | ||
25369 | 2023-08-02 Andrew Pinski <apinski@marvell.com> | |
25370 | ||
25371 | * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize | |
25372 | the comparison operands before comparing them. | |
25373 | ||
25374 | 2023-08-02 Andrew Pinski <apinski@marvell.com> | |
25375 | ||
25376 | * match.pd (`~X & X`, `~X | X`): Move over to | |
25377 | use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p | |
25378 | handles that already. | |
25379 | Remove range test simplifications to true/false as they | |
25380 | are now handled by these patterns. | |
25381 | ||
25382 | 2023-08-02 Andrew Pinski <apinski@marvell.com> | |
25383 | ||
25384 | * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond | |
25385 | statement's lhs and rhs to check if trivial dead. | |
25386 | Rename inserted_exprs to exprs_maybe_dce; also move it so | |
25387 | bitmap is not allocated if not needed. | |
25388 | ||
25389 | 2023-08-02 Pan Li <pan2.li@intel.com> | |
25390 | ||
25391 | * config/riscv/riscv-vector-builtins-bases.cc | |
25392 | (class widen_binop_frm): New class for binop frm. | |
25393 | (BASE): Add vfwadd_frm. | |
25394 | * config/riscv/riscv-vector-builtins-bases.h: New declaration. | |
25395 | * config/riscv/riscv-vector-builtins-functions.def | |
25396 | (vfwadd_frm): New function definition. | |
25397 | * config/riscv/riscv-vector-builtins-shapes.cc | |
25398 | (BASE_NAME_MAX_LEN): New macro. | |
25399 | (struct alu_frm_def): Leverage new base class. | |
25400 | (struct build_frm_base): New build base for frm. | |
25401 | (struct widen_alu_frm_def): New struct for widen alu frm. | |
25402 | (SHAPE): Add widen_alu_frm shape. | |
25403 | * config/riscv/riscv-vector-builtins-shapes.h: New declaration. | |
25404 | * config/riscv/vector.md (frm_mode): Add vfwalu type. | |
25405 | ||
25406 | 2023-08-02 Jan Hubicka <jh@suse.cz> | |
25407 | ||
25408 | * cfgloop.h (loop_count_in): Declare. | |
25409 | * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in. | |
25410 | (loop_count_in): Move here from ... | |
25411 | * cfgloopmanip.cc (loop_count_in): ... here. | |
25412 | (scale_loop_profile): Improve dumping; cast iteration bound to sreal. | |
25413 | ||
25414 | 2023-08-02 Jan Hubicka <jh@suse.cz> | |
25415 | ||
25416 | * cfg.cc (scale_strictly_dominated_blocks): New function. | |
25417 | * cfg.h (scale_strictly_dominated_blocks): Declare. | |
25418 | * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile. | |
25419 | ||
25420 | 2023-08-02 Richard Biener <rguenther@suse.de> | |
25421 | ||
25422 | PR rtl-optimization/110587 | |
25423 | * lra-spills.cc (return_regno_p): Remove. | |
25424 | (regno_in_use_p): Likewise. | |
25425 | (lra_final_code_change): Do not remove noop moves | |
25426 | between hard registers. | |
25427 | ||
25428 | 2023-08-02 liuhongt <hongtao.liu@intel.com> | |
25429 | ||
25430 | PR target/81904 | |
25431 | * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector | |
25432 | HFmode, use mode iterator VFH instead. | |
25433 | (vec_fmsubadd<mode>4): Ditto. | |
25434 | (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>): | |
25435 | Remove scalar mode from iterator, use VFH_AVX512VL instead. | |
25436 | (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>): | |
25437 | Ditto. | |
25438 | ||
25439 | 2023-08-02 liuhongt <hongtao.liu@intel.com> | |
25440 | ||
25441 | * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New | |
25442 | pre_reload define_insn_and_split. | |
25443 | ||
25444 | 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com> | |
25445 | ||
25446 | * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for | |
25447 | using Zicond to implement some conditional moves. | |
25448 | ||
25449 | 2023-08-02 Jeff Law <jlaw@ventanamicro.com> | |
25450 | ||
25451 | * config/riscv/zicond.md: Use the X iterator instead of ANYI | |
25452 | on the comparison input operands. | |
25453 | ||
25454 | 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com> | |
25455 | ||
25456 | * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add | |
25457 | Zicond costing. | |
25458 | (case SET): For INSNs that just set a REG, take the cost from the | |
25459 | SET_SRC. | |
25460 | Co-authored-by: Jeff Law <jlaw@ventanamicro.com> | |
25461 | ||
25462 | 2023-08-02 Hu, Lin1 <lin1.hu@intel.com> | |
25463 | ||
25464 | * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET): | |
25465 | Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET. | |
25466 | (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto | |
25467 | (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto | |
25468 | (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto | |
25469 | (OPTION_MASK_ISA_ABM_SET): | |
25470 | Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET. | |
25471 | ||
25472 | 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com> | |
25473 | ||
25474 | * config/s390/s390.cc (s390_encode_section_info): Assume external | |
25475 | symbols without explicit alignment to be unaligned if | |
25476 | -munaligned-symbols has been specified. | |
25477 | * config/s390/s390.opt (-munaligned-symbols): New option. | |
25478 | ||
25479 | 2023-08-01 Richard Ball <richard.ball@arm.com> | |
25480 | ||
25481 | * gimple-fold.cc (fold_ctor_reference): | |
25482 | Add support for poly_int. | |
25483 | ||
25484 | 2023-08-01 Georg-Johann Lay <avr@gjlay.de> | |
25485 | ||
25486 | PR target/110220 | |
25487 | * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and | |
25488 | LABEL_NUSES of new conditional branch instruction. | |
25489 | ||
25490 | 2023-08-01 Jan Hubicka <jh@suse.cz> | |
25491 | ||
25492 | * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after | |
25493 | constant prologue peeling. | |
25494 | ||
25495 | 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org> | |
25496 | ||
25497 | * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling. | |
25498 | ||
25499 | 2023-08-01 Pan Li <pan2.li@intel.com> | |
25500 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
25501 | ||
25502 | * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro. | |
25503 | (STATIC_FRM_P): Ditto. | |
25504 | (struct mode_switching_info): New struct for mode switching. | |
25505 | (struct machine_function): Add new field mode switching. | |
25506 | (riscv_emit_frm_mode_set): Add DYN_CALL emit. | |
25507 | (riscv_frm_adjust_mode_after_call): New function for call mode. | |
25508 | (riscv_frm_emit_after_call_in_bb_end): New function for emit | |
25509 | insn when call as the end of bb. | |
25510 | (riscv_frm_mode_needed): New function for frm mode needed. | |
25511 | (frm_unknown_dynamic_p): Remove call check. | |
25512 | (riscv_mode_needed): Extrac function for frm. | |
25513 | (riscv_frm_mode_after): Add DYN_CALL after. | |
25514 | (riscv_mode_entry): Remove backup rtl initialization. | |
25515 | * config/riscv/vector.md (frm_mode): Add dyn_call. | |
25516 | (fsrmsi_restore_exit): Rename to _volatile. | |
25517 | (fsrmsi_restore_volatile): Likewise. | |
25518 | ||
25519 | 2023-08-01 Pan Li <pan2.li@intel.com> | |
25520 | ||
25521 | * config/riscv/riscv-vector-builtins-bases.cc | |
25522 | (class reverse_binop_frm): Add new template for reversed frm. | |
25523 | (vfsub_frm_obj): New obj. | |
25524 | (vfrsub_frm_obj): Likewise. | |
25525 | * config/riscv/riscv-vector-builtins-bases.h: | |
25526 | (vfsub_frm): New declaration. | |
25527 | (vfrsub_frm): Likewise. | |
25528 | * config/riscv/riscv-vector-builtins-functions.def | |
25529 | (vfsub_frm): New function define. | |
25530 | (vfrsub_frm): Likewise. | |
25531 | ||
25532 | 2023-08-01 Andrew Pinski <apinski@marvell.com> | |
25533 | ||
25534 | PR tree-optimization/93044 | |
25535 | * match.pd (nested int casts): A truncation (to the same size or smaller) | |
25536 | can always remove the inner cast. | |
25537 | ||
25538 | 2023-07-31 Hamza Mahfooz <someguy@effective-light.com> | |
25539 | ||
25540 | PR c/65213 | |
25541 | * doc/invoke.texi (-Wmissing-variable-declarations): Document | |
25542 | new option. | |
25543 | ||
25544 | 2023-07-31 Andrew Pinski <apinski@marvell.com> | |
25545 | ||
25546 | PR tree-optimization/106164 | |
25547 | * match.pd (`a != b & a <= b`, `a != b & a >= b`, | |
25548 | `a == b | a < b`, `a == b | a > b`): Handle these cases | |
25549 | too. | |
25550 | ||
25551 | 2023-07-31 Andrew Pinski <apinski@marvell.com> | |
25552 | ||
25553 | PR tree-optimization/106164 | |
25554 | * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)` | |
25555 | patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`. | |
25556 | ||
25557 | 2023-07-31 Andrew Pinski <apinski@marvell.com> | |
25558 | ||
25559 | PR tree-optimization/100864 | |
25560 | * generic-match-head.cc (bitwise_inverted_equal_p): New function. | |
25561 | * gimple-match-head.cc (bitwise_inverted_equal_p): New macro. | |
25562 | (gimple_bitwise_inverted_equal_p): New function. | |
25563 | * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p | |
25564 | instead of direct matching bit_not. | |
25565 | ||
25566 | 2023-07-31 Costas Argyris <costas.argyris@gmail.com> | |
25567 | ||
25568 | PR driver/77576 | |
25569 | * gcc-ar.cc (main): Expand argv and use | |
25570 | temporary response file to call ar if any | |
25571 | expansions were made. | |
25572 | ||
25573 | 2023-07-31 Andrew MacLeod <amacleod@redhat.com> | |
25574 | ||
25575 | PR tree-optimization/110582 | |
25576 | * gimple-range-fold.cc (fur_list::get_operand): Do not use the | |
25577 | range vector for non-ssa names. | |
25578 | ||
25579 | 2023-07-31 David Malcolm <dmalcolm@redhat.com> | |
25580 | ||
25581 | PR analyzer/109361 | |
25582 | * diagnostic-client-data-hooks.h (class sarif_object): New forward | |
25583 | decl. | |
25584 | (diagnostic_client_data_hooks::add_sarif_invocation_properties): | |
25585 | New vfunc. | |
25586 | * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h". | |
25587 | (class sarif_invocation): Inherit from sarif_object rather than | |
25588 | json::object. | |
25589 | (class sarif_result): Likewise. | |
25590 | (class sarif_ice_notification): Likewise. | |
25591 | (sarif_object::get_or_create_properties): New. | |
25592 | (sarif_invocation::prepare_to_flush): Add "context" param. Use it | |
25593 | to call the context's add_sarif_invocation_properties hook. | |
25594 | (sarif_builder::flush_to_file): Pass m_context to | |
25595 | sarif_invocation::prepare_to_flush. | |
25596 | * diagnostic-format-sarif.h: New header. | |
25597 | * doc/invoke.texi (Developer Options): Clarify that -ftime-report | |
25598 | writes to stderr. Document that if SARIF diagnostic output is | |
25599 | requested then any timing information is written in JSON form as | |
25600 | part of the SARIF output, rather than to stderr. | |
25601 | * timevar.cc: Include "json.h". | |
25602 | (timer::named_items::m_hash_map): Split out type into... | |
25603 | (timer::named_items::hash_map_t): ...this new typedef. | |
25604 | (timer::named_items::make_json): New function. | |
25605 | (timevar_diff): New function. | |
25606 | (make_json_for_timevar_time_def): New function. | |
25607 | (timer::timevar_def::make_json): New function. | |
25608 | (timer::make_json): New function. | |
25609 | * timevar.h (class json::value): New forward decl. | |
25610 | (timer::make_json): New decl. | |
25611 | (timer::timevar_def::make_json): New decl. | |
25612 | * tree-diagnostic-client-data-hooks.cc: Include | |
25613 | "diagnostic-format-sarif.h" and "timevar.h". | |
25614 | (compiler_data_hooks::add_sarif_invocation_properties): New vfunc | |
25615 | implementation. | |
25616 | ||
25617 | 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
25618 | ||
25619 | * combine.cc (simplify_compare_const): Narrow comparison of | |
25620 | memory and constant. | |
25621 | (try_combine): Adapt new function signature. | |
25622 | (simplify_comparison): Adapt new function signature. | |
25623 | ||
25624 | 2023-07-31 Kito Cheng <kito.cheng@sifive.com> | |
25625 | ||
25626 | * config/riscv/riscv-v.cc (expand_vec_series): Drop unused | |
25627 | variable. | |
25628 | (expand_vector_init_insert_elems): Ditto. | |
25629 | ||
25630 | 2023-07-31 Hao Liu <hliu@os.amperecomputing.com> | |
25631 | ||
25632 | PR target/110625 | |
25633 | * config/aarch64/aarch64.cc (count_ops): Only '* count' for | |
25634 | single_defuse_cycle while counting reduction_latency. | |
25635 | ||
25636 | 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
25637 | ||
25638 | * internal-fn.def (DEF_INTERNAL_COND_FN): New macro. | |
25639 | (DEF_INTERNAL_SIGNED_COND_FN): Ditto. | |
25640 | (COND_ADD): Remove. | |
25641 | (COND_SUB): Ditto. | |
25642 | (COND_MUL): Ditto. | |
25643 | (COND_DIV): Ditto. | |
25644 | (COND_MOD): Ditto. | |
25645 | (COND_RDIV): Ditto. | |
25646 | (COND_MIN): Ditto. | |
25647 | (COND_MAX): Ditto. | |
25648 | (COND_FMIN): Ditto. | |
25649 | (COND_FMAX): Ditto. | |
25650 | (COND_AND): Ditto. | |
25651 | (COND_IOR): Ditto. | |
25652 | (COND_XOR): Ditto. | |
25653 | (COND_SHL): Ditto. | |
25654 | (COND_SHR): Ditto. | |
25655 | (COND_FMA): Ditto. | |
25656 | (COND_FMS): Ditto. | |
25657 | (COND_FNMA): Ditto. | |
25658 | (COND_FNMS): Ditto. | |
25659 | (COND_NEG): Ditto. | |
25660 | (COND_LEN_ADD): Ditto. | |
25661 | (COND_LEN_SUB): Ditto. | |
25662 | (COND_LEN_MUL): Ditto. | |
25663 | (COND_LEN_DIV): Ditto. | |
25664 | (COND_LEN_MOD): Ditto. | |
25665 | (COND_LEN_RDIV): Ditto. | |
25666 | (COND_LEN_MIN): Ditto. | |
25667 | (COND_LEN_MAX): Ditto. | |
25668 | (COND_LEN_FMIN): Ditto. | |
25669 | (COND_LEN_FMAX): Ditto. | |
25670 | (COND_LEN_AND): Ditto. | |
25671 | (COND_LEN_IOR): Ditto. | |
25672 | (COND_LEN_XOR): Ditto. | |
25673 | (COND_LEN_SHL): Ditto. | |
25674 | (COND_LEN_SHR): Ditto. | |
25675 | (COND_LEN_FMA): Ditto. | |
25676 | (COND_LEN_FMS): Ditto. | |
25677 | (COND_LEN_FNMA): Ditto. | |
25678 | (COND_LEN_FNMS): Ditto. | |
25679 | (COND_LEN_NEG): Ditto. | |
25680 | (ADD): New macro define. | |
25681 | (SUB): Ditto. | |
25682 | (MUL): Ditto. | |
25683 | (DIV): Ditto. | |
25684 | (MOD): Ditto. | |
25685 | (RDIV): Ditto. | |
25686 | (MIN): Ditto. | |
25687 | (MAX): Ditto. | |
25688 | (FMIN): Ditto. | |
25689 | (FMAX): Ditto. | |
25690 | (AND): Ditto. | |
25691 | (IOR): Ditto. | |
25692 | (XOR): Ditto. | |
25693 | (SHL): Ditto. | |
25694 | (SHR): Ditto. | |
25695 | (FMA): Ditto. | |
25696 | (FMS): Ditto. | |
25697 | (FNMA): Ditto. | |
25698 | (FNMS): Ditto. | |
25699 | (NEG): Ditto. | |
25700 | ||
25701 | 2023-07-31 Roger Sayle <roger@nextmovesoftware.com> | |
25702 | ||
25703 | PR target/110843 | |
25704 | * config/i386/i386-features.cc (compute_convert_gain): Check | |
25705 | TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode | |
25706 | and V4SImode rotates in STV. | |
25707 | (general_scalar_chain::convert_rotate): Likewise. | |
25708 | ||
25709 | 2023-07-31 Kito Cheng <kito.cheng@sifive.com> | |
25710 | ||
25711 | * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`. | |
25712 | * config/riscv/riscv-protos.h (get_mask_mode): Update return | |
25713 | type. | |
25714 | * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove | |
25715 | `.require ()`. | |
25716 | (emit_vlmax_insn): Ditto. | |
25717 | (emit_vlmax_fp_insn): Ditto. | |
25718 | (emit_vlmax_ternary_insn): Ditto. | |
25719 | (emit_vlmax_fp_ternary_insn): Ditto. | |
25720 | (emit_nonvlmax_fp_ternary_tu_insn): Ditto. | |
25721 | (emit_nonvlmax_insn): Ditto. | |
25722 | (emit_vlmax_slide_insn): Ditto. | |
25723 | (emit_nonvlmax_slide_tu_insn): Ditto. | |
25724 | (emit_vlmax_merge_insn): Ditto. | |
25725 | (emit_vlmax_masked_insn): Ditto. | |
25726 | (emit_nonvlmax_masked_insn): Ditto. | |
25727 | (emit_vlmax_masked_store_insn): Ditto. | |
25728 | (emit_nonvlmax_masked_store_insn): Ditto. | |
25729 | (emit_vlmax_masked_mu_insn): Ditto. | |
25730 | (emit_nonvlmax_tu_insn): Ditto. | |
25731 | (emit_nonvlmax_fp_tu_insn): Ditto. | |
25732 | (emit_scalar_move_insn): Ditto. | |
25733 | (emit_vlmax_compress_insn): Ditto. | |
25734 | (emit_vlmax_reduction_insn): Ditto. | |
25735 | (emit_vlmax_fp_reduction_insn): Ditto. | |
25736 | (emit_nonvlmax_fp_reduction_insn): Ditto. | |
25737 | (expand_vec_series): Ditto. | |
25738 | (expand_vector_init_merge_repeating_sequence): Ditto. | |
25739 | (expand_vec_perm): Ditto. | |
25740 | (shuffle_merge_patterns): Ditto. | |
25741 | (shuffle_compress_patterns): Ditto. | |
25742 | (shuffle_decompress_patterns): Ditto. | |
25743 | (expand_reduction): Ditto. | |
25744 | (get_mask_mode): Update return type. | |
25745 | * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type | |
25746 | is valid, and use new get_mask_mode interface. | |
25747 | ||
25748 | 2023-07-31 Pan Li <pan2.li@intel.com> | |
25749 | ||
25750 | * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def): | |
25751 | Move rm suffix before mask. | |
25752 | ||
25753 | 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
25754 | ||
25755 | * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern. | |
25756 | * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec | |
25757 | support. | |
25758 | ||
25759 | 2023-07-29 Roger Sayle <roger@nextmovesoftware.com> | |
25760 | ||
25761 | PR target/110790 | |
25762 | * config/i386/i386.md (extv<mode>): Use QImode for offsets. | |
25763 | (extzv<mode>): Likewise. | |
25764 | (insv<mode>): Likewise. | |
25765 | (*testqi_ext_3): Likewise. | |
25766 | (*btr<mode>_2): Likewise. | |
25767 | (define_split): Likewise. | |
25768 | (*btsq_imm): Likewise. | |
25769 | (*btrq_imm): Likewise. | |
25770 | (*btcq_imm): Likewise. | |
25771 | (define_peephole2 x3): Likewise. | |
25772 | (*bt<mode>): Likewise | |
25773 | (*bt<mode>_mask): New define_insn_and_split. | |
25774 | (*jcc_bt<mode>): Use QImode for offsets. | |
25775 | (*jcc_bt<mode>_1): Delete obsolete pattern. | |
25776 | (*jcc_bt<mode>_mask): Use QImode offsets. | |
25777 | (*jcc_bt<mode>_mask_1): Likewise. | |
25778 | (define_split): Likewise. | |
25779 | (*bt<mode>_setcqi): Likewise. | |
25780 | (*bt<mode>_setncqi): Likewise. | |
25781 | (*bt<mode>_setnc<mode>): Likewise. | |
25782 | (*bt<mode>_setncqi_2): Likewise. | |
25783 | (*bt<mode>_setc<mode>_mask): New define_insn_and_split. | |
25784 | (bmi2_bzhi_<mode>3): Use QImode offsets. | |
25785 | (*bmi2_bzhi_<mode>3): Likewise. | |
25786 | (*bmi2_bzhi_<mode>3_1): Likewise. | |
25787 | (*bmi2_bzhi_<mode>3_1_ccz): Likewise. | |
25788 | (@tbm_bextri_<mode>): Likewise. | |
25789 | ||
25790 | 2023-07-29 Jan Hubicka <jh@suse.cz> | |
25791 | ||
25792 | * profile-count.cc (profile_probability::sqrt): New member function. | |
25793 | (profile_probability::pow): Likewise. | |
25794 | * profile-count.h: (profile_probability::sqrt): Declare | |
25795 | (profile_probability::pow): Likewise. | |
25796 | * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update. | |
25797 | ||
25798 | 2023-07-28 Andrew MacLeod <amacleod@redhat.com> | |
25799 | ||
25800 | * gimple-range-cache.cc (ssa_cache::merge_range): New. | |
25801 | (ssa_lazy_cache::merge_range): New. | |
25802 | * gimple-range-cache.h (class ssa_cache): Adjust protoypes. | |
25803 | (class ssa_lazy_cache): Ditto. | |
25804 | * gimple-range.cc (assume_query::calculate_op): Use merge_range. | |
25805 | ||
25806 | 2023-07-28 Andrew MacLeod <amacleod@redhat.com> | |
25807 | ||
25808 | * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge): | |
25809 | Move from value-query.cc. | |
25810 | (substitute_and_fold_engine::value_of_stmt): Ditto. | |
25811 | (substitute_and_fold_engine::range_of_expr): New. | |
25812 | * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from | |
25813 | range_query. New prototypes. | |
25814 | * value-query.cc (value_query::value_on_edge): Relocate. | |
25815 | (value_query::value_of_stmt): Ditto. | |
25816 | * value-query.h (class value_query): Remove. | |
25817 | (class range_query): Remove base class. Adjust prototypes. | |
25818 | ||
25819 | 2023-07-28 Andrew MacLeod <amacleod@redhat.com> | |
25820 | ||
25821 | PR tree-optimization/110205 | |
25822 | * gimple-range-cache.h (ranger_cache::m_estimate): Delete. | |
25823 | * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect): | |
25824 | Add final override. | |
25825 | * range-op.cc (operator_lshift): Add missing final overrides. | |
25826 | (operator_rshift): Ditto. | |
25827 | ||
25828 | 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com> | |
25829 | ||
25830 | * config/bpf/bpf.cc (bpf_option_override): Disable tail-call | |
25831 | optimizations in BPF target. | |
25832 | ||
25833 | 2023-07-28 Honza <jh@ryzen4.suse.cz> | |
25834 | ||
25835 | * cfgloopmanip.cc (loop_count_in): Break out from ... | |
25836 | (loop_exit_for_scaling): Break out from ... | |
25837 | (update_loop_exit_probability_scale_dom_bbs): Break out from ...; | |
25838 | add more sanity check and debug info. | |
25839 | (scale_loop_profile): ... here. | |
25840 | (create_empty_loop_on_edge): Fix whitespac. | |
25841 | * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare. | |
25842 | * loop-unroll.cc (unroll_loop_constant_iterations): Use | |
25843 | update_loop_exit_probability_scale_dom_bbs. | |
25844 | * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove. | |
25845 | (tree_transform_and_unroll_loop): Use | |
25846 | update_loop_exit_probability_scale_dom_bbs. | |
25847 | * tree-ssa-loop-split.cc (split_loop): Use | |
25848 | update_loop_exit_probability_scale_dom_bbs. | |
25849 | ||
25850 | 2023-07-28 Jan Hubicka <jh@suse.cz> | |
25851 | ||
25852 | PR middle-end/77689 | |
25853 | * tree-ssa-loop-split.cc: Include value-query.h. | |
25854 | (split_at_bb_p): Analyze cases where EQ/NE can be turned | |
25855 | into LT/LE/GT/GE; return updated guard code. | |
25856 | (split_loop): Use guard code. | |
25857 | ||
25858 | 2023-07-28 Roger Sayle <roger@nextmovesoftware.com> | |
25859 | Richard Biener <rguenther@suse.de> | |
25860 | ||
25861 | PR middle-end/28071 | |
25862 | PR rtl-optimization/110587 | |
25863 | * expr.cc (emit_group_load_1): Simplify logic for calling | |
25864 | force_reg on ORIG_SRC, to avoid making a copy if the source | |
25865 | is already in a pseudo register. | |
25866 | ||
25867 | 2023-07-28 Jan Hubicka <jh@suse.cz> | |
25868 | ||
25869 | PR middle-end/106923 | |
25870 | * tree-ssa-loop-split.cc (connect_loops): Change probability | |
25871 | of the test preconditioning second loop to very_likely. | |
25872 | (fix_loop_bb_probability): Handle correctly case where | |
25873 | on of the arms of the conditional is empty. | |
25874 | (split_loop): Fold the test guarding first condition to | |
25875 | see if it is constant true; Set correct entry block | |
25876 | probabilities of the split loops; determine correct loop | |
25877 | eixt probabilities. | |
25878 | ||
25879 | 2023-07-28 xuli <xuli1@eswincomputing.com> | |
25880 | ||
25881 | * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of | |
25882 | vsadd[u] and vssub[u]. | |
25883 | * config/riscv/vector.md: Ditto. | |
25884 | ||
25885 | 2023-07-28 Jan Hubicka <jh@suse.cz> | |
25886 | ||
25887 | * tree-ssa-loop-split.cc (split_loop): Also support NE driven | |
25888 | loops when IV test is not overflowing. | |
25889 | ||
25890 | 2023-07-28 liuhongt <hongtao.liu@intel.com> | |
25891 | ||
25892 | PR target/110788 | |
25893 | * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add | |
25894 | UNSPEC_MASKOP. | |
25895 | (avx512cd_maskw_vec_dup<mode>): Ditto. | |
25896 | ||
25897 | 2023-07-27 David Faust <david.faust@oracle.com> | |
25898 | ||
25899 | PR target/110782 | |
25900 | PR target/110784 | |
25901 | * config/bpf/bpf.opt (msmov): New option. | |
25902 | * config/bpf/bpf.cc (bpf_option_override): Handle it here. | |
25903 | * config/bpf/bpf.md (*extendsidi2): New. | |
25904 | (extendhidi2): New. | |
25905 | (extendqidi2): New. | |
25906 | (extendsisi2): New. | |
25907 | (extendhisi2): New. | |
25908 | (extendqisi2): New. | |
25909 | * doc/invoke.texi (Option Summary): Add -msmov eBPF option. | |
25910 | (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4 | |
25911 | also enables -msmov. | |
25912 | ||
25913 | 2023-07-27 David Faust <david.faust@oracle.com> | |
25914 | ||
25915 | * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option. | |
25916 | Add -mbswap and -msdiv eBPF options. | |
25917 | (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32, | |
25918 | alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also | |
25919 | enables -msdiv. | |
25920 | ||
25921 | 2023-07-27 David Faust <david.faust@oracle.com> | |
25922 | ||
25923 | * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1 | |
25924 | in pseudo-C dialect output template. | |
25925 | (sub<AM:mode>3): Likewise. | |
25926 | ||
25927 | 2023-07-27 Jan Hubicka <jh@suse.cz> | |
25928 | ||
25929 | * tree-vect-loop.cc (optimize_mask_stores): Make store | |
25930 | likely. | |
25931 | ||
25932 | 2023-07-27 Jan Hubicka <jh@suse.cz> | |
25933 | ||
25934 | * cfgloop.h (single_dom_exit): Declare. | |
25935 | * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare. | |
25936 | * cfgrtl.cc (struct cfg_hooks): Fix comment. | |
25937 | * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge. | |
25938 | * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here. | |
25939 | * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): | |
25940 | Break out from ... | |
25941 | (tree_transform_and_unroll_loop): ... here; | |
25942 | ||
25943 | 2023-07-27 Jan Hubicka <jh@suse.cz> | |
25944 | ||
25945 | * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from | |
25946 | tree-ssa-loop-manip.cc and avoid recursion. | |
25947 | (scale_loop_profile): Use scale_dominated_blocks_in_loop. | |
25948 | (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE | |
25949 | flag. | |
25950 | * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define. | |
25951 | (scale_dominated_blocks_in_loop): Declare. | |
25952 | * predict.cc (dump_prediction): Do not ICE on uninitialized probability. | |
25953 | (change_edge_frequency): Remove. | |
25954 | * predict.h (change_edge_frequency): Remove. | |
25955 | * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to | |
25956 | cfgloopmanip.cc. | |
25957 | (niter_for_unrolled_loop): Remove. | |
25958 | (tree_transform_and_unroll_loop): Fix profile update. | |
25959 | ||
25960 | 2023-07-27 Jan Hubicka <jh@suse.cz> | |
25961 | ||
25962 | * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability | |
25963 | to guessed; fix count of new_bb. | |
25964 | ||
25965 | 2023-07-27 Jan Hubicka <jh@suse.cz> | |
25966 | ||
25967 | * profile-count.h (profile_count::apply_probability): Fix | |
25968 | handling of uninitialized probabilities, optimize scaling | |
25969 | by probability 1. | |
25970 | ||
25971 | 2023-07-27 Richard Biener <rguenther@suse.de> | |
25972 | ||
25973 | PR tree-optimization/91838 | |
25974 | * gimple-match-head.cc: Include attribs.h and asan.h. | |
25975 | * generic-match-head.cc: Likewise. | |
25976 | * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern. | |
25977 | ||
25978 | 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
25979 | ||
25980 | * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes. | |
25981 | (ADJUST_ALIGNMENT): Ditto. | |
25982 | (ADJUST_PRECISION): Ditto. | |
25983 | (VLS_MODES): Ditto. | |
25984 | (VECTOR_MODE_WITH_PREFIX): Ditto. | |
25985 | * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro. | |
25986 | * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function. | |
25987 | * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include. | |
25988 | (legitimize_move): Enable basic VLS modes support. | |
25989 | (get_vlmul): Ditto. | |
25990 | (get_ratio): Ditto. | |
25991 | (get_vector_mode): Ditto. | |
25992 | * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes. | |
25993 | * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function. | |
25994 | (VLS_ENTRY): New macro. | |
25995 | (riscv_v_ext_mode_p): Add vls modes. | |
25996 | (riscv_get_v_regno_alignment): New function. | |
25997 | (riscv_print_operand): Add vls modes. | |
25998 | (riscv_hard_regno_nregs): Ditto. | |
25999 | (riscv_hard_regno_mode_ok): Ditto. | |
26000 | (riscv_regmode_natural_size): Ditto. | |
26001 | (riscv_vectorize_preferred_vector_alignment): Ditto. | |
26002 | * config/riscv/riscv.md: Ditto. | |
26003 | * config/riscv/vector-iterators.md: Ditto. | |
26004 | * config/riscv/vector.md: Ditto. | |
26005 | * config/riscv/autovec-vls.md: New file. | |
26006 | ||
26007 | 2023-07-27 Pan Li <pan2.li@intel.com> | |
26008 | ||
26009 | * config/riscv/riscv_vector.h (enum RVV_CSR): Removed. | |
26010 | (vread_csr): Ditto. | |
26011 | (vwrite_csr): Ditto. | |
26012 | ||
26013 | 2023-07-27 demin.han <demin.han@starfivetech.com> | |
26014 | ||
26015 | * config/riscv/autovec.md: Delete which_alternative use in split | |
26016 | ||
26017 | 2023-07-27 Richard Biener <rguenther@suse.de> | |
26018 | ||
26019 | * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead | |
26020 | use a worklist ... | |
26021 | (pass_sink_code::execute): ... in the caller. | |
26022 | ||
26023 | 2023-07-27 Kewen Lin <linkw@linux.ibm.com> | |
26024 | Richard Biener <rguenther@suse.de> | |
26025 | ||
26026 | PR tree-optimization/110776 | |
26027 | * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE | |
26028 | as scalar load. | |
26029 | ||
26030 | 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com> | |
26031 | ||
26032 | * config/riscv/riscv.md: Include zicond.md | |
26033 | * config/riscv/zicond.md: New file. | |
26034 | ||
26035 | 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com> | |
26036 | ||
26037 | * common/config/riscv/riscv-common.cc: New extension. | |
26038 | * config/riscv/riscv-opts.h (MASK_ZICOND): New mask. | |
26039 | (TARGET_ZICOND): New target. | |
26040 | ||
26041 | 2023-07-26 Carl Love <cel@us.ibm.com> | |
26042 | ||
26043 | * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that | |
26044 | specifies the number of built-in arguments to check. | |
26045 | (altivec_resolve_overloaded_builtin): Update calls to find_instance | |
26046 | to pass the number of built-in arguments to be checked. | |
26047 | ||
26048 | 2023-07-26 David Faust <david.faust@oracle.com> | |
26049 | ||
26050 | * config/bpf/bpf.opt (mv3-atomics): New option. | |
26051 | * config/bpf/bpf.cc (bpf_option_override): Handle it here. | |
26052 | * config/bpf/bpf.h (enum_reg_class): Add R0 class. | |
26053 | (REG_CLASS_NAMES): Likewise. | |
26054 | (REG_CLASS_CONTENTS): Likewise. | |
26055 | (REGNO_REG_CLASS): Handle R0. | |
26056 | * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD. | |
26057 | (UNSPEC_AAND): New unspec. | |
26058 | (UNSPEC_AOR): Likewise. | |
26059 | (UNSPEC_AXOR): Likewise. | |
26060 | (UNSPEC_AFADD): Likewise. | |
26061 | (UNSPEC_AFAND): Likewise. | |
26062 | (UNSPEC_AFOR): Likewise. | |
26063 | (UNSPEC_AFXOR): Likewise. | |
26064 | (UNSPEC_AXCHG): Likewise. | |
26065 | (UNSPEC_ACMPX): Likewise. | |
26066 | (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute. | |
26067 | Move to... | |
26068 | * config/bpf/atomic.md: ...Here. New file. | |
26069 | * config/bpf/constraints.md (t): New constraint for R0. | |
26070 | * doc/invoke.texi (eBPF Options): Document -mv3-atomics. | |
26071 | ||
26072 | 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com> | |
26073 | ||
26074 | * tree-vect-stmts.cc (get_group_load_store_type): Reformat | |
26075 | comment. | |
26076 | ||
26077 | 2023-07-26 Carl Love <cel@us.ibm.com> | |
26078 | ||
26079 | * config/rs6000/rs6000-builtins.def: Rename | |
26080 | __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi | |
26081 | __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi | |
26082 | __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df | |
26083 | __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di | |
26084 | __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf | |
26085 | __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si. | |
26086 | Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as | |
26087 | VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF, | |
26088 | VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as | |
26089 | VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI. | |
26090 | Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as | |
26091 | vreplace_un_si, vreplace_un_v2df as vreplace_un_df, | |
26092 | vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as | |
26093 | vreplace_un_sf, vreplace_un_v4si as vreplace_un_si. | |
26094 | * config/rs6000/rs6000-c.cc (find_instance): Add case | |
26095 | RS6000_OVLD_VEC_REPLACE_UN. | |
26096 | * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un): | |
26097 | Fix first argument type. Rename VREPLACE_UN_UV4SI as | |
26098 | VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI, | |
26099 | VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as | |
26100 | VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF, | |
26101 | VREPLACE_UN_V2DF as VREPLACE_UN_DF. | |
26102 | * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator | |
26103 | REPLACE_ELT_V for vector modes. | |
26104 | (REPLACE_ELT): New scalar mode iterator. | |
26105 | (REPLACE_ELT_char): Add scalar attributes. | |
26106 | (vreplace_un_<mode>): Change iterator and mode attribute. | |
26107 | ||
26108 | 2023-07-26 David Malcolm <dmalcolm@redhat.com> | |
26109 | ||
26110 | PR analyzer/104940 | |
26111 | * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o. | |
26112 | ||
26113 | 2023-07-26 Richard Biener <rguenther@suse.de> | |
26114 | ||
26115 | PR tree-optimization/106081 | |
26116 | * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts): | |
26117 | Assign layout -1 to splats. | |
26118 | ||
26119 | 2023-07-26 Aldy Hernandez <aldyh@redhat.com> | |
26120 | ||
26121 | * range-op-mixed.h (class operator_cast): Add update_bitmask. | |
26122 | * range-op.cc (operator_cast::update_bitmask): New. | |
26123 | (operator_cast::fold_range): Call update_bitmask. | |
26124 | ||
26125 | 2023-07-26 Li Xu <xuli1@eswincomputing.com> | |
26126 | ||
26127 | * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change | |
26128 | scalar type to float16, eliminate warning. | |
26129 | (vfloat16mf4x3_t): Ditto. | |
26130 | (vfloat16mf4x4_t): Ditto. | |
26131 | (vfloat16mf4x5_t): Ditto. | |
26132 | (vfloat16mf4x6_t): Ditto. | |
26133 | (vfloat16mf4x7_t): Ditto. | |
26134 | (vfloat16mf4x8_t): Ditto. | |
26135 | (vfloat16mf2x2_t): Ditto. | |
26136 | (vfloat16mf2x3_t): Ditto. | |
26137 | (vfloat16mf2x4_t): Ditto. | |
26138 | (vfloat16mf2x5_t): Ditto. | |
26139 | (vfloat16mf2x6_t): Ditto. | |
26140 | (vfloat16mf2x7_t): Ditto. | |
26141 | (vfloat16mf2x8_t): Ditto. | |
26142 | (vfloat16m1x2_t): Ditto. | |
26143 | (vfloat16m1x3_t): Ditto. | |
26144 | (vfloat16m1x4_t): Ditto. | |
26145 | (vfloat16m1x5_t): Ditto. | |
26146 | (vfloat16m1x6_t): Ditto. | |
26147 | (vfloat16m1x7_t): Ditto. | |
26148 | (vfloat16m1x8_t): Ditto. | |
26149 | (vfloat16m2x2_t): Ditto. | |
26150 | (vfloat16m2x3_t): Ditto. | |
26151 | (vfloat16m2x4_t): Ditto. | |
26152 | (vfloat16m4x2_t): Ditto. | |
26153 | * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T. | |
26154 | * config/riscv/vector.md: add tuple mode in attr sew. | |
26155 | ||
26156 | 2023-07-26 Uros Bizjak <ubizjak@gmail.com> | |
26157 | ||
26158 | PR target/110762 | |
26159 | * config/i386/i386.md (plusminusmult): New code iterator. | |
26160 | * config/i386/mmx.md (mmxdoublevecmode): New mode attribute. | |
26161 | (movq_<mode>_to_sse): New expander. | |
26162 | (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3, | |
26163 | subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite | |
26164 | as a wrapper around V4SFmode operation. | |
26165 | (mmx_addv2sf3): Change operand 1 and operand 2 predicates to | |
26166 | nonimmediate_operand. | |
26167 | (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and | |
26168 | operand 2 predicates to nonimmediate_operand. | |
26169 | (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand. | |
26170 | (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand. | |
26171 | (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and | |
26172 | operand 2 predicates to nonimmediate_operand. | |
26173 | (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to | |
26174 | nonimmediate_operand. | |
26175 | (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and | |
26176 | operand 2 predicates to nonimmediate_operand. | |
26177 | (divv2sf3): Rewrite as a wrapper around V4SFmode operation. | |
26178 | (<smaxmin:code>v2sf3): Ditto. | |
26179 | (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2 | |
26180 | predicates to nonimmediate_operand. | |
26181 | (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change | |
26182 | operand 1 and operand 2 predicates to nonimmediate_operand. | |
26183 | (mmx_ieee_<ieee_maxmin>v2sf3): Ditto. | |
26184 | (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation. | |
26185 | (*mmx_haddv2sf3_low): Ditto. | |
26186 | (*mmx_hsubv2sf3_low): Ditto. | |
26187 | (vec_addsubv2sf3): Ditto. | |
26188 | (*mmx_maskcmpv2sf3_comm): Remove. | |
26189 | (*mmx_maskcmpv2sf3): Remove. | |
26190 | (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation. | |
26191 | (vcond<V2FI:mode>v2sf): Ditto. | |
26192 | (fmav2sf4): Ditto. | |
26193 | (fmsv2sf4): Ditto. | |
26194 | (fnmav2sf4): Ditto. | |
26195 | (fnmsv2sf4): Ditto. | |
26196 | (fix_truncv2sfv2si2): Ditto. | |
26197 | (fixuns_truncv2sfv2si2): Ditto. | |
26198 | (mmx_fix_truncv2sfv2si2): Remove SSE alternatives. | |
26199 | Change operand 1 predicate to nonimmediate_operand. | |
26200 | (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation. | |
26201 | (floatunsv2siv2sf2): Ditto. | |
26202 | (mmx_floatv2siv2sf2): Remove SSE alternatives. | |
26203 | Change operand 1 predicate to nonimmediate_operand. | |
26204 | (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation. | |
26205 | (rintv2sf2): Ditto. | |
26206 | (lrintv2sfv2si2): Ditto. | |
26207 | (ceilv2sf2): Ditto. | |
26208 | (lceilv2sfv2si2): Ditto. | |
26209 | (floorv2sf2): Ditto. | |
26210 | (lfloorv2sfv2si2): Ditto. | |
26211 | (btruncv2sf2): Ditto. | |
26212 | (roundv2sf2): Ditto. | |
26213 | (lroundv2sfv2si2): Ditto. | |
26214 | (*mmx_roundv2sf2): Remove. | |
26215 | ||
26216 | 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com> | |
26217 | ||
26218 | * config/bpf/bpf.md: Fix neg{SI,DI}2 insn. | |
26219 | ||
26220 | 2023-07-26 Richard Biener <rguenther@suse.de> | |
26221 | ||
26222 | PR tree-optimization/110799 | |
26223 | * tree-ssa-pre.cc (compute_avail): More thoroughly match | |
26224 | up TBAA behavior of redundant loads. | |
26225 | ||
26226 | 2023-07-26 Jakub Jelinek <jakub@redhat.com> | |
26227 | ||
26228 | PR tree-optimization/110755 | |
26229 | * range-op-float.cc (frange_arithmetic): Change +0 result to -0 | |
26230 | for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and | |
26231 | it is exact op1 + (-op1) or op1 - op1. | |
26232 | ||
26233 | 2023-07-26 Kewen Lin <linkw@linux.ibm.com> | |
26234 | ||
26235 | PR target/110741 | |
26236 | * config/rs6000/vsx.md (define_insn xxeval): Correct vsx | |
26237 | operands output with "x". | |
26238 | ||
26239 | 2023-07-26 Aldy Hernandez <aldyh@redhat.com> | |
26240 | ||
26241 | * range-op.cc (class operator_absu): Add update_bitmask. | |
26242 | (operator_absu::update_bitmask): New. | |
26243 | ||
26244 | 2023-07-26 Aldy Hernandez <aldyh@redhat.com> | |
26245 | ||
26246 | * range-op-mixed.h (class operator_abs): Add update_bitmask. | |
26247 | * range-op.cc (operator_abs::update_bitmask): New. | |
26248 | ||
26249 | 2023-07-26 Aldy Hernandez <aldyh@redhat.com> | |
26250 | ||
26251 | * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask. | |
26252 | * range-op.cc (operator_bitwise_not::update_bitmask): New. | |
26253 | ||
26254 | 2023-07-26 Aldy Hernandez <aldyh@redhat.com> | |
26255 | ||
26256 | * range-op.cc (update_known_bitmask): Handle unary operators. | |
26257 | ||
26258 | 2023-07-26 Aldy Hernandez <aldyh@redhat.com> | |
26259 | ||
26260 | * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate. | |
26261 | ||
26262 | 2023-07-26 Jin Ma <jinma@linux.alibaba.com> | |
26263 | ||
26264 | * config/riscv/riscv.md: Likewise. | |
26265 | ||
26266 | 2023-07-26 Jan Hubicka <jh@suse.cz> | |
26267 | ||
26268 | * profile-count.cc (profile_count::to_sreal_scale): Value is not know | |
26269 | if we divide by zero. | |
26270 | ||
26271 | 2023-07-25 David Faust <david.faust@oracle.com> | |
26272 | ||
26273 | * config/bpf/bpf.cc (bpf_print_operand_address): Don't print | |
26274 | enclosing parentheses for pseudo-C dialect. | |
26275 | * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around | |
26276 | operands of pseudo-C dialect output templates where needed. | |
26277 | (zero_extendqidi2): Likewise. | |
26278 | (zero_extendsidi2): Likewise. | |
26279 | (*mov<MM:mode>): Likewise. | |
26280 | ||
26281 | 2023-07-25 Aldy Hernandez <aldyh@redhat.com> | |
26282 | ||
26283 | * tree-ssa-ccp.cc (value_mask_to_min_max): Make static. | |
26284 | (bit_value_mult_const): Same. | |
26285 | (get_individual_bits): Same. | |
26286 | ||
26287 | 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org> | |
26288 | ||
26289 | PR target/103605 | |
26290 | * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple | |
26291 | fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set. | |
26292 | * config/rs6000/rs6000.md (FMINMAX): New int iterator. | |
26293 | (minmax_op): New int attribute. | |
26294 | (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs. | |
26295 | (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN. | |
26296 | * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set | |
26297 | pattern to fmaxdf3. | |
26298 | (__builtin_vsx_xsmindp): Set pattern to fmindf3. | |
26299 | ||
26300 | 2023-07-24 David Faust <david.faust@oracle.com> | |
26301 | ||
26302 | * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template. | |
26303 | ||
26304 | 2023-07-24 Drew Ross <drross@redhat.com> | |
26305 | Jakub Jelinek <jakub@redhat.com> | |
26306 | ||
26307 | PR middle-end/109986 | |
26308 | * generic-match-head.cc (bitwise_equal_p): New macro. | |
26309 | * gimple-match-head.cc (bitwise_equal_p): New macro. | |
26310 | (gimple_nop_convert): Declare. | |
26311 | (gimple_bitwise_equal_p): Helper for bitwise_equal_p. | |
26312 | * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification. | |
26313 | ||
26314 | 2023-07-24 Jeff Law <jlaw@ventanamicro.com> | |
26315 | ||
26316 | * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use | |
26317 | single quote rather than backquote in diagnostic. | |
26318 | ||
26319 | 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> | |
26320 | ||
26321 | PR target/110783 | |
26322 | * config/bpf/bpf.opt: New command-line option -msdiv. | |
26323 | * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv. | |
26324 | * config/bpf/bpf.cc (bpf_option_override): Initialize | |
26325 | bpf_has_sdiv. | |
26326 | * doc/invoke.texi (eBPF Options): Document -msdiv. | |
26327 | ||
26328 | 2023-07-24 Jeff Law <jlaw@ventanamicro.com> | |
26329 | ||
26330 | * config/riscv/riscv.cc (riscv_option_override): Spell out | |
26331 | greater than and use cannot in diagnostic string. | |
26332 | ||
26333 | 2023-07-24 Richard Biener <rguenther@suse.de> | |
26334 | ||
26335 | * tree-vectorizer.h (_slp_tree::push_vec_def): Add. | |
26336 | (_slp_tree::vec_stmts): Remove. | |
26337 | (SLP_TREE_VEC_STMTS): Remove. | |
26338 | * tree-vect-slp.cc (_slp_tree::push_vec_def): Define. | |
26339 | (_slp_tree::_slp_tree): Adjust. | |
26340 | (_slp_tree::~_slp_tree): Likewise. | |
26341 | (vect_get_slp_vect_def): Simplify. | |
26342 | (vect_get_slp_defs): Likewise. | |
26343 | (vect_transform_slp_perm_load_1): Adjust. | |
26344 | (vect_add_slp_permutation): Likewise. | |
26345 | (vect_schedule_slp_node): Likewise. | |
26346 | (vectorize_slp_instance_root_stmt): Likewise. | |
26347 | (vect_schedule_scc): Likewise. | |
26348 | * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def. | |
26349 | (vectorizable_call): Likewise. | |
26350 | (vectorizable_call): Likewise. | |
26351 | (vect_create_vectorized_demotion_stmts): Likewise. | |
26352 | (vectorizable_conversion): Likewise. | |
26353 | (vectorizable_assignment): Likewise. | |
26354 | (vectorizable_shift): Likewise. | |
26355 | (vectorizable_operation): Likewise. | |
26356 | (vectorizable_load): Likewise. | |
26357 | (vectorizable_condition): Likewise. | |
26358 | (vectorizable_comparison): Likewise. | |
26359 | * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust. | |
26360 | (vectorize_fold_left_reduction): Use push_vec_def. | |
26361 | (vect_transform_reduction): Likewise. | |
26362 | (vect_transform_cycle_phi): Likewise. | |
26363 | (vectorizable_lc_phi): Likewise. | |
26364 | (vectorizable_phi): Likewise. | |
26365 | (vectorizable_recurr): Likewise. | |
26366 | (vectorizable_induction): Likewise. | |
26367 | (vectorizable_live_operation): Likewise. | |
26368 | ||
26369 | 2023-07-24 Richard Biener <rguenther@suse.de> | |
26370 | ||
26371 | * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include. | |
26372 | ||
26373 | 2023-07-24 Richard Biener <rguenther@suse.de> | |
26374 | ||
26375 | * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include. | |
26376 | * config/i386/i386-expand.cc: Likewise. | |
26377 | * config/i386/i386-features.cc: Likewise. | |
26378 | * config/i386/i386-options.cc: Likewise. | |
26379 | ||
26380 | 2023-07-24 Robin Dapp <rdapp@ventanamicro.com> | |
26381 | ||
26382 | * tree-vect-stmts.cc (vectorizable_conversion): Handle | |
26383 | more demotion/promotion for modifier == NONE. | |
26384 | ||
26385 | 2023-07-24 Roger Sayle <roger@nextmovesoftware.com> | |
26386 | ||
26387 | PR target/110787 | |
26388 | PR target/110790 | |
26389 | Revert patch. | |
26390 | * config/i386/i386.md (extv<mode>): Use QImode for offsets. | |
26391 | (extzv<mode>): Likewise. | |
26392 | (insv<mode>): Likewise. | |
26393 | (*testqi_ext_3): Likewise. | |
26394 | (*btr<mode>_2): Likewise. | |
26395 | (define_split): Likewise. | |
26396 | (*btsq_imm): Likewise. | |
26397 | (*btrq_imm): Likewise. | |
26398 | (*btcq_imm): Likewise. | |
26399 | (define_peephole2 x3): Likewise. | |
26400 | (*bt<mode>): Likewise | |
26401 | (*bt<mode>_mask): New define_insn_and_split. | |
26402 | (*jcc_bt<mode>): Use QImode for offsets. | |
26403 | (*jcc_bt<mode>_1): Delete obsolete pattern. | |
26404 | (*jcc_bt<mode>_mask): Use QImode offsets. | |
26405 | (*jcc_bt<mode>_mask_1): Likewise. | |
26406 | (define_split): Likewise. | |
26407 | (*bt<mode>_setcqi): Likewise. | |
26408 | (*bt<mode>_setncqi): Likewise. | |
26409 | (*bt<mode>_setnc<mode>): Likewise. | |
26410 | (*bt<mode>_setncqi_2): Likewise. | |
26411 | (*bt<mode>_setc<mode>_mask): New define_insn_and_split. | |
26412 | (bmi2_bzhi_<mode>3): Use QImode offsets. | |
26413 | (*bmi2_bzhi_<mode>3): Likewise. | |
26414 | (*bmi2_bzhi_<mode>3_1): Likewise. | |
26415 | (*bmi2_bzhi_<mode>3_1_ccz): Likewise. | |
26416 | (@tbm_bextri_<mode>): Likewise. | |
26417 | ||
26418 | 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> | |
26419 | ||
26420 | * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum. | |
26421 | * config/bpf/bpf.opt (mkernel): Remove option. | |
26422 | * config/bpf/bpf.cc (bpf_target_macros): Do not define | |
26423 | BPF_KERNEL_VERSION_CODE. | |
26424 | ||
26425 | 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> | |
26426 | ||
26427 | PR target/110786 | |
26428 | * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default. | |
26429 | (mbswap): New option. | |
26430 | * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4. | |
26431 | * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap. | |
26432 | * config/bpf/bpf.md: Use bswap instructions if available for | |
26433 | bswap* insn, and fix constraint. | |
26434 | * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap. | |
26435 | ||
26436 | 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
26437 | ||
26438 | * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern. | |
26439 | (mask_len_fold_left_plus_<mode>): Ditto. | |
26440 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
26441 | (enum reduction_type): Ditto. | |
26442 | (expand_reduction): Add in-order reduction. | |
26443 | * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function. | |
26444 | (expand_reduction): Add in-order reduction. | |
26445 | ||
26446 | 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
26447 | ||
26448 | * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus. | |
26449 | (vectorize_fold_left_reduction): Ditto. | |
26450 | (vectorizable_reduction): Ditto. | |
26451 | (vect_transform_reduction): Ditto. | |
26452 | ||
26453 | 2023-07-24 Richard Biener <rguenther@suse.de> | |
26454 | ||
26455 | PR tree-optimization/110777 | |
26456 | * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail): | |
26457 | Avoid propagating abnormals. | |
26458 | ||
26459 | 2023-07-24 Richard Biener <rguenther@suse.de> | |
26460 | ||
26461 | PR tree-optimization/110766 | |
26462 | * tree-scalar-evolution.cc | |
26463 | (analyze_and_compute_bitwise_induction_effect): Check the PHI | |
26464 | is defined in the loop header. | |
26465 | ||
26466 | 2023-07-24 Kewen Lin <linkw@linux.ibm.com> | |
26467 | ||
26468 | PR tree-optimization/110740 | |
26469 | * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a | |
26470 | loop with a single scalar iteration. | |
26471 | ||
26472 | 2023-07-24 Pan Li <pan2.li@intel.com> | |
26473 | ||
26474 | * config/riscv/riscv-vector-builtins-shapes.cc | |
26475 | (struct alu_frm_def): Take range check. | |
26476 | ||
26477 | 2023-07-22 Vineet Gupta <vineetg@rivosinc.com> | |
26478 | ||
26479 | PR target/110748 | |
26480 | * config/riscv/predicates.md (const_0_operand): Add back | |
26481 | const_double. | |
26482 | ||
26483 | 2023-07-22 Roger Sayle <roger@nextmovesoftware.com> | |
26484 | ||
26485 | * config/i386/i386-expand.cc (ix86_expand_move): Disable the | |
26486 | 64-bit insertions into TImode optimizations with -O0, unless | |
26487 | the function has the "naked" attribute (for PR target/110533). | |
26488 | ||
26489 | 2023-07-22 Andrew Pinski <apinski@marvell.com> | |
26490 | ||
26491 | PR target/110778 | |
26492 | * rtl.h (extended_count): Change last argument type | |
26493 | to bool. | |
26494 | ||
26495 | 2023-07-22 Roger Sayle <roger@nextmovesoftware.com> | |
26496 | ||
26497 | * config/i386/i386.md (extv<mode>): Use QImode for offsets. | |
26498 | (extzv<mode>): Likewise. | |
26499 | (insv<mode>): Likewise. | |
26500 | (*testqi_ext_3): Likewise. | |
26501 | (*btr<mode>_2): Likewise. | |
26502 | (define_split): Likewise. | |
26503 | (*btsq_imm): Likewise. | |
26504 | (*btrq_imm): Likewise. | |
26505 | (*btcq_imm): Likewise. | |
26506 | (define_peephole2 x3): Likewise. | |
26507 | (*bt<mode>): Likewise | |
26508 | (*bt<mode>_mask): New define_insn_and_split. | |
26509 | (*jcc_bt<mode>): Use QImode for offsets. | |
26510 | (*jcc_bt<mode>_1): Delete obsolete pattern. | |
26511 | (*jcc_bt<mode>_mask): Use QImode offsets. | |
26512 | (*jcc_bt<mode>_mask_1): Likewise. | |
26513 | (define_split): Likewise. | |
26514 | (*bt<mode>_setcqi): Likewise. | |
26515 | (*bt<mode>_setncqi): Likewise. | |
26516 | (*bt<mode>_setnc<mode>): Likewise. | |
26517 | (*bt<mode>_setncqi_2): Likewise. | |
26518 | (*bt<mode>_setc<mode>_mask): New define_insn_and_split. | |
26519 | (bmi2_bzhi_<mode>3): Use QImode offsets. | |
26520 | (*bmi2_bzhi_<mode>3): Likewise. | |
26521 | (*bmi2_bzhi_<mode>3_1): Likewise. | |
26522 | (*bmi2_bzhi_<mode>3_1_ccz): Likewise. | |
26523 | (@tbm_bextri_<mode>): Likewise. | |
26524 | ||
26525 | 2023-07-22 Jeff Law <jlaw@ventanamicro.com> | |
26526 | ||
26527 | * config/bfin/bfin.md (ones): Fix length computation. | |
26528 | ||
26529 | 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com> | |
26530 | ||
26531 | * lra-eliminations.cc (update_reg_eliminate): Fix the assert. | |
26532 | (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM | |
26533 | instead of FRAME_POINTER_REGNUM to spill pseudos. | |
26534 | ||
26535 | 2023-07-21 Roger Sayle <roger@nextmovesoftware.com> | |
26536 | Richard Biener <rguenther@suse.de> | |
26537 | ||
26538 | PR c/110699 | |
26539 | * gimplify.cc (gimplify_compound_lval): If the array's type | |
26540 | is error_mark_node then return GS_ERROR. | |
26541 | ||
26542 | 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com> | |
26543 | ||
26544 | PR target/110770 | |
26545 | * config/bpf/bpf.opt: Added option -masm=<dialect>. | |
26546 | * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type. | |
26547 | * config/bpf/bpf.cc (bpf_print_register): New function. | |
26548 | (bpf_print_register): Support pseudo-c syntax for registers. | |
26549 | (bpf_print_operand_address): Likewise. | |
26550 | * config/bpf/bpf.h (ASM_SPEC): handle -msasm. | |
26551 | (ASSEMBLER_DIALECT): Define. | |
26552 | * config/bpf/bpf.md: Added pseudo-c templates. | |
26553 | * doc/invoke.texi (-masm=): New eBPF option item. | |
26554 | ||
26555 | 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com> | |
26556 | ||
26557 | * config/bpf/bpf.md: fixed template for neg instruction. | |
26558 | ||
26559 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26560 | ||
26561 | PR target/110727 | |
26562 | * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat | |
26563 | profiles by vectorization factor. | |
26564 | (vect_transform_loop): Check for flat profiles. | |
26565 | ||
26566 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26567 | ||
26568 | * cfgloop.h (maybe_flat_loop_profile): Declare | |
26569 | * cfgloopanal.cc (maybe_flat_loop_profile): New function. | |
26570 | * tree-cfg.cc (print_loop_info): Print info about flat profiles. | |
26571 | ||
26572 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26573 | ||
26574 | * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int | |
26575 | * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise. | |
26576 | * predict.cc (estimate_bb_frequencies): Likewise. | |
26577 | * profile.cc (branch_prob): Likewise. | |
26578 | * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise | |
26579 | ||
26580 | 2023-07-21 Iain Sandoe <iain@sandoe.co.uk> | |
26581 | ||
26582 | * config.in: Regenerate. | |
26583 | * config/darwin.h (DARWIN_LD_DEMANGLE): New. | |
26584 | (LINK_COMMAND_SPEC_A): Add demangle handling. | |
26585 | * configure: Regenerate. | |
26586 | * configure.ac: Detect linker support for '-demangle'. | |
26587 | ||
26588 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26589 | ||
26590 | * sreal.cc (sreal::to_nearest_int): New. | |
26591 | (sreal_verify_basics): Verify also to_nearest_int. | |
26592 | (verify_aritmetics): Likewise. | |
26593 | (sreal_verify_conversions): New. | |
26594 | (sreal_cc_tests): Call sreal_verify_conversions. | |
26595 | * sreal.h: (sreal::to_nearest_int): Declare | |
26596 | ||
26597 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26598 | ||
26599 | * tree-ssa-loop-ch.cc (enum ch_decision): New enum. | |
26600 | (should_duplicate_loop_header_p): Return info on profitability. | |
26601 | (do_while_loop_p): Watch for constant conditionals. | |
26602 | (update_profile_after_ch): Do not sanity check that all | |
26603 | static exits are taken. | |
26604 | (ch_base::copy_headers): Run on all loops. | |
26605 | (pass_ch::process_loop_p): Improve heuristics by handling also | |
26606 | do_while loop and duplicating shortest sequence containing all | |
26607 | winning blocks. | |
26608 | ||
26609 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26610 | ||
26611 | * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap | |
26612 | tests first; update finite_p flag. | |
26613 | ||
26614 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26615 | ||
26616 | * cfgloop.cc (flow_loop_dump): Use print_loop_info. | |
26617 | * cfgloop.h (print_loop_info): Declare. | |
26618 | * tree-cfg.cc (print_loop_info): Break out from ...; add | |
26619 | printing of missing fields and profile | |
26620 | (print_loop): ... here. | |
26621 | ||
26622 | 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
26623 | ||
26624 | * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables. | |
26625 | ||
26626 | 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
26627 | ||
26628 | * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order. | |
26629 | (vectorizable_operation): Ditto. | |
26630 | ||
26631 | 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
26632 | ||
26633 | * config/riscv/autovec.md: Align order of mask and len. | |
26634 | * config/riscv/riscv-v.cc (expand_load_store): Ditto. | |
26635 | (expand_gather_scatter): Ditto. | |
26636 | * doc/md.texi: Ditto. | |
26637 | * internal-fn.cc (add_len_and_mask_args): Ditto. | |
26638 | (add_mask_and_len_args): Ditto. | |
26639 | (expand_partial_load_optab_fn): Ditto. | |
26640 | (expand_partial_store_optab_fn): Ditto. | |
26641 | (expand_scatter_store_optab_fn): Ditto. | |
26642 | (expand_gather_load_optab_fn): Ditto. | |
26643 | (internal_fn_len_index): Ditto. | |
26644 | (internal_fn_mask_index): Ditto. | |
26645 | (internal_len_load_store_bias): Ditto. | |
26646 | * tree-vect-stmts.cc (vectorizable_store): Ditto. | |
26647 | (vectorizable_load): Ditto. | |
26648 | ||
26649 | 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
26650 | ||
26651 | * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN. | |
26652 | (mask_len_load<mode><vm>): Ditto. | |
26653 | (len_maskstore<mode><vm>): Ditto. | |
26654 | (mask_len_store<mode><vm>): Ditto. | |
26655 | (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto. | |
26656 | (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto. | |
26657 | (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto. | |
26658 | (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto. | |
26659 | (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto. | |
26660 | (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto. | |
26661 | (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto. | |
26662 | (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto. | |
26663 | (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto. | |
26664 | (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto. | |
26665 | (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto. | |
26666 | (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto. | |
26667 | (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto. | |
26668 | (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto. | |
26669 | (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto. | |
26670 | (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto. | |
26671 | (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto. | |
26672 | (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto. | |
26673 | (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto. | |
26674 | (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto. | |
26675 | (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto. | |
26676 | (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto. | |
26677 | (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto. | |
26678 | (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto. | |
26679 | (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto. | |
26680 | (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto. | |
26681 | (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto. | |
26682 | (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto. | |
26683 | * doc/md.texi: Ditto. | |
26684 | * genopinit.cc (main): Ditto. | |
26685 | (CMP_NAME): Ditto. Ditto. | |
26686 | * gimple-fold.cc (arith_overflowed_p): Ditto. | |
26687 | (gimple_fold_partial_load_store_mem_ref): Ditto. | |
26688 | (gimple_fold_call): Ditto. | |
26689 | * internal-fn.cc (len_maskload_direct): Ditto. | |
26690 | (mask_len_load_direct): Ditto. | |
26691 | (len_maskstore_direct): Ditto. | |
26692 | (mask_len_store_direct): Ditto. | |
26693 | (expand_call_mem_ref): Ditto. | |
26694 | (expand_len_maskload_optab_fn): Ditto. | |
26695 | (expand_mask_len_load_optab_fn): Ditto. | |
26696 | (expand_len_maskstore_optab_fn): Ditto. | |
26697 | (expand_mask_len_store_optab_fn): Ditto. | |
26698 | (direct_len_maskload_optab_supported_p): Ditto. | |
26699 | (direct_mask_len_load_optab_supported_p): Ditto. | |
26700 | (direct_len_maskstore_optab_supported_p): Ditto. | |
26701 | (direct_mask_len_store_optab_supported_p): Ditto. | |
26702 | (internal_load_fn_p): Ditto. | |
26703 | (internal_store_fn_p): Ditto. | |
26704 | (internal_gather_scatter_fn_p): Ditto. | |
26705 | (internal_fn_len_index): Ditto. | |
26706 | (internal_fn_mask_index): Ditto. | |
26707 | (internal_fn_stored_value_index): Ditto. | |
26708 | (internal_len_load_store_bias): Ditto. | |
26709 | * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto. | |
26710 | (MASK_LEN_GATHER_LOAD): Ditto. | |
26711 | (LEN_MASK_LOAD): Ditto. | |
26712 | (MASK_LEN_LOAD): Ditto. | |
26713 | (LEN_MASK_SCATTER_STORE): Ditto. | |
26714 | (MASK_LEN_SCATTER_STORE): Ditto. | |
26715 | (LEN_MASK_STORE): Ditto. | |
26716 | (MASK_LEN_STORE): Ditto. | |
26717 | * optabs-query.cc (supports_vec_gather_load_p): Ditto. | |
26718 | (supports_vec_scatter_store_p): Ditto. | |
26719 | * optabs-tree.cc (target_supports_mask_load_store_p): Ditto. | |
26720 | (target_supports_len_load_store_p): Ditto. | |
26721 | * optabs.def (OPTAB_CD): Ditto. | |
26722 | * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto. | |
26723 | (call_may_clobber_ref_p_1): Ditto. | |
26724 | * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto. | |
26725 | (dse_optimize_stmt): Ditto. | |
26726 | * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto. | |
26727 | (get_alias_ptr_type_for_ptr_address): Ditto. | |
26728 | * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto. | |
26729 | * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto. | |
26730 | * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto. | |
26731 | (vect_get_strided_load_store_ops): Ditto. | |
26732 | (vectorizable_store): Ditto. | |
26733 | (vectorizable_load): Ditto. | |
26734 | ||
26735 | 2023-07-21 Haochen Jiang <haochen.jiang@intel.com> | |
26736 | ||
26737 | * config/i386/i386.opt: Fix a typo. | |
26738 | ||
26739 | 2023-07-21 Richard Biener <rguenther@suse.de> | |
26740 | ||
26741 | PR tree-optimization/88540 | |
26742 | * tree-ssa-phiopt.cc (minmax_replacement): Do not give up | |
26743 | with NaNs but handle the simple case by if-converting to a | |
26744 | COND_EXPR. | |
26745 | ||
26746 | 2023-07-21 Andrew Pinski <apinski@marvell.com> | |
26747 | ||
26748 | * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New | |
26749 | transformation. | |
26750 | ||
26751 | 2023-07-21 Richard Biener <rguenther@suse.de> | |
26752 | ||
26753 | PR tree-optimization/110742 | |
26754 | * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout): | |
26755 | Do not materialize an edge permutation in an external node with | |
26756 | vector defs. | |
26757 | (vect_slp_analyze_node_operations_1): Guard purely internal | |
26758 | nodes better. | |
26759 | ||
26760 | 2023-07-21 Jan Hubicka <jh@suse.cz> | |
26761 | ||
26762 | * cfgloop.cc: Include sreal.h. | |
26763 | (flow_loop_dump): Dump sreal iteration exsitmate. | |
26764 | (get_estimated_loop_iterations): Update. | |
26765 | * cfgloop.h (expected_loop_iterations_by_profile): Declare. | |
26766 | * cfgloopanal.cc (expected_loop_iterations_by_profile): New function. | |
26767 | (expected_loop_iterations_unbounded): Use new API. | |
26768 | * cfgloopmanip.cc (scale_loop_profile): Use | |
26769 | expected_loop_iterations_by_profile | |
26770 | * predict.cc (pass_profile::execute): Likewise. | |
26771 | * profile.cc (branch_prob): Likewise. | |
26772 | * tree-ssa-loop-niter.cc: Include sreal.h. | |
26773 | (estimate_numbers_of_iterations): Likewise | |
26774 | ||
26775 | 2023-07-21 Kewen Lin <linkw@linux.ibm.com> | |
26776 | ||
26777 | PR tree-optimization/110744 | |
26778 | * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias | |
26779 | operand for ifn IFN_LEN_STORE. | |
26780 | ||
26781 | 2023-07-21 liuhongt <hongtao.liu@intel.com> | |
26782 | ||
26783 | PR target/89701 | |
26784 | * common.opt: (fcf-protection=): Add EnumSet attribute to | |
26785 | support combination of params. | |
26786 | ||
26787 | 2023-07-21 David Malcolm <dmalcolm@redhat.com> | |
26788 | ||
26789 | PR middle-end/110612 | |
26790 | * text-art/table.cc (table_geometry::table_geometry): Drop m_table | |
26791 | field. | |
26792 | (table_geometry::table_x_to_canvas_x): Add cast to comparison. | |
26793 | (table_geometry::table_y_to_canvas_y): Likewise. | |
26794 | * text-art/table.h (table_geometry::m_table): Drop unused field. | |
26795 | * text-art/widget.h (wrapper_widget::update_child_alloc_rects): | |
26796 | Add "override". | |
26797 | ||
26798 | 2023-07-20 Uros Bizjak <ubizjak@gmail.com> | |
26799 | ||
26800 | PR target/110717 | |
26801 | * config/i386/i386-features.cc | |
26802 | (general_scalar_chain::compute_convert_gain): Calculate gain | |
26803 | for extend higpart case. | |
26804 | (general_scalar_chain::convert_op): Handle | |
26805 | ASHIFTRT/ASHIFT combined RTX. | |
26806 | (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for | |
26807 | SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX. | |
26808 | * config/i386/i386.md (*extend<dwi>2_doubleword_highpart): | |
26809 | New define_insn_and_split pattern. | |
26810 | (*extendv2di2_highpart_stv): Ditto. | |
26811 | ||
26812 | 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com> | |
26813 | ||
26814 | * lra-constraints.cc (simplify_operand_subreg): Check frame pointer | |
26815 | simplification. | |
26816 | ||
26817 | 2023-07-20 Andrew Pinski <apinski@marvell.com> | |
26818 | ||
26819 | * combine.cc (dump_combine_stats): Remove. | |
26820 | (dump_combine_total_stats): Remove. | |
26821 | (total_attempts, total_merges, total_extras, | |
26822 | total_successes): Remove. | |
26823 | (combine_instructions): Don't increment total stats | |
26824 | instead use statistics_counter_event. | |
26825 | * dumpfile.cc (print_combine_total_stats): Remove. | |
26826 | * dumpfile.h (print_combine_total_stats): Remove. | |
26827 | (dump_combine_total_stats): Remove. | |
26828 | * passes.cc (finish_optimization_passes): | |
26829 | Don't call print_combine_total_stats. | |
26830 | * rtl.h (dump_combine_total_stats): Remove. | |
26831 | (dump_combine_stats): Remove. | |
26832 | ||
26833 | 2023-07-20 Jan Hubicka <jh@suse.cz> | |
26834 | ||
26835 | * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH | |
26836 | logical ops. | |
26837 | ||
26838 | 2023-07-20 Martin Jambor <mjambor@suse.cz> | |
26839 | ||
26840 | * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New. | |
26841 | (analyzer-text-art-ideal-canvas-width): Likewise. | |
26842 | (analyzer-text-art-string-ellipsis-head-len): Likewise. | |
26843 | (analyzer-text-art-string-ellipsis-tail-len): Likewise. | |
26844 | ||
26845 | 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
26846 | ||
26847 | * tree-vect-stmts.cc (check_load_store_for_partial_vectors): | |
26848 | Refine code structure. | |
26849 | ||
26850 | 2023-07-20 Jan Hubicka <jh@suse.cz> | |
26851 | ||
26852 | * tree-ssa-loop-ch.cc (edge_range_query): Rename to ... | |
26853 | (get_range_query): ... this one; do | |
26854 | (static_loop_exit): Add query parametr, turn ranger to reference. | |
26855 | (loop_static_stmt_p): New function. | |
26856 | (loop_static_op_p): New function. | |
26857 | (loop_iv_derived_p): Remove. | |
26858 | (loop_combined_static_and_iv_p): New function. | |
26859 | (should_duplicate_loop_header_p): Discover combined onditionals; | |
26860 | do not track iv derived; improve dumps. | |
26861 | (pass_ch::execute): Fix whitespace. | |
26862 | ||
26863 | 2023-07-20 Richard Biener <rguenther@suse.de> | |
26864 | ||
26865 | PR tree-optimization/110204 | |
26866 | * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail): | |
26867 | Look through copies generated by PRE. | |
26868 | ||
26869 | 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com> | |
26870 | ||
26871 | * tree-vect-stmts.cc (get_group_load_store_type): Account for | |
26872 | `gap` when checking if need to peel twice. | |
26873 | ||
26874 | 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> | |
26875 | ||
26876 | PR middle-end/77928 | |
26877 | * doc/extend.texi: Document iseqsig builtin. | |
26878 | * builtins.cc (fold_builtin_iseqsig): New function. | |
26879 | (fold_builtin_2): Handle BUILT_IN_ISEQSIG. | |
26880 | (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG. | |
26881 | * builtins.def (BUILT_IN_ISEQSIG): New built-in. | |
26882 | ||
26883 | 2023-07-20 Pan Li <pan2.li@intel.com> | |
26884 | ||
26885 | * config/riscv/vector.md: Fix incorrect match_operand. | |
26886 | ||
26887 | 2023-07-20 Roger Sayle <roger@nextmovesoftware.com> | |
26888 | ||
26889 | * config/i386/i386-expand.cc (ix86_expand_move): Don't call | |
26890 | force_reg, to use SUBREG rather than create a new pseudo when | |
26891 | inserting DFmode fields into TImode with insvti_{high,low}part. | |
26892 | * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two | |
26893 | define_insn_and_split... | |
26894 | (*concatditi3_3): 64-bit implementation. Provide alternative | |
26895 | that allows register allocation to use SSE registers that is | |
26896 | split into vec_concatv2di after reload. | |
26897 | (*concatsidi3_3): 32-bit implementation. | |
26898 | ||
26899 | 2023-07-20 Richard Biener <rguenther@suse.de> | |
26900 | ||
26901 | PR middle-end/61747 | |
26902 | * internal-fn.cc (expand_vec_cond_optab_fn): When the | |
26903 | value operands are equal to the original comparison operands | |
26904 | preserve that equality by re-using the comparison expansion. | |
26905 | * optabs.cc (emit_conditional_move): When the value operands | |
26906 | are equal to the comparison operands and would be forced to | |
26907 | a register by prepare_cmp_insn do so earlier, preserving the | |
26908 | equality. | |
26909 | ||
26910 | 2023-07-20 Pan Li <pan2.li@intel.com> | |
26911 | ||
26912 | * config/riscv/vector.md: Align pattern format. | |
26913 | ||
26914 | 2023-07-20 Haochen Jiang <haochen.jiang@intel.com> | |
26915 | ||
26916 | * doc/invoke.texi: Remove AVX512VP2INTERSECT in | |
26917 | Granite Rapids{, D} from documentation. | |
26918 | ||
26919 | 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
26920 | ||
26921 | * config/riscv/autovec.md | |
26922 | (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): | |
26923 | Refactor RVV machine modes. | |
26924 | (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto. | |
26925 | (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto. | |
26926 | (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
26927 | (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto. | |
26928 | (len_mask_gather_load<mode><mode>): Ditto. | |
26929 | (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
26930 | (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto. | |
26931 | (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto. | |
26932 | (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto. | |
26933 | (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto. | |
26934 | (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
26935 | (len_mask_scatter_store<mode><mode>): Ditto. | |
26936 | (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
26937 | * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto. | |
26938 | (ADJUST_NUNITS): Ditto. | |
26939 | (ADJUST_ALIGNMENT): Ditto. | |
26940 | (ADJUST_BYTESIZE): Ditto. | |
26941 | (ADJUST_PRECISION): Ditto. | |
26942 | (RVV_MODES): Ditto. | |
26943 | (RVV_WHOLE_MODES): Ditto. | |
26944 | (RVV_FRACT_MODE): Ditto. | |
26945 | (RVV_NF8_MODES): Ditto. | |
26946 | (RVV_NF4_MODES): Ditto. | |
26947 | (VECTOR_MODES_WITH_PREFIX): Ditto. | |
26948 | (VECTOR_MODE_WITH_PREFIX): Ditto. | |
26949 | (RVV_TUPLE_MODES): Ditto. | |
26950 | (RVV_NF2_MODES): Ditto. | |
26951 | (RVV_TUPLE_PARTIAL_MODES): Ditto. | |
26952 | * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto. | |
26953 | (ENTRY): Ditto. | |
26954 | (TUPLE_ENTRY): Ditto. | |
26955 | (get_vlmul): Ditto. | |
26956 | (get_nf): Ditto. | |
26957 | (get_ratio): Ditto. | |
26958 | (preferred_simd_mode): Ditto. | |
26959 | (autovectorize_vector_modes): Ditto. | |
26960 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto. | |
26961 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto. | |
26962 | (vbool64_t): Ditto. | |
26963 | (vbool32_t): Ditto. | |
26964 | (vbool16_t): Ditto. | |
26965 | (vbool8_t): Ditto. | |
26966 | (vbool4_t): Ditto. | |
26967 | (vbool2_t): Ditto. | |
26968 | (vbool1_t): Ditto. | |
26969 | (vint8mf8_t): Ditto. | |
26970 | (vuint8mf8_t): Ditto. | |
26971 | (vint8mf4_t): Ditto. | |
26972 | (vuint8mf4_t): Ditto. | |
26973 | (vint8mf2_t): Ditto. | |
26974 | (vuint8mf2_t): Ditto. | |
26975 | (vint8m1_t): Ditto. | |
26976 | (vuint8m1_t): Ditto. | |
26977 | (vint8m2_t): Ditto. | |
26978 | (vuint8m2_t): Ditto. | |
26979 | (vint8m4_t): Ditto. | |
26980 | (vuint8m4_t): Ditto. | |
26981 | (vint8m8_t): Ditto. | |
26982 | (vuint8m8_t): Ditto. | |
26983 | (vint16mf4_t): Ditto. | |
26984 | (vuint16mf4_t): Ditto. | |
26985 | (vint16mf2_t): Ditto. | |
26986 | (vuint16mf2_t): Ditto. | |
26987 | (vint16m1_t): Ditto. | |
26988 | (vuint16m1_t): Ditto. | |
26989 | (vint16m2_t): Ditto. | |
26990 | (vuint16m2_t): Ditto. | |
26991 | (vint16m4_t): Ditto. | |
26992 | (vuint16m4_t): Ditto. | |
26993 | (vint16m8_t): Ditto. | |
26994 | (vuint16m8_t): Ditto. | |
26995 | (vint32mf2_t): Ditto. | |
26996 | (vuint32mf2_t): Ditto. | |
26997 | (vint32m1_t): Ditto. | |
26998 | (vuint32m1_t): Ditto. | |
26999 | (vint32m2_t): Ditto. | |
27000 | (vuint32m2_t): Ditto. | |
27001 | (vint32m4_t): Ditto. | |
27002 | (vuint32m4_t): Ditto. | |
27003 | (vint32m8_t): Ditto. | |
27004 | (vuint32m8_t): Ditto. | |
27005 | (vint64m1_t): Ditto. | |
27006 | (vuint64m1_t): Ditto. | |
27007 | (vint64m2_t): Ditto. | |
27008 | (vuint64m2_t): Ditto. | |
27009 | (vint64m4_t): Ditto. | |
27010 | (vuint64m4_t): Ditto. | |
27011 | (vint64m8_t): Ditto. | |
27012 | (vuint64m8_t): Ditto. | |
27013 | (vfloat16mf4_t): Ditto. | |
27014 | (vfloat16mf2_t): Ditto. | |
27015 | (vfloat16m1_t): Ditto. | |
27016 | (vfloat16m2_t): Ditto. | |
27017 | (vfloat16m4_t): Ditto. | |
27018 | (vfloat16m8_t): Ditto. | |
27019 | (vfloat32mf2_t): Ditto. | |
27020 | (vfloat32m1_t): Ditto. | |
27021 | (vfloat32m2_t): Ditto. | |
27022 | (vfloat32m4_t): Ditto. | |
27023 | (vfloat32m8_t): Ditto. | |
27024 | (vfloat64m1_t): Ditto. | |
27025 | (vfloat64m2_t): Ditto. | |
27026 | (vfloat64m4_t): Ditto. | |
27027 | (vfloat64m8_t): Ditto. | |
27028 | * config/riscv/riscv-vector-switch.def (ENTRY): Ditto. | |
27029 | (TUPLE_ENTRY): Ditto. | |
27030 | * config/riscv/riscv-vsetvl.cc (change_insn): Ditto. | |
27031 | * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto. | |
27032 | (riscv_v_adjust_nunits): Ditto. | |
27033 | (riscv_v_adjust_bytesize): Ditto. | |
27034 | (riscv_v_adjust_precision): Ditto. | |
27035 | (riscv_convert_vector_bits): Ditto. | |
27036 | * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto. | |
27037 | * config/riscv/riscv.md: Ditto. | |
27038 | * config/riscv/vector-iterators.md: Ditto. | |
27039 | * config/riscv/vector.md | |
27040 | (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto. | |
27041 | (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto. | |
27042 | (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto. | |
27043 | (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
27044 | (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto. | |
27045 | (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
27046 | (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto. | |
27047 | (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto. | |
27048 | (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto. | |
27049 | (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto. | |
27050 | (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto. | |
27051 | (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto. | |
27052 | (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto. | |
27053 | (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto. | |
27054 | (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto. | |
27055 | (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto. | |
27056 | (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto. | |
27057 | (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto. | |
27058 | (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto. | |
27059 | (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto. | |
27060 | (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto. | |
27061 | (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto. | |
27062 | (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto. | |
27063 | (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto. | |
27064 | (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto. | |
27065 | (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto. | |
27066 | (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto. | |
27067 | (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto. | |
27068 | (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto. | |
27069 | (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto. | |
27070 | (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto. | |
27071 | (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto. | |
27072 | (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto. | |
27073 | ||
27074 | 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com> | |
27075 | ||
27076 | * lra-int.h (lra_update_fp2sp_elimination): New prototype. | |
27077 | (lra_asm_insn_error): New prototype. | |
27078 | * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory | |
27079 | existence. | |
27080 | (lra_spill): Call lra_update_fp2sp_elimination. | |
27081 | * lra-eliminations.cc: Remove trailing spaces. | |
27082 | (elimination_fp2sp_occured_p): New static flag. | |
27083 | (lra_eliminate_regs_1): Set the flag up. | |
27084 | (update_reg_eliminate): Modify the assert for stack to frame | |
27085 | pointer elimination. | |
27086 | (lra_update_fp2sp_elimination): New function. | |
27087 | (lra_eliminate): Clear flag elimination_fp2sp_occured_p. | |
27088 | ||
27089 | 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com> | |
27090 | ||
27091 | * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5 | |
27092 | dependency. | |
27093 | * config/aarch64/arm_acle.h: Remove unnecessary armv8.x | |
27094 | dependencies from target pragmas. | |
27095 | * config/aarch64/arm_fp16.h (target): Likewise. | |
27096 | * config/aarch64/arm_neon.h (target): Likewise. | |
27097 | ||
27098 | 2023-07-19 Andrew Pinski <apinski@marvell.com> | |
27099 | ||
27100 | PR tree-optimization/110252 | |
27101 | * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class. | |
27102 | (auto_flow_sensitive::auto_flow_sensitive): New constructor. | |
27103 | (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor. | |
27104 | (match_simplify_replacement): Temporarily | |
27105 | remove the flow sensitive info on the two statements that might | |
27106 | be moved. | |
27107 | ||
27108 | 2023-07-19 Andrew Pinski <apinski@marvell.com> | |
27109 | ||
27110 | * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *` | |
27111 | with flow_sensitive_info_storage. | |
27112 | (follow_outer_ssa_edges): Update how to save off the flow | |
27113 | sensitive info. | |
27114 | (maybe_fold_comparisons_from_match_pd): Update restoring | |
27115 | of flow sensitive info. | |
27116 | * tree-ssanames.cc (flow_sensitive_info_storage::save): New method. | |
27117 | (flow_sensitive_info_storage::restore): New method. | |
27118 | (flow_sensitive_info_storage::save_and_clear): New method. | |
27119 | (flow_sensitive_info_storage::clear_storage): New method. | |
27120 | * tree-ssanames.h (class flow_sensitive_info_storage): New class. | |
27121 | ||
27122 | 2023-07-19 Andrew Pinski <apinski@marvell.com> | |
27123 | ||
27124 | PR tree-optimization/110726 | |
27125 | * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): | |
27126 | Add checks to make sure the type was one bit precision | |
27127 | intergal type. | |
27128 | ||
27129 | 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
27130 | ||
27131 | * doc/md.texi: Add mask_len_fold_left_plus. | |
27132 | * internal-fn.cc (mask_len_fold_left_direct): Ditto. | |
27133 | (expand_mask_len_fold_left_optab_fn): Ditto. | |
27134 | (direct_mask_len_fold_left_optab_supported_p): Ditto. | |
27135 | * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto. | |
27136 | * optabs.def (OPTAB_D): Ditto. | |
27137 | ||
27138 | 2023-07-19 Jakub Jelinek <jakub@redhat.com> | |
27139 | ||
27140 | * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo. | |
27141 | ||
27142 | 2023-07-19 Jakub Jelinek <jakub@redhat.com> | |
27143 | ||
27144 | PR tree-optimization/110731 | |
27145 | * wide-int.cc (wi::divmod_internal): Always unpack dividend and | |
27146 | divisor as UNSIGNED regardless of sgn. | |
27147 | ||
27148 | 2023-07-19 Lehua Ding <lehua.ding@rivai.ai> | |
27149 | ||
27150 | * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init. | |
27151 | (standard_extensions_p): Add check. | |
27152 | (riscv_subset_list::add): Just return NULL if it failed before. | |
27153 | (riscv_subset_list::parse_std_ext): Continue parse when find a error | |
27154 | (riscv_subset_list::parse): Just return NULL if it failed before. | |
27155 | * config/riscv/riscv-subset.h (class riscv_subset_list): Add field. | |
27156 | ||
27157 | 2023-07-19 Jan Beulich <jbeulich@suse.com> | |
27158 | ||
27159 | * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): | |
27160 | Use gen_vec_set_0. | |
27161 | (ix86_expand_vector_extract): Use gen_vec_extract_lo / | |
27162 | gen_vec_extract_hi. | |
27163 | (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high / | |
27164 | gen_vec_interleave_low. Rename local variable. | |
27165 | ||
27166 | 2023-07-19 Jan Beulich <jbeulich@suse.com> | |
27167 | ||
27168 | * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F | |
27169 | alternative. Move AVX512VL part of condition to new "enabled" | |
27170 | attribute. | |
27171 | ||
27172 | 2023-07-19 liuhongt <hongtao.liu@intel.com> | |
27173 | ||
27174 | PR target/109504 | |
27175 | * config/i386/i386-builtins.cc | |
27176 | (ix86_register_float16_builtin_type): Remove TARGET_SSE2. | |
27177 | (ix86_register_bf16_builtin_type): Ditto. | |
27178 | * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2 | |
27179 | isn't available, undef the macros which are used to check the | |
27180 | backend support of the _Float16/__bf16 types when building | |
27181 | libstdc++ and libgcc. | |
27182 | * config/i386/i386.cc (construct_container): Issue errors for | |
27183 | HFmode/BFmode when TARGET_SSE2 is not available. | |
27184 | (function_value_32): Ditto. | |
27185 | (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode. | |
27186 | (ix86_libgcc_floating_mode_supported_p): Ditto. | |
27187 | (ix86_emit_support_tinfos): Adjust codes. | |
27188 | (ix86_invalid_conversion): Return diagnostic message string | |
27189 | when there's conversion from/to BF/HFmode w/o TARGET_SSE2. | |
27190 | (ix86_invalid_unary_op): New function. | |
27191 | (ix86_invalid_binary_op): Ditto. | |
27192 | (TARGET_INVALID_UNARY_OP): Define. | |
27193 | (TARGET_INVALID_BINARY_OP): Define. | |
27194 | * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16 | |
27195 | related instrinsics header files. | |
27196 | * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro. | |
27197 | ||
27198 | 2023-07-18 Uros Bizjak <ubizjak@gmail.com> | |
27199 | ||
27200 | * dwarf2asm.cc: Change FALSE to false. | |
27201 | * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void. | |
27202 | * dwarf2out.cc (matches_main_base): Change return type from | |
27203 | int to bool. Change "last_match" variable to bool. | |
27204 | (dump_struct_debug): Change return type from int to bool. | |
27205 | Change "matches" and "result" function arguments to bool. | |
27206 | (is_pseudo_reg): Change return type from int to bool. | |
27207 | (is_tagged_type): Ditto. | |
27208 | (same_loc_p): Ditto. | |
27209 | (same_dw_val_p): Change return type from int to bool and adjust | |
27210 | function body accordingly. | |
27211 | (same_attr_p): Ditto. | |
27212 | (same_die_p): Ditto. | |
27213 | (is_type_die): Ditto. | |
27214 | (is_declaration_die): Ditto. | |
27215 | (should_move_die_to_comdat): Ditto. | |
27216 | (is_base_type): Ditto. | |
27217 | (is_based_loc): Ditto. | |
27218 | (local_scope_p): Ditto. | |
27219 | (class_scope_p): Ditto. | |
27220 | (class_or_namespace_scope_p): Ditto. | |
27221 | (is_tagged_type): Ditto. | |
27222 | (is_rust): Use void argument. | |
27223 | (is_nested_in_subprogram): Change return type from int to bool. | |
27224 | (contains_subprogram_definition): Ditto. | |
27225 | (gen_struct_or_union_type_die): Change "nested", "complete" | |
27226 | and "ns_decl" variables to bool. | |
27227 | (is_naming_typedef_decl): Change FALSE to false. | |
27228 | ||
27229 | 2023-07-18 Jan Hubicka <jh@suse.cz> | |
27230 | ||
27231 | * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready | |
27232 | for queries not in headers. | |
27233 | (static_loop_exit): Add basic blck parameter; update use of | |
27234 | edge_range_query | |
27235 | (should_duplicate_loop_header_p): Add ranger and static_exits | |
27236 | parameter. Do not account statements that will be optimized | |
27237 | out after duplicaiton in overall size. Add ranger query to | |
27238 | find static exits. | |
27239 | (update_profile_after_ch): Take static_exits has set instead of | |
27240 | single eliminated_edge. | |
27241 | (ch_base::copy_headers): Do all analysis in the first pass; | |
27242 | remember invariant_exits and static_exits. | |
27243 | ||
27244 | 2023-07-18 Jason Merrill <jason@redhat.com> | |
27245 | ||
27246 | * fold-const.cc (native_interpret_aggregate): Skip empty fields. | |
27247 | ||
27248 | 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com> | |
27249 | ||
27250 | * doc/gm2.texi (Semantic checking): Change example testwithptr | |
27251 | to testnew6. | |
27252 | ||
27253 | 2023-07-18 Richard Biener <rguenther@suse.de> | |
27254 | ||
27255 | PR middle-end/105715 | |
27256 | * gimple-isel.cc (gimple_expand_vec_exprs): Merge into... | |
27257 | (pass_gimple_isel::execute): ... this. Duplicate | |
27258 | comparison defs of COND_EXPRs. | |
27259 | ||
27260 | 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
27261 | ||
27262 | * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests. | |
27263 | * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors. | |
27264 | (riscv_convert_vector_bits): Ditto. | |
27265 | ||
27266 | 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
27267 | ||
27268 | * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns. | |
27269 | * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs. | |
27270 | ||
27271 | 2023-07-18 Juergen Christ <jchrist@linux.ibm.com> | |
27272 | ||
27273 | * config/s390/vx-builtins.md: New vsel pattern. | |
27274 | ||
27275 | 2023-07-18 liuhongt <hongtao.liu@intel.com> | |
27276 | ||
27277 | PR target/110438 | |
27278 | * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): | |
27279 | Remove # from assemble output. | |
27280 | ||
27281 | 2023-07-18 liuhongt <hongtao.liu@intel.com> | |
27282 | ||
27283 | PR target/110591 | |
27284 | * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern | |
27285 | to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra | |
27286 | 3 define_peephole2 after the pattern. | |
27287 | ||
27288 | 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
27289 | ||
27290 | * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred. | |
27291 | ||
27292 | 2023-07-18 Pan Li <pan2.li@intel.com> | |
27293 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
27294 | ||
27295 | * config/riscv/riscv.cc (struct machine_function): Add new field. | |
27296 | (riscv_static_frm_mode_p): New function. | |
27297 | (riscv_emit_frm_mode_set): New function for emit FRM. | |
27298 | (riscv_emit_mode_set): Extract function for FRM. | |
27299 | (riscv_mode_needed): Fix the TODO. | |
27300 | (riscv_mode_entry): Initial dynamic frm RTL. | |
27301 | (riscv_mode_exit): Return DYN_EXIT. | |
27302 | * config/riscv/riscv.md: Add rdfrm. | |
27303 | * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv. | |
27304 | * config/riscv/vector.md (frm_modee): Add new mode dyn_exit. | |
27305 | (fsrm): Removed. | |
27306 | (fsrmsi_backup): New pattern for swap. | |
27307 | (fsrmsi_restore): New pattern for restore. | |
27308 | (fsrmsi_restore_exit): New pattern for restore exit. | |
27309 | (frrmsi): New pattern for backup. | |
27310 | ||
27311 | 2023-07-17 Arsen Arsenović <arsen@aarsen.me> | |
27312 | ||
27313 | * doc/extend.texi: Add @cindex on __auto_type. | |
27314 | ||
27315 | 2023-07-17 Uros Bizjak <ubizjak@gmail.com> | |
27316 | ||
27317 | * combine-stack-adj.cc (stack_memref_p): Change return type from | |
27318 | int to bool and adjust function body accordingly. | |
27319 | (rest_of_handle_stack_adjustments): Change return type to void. | |
27320 | ||
27321 | 2023-07-17 Uros Bizjak <ubizjak@gmail.com> | |
27322 | ||
27323 | * combine.cc (struct reg_stat_type): Change last_set_invalid to bool. | |
27324 | (cant_combine_insn_p): Change return type from int to bool and adjust | |
27325 | function body accordingly. | |
27326 | (can_combine_p): Ditto. | |
27327 | (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src" | |
27328 | function arguments from int to bool. | |
27329 | (contains_muldiv): Change return type from int to bool and adjust | |
27330 | function body accordingly. | |
27331 | (try_combine): Ditto. Change "new_direct_jump" pointer function | |
27332 | argument from int to bool. Change "substed_i2", "substed_i1", | |
27333 | "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2", | |
27334 | "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src", | |
27335 | "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src", | |
27336 | "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n", | |
27337 | "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult", | |
27338 | "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables | |
27339 | from int to bool. | |
27340 | (subst): Change "in_dest", "in_cond" and "unique_copy" function | |
27341 | arguments from int to bool. | |
27342 | (combine_simplify_rtx): Change "in_dest" and "in_cond" function | |
27343 | arguments from int to bool. | |
27344 | (make_extraction): Change "unsignedp", "in_dest" and "in_compare" | |
27345 | function argument from int to bool. | |
27346 | (force_int_to_mode): Change "just_select" function argument | |
27347 | from int to bool. Change "next_select" variable to bool. | |
27348 | (rtx_equal_for_field_assignment_p): Change return type from | |
27349 | int to bool and adjust function body accordingly. | |
27350 | (merge_outer_ops): Ditto. Change "pcomp_p" pointer function | |
27351 | argument from int to bool. | |
27352 | (get_last_value_validate): Change return type from int to bool | |
27353 | and adjust function body accordingly. | |
27354 | (reg_dead_at_p): Ditto. | |
27355 | (reg_bitfield_target_p): Ditto. | |
27356 | (combine_instructions): Ditto. Change "new_direct_jump" | |
27357 | variable to bool. | |
27358 | (can_combine_p): Change return type from int to bool | |
27359 | and adjust function body accordingly. | |
27360 | (likely_spilled_retval_p): Ditto. | |
27361 | (can_change_dest_mode): Change "added_sets" function argument | |
27362 | from int to bool. | |
27363 | (find_split_point): Change "unsignedp" variable to bool. | |
27364 | (simplify_if_then_else): Change "comparison_p" and "swapped" | |
27365 | variables to bool. | |
27366 | (simplify_set): Change "other_changed" variable to bool. | |
27367 | (expand_compound_operation): Change "unsignedp" variable to bool. | |
27368 | (force_to_mode): Change "just_select" function argument | |
27369 | from int to bool. Change "next_select" variable to bool. | |
27370 | (extended_count): Change "unsignedp" function argument to bool. | |
27371 | (simplify_shift_const_1): Change "complement_p" variable to bool. | |
27372 | (simplify_comparison): Change "changed" variable to bool. | |
27373 | (rest_of_handle_combine): Change return type to void. | |
27374 | ||
27375 | 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
27376 | ||
27377 | PR plugins/110610 | |
27378 | * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h. | |
27379 | ||
27380 | 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org> | |
27381 | ||
27382 | * ira.cc (setup_reg_class_relations): Continue | |
27383 | if regclass cl3 is hard_reg_set_empty_p. | |
27384 | ||
27385 | 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
27386 | ||
27387 | * config/riscv/riscv.cc (riscv_option_override): Add sorry check. | |
27388 | ||
27389 | 2023-07-17 Martin Jambor <mjambor@suse.cz> | |
27390 | ||
27391 | * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable | |
27392 | entry_count. | |
27393 | ||
27394 | 2023-07-17 Aldy Hernandez <aldyh@redhat.com> | |
27395 | ||
27396 | * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits. | |
27397 | ||
27398 | 2023-07-17 Lehua Ding <lehua.ding@rivai.ai> | |
27399 | ||
27400 | PR target/110696 | |
27401 | * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext): | |
27402 | recur add all implied extensions. | |
27403 | (riscv_subset_list::check_implied_ext): Add new method. | |
27404 | (riscv_subset_list::parse): Call checker check_implied_ext. | |
27405 | * config/riscv/riscv-subset.h: Add new method. | |
27406 | ||
27407 | 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
27408 | ||
27409 | * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern. | |
27410 | (reduc_smax_scal_<mode>): Ditto. | |
27411 | (reduc_umax_scal_<mode>): Ditto. | |
27412 | (reduc_smin_scal_<mode>): Ditto. | |
27413 | (reduc_umin_scal_<mode>): Ditto. | |
27414 | (reduc_and_scal_<mode>): Ditto. | |
27415 | (reduc_ior_scal_<mode>): Ditto. | |
27416 | (reduc_xor_scal_<mode>): Ditto. | |
27417 | * config/riscv/riscv-protos.h (enum insn_type): Add reduction. | |
27418 | (expand_reduction): New function. | |
27419 | * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto. | |
27420 | (emit_vlmax_fp_reduction_insn): Ditto. | |
27421 | (get_m1_mode): Ditto. | |
27422 | (expand_cond_len_binop): Fix name. | |
27423 | (expand_reduction): New function | |
27424 | * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG. | |
27425 | (validate_change_or_fail): New function. | |
27426 | (change_insn): Fix VSETVL BUG. | |
27427 | (change_vsetvl_insn): Ditto. | |
27428 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
27429 | (pass_vsetvl::df_post_optimization): Ditto. | |
27430 | ||
27431 | 2023-07-17 Aldy Hernandez <aldyh@redhat.com> | |
27432 | ||
27433 | * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits. | |
27434 | ||
27435 | 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu> | |
27436 | ||
27437 | * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): | |
27438 | Remove parameter name from declaration of unused parameter. | |
27439 | ||
27440 | 2023-07-17 Kewen Lin <linkw@linux.ibm.com> | |
27441 | ||
27442 | PR tree-optimization/110652 | |
27443 | * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as | |
27444 | NULL_TREE. | |
27445 | ||
27446 | 2023-07-17 Richard Biener <rguenther@suse.de> | |
27447 | ||
27448 | PR tree-optimization/110669 | |
27449 | * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect): | |
27450 | Check we matched a header PHI. | |
27451 | ||
27452 | 2023-07-17 Aldy Hernandez <aldyh@redhat.com> | |
27453 | ||
27454 | * tree-ssanames.cc (set_bitmask): New. | |
27455 | * tree-ssanames.h (set_bitmask): New. | |
27456 | ||
27457 | 2023-07-17 Aldy Hernandez <aldyh@redhat.com> | |
27458 | ||
27459 | * value-range.cc (irange_bitmask::verify_mask): Mask need not be | |
27460 | normalized. | |
27461 | * value-range.h (irange_bitmask::union_): Normalize beforehand. | |
27462 | (irange_bitmask::intersect): Same. | |
27463 | ||
27464 | 2023-07-17 Andrew Pinski <apinski@marvell.com> | |
27465 | ||
27466 | PR tree-optimization/95923 | |
27467 | * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation. | |
27468 | ||
27469 | 2023-07-17 Roger Sayle <roger@nextmovesoftware.com> | |
27470 | ||
27471 | * tree-if-conv.cc (predicate_scalar_phi): Make the arguments | |
27472 | to the std::sort comparison lambda function const. | |
27473 | ||
27474 | 2023-07-17 Andrew Pinski <apinski@marvell.com> | |
27475 | ||
27476 | PR tree-optimization/110666 | |
27477 | * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case. | |
27478 | ||
27479 | 2023-07-17 Mo, Zewei <zewei.mo@intel.com> | |
27480 | ||
27481 | * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake, | |
27482 | Arrow Lake and Arrow Lake S. | |
27483 | * common/config/i386/i386-common.cc: | |
27484 | (processor_name): Add arrowlake. | |
27485 | (processor_alias_table): Add arrow lake, arrow lake s and lunar | |
27486 | lake. | |
27487 | * common/config/i386/i386-cpuinfo.h (enum processor_subtypes): | |
27488 | Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S. | |
27489 | * config.gcc: Add -march=arrowlake and -march=arrowlake-s. | |
27490 | * config/i386/driver-i386.cc (host_detect_local_cpu): Handle | |
27491 | arrowlake-s. | |
27492 | * config/i386/i386-c.cc (ix86_target_macros_internal): Add | |
27493 | arrowlake. | |
27494 | * config/i386/i386-options.cc (m_ARROWLAKE): New. | |
27495 | (processor_cost_table): Add arrowlake. | |
27496 | * config/i386/i386.h (enum processor_type): | |
27497 | Add PROCESSOR_ARROWLAKE. | |
27498 | * config/i386/x86-tune.def: Add m_ARROWLAKE. | |
27499 | * doc/extend.texi: Add arrowlake and arrowlake-s. | |
27500 | * doc/invoke.texi: Ditto. | |
27501 | ||
27502 | 2023-07-17 Haochen Jiang <haochen.jiang@intel.com> | |
27503 | ||
27504 | * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually | |
27505 | have the same iterator. Also renaming all the occurence to | |
27506 | VI2_AVX2_AVX512BW. | |
27507 | (usdot_prod<mode>): New define_expand. | |
27508 | (udot_prod<mode>): Ditto. | |
27509 | ||
27510 | 2023-07-17 Haochen Jiang <haochen.jiang@intel.com> | |
27511 | ||
27512 | * common/config/i386/cpuinfo.h (get_available_features): | |
27513 | Detech SM4. | |
27514 | * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET, | |
27515 | OPTION_MASK_ISA2_SM4_UNSET): New. | |
27516 | (OPTION_MASK_ISA2_AVX_UNSET): Add SM4. | |
27517 | (ix86_handle_option): Handle -msm4. | |
27518 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
27519 | Add FEATURE_SM4. | |
27520 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
27521 | sm4. | |
27522 | * config.gcc: Add sm4intrin.h. | |
27523 | * config/i386/cpuid.h (bit_SM4): New. | |
27524 | * config/i386/i386-builtin.def (BDESC): Add new builtins. | |
27525 | * config/i386/i386-c.cc (ix86_target_macros_internal): Define | |
27526 | __SM4__. | |
27527 | * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4). | |
27528 | * config/i386/i386-options.cc (isa2_opts): Add -msm4. | |
27529 | (ix86_valid_target_attribute_inner_p): Handle sm4. | |
27530 | * config/i386/i386.opt: Add option -msm4. | |
27531 | * config/i386/immintrin.h: Include sm4intrin.h | |
27532 | * config/i386/sse.md (vsm4key4_<mode>): New define insn. | |
27533 | (vsm4rnds4_<mode>): Ditto. | |
27534 | * doc/extend.texi: Document sm4. | |
27535 | * doc/invoke.texi: Document -msm4. | |
27536 | * doc/sourcebuild.texi: Document target sm4. | |
27537 | * config/i386/sm4intrin.h: New file. | |
27538 | ||
27539 | 2023-07-17 Haochen Jiang <haochen.jiang@intel.com> | |
27540 | ||
27541 | * common/config/i386/cpuinfo.h (get_available_features): | |
27542 | Detect SHA512. | |
27543 | * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET, | |
27544 | OPTION_MASK_ISA2_SHA512_UNSET): New. | |
27545 | (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512. | |
27546 | (ix86_handle_option): Handle -msha512. | |
27547 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
27548 | Add FEATURE_SHA512. | |
27549 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
27550 | sha512. | |
27551 | * config.gcc: Add sha512intrin.h. | |
27552 | * config/i386/cpuid.h (bit_SHA512): New. | |
27553 | * config/i386/i386-builtin-types.def: | |
27554 | Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI). | |
27555 | * config/i386/i386-builtin.def (BDESC): Add new builtins. | |
27556 | * config/i386/i386-c.cc (ix86_target_macros_internal): Define | |
27557 | __SHA512__. | |
27558 | * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle | |
27559 | V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI. | |
27560 | * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512). | |
27561 | * config/i386/i386-options.cc (isa2_opts): Add -msha512. | |
27562 | (ix86_valid_target_attribute_inner_p): Handle sha512. | |
27563 | * config/i386/i386.opt: Add option -msha512. | |
27564 | * config/i386/immintrin.h: Include sha512intrin.h. | |
27565 | * config/i386/sse.md (vsha512msg1): New define insn. | |
27566 | (vsha512msg2): Ditto. | |
27567 | (vsha512rnds2): Ditto. | |
27568 | * doc/extend.texi: Document sha512. | |
27569 | * doc/invoke.texi: Document -msha512. | |
27570 | * doc/sourcebuild.texi: Document target sha512. | |
27571 | * config/i386/sha512intrin.h: New file. | |
27572 | ||
27573 | 2023-07-17 Haochen Jiang <haochen.jiang@intel.com> | |
27574 | ||
27575 | * common/config/i386/cpuinfo.h (get_available_features): | |
27576 | Detect SM3. | |
27577 | * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET, | |
27578 | OPTION_MASK_ISA2_SM3_UNSET): New. | |
27579 | (OPTION_MASK_ISA2_AVX_UNSET): Add SM3. | |
27580 | (ix86_handle_option): Handle -msm3. | |
27581 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
27582 | Add FEATURE_SM3. | |
27583 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
27584 | SM3. | |
27585 | * config.gcc: Add sm3intrin.h | |
27586 | * config/i386/cpuid.h (bit_SM3): New. | |
27587 | * config/i386/i386-builtin-types.def: | |
27588 | Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT). | |
27589 | * config/i386/i386-builtin.def (BDESC): Add new builtins. | |
27590 | * config/i386/i386-c.cc (ix86_target_macros_internal): Define | |
27591 | __SM3__. | |
27592 | * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle | |
27593 | V4SI_FTYPE_V4SI_V4SI_V4SI_INT. | |
27594 | * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3). | |
27595 | * config/i386/i386-options.cc (isa2_opts): Add -msm3. | |
27596 | (ix86_valid_target_attribute_inner_p): Handle sm3. | |
27597 | * config/i386/i386.opt: Add option -msm3. | |
27598 | * config/i386/immintrin.h: Include sm3intrin.h. | |
27599 | * config/i386/sse.md (vsm3msg1): New define insn. | |
27600 | (vsm3msg2): Ditto. | |
27601 | (vsm3rnds2): Ditto. | |
27602 | * doc/extend.texi: Document sm3. | |
27603 | * doc/invoke.texi: Document -msm3. | |
27604 | * doc/sourcebuild.texi: Document target sm3. | |
27605 | * config/i386/sm3intrin.h: New file. | |
27606 | ||
27607 | 2023-07-17 Kong Lingling <lingling.kong@intel.com> | |
27608 | Haochen Jiang <haochen.jiang@intel.com> | |
27609 | ||
27610 | * common/config/i386/cpuinfo.h (get_available_features): Detect | |
27611 | avxvnniint16. | |
27612 | * common/config/i386/i386-common.cc | |
27613 | (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New. | |
27614 | (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto. | |
27615 | (ix86_handle_option): Handle -mavxvnniint16. | |
27616 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
27617 | Add FEATURE_AVXVNNIINT16. | |
27618 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
27619 | avxvnniint16. | |
27620 | * config.gcc: Add avxvnniint16.h. | |
27621 | * config/i386/avxvnniint16intrin.h: New file. | |
27622 | * config/i386/cpuid.h (bit_AVXVNNIINT16): New. | |
27623 | * config/i386/i386-builtin.def: Add new builtins. | |
27624 | * config/i386/i386-c.cc (ix86_target_macros_internal): Define | |
27625 | __AVXVNNIINT16__. | |
27626 | * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16. | |
27627 | (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h. | |
27628 | * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16). | |
27629 | * config/i386/i386.opt: Add option -mavxvnniint16. | |
27630 | * config/i386/immintrin.h: Include avxvnniint16.h. | |
27631 | * config/i386/sse.md | |
27632 | (vpdp<vpdpwprodtype>_<mode>): New define_insn. | |
27633 | * doc/extend.texi: Document avxvnniint16. | |
27634 | * doc/invoke.texi: Document -mavxvnniint16. | |
27635 | * doc/sourcebuild.texi: Document target avxvnniint16. | |
27636 | ||
27637 | 2023-07-16 Jan Hubicka <jh@suse.cz> | |
27638 | ||
27639 | PR middle-end/110649 | |
27640 | * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite. | |
27641 | (vect_transform_loop): Move scale_profile_for_vect_loop after | |
27642 | upper bound updates. | |
27643 | ||
27644 | 2023-07-16 Jan Hubicka <jh@suse.cz> | |
27645 | ||
27646 | PR tree-optimization/110649 | |
27647 | * tree-vect-loop.cc (optimize_mask_stores): Set correctly | |
27648 | probability of the if-then-else construct. | |
27649 | ||
27650 | 2023-07-16 Jan Hubicka <jh@suse.cz> | |
27651 | ||
27652 | PR middle-end/110649 | |
27653 | * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update. | |
27654 | ||
27655 | 2023-07-15 Andrew Pinski <apinski@marvell.com> | |
27656 | ||
27657 | * doc/contrib.texi: Update my entry. | |
27658 | ||
27659 | 2023-07-15 John David Anglin <danglin@gcc.gnu.org> | |
27660 | ||
27661 | * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and | |
27662 | R27_REGNUM. | |
27663 | (tgd_load): Restrict to !TARGET_64BIT. Use register constants. | |
27664 | (tld_load): Likewise. | |
27665 | (tgd_load_pic): Change to expander. | |
27666 | (tld_load_pic, tld_offset_load, tp_load): Likewise. | |
27667 | (tie_load_pic, tle_load): Likewise. | |
27668 | (tgd_load_picsi, tgd_load_picdi): New. | |
27669 | (tld_load_picsi, tld_load_picdi): New. | |
27670 | (tld_offset_load<P:mode>): New. | |
27671 | (tp_load<P:mode>): New. | |
27672 | (tie_load_picsi, tie_load_picdi): New. | |
27673 | (tle_load<P:mode>): New. | |
27674 | ||
27675 | 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org> | |
27676 | ||
27677 | * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90) | |
27678 | (vcmlaq_rot180, vcmlaq_rot270): New. | |
27679 | * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90) | |
27680 | (vcmlaq_rot180, vcmlaq_rot270): New. | |
27681 | * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90) | |
27682 | (vcmlaq_rot180, vcmlaq_rot270): New. | |
27683 | * config/arm/arm-mve-builtins.cc | |
27684 | (function_instance::has_inactive_argument): Handle vcmlaq, | |
27685 | vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270. | |
27686 | * config/arm/arm_mve.h (vcmlaq): Delete. | |
27687 | (vcmlaq_rot180): Delete. | |
27688 | (vcmlaq_rot270): Delete. | |
27689 | (vcmlaq_rot90): Delete. | |
27690 | (vcmlaq_m): Delete. | |
27691 | (vcmlaq_rot180_m): Delete. | |
27692 | (vcmlaq_rot270_m): Delete. | |
27693 | (vcmlaq_rot90_m): Delete. | |
27694 | (vcmlaq_f16): Delete. | |
27695 | (vcmlaq_rot180_f16): Delete. | |
27696 | (vcmlaq_rot270_f16): Delete. | |
27697 | (vcmlaq_rot90_f16): Delete. | |
27698 | (vcmlaq_f32): Delete. | |
27699 | (vcmlaq_rot180_f32): Delete. | |
27700 | (vcmlaq_rot270_f32): Delete. | |
27701 | (vcmlaq_rot90_f32): Delete. | |
27702 | (vcmlaq_m_f32): Delete. | |
27703 | (vcmlaq_m_f16): Delete. | |
27704 | (vcmlaq_rot180_m_f32): Delete. | |
27705 | (vcmlaq_rot180_m_f16): Delete. | |
27706 | (vcmlaq_rot270_m_f32): Delete. | |
27707 | (vcmlaq_rot270_m_f16): Delete. | |
27708 | (vcmlaq_rot90_m_f32): Delete. | |
27709 | (vcmlaq_rot90_m_f16): Delete. | |
27710 | (__arm_vcmlaq_f16): Delete. | |
27711 | (__arm_vcmlaq_rot180_f16): Delete. | |
27712 | (__arm_vcmlaq_rot270_f16): Delete. | |
27713 | (__arm_vcmlaq_rot90_f16): Delete. | |
27714 | (__arm_vcmlaq_f32): Delete. | |
27715 | (__arm_vcmlaq_rot180_f32): Delete. | |
27716 | (__arm_vcmlaq_rot270_f32): Delete. | |
27717 | (__arm_vcmlaq_rot90_f32): Delete. | |
27718 | (__arm_vcmlaq_m_f32): Delete. | |
27719 | (__arm_vcmlaq_m_f16): Delete. | |
27720 | (__arm_vcmlaq_rot180_m_f32): Delete. | |
27721 | (__arm_vcmlaq_rot180_m_f16): Delete. | |
27722 | (__arm_vcmlaq_rot270_m_f32): Delete. | |
27723 | (__arm_vcmlaq_rot270_m_f16): Delete. | |
27724 | (__arm_vcmlaq_rot90_m_f32): Delete. | |
27725 | (__arm_vcmlaq_rot90_m_f16): Delete. | |
27726 | (__arm_vcmlaq): Delete. | |
27727 | (__arm_vcmlaq_rot180): Delete. | |
27728 | (__arm_vcmlaq_rot270): Delete. | |
27729 | (__arm_vcmlaq_rot90): Delete. | |
27730 | (__arm_vcmlaq_m): Delete. | |
27731 | (__arm_vcmlaq_rot180_m): Delete. | |
27732 | (__arm_vcmlaq_rot270_m): Delete. | |
27733 | (__arm_vcmlaq_rot90_m): Delete. | |
27734 | ||
27735 | 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org> | |
27736 | ||
27737 | * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f) | |
27738 | (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix. | |
27739 | * config/arm/iterators.md (MVE_VCMLAQ_M): New. | |
27740 | (mve_insn): Add vcmla. | |
27741 | (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F, | |
27742 | VCMLAQ_ROT270_M_F. | |
27743 | (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F, | |
27744 | VCMLAQ_ROT270_M_F. | |
27745 | * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ... | |
27746 | (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this. | |
27747 | (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>) | |
27748 | (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge | |
27749 | into ... | |
27750 | (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this. | |
27751 | ||
27752 | 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org> | |
27753 | ||
27754 | * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90) | |
27755 | (vcmulq_rot180, vcmulq_rot270): New. | |
27756 | * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90) | |
27757 | (vcmulq_rot180, vcmulq_rot270): New. | |
27758 | * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90) | |
27759 | (vcmulq_rot180, vcmulq_rot270): New. | |
27760 | * config/arm/arm_mve.h (vcmulq_rot90): Delete. | |
27761 | (vcmulq_rot270): Delete. | |
27762 | (vcmulq_rot180): Delete. | |
27763 | (vcmulq): Delete. | |
27764 | (vcmulq_m): Delete. | |
27765 | (vcmulq_rot180_m): Delete. | |
27766 | (vcmulq_rot270_m): Delete. | |
27767 | (vcmulq_rot90_m): Delete. | |
27768 | (vcmulq_x): Delete. | |
27769 | (vcmulq_rot90_x): Delete. | |
27770 | (vcmulq_rot180_x): Delete. | |
27771 | (vcmulq_rot270_x): Delete. | |
27772 | (vcmulq_rot90_f16): Delete. | |
27773 | (vcmulq_rot270_f16): Delete. | |
27774 | (vcmulq_rot180_f16): Delete. | |
27775 | (vcmulq_f16): Delete. | |
27776 | (vcmulq_rot90_f32): Delete. | |
27777 | (vcmulq_rot270_f32): Delete. | |
27778 | (vcmulq_rot180_f32): Delete. | |
27779 | (vcmulq_f32): Delete. | |
27780 | (vcmulq_m_f32): Delete. | |
27781 | (vcmulq_m_f16): Delete. | |
27782 | (vcmulq_rot180_m_f32): Delete. | |
27783 | (vcmulq_rot180_m_f16): Delete. | |
27784 | (vcmulq_rot270_m_f32): Delete. | |
27785 | (vcmulq_rot270_m_f16): Delete. | |
27786 | (vcmulq_rot90_m_f32): Delete. | |
27787 | (vcmulq_rot90_m_f16): Delete. | |
27788 | (vcmulq_x_f16): Delete. | |
27789 | (vcmulq_x_f32): Delete. | |
27790 | (vcmulq_rot90_x_f16): Delete. | |
27791 | (vcmulq_rot90_x_f32): Delete. | |
27792 | (vcmulq_rot180_x_f16): Delete. | |
27793 | (vcmulq_rot180_x_f32): Delete. | |
27794 | (vcmulq_rot270_x_f16): Delete. | |
27795 | (vcmulq_rot270_x_f32): Delete. | |
27796 | (__arm_vcmulq_rot90_f16): Delete. | |
27797 | (__arm_vcmulq_rot270_f16): Delete. | |
27798 | (__arm_vcmulq_rot180_f16): Delete. | |
27799 | (__arm_vcmulq_f16): Delete. | |
27800 | (__arm_vcmulq_rot90_f32): Delete. | |
27801 | (__arm_vcmulq_rot270_f32): Delete. | |
27802 | (__arm_vcmulq_rot180_f32): Delete. | |
27803 | (__arm_vcmulq_f32): Delete. | |
27804 | (__arm_vcmulq_m_f32): Delete. | |
27805 | (__arm_vcmulq_m_f16): Delete. | |
27806 | (__arm_vcmulq_rot180_m_f32): Delete. | |
27807 | (__arm_vcmulq_rot180_m_f16): Delete. | |
27808 | (__arm_vcmulq_rot270_m_f32): Delete. | |
27809 | (__arm_vcmulq_rot270_m_f16): Delete. | |
27810 | (__arm_vcmulq_rot90_m_f32): Delete. | |
27811 | (__arm_vcmulq_rot90_m_f16): Delete. | |
27812 | (__arm_vcmulq_x_f16): Delete. | |
27813 | (__arm_vcmulq_x_f32): Delete. | |
27814 | (__arm_vcmulq_rot90_x_f16): Delete. | |
27815 | (__arm_vcmulq_rot90_x_f32): Delete. | |
27816 | (__arm_vcmulq_rot180_x_f16): Delete. | |
27817 | (__arm_vcmulq_rot180_x_f32): Delete. | |
27818 | (__arm_vcmulq_rot270_x_f16): Delete. | |
27819 | (__arm_vcmulq_rot270_x_f32): Delete. | |
27820 | (__arm_vcmulq_rot90): Delete. | |
27821 | (__arm_vcmulq_rot270): Delete. | |
27822 | (__arm_vcmulq_rot180): Delete. | |
27823 | (__arm_vcmulq): Delete. | |
27824 | (__arm_vcmulq_m): Delete. | |
27825 | (__arm_vcmulq_rot180_m): Delete. | |
27826 | (__arm_vcmulq_rot270_m): Delete. | |
27827 | (__arm_vcmulq_rot90_m): Delete. | |
27828 | (__arm_vcmulq_x): Delete. | |
27829 | (__arm_vcmulq_rot90_x): Delete. | |
27830 | (__arm_vcmulq_rot180_x): Delete. | |
27831 | (__arm_vcmulq_rot270_x): Delete. | |
27832 | ||
27833 | 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org> | |
27834 | ||
27835 | * config/arm/arm_mve_builtins.def (vcmulq_rot90_f) | |
27836 | (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix. | |
27837 | * config/arm/iterators.md (MVE_VCADDQ_VCMULQ) | |
27838 | (MVE_VCADDQ_VCMULQ_M): New. | |
27839 | (mve_insn): Add vcmul. | |
27840 | (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F, | |
27841 | VCMULQ_ROT270_M_F. | |
27842 | (VCMUL): Delete. | |
27843 | (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F, | |
27844 | VCMULQ_ROT270_M_F. | |
27845 | * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into | |
27846 | @mve_<mve_insn>q<mve_rot>_f<mode>. | |
27847 | (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>) | |
27848 | (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge | |
27849 | into @mve_<mve_insn>q<mve_rot>_m_f<mode>. | |
27850 | ||
27851 | 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org> | |
27852 | ||
27853 | * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90) | |
27854 | (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New. | |
27855 | * config/arm/arm-mve-builtins-base.def (vcaddq_rot90) | |
27856 | (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New. | |
27857 | * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90) | |
27858 | (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New. | |
27859 | * config/arm/arm-mve-builtins-functions.h (class | |
27860 | unspec_mve_function_exact_insn_rot): New. | |
27861 | * config/arm/arm_mve.h (vcaddq_rot90): Delete. | |
27862 | (vcaddq_rot270): Delete. | |
27863 | (vhcaddq_rot90): Delete. | |
27864 | (vhcaddq_rot270): Delete. | |
27865 | (vcaddq_rot270_m): Delete. | |
27866 | (vcaddq_rot90_m): Delete. | |
27867 | (vhcaddq_rot270_m): Delete. | |
27868 | (vhcaddq_rot90_m): Delete. | |
27869 | (vcaddq_rot90_x): Delete. | |
27870 | (vcaddq_rot270_x): Delete. | |
27871 | (vhcaddq_rot90_x): Delete. | |
27872 | (vhcaddq_rot270_x): Delete. | |
27873 | (vcaddq_rot90_u8): Delete. | |
27874 | (vcaddq_rot270_u8): Delete. | |
27875 | (vhcaddq_rot90_s8): Delete. | |
27876 | (vhcaddq_rot270_s8): Delete. | |
27877 | (vcaddq_rot90_s8): Delete. | |
27878 | (vcaddq_rot270_s8): Delete. | |
27879 | (vcaddq_rot90_u16): Delete. | |
27880 | (vcaddq_rot270_u16): Delete. | |
27881 | (vhcaddq_rot90_s16): Delete. | |
27882 | (vhcaddq_rot270_s16): Delete. | |
27883 | (vcaddq_rot90_s16): Delete. | |
27884 | (vcaddq_rot270_s16): Delete. | |
27885 | (vcaddq_rot90_u32): Delete. | |
27886 | (vcaddq_rot270_u32): Delete. | |
27887 | (vhcaddq_rot90_s32): Delete. | |
27888 | (vhcaddq_rot270_s32): Delete. | |
27889 | (vcaddq_rot90_s32): Delete. | |
27890 | (vcaddq_rot270_s32): Delete. | |
27891 | (vcaddq_rot90_f16): Delete. | |
27892 | (vcaddq_rot270_f16): Delete. | |
27893 | (vcaddq_rot90_f32): Delete. | |
27894 | (vcaddq_rot270_f32): Delete. | |
27895 | (vcaddq_rot270_m_s8): Delete. | |
27896 | (vcaddq_rot270_m_s32): Delete. | |
27897 | (vcaddq_rot270_m_s16): Delete. | |
27898 | (vcaddq_rot270_m_u8): Delete. | |
27899 | (vcaddq_rot270_m_u32): Delete. | |
27900 | (vcaddq_rot270_m_u16): Delete. | |
27901 | (vcaddq_rot90_m_s8): Delete. | |
27902 | (vcaddq_rot90_m_s32): Delete. | |
27903 | (vcaddq_rot90_m_s16): Delete. | |
27904 | (vcaddq_rot90_m_u8): Delete. | |
27905 | (vcaddq_rot90_m_u32): Delete. | |
27906 | (vcaddq_rot90_m_u16): Delete. | |
27907 | (vhcaddq_rot270_m_s8): Delete. | |
27908 | (vhcaddq_rot270_m_s32): Delete. | |
27909 | (vhcaddq_rot270_m_s16): Delete. | |
27910 | (vhcaddq_rot90_m_s8): Delete. | |
27911 | (vhcaddq_rot90_m_s32): Delete. | |
27912 | (vhcaddq_rot90_m_s16): Delete. | |
27913 | (vcaddq_rot270_m_f32): Delete. | |
27914 | (vcaddq_rot270_m_f16): Delete. | |
27915 | (vcaddq_rot90_m_f32): Delete. | |
27916 | (vcaddq_rot90_m_f16): Delete. | |
27917 | (vcaddq_rot90_x_s8): Delete. | |
27918 | (vcaddq_rot90_x_s16): Delete. | |
27919 | (vcaddq_rot90_x_s32): Delete. | |
27920 | (vcaddq_rot90_x_u8): Delete. | |
27921 | (vcaddq_rot90_x_u16): Delete. | |
27922 | (vcaddq_rot90_x_u32): Delete. | |
27923 | (vcaddq_rot270_x_s8): Delete. | |
27924 | (vcaddq_rot270_x_s16): Delete. | |
27925 | (vcaddq_rot270_x_s32): Delete. | |
27926 | (vcaddq_rot270_x_u8): Delete. | |
27927 | (vcaddq_rot270_x_u16): Delete. | |
27928 | (vcaddq_rot270_x_u32): Delete. | |
27929 | (vhcaddq_rot90_x_s8): Delete. | |
27930 | (vhcaddq_rot90_x_s16): Delete. | |
27931 | (vhcaddq_rot90_x_s32): Delete. | |
27932 | (vhcaddq_rot270_x_s8): Delete. | |
27933 | (vhcaddq_rot270_x_s16): Delete. | |
27934 | (vhcaddq_rot270_x_s32): Delete. | |
27935 | (vcaddq_rot90_x_f16): Delete. | |
27936 | (vcaddq_rot90_x_f32): Delete. | |
27937 | (vcaddq_rot270_x_f16): Delete. | |
27938 | (vcaddq_rot270_x_f32): Delete. | |
27939 | (__arm_vcaddq_rot90_u8): Delete. | |
27940 | (__arm_vcaddq_rot270_u8): Delete. | |
27941 | (__arm_vhcaddq_rot90_s8): Delete. | |
27942 | (__arm_vhcaddq_rot270_s8): Delete. | |
27943 | (__arm_vcaddq_rot90_s8): Delete. | |
27944 | (__arm_vcaddq_rot270_s8): Delete. | |
27945 | (__arm_vcaddq_rot90_u16): Delete. | |
27946 | (__arm_vcaddq_rot270_u16): Delete. | |
27947 | (__arm_vhcaddq_rot90_s16): Delete. | |
27948 | (__arm_vhcaddq_rot270_s16): Delete. | |
27949 | (__arm_vcaddq_rot90_s16): Delete. | |
27950 | (__arm_vcaddq_rot270_s16): Delete. | |
27951 | (__arm_vcaddq_rot90_u32): Delete. | |
27952 | (__arm_vcaddq_rot270_u32): Delete. | |
27953 | (__arm_vhcaddq_rot90_s32): Delete. | |
27954 | (__arm_vhcaddq_rot270_s32): Delete. | |
27955 | (__arm_vcaddq_rot90_s32): Delete. | |
27956 | (__arm_vcaddq_rot270_s32): Delete. | |
27957 | (__arm_vcaddq_rot270_m_s8): Delete. | |
27958 | (__arm_vcaddq_rot270_m_s32): Delete. | |
27959 | (__arm_vcaddq_rot270_m_s16): Delete. | |
27960 | (__arm_vcaddq_rot270_m_u8): Delete. | |
27961 | (__arm_vcaddq_rot270_m_u32): Delete. | |
27962 | (__arm_vcaddq_rot270_m_u16): Delete. | |
27963 | (__arm_vcaddq_rot90_m_s8): Delete. | |
27964 | (__arm_vcaddq_rot90_m_s32): Delete. | |
27965 | (__arm_vcaddq_rot90_m_s16): Delete. | |
27966 | (__arm_vcaddq_rot90_m_u8): Delete. | |
27967 | (__arm_vcaddq_rot90_m_u32): Delete. | |
27968 | (__arm_vcaddq_rot90_m_u16): Delete. | |
27969 | (__arm_vhcaddq_rot270_m_s8): Delete. | |
27970 | (__arm_vhcaddq_rot270_m_s32): Delete. | |
27971 | (__arm_vhcaddq_rot270_m_s16): Delete. | |
27972 | (__arm_vhcaddq_rot90_m_s8): Delete. | |
27973 | (__arm_vhcaddq_rot90_m_s32): Delete. | |
27974 | (__arm_vhcaddq_rot90_m_s16): Delete. | |
27975 | (__arm_vcaddq_rot90_x_s8): Delete. | |
27976 | (__arm_vcaddq_rot90_x_s16): Delete. | |
27977 | (__arm_vcaddq_rot90_x_s32): Delete. | |
27978 | (__arm_vcaddq_rot90_x_u8): Delete. | |
27979 | (__arm_vcaddq_rot90_x_u16): Delete. | |
27980 | (__arm_vcaddq_rot90_x_u32): Delete. | |
27981 | (__arm_vcaddq_rot270_x_s8): Delete. | |
27982 | (__arm_vcaddq_rot270_x_s16): Delete. | |
27983 | (__arm_vcaddq_rot270_x_s32): Delete. | |
27984 | (__arm_vcaddq_rot270_x_u8): Delete. | |
27985 | (__arm_vcaddq_rot270_x_u16): Delete. | |
27986 | (__arm_vcaddq_rot270_x_u32): Delete. | |
27987 | (__arm_vhcaddq_rot90_x_s8): Delete. | |
27988 | (__arm_vhcaddq_rot90_x_s16): Delete. | |
27989 | (__arm_vhcaddq_rot90_x_s32): Delete. | |
27990 | (__arm_vhcaddq_rot270_x_s8): Delete. | |
27991 | (__arm_vhcaddq_rot270_x_s16): Delete. | |
27992 | (__arm_vhcaddq_rot270_x_s32): Delete. | |
27993 | (__arm_vcaddq_rot90_f16): Delete. | |
27994 | (__arm_vcaddq_rot270_f16): Delete. | |
27995 | (__arm_vcaddq_rot90_f32): Delete. | |
27996 | (__arm_vcaddq_rot270_f32): Delete. | |
27997 | (__arm_vcaddq_rot270_m_f32): Delete. | |
27998 | (__arm_vcaddq_rot270_m_f16): Delete. | |
27999 | (__arm_vcaddq_rot90_m_f32): Delete. | |
28000 | (__arm_vcaddq_rot90_m_f16): Delete. | |
28001 | (__arm_vcaddq_rot90_x_f16): Delete. | |
28002 | (__arm_vcaddq_rot90_x_f32): Delete. | |
28003 | (__arm_vcaddq_rot270_x_f16): Delete. | |
28004 | (__arm_vcaddq_rot270_x_f32): Delete. | |
28005 | (__arm_vcaddq_rot90): Delete. | |
28006 | (__arm_vcaddq_rot270): Delete. | |
28007 | (__arm_vhcaddq_rot90): Delete. | |
28008 | (__arm_vhcaddq_rot270): Delete. | |
28009 | (__arm_vcaddq_rot270_m): Delete. | |
28010 | (__arm_vcaddq_rot90_m): Delete. | |
28011 | (__arm_vhcaddq_rot270_m): Delete. | |
28012 | (__arm_vhcaddq_rot90_m): Delete. | |
28013 | (__arm_vcaddq_rot90_x): Delete. | |
28014 | (__arm_vcaddq_rot270_x): Delete. | |
28015 | (__arm_vhcaddq_rot90_x): Delete. | |
28016 | (__arm_vhcaddq_rot270_x): Delete. | |
28017 | ||
28018 | 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org> | |
28019 | ||
28020 | * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_) | |
28021 | (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix. | |
28022 | * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd. | |
28023 | (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U, | |
28024 | VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S, | |
28025 | VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S, | |
28026 | VHCADDQ_ROT270_S. | |
28027 | (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U, | |
28028 | VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U, | |
28029 | VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S, | |
28030 | VHCADDQ_ROT270_M_S. | |
28031 | (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, | |
28032 | VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, | |
28033 | VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, | |
28034 | VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S. | |
28035 | (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, | |
28036 | VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90, | |
28037 | UNSPEC_VCADD270. | |
28038 | (VCADDQ_ROT270_M): Delete. | |
28039 | (VCADDQ_M_F VxCADDQ VxCADDQ_M): New. | |
28040 | (VCADDQ_ROT90_M): Delete. | |
28041 | * config/arm/mve.md (mve_vcaddq<mve_rot><mode>) | |
28042 | (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge | |
28043 | into ... | |
28044 | (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this. | |
28045 | (mve_vcaddq<mve_rot><mode>): Rename into ... | |
28046 | (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this | |
28047 | (mve_vcaddq_rot270_m_<supf><mode>) | |
28048 | (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>) | |
28049 | (mve_vhcaddq_rot90_m_s<mode>): Merge into ... | |
28050 | (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this. | |
28051 | (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge | |
28052 | into ... | |
28053 | (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this. | |
28054 | ||
28055 | 2023-07-14 Roger Sayle <roger@nextmovesoftware.com> | |
28056 | ||
28057 | PR target/110588 | |
28058 | * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form | |
28059 | preparation statement over braces for a single statement. | |
28060 | (*bt<mode>_setncqi): Likewise. | |
28061 | (*bt<mode>_setncqi_2): New define_insn_and_split. | |
28062 | ||
28063 | 2023-07-14 Roger Sayle <roger@nextmovesoftware.com> | |
28064 | ||
28065 | * config/i386/i386-expand.cc (ix86_expand_move): Generalize special | |
28066 | case inserting of 64-bit values into a TImode register, to handle | |
28067 | both DImode and DFmode using either *insvti_lowpart_1 | |
28068 | or *isnvti_highpart_1. | |
28069 | ||
28070 | 2023-07-14 Uros Bizjak <ubizjak@gmail.com> | |
28071 | ||
28072 | PR target/110206 | |
28073 | * fwprop.cc (contains_paradoxical_subreg_p): Move to ... | |
28074 | * rtlanal.cc (contains_paradoxical_subreg_p): ... here. | |
28075 | * rtlanal.h (contains_paradoxical_subreg_p): Add prototype. | |
28076 | * cprop.cc (try_replace_reg): Do not set REG_EQUAL note | |
28077 | when the original source contains a paradoxical subreg. | |
28078 | ||
28079 | 2023-07-14 Jan Hubicka <jh@suse.cz> | |
28080 | ||
28081 | * passes.cc (execute_function_todo): Remove | |
28082 | TODO_rebuild_frequencies | |
28083 | * passes.def: Add rebuild_frequencies pass. | |
28084 | * predict.cc (estimate_bb_frequencies): Drop | |
28085 | force parameter. | |
28086 | (tree_estimate_probability): Update call of | |
28087 | estimate_bb_frequencies. | |
28088 | (rebuild_frequencies): Turn into a pass; verify CFG profile consistency | |
28089 | first and do not rebuild if not necessary. | |
28090 | (class pass_rebuild_frequencies): New. | |
28091 | (make_pass_rebuild_frequencies): New. | |
28092 | * profile-count.h: Add profile_count::very_large_p. | |
28093 | * tree-inline.cc (optimize_inline_calls): Do not return | |
28094 | TODO_rebuild_frequencies | |
28095 | * tree-pass.h (TODO_rebuild_frequencies): Remove. | |
28096 | (make_pass_rebuild_frequencies): Declare. | |
28097 | ||
28098 | 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
28099 | ||
28100 | * config/riscv/autovec.md (cond_len_fma<mode>): New pattern. | |
28101 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
28102 | (expand_cond_len_ternop): New function. | |
28103 | * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto. | |
28104 | (expand_cond_len_ternop): Ditto. | |
28105 | ||
28106 | 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> | |
28107 | ||
28108 | PR target/110657 | |
28109 | * config/bpf/bpf.md: Enable instruction scheduling. | |
28110 | ||
28111 | 2023-07-14 Tamar Christina <tamar.christina@arm.com> | |
28112 | ||
28113 | PR tree-optimization/109154 | |
28114 | * tree-if-conv.cc (INCLUDE_ALGORITHM): Include. | |
28115 | (struct bb_predicate): Add no_predicate_stmts. | |
28116 | (set_bb_predicate): Increase predicate count. | |
28117 | (set_bb_predicate_gimplified_stmts): Conditionally initialize | |
28118 | no_predicate_stmts. | |
28119 | (get_bb_num_predicate_stmts): New. | |
28120 | (init_bb_predicate): Initialzie no_predicate_stmts. | |
28121 | (release_bb_predicate): Cleanup no_predicate_stmts. | |
28122 | (insert_gimplified_predicates): Preserve no_predicate_stmts. | |
28123 | ||
28124 | 2023-07-14 Tamar Christina <tamar.christina@arm.com> | |
28125 | ||
28126 | PR tree-optimization/109154 | |
28127 | * tree-if-conv.cc (gen_simplified_condition, | |
28128 | gen_phi_nest_statement): New. | |
28129 | (gen_phi_arg_condition, predicate_scalar_phi): Use it. | |
28130 | ||
28131 | 2023-07-14 Richard Biener <rguenther@suse.de> | |
28132 | ||
28133 | * gimple.h (gimple_phi_arg): New const overload. | |
28134 | (gimple_phi_arg_def): Make gimple arg const. | |
28135 | (gimple_phi_arg_def_from_edge): New inline function. | |
28136 | * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge): | |
28137 | Likewise. | |
28138 | * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to | |
28139 | new inline function. | |
28140 | (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise. | |
28141 | ||
28142 | 2023-07-14 Monk Chiang <monk.chiang@sifive.com> | |
28143 | ||
28144 | * common/config/riscv/riscv-common.cc: | |
28145 | (riscv_implied_info): Add zihintntl item. | |
28146 | (riscv_ext_version_table): Ditto. | |
28147 | (riscv_ext_flag_table): Ditto. | |
28148 | * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro. | |
28149 | (TARGET_ZIHINTNTL): Ditto. | |
28150 | ||
28151 | 2023-07-14 Die Li <lidie@eswincomputing.com> | |
28152 | ||
28153 | * config/riscv/riscv.md: Remove redundant portion in and<mode>3. | |
28154 | ||
28155 | 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org> | |
28156 | ||
28157 | PR target/101469 | |
28158 | * config/sh/sh.md (peephole2): Handle case where eliminated reg is also | |
28159 | used by the address of the following memory operand. | |
28160 | ||
28161 | 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com> | |
28162 | ||
28163 | PR target/107841 | |
28164 | * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also | |
28165 | deallocate alloca-only frame. | |
28166 | ||
28167 | 2023-07-13 Iain Sandoe <iain@sandoe.co.uk> | |
28168 | ||
28169 | PR target/110624 | |
28170 | * config/darwin.h (DARWIN_PLATFORM_ID): New. | |
28171 | (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version | |
28172 | and SDK data to the static linker. | |
28173 | ||
28174 | 2023-07-13 Carl Love <cel@us.ibm.com> | |
28175 | ||
28176 | * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update | |
28177 | built-in definition return type. | |
28178 | * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check, | |
28179 | define __SET_FPSCR_RN_RETURNS_FPSCR__ macro. | |
28180 | * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return | |
28181 | argument to return FPSCR fields. | |
28182 | * doc/extend.texi (__builtin_set_fpscr_rn): Update description for | |
28183 | the return value. Add description for | |
28184 | __SET_FPSCR_RN_RETURNS_FPSCR__ macro. | |
28185 | ||
28186 | 2023-07-13 Uros Bizjak <ubizjak@gmail.com> | |
28187 | ||
28188 | PR target/106966 | |
28189 | * config/alpha/alpha.cc (alpha_emit_set_long_const): | |
28190 | Always use DImode when constructing long const. | |
28191 | ||
28192 | 2023-07-13 Uros Bizjak <ubizjak@gmail.com> | |
28193 | ||
28194 | * haifa-sched.cc: Change TRUE/FALSE to true/false. | |
28195 | * ira.cc: Ditto. | |
28196 | * lra-assigns.cc: Ditto. | |
28197 | * lra-constraints.cc: Ditto. | |
28198 | * sel-sched.cc: Ditto. | |
28199 | ||
28200 | 2023-07-13 Andrew Pinski <apinski@marvell.com> | |
28201 | ||
28202 | PR tree-optimization/110293 | |
28203 | PR tree-optimization/110539 | |
28204 | * match.pd: Expand the `x != (typeof x)(x == 0)` | |
28205 | pattern to handle where the inner and outer comparsions | |
28206 | are either `!=` or `==` and handle other constants | |
28207 | than 0. | |
28208 | ||
28209 | 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com> | |
28210 | ||
28211 | PR middle-end/109520 | |
28212 | * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num. | |
28213 | (lra_asm_insn_error): New prototype. | |
28214 | * lra.cc: Include rtl_error.h. | |
28215 | (lra_set_insn_recog_data): Initialize asm_reloads_num. | |
28216 | (lra_asm_insn_error): New func whose code is taken from ... | |
28217 | * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error. | |
28218 | * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm. | |
28219 | ||
28220 | 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28221 | ||
28222 | * genmatch.cc (commutative_op): Add COND_LEN_* | |
28223 | * internal-fn.cc (first_commutative_argument): Ditto. | |
28224 | (CASE): Ditto. | |
28225 | (get_unconditional_internal_fn): Ditto. | |
28226 | (can_interpret_as_conditional_op_p): Ditto. | |
28227 | (internal_fn_len_index): Ditto. | |
28228 | * internal-fn.h (can_interpret_as_conditional_op_p): Ditt. | |
28229 | * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto. | |
28230 | (convert_mult_to_fma): Ditto. | |
28231 | (math_opts_dom_walker::after_dom_children): Ditto. | |
28232 | ||
28233 | 2023-07-13 Pan Li <pan2.li@intel.com> | |
28234 | ||
28235 | * config/riscv/riscv.cc (vxrm_rtx): New static var. | |
28236 | (frm_rtx): Ditto. | |
28237 | (global_state_unknown_p): Removed. | |
28238 | (riscv_entity_mode_after): Removed. | |
28239 | (asm_insn_p): New function. | |
28240 | (vxrm_unknown_p): New function for fixed-point. | |
28241 | (riscv_vxrm_mode_after): Ditto. | |
28242 | (frm_unknown_dynamic_p): New function for floating-point. | |
28243 | (riscv_frm_mode_after): Ditto. | |
28244 | (riscv_mode_after): Leverage new functions. | |
28245 | ||
28246 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28247 | ||
28248 | * tree-vect-stmts.cc (vect_model_load_cost): Remove. | |
28249 | (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without | |
28250 | calling vect_model_load_cost. | |
28251 | ||
28252 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28253 | ||
28254 | * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only | |
28255 | handle memory_access_type VMAT_CONTIGUOUS, remove some | |
28256 | VMAT_CONTIGUOUS_PERMUTE related handlings. | |
28257 | (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE | |
28258 | without calling vect_model_load_cost. | |
28259 | ||
28260 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28261 | ||
28262 | * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get | |
28263 | VMAT_CONTIGUOUS_REVERSE any more. | |
28264 | (vectorizable_load): Adjust the costing handling on | |
28265 | VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost. | |
28266 | ||
28267 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28268 | ||
28269 | * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on | |
28270 | VMAT_LOAD_STORE_LANES without calling vect_model_load_cost. | |
28271 | (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and | |
28272 | assert it will never get VMAT_LOAD_STORE_LANES. | |
28273 | ||
28274 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28275 | ||
28276 | * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on | |
28277 | VMAT_GATHER_SCATTER without calling vect_model_load_cost. | |
28278 | (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER, | |
28279 | remove VMAT_GATHER_SCATTER related handlings and the related parameter | |
28280 | gs_info. | |
28281 | ||
28282 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28283 | ||
28284 | * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling | |
28285 | on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling | |
28286 | vect_model_load_cost. | |
28287 | (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and | |
28288 | VMAT_STRIDED_SLP any more, and remove their related handlings. | |
28289 | ||
28290 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28291 | ||
28292 | * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P. | |
28293 | (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect | |
28294 | hoisting decision and without calling vect_model_load_cost. | |
28295 | (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more | |
28296 | and remove VMAT_INVARIANT related handlings. | |
28297 | ||
28298 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28299 | ||
28300 | * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings | |
28301 | on costing with one extra argument cost_vec. | |
28302 | (vectorizable_load): Adjust the call to vect_build_gather_load_calls. | |
28303 | (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with | |
28304 | gs_info.decl set any more. | |
28305 | ||
28306 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28307 | ||
28308 | * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call | |
28309 | to vect_model_load_cost down to some different transform paths | |
28310 | according to the handlings of different vect_memory_access_types. | |
28311 | ||
28312 | 2023-07-13 Kewen Lin <linkw@linux.ibm.com> | |
28313 | ||
28314 | * tree.h (wi::from_mpz): Hide from GENERATOR_FILE. | |
28315 | ||
28316 | 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28317 | ||
28318 | * config/riscv/autovec.md | |
28319 | (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern. | |
28320 | (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto. | |
28321 | (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto. | |
28322 | (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto. | |
28323 | (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto. | |
28324 | (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto. | |
28325 | (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto. | |
28326 | (len_mask_gather_load<mode><mode>): Ditto. | |
28327 | (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto. | |
28328 | (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto. | |
28329 | (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto. | |
28330 | (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto. | |
28331 | (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto. | |
28332 | (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto. | |
28333 | (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto. | |
28334 | (len_mask_scatter_store<mode><mode>): Ditto. | |
28335 | * config/riscv/predicates.md (const_1_operand): New predicate. | |
28336 | (vector_gs_scale_operand_16): Ditto. | |
28337 | (vector_gs_scale_operand_32): Ditto. | |
28338 | (vector_gs_scale_operand_64): Ditto. | |
28339 | (vector_gs_extension_operand): Ditto. | |
28340 | (vector_gs_scale_operand_16_rv32): Ditto. | |
28341 | (vector_gs_scale_operand_32_rv32): Ditto. | |
28342 | * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter. | |
28343 | (expand_gather_scatter): New function. | |
28344 | * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter. | |
28345 | (emit_vlmax_masked_store_insn): New function. | |
28346 | (emit_nonvlmax_masked_store_insn): Ditto. | |
28347 | (modulo_sel_indices): Ditto. | |
28348 | (expand_vec_perm): Fix SLP for gather/scatter. | |
28349 | (prepare_gather_scatter): New function. | |
28350 | (expand_gather_scatter): Ditto. | |
28351 | * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of | |
28352 | (subreg:SI (DI CONST_POLY_INT)). | |
28353 | * config/riscv/vector-iterators.md: Add gather/scatter. | |
28354 | * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead. | |
28355 | (@vec_duplicate<mode>): Ditto. | |
28356 | (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): | |
28357 | Fix name. | |
28358 | (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto. | |
28359 | ||
28360 | 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
28361 | ||
28362 | * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern. | |
28363 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
28364 | (expand_cond_len_binop): New function. | |
28365 | * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto. | |
28366 | (emit_nonvlmax_fp_tu_insn): Ditto. | |
28367 | (need_fp_rounding_p): Ditto. | |
28368 | (expand_cond_len_binop): Ditto. | |
28369 | * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto. | |
28370 | (TARGET_PREFERRED_ELSE_VALUE): New target hook. | |
28371 | ||
28372 | 2023-07-12 Jan Hubicka <jh@suse.cz> | |
28373 | ||
28374 | * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ... | |
28375 | (gimple_duplicate_seme_region): ... this; break out profile updating | |
28376 | code to ... | |
28377 | * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here. | |
28378 | (ch_base::copy_headers): Update. | |
28379 | * tree-cfg.h (gimple_duplicate_sese_region): Rename to ... | |
28380 | (gimple_duplicate_seme_region): ... this. | |
28381 | ||
28382 | 2023-07-12 Aldy Hernandez <aldyh@redhat.com> | |
28383 | ||
28384 | PR tree-optimization/107043 | |
28385 | * range-op.cc (operator_bitwise_and::op1_range): Update bitmask. | |
28386 | ||
28387 | 2023-07-12 Aldy Hernandez <aldyh@redhat.com> | |
28388 | ||
28389 | PR tree-optimization/107053 | |
28390 | * gimple-range-op.cc (cfn_popcount): Use known set bits. | |
28391 | ||
28392 | 2023-07-12 Uros Bizjak <ubizjak@gmail.com> | |
28393 | ||
28394 | * ira.cc (equiv_init_varies_p): Change return type from int to bool | |
28395 | and adjust function body accordingly. | |
28396 | (equiv_init_movable_p): Ditto. | |
28397 | (memref_used_between_p): Ditto. | |
28398 | * lra-constraints.cc (valid_address_p): Ditto. | |
28399 | ||
28400 | 2023-07-12 Aldy Hernandez <aldyh@redhat.com> | |
28401 | ||
28402 | * range-op.cc (irange_to_masked_value): Remove. | |
28403 | (update_known_bitmask): Update irange value/mask pair instead of | |
28404 | only updating nonzero bits. | |
28405 | ||
28406 | 2023-07-12 Jan Hubicka <jh@suse.cz> | |
28407 | ||
28408 | * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES | |
28409 | parameter and rewrite profile updating code to handle edges elimination. | |
28410 | * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe. | |
28411 | * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function. | |
28412 | (loop_iv_derived_p): New function. | |
28413 | (should_duplicate_loop_header_p): Track invariant exit edges; fix handling | |
28414 | of PHIs and propagation of IV derived variables. | |
28415 | (ch_base::copy_headers): Pass around the invariant edges hash set. | |
28416 | ||
28417 | 2023-07-12 Uros Bizjak <ubizjak@gmail.com> | |
28418 | ||
28419 | * ifcvt.cc (cond_exec_changed_p): Change variable to bool. | |
28420 | (last_active_insn): Change "skip_use_p" function argument to bool. | |
28421 | (noce_operand_ok): Change return type from int to bool. | |
28422 | (find_cond_trap): Ditto. | |
28423 | (block_jumps_and_fallthru_p): Change "fallthru_p" and | |
28424 | "jump_p" variables to bool. | |
28425 | (noce_find_if_block): Change return type from int to bool. | |
28426 | (cond_exec_find_if_block): Ditto. | |
28427 | (find_if_case_1): Ditto. | |
28428 | (find_if_case_2): Ditto. | |
28429 | (dead_or_predicable): Ditto. Change "reversep" function arg to bool. | |
28430 | (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p. | |
28431 | (cond_exec_process_insns): Change return type from int to bool. | |
28432 | Change "mod_ok" function arg to bool. | |
28433 | (cond_exec_process_if_block): Change return type from int to bool. | |
28434 | Change "do_multiple_p" function arg to bool. Change "then_mod_ok" | |
28435 | variable to bool. | |
28436 | (noce_emit_store_flag): Change return type from int to bool. | |
28437 | Change "reversep" function arg to bool. Change "cond_complex" | |
28438 | variable to bool. | |
28439 | (noce_try_move): Change return type from int to bool. | |
28440 | (noce_try_ifelse_collapse): Ditto. | |
28441 | (noce_try_store_flag): Ditto. Change "reversep" variable to bool. | |
28442 | (noce_try_addcc): Change return type from int to bool. Change | |
28443 | "subtract" variable to bool. | |
28444 | (noce_try_store_flag_constants): Change return type from int to bool. | |
28445 | (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool. | |
28446 | (noce_try_cmove): Change return type from int to bool. | |
28447 | (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool. | |
28448 | (noce_try_minmax): Change return type from int to bool. Change | |
28449 | "unsignedp" variable to bool. | |
28450 | (noce_try_abs): Change return type from int to bool. Change | |
28451 | "negate" variable to bool. | |
28452 | (noce_try_sign_mask): Change return type from int to bool. | |
28453 | (noce_try_move): Ditto. | |
28454 | (noce_try_store_flag_constants): Ditto. | |
28455 | (noce_try_cmove): Ditto. | |
28456 | (noce_try_cmove_arith): Ditto. | |
28457 | (noce_try_minmax): Ditto. Change "unsignedp" variable to bool. | |
28458 | (noce_try_bitop): Change return type from int to bool. | |
28459 | (noce_operand_ok): Ditto. | |
28460 | (noce_convert_multiple_sets): Ditto. | |
28461 | (noce_convert_multiple_sets_1): Ditto. | |
28462 | (noce_process_if_block): Ditto. | |
28463 | (check_cond_move_block): Ditto. | |
28464 | (cond_move_process_if_block): Ditto. Change "success_p" | |
28465 | variable to bool. | |
28466 | (rest_of_handle_if_conversion): Change return type to void. | |
28467 | ||
28468 | 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28469 | ||
28470 | * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support. | |
28471 | (CASE): Ditto. | |
28472 | (get_conditional_len_internal_fn): New function. | |
28473 | * internal-fn.h (get_conditional_len_internal_fn): Ditto. | |
28474 | * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_* | |
28475 | support. | |
28476 | ||
28477 | 2023-07-12 Roger Sayle <roger@nextmovesoftware.com> | |
28478 | ||
28479 | PR target/91681 | |
28480 | * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo. | |
28481 | ||
28482 | 2023-07-12 Roger Sayle <roger@nextmovesoftware.com> | |
28483 | ||
28484 | PR target/91681 | |
28485 | * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New | |
28486 | define_insn_and_split derived from *add<dwi>3_doubleword_concat | |
28487 | and *add<dwi>3_doubleword_zext. | |
28488 | ||
28489 | 2023-07-12 Roger Sayle <roger@nextmovesoftware.com> | |
28490 | ||
28491 | PR target/110598 | |
28492 | * config/i386/i386.md (peephole2): Check !reg_mentioned_p when | |
28493 | optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS]. | |
28494 | (peephole2): Simplify rega = 0; rega op= rega cases. | |
28495 | ||
28496 | 2023-07-12 Roger Sayle <roger@nextmovesoftware.com> | |
28497 | ||
28498 | * config/i386/i386-expand.cc (ix86_expand_int_compare): If | |
28499 | testing a TImode SUBREG of a 128-bit vector register against | |
28500 | zero, use a PTEST instruction instead of first moving it to | |
28501 | a pair of scalar registers. | |
28502 | ||
28503 | 2023-07-12 Robin Dapp <rdapp@ventanamicro.com> | |
28504 | ||
28505 | * genopinit.cc (main): Adjust maximal number of optabs and | |
28506 | machine modes. | |
28507 | * gensupport.cc (find_optab): Shift optab by 20 and mode by | |
28508 | 10 bits. | |
28509 | * optabs-query.h (optab_handler): Ditto. | |
28510 | (convert_optab_handler): Ditto. | |
28511 | ||
28512 | 2023-07-12 Richard Biener <rguenther@suse.de> | |
28513 | ||
28514 | PR tree-optimization/110630 | |
28515 | * tree-vect-slp.cc (vect_add_slp_permutation): New | |
28516 | offset parameter, honor that for the extract code generation. | |
28517 | (vectorizable_slp_permutation_1): Handle offsetted identities. | |
28518 | ||
28519 | 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28520 | ||
28521 | * config/riscv/autovec.md (smul<mode>3_highpart): New pattern. | |
28522 | (umul<mode>3_highpart): Ditto. | |
28523 | ||
28524 | 2023-07-12 Jan Beulich <jbeulich@suse.com> | |
28525 | ||
28526 | * config/i386/i386.md (extendbfsf2_1): Add new AVX512F | |
28527 | alternative. Adjust original last alternative's "prefix" | |
28528 | attribute to maybe_evex. | |
28529 | ||
28530 | 2023-07-12 Jan Beulich <jbeulich@suse.com> | |
28531 | ||
28532 | * config/i386/sse.md (vec_dupv4sf): Make first alternative use | |
28533 | vbroadcastss for AVX2. New AVX512F alternative. | |
28534 | (*vec_dupv4si): New AVX2 and AVX512F alternatives using | |
28535 | vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute. | |
28536 | ||
28537 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28538 | ||
28539 | * config/riscv/peephole.md: Remove XThead* peephole passes. | |
28540 | * config/riscv/thead.md: Include thead-peephole.md. | |
28541 | * config/riscv/thead-peephole.md: New file. | |
28542 | ||
28543 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28544 | ||
28545 | * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p): | |
28546 | New prototype. | |
28547 | (riscv_index_reg_class): Likewise. | |
28548 | * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function. | |
28549 | (riscv_index_reg_class): New function. | |
28550 | * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function | |
28551 | riscv_index_reg_class(). | |
28552 | (REGNO_OK_FOR_INDEX_P): Call new function | |
28553 | riscv_regno_ok_for_index_p(). | |
28554 | ||
28555 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28556 | ||
28557 | * config/riscv/riscv-protos.h (enum riscv_address_type): | |
28558 | New location of type definition. | |
28559 | (struct riscv_address_info): Likewise. | |
28560 | * config/riscv/riscv.cc (enum riscv_address_type): | |
28561 | Old location of type definition. | |
28562 | (struct riscv_address_info): Likewise. | |
28563 | ||
28564 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28565 | ||
28566 | * config/riscv/riscv.h (Xmode): New macro. | |
28567 | ||
28568 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28569 | ||
28570 | * config/riscv/riscv.cc (riscv_print_operand_address): Use | |
28571 | output_addr_const rather than riscv_print_operand. | |
28572 | ||
28573 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28574 | ||
28575 | * config/riscv/thead.md: Adjust constraints of th_addsl. | |
28576 | ||
28577 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28578 | ||
28579 | * config/riscv/thead.cc (th_mempair_operands_p): | |
28580 | Fix documentation of th_mempair_order_operands(). | |
28581 | ||
28582 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28583 | ||
28584 | * config/riscv/thead.cc (th_mempair_save_regs): | |
28585 | Emit REG_FRAME_RELATED_EXPR notes in prologue. | |
28586 | ||
28587 | 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu> | |
28588 | ||
28589 | * config/riscv/riscv.md: No base-ISA extension splitter for XThead*. | |
28590 | * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext): | |
28591 | New XThead extension INSN. | |
28592 | (*zero_extendsidi2_th_extu): New XThead extension INSN. | |
28593 | (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN. | |
28594 | ||
28595 | 2023-07-12 liuhongt <hongtao.liu@intel.com> | |
28596 | ||
28597 | PR target/110438 | |
28598 | PR target/110202 | |
28599 | * config/i386/predicates.md | |
28600 | (int_float_vector_all_ones_operand): New predicate. | |
28601 | * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New | |
28602 | define_insn. | |
28603 | (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep): | |
28604 | Ditto. | |
28605 | (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep): | |
28606 | Ditto. | |
28607 | (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to | |
28608 | define_insn_and_split to avoid false dependence. | |
28609 | (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto. | |
28610 | (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint | |
28611 | of operands 1 to '0' to avoid false dependence. | |
28612 | (*andnot<mode>3): Ditto. | |
28613 | (iornot<mode>3): Ditto. | |
28614 | (*<nlogic><mode>3): Ditto. | |
28615 | ||
28616 | 2023-07-12 Mo, Zewei <zewei.mo@intel.com> | |
28617 | ||
28618 | * common/config/i386/cpuinfo.h | |
28619 | (get_intel_cpu): Handle Granite Rapids D. | |
28620 | * common/config/i386/i386-common.cc: | |
28621 | (processor_alias_table): Add graniterapids-d. | |
28622 | * common/config/i386/i386-cpuinfo.h | |
28623 | (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D. | |
28624 | * config.gcc: Add -march=graniterapids-d. | |
28625 | * config/i386/driver-i386.cc (host_detect_local_cpu): | |
28626 | Handle graniterapids-d. | |
28627 | * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New. | |
28628 | * doc/extend.texi: Add graniterapids-d. | |
28629 | * doc/invoke.texi: Ditto. | |
28630 | ||
28631 | 2023-07-12 Haochen Jiang <haochen.jiang@intel.com> | |
28632 | ||
28633 | * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): | |
28634 | Add OPTION_MASK_ISA_AVX512VL. | |
28635 | * config/i386/i386-expand.cc (ix86_check_builtin_isa_match): | |
28636 | Ditto. | |
28637 | ||
28638 | 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28639 | ||
28640 | * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization. | |
28641 | * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto. | |
28642 | (shuffle_compress_patterns): Ditto. | |
28643 | (expand_vec_perm_const_1): Ditto. | |
28644 | ||
28645 | 2023-07-11 Uros Bizjak <ubizjak@gmail.com> | |
28646 | ||
28647 | * cfghooks.cc (verify_flow_info): Change "err" variable to bool. | |
28648 | * cfghooks.h (struct cfg_hooks): Change return type of | |
28649 | verify_flow_info from integer to bool. | |
28650 | * cfgrtl.cc (can_delete_note_p): Change return type from int to bool. | |
28651 | (can_delete_label_p): Ditto. | |
28652 | (rtl_verify_flow_info): Change return type from int to bool | |
28653 | and adjust function body accordingly. Change "err" variable to bool. | |
28654 | (rtl_verify_flow_info_1): Ditto. | |
28655 | (free_bb_for_insn): Change return type to void. | |
28656 | (rtl_merge_blocks): Change "b_empty" variable to bool. | |
28657 | (try_redirect_by_replacing_jump): Change "fallthru" variable to bool. | |
28658 | (verify_hot_cold_block_grouping): Change return type from int to bool. | |
28659 | Change "err" variable to bool. | |
28660 | (rtl_verify_edges): Ditto. | |
28661 | (rtl_verify_bb_insns): Ditto. | |
28662 | (rtl_verify_bb_pointers): Ditto. | |
28663 | (rtl_verify_bb_insn_chain): Ditto. | |
28664 | (rtl_verify_fallthru): Ditto. | |
28665 | (rtl_verify_bb_layout): Ditto. | |
28666 | (purge_all_dead_edges): Change "purged" variable to bool. | |
28667 | * cfgrtl.h (free_bb_for_insn): Change return type from int to void. | |
28668 | * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool. | |
28669 | (load_killed_in_block_p): Change return type from int to bool | |
28670 | and adjust function body accordingly. | |
28671 | (oprs_unchanged_p): Return true/false. | |
28672 | (rest_of_handle_gcse2): Change return type to void. | |
28673 | * tree-cfg.cc (gimple_verify_flow_info): Change return type from | |
28674 | int to bool. Change "err" variable to bool. | |
28675 | ||
28676 | 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com> | |
28677 | ||
28678 | * doc/gm2.texi (-Wuninit-variable-checking=) New item. | |
28679 | ||
28680 | 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28681 | ||
28682 | * doc/md.texi: Add COND_LEN_* operations for loop control with length. | |
28683 | * internal-fn.cc (cond_len_unary_direct): Ditto. | |
28684 | (cond_len_binary_direct): Ditto. | |
28685 | (cond_len_ternary_direct): Ditto. | |
28686 | (expand_cond_len_unary_optab_fn): Ditto. | |
28687 | (expand_cond_len_binary_optab_fn): Ditto. | |
28688 | (expand_cond_len_ternary_optab_fn): Ditto. | |
28689 | (direct_cond_len_unary_optab_supported_p): Ditto. | |
28690 | (direct_cond_len_binary_optab_supported_p): Ditto. | |
28691 | (direct_cond_len_ternary_optab_supported_p): Ditto. | |
28692 | * internal-fn.def (COND_LEN_ADD): Ditto. | |
28693 | (COND_LEN_SUB): Ditto. | |
28694 | (COND_LEN_MUL): Ditto. | |
28695 | (COND_LEN_DIV): Ditto. | |
28696 | (COND_LEN_MOD): Ditto. | |
28697 | (COND_LEN_RDIV): Ditto. | |
28698 | (COND_LEN_MIN): Ditto. | |
28699 | (COND_LEN_MAX): Ditto. | |
28700 | (COND_LEN_FMIN): Ditto. | |
28701 | (COND_LEN_FMAX): Ditto. | |
28702 | (COND_LEN_AND): Ditto. | |
28703 | (COND_LEN_IOR): Ditto. | |
28704 | (COND_LEN_XOR): Ditto. | |
28705 | (COND_LEN_SHL): Ditto. | |
28706 | (COND_LEN_SHR): Ditto. | |
28707 | (COND_LEN_FMA): Ditto. | |
28708 | (COND_LEN_FMS): Ditto. | |
28709 | (COND_LEN_FNMA): Ditto. | |
28710 | (COND_LEN_FNMS): Ditto. | |
28711 | (COND_LEN_NEG): Ditto. | |
28712 | * optabs.def (OPTAB_D): Ditto. | |
28713 | ||
28714 | 2023-07-11 Richard Biener <rguenther@suse.de> | |
28715 | ||
28716 | PR tree-optimization/110614 | |
28717 | * tree-vect-data-refs.cc (vect_supportable_dr_alignment): | |
28718 | SLP splats are not suitable for re-align ops. | |
28719 | ||
28720 | 2023-07-10 Peter Bergner <bergner@linux.ibm.com> | |
28721 | ||
28722 | * config/rs6000/predicates.md (quad_memory_operand): Remove redundant | |
28723 | MEM_P usage. | |
28724 | (vsx_quad_dform_memory_operand): Likewise. | |
28725 | ||
28726 | 2023-07-10 Uros Bizjak <ubizjak@gmail.com> | |
28727 | ||
28728 | * reorg.cc (stop_search_p): Change return type from int to bool | |
28729 | and adjust function body accordingly. | |
28730 | (resource_conflicts_p): Ditto. | |
28731 | (insn_references_resource_p): Change return type from int to bool. | |
28732 | (insn_sets_resource_p): Ditto. | |
28733 | (redirect_with_delay_slots_safe_p): Ditto. | |
28734 | (condition_dominates_p): Change return type from int to bool | |
28735 | and adjust function body accordingly. | |
28736 | (redirect_with_delay_list_safe_p): Ditto. | |
28737 | (check_annul_list_true_false): Ditto. Change "annul_true_p" | |
28738 | function argument to bool. | |
28739 | (steal_delay_list_from_target): Change "pannul_p" function | |
28740 | argument to bool pointer. Change "must_annul" and "used_annul" | |
28741 | variables from int to bool. | |
28742 | (steal_delay_list_from_fallthrough): Ditto. | |
28743 | (own_thread_p): Change return type from int to bool and adjust | |
28744 | function body accordingly. Change "allow_fallthrough" function | |
28745 | argument to bool. | |
28746 | (reorg_redirect_jump): Change return type from int to bool. | |
28747 | (fill_simple_delay_slots): Change "non_jumps_p" function | |
28748 | argument from int to bool. Change "maybe_never" varible to bool. | |
28749 | (fill_slots_from_thread): Change "likely", "thread_if_true" and | |
28750 | "own_thread" function arguments to bool. Change "lose" and | |
28751 | "must_annul" variables to bool. | |
28752 | (delete_from_delay_slot): Change "had_barrier" variable to bool. | |
28753 | (try_merge_delay_insns): Change "annul_p" variable to bool. | |
28754 | (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg" | |
28755 | variables to bool. | |
28756 | (rest_of_handle_delay_slots): Change return type from int to void | |
28757 | and adjust function body accordingly. | |
28758 | ||
28759 | 2023-07-10 Kito Cheng <kito.cheng@sifive.com> | |
28760 | ||
28761 | * doc/extend.texi (RISC-V Operand Modifiers): New. | |
28762 | ||
28763 | 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
28764 | ||
28765 | * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it. | |
28766 | (insert_insn_end_basic_block): Ditto. | |
28767 | (pass_vsetvl::commit_vsetvls): Adapt for new helper function. | |
28768 | * gcse.cc (insert_insn_end_basic_block): Export as global function. | |
28769 | * gcse.h (insert_insn_end_basic_block): Ditto. | |
28770 | ||
28771 | 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org> | |
28772 | ||
28773 | PR target/110268 | |
28774 | * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO. | |
28775 | (arm_builtin_decl): Hahndle MVE builtins. | |
28776 | * config/arm/arm-mve-builtins.cc (builtin_decl): New function. | |
28777 | (add_unique_function): Fix handling of | |
28778 | __ARM_MVE_PRESERVE_USER_NAMESPACE. | |
28779 | (add_overloaded_function): Likewise. | |
28780 | * config/arm/arm-protos.h (builtin_decl): New declaration. | |
28781 | ||
28782 | 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org> | |
28783 | ||
28784 | * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document. | |
28785 | ||
28786 | 2023-07-10 Xi Ruoyao <xry111@xry111.site> | |
28787 | ||
28788 | PR tree-optimization/110557 | |
28789 | * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): | |
28790 | Ensure the output sign-extended if necessary. | |
28791 | ||
28792 | 2023-07-10 Roger Sayle <roger@nextmovesoftware.com> | |
28793 | ||
28794 | * config/i386/i386.md (peephole2): Transform xchg insn with a | |
28795 | REG_UNUSED note to a (simple) move. | |
28796 | (*insvti_lowpart_1): New define_insn_and_split. | |
28797 | (*insvdi_lowpart_1): Likewise. | |
28798 | ||
28799 | 2023-07-10 Roger Sayle <roger@nextmovesoftware.com> | |
28800 | ||
28801 | * config/i386/i386-features.cc (compute_convert_gain): Tweak | |
28802 | gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL. | |
28803 | (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate | |
28804 | avx512vl_rolv2di or avx412vl_rolv4si when appropriate. | |
28805 | ||
28806 | 2023-07-10 liuhongt <hongtao.liu@intel.com> | |
28807 | ||
28808 | PR target/110170 | |
28809 | * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload | |
28810 | splitter to detect fp max pattern. | |
28811 | (*ieee_min<mode>3_1): Ditto, but for fp min pattern. | |
28812 | ||
28813 | 2023-07-09 Jan Hubicka <jh@suse.cz> | |
28814 | ||
28815 | * cfg.cc (check_bb_profile): Dump counts with relative frequency. | |
28816 | (dump_edge_info): Likewise. | |
28817 | (dump_bb_info): Likewise. | |
28818 | * profile-count.cc (profile_count::dump): Add comma between quality and | |
28819 | freq. | |
28820 | ||
28821 | 2023-07-08 Jan Hubicka <jh@suse.cz> | |
28822 | ||
28823 | PR tree-optimization/110600 | |
28824 | * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check. | |
28825 | ||
28826 | 2023-07-08 Jan Hubicka <jh@suse.cz> | |
28827 | ||
28828 | PR middle-end/110590 | |
28829 | * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within | |
28830 | inner loops and be more careful about inconsistent profiles. | |
28831 | (duplicate_loop_body_to_header_edge): Fix profile update when eliminated | |
28832 | exit is followed by other exit. | |
28833 | ||
28834 | 2023-07-08 Uros Bizjak <ubizjak@gmail.com> | |
28835 | ||
28836 | * cprop.cc (reg_available_p): Change return type from int to bool. | |
28837 | (reg_not_set_p): Ditto. | |
28838 | (try_replace_reg): Ditto. Change "success" variable to bool. | |
28839 | (cprop_jump): Change return type from int to void | |
28840 | and adjust function body accordingly. | |
28841 | (constprop_register): Ditto. | |
28842 | (cprop_insn): Ditto. Change "changed" variable to bool. | |
28843 | (local_cprop_pass): Change return type from int to void | |
28844 | and adjust function body accordingly. | |
28845 | (bypass_block): Ditto. Change "change", "may_be_loop_header" | |
28846 | and "removed_p" variables to bool. | |
28847 | (bypass_conditional_jumps): Change return type from int to void | |
28848 | and adjust function body accordingly. Change "changed" | |
28849 | variable to bool. | |
28850 | (one_cprop_pass): Ditto. | |
28851 | ||
28852 | 2023-07-08 Uros Bizjak <ubizjak@gmail.com> | |
28853 | ||
28854 | * gcse.cc (expr_equiv_p): Change return type from int to bool. | |
28855 | (oprs_unchanged_p): Change return type from int to void | |
28856 | and adjust function body accordingly. | |
28857 | (oprs_anticipatable_p): Ditto. | |
28858 | (oprs_available_p): Ditto. | |
28859 | (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p" | |
28860 | arguments to bool. Change "found" variable to bool. | |
28861 | (load_killed_in_block_p): Change return type from int to void and | |
28862 | adjust function body accordingly. Change "avail_p" argument to bool. | |
28863 | (pre_expr_reaches_here_p): Change return type from int to void | |
28864 | and adjust function body accordingly. | |
28865 | (pre_delete): Ditto. Change "changed" variable to bool. | |
28866 | (pre_gcse): Change return type from int to void | |
28867 | and adjust function body accordingly. Change "did_insert" and | |
28868 | "changed" variables to bool. | |
28869 | (one_pre_gcse_pass): Change return type from int to void | |
28870 | and adjust function body accordingly. Change "changed" variable | |
28871 | to bool. | |
28872 | (should_hoist_expr_to_dom): Change return type from int to void | |
28873 | and adjust function body accordingly. Change | |
28874 | "visited_allocated_locally" variable to bool. | |
28875 | (hoist_code): Change return type from int to void and adjust | |
28876 | function body accordingly. Change "changed" variable to bool. | |
28877 | (one_code_hoisting_pass): Ditto. | |
28878 | (pre_edge_insert): Change return type from int to void and adjust | |
28879 | function body accordingly. Change "did_insert" variable to bool. | |
28880 | (pre_expr_reaches_here_p_work): Change return type from int to void | |
28881 | and adjust function body accordingly. | |
28882 | (simple_mem): Ditto. | |
28883 | (want_to_gcse_p): Change return type from int to void | |
28884 | and adjust function body accordingly. | |
28885 | (can_assign_to_reg_without_clobbers_p): Update function body | |
28886 | for bool return type. | |
28887 | (hash_scan_set): Change "antic_p" and "avail_p" variables to bool. | |
28888 | (pre_insert_copies): Change "added_copy" variable to bool. | |
28889 | ||
28890 | 2023-07-08 Jonathan Wakely <jwakely@redhat.com> | |
28891 | ||
28892 | PR c++/110595 | |
28893 | PR c++/110596 | |
28894 | * doc/invoke.texi (Warning Options): Fix typos. | |
28895 | ||
28896 | 2023-07-07 Jan Hubicka <jh@suse.cz> | |
28897 | ||
28898 | * profile-count.cc (profile_count::dump): Add FUN | |
28899 | parameter; print relative frequency. | |
28900 | (profile_count::debug): Update. | |
28901 | * profile-count.h (profile_count::dump): Update | |
28902 | prototype. | |
28903 | ||
28904 | 2023-07-07 Roger Sayle <roger@nextmovesoftware.com> | |
28905 | ||
28906 | PR target/43644 | |
28907 | PR target/110533 | |
28908 | * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of | |
28909 | TImode destinations from paradoxical SUBREGs (setting the lowpart) | |
28910 | into explicit zero extensions. Use *insvti_highpart_1 instruction | |
28911 | to set the highpart of a TImode destination. | |
28912 | ||
28913 | 2023-07-07 Jan Hubicka <jh@suse.cz> | |
28914 | ||
28915 | * predict.cc (force_edge_cold): Use | |
28916 | set_edge_probability_and_rescale_others; improve dumps. | |
28917 | ||
28918 | 2023-07-07 Jan Hubicka <jh@suse.cz> | |
28919 | ||
28920 | * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks | |
28921 | after exit. | |
28922 | * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound | |
28923 | is known. | |
28924 | ||
28925 | 2023-07-07 Juergen Christ <jchrist@linux.ibm.com> | |
28926 | ||
28927 | * config/s390/s390.cc (vec_init): Fix default case | |
28928 | ||
28929 | 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com> | |
28930 | ||
28931 | * lra-assigns.cc (assign_by_spills): Add reload insns involving | |
28932 | reload pseudos with non-refined class to be processed on the next | |
28933 | sub-pass. | |
28934 | * lra-constraints.cc (enough_allocatable_hard_regs_p): New func. | |
28935 | (in_class_p): Use it. | |
28936 | (print_curr_insn_alt): New func. | |
28937 | (process_alt_operands): Use it. Improve debug info. | |
28938 | (curr_insn_transform): Use print_curr_insn_alt. Refine reload | |
28939 | pseudo class if it is not refined yet. | |
28940 | ||
28941 | 2023-07-07 Aldy Hernandez <aldyh@redhat.com> | |
28942 | ||
28943 | * value-range.cc (irange::get_bitmask_from_range): Return all the | |
28944 | known bits for a singleton. | |
28945 | (irange::set_range_from_bitmask): Set a range of a singleton when | |
28946 | all bits are known. | |
28947 | ||
28948 | 2023-07-07 Aldy Hernandez <aldyh@redhat.com> | |
28949 | ||
28950 | * value-range.cc (irange::intersect): Leave normalization to | |
28951 | caller. | |
28952 | ||
28953 | 2023-07-07 Aldy Hernandez <aldyh@redhat.com> | |
28954 | ||
28955 | * data-streamer-in.cc (streamer_read_value_range): Adjust for | |
28956 | value/mask. | |
28957 | * data-streamer-out.cc (streamer_write_vrange): Same. | |
28958 | * range-op.cc (operator_cast::fold_range): Same. | |
28959 | * value-range-pretty-print.cc | |
28960 | (vrange_printer::print_irange_bitmasks): Same. | |
28961 | * value-range-storage.cc (irange_storage::write_lengths_address): | |
28962 | Same. | |
28963 | (irange_storage::set_irange): Same. | |
28964 | (irange_storage::get_irange): Same. | |
28965 | (irange_storage::size): Same. | |
28966 | (irange_storage::dump): Same. | |
28967 | * value-range-storage.h: Same. | |
28968 | * value-range.cc (debug): New. | |
28969 | (irange_bitmask::dump): New. | |
28970 | (add_vrange): Adjust for value/mask. | |
28971 | (irange::operator=): Same. | |
28972 | (irange::set): Same. | |
28973 | (irange::verify_range): Same. | |
28974 | (irange::operator==): Same. | |
28975 | (irange::contains_p): Same. | |
28976 | (irange::irange_single_pair_union): Same. | |
28977 | (irange::union_): Same. | |
28978 | (irange::intersect): Same. | |
28979 | (irange::invert): Same. | |
28980 | (irange::get_nonzero_bits_from_range): Rename to... | |
28981 | (irange::get_bitmask_from_range): ...this. | |
28982 | (irange::set_range_from_nonzero_bits): Rename to... | |
28983 | (irange::set_range_from_bitmask): ...this. | |
28984 | (irange::set_nonzero_bits): Rename to... | |
28985 | (irange::update_bitmask): ...this. | |
28986 | (irange::get_nonzero_bits): Rename to... | |
28987 | (irange::get_bitmask): ...this. | |
28988 | (irange::intersect_nonzero_bits): Rename to... | |
28989 | (irange::intersect_bitmask): ...this. | |
28990 | (irange::union_nonzero_bits): Rename to... | |
28991 | (irange::union_bitmask): ...this. | |
28992 | (irange_bitmask::verify_mask): New. | |
28993 | * value-range.h (class irange_bitmask): New. | |
28994 | (irange_bitmask::set_unknown): New. | |
28995 | (irange_bitmask::unknown_p): New. | |
28996 | (irange_bitmask::irange_bitmask): New. | |
28997 | (irange_bitmask::get_precision): New. | |
28998 | (irange_bitmask::get_nonzero_bits): New. | |
28999 | (irange_bitmask::set_nonzero_bits): New. | |
29000 | (irange_bitmask::operator==): New. | |
29001 | (irange_bitmask::union_): New. | |
29002 | (irange_bitmask::intersect): New. | |
29003 | (class irange): Friend vrange_printer. | |
29004 | (irange::varying_compatible_p): Adjust for bitmask. | |
29005 | (irange::set_varying): Same. | |
29006 | (irange::set_nonzero): Same. | |
29007 | ||
29008 | 2023-07-07 Jan Beulich <jbeulich@suse.com> | |
29009 | ||
29010 | * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers. | |
29011 | ||
29012 | 2023-07-07 Jan Beulich <jbeulich@suse.com> | |
29013 | ||
29014 | * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last | |
29015 | alternative. Switch new last alternative's "isa" attribute to | |
29016 | "avx512vl". | |
29017 | (vec_extract_hi_v32qi): Likewise. | |
29018 | ||
29019 | 2023-07-07 Pan Li <pan2.li@intel.com> | |
29020 | Robin Dapp <rdapp@ventanamicro.com> | |
29021 | ||
29022 | * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn | |
29023 | when FRM_MODE_DYN. | |
29024 | (riscv_mode_entry): Take FRM_MODE_DYN as entry mode. | |
29025 | (riscv_mode_exit): Likewise for exit mode. | |
29026 | (riscv_mode_needed): Likewise for needed mode. | |
29027 | (riscv_mode_after): Likewise for after mode. | |
29028 | ||
29029 | 2023-07-07 Pan Li <pan2.li@intel.com> | |
29030 | ||
29031 | * config/riscv/vector.md: Fix typo. | |
29032 | ||
29033 | 2023-07-06 Jan Hubicka <jh@suse.cz> | |
29034 | ||
29035 | PR middle-end/25623 | |
29036 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number | |
29037 | of iterations determined. | |
29038 | * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise. | |
29039 | ||
29040 | 2023-07-06 Jan Hubicka <jh@suse.cz> | |
29041 | ||
29042 | * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge | |
29043 | probability update to be safe on loops with subloops. | |
29044 | Make bound parameter to be iteration bound. | |
29045 | * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call | |
29046 | of scale_loop_profile. | |
29047 | * tree-vect-loop-manip.cc (vect_do_peeling): Likewise. | |
29048 | ||
29049 | 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com> | |
29050 | ||
29051 | PR tree-optimization/110449 | |
29052 | * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace | |
29053 | vec_loop for the unrolled loop. | |
29054 | ||
29055 | 2023-07-06 Jan Hubicka <jh@suse.cz> | |
29056 | ||
29057 | * cfg.cc (set_edge_probability_and_rescale_others): New function. | |
29058 | (update_bb_profile_for_threading): Use it; simplify the rest. | |
29059 | * cfg.h (set_edge_probability_and_rescale_others): Declare. | |
29060 | * profile-count.h (profile_probability::apply_scale): New. | |
29061 | ||
29062 | 2023-07-06 Claudiu Zissulescu <claziss@gmail.com> | |
29063 | ||
29064 | * doc/extend.texi (ARC Built-in Functions): Update documentation | |
29065 | with missing builtins. | |
29066 | ||
29067 | 2023-07-06 Richard Biener <rguenther@suse.de> | |
29068 | ||
29069 | PR tree-optimization/110556 | |
29070 | * tree-ssa-tail-merge.cc (gimple_equal_p): Check | |
29071 | assign code and all operands of non-stores. | |
29072 | ||
29073 | 2023-07-06 Richard Biener <rguenther@suse.de> | |
29074 | ||
29075 | PR tree-optimization/110563 | |
29076 | * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling): | |
29077 | Remove second argument. | |
29078 | * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling): | |
29079 | Remove for_epilogue_p argument. Merge assert ... | |
29080 | (vect_analyze_loop_2): ... with check done before determining | |
29081 | partial vectors by moving it after. | |
29082 | * tree-vect-loop-manip.cc (vect_do_peeling): Adjust. | |
29083 | ||
29084 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29085 | ||
29086 | * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a | |
29087 | few things re 'reorder' option and strings. | |
29088 | * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'. | |
29089 | ||
29090 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29091 | ||
29092 | * gengtype-parse.cc: Clean up obsolete parametrized structs | |
29093 | remnants. | |
29094 | * gengtype.cc: Likewise. | |
29095 | * gengtype.h: Likewise. | |
29096 | ||
29097 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29098 | ||
29099 | * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'. | |
29100 | Adjust all users. | |
29101 | ||
29102 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29103 | ||
29104 | * gengtype-parse.cc (token_names): Add '"user"'. | |
29105 | * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with | |
29106 | 'FIRST_TOKEN_WITH_VALUE'. | |
29107 | ||
29108 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29109 | ||
29110 | * doc/gty.texi (GTY Options) <string_length>: Enhance. | |
29111 | ||
29112 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29113 | ||
29114 | * gengtype.cc (write_root, write_roots): Explicitly reject | |
29115 | 'string_length' option. | |
29116 | * doc/gty.texi (GTY Options) <string_length>: Document. | |
29117 | ||
29118 | 2023-07-06 Thomas Schwinge <thomas@codesourcery.com> | |
29119 | ||
29120 | * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object) | |
29121 | (ggc_pch_write_object): Remove 'bool is_string' argument. | |
29122 | * ggc-common.cc: Adjust. | |
29123 | * ggc-page.cc: Likewise. | |
29124 | ||
29125 | 2023-07-06 Roger Sayle <roger@nextmovesoftware.com> | |
29126 | ||
29127 | * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN. | |
29128 | ||
29129 | 2023-07-06 Hongyu Wang <hongyu.wang@intel.com> | |
29130 | ||
29131 | * doc/extend.texi: Move x86 inlining rule to a new subsubsection | |
29132 | and add description for inling of function with arch and tune | |
29133 | attributes. | |
29134 | ||
29135 | 2023-07-06 Richard Biener <rguenther@suse.de> | |
29136 | ||
29137 | PR tree-optimization/110515 | |
29138 | * tree-ssa-pre.cc (compute_avail): Make code dealing | |
29139 | with hoisting loads with different alias-sets more | |
29140 | robust. | |
29141 | ||
29142 | 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
29143 | ||
29144 | * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE. | |
29145 | ||
29146 | 2023-07-06 Hongyu Wang <hongyu.wang@intel.com> | |
29147 | ||
29148 | * config/i386/i386.cc (ix86_can_inline_p): If callee has | |
29149 | default arch=x86-64 and tune=generic, do not block the | |
29150 | inlining to its caller. Also allow callee with different | |
29151 | arch= to be inlined if it has always_inline attribute and | |
29152 | it's ISA is subset of caller's. | |
29153 | ||
29154 | 2023-07-06 liuhongt <hongtao.liu@intel.com> | |
29155 | ||
29156 | * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for | |
29157 | DF/SFmode AND/IOR/XOR/ANDN operations. | |
29158 | ||
29159 | 2023-07-06 Andrew Pinski <apinski@marvell.com> | |
29160 | ||
29161 | PR middle-end/110554 | |
29162 | * tree-vect-generic.cc (expand_vector_condition): For comparisons, | |
29163 | just build using boolean_type_node instead of the cond_type. | |
29164 | For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple | |
29165 | that will feed into the COND_EXPR. | |
29166 | ||
29167 | 2023-07-06 liuhongt <hongtao.liu@intel.com> | |
29168 | ||
29169 | PR target/110170 | |
29170 | * config/i386/i386.md (movdf_internal): Disparage slightly for | |
29171 | 2 alternatives (r,v) and (v,r) by adding constraint modifier | |
29172 | '?'. | |
29173 | ||
29174 | 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com> | |
29175 | ||
29176 | PR target/106907 | |
29177 | * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant | |
29178 | initialization of new_addr. | |
29179 | ||
29180 | 2023-07-06 Hao Liu <hliu@os.amperecomputing.com> | |
29181 | ||
29182 | PR tree-optimization/110474 | |
29183 | * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested | |
29184 | unroll factor while selecting the epilog vect loop VF. | |
29185 | ||
29186 | 2023-07-05 Andrew MacLeod <amacleod@redhat.com> | |
29187 | ||
29188 | * gimple-range-gori.cc (compute_operand_range): Convert to a tail | |
29189 | call. | |
29190 | ||
29191 | 2023-07-05 Andrew MacLeod <amacleod@redhat.com> | |
29192 | ||
29193 | * gimple-range-gori.cc (compute_operand_range): After calling | |
29194 | compute_operand2_range, recursively call self if needed. | |
29195 | (compute_operand2_range): Turn into a leaf function. | |
29196 | (gori_compute::compute_operand1_and_operand2_range): Finish | |
29197 | operand2 calculation. | |
29198 | * gimple-range-gori.h (compute_operand2_range): Remove name param. | |
29199 | ||
29200 | 2023-07-05 Andrew MacLeod <amacleod@redhat.com> | |
29201 | ||
29202 | * gimple-range-gori.cc (compute_operand_range): After calling | |
29203 | compute_operand1_range, recursively call self if needed. | |
29204 | (compute_operand1_range): Turn into a leaf function. | |
29205 | (gori_compute::compute_operand1_and_operand2_range): Finish | |
29206 | operand1 calculation. | |
29207 | * gimple-range-gori.h (compute_operand1_range): Remove name param. | |
29208 | ||
29209 | 2023-07-05 Andrew MacLeod <amacleod@redhat.com> | |
29210 | ||
29211 | * gimple-range-gori.cc (compute_operand_range): Check for | |
29212 | operand interdependence when both op1 and op2 are computed. | |
29213 | (compute_operand1_and_operand2_range): No checks required now. | |
29214 | ||
29215 | 2023-07-05 Andrew MacLeod <amacleod@redhat.com> | |
29216 | ||
29217 | * gimple-range-gori.cc (compute_operand_range): Check for | |
29218 | a relation between op1 and op2 and use that instead. | |
29219 | (compute_operand1_range): Don't look for a relation override. | |
29220 | (compute_operand2_range): Ditto. | |
29221 | ||
29222 | 2023-07-05 Jonathan Wakely <jwakely@redhat.com> | |
29223 | ||
29224 | * doc/contrib.texi (Contributors): Update my entry. | |
29225 | ||
29226 | 2023-07-05 Filip Kastl <filip.kastl@gmail.com> | |
29227 | ||
29228 | * value-prof.cc (gimple_mod_subtract_transform): Correct edge | |
29229 | prob calculation. | |
29230 | ||
29231 | 2023-07-05 Uros Bizjak <ubizjak@gmail.com> | |
29232 | ||
29233 | * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p, | |
29234 | scehdule_more_p and contributes_to_priority indirect frunction | |
29235 | type from int to bool. | |
29236 | (no_real_insns_p): Change return type from int to bool. | |
29237 | (contributes_to_priority): Ditto. | |
29238 | * haifa-sched.cc (no_real_insns_p): Change return type from | |
29239 | int to bool and adjust function body accordingly. | |
29240 | * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success" | |
29241 | variable type from int to bool. | |
29242 | (ps_insn_advance_column): Change return type from int to bool. | |
29243 | (ps_has_conflicts): Ditto. Change "has_conflicts" | |
29244 | variable type from int to bool. | |
29245 | * sched-deps.cc (deps_may_trap_p): Change return type from int to bool. | |
29246 | (conditions_mutex_p): Ditto. | |
29247 | * sched-ebb.cc (schedule_more_p): Ditto. | |
29248 | (ebb_contributes_to_priority): Change return type from | |
29249 | int to bool and adjust function body accordingly. | |
29250 | * sched-rgn.cc (is_cfg_nonregular): Ditto. | |
29251 | (check_live_1): Ditto. | |
29252 | (is_pfree): Ditto. | |
29253 | (find_conditional_protection): Ditto. | |
29254 | (is_conditionally_protected): Ditto. | |
29255 | (is_prisky): Ditto. | |
29256 | (is_exception_free): Ditto. | |
29257 | (haifa_find_rgns): Change "unreachable" and "too_large_failure" | |
29258 | variables from int to bool. | |
29259 | (extend_rgns): Change "rescan" variable from int to bool. | |
29260 | (check_live): Change return type from | |
29261 | int to bool and adjust function body accordingly. | |
29262 | (can_schedule_ready_p): Ditto. | |
29263 | (schedule_more_p): Ditto. | |
29264 | (contributes_to_priority): Ditto. | |
29265 | ||
29266 | 2023-07-05 Robin Dapp <rdapp@ventanamicro.com> | |
29267 | ||
29268 | * doc/md.texi: Document that vec_set and vec_extract must not | |
29269 | fail. | |
29270 | * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this... | |
29271 | (gimple_expand_vec_set_extract_expr): ...to this. | |
29272 | (gimple_expand_vec_exprs): Call renamed function. | |
29273 | * internal-fn.cc (vec_extract_direct): Add. | |
29274 | (expand_vec_extract_optab_fn): New function to expand | |
29275 | vec_extract optab. | |
29276 | (direct_vec_extract_optab_supported_p): Add. | |
29277 | * internal-fn.def (VEC_EXTRACT): Add. | |
29278 | * optabs.cc (can_vec_extract_var_idx_p): New function. | |
29279 | * optabs.h (can_vec_extract_var_idx_p): Declare. | |
29280 | ||
29281 | 2023-07-05 Robin Dapp <rdapp@ventanamicro.com> | |
29282 | ||
29283 | * config/riscv/autovec.md: Add gen_lowpart. | |
29284 | ||
29285 | 2023-07-05 Robin Dapp <rdapp@ventanamicro.com> | |
29286 | ||
29287 | * config/riscv/autovec.md: Allow register index operand. | |
29288 | ||
29289 | 2023-07-05 Pan Li <pan2.li@intel.com> | |
29290 | ||
29291 | * config/riscv/riscv-vector-builtins.cc | |
29292 | (function_expander::use_exact_insn): Use FRM_DYN instead of const0. | |
29293 | ||
29294 | 2023-07-05 Robin Dapp <rdapp@ventanamicro.com> | |
29295 | ||
29296 | * config/riscv/autovec.md: Use float_truncate. | |
29297 | ||
29298 | 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
29299 | ||
29300 | * internal-fn.cc (internal_fn_len_index): Apply | |
29301 | LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer. | |
29302 | (internal_fn_mask_index): Ditto. | |
29303 | * optabs-query.cc (supports_vec_gather_load_p): Ditto. | |
29304 | (supports_vec_scatter_store_p): Ditto. | |
29305 | * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto. | |
29306 | * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto. | |
29307 | * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto. | |
29308 | (vect_get_strided_load_store_ops): Ditto. | |
29309 | (vectorizable_store): Ditto. | |
29310 | (vectorizable_load): Ditto. | |
29311 | ||
29312 | 2023-07-05 Robin Dapp <rdapp@ventanamicro.com> | |
29313 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
29314 | ||
29315 | * simplify-rtx.cc (native_encode_rtx): Ditto. | |
29316 | (native_decode_vector_rtx): Ditto. | |
29317 | (simplify_const_vector_byte_offset): Ditto. | |
29318 | (simplify_const_vector_subreg): Ditto. | |
29319 | * tree.cc (build_truth_vector_type_for_mode): Ditto. | |
29320 | * varasm.cc (output_constant_pool_2): Ditto. | |
29321 | ||
29322 | 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com> | |
29323 | ||
29324 | * config/mips/mips.cc (mips_expand_block_move): don't expand for | |
29325 | r6 with -mno-unaligned-access option if one or both of src and | |
29326 | dest are unaligned. restruct: return directly if length is not const. | |
29327 | (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS. | |
29328 | ||
29329 | 2023-07-05 Jan Beulich <jbeulich@suse.com> | |
29330 | ||
29331 | PR target/100711 | |
29332 | * config/i386/sse.md: New splitters to simplify | |
29333 | not;vec_duplicate as a singular vpternlog. | |
29334 | (one_cmpl<mode>2): Allow broadcast for operand 1. | |
29335 | (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise. | |
29336 | ||
29337 | 2023-07-05 Jan Beulich <jbeulich@suse.com> | |
29338 | ||
29339 | PR target/100711 | |
29340 | * config/i386/sse.md: New splitters to simplify | |
29341 | not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}. | |
29342 | ||
29343 | 2023-07-05 Jan Beulich <jbeulich@suse.com> | |
29344 | ||
29345 | PR target/100711 | |
29346 | * config/i386/sse.md: Permit non-immediate operand 1 in AVX2 | |
29347 | form of splitter for PR target/100711. | |
29348 | ||
29349 | 2023-07-05 Richard Biener <rguenther@suse.de> | |
29350 | ||
29351 | PR middle-end/110541 | |
29352 | * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect | |
29353 | reality. | |
29354 | ||
29355 | 2023-07-05 Jan Beulich <jbeulich@suse.com> | |
29356 | ||
29357 | PR target/93768 | |
29358 | * config/i386/sse.md (*andnot<mode>3): Add new alternatives | |
29359 | for memory form operand 1. | |
29360 | ||
29361 | 2023-07-05 Jan Beulich <jbeulich@suse.com> | |
29362 | ||
29363 | PR target/93768 | |
29364 | * config/i386/i386.cc (ix86_rtx_costs): Further special-case | |
29365 | bitwise vector operations. | |
29366 | * config/i386/sse.md (*iornot<mode>3): New insn. | |
29367 | (*xnor<mode>3): Likewise. | |
29368 | (*<nlogic><mode>3): Likewise. | |
29369 | (andor): New code iterator. | |
29370 | (nlogic): New code attribute. | |
29371 | (ternlog_nlogic): Likewise. | |
29372 | ||
29373 | 2023-07-05 Richard Biener <rguenther@suse.de> | |
29374 | ||
29375 | * tree-vect-stmts.cc (vect_mark_relevant): Fix typo. | |
29376 | ||
29377 | 2023-07-05 yulong <shiyulong@iscas.ac.cn> | |
29378 | ||
29379 | * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio. | |
29380 | ||
29381 | 2023-07-05 yulong <shiyulong@iscas.ac.cn> | |
29382 | ||
29383 | * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple. | |
29384 | * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro. | |
29385 | (ADJUST_ALIGNMENT): Ditto. | |
29386 | (RVV_TUPLE_PARTIAL_MODES): Ditto. | |
29387 | (ADJUST_NUNITS): Ditto. | |
29388 | * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): | |
29389 | New types. | |
29390 | (vfloat16mf4x3_t): Ditto. | |
29391 | (vfloat16mf4x4_t): Ditto. | |
29392 | (vfloat16mf4x5_t): Ditto. | |
29393 | (vfloat16mf4x6_t): Ditto. | |
29394 | (vfloat16mf4x7_t): Ditto. | |
29395 | (vfloat16mf4x8_t): Ditto. | |
29396 | (vfloat16mf2x2_t): Ditto. | |
29397 | (vfloat16mf2x3_t): Ditto. | |
29398 | (vfloat16mf2x4_t): Ditto. | |
29399 | (vfloat16mf2x5_t): Ditto. | |
29400 | (vfloat16mf2x6_t): Ditto. | |
29401 | (vfloat16mf2x7_t): Ditto. | |
29402 | (vfloat16mf2x8_t): Ditto. | |
29403 | (vfloat16m1x2_t): Ditto. | |
29404 | (vfloat16m1x3_t): Ditto. | |
29405 | (vfloat16m1x4_t): Ditto. | |
29406 | (vfloat16m1x5_t): Ditto. | |
29407 | (vfloat16m1x6_t): Ditto. | |
29408 | (vfloat16m1x7_t): Ditto. | |
29409 | (vfloat16m1x8_t): Ditto. | |
29410 | (vfloat16m2x2_t): Ditto. | |
29411 | (vfloat16m2x3_t): Ditto. | |
29412 | (vfloat16m2x4_t): Ditto. | |
29413 | (vfloat16m4x2_t): Ditto. | |
29414 | * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro. | |
29415 | (vfloat16mf4x3_t): Ditto. | |
29416 | (vfloat16mf4x4_t): Ditto. | |
29417 | (vfloat16mf4x5_t): Ditto. | |
29418 | (vfloat16mf4x6_t): Ditto. | |
29419 | (vfloat16mf4x7_t): Ditto. | |
29420 | (vfloat16mf4x8_t): Ditto. | |
29421 | (vfloat16mf2x2_t): Ditto. | |
29422 | (vfloat16mf2x3_t): Ditto. | |
29423 | (vfloat16mf2x4_t): Ditto. | |
29424 | (vfloat16mf2x5_t): Ditto. | |
29425 | (vfloat16mf2x6_t): Ditto. | |
29426 | (vfloat16mf2x7_t): Ditto. | |
29427 | (vfloat16mf2x8_t): Ditto. | |
29428 | (vfloat16m1x2_t): Ditto. | |
29429 | (vfloat16m1x3_t): Ditto. | |
29430 | (vfloat16m1x4_t): Ditto. | |
29431 | (vfloat16m1x5_t): Ditto. | |
29432 | (vfloat16m1x6_t): Ditto. | |
29433 | (vfloat16m1x7_t): Ditto. | |
29434 | (vfloat16m1x8_t): Ditto. | |
29435 | (vfloat16m2x2_t): Ditto. | |
29436 | (vfloat16m2x3_t): Ditto. | |
29437 | (vfloat16m2x4_t): Ditto. | |
29438 | (vfloat16m4x2_t): Ditto. | |
29439 | * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New. | |
29440 | * config/riscv/riscv.md: New. | |
29441 | * config/riscv/vector-iterators.md: New. | |
29442 | ||
29443 | 2023-07-04 Andrew Pinski <apinski@marvell.com> | |
29444 | ||
29445 | PR tree-optimization/110487 | |
29446 | * match.pd (a !=/== CST1 ? CST2 : CST3): Always | |
29447 | build a nonstandard integer and use that. | |
29448 | ||
29449 | 2023-07-04 Andrew Pinski <apinski@marvell.com> | |
29450 | ||
29451 | * match.pd (a?-1:0): Cast type an integer type | |
29452 | rather the type before the negative. | |
29453 | (a?0:-1): Likewise. | |
29454 | ||
29455 | 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
29456 | ||
29457 | * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue): | |
29458 | Change to use HARD_REG_BIT and its macros. | |
29459 | * config/xtensa/xtensa.md | |
29460 | (peephole2: regmove elimination during DFmode input reload): | |
29461 | Likewise. | |
29462 | ||
29463 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29464 | ||
29465 | PR tree-optimization/110491 | |
29466 | * tree-ssa-phiopt.cc (match_simplify_replacement): Check | |
29467 | whether the PHI args are possibly undefined before folding | |
29468 | the COND_EXPR. | |
29469 | ||
29470 | 2023-07-04 Pan Li <pan2.li@intel.com> | |
29471 | Thomas Schwinge <thomas@codesourcery.com> | |
29472 | ||
29473 | * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode | |
29474 | bits for machine mode table. | |
29475 | * lto-streamer-out.cc (lto_write_mode_table): Stream out the | |
29476 | HOST machine mode bits. | |
29477 | * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits. | |
29478 | * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE | |
29479 | as the table size. | |
29480 | * tree-streamer.h (streamer_mode_table): Ditto. | |
29481 | (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE) | |
29482 | as the packing limit. | |
29483 | (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'. | |
29484 | ||
29485 | 2023-07-04 Thomas Schwinge <thomas@codesourcery.com> | |
29486 | ||
29487 | * lto-streamer.h (class lto_input_block): Capture | |
29488 | 'lto_file_decl_data *file_data' instead of just | |
29489 | 'unsigned char *mode_table'. | |
29490 | * ipa-devirt.cc (ipa_odr_read_section): Adjust. | |
29491 | * ipa-fnsummary.cc (inline_read_section): Likewise. | |
29492 | * ipa-icf.cc (sem_item_optimizer::read_section): Likewise. | |
29493 | * ipa-modref.cc (read_section): Likewise. | |
29494 | * ipa-prop.cc (ipa_prop_read_section, read_replacements_section): | |
29495 | Likewise. | |
29496 | * ipa-sra.cc (isra_read_summary_section): Likewise. | |
29497 | * lto-cgraph.cc (input_cgraph_opt_section): Likewise. | |
29498 | * lto-section-in.cc (lto_create_simple_input_block): Likewise. | |
29499 | * lto-streamer-in.cc (lto_read_body_or_constructor) | |
29500 | (lto_input_toplevel_asms): Likewise. | |
29501 | * tree-streamer.h (bp_unpack_machine_mode): Likewise. | |
29502 | ||
29503 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29504 | ||
29505 | * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs. | |
29506 | (empty_bb_or_one_feeding_into_p): Check for them. | |
29507 | * tree-ssa.h (gimple_uses_undefined_value_p): Remove. | |
29508 | * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise. | |
29509 | ||
29510 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29511 | ||
29512 | * tree-vect-loop.cc (vect_analyze_loop_costing): Remove | |
29513 | check guarding scalar_niter underflow. | |
29514 | ||
29515 | 2023-07-04 Hao Liu <hliu@os.amperecomputing.com> | |
29516 | ||
29517 | PR tree-optimization/110531 | |
29518 | * tree-vect-loop.cc (vect_analyze_loop_1): initialize | |
29519 | slp_done_for_suggested_uf to false. | |
29520 | ||
29521 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29522 | ||
29523 | PR tree-optimization/110228 | |
29524 | * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): | |
29525 | Mark SSA may-undefs. | |
29526 | (bb_no_side_effects_p): Check stmt uses for undefs. | |
29527 | ||
29528 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29529 | ||
29530 | PR tree-optimization/110436 | |
29531 | * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping, | |
29532 | force live but not relevant pattern stmts relevant. | |
29533 | ||
29534 | 2023-07-04 Lili Cui <lili.cui@intel.com> | |
29535 | ||
29536 | * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST. | |
29537 | * doc/invoke.texi: Update new isa to march=sierraforest and grandridge. | |
29538 | ||
29539 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29540 | ||
29541 | PR middle-end/110495 | |
29542 | * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs | |
29543 | since we do not set TREE_OVERFLOW on those since the | |
29544 | introduction of VL vectors. | |
29545 | * match.pd (x +- CST +- CST): For VECTOR_CST do not look | |
29546 | at TREE_OVERFLOW to determine validity of association. | |
29547 | ||
29548 | 2023-07-04 Richard Biener <rguenther@suse.de> | |
29549 | ||
29550 | PR tree-optimization/110310 | |
29551 | * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling): | |
29552 | Move costing part ... | |
29553 | (vect_analyze_loop_costing): ... here. Integrate better | |
29554 | estimate for epilogues from ... | |
29555 | (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling | |
29556 | with actual epilogue status. | |
29557 | * tree-vect-loop-manip.cc (vect_do_peeling): ... here and | |
29558 | avoid cancelling epilogue vectorization. | |
29559 | (vect_update_epilogue_niters): Remove. No longer update | |
29560 | epilogue LOOP_VINFO_NITERS. | |
29561 | ||
29562 | 2023-07-04 Pan Li <pan2.li@intel.com> | |
29563 | ||
29564 | Revert: | |
29565 | 2023-07-03 Pan Li <pan2.li@intel.com> | |
29566 | ||
29567 | * config/riscv/vector.md: Fix typo. | |
29568 | ||
29569 | 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
29570 | ||
29571 | * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store. | |
29572 | * internal-fn.cc (expand_scatter_store_optab_fn): Ditto. | |
29573 | (expand_gather_load_optab_fn): Ditto. | |
29574 | (internal_load_fn_p): Ditto. | |
29575 | (internal_store_fn_p): Ditto. | |
29576 | (internal_gather_scatter_fn_p): Ditto. | |
29577 | (internal_fn_len_index): Ditto. | |
29578 | (internal_fn_mask_index): Ditto. | |
29579 | (internal_fn_stored_value_index): Ditto. | |
29580 | * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto. | |
29581 | (LEN_MASK_SCATTER_STORE): Ditto. | |
29582 | * optabs.def (OPTAB_CD): Ditto. | |
29583 | ||
29584 | 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
29585 | ||
29586 | * config/riscv/riscv-vsetvl.cc | |
29587 | (vector_insn_info::parse_insn): Add early break. | |
29588 | ||
29589 | 2023-07-04 Hans-Peter Nilsson <hp@axis.com> | |
29590 | ||
29591 | * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove. | |
29592 | ("cris_swap_bits", "ctzsi2"): Use bitreverse instead. | |
29593 | ||
29594 | 2023-07-04 Hans-Peter Nilsson <hp@axis.com> | |
29595 | ||
29596 | * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE. | |
29597 | ||
29598 | 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu> | |
29599 | ||
29600 | * common/config/riscv/riscv-common.cc: Add support for zvbb, | |
29601 | zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn, | |
29602 | zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets. | |
29603 | * config/riscv/arch-canonicalize: Add canonicalization info for | |
29604 | zvkn, zvknc, zvkng, zvks, zvksc, zvksg. | |
29605 | * config/riscv/riscv-opts.h (MASK_ZVBB): New macro. | |
29606 | (MASK_ZVBC): Likewise. | |
29607 | (TARGET_ZVBB): Likewise. | |
29608 | (TARGET_ZVBC): Likewise. | |
29609 | (MASK_ZVKG): Likewise. | |
29610 | (MASK_ZVKNED): Likewise. | |
29611 | (MASK_ZVKNHA): Likewise. | |
29612 | (MASK_ZVKNHB): Likewise. | |
29613 | (MASK_ZVKSED): Likewise. | |
29614 | (MASK_ZVKSH): Likewise. | |
29615 | (MASK_ZVKN): Likewise. | |
29616 | (MASK_ZVKNC): Likewise. | |
29617 | (MASK_ZVKNG): Likewise. | |
29618 | (MASK_ZVKS): Likewise. | |
29619 | (MASK_ZVKSC): Likewise. | |
29620 | (MASK_ZVKSG): Likewise. | |
29621 | (MASK_ZVKT): Likewise. | |
29622 | (TARGET_ZVKG): Likewise. | |
29623 | (TARGET_ZVKNED): Likewise. | |
29624 | (TARGET_ZVKNHA): Likewise. | |
29625 | (TARGET_ZVKNHB): Likewise. | |
29626 | (TARGET_ZVKSED): Likewise. | |
29627 | (TARGET_ZVKSH): Likewise. | |
29628 | (TARGET_ZVKN): Likewise. | |
29629 | (TARGET_ZVKNC): Likewise. | |
29630 | (TARGET_ZVKNG): Likewise. | |
29631 | (TARGET_ZVKS): Likewise. | |
29632 | (TARGET_ZVKSC): Likewise. | |
29633 | (TARGET_ZVKSG): Likewise. | |
29634 | (TARGET_ZVKT): Likewise. | |
29635 | * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext. | |
29636 | ||
29637 | 2023-07-03 Andrew Pinski <apinski@marvell.com> | |
29638 | ||
29639 | PR middle-end/110510 | |
29640 | * except.h (struct eh_landing_pad_d): Add chain_next GTY. | |
29641 | ||
29642 | 2023-07-03 Iain Sandoe <iain@sandoe.co.uk> | |
29643 | ||
29644 | * config/darwin.h: Avoid duplicate multiply_defined specs on | |
29645 | earlier Darwin versions with shared libgcc. | |
29646 | ||
29647 | 2023-07-03 Uros Bizjak <ubizjak@gmail.com> | |
29648 | ||
29649 | * tree.h (tree_int_cst_equal): Change return type from int to bool. | |
29650 | (operand_equal_for_phi_arg_p): Ditto. | |
29651 | (tree_map_base_marked_p): Ditto. | |
29652 | * tree.cc (contains_placeholder_p): Update function body | |
29653 | for bool return type. | |
29654 | (type_cache_hasher::equal): Ditto. | |
29655 | (tree_map_base_hash): Change return type | |
29656 | from int to void and adjust function body accordingly. | |
29657 | (tree_int_cst_equal): Ditto. | |
29658 | (operand_equal_for_phi_arg_p): Ditto. | |
29659 | (get_narrower): Change "first" variable to bool. | |
29660 | (cl_option_hasher::equal): Update function body for bool return type. | |
29661 | * ggc.h (ggc_set_mark): Change return type from int to bool. | |
29662 | (ggc_marked_p): Ditto. | |
29663 | * ggc-page.cc (gt_ggc_mx): Change return type | |
29664 | from int to void and adjust function body accordingly. | |
29665 | (ggc_set_mark): Ditto. | |
29666 | ||
29667 | 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
29668 | ||
29669 | * config/riscv/autovec.md: Change order of | |
29670 | LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments. | |
29671 | * config/riscv/riscv-v.cc (expand_load_store): Ditto. | |
29672 | * doc/md.texi: Ditto. | |
29673 | * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto. | |
29674 | * internal-fn.cc (len_maskload_direct): Ditto. | |
29675 | (len_maskstore_direct): Ditto. | |
29676 | (add_len_and_mask_args): New function. | |
29677 | (expand_partial_load_optab_fn): Change order of | |
29678 | LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments. | |
29679 | (expand_partial_store_optab_fn): Ditto. | |
29680 | (internal_fn_len_index): New function. | |
29681 | (internal_fn_mask_index): Change order of | |
29682 | LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments. | |
29683 | (internal_fn_stored_value_index): Ditto. | |
29684 | (internal_len_load_store_bias): Ditto. | |
29685 | * internal-fn.h (internal_fn_len_index): New function. | |
29686 | * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of | |
29687 | LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments. | |
29688 | * tree-vect-stmts.cc (vectorizable_store): Ditto. | |
29689 | (vectorizable_load): Ditto. | |
29690 | ||
29691 | 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com> | |
29692 | ||
29693 | PR modula2/110125 | |
29694 | * doc/gm2.texi (Semantic checking): Include examples using | |
29695 | -Wuninit-variable-checking. | |
29696 | ||
29697 | 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
29698 | ||
29699 | * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern. | |
29700 | (*single_widen_fnma<mode>): Ditto. | |
29701 | (*double_widen_fms<mode>): Ditto. | |
29702 | (*single_widen_fms<mode>): Ditto. | |
29703 | (*double_widen_fnms<mode>): Ditto. | |
29704 | (*single_widen_fnms<mode>): Ditto. | |
29705 | ||
29706 | 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
29707 | ||
29708 | * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@" | |
29709 | into "*" in pattern name which simplifies build files. | |
29710 | (*pred_single_widen_mul<any_extend:su><mode>): Ditto. | |
29711 | (*pred_single_widen_mul<mode>): New pattern. | |
29712 | ||
29713 | 2023-07-03 Richard Sandiford <richard.sandiford@arm.com> | |
29714 | ||
29715 | * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect | |
29716 | the index to be 0 or 1. | |
29717 | ||
29718 | 2023-07-03 Lehua Ding <lehua.ding@rivai.ai> | |
29719 | ||
29720 | Revert: | |
29721 | 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
29722 | ||
29723 | * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern. | |
29724 | (*single_widen_fnma<mode>): Ditto. | |
29725 | (*double_widen_fms<mode>): Ditto. | |
29726 | (*single_widen_fms<mode>): Ditto. | |
29727 | (*double_widen_fnms<mode>): Ditto. | |
29728 | (*single_widen_fnms<mode>): Ditto. | |
29729 | ||
29730 | 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
29731 | ||
29732 | * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern. | |
29733 | (*single_widen_fnma<mode>): Ditto. | |
29734 | (*double_widen_fms<mode>): Ditto. | |
29735 | (*single_widen_fms<mode>): Ditto. | |
29736 | (*double_widen_fnms<mode>): Ditto. | |
29737 | (*single_widen_fnms<mode>): Ditto. | |
29738 | ||
29739 | 2023-07-03 Pan Li <pan2.li@intel.com> | |
29740 | ||
29741 | * config/riscv/vector.md: Fix typo. | |
29742 | ||
29743 | 2023-07-03 Richard Biener <rguenther@suse.de> | |
29744 | ||
29745 | PR tree-optimization/110506 | |
29746 | * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order | |
29747 | TYPE_PRECISION access with INTEGRAL_TYPE_P check. | |
29748 | ||
29749 | 2023-07-03 Richard Biener <rguenther@suse.de> | |
29750 | ||
29751 | PR tree-optimization/110506 | |
29752 | * tree-ssa-ccp.cc (get_value_for_expr): Check for integral | |
29753 | type before relying on TYPE_PRECISION to produce a nonzero mask. | |
29754 | ||
29755 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29756 | ||
29757 | * config/mips/mips.md(*and<mode>3_mips16): Generates | |
29758 | ZEB/ZEH instructions. | |
29759 | ||
29760 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29761 | ||
29762 | * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the | |
29763 | address register to M16_REGS for MIPS16. | |
29764 | (BUILTIN_AVAIL_MIPS16E2): Defined a new macro. | |
29765 | (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above. | |
29766 | (AVAIL_NON_MIPS16 (cache..)): Update to | |
29767 | AVAIL_MIPS16E2_OR_NON_MIPS16. | |
29768 | * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2. | |
29769 | * config/mips/mips.md (mips_cache): Mark as extended MIPS16. | |
29770 | ||
29771 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29772 | ||
29773 | * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause | |
29774 | for ISA_HAS_MIPS16E2. | |
29775 | (ISA_HAS_SYNC): Same as above. | |
29776 | (ISA_HAS_LL_SC): Same as above. | |
29777 | ||
29778 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29779 | ||
29780 | * config/mips/mips.cc(mips_expand_ins_as_unaligned_store): | |
29781 | Add logics for generating instruction. | |
29782 | * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2. | |
29783 | * config/mips/mips.md(mov_<load>l): Generates instructions. | |
29784 | (mov_<load>r): Same as above. | |
29785 | (mov_<store>l): Adjusted for the conditions above. | |
29786 | (mov_<store>r): Same as above. | |
29787 | (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`. | |
29788 | (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`. | |
29789 | ||
29790 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29791 | ||
29792 | * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction. | |
29793 | (mips_const_insns): Same as above. | |
29794 | (mips_output_move): Same as above. | |
29795 | (mips_output_function_prologue): Same as above. | |
29796 | * config/mips/mips.md: Same as above | |
29797 | ||
29798 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29799 | ||
29800 | * config/mips/constraints.md(Yz): New constraints for mips16e2. | |
29801 | * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function. | |
29802 | (mips_bit_clear_info): Same as above. | |
29803 | * config/mips/mips.cc(mips_bit_clear_info): New function for | |
29804 | generating instructions. | |
29805 | (mips_bit_clear_p): Same as above. | |
29806 | * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2. | |
29807 | * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions. | |
29808 | (*and<mode>3): Generates INS instruction. | |
29809 | (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions. | |
29810 | (ior<mode>3): Add logics for ORI instruction. | |
29811 | (*ior<mode>3_mips16_asmacro): Generates ORI instrucion. | |
29812 | (*ior<mode>3_mips16): Add logics for XORI instruction. | |
29813 | (*xor<mode>3_mips16): Generates XORI instrucion. | |
29814 | (*extzv<mode>): Add logics for EXT instruction. | |
29815 | (*insv<mode>): Add logics for INS instruction. | |
29816 | * config/mips/predicates.md(bit_clear_operand): New predicate for | |
29817 | generating bitwise instructions. | |
29818 | (and_reg_operand): Add logics for generating bitwise instructions. | |
29819 | ||
29820 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29821 | ||
29822 | * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions | |
29823 | that uses global pointer register. | |
29824 | (mips16_unextended_reference_p): Same as above. | |
29825 | (mips_pic_base_register): Same as above. | |
29826 | (mips_init_relocs): Same as above. | |
29827 | * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro. | |
29828 | (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`. | |
29829 | * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above. | |
29830 | (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`. | |
29831 | ||
29832 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29833 | ||
29834 | * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2. | |
29835 | * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts. | |
29836 | (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction. | |
29837 | (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts. | |
29838 | (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction. | |
29839 | * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts. | |
29840 | ||
29841 | 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com> | |
29842 | ||
29843 | * config/mips/mips.cc(mips_file_start): Add mips16e2 info | |
29844 | for output file. | |
29845 | * config/mips/mips.h(__mips_mips16e2): Defined a new | |
29846 | predefine macro. | |
29847 | (ISA_HAS_MIPS16E2): Defined a new macro. | |
29848 | (ASM_SPEC): Pass mmips16e2 to the assembler. | |
29849 | * config/mips/mips.opt: Add -m(no-)mips16e2 option. | |
29850 | * config/mips/predicates.md: Add clause for TARGET_MIPS16E2. | |
29851 | * doc/invoke.texi: Add -m(no-)mips16e2 option.. | |
29852 | ||
29853 | 2023-07-02 Jakub Jelinek <jakub@redhat.com> | |
29854 | ||
29855 | PR tree-optimization/110508 | |
29856 | * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with | |
29857 | REALPART_EXPR opf nlhs if re2 is non-NULL. | |
29858 | ||
29859 | 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
29860 | ||
29861 | * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p): | |
29862 | Simplify. | |
29863 | * config/xtensa/xtensa.md (*xtensa_clamps): | |
29864 | Add TARGET_MINMAX to the condition. | |
29865 | ||
29866 | 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
29867 | ||
29868 | * config/xtensa/xtensa.md (*eqne_INT_MIN): | |
29869 | Add missing ":SI" to the match_operator. | |
29870 | ||
29871 | 2023-07-02 Iain Sandoe <iain@sandoe.co.uk> | |
29872 | ||
29873 | PR target/108743 | |
29874 | * config/darwin.opt: Add fconstant-cfstrings alias to | |
29875 | mconstant-cfstrings. | |
29876 | * doc/invoke.texi: Amend invocation descriptions to reflect | |
29877 | that the fconstant-cfstrings is a target-option alias and to | |
29878 | add the missing mconstant-cfstrings option description to the | |
29879 | Darwin section. | |
29880 | ||
29881 | 2023-07-01 Jan Hubicka <jh@suse.cz> | |
29882 | ||
29883 | * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge | |
29884 | parmaeter; update profile. | |
29885 | * tree-cfg.h (gimple_duplicate_sese_region): Update prototype. | |
29886 | * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ... | |
29887 | (static_loop_exit): ... this; return the edge to be elliminated. | |
29888 | (ch_base::copy_headers): Handle profile updating for eliminated exits. | |
29889 | ||
29890 | 2023-07-01 Roger Sayle <roger@nextmovesoftware.com> | |
29891 | ||
29892 | * config/i386/i386-features.cc (compute_convert_gain): Provide | |
29893 | gains/costs for ROTATE and ROTATERT (by an integer constant). | |
29894 | (general_scalar_chain::convert_rotate): New helper function to | |
29895 | convert a DImode or SImode rotation by an integer constant into | |
29896 | SSE vector form. | |
29897 | (general_scalar_chain::convert_insn): Call the new convert_rotate | |
29898 | for ROTATE and ROTATERT. | |
29899 | (general_scalar_to_vector_candidate_p): Consider ROTATE and | |
29900 | ROTATERT to be candidates if the second operand is an integer | |
29901 | constant, valid for a rotation (or shift) in the given mode. | |
29902 | * config/i386/i386-features.h (general_scalar_chain): Add new | |
29903 | helper method convert_rotate. | |
29904 | ||
29905 | 2023-07-01 Jan Hubicka <jh@suse.cz> | |
29906 | ||
29907 | PR tree-optimization/103680 | |
29908 | * cfg.cc (update_bb_profile_for_threading): Fix profile update; | |
29909 | make message clearer. | |
29910 | ||
29911 | 2023-06-30 Qing Zhao <qing.zhao@oracle.com> | |
29912 | ||
29913 | PR tree-optimization/101832 | |
29914 | * tree-object-size.cc (addr_object_size): Handle structure/union type | |
29915 | when it has flexible size. | |
29916 | ||
29917 | 2023-06-30 Eric Botcazou <ebotcazou@adacore.com> | |
29918 | ||
29919 | * gimple-fold.cc (fold_array_ctor_reference): Fix head comment. | |
29920 | (fold_nonarray_ctor_reference): Likewise. Specifically deal | |
29921 | with integral bit-fields. | |
29922 | (fold_ctor_reference): Make sure that the constructor uses the | |
29923 | native storage order. | |
29924 | ||
29925 | 2023-06-30 Jan Hubicka <jh@suse.cz> | |
29926 | ||
29927 | PR middle-end/109849 | |
29928 | * predict.cc (estimate_bb_frequencies): Turn to static function. | |
29929 | (expr_expected_value_1): Fix handling of binary expressions with | |
29930 | predicted values. | |
29931 | * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue. | |
29932 | (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority | |
29933 | queue. | |
29934 | * predict.h (estimate_bb_frequencies): No longer declare it. | |
29935 | ||
29936 | 2023-06-30 Uros Bizjak <ubizjak@gmail.com> | |
29937 | ||
29938 | * fold-const.h (multiple_of_p): Change return type from int to bool. | |
29939 | * fold-const.cc (split_tree): Change negl_p, neg_litp_p, | |
29940 | neg_conp_p and neg_var_p variables to bool. | |
29941 | (const_binop): Change sat_p variable to bool. | |
29942 | (merge_ranges): Change no_overlap variable to bool. | |
29943 | (extract_muldiv_1): Change same_p variable to bool. | |
29944 | (tree_swap_operands_p): Update function body for bool return type. | |
29945 | (fold_truth_andor): Change commutative variable to bool. | |
29946 | (multiple_of_p): Change return type | |
29947 | from int to void and adjust function body accordingly. | |
29948 | * optabs.h (expand_twoval_unop): Change return type from int to bool. | |
29949 | (expand_twoval_binop): Ditto. | |
29950 | (can_compare_p): Ditto. | |
29951 | (have_add2_insn): Ditto. | |
29952 | (have_addptr3_insn): Ditto. | |
29953 | (have_sub2_insn): Ditto. | |
29954 | (have_insn_for): Ditto. | |
29955 | * optabs.cc (add_equal_note): Ditto. | |
29956 | (widen_operand): Change no_extend argument from int to bool. | |
29957 | (expand_binop): Ditto. | |
29958 | (expand_twoval_unop): Change return type | |
29959 | from int to void and adjust function body accordingly. | |
29960 | (expand_twoval_binop): Ditto. | |
29961 | (can_compare_p): Ditto. | |
29962 | (have_add2_insn): Ditto. | |
29963 | (have_addptr3_insn): Ditto. | |
29964 | (have_sub2_insn): Ditto. | |
29965 | (have_insn_for): Ditto. | |
29966 | ||
29967 | 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com> | |
29968 | ||
29969 | * config/aarch64/aarch64-simd.md | |
29970 | (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>): | |
29971 | Expansions for abd vec widen optabs. | |
29972 | (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL. | |
29973 | * config/aarch64/iterators.md (USMAX_EXT): Code attributes | |
29974 | that give the appropriate extend RTL for the max RTL. | |
29975 | ||
29976 | 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com> | |
29977 | ||
29978 | * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab. | |
29979 | * optabs.def (vec_widen_sabd_optab, | |
29980 | vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab, | |
29981 | vec_widen_sabd_odd_even, vec_widen_sabd_even_optab, | |
29982 | vec_widen_uabd_optab, | |
29983 | vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab, | |
29984 | vec_widen_uabd_odd_even, vec_widen_uabd_even_optab): | |
29985 | New optabs. | |
29986 | * doc/md.texi: Document them. | |
29987 | * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to | |
29988 | to build a VEC_WIDEN_ABD call if the input precision is smaller | |
29989 | than the precision of the output. | |
29990 | (vect_recog_widen_abd_pattern): Should an ABD expression be | |
29991 | found preceeding an extension, replace the two with a | |
29992 | VEC_WIDEN_ABD. | |
29993 | ||
29994 | 2023-06-30 Pan Li <pan2.li@intel.com> | |
29995 | ||
29996 | * config/riscv/vector.md: Refactor the common condition. | |
29997 | ||
29998 | 2023-06-30 Richard Biener <rguenther@suse.de> | |
29999 | ||
30000 | PR tree-optimization/110496 | |
30001 | * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order | |
30002 | verifying and TYPE_PRECISION query for the BIT_FIELD_REF case. | |
30003 | ||
30004 | 2023-06-30 Richard Biener <rguenther@suse.de> | |
30005 | ||
30006 | PR middle-end/110489 | |
30007 | * statistics.cc (curr_statistics_hash): Add argument | |
30008 | indicating whether we should allocate the hash. | |
30009 | (statistics_fini_pass): If the hash isn't allocated | |
30010 | only print the summary header. | |
30011 | ||
30012 | 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org> | |
30013 | Thomas Schwinge <thomas@codesourcery.com> | |
30014 | ||
30015 | * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove. | |
30016 | ||
30017 | 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com> | |
30018 | ||
30019 | PR target/109435 | |
30020 | * config/mips/mips.cc (mips_function_arg_alignment): Returns | |
30021 | the alignment of function argument. In case of typedef type, | |
30022 | it returns the aligment of the aliased type. | |
30023 | (mips_function_arg_boundary): Relocated calculation of the | |
30024 | aligment of function arguments. | |
30025 | ||
30026 | 2023-06-29 Jan Hubicka <jh@suse.cz> | |
30027 | ||
30028 | PR tree-optimization/109849 | |
30029 | * ipa-fnsummary.cc (decompose_param_expr): Skip | |
30030 | functions returning its parameter. | |
30031 | (set_cond_stmt_execution_predicate): Return early | |
30032 | if predicate was constructed. | |
30033 | ||
30034 | 2023-06-29 Qing Zhao <qing.zhao@oracle.com> | |
30035 | ||
30036 | PR c/77650 | |
30037 | * doc/extend.texi: Document GCC extension on a structure containing | |
30038 | a flexible array member to be a member of another structure. | |
30039 | ||
30040 | 2023-06-29 Qing Zhao <qing.zhao@oracle.com> | |
30041 | ||
30042 | * print-tree.cc (print_node): Print new bit type_include_flexarray. | |
30043 | * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p | |
30044 | as type_include_flexarray for RECORD_TYPE or UNION_TYPE. | |
30045 | * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream | |
30046 | in bit no_named_args_stdarg_p properly for its corresponding type. | |
30047 | * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream | |
30048 | out bit no_named_args_stdarg_p properly for its corresponding type. | |
30049 | * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY. | |
30050 | ||
30051 | 2023-06-29 Aldy Hernandez <aldyh@redhat.com> | |
30052 | ||
30053 | * tree-vrp.cc (maybe_set_nonzero_bits): Move from here... | |
30054 | * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here. | |
30055 | * tree-vrp.h (maybe_set_nonzero_bits): Remove. | |
30056 | ||
30057 | 2023-06-29 Aldy Hernandez <aldyh@redhat.com> | |
30058 | ||
30059 | * value-range.cc (frange::set): Do not call verify_range. | |
30060 | (frange::normalize_kind): Verify range. | |
30061 | (frange::union_nans): Do not call verify_range. | |
30062 | (frange::union_): Same. | |
30063 | (frange::intersect): Same. | |
30064 | (irange::irange_single_pair_union): Call normalize_kind if | |
30065 | necessary. | |
30066 | (irange::union_): Same. | |
30067 | (irange::intersect): Same. | |
30068 | (irange::set_range_from_nonzero_bits): Verify range. | |
30069 | (irange::set_nonzero_bits): Call normalize_kind if necessary. | |
30070 | (irange::get_nonzero_bits): Tweak comment. | |
30071 | (irange::intersect_nonzero_bits): Call normalize_kind if | |
30072 | necessary. | |
30073 | (irange::union_nonzero_bits): Same. | |
30074 | * value-range.h (irange::normalize_kind): Verify range. | |
30075 | ||
30076 | 2023-06-29 Uros Bizjak <ubizjak@gmail.com> | |
30077 | ||
30078 | * cselib.h (rtx_equal_for_cselib_1): | |
30079 | Change return type from int to bool. | |
30080 | (references_value_p): Ditto. | |
30081 | (rtx_equal_for_cselib_p): Ditto. | |
30082 | * expr.h (can_store_by_pieces): Ditto. | |
30083 | (try_casesi): Ditto. | |
30084 | (try_tablejump): Ditto. | |
30085 | (safe_from_p): Ditto. | |
30086 | * sbitmap.h (bitmap_equal_p): Ditto. | |
30087 | * cselib.cc (references_value_p): Change return type | |
30088 | from int to void and adjust function body accordingly. | |
30089 | (rtx_equal_for_cselib_1): Ditto. | |
30090 | * expr.cc (is_aligning_offset): Ditto. | |
30091 | (can_store_by_pieces): Ditto. | |
30092 | (mostly_zeros_p): Ditto. | |
30093 | (all_zeros_p): Ditto. | |
30094 | (safe_from_p): Ditto. | |
30095 | (is_aligning_offset): Ditto. | |
30096 | (try_casesi): Ditto. | |
30097 | (try_tablejump): Ditto. | |
30098 | (store_constructor): Change "need_to_clear" and | |
30099 | "const_bounds_p" variables to bool. | |
30100 | * sbitmap.cc (bitmap_equal_p): Change return type from int to bool. | |
30101 | ||
30102 | 2023-06-29 Robin Dapp <rdapp@ventanamicro.com> | |
30103 | ||
30104 | * tree-ssa-math-opts.cc (divmod_candidate_p): Use | |
30105 | element_precision. | |
30106 | ||
30107 | 2023-06-29 Richard Biener <rguenther@suse.de> | |
30108 | ||
30109 | PR tree-optimization/110460 | |
30110 | * tree-vect-stmts.cc (get_related_vectype_for_scalar_type): | |
30111 | Only allow integral, pointer and scalar float type scalar_type. | |
30112 | ||
30113 | 2023-06-29 Lili Cui <lili.cui@intel.com> | |
30114 | ||
30115 | PR tree-optimization/110148 | |
30116 | * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried | |
30117 | ops in this function. | |
30118 | ||
30119 | 2023-06-29 Richard Biener <rguenther@suse.de> | |
30120 | ||
30121 | PR middle-end/110452 | |
30122 | * expr.cc (store_constructor): Handle uniform boolean | |
30123 | vectors with integer mode specially. | |
30124 | ||
30125 | 2023-06-29 Richard Biener <rguenther@suse.de> | |
30126 | ||
30127 | PR middle-end/110461 | |
30128 | * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable | |
30129 | for VECTOR_TYPE_P. | |
30130 | ||
30131 | 2023-06-29 Richard Sandiford <richard.sandiford@arm.com> | |
30132 | ||
30133 | * vec.h (gt_pch_nx): Add overloads for va_gc_atomic. | |
30134 | (array_slice): Relax va_gc constructor to handle all vectors | |
30135 | with a vl_embed layout. | |
30136 | ||
30137 | 2023-06-29 Pan Li <pan2.li@intel.com> | |
30138 | ||
30139 | * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM. | |
30140 | (riscv_mode_needed): Likewise. | |
30141 | (riscv_entity_mode_after): Likewise. | |
30142 | (riscv_mode_after): Likewise. | |
30143 | (riscv_mode_entry): Likewise. | |
30144 | (riscv_mode_exit): Likewise. | |
30145 | * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number | |
30146 | for FRM. | |
30147 | * config/riscv/riscv.md: Add FRM register. | |
30148 | * config/riscv/vector-iterators.md: Add FRM type. | |
30149 | * config/riscv/vector.md (frm_mode): Define new attr for FRM mode. | |
30150 | (fsrm): Define new insn for fsrm instruction. | |
30151 | ||
30152 | 2023-06-29 Pan Li <pan2.li@intel.com> | |
30153 | ||
30154 | * config/riscv/riscv-protos.h (enum floating_point_rounding_mode): | |
30155 | Add macro for static frm min and max. | |
30156 | * config/riscv/riscv-vector-builtins-bases.cc | |
30157 | (class binop_frm): New class for floating-point with frm. | |
30158 | (BASE): Add vfadd for frm. | |
30159 | * config/riscv/riscv-vector-builtins-bases.h: Likewise. | |
30160 | * config/riscv/riscv-vector-builtins-functions.def | |
30161 | (vfadd_frm): Likewise. | |
30162 | * config/riscv/riscv-vector-builtins-shapes.cc | |
30163 | (struct alu_frm_def): New struct for alu with frm. | |
30164 | (SHAPE): Add alu with frm. | |
30165 | * config/riscv/riscv-vector-builtins-shapes.h: Likewise. | |
30166 | * config/riscv/riscv-vector-builtins.cc | |
30167 | (function_checker::report_out_of_range_and_not): New function | |
30168 | for report out of range and not val. | |
30169 | (function_checker::require_immediate_range_or): New function | |
30170 | for checking in range or one val. | |
30171 | * config/riscv/riscv-vector-builtins.h: Add function decl. | |
30172 | ||
30173 | 2023-06-29 Cui, Lili <lili.cui@intel.com> | |
30174 | ||
30175 | * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8 | |
30176 | from Rocketlake, move model value 0xbf from Alderlake to Raptorlake. | |
30177 | ||
30178 | 2023-06-28 Hans-Peter Nilsson <hp@axis.com> | |
30179 | ||
30180 | PR target/110144 | |
30181 | * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN | |
30182 | to insn before validating it. | |
30183 | ||
30184 | 2023-06-28 Jan Hubicka <jh@suse.cz> | |
30185 | ||
30186 | PR middle-end/110334 | |
30187 | * ipa-fnsummary.h (ipa_fn_summary): Add | |
30188 | safe_to_inline_to_always_inline. | |
30189 | * ipa-inline.cc (can_early_inline_edge_p): ICE | |
30190 | if SSA is not built; do cycle checking for | |
30191 | always_inline functions. | |
30192 | (inline_always_inline_functions): Be recrusive; | |
30193 | watch for cycles; do not updat overall summary. | |
30194 | (early_inliner): Do not give up on always_inlines. | |
30195 | * ipa-utils.cc (ipa_reverse_postorder): Do not skip | |
30196 | always inlines. | |
30197 | ||
30198 | 2023-06-28 Uros Bizjak <ubizjak@gmail.com> | |
30199 | ||
30200 | * output.h (leaf_function_p): Change return type from int to bool. | |
30201 | (final_forward_branch_p): Ditto. | |
30202 | (only_leaf_regs_used): Ditto. | |
30203 | (maybe_assemble_visibility): Ditto. | |
30204 | * varasm.h (supports_one_only): Ditto. | |
30205 | * rtl.h (compute_alignments): Change return type from int to void. | |
30206 | * final.cc (app_on): Change return type from int to bool. | |
30207 | (compute_alignments): Change return type from int to void | |
30208 | and adjust function body accordingly. | |
30209 | (shorten_branches): Change "something_changed" variable | |
30210 | type from int to bool. | |
30211 | (leaf_function_p): Change return type from int to bool | |
30212 | and adjust function body accordingly. | |
30213 | (final_forward_branch_p): Ditto. | |
30214 | (only_leaf_regs_used): Ditto. | |
30215 | * varasm.cc (contains_pointers_p): Change return type from | |
30216 | int to bool and adjust function body accordingly. | |
30217 | (compare_constant): Ditto. | |
30218 | (maybe_assemble_visibility): Ditto. | |
30219 | (supports_one_only): Ditto. | |
30220 | ||
30221 | 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu> | |
30222 | ||
30223 | PR debug/110308 | |
30224 | * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode. | |
30225 | (maybe_copy_reg_attrs): New function. | |
30226 | (find_oldest_value_reg): Use maybe_copy_reg_attrs. | |
30227 | (copyprop_hardreg_forward_1): Ditto. | |
30228 | ||
30229 | 2023-06-28 Richard Biener <rguenther@suse.de> | |
30230 | ||
30231 | PR tree-optimization/110434 | |
30232 | * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of | |
30233 | VAR we replace with <retval>. | |
30234 | ||
30235 | 2023-06-28 Richard Biener <rguenther@suse.de> | |
30236 | ||
30237 | PR tree-optimization/110451 | |
30238 | * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and | |
30239 | tcc_comparison are expensive. | |
30240 | ||
30241 | 2023-06-28 Roger Sayle <roger@nextmovesoftware.com> | |
30242 | ||
30243 | * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest | |
30244 | for TImode comparisons on 32-bit architectures. | |
30245 | * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to | |
30246 | SWIM1248x to exclude/avoid TImode being conditional on -m64. | |
30247 | (cbranchti4): New define_expand for TImode on both TARGET_64BIT | |
30248 | and/or with TARGET_SSE4_1. | |
30249 | * config/i386/predicates.md (ix86_timode_comparison_operator): | |
30250 | New predicate that depends upon TARGET_64BIT. | |
30251 | (ix86_timode_comparison_operand): Likewise. | |
30252 | ||
30253 | 2023-06-28 Roger Sayle <roger@nextmovesoftware.com> | |
30254 | ||
30255 | PR target/78794 | |
30256 | * config/i386/i386-features.cc (compute_convert_gain): Provide | |
30257 | more accurate gains for conversion of scalar comparisons to | |
30258 | PTEST. | |
30259 | ||
30260 | 2023-06-28 Richard Biener <rguenther@suse.de> | |
30261 | ||
30262 | PR tree-optimization/110443 | |
30263 | * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped | |
30264 | gather loads. | |
30265 | ||
30266 | 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org> | |
30267 | ||
30268 | * config/rs6000/rs6000.md (peephole2 for compare_and_move): New. | |
30269 | (peephole2 for move_and_compare): New. | |
30270 | (mode_iterator WORD): New. Set the mode to SI/DImode by | |
30271 | TARGET_POWERPC64. | |
30272 | (*mov<mode>_internal2): Change the mode iterator from P to WORD. | |
30273 | (split pattern for compare_and_move): Likewise. | |
30274 | ||
30275 | 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30276 | ||
30277 | * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern. | |
30278 | (*single_widen_fma<mode>): Ditto. | |
30279 | ||
30280 | 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org> | |
30281 | ||
30282 | PR target/104124 | |
30283 | * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename | |
30284 | to... | |
30285 | (altivec_vupkhs<VU_char>_direct): ...this. | |
30286 | * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New | |
30287 | predicate to test if a constant can be loaded with vspltisw and | |
30288 | vupkhsw. | |
30289 | (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if | |
30290 | a vector constant can be synthesized with a vspltisw and a vupkhsw. | |
30291 | * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p): | |
30292 | Declare. | |
30293 | * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New | |
30294 | function to return true if OP mode is V2DI and can be synthesized | |
30295 | with vupkhsw and vspltisw. | |
30296 | * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up | |
30297 | constants with vspltisw and vupkhsw. | |
30298 | ||
30299 | 2023-06-28 Jan Hubicka <jh@suse.cz> | |
30300 | ||
30301 | PR tree-optimization/110377 | |
30302 | * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to | |
30303 | the ranger query. | |
30304 | (ipa_analyze_node): Enable ranger. | |
30305 | ||
30306 | 2023-06-28 Richard Biener <rguenther@suse.de> | |
30307 | ||
30308 | * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE. | |
30309 | (TYPE_PRECISION_RAW): Provide raw access to the precision | |
30310 | field. | |
30311 | * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW. | |
30312 | (gimple_canonical_types_compatible_p): Likewise. | |
30313 | * tree-streamer-out.cc (pack_ts_type_common_value_fields): | |
30314 | Stream TYPE_PRECISION_RAW. | |
30315 | * tree-streamer-in.cc (unpack_ts_type_common_value_fields): | |
30316 | Likewise. | |
30317 | * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW. | |
30318 | ||
30319 | 2023-06-28 Alexandre Oliva <oliva@adacore.com> | |
30320 | ||
30321 | * doc/extend.texi (zero-call-used-regs): Document leafy and | |
30322 | variants thereof. | |
30323 | * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as | |
30324 | LEAFY and variants. | |
30325 | * function.cc (gen_call_ued_regs_seq): Set only_used for leaf | |
30326 | functions in leafy mode. | |
30327 | * opts.cc (zero_call_used_regs_opts): Add leafy and variants. | |
30328 | ||
30329 | 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30330 | ||
30331 | * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand. | |
30332 | * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>): | |
30333 | Remove. | |
30334 | (@pred_single_widen_add<mode>): New pattern. | |
30335 | (@pred_single_widen_sub<mode>): New pattern. | |
30336 | ||
30337 | 2023-06-28 liuhongt <hongtao.liu@intel.com> | |
30338 | ||
30339 | * config/i386/i386.cc (ix86_invalid_conversion): New function. | |
30340 | (TARGET_INVALID_CONVERSION): Define as | |
30341 | ix86_invalid_conversion. | |
30342 | ||
30343 | 2023-06-27 Robin Dapp <rdapp@ventanamicro.com> | |
30344 | ||
30345 | * config/riscv/autovec.md (<optab><vnconvert><mode>2): New | |
30346 | expander. | |
30347 | (<float_cvt><vnconvert><mode>2): Ditto. | |
30348 | (<optab><mode><vnconvert>2): Ditto. | |
30349 | (<float_cvt><mode><vnconvert>2): Ditto. | |
30350 | * config/riscv/vector-iterators.md: Add vnconvert. | |
30351 | ||
30352 | 2023-06-27 Robin Dapp <rdapp@ventanamicro.com> | |
30353 | ||
30354 | * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New | |
30355 | expander. | |
30356 | (extend<v_quad_trunc><mode>2): Ditto. | |
30357 | (trunc<mode><v_double_trunc>2): Ditto. | |
30358 | (trunc<mode><v_quad_trunc>2): Ditto. | |
30359 | * config/riscv/vector-iterators.md: Add VQEXTF and HF to | |
30360 | V_QUAD_TRUNC and v_quad_trunc. | |
30361 | ||
30362 | 2023-06-27 Robin Dapp <rdapp@ventanamicro.com> | |
30363 | ||
30364 | * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New | |
30365 | expander. | |
30366 | ||
30367 | 2023-06-27 Robin Dapp <rdapp@ventanamicro.com> | |
30368 | ||
30369 | * config/riscv/autovec.md (copysign<mode>3): Add expander. | |
30370 | (xorsign<mode>3): Ditto. | |
30371 | * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn): | |
30372 | New class. | |
30373 | * config/riscv/vector-iterators.md (copysign): Remove ncopysign. | |
30374 | (xorsign): Ditto. | |
30375 | (n): Ditto. | |
30376 | (x): Ditto. | |
30377 | * config/riscv/vector.md (@pred_ncopysign<mode>): Split off. | |
30378 | (@pred_ncopysign<mode>_scalar): Ditto. | |
30379 | ||
30380 | 2023-06-27 Robin Dapp <rdapp@ventanamicro.com> | |
30381 | ||
30382 | * config/riscv/autovec.md: VF_AUTO -> VF. | |
30383 | * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN, | |
30384 | VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and | |
30385 | VHF_LMUL1. | |
30386 | * config/riscv/vector.md: Use new iterators. | |
30387 | ||
30388 | 2023-06-27 Robin Dapp <rdapp@ventanamicro.com> | |
30389 | ||
30390 | * match.pd: Use element_mode and check if target supports | |
30391 | operation with new type. | |
30392 | ||
30393 | 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
30394 | ||
30395 | * config/aarch64/aarch64-sve-builtins-base.cc | |
30396 | (svdupq_impl::fold_nonconst_dupq): New method. | |
30397 | (svdupq_impl::fold): Call fold_nonconst_dupq. | |
30398 | ||
30399 | 2023-06-27 Andrew Pinski <apinski@marvell.com> | |
30400 | ||
30401 | PR middle-end/110420 | |
30402 | PR middle-end/103979 | |
30403 | PR middle-end/98619 | |
30404 | * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile. | |
30405 | ||
30406 | 2023-06-27 Aldy Hernandez <aldyh@redhat.com> | |
30407 | ||
30408 | * ipa-cp.cc (decide_whether_version_node): Adjust comment. | |
30409 | * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust | |
30410 | for Value_Range. | |
30411 | (set_switch_stmt_execution_predicate): Same. | |
30412 | * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same. | |
30413 | ||
30414 | 2023-06-27 Aldy Hernandez <aldyh@redhat.com> | |
30415 | ||
30416 | * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with | |
30417 | ipa_vr instead of value_range. | |
30418 | (gt_pch_nx): Same. | |
30419 | (gt_ggc_mx): Same. | |
30420 | (ipa_get_value_range): Same. | |
30421 | * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for | |
30422 | ipa_vr. | |
30423 | (gt_ggc_mx): Same. | |
30424 | ||
30425 | 2023-06-27 Aldy Hernandez <aldyh@redhat.com> | |
30426 | ||
30427 | * ipa-cp.cc (ipa_vr_operation_and_type_effects): New. | |
30428 | * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr. | |
30429 | (ipa_set_jfunc_vr): Take a range. | |
30430 | (ipa_compute_jump_functions_for_edge): Pass range to | |
30431 | ipa_set_jfunc_vr. | |
30432 | (ipa_write_jump_function): Call streamer write helper. | |
30433 | (ipa_read_jump_function): Call streamer read helper. | |
30434 | * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr. | |
30435 | ||
30436 | 2023-06-27 Richard Sandiford <richard.sandiford@arm.com> | |
30437 | ||
30438 | * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }" | |
30439 | as a probable initializer rather than a probable complete statement. | |
30440 | ||
30441 | 2023-06-27 Richard Biener <rguenther@suse.de> | |
30442 | ||
30443 | PR tree-optimization/96208 | |
30444 | * tree-vect-slp.cc (vect_build_slp_tree_1): Allow | |
30445 | a non-grouped load if it is the same for all lanes. | |
30446 | (vect_build_slp_tree_2): Handle not grouped loads. | |
30447 | (vect_optimize_slp_pass::remove_redundant_permutations): | |
30448 | Likewise. | |
30449 | (vect_transform_slp_perm_load_1): Likewise. | |
30450 | * tree-vect-stmts.cc (vect_model_load_cost): Likewise. | |
30451 | (get_group_load_store_type): Likewise. Handle | |
30452 | invariant accesses. | |
30453 | (vectorizable_load): Likewise. | |
30454 | ||
30455 | 2023-06-27 liuhongt <hongtao.liu@intel.com> | |
30456 | ||
30457 | PR rtl-optimization/110237 | |
30458 | * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with | |
30459 | UNSPEC_MASKMOV. | |
30460 | (maskstore<mode><avx512fmaskmodelower): Ditto. | |
30461 | (*<avx512>_store<mode>_mask): New define_insn, it's renamed | |
30462 | from original <avx512>_store<mode>_mask. | |
30463 | ||
30464 | 2023-06-27 liuhongt <hongtao.liu@intel.com> | |
30465 | ||
30466 | * config/i386/i386-features.cc (pass_insert_vzeroupper:gate): | |
30467 | Move flag_expensive_optimizations && !optimize_size to .. | |
30468 | * config/i386/i386-options.cc (ix86_option_override_internal): | |
30469 | .. this, it makes -mvzeroupper independent of optimization | |
30470 | level, but still keeps the behavior of architecture | |
30471 | tuning(emit_vzeroupper) unchanged. | |
30472 | ||
30473 | 2023-06-27 liuhongt <hongtao.liu@intel.com> | |
30474 | ||
30475 | PR target/82735 | |
30476 | * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit | |
30477 | vzeroupper for vzeroupper call_insn. | |
30478 | ||
30479 | 2023-06-27 Andrew Pinski <apinski@marvell.com> | |
30480 | ||
30481 | * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix | |
30482 | defbuiltin usage. | |
30483 | ||
30484 | 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30485 | ||
30486 | * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector | |
30487 | with base != 0. | |
30488 | ||
30489 | 2023-06-26 Andrew Pinski <apinski@marvell.com> | |
30490 | ||
30491 | * doc/extend.texi (access attribute): Add | |
30492 | cindex for it. | |
30493 | (interrupt/interrupt_handler attribute): | |
30494 | Likewise. | |
30495 | ||
30496 | 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
30497 | ||
30498 | * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn): | |
30499 | Use <DWI> instead of <V2XWIDE>. | |
30500 | (aarch64_sqrshrun_n<mode>): Likewise. | |
30501 | ||
30502 | 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
30503 | ||
30504 | * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p): | |
30505 | Rename to... | |
30506 | (aarch64_rnd_imm_p): ... This. | |
30507 | * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): | |
30508 | Rename to... | |
30509 | (aarch64_int_rnd_operand): ... This. | |
30510 | (aarch64_simd_rshrn_imm_vec): Delete. | |
30511 | * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn): | |
30512 | Adjust for the above. | |
30513 | (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise. | |
30514 | (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise. | |
30515 | (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise. | |
30516 | (aarch64_sqrshrun_n<mode>_insn): Likewise. | |
30517 | (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise. | |
30518 | (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise. | |
30519 | (aarch64_sqrshrun2_n<mode>_insn_le): Likewise. | |
30520 | (aarch64_sqrshrun2_n<mode>_insn_be): Likewise. | |
30521 | * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p): | |
30522 | Rename to... | |
30523 | (aarch64_rnd_imm_p): ... This. | |
30524 | ||
30525 | 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com> | |
30526 | ||
30527 | * config/s390/s390.cc (s390_encode_section_info): Set | |
30528 | SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been | |
30529 | misaligned. | |
30530 | ||
30531 | 2023-06-26 Jan Hubicka <jh@suse.cz> | |
30532 | ||
30533 | PR tree-optimization/109849 | |
30534 | * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile | |
30535 | count of newly constructed forwarder block. | |
30536 | ||
30537 | 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com> | |
30538 | ||
30539 | * doc/optinfo.texi: Fix "steam" -> "stream". | |
30540 | ||
30541 | 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30542 | ||
30543 | * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and | |
30544 | fix LEN_STORE. | |
30545 | (dse_optimize_stmt): Add LEN_MASK_STORE. | |
30546 | ||
30547 | 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30548 | ||
30549 | * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple | |
30550 | fold of LOAD/STORE with length. | |
30551 | ||
30552 | 2023-06-26 Andrew MacLeod <amacleod@redhat.com> | |
30553 | ||
30554 | * gimple-range-gori.cc (compute_operand1_and_operand2_range): | |
30555 | Check for interdependence between operands 1 and 2. | |
30556 | ||
30557 | 2023-06-26 Richard Sandiford <richard.sandiford@arm.com> | |
30558 | ||
30559 | * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt | |
30560 | into account when costing non-widening/truncating conversions. | |
30561 | ||
30562 | 2023-06-26 Richard Biener <rguenther@suse.de> | |
30563 | ||
30564 | PR tree-optimization/110381 | |
30565 | * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts): | |
30566 | Materialize permutes before fold-left reductions. | |
30567 | ||
30568 | 2023-06-26 Pan Li <pan2.li@intel.com> | |
30569 | ||
30570 | * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl. | |
30571 | ||
30572 | 2023-06-26 Richard Biener <rguenther@suse.de> | |
30573 | ||
30574 | * varasm.cc (initializer_constant_valid_p_1): Also | |
30575 | constrain the type of value to be scalar integral | |
30576 | before dispatching to narrowing_initializer_constant_valid_p. | |
30577 | ||
30578 | 2023-06-26 Richard Biener <rguenther@suse.de> | |
30579 | ||
30580 | * tree-ssa-scopedtables.cc (hashable_expr_equal_p): | |
30581 | Use element_precision. | |
30582 | ||
30583 | 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30584 | ||
30585 | * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant | |
30586 | vcond patterns. | |
30587 | (vcondu<V:mode><VI:mode>): Ditto. | |
30588 | * config/riscv/riscv-protos.h (expand_vcond): Ditto. | |
30589 | * config/riscv/riscv-v.cc (expand_vcond): Ditto. | |
30590 | ||
30591 | 2023-06-26 Richard Biener <rguenther@suse.de> | |
30592 | ||
30593 | PR tree-optimization/110392 | |
30594 | * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded): | |
30595 | Do early exits on true/false predicate only after normalization. | |
30596 | ||
30597 | 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30598 | ||
30599 | * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into | |
30600 | "length". | |
30601 | ||
30602 | 2023-06-26 Roger Sayle <roger@nextmovesoftware.com> | |
30603 | ||
30604 | * config/i386/i386.md (peephole2): Simplify zeroing a register | |
30605 | followed by an IOR, XOR or PLUS operation on it, into a move. | |
30606 | (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to | |
30607 | eliminate (and hide from reload) unnecessary word to doubleword | |
30608 | extensions that are followed by left shifts by sufficiently large, | |
30609 | but valid, bit counts. | |
30610 | ||
30611 | 2023-06-26 liuhongt <hongtao.liu@intel.com> | |
30612 | ||
30613 | PR tree-optimization/110371 | |
30614 | PR tree-optimization/110018 | |
30615 | * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to | |
30616 | save intermediate type operand instead of "subtle" vec_dest | |
30617 | for case NONE. | |
30618 | ||
30619 | 2023-06-26 liuhongt <hongtao.liu@intel.com> | |
30620 | ||
30621 | PR tree-optimization/110371 | |
30622 | PR tree-optimization/110018 | |
30623 | * tree-vect-stmts.cc (vectorizable_conversion): Don't use | |
30624 | intermiediate type for FIX_TRUNC_EXPR when ftrapping-math. | |
30625 | ||
30626 | 2023-06-26 Hongyu Wang <hongyu.wang@intel.com> | |
30627 | ||
30628 | * config/i386/i386-options.cc (ix86_valid_target_attribute_tree): | |
30629 | Override tune_string with arch_string if tune_string is not | |
30630 | explicitly specified. | |
30631 | ||
30632 | 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30633 | ||
30634 | * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance | |
30635 | AVL propagation. | |
30636 | * config/riscv/riscv-vsetvl.h: New function. | |
30637 | ||
30638 | 2023-06-25 Li Xu <xuli1@eswincomputing.com> | |
30639 | ||
30640 | * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to | |
30641 | emit_move_insn | |
30642 | ||
30643 | 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30644 | ||
30645 | * config/riscv/autovec.md (len_load_<mode>): Remove. | |
30646 | (len_maskload<mode><vm>): Remove. | |
30647 | (len_store_<mode>): New pattern. | |
30648 | (len_maskstore<mode><vm>): New pattern. | |
30649 | * config/riscv/predicates.md (autovec_length_operand): New predicate. | |
30650 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
30651 | (expand_load_store): New function. | |
30652 | * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto. | |
30653 | (emit_nonvlmax_masked_insn): Ditto. | |
30654 | (expand_load_store): Ditto. | |
30655 | * config/riscv/riscv-vector-builtins.cc | |
30656 | (function_expander::use_contiguous_store_insn): Add avl_type operand | |
30657 | into pred_store. | |
30658 | * config/riscv/vector.md: Ditto. | |
30659 | ||
30660 | 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30661 | ||
30662 | * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS | |
30663 | argument index. | |
30664 | ||
30665 | 2023-06-25 Pan Li <pan2.li@intel.com> | |
30666 | ||
30667 | * config/riscv/vector.md: Revert. | |
30668 | ||
30669 | 2023-06-25 Pan Li <pan2.li@intel.com> | |
30670 | ||
30671 | * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes. | |
30672 | * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto. | |
30673 | (ADJUST_ALIGNMENT): Ditto. | |
30674 | (RVV_TUPLE_PARTIAL_MODES): Ditto. | |
30675 | (ADJUST_NUNITS): Ditto. | |
30676 | * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto. | |
30677 | (vfloat16mf4x3_t): Ditto. | |
30678 | (vfloat16mf4x4_t): Ditto. | |
30679 | (vfloat16mf4x5_t): Ditto. | |
30680 | (vfloat16mf4x6_t): Ditto. | |
30681 | (vfloat16mf4x7_t): Ditto. | |
30682 | (vfloat16mf4x8_t): Ditto. | |
30683 | (vfloat16mf2x2_t): Ditto. | |
30684 | (vfloat16mf2x3_t): Ditto. | |
30685 | (vfloat16mf2x4_t): Ditto. | |
30686 | (vfloat16mf2x5_t): Ditto. | |
30687 | (vfloat16mf2x6_t): Ditto. | |
30688 | (vfloat16mf2x7_t): Ditto. | |
30689 | (vfloat16mf2x8_t): Ditto. | |
30690 | (vfloat16m1x2_t): Ditto. | |
30691 | (vfloat16m1x3_t): Ditto. | |
30692 | (vfloat16m1x4_t): Ditto. | |
30693 | (vfloat16m1x5_t): Ditto. | |
30694 | (vfloat16m1x6_t): Ditto. | |
30695 | (vfloat16m1x7_t): Ditto. | |
30696 | (vfloat16m1x8_t): Ditto. | |
30697 | (vfloat16m2x2_t): Ditto. | |
30698 | (vfloat16m2x3_t): Diito. | |
30699 | (vfloat16m2x4_t): Diito. | |
30700 | (vfloat16m4x2_t): Diito. | |
30701 | * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto. | |
30702 | (vfloat16mf4x3_t): Ditto. | |
30703 | (vfloat16mf4x4_t): Ditto. | |
30704 | (vfloat16mf4x5_t): Ditto. | |
30705 | (vfloat16mf4x6_t): Ditto. | |
30706 | (vfloat16mf4x7_t): Ditto. | |
30707 | (vfloat16mf4x8_t): Ditto. | |
30708 | (vfloat16mf2x2_t): Ditto. | |
30709 | (vfloat16mf2x3_t): Ditto. | |
30710 | (vfloat16mf2x4_t): Ditto. | |
30711 | (vfloat16mf2x5_t): Ditto. | |
30712 | (vfloat16mf2x6_t): Ditto. | |
30713 | (vfloat16mf2x7_t): Ditto. | |
30714 | (vfloat16mf2x8_t): Ditto. | |
30715 | (vfloat16m1x2_t): Ditto. | |
30716 | (vfloat16m1x3_t): Ditto. | |
30717 | (vfloat16m1x4_t): Ditto. | |
30718 | (vfloat16m1x5_t): Ditto. | |
30719 | (vfloat16m1x6_t): Ditto. | |
30720 | (vfloat16m1x7_t): Ditto. | |
30721 | (vfloat16m1x8_t): Ditto. | |
30722 | (vfloat16m2x2_t): Ditto. | |
30723 | (vfloat16m2x3_t): Ditto. | |
30724 | (vfloat16m2x4_t): Ditto. | |
30725 | (vfloat16m4x2_t): Ditto. | |
30726 | * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto. | |
30727 | * config/riscv/riscv.md: Ditto. | |
30728 | * config/riscv/vector-iterators.md: Ditto. | |
30729 | ||
30730 | 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30731 | ||
30732 | * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}. | |
30733 | (gimple_fold_partial_load_store_mem_ref): Ditto. | |
30734 | (gimple_fold_partial_store): Ditto. | |
30735 | (gimple_fold_call): Ditto. | |
30736 | ||
30737 | 2023-06-25 liuhongt <hongtao.liu@intel.com> | |
30738 | ||
30739 | PR target/110309 | |
30740 | * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>): | |
30741 | Refine pattern with UNSPEC_MASKLOAD. | |
30742 | (maskload<mode><avx512fmaskmodelower>): Ditto. | |
30743 | (*<avx512>_load<mode>_mask): Extend mode iterator to | |
30744 | VI12HFBF_AVX512VL. | |
30745 | (*<avx512>_load<mode>): Ditto. | |
30746 | ||
30747 | 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30748 | ||
30749 | * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE. | |
30750 | ||
30751 | 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30752 | ||
30753 | * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply | |
30754 | LEN_MASK_{LOAD,STORE} | |
30755 | ||
30756 | 2023-06-25 yulong <shiyulong@iscas.ac.cn> | |
30757 | ||
30758 | * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio. | |
30759 | ||
30760 | 2023-06-24 Roger Sayle <roger@nextmovesoftware.com> | |
30761 | ||
30762 | * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn. | |
30763 | ||
30764 | 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30765 | ||
30766 | * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage. | |
30767 | (*fma<VI:mode><P:mode>): Ditto. | |
30768 | (*fnma<mode>): Ditto. | |
30769 | (*fnma<VI:mode><P:mode>): Ditto. | |
30770 | ||
30771 | 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
30772 | ||
30773 | * config/riscv/autovec.md (fma<mode>4): New pattern. | |
30774 | (*fma<mode>): Ditto. | |
30775 | (fnma<mode>4): Ditto. | |
30776 | (*fnma<mode>): Ditto. | |
30777 | (fms<mode>4): Ditto. | |
30778 | (*fms<mode>): Ditto. | |
30779 | (fnms<mode>4): Ditto. | |
30780 | (*fnms<mode>): Ditto. | |
30781 | * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn): | |
30782 | New function. | |
30783 | * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto. | |
30784 | * config/riscv/vector.md: Fix attribute bug. | |
30785 | ||
30786 | 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30787 | ||
30788 | * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): | |
30789 | Apply LEN_MASK_{LOAD,STORE}. | |
30790 | ||
30791 | 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30792 | ||
30793 | * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address): | |
30794 | Add LEN_MASK_{LOAD,STORE}. | |
30795 | ||
30796 | 2023-06-24 David Malcolm <dmalcolm@redhat.com> | |
30797 | ||
30798 | * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR. | |
30799 | * diagnostic.cc: Likewise. | |
30800 | * text-art/box-drawing.cc: Likewise. | |
30801 | * text-art/canvas.cc: Likewise. | |
30802 | * text-art/ruler.cc: Likewise. | |
30803 | * text-art/selftests.cc: Likewise. | |
30804 | * text-art/selftests.h (text_art::canvas): New forward decl. | |
30805 | * text-art/style.cc: Add #define INCLUDE_VECTOR. | |
30806 | * text-art/styled-string.cc: Likewise. | |
30807 | * text-art/table.cc: Likewise. | |
30808 | * text-art/table.h: Remove #include <vector>. | |
30809 | * text-art/theme.cc: Add #define INCLUDE_VECTOR. | |
30810 | * text-art/types.h: Check that INCLUDE_VECTOR is defined. | |
30811 | Remove #include of <vector> and <string>. | |
30812 | * text-art/widget.cc: Add #define INCLUDE_VECTOR. | |
30813 | * text-art/widget.h: Remove #include <vector>. | |
30814 | ||
30815 | 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
30816 | ||
30817 | * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE. | |
30818 | (internal_load_fn_p): Add LEN_MASK_LOAD. | |
30819 | (internal_store_fn_p): Add LEN_MASK_STORE. | |
30820 | (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}. | |
30821 | (internal_fn_stored_value_index): Add LEN_MASK_STORE. | |
30822 | (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}. | |
30823 | * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}. | |
30824 | (get_len_load_store_mode): Ditto. | |
30825 | * optabs-tree.h (can_vec_mask_load_store_p): Ditto. | |
30826 | (get_len_load_store_mode): Ditto. | |
30827 | * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto. | |
30828 | (get_all_ones_mask): New function. | |
30829 | (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer. | |
30830 | (vectorizable_load): Ditto. | |
30831 | ||
30832 | 2023-06-23 Marek Polacek <polacek@redhat.com> | |
30833 | ||
30834 | * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and | |
30835 | -std=gnu++26. Document that for C++23, its value is 202302L. | |
30836 | * doc/invoke.texi: Document -std=c++26 and -std=gnu++26. | |
30837 | * dwarf2out.cc (highest_c_language): Handle GNU C++26. | |
30838 | (gen_compile_unit_die): Likewise. | |
30839 | ||
30840 | 2023-06-23 Jan Hubicka <jh@suse.cz> | |
30841 | ||
30842 | * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on | |
30843 | demand. | |
30844 | (pass_phiprop::execute): Do not compute it here; return | |
30845 | update_ssa_only_virtuals if something changed. | |
30846 | (pass_data_phiprop): Remove TODO_update_ssa from todos. | |
30847 | ||
30848 | 2023-06-23 Michael Meissner <meissner@linux.ibm.com> | |
30849 | Aaron Sawdey <acsawdey@linux.ibm.com> | |
30850 | ||
30851 | PR target/105325 | |
30852 | * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that | |
30853 | allowed prefixed lwa to be generated. | |
30854 | * config/rs6000/fusion.md: Regenerate. | |
30855 | * config/rs6000/predicates.md (ds_form_mem_operand): Delete. | |
30856 | * config/rs6000/rs6000.md (prefixed attribute): Add support for load | |
30857 | plus compare immediate fused insns. | |
30858 | (maybe_prefixed): Likewise. | |
30859 | ||
30860 | 2023-06-23 Roger Sayle <roger@nextmovesoftware.com> | |
30861 | ||
30862 | * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs | |
30863 | of ASHIFT to const0_rtx with sufficiently large shift count. | |
30864 | Optimize highpart SUBREGs of ASHIFT as the shift operand when | |
30865 | the shift count is the correct offset. Optimize SUBREGs of | |
30866 | multi-word logic operations if the SUBREGs of both operands | |
30867 | can be simplified. | |
30868 | ||
30869 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30870 | ||
30871 | * varasm.cc (initializer_constant_valid_p_1): Only | |
30872 | allow conversions between scalar floating point types. | |
30873 | ||
30874 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30875 | ||
30876 | * tree-vect-stmts.cc (vectorizable_assignment): | |
30877 | Properly handle non-integral operands when analyzing | |
30878 | conversions. | |
30879 | ||
30880 | 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
30881 | ||
30882 | PR tree-optimization/110280 | |
30883 | * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector | |
30884 | using build_vector_from_val with the element of input operand, and | |
30885 | mask's type if operand and mask's types don't match. | |
30886 | ||
30887 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30888 | ||
30889 | * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard | |
30890 | the truth_value_p case with !VECTOR_TYPE_P. | |
30891 | ||
30892 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30893 | ||
30894 | * tree-vect-patterns.cc (vect_look_through_possible_promotion): | |
30895 | Exit early when the type isn't scalar integral. | |
30896 | ||
30897 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30898 | ||
30899 | * match.pd ((outertype)((innertype0)a+(innertype1)b) | |
30900 | -> ((newtype)a+(newtype)b)): Use element_precision | |
30901 | where appropriate. | |
30902 | ||
30903 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30904 | ||
30905 | * fold-const.cc (fold_binary_loc): Use element_precision | |
30906 | when trying (double)float1 CMP (double)float2 to | |
30907 | float1 CMP float2 simplification. | |
30908 | * match.pd: Likewise. | |
30909 | ||
30910 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30911 | ||
30912 | * tree-vect-stmts.cc (vectorizable_load): Avoid useless | |
30913 | copies of VMAT_INVARIANT vectorized stmts, fix SLP support. | |
30914 | ||
30915 | 2023-06-23 Richard Biener <rguenther@suse.de> | |
30916 | ||
30917 | * tree-vect-stmts.cc (vector_vector_composition_type): | |
30918 | Handle composition of a vector from a number of elements that | |
30919 | happens to match its number of lanes. | |
30920 | ||
30921 | 2023-06-22 Marek Polacek <polacek@redhat.com> | |
30922 | ||
30923 | * configure.ac (--enable-host-bind-now): New check. Add | |
30924 | -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now. | |
30925 | * configure: Regenerate. | |
30926 | * doc/install.texi: Document --enable-host-bind-now. | |
30927 | ||
30928 | 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com> | |
30929 | ||
30930 | * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1. | |
30931 | ||
30932 | 2023-06-22 Richard Biener <rguenther@suse.de> | |
30933 | ||
30934 | PR tree-optimization/110332 | |
30935 | * tree-ssa-phiprop.cc (propagate_with_phi): Always | |
30936 | check aliasing with edge inserted loads. | |
30937 | ||
30938 | 2023-06-22 Roger Sayle <roger@nextmovesoftware.com> | |
30939 | Uros Bizjak <ubizjak@gmail.com> | |
30940 | ||
30941 | * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize | |
30942 | expansion of ptestc with equal operands as producing const1_rtx. | |
30943 | * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost | |
30944 | estimates of UNSPEC_PTEST, where the ptest performs the PAND | |
30945 | or PAND of its operands. | |
30946 | * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST | |
30947 | of reg_equal_p operands into an x86_stc instruction. | |
30948 | (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c. | |
30949 | (define_split): Similar to above for strict_low_part destinations. | |
30950 | (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c. | |
30951 | ||
30952 | 2023-06-22 David Malcolm <dmalcolm@redhat.com> | |
30953 | ||
30954 | PR analyzer/106626 | |
30955 | * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o. | |
30956 | * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of | |
30957 | text art. | |
30958 | (fanalyzer-debug-text-art): New. | |
30959 | ||
30960 | 2023-06-22 David Malcolm <dmalcolm@redhat.com> | |
30961 | ||
30962 | * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o, | |
30963 | text-art/canvas.o, text-art/ruler.o, text-art/selftests.o, | |
30964 | text-art/style.o, text-art/styled-string.o, text-art/table.o, | |
30965 | text-art/theme.o, and text-art/widget.o. | |
30966 | * color-macros.h (COLOR_FG_BRIGHT_BLACK): New. | |
30967 | (COLOR_FG_BRIGHT_RED): New. | |
30968 | (COLOR_FG_BRIGHT_GREEN): New. | |
30969 | (COLOR_FG_BRIGHT_YELLOW): New. | |
30970 | (COLOR_FG_BRIGHT_BLUE): New. | |
30971 | (COLOR_FG_BRIGHT_MAGENTA): New. | |
30972 | (COLOR_FG_BRIGHT_CYAN): New. | |
30973 | (COLOR_FG_BRIGHT_WHITE): New. | |
30974 | (COLOR_BG_BRIGHT_BLACK): New. | |
30975 | (COLOR_BG_BRIGHT_RED): New. | |
30976 | (COLOR_BG_BRIGHT_GREEN): New. | |
30977 | (COLOR_BG_BRIGHT_YELLOW): New. | |
30978 | (COLOR_BG_BRIGHT_BLUE): New. | |
30979 | (COLOR_BG_BRIGHT_MAGENTA): New. | |
30980 | (COLOR_BG_BRIGHT_CYAN): New. | |
30981 | (COLOR_BG_BRIGHT_WHITE): New. | |
30982 | * common.opt (fdiagnostics-text-art-charset=): New option. | |
30983 | (diagnostic-text-art.h): New SourceInclude. | |
30984 | (diagnostic_text_art_charset) New Enum and EnumValues. | |
30985 | * configure: Regenerate. | |
30986 | * configure.ac (gccdepdir): Add text-art to loop. | |
30987 | * diagnostic-diagram.h: New file. | |
30988 | * diagnostic-format-json.cc (json_emit_diagram): New. | |
30989 | (diagnostic_output_format_init_json): Wire it up to | |
30990 | context->m_diagrams.m_emission_cb. | |
30991 | * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and | |
30992 | "text-art/canvas.h". | |
30993 | (sarif_result::on_nested_diagnostic): Move code to... | |
30994 | (sarif_result::add_related_location): ...this new function. | |
30995 | (sarif_result::on_diagram): New. | |
30996 | (sarif_builder::emit_diagram): New. | |
30997 | (sarif_builder::make_message_object_for_diagram): New. | |
30998 | (sarif_emit_diagram): New. | |
30999 | (diagnostic_output_format_init_sarif): Set | |
31000 | context->m_diagrams.m_emission_cb to sarif_emit_diagram. | |
31001 | * diagnostic-text-art.h: New file. | |
31002 | * diagnostic.cc: Include "diagnostic-text-art.h", | |
31003 | "diagnostic-diagram.h", and "text-art/theme.h". | |
31004 | (diagnostic_initialize): Initialize context->m_diagrams and | |
31005 | call diagnostics_text_art_charset_init. | |
31006 | (diagnostic_finish): Clean up context->m_diagrams.m_theme. | |
31007 | (diagnostic_emit_diagram): New. | |
31008 | (diagnostics_text_art_charset_init): New. | |
31009 | * diagnostic.h (text_art::theme): New forward decl. | |
31010 | (class diagnostic_diagram): Likewise. | |
31011 | (diagnostic_context::m_diagrams): New field. | |
31012 | (diagnostic_emit_diagram): New decl. | |
31013 | * doc/invoke.texi (Diagnostic Message Formatting Options): Add | |
31014 | -fdiagnostics-text-art-charset=. | |
31015 | (-fdiagnostics-plain-output): Add | |
31016 | -fdiagnostics-text-art-charset=none. | |
31017 | * gcc.cc: Include "diagnostic-text-art.h". | |
31018 | (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_. | |
31019 | * opts-common.cc (decode_cmdline_options_to_array): Add | |
31020 | "-fdiagnostics-text-art-charset=none" to expanded_args for | |
31021 | -fdiagnostics-plain-output. | |
31022 | * opts.cc: Include "diagnostic-text-art.h". | |
31023 | (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_. | |
31024 | * pretty-print.cc (pp_unicode_character): New. | |
31025 | * pretty-print.h (pp_unicode_character): New decl. | |
31026 | * selftest-run-tests.cc: Include "text-art/selftests.h". | |
31027 | (selftest::run_tests): Call text_art_tests. | |
31028 | * text-art/box-drawing-chars.inc: New file, generated by | |
31029 | contrib/unicode/gen-box-drawing-chars.py. | |
31030 | * text-art/box-drawing.cc: New file. | |
31031 | * text-art/box-drawing.h: New file. | |
31032 | * text-art/canvas.cc: New file. | |
31033 | * text-art/canvas.h: New file. | |
31034 | * text-art/ruler.cc: New file. | |
31035 | * text-art/ruler.h: New file. | |
31036 | * text-art/selftests.cc: New file. | |
31037 | * text-art/selftests.h: New file. | |
31038 | * text-art/style.cc: New file. | |
31039 | * text-art/styled-string.cc: New file. | |
31040 | * text-art/table.cc: New file. | |
31041 | * text-art/table.h: New file. | |
31042 | * text-art/theme.cc: New file. | |
31043 | * text-art/theme.h: New file. | |
31044 | * text-art/types.h: New file. | |
31045 | * text-art/widget.cc: New file. | |
31046 | * text-art/widget.h: New file. | |
31047 | ||
31048 | 2023-06-21 Uros Bizjak <ubizjak@gmail.com> | |
31049 | ||
31050 | * function.h (emit_initial_value_sets): | |
31051 | Change return type from int to void. | |
31052 | (aggregate_value_p): Change return type from int to bool. | |
31053 | (prologue_contains): Ditto. | |
31054 | (epilogue_contains): Ditto. | |
31055 | (prologue_epilogue_contains): Ditto. | |
31056 | * function.cc (temp_slot): Make "in_use" variable bool. | |
31057 | (make_slot_available): Update for changed "in_use" variable. | |
31058 | (assign_stack_temp_for_type): Ditto. | |
31059 | (emit_initial_value_sets): Change return type from int to void | |
31060 | and update function body accordingly. | |
31061 | (instantiate_virtual_regs): Ditto. | |
31062 | (rest_of_handle_thread_prologue_and_epilogue): Ditto. | |
31063 | (safe_insn_predicate): Change return type from int to bool. | |
31064 | (aggregate_value_p): Change return type from int to bool | |
31065 | and update function body accordingly. | |
31066 | (prologue_contains): Change return type from int to bool. | |
31067 | (prologue_epilogue_contains): Ditto. | |
31068 | ||
31069 | 2023-06-21 Alexander Monakov <amonakov@ispras.ru> | |
31070 | ||
31071 | * common.opt (fp_contract_mode) [on]: Remove fallback. | |
31072 | * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test. | |
31073 | * doc/invoke.texi (-ffp-contract): Update. | |
31074 | * trans-mem.cc (diagnose_tm_1): Skip internal function calls. | |
31075 | ||
31076 | 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31077 | ||
31078 | * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): | |
31079 | Add alternatives to prefer to avoid same input and output Z register. | |
31080 | (mask_gather_load<mode><v_int_container>): Likewise. | |
31081 | (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. | |
31082 | (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. | |
31083 | (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. | |
31084 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): | |
31085 | Likewise. | |
31086 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): | |
31087 | Likewise. | |
31088 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31089 | <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. | |
31090 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31091 | <SVE_2BHSI:mode>_sxtw): Likewise. | |
31092 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31093 | <SVE_2BHSI:mode>_uxtw): Likewise. | |
31094 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31095 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31096 | (*aarch64_ldff1_gather<mode>_sxtw): Likewise. | |
31097 | (*aarch64_ldff1_gather<mode>_uxtw): Likewise. | |
31098 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> | |
31099 | <VNx4_NARROW:mode>): Likewise. | |
31100 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31101 | <VNx2_NARROW:mode>): Likewise. | |
31102 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31103 | <VNx2_NARROW:mode>_sxtw): Likewise. | |
31104 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31105 | <VNx2_NARROW:mode>_uxtw): Likewise. | |
31106 | * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. | |
31107 | (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> | |
31108 | <SVE_PARTIAL_I:mode>): Likewise. | |
31109 | ||
31110 | 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31111 | ||
31112 | * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): | |
31113 | Convert to compact alternatives syntax. | |
31114 | (mask_gather_load<mode><v_int_container>): Likewise. | |
31115 | (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. | |
31116 | (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. | |
31117 | (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. | |
31118 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): | |
31119 | Likewise. | |
31120 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): | |
31121 | Likewise. | |
31122 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31123 | <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. | |
31124 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31125 | <SVE_2BHSI:mode>_sxtw): Likewise. | |
31126 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31127 | <SVE_2BHSI:mode>_uxtw): Likewise. | |
31128 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31129 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31130 | (*aarch64_ldff1_gather<mode>_sxtw): Likewise. | |
31131 | (*aarch64_ldff1_gather<mode>_uxtw): Likewise. | |
31132 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> | |
31133 | <VNx4_NARROW:mode>): Likewise. | |
31134 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31135 | <VNx2_NARROW:mode>): Likewise. | |
31136 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31137 | <VNx2_NARROW:mode>_sxtw): Likewise. | |
31138 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31139 | <VNx2_NARROW:mode>_uxtw): Likewise. | |
31140 | * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. | |
31141 | (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> | |
31142 | <SVE_PARTIAL_I:mode>): Likewise. | |
31143 | ||
31144 | 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31145 | ||
31146 | Revert: | |
31147 | 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31148 | ||
31149 | * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): | |
31150 | Convert to compact alternatives syntax. | |
31151 | (mask_gather_load<mode><v_int_container>): Likewise. | |
31152 | (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. | |
31153 | (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. | |
31154 | (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. | |
31155 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): | |
31156 | Likewise. | |
31157 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): | |
31158 | Likewise. | |
31159 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31160 | <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. | |
31161 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31162 | <SVE_2BHSI:mode>_sxtw): Likewise. | |
31163 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31164 | <SVE_2BHSI:mode>_uxtw): Likewise. | |
31165 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31166 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31167 | (*aarch64_ldff1_gather<mode>_sxtw): Likewise. | |
31168 | (*aarch64_ldff1_gather<mode>_uxtw): Likewise. | |
31169 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> | |
31170 | <VNx4_NARROW:mode>): Likewise. | |
31171 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31172 | <VNx2_NARROW:mode>): Likewise. | |
31173 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31174 | <VNx2_NARROW:mode>_sxtw): Likewise. | |
31175 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31176 | <VNx2_NARROW:mode>_uxtw): Likewise. | |
31177 | * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. | |
31178 | (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> | |
31179 | <SVE_PARTIAL_I:mode>): Likewise. | |
31180 | ||
31181 | 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
31182 | ||
31183 | * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc. | |
31184 | (get_len_load_store_mode): Ditto. | |
31185 | * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h. | |
31186 | (get_len_load_store_mode): Ditto. | |
31187 | * optabs-tree.cc (can_vec_mask_load_store_p): New function. | |
31188 | (get_len_load_store_mode): Ditto. | |
31189 | * optabs-tree.h (can_vec_mask_load_store_p): Ditto. | |
31190 | (get_len_load_store_mode): Ditto. | |
31191 | * tree-if-conv.cc: include optabs-tree instead of optabs-query | |
31192 | ||
31193 | 2023-06-21 Richard Biener <rguenther@suse.de> | |
31194 | ||
31195 | * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use | |
31196 | split_constant_offset for the POINTER_PLUS_EXPR case. | |
31197 | ||
31198 | 2023-06-21 Richard Biener <rguenther@suse.de> | |
31199 | ||
31200 | * tree-ssa-loop-ivopts.cc (record_group_use): Use | |
31201 | split_constant_offset. | |
31202 | ||
31203 | 2023-06-21 Richard Biener <rguenther@suse.de> | |
31204 | ||
31205 | * tree-loop-distribution.cc (classify_builtin_st): Use | |
31206 | split_constant_offset. | |
31207 | * tree-ssa-loop-ivopts.h (strip_offset): Remove. | |
31208 | * tree-ssa-loop-ivopts.cc (strip_offset): Make static. | |
31209 | ||
31210 | 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31211 | ||
31212 | * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): | |
31213 | Convert to compact alternatives syntax. | |
31214 | (mask_gather_load<mode><v_int_container>): Likewise. | |
31215 | (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. | |
31216 | (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. | |
31217 | (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. | |
31218 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): | |
31219 | Likewise. | |
31220 | (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): | |
31221 | Likewise. | |
31222 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31223 | <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. | |
31224 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31225 | <SVE_2BHSI:mode>_sxtw): Likewise. | |
31226 | (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> | |
31227 | <SVE_2BHSI:mode>_uxtw): Likewise. | |
31228 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31229 | (@aarch64_ldff1_gather<mode>): Likewise. | |
31230 | (*aarch64_ldff1_gather<mode>_sxtw): Likewise. | |
31231 | (*aarch64_ldff1_gather<mode>_uxtw): Likewise. | |
31232 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> | |
31233 | <VNx4_NARROW:mode>): Likewise. | |
31234 | (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31235 | <VNx2_NARROW:mode>): Likewise. | |
31236 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31237 | <VNx2_NARROW:mode>_sxtw): Likewise. | |
31238 | (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> | |
31239 | <VNx2_NARROW:mode>_uxtw): Likewise. | |
31240 | * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. | |
31241 | (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> | |
31242 | <SVE_PARTIAL_I:mode>): Likewise. | |
31243 | ||
31244 | 2023-06-21 Tamar Christina <tamar.christina@arm.com> | |
31245 | ||
31246 | PR other/110329 | |
31247 | * doc/md.texi: Replace backslashchar. | |
31248 | ||
31249 | 2023-06-21 Richard Biener <rguenther@suse.de> | |
31250 | ||
31251 | * config/i386/i386.cc (ix86_vector_costs::finish_cost): | |
31252 | Overload. For masked main loops make sure the vectorization | |
31253 | factor isn't more than double the number of iterations. | |
31254 | ||
31255 | 2023-06-21 Jan Beulich <jbeulich@suse.com> | |
31256 | ||
31257 | * config/i386/i386-expand.cc (ix86_expand_copysign): Request | |
31258 | value duplication by ix86_build_signbit_mask() when AVX512F and | |
31259 | not HFmode. | |
31260 | * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to | |
31261 | 2-alternative form. Adjust "mode" attribute. Add "enabled" | |
31262 | attribute. | |
31263 | (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F | |
31264 | && !TARGET_PREFER_AVX256. | |
31265 | (*<avx512>_vpternlog<mode>_2): Likewise. | |
31266 | (*<avx512>_vpternlog<mode>_3): Likewise. | |
31267 | ||
31268 | 2023-06-21 liuhongt <hongtao.liu@intel.com> | |
31269 | ||
31270 | PR target/110018 | |
31271 | * tree-vect-stmts.cc (vectorizable_conversion): Use | |
31272 | intermiediate integer type for float_expr/fix_trunc_expr when | |
31273 | direct optab is not existed. | |
31274 | ||
31275 | 2023-06-20 Tamar Christina <tamar.christina@arm.com> | |
31276 | ||
31277 | PR bootstrap/110324 | |
31278 | * gensupport.cc (convert_syntax): Explicitly check for RTX code. | |
31279 | ||
31280 | 2023-06-20 Richard Sandiford <richard.sandiford@arm.com> | |
31281 | ||
31282 | * config/aarch64/aarch64.md (stack_tie): Hard-code the first | |
31283 | register operand to the stack pointer. Require the second register | |
31284 | operand to have the number specified in a separate const_int operand. | |
31285 | * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function. | |
31286 | (aarch64_allocate_and_probe_stack_space): Use it. | |
31287 | (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. | |
31288 | (aarch64_expand_epilogue): Likewise. | |
31289 | ||
31290 | 2023-06-20 Jakub Jelinek <jakub@redhat.com> | |
31291 | ||
31292 | PR middle-end/79173 | |
31293 | * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of | |
31294 | IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right | |
31295 | type. | |
31296 | ||
31297 | 2023-06-20 Uros Bizjak <ubizjak@gmail.com> | |
31298 | ||
31299 | * calls.h (setjmp_call_p): Change return type from int to bool. | |
31300 | * calls.cc (struct arg_data): Change "pass_on_stack" to bool. | |
31301 | (store_one_arg): Change return type from int to bool | |
31302 | and adjust function body accordingly. Change "sibcall_failure" | |
31303 | variable to bool. | |
31304 | (finalize_must_preallocate): Ditto. Change *must_preallocate pointer | |
31305 | argument to bool. Change "partial_seen" variable to bool. | |
31306 | (load_register_parameters): Change *sibcall_failure | |
31307 | pointer argument to bool. | |
31308 | (check_sibcall_argument_overlap_1): Change return type from int to bool | |
31309 | and adjust function body accordingly. | |
31310 | (check_sibcall_argument_overlap): Ditto. Change | |
31311 | "mark_stored_args_map" argument to bool. | |
31312 | (emit_call_1): Change "already_popped" variable to bool. | |
31313 | (setjmp_call_p): Change return type from int to bool | |
31314 | and adjust function body accordingly. | |
31315 | (initialize_argument_information): Change *must_preallocate | |
31316 | pointer argument to bool. | |
31317 | (expand_call): Change "pcc_struct_value", "must_preallocate" | |
31318 | and "sibcall_failure" variables to bool. | |
31319 | (emit_library_call_value_1): Change "pcc_struct_value" | |
31320 | variable to bool. | |
31321 | ||
31322 | 2023-06-20 Martin Jambor <mjambor@suse.cz> | |
31323 | ||
31324 | PR ipa/110276 | |
31325 | * ipa-sra.cc (struct caller_issues): New field there_is_one. | |
31326 | (check_for_caller_issues): Set it. | |
31327 | (check_all_callers_for_issues): Check it. | |
31328 | ||
31329 | 2023-06-20 Martin Jambor <mjambor@suse.cz> | |
31330 | ||
31331 | * ipa-prop.h (ipa_uid_to_idx_map_elt): New type. | |
31332 | (struct ipcp_transformation): Rearrange members according to | |
31333 | C++ class coding convention, add m_uid_to_idx, | |
31334 | get_param_index and maybe_create_parm_idx_map. | |
31335 | * ipa-cp.cc (ipcp_transformation::get_param_index): New function. | |
31336 | (compare_uids): Likewise. | |
31337 | (ipcp_transformation::maype_create_parm_idx_map): Likewise. | |
31338 | * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index. | |
31339 | (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL. | |
31340 | (ipcp_update_vr): Likewise. | |
31341 | (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail | |
31342 | out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr. | |
31343 | ||
31344 | 2023-06-20 Carl Love <cel@us.ibm.com> | |
31345 | ||
31346 | * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): | |
31347 | Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti. | |
31348 | Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti. | |
31349 | Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di. | |
31350 | Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di. | |
31351 | (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti, | |
31352 | CODE_FOR_xsiexpqp_kf_v2di): Add case statements. | |
31353 | * config/rs6000/rs6000-builtins.def | |
31354 | (__builtin_vsx_scalar_extract_exp_to_vec, | |
31355 | __builtin_vsx_scalar_extract_sig_to_vec, | |
31356 | __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions. | |
31357 | Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di, | |
31358 | xsxsigqp_kf_ti, xsiexpqp_kf_di respectively. | |
31359 | * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): | |
31360 | Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new | |
31361 | overloaded instance. Update comments. | |
31362 | * config/rs6000/rs6000-overload.def | |
31363 | (__builtin_vec_scalar_insert_exp): Add new overload definition with | |
31364 | vector arguments. | |
31365 | (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New | |
31366 | overloaded definitions. | |
31367 | * config/rs6000/vsx.md (V2DI_DI): New mode iterator. | |
31368 | (DI_to_TI): New mode attribute. | |
31369 | Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>. | |
31370 | Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>. | |
31371 | Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>. | |
31372 | * doc/extend.texi (scalar_extract_exp_to_vec, | |
31373 | scalar_extract_sig_to_vec): Add documentation for new builtins. | |
31374 | (scalar_insert_exp): Add new overloaded builtin definition. | |
31375 | ||
31376 | 2023-06-20 Li Xu <xuli1@eswincomputing.com> | |
31377 | ||
31378 | * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural | |
31379 | size of vector mask mode to one rvv register. | |
31380 | ||
31381 | 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
31382 | ||
31383 | * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen. | |
31384 | ||
31385 | 2023-06-20 Lehua Ding <lehua.ding@rivai.ai> | |
31386 | ||
31387 | * config/riscv/riscv.cc (riscv_arg_has_vector): Add default | |
31388 | switch handler. | |
31389 | ||
31390 | 2023-06-20 Richard Biener <rguenther@suse.de> | |
31391 | ||
31392 | * tree-ssa-dse.cc (dse_classify_store): When we found | |
31393 | no defs and the basic-block with the original definition | |
31394 | ends in __builtin_unreachable[_trap] the store is dead. | |
31395 | ||
31396 | 2023-06-20 Richard Biener <rguenther@suse.de> | |
31397 | ||
31398 | * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads | |
31399 | keep the virtual SSA form up-to-date. | |
31400 | ||
31401 | 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31402 | ||
31403 | * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>): | |
31404 | New define_insn_and_split. | |
31405 | ||
31406 | 2023-06-20 Tamar Christina <tamar.christina@arm.com> | |
31407 | ||
31408 | * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment. | |
31409 | ||
31410 | 2023-06-20 Jan Beulich <jbeulich@suse.com> | |
31411 | ||
31412 | * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input | |
31413 | constraint. Add new AVX512F alternative. | |
31414 | ||
31415 | 2023-06-20 Richard Biener <rguenther@suse.de> | |
31416 | ||
31417 | PR debug/110295 | |
31418 | * dwarf2out.cc (process_scope_var): Continue processing | |
31419 | the decl after setting a parent in case the existing DIE | |
31420 | was in limbo. | |
31421 | ||
31422 | 2023-06-20 Lehua Ding <lehua.ding@rivai.ai> | |
31423 | ||
31424 | * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete. | |
31425 | (riscv_arg_has_vector): Simplify. | |
31426 | (riscv_pass_in_vector_p): Adjust warning message. | |
31427 | ||
31428 | 2023-06-19 Jin Ma <jinma@linux.alibaba.com> | |
31429 | ||
31430 | * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR. | |
31431 | (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions. | |
31432 | * config/riscv/riscv.md (riscv_frcsr): New patterns. | |
31433 | (riscv_fscsr): Likewise. | |
31434 | ||
31435 | 2023-06-19 Toru Kisuki <tkisuki@tachyum.com> | |
31436 | ||
31437 | PR rtl-optimization/110305 | |
31438 | * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): | |
31439 | Handle HONOR_SNANS for x + 0.0. | |
31440 | ||
31441 | 2023-06-19 Jan Hubicka <jh@suse.cz> | |
31442 | ||
31443 | PR tree-optimization/109811 | |
31444 | PR tree-optimization/109849 | |
31445 | * passes.def: Add phiprop to early optimization passes. | |
31446 | * tree-ssa-phiprop.cc: Allow clonning. | |
31447 | ||
31448 | 2023-06-19 Tamar Christina <tamar.christina@arm.com> | |
31449 | ||
31450 | * config/aarch64/aarch64.md (arches): Add nosimd. | |
31451 | (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to | |
31452 | compact syntax. | |
31453 | ||
31454 | 2023-06-19 Tamar Christina <tamar.christina@arm.com> | |
31455 | Omar Tahir <Omar.Tahir2@arm.com> | |
31456 | ||
31457 | * gensupport.cc (class conlist, add_constraints, add_attributes, | |
31458 | skip_spaces, expect_char, preprocess_compact_syntax, | |
31459 | parse_section_layout, parse_section, convert_syntax): New. | |
31460 | (process_rtx): Check for conversion. | |
31461 | * genoutput.cc (process_template): Check for unresolved iterators. | |
31462 | (class data): Add compact_syntax_p. | |
31463 | (gen_insn): Use it. | |
31464 | * gensupport.h (compact_syntax): New. | |
31465 | (hash-set.h): Include. | |
31466 | * doc/md.texi: Document it. | |
31467 | ||
31468 | 2023-06-19 Uros Bizjak <ubizjak@gmail.com> | |
31469 | ||
31470 | * recog.h (check_asm_operands): Change return type from int to bool. | |
31471 | (insn_invalid_p): Ditto. | |
31472 | (verify_changes): Ditto. | |
31473 | (apply_change_group): Ditto. | |
31474 | (constrain_operands): Ditto. | |
31475 | (constrain_operands_cached): Ditto. | |
31476 | (validate_replace_rtx_subexp): Ditto. | |
31477 | (validate_replace_rtx): Ditto. | |
31478 | (validate_replace_rtx_part): Ditto. | |
31479 | (validate_replace_rtx_part_nosimplify): Ditto. | |
31480 | (added_clobbers_hard_reg_p): Ditto. | |
31481 | (peep2_regno_dead_p): Ditto. | |
31482 | (peep2_reg_dead_p): Ditto. | |
31483 | (store_data_bypass_p): Ditto. | |
31484 | (if_test_bypass_p): Ditto. | |
31485 | * rtl.h (split_all_insns_noflow): Change | |
31486 | return type from unsigned int to void. | |
31487 | * genemit.cc (output_added_clobbers_hard_reg_p): Change return type | |
31488 | of generated added_clobbers_hard_reg_p from int to bool and adjust | |
31489 | function body accordingly. Change "used" variable type from | |
31490 | int to bool. | |
31491 | * recog.cc (check_asm_operands): Change return type | |
31492 | from int to bool and adjust function body accordingly. | |
31493 | (insn_invalid_p): Ditto. Change "is_asm" variable to bool. | |
31494 | (verify_changes): Change return type from int to bool. | |
31495 | (apply_change_group): Change return type from int to bool | |
31496 | and adjust function body accordingly. | |
31497 | (validate_replace_rtx_subexp): Change return type from int to bool. | |
31498 | (validate_replace_rtx): Ditto. | |
31499 | (validate_replace_rtx_part): Ditto. | |
31500 | (validate_replace_rtx_part_nosimplify): Ditto. | |
31501 | (constrain_operands_cached): Ditto. | |
31502 | (constrain_operands): Ditto. Change "lose" and "win" | |
31503 | variables type from int to bool. | |
31504 | (split_all_insns_noflow): Change return type from unsigned int | |
31505 | to void and adjust function body accordingly. | |
31506 | (peep2_regno_dead_p): Change return type from int to bool. | |
31507 | (peep2_reg_dead_p): Ditto. | |
31508 | (peep2_find_free_register): Change "success" | |
31509 | variable type from int to bool | |
31510 | (store_data_bypass_p_1): Change return type from int to bool. | |
31511 | (store_data_bypass_p): Ditto. | |
31512 | ||
31513 | 2023-06-19 Li Xu <xuli1@eswincomputing.com> | |
31514 | ||
31515 | * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the | |
31516 | Zve32f extension. | |
31517 | ||
31518 | 2023-06-19 Pan Li <pan2.li@intel.com> | |
31519 | ||
31520 | PR target/110299 | |
31521 | * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for | |
31522 | modes. | |
31523 | * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64, | |
31524 | VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32, | |
31525 | VF_ZVE63 and VF_ZVE32. | |
31526 | * config/riscv/vector.md | |
31527 | (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed. | |
31528 | (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto. | |
31529 | (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto. | |
31530 | (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto. | |
31531 | (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto. | |
31532 | (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern. | |
31533 | (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto. | |
31534 | (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto. | |
31535 | (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto. | |
31536 | (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto. | |
31537 | ||
31538 | 2023-06-19 Pan Li <pan2.li@intel.com> | |
31539 | ||
31540 | PR target/110277 | |
31541 | * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for | |
31542 | ret_mode. | |
31543 | * config/riscv/vector-iterators.md: Add VHF, VSF, VDF, | |
31544 | VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr. | |
31545 | * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed. | |
31546 | (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto. | |
31547 | (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto. | |
31548 | (@pred_reduc_plus<order><mode><vlmul1>): Ditto. | |
31549 | (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto. | |
31550 | (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto. | |
31551 | (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern. | |
31552 | (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto. | |
31553 | (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto. | |
31554 | (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto. | |
31555 | (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto. | |
31556 | (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto. | |
31557 | ||
31558 | 2023-06-19 Andrew Stubbs <ams@codesourcery.com> | |
31559 | ||
31560 | * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function. | |
31561 | (gcn_init_libfuncs): Add div and mod functions for all modes. | |
31562 | Add placeholders for divmod functions. | |
31563 | (TARGET_EXPAND_DIVMOD_LIBFUNC): Define. | |
31564 | ||
31565 | 2023-06-19 Andrew Stubbs <ams@codesourcery.com> | |
31566 | ||
31567 | * tree-vect-generic.cc: Include optabs-libfuncs.h. | |
31568 | (get_compute_type): Check optab_libfunc. | |
31569 | * tree-vect-stmts.cc: Include optabs-libfuncs.h. | |
31570 | (vectorizable_operation): Check optab_libfunc. | |
31571 | ||
31572 | 2023-06-19 Andrew Stubbs <ams@codesourcery.com> | |
31573 | ||
31574 | * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function. | |
31575 | * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators. | |
31576 | (V_MOV, V_MOV_ALT): Likewise. | |
31577 | (scalar_mode, SCALAR_MODE): Add TImode. | |
31578 | (vnsi, VnSI, vndi, VnDI): Likewise. | |
31579 | (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV. | |
31580 | (mov<mode>, mov<mode>_unspec): Use V_MOV. | |
31581 | (*mov<mode>_4reg): New insn. | |
31582 | (mov<mode>_exec): New 4reg variant. | |
31583 | (mov<mode>_sgprbase): Likewise. | |
31584 | (reload_in<mode>, reload_out<mode>): Use V_MOV. | |
31585 | (vec_set<mode>): Likewise. | |
31586 | (vec_duplicate<mode><exec>): New 4reg variant. | |
31587 | (vec_extract<mode><scalar_mode>): Likewise. | |
31588 | (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ... | |
31589 | (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV. | |
31590 | (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant. | |
31591 | (fold_extract_last_<mode>): Use V_MOV. | |
31592 | (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ... | |
31593 | (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV. | |
31594 | (gather_load<mode><vnsi>, gather<mode>_expr<exec>, | |
31595 | gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>, | |
31596 | gather<mode>_insn_2offsets<exec>): Use V_MOV. | |
31597 | (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>, | |
31598 | scatter<mode>_insn_1offset<exec_scatter>, | |
31599 | scatter<mode>_insn_1offset_ds<exec_scatter>, | |
31600 | scatter<mode>_insn_2offsets<exec_scatter>): Likewise. | |
31601 | (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>, | |
31602 | mask_scatter_store<mode><vnsi>): Likewise. | |
31603 | * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p. | |
31604 | (gcn_hard_regno_mode_ok): Likewise. | |
31605 | (GEN_VNM): Add TImode support. | |
31606 | (USE_TI): New macro. Separate TImode operations from non-TImode ones. | |
31607 | (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode, | |
31608 | V8TImode, and V2TImode. | |
31609 | (print_operand): Add 'J' and 'K' print codes. | |
31610 | ||
31611 | 2023-06-19 Richard Biener <rguenther@suse.de> | |
31612 | ||
31613 | PR tree-optimization/110298 | |
31614 | * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely): | |
31615 | Clear number of iterations info before cleaning up the CFG. | |
31616 | ||
31617 | 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
31618 | ||
31619 | * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): | |
31620 | Simplify vec_concat of lowpart subreg and high part vec_select. | |
31621 | ||
31622 | 2023-06-19 Tobias Burnus <tobias@codesourcery.com> | |
31623 | ||
31624 | * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples. | |
31625 | ||
31626 | 2023-06-19 Richard Sandiford <richard.sandiford@arm.com> | |
31627 | ||
31628 | * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors): | |
31629 | Handle null niters_skip. | |
31630 | ||
31631 | 2023-06-19 Richard Biener <rguenther@suse.de> | |
31632 | ||
31633 | * config/aarch64/aarch64.cc | |
31634 | (aarch64_vector_costs::analyze_loop_vinfo): Fix reference | |
31635 | to LOOP_VINFO_MASKS. | |
31636 | ||
31637 | 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org> | |
31638 | ||
31639 | PR target/105523 | |
31640 | * common/config/avr/avr-common.cc: Remove setting | |
31641 | of OPT_fdelete_null_pointer_checks. | |
31642 | * config/avr/avr.cc (avr_option_override): Clear | |
31643 | flag_delete_null_pointer_checks if zero_address_valid. | |
31644 | (avr_addr_space_zero_address_valid): New function. | |
31645 | (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target | |
31646 | hook. | |
31647 | ||
31648 | 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
31649 | Robin Dapp <rdapp.gcc@gmail.com> | |
31650 | ||
31651 | * doc/md.texi: Add len_mask{load,store}. | |
31652 | * genopinit.cc (main): Ditto. | |
31653 | (CMP_NAME): Ditto. | |
31654 | * internal-fn.cc (len_maskload_direct): Ditto. | |
31655 | (len_maskstore_direct): Ditto. | |
31656 | (expand_call_mem_ref): Ditto. | |
31657 | (expand_partial_load_optab_fn): Ditto. | |
31658 | (expand_len_maskload_optab_fn): Ditto. | |
31659 | (expand_partial_store_optab_fn): Ditto. | |
31660 | (expand_len_maskstore_optab_fn): Ditto. | |
31661 | (direct_len_maskload_optab_supported_p): Ditto. | |
31662 | (direct_len_maskstore_optab_supported_p): Ditto. | |
31663 | * internal-fn.def (LEN_MASK_LOAD): Ditto. | |
31664 | (LEN_MASK_STORE): Ditto. | |
31665 | * optabs.def (OPTAB_CD): Ditto. | |
31666 | ||
31667 | 2023-06-19 Robin Dapp <rdapp@ventanamicro.com> | |
31668 | ||
31669 | * config/riscv/autovec.md (<optab><mode>2): Add unop expanders. | |
31670 | ||
31671 | 2023-06-19 Robin Dapp <rdapp@ventanamicro.com> | |
31672 | ||
31673 | * config/riscv/autovec.md (<optab><mode>3): Implement binop | |
31674 | expander. | |
31675 | * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare. | |
31676 | (enum vxrm_field_enum): Rename this... | |
31677 | (enum fixed_point_rounding_mode): ...to this. | |
31678 | (enum frm_field_enum): Rename this... | |
31679 | (enum floating_point_rounding_mode): ...to this. | |
31680 | * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function | |
31681 | * config/riscv/riscv.cc (riscv_const_insns): Clarify const | |
31682 | vector handling. | |
31683 | (riscv_libgcc_floating_mode_supported_p): Adjust comment. | |
31684 | (riscv_excess_precision): Do not convert to float for ZVFH. | |
31685 | * config/riscv/vector-iterators.md: Add VF_AUTO iterator. | |
31686 | ||
31687 | 2023-06-19 Robin Dapp <rdapp@ventanamicro.com> | |
31688 | ||
31689 | * config/riscv/vector-iterators.md: Add VI_QH iterator. | |
31690 | * config/riscv/autovec-opt.md | |
31691 | (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern | |
31692 | that includes sign extension. | |
31693 | (@pred_extract_first_sextsi<mode>): Dito for SImode. | |
31694 | ||
31695 | 2023-06-19 Robin Dapp <rdapp@ventanamicro.com> | |
31696 | ||
31697 | * config/riscv/autovec.md (vec_set<mode>): Implement. | |
31698 | (vec_extract<mode><vel>): Implement. | |
31699 | * config/riscv/riscv-protos.h (enum insn_type): Add slide insn. | |
31700 | (emit_vlmax_slide_insn): Declare. | |
31701 | (emit_nonvlmax_slide_tu_insn): Declare. | |
31702 | (emit_scalar_move_insn): Export. | |
31703 | (emit_nonvlmax_integer_move_insn): Export. | |
31704 | * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function. | |
31705 | (emit_nonvlmax_slide_tu_insn): New function. | |
31706 | (emit_vlmax_masked_mu_insn): No change. | |
31707 | (emit_vlmax_integer_move_insn): Export. | |
31708 | ||
31709 | 2023-06-19 Richard Biener <rguenther@suse.de> | |
31710 | ||
31711 | * tree-vectorizer.h (enum vect_partial_vector_style): New. | |
31712 | (_loop_vec_info::partial_vector_style): Likewise. | |
31713 | (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise. | |
31714 | (rgroup_controls::compare_type): Add. | |
31715 | (vec_loop_masks): Change from a typedef to auto_vec<> | |
31716 | to a structure. | |
31717 | * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors): | |
31718 | Adjust. Convert niters_skip to compare_type. | |
31719 | (vect_set_loop_condition_partial_vectors_avx512): New function | |
31720 | implementing the AVX512 partial vector codegen. | |
31721 | (vect_set_loop_condition): Dispatch to the correct | |
31722 | vect_set_loop_condition_partial_vectors_* function based on | |
31723 | LOOP_VINFO_PARTIAL_VECTORS_STYLE. | |
31724 | (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS | |
31725 | in the original niter type. | |
31726 | * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize | |
31727 | partial_vector_style. | |
31728 | (can_produce_all_loop_masks_p): Adjust. | |
31729 | (vect_verify_full_masking): Produce the rgroup_controls vector | |
31730 | here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success. | |
31731 | (vect_verify_full_masking_avx512): New function implementing | |
31732 | verification of AVX512 style masking. | |
31733 | (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE. | |
31734 | (vect_analyze_loop_2): Also try AVX512 style masking. | |
31735 | Adjust condition. | |
31736 | (vect_estimate_min_profitable_iters): Implement AVX512 style | |
31737 | mask producing cost. | |
31738 | (vect_record_loop_mask): Do not build the rgroup_controls | |
31739 | vector here but record masks in a hash-set. | |
31740 | (vect_get_loop_mask): Implement AVX512 style mask query, | |
31741 | complementing the existing while_ult style. | |
31742 | ||
31743 | 2023-06-19 Richard Biener <rguenther@suse.de> | |
31744 | ||
31745 | * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info | |
31746 | argument. | |
31747 | * tree-vect-loop.cc (vect_get_loop_mask): Likewise. | |
31748 | (vectorize_fold_left_reduction): Adjust. | |
31749 | (vect_transform_reduction): Likewise. | |
31750 | (vectorizable_live_operation): Likewise. | |
31751 | * tree-vect-stmts.cc (vectorizable_call): Likewise. | |
31752 | (vectorizable_operation): Likewise. | |
31753 | (vectorizable_store): Likewise. | |
31754 | (vectorizable_load): Likewise. | |
31755 | (vectorizable_condition): Likewise. | |
31756 | ||
31757 | 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org> | |
31758 | ||
31759 | PR target/110086 | |
31760 | * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task): | |
31761 | Add Optimization option property. | |
31762 | ||
31763 | 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
31764 | ||
31765 | * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn): | |
31766 | Add new pattern for the abovementioned case. | |
31767 | ||
31768 | 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
31769 | ||
31770 | * config/xtensa/xtensa.cc | |
31771 | (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove. | |
31772 | ||
31773 | 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com> | |
31774 | ||
31775 | * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define. | |
31776 | ||
31777 | 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com> | |
31778 | ||
31779 | * cse.cc (try_const_anchors): Check SCALAR_INT_MODE. | |
31780 | ||
31781 | 2023-06-19 liuhongt <hongtao.liu@intel.com> | |
31782 | ||
31783 | PR target/110235 | |
31784 | * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>): | |
31785 | Substitute with .. | |
31786 | (sse2_packsswb<mask_name>): .. this, .. | |
31787 | (avx2_packsswb<mask_name>): .. this and .. | |
31788 | (avx512bw_packsswb<mask_name>): .. this. | |
31789 | (<sse2_avx2>_packssdw<mask_name>): Substitute with .. | |
31790 | (sse2_packssdw<mask_name>): .. this, .. | |
31791 | (avx2_packssdw<mask_name>): .. this and .. | |
31792 | (avx512bw_packssdw<mask_name>): .. this. | |
31793 | ||
31794 | 2023-06-19 liuhongt <hongtao.liu@intel.com> | |
31795 | ||
31796 | PR target/110235 | |
31797 | * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use | |
31798 | UNSPEC_US_TRUNCATE instead of original us_truncate for | |
31799 | packusdw/packuswb. | |
31800 | * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute | |
31801 | with .. | |
31802 | (mmx_packsswb): .. this and .. | |
31803 | (mmx_packuswb): .. this. | |
31804 | (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original | |
31805 | us_truncate. | |
31806 | (s_trunsuffix): Removed code iterator. | |
31807 | (any_s_truncate): Ditto. | |
31808 | * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use | |
31809 | UNSPEC_US_TRUNCATE instead of original us_truncate. | |
31810 | (<sse4_1_avx2>_packusdw<mask_name>): Ditto. | |
31811 | * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum. | |
31812 | ||
31813 | 2023-06-18 Pan Li <pan2.li@intel.com> | |
31814 | ||
31815 | * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo. | |
31816 | ||
31817 | 2023-06-18 Uros Bizjak <ubizjak@gmail.com> | |
31818 | ||
31819 | * rtl.h (*rtx_equal_p_callback_function): | |
31820 | Change return type from int to bool. | |
31821 | (rtx_equal_p): Ditto. | |
31822 | (*hash_rtx_callback_function): Ditto. | |
31823 | * rtl.cc (rtx_equal_p): Change return type from int to bool | |
31824 | and adjust function body accordingly. | |
31825 | * early-remat.cc (scratch_equal): Ditto. | |
31826 | * sel-sched-ir.cc (skip_unspecs_callback): Ditto. | |
31827 | (hash_with_unspec_callback): Ditto. | |
31828 | ||
31829 | 2023-06-18 Jeff Law <jlaw@ventanamicro.com> | |
31830 | ||
31831 | * config/arc/arc.md (movqi_insn): Allow certain constants to | |
31832 | be stored into memory in the pattern's condition. | |
31833 | (movsf_insn): Similarly. | |
31834 | ||
31835 | 2023-06-18 Honza <jh@ryzen3.suse.cz> | |
31836 | ||
31837 | PR tree-optimization/109849 | |
31838 | * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter | |
31839 | ES; handle ipa_predicate::not_sra_candidate. | |
31840 | (evaluate_properties_for_edge): Pass es to | |
31841 | evaluate_conditions_for_known_args. | |
31842 | (ipa_fn_summary_t::duplicate): Handle sra candidates. | |
31843 | (dump_ipa_call_summary): Dump points_to_possible_sra_candidate. | |
31844 | (load_or_store_of_ptr_parameter): New function. | |
31845 | (points_to_possible_sra_candidate_p): New function. | |
31846 | (analyze_function_body): Initialize points_to_possible_sra_candidate; | |
31847 | determine sra predicates. | |
31848 | (estimate_ipcp_clone_size_and_time): Update call of | |
31849 | evaluate_conditions_for_known_args. | |
31850 | (remap_edge_params): Update points_to_possible_sra_candidate. | |
31851 | (read_ipa_call_summary): Stream points_to_possible_sra_candidate | |
31852 | (write_ipa_call_summary): Likewise. | |
31853 | * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate. | |
31854 | (dump_condition): Dump it. | |
31855 | * ipa-predicate.h (struct inline_param_summary): Add | |
31856 | points_to_possible_sra_candidate. | |
31857 | ||
31858 | 2023-06-18 Roger Sayle <roger@nextmovesoftware.com> | |
31859 | ||
31860 | * config/i386/i386-expand.cc (ix86_expand_carry): New helper | |
31861 | function for setting the carry flag. | |
31862 | (ix86_expand_builtin) <handlecarry>: Use it here. | |
31863 | * config/i386/i386-protos.h (ix86_expand_carry): Prototype here. | |
31864 | * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry. | |
31865 | (usubc<mode>5): Likewise. | |
31866 | ||
31867 | 2023-06-18 Roger Sayle <roger@nextmovesoftware.com> | |
31868 | ||
31869 | * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode | |
31870 | for the immediate constant shift count. | |
31871 | (*concat<mode><dwi>3_2): Likewise. | |
31872 | (*concat<mode><dwi>3_3): Likewise. | |
31873 | (*concat<mode><dwi>3_4): Likewise. | |
31874 | (*concat<mode><dwi>3_5): Likewise. | |
31875 | (*concat<mode><dwi>3_6): Likewise. | |
31876 | ||
31877 | 2023-06-18 Uros Bizjak <ubizjak@gmail.com> | |
31878 | ||
31879 | * cse.cc (hash_rtx_cb): Rename to hash_rtx. | |
31880 | (hash_rtx): Remove. | |
31881 | * early-remat.cc (remat_candidate_hasher::equal): Update | |
31882 | to call rtx_equal_p with rtx_equal_p_callback_function argument. | |
31883 | * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p. | |
31884 | (rtx_equal_p): Remove. | |
31885 | * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function | |
31886 | argument with NULL default value. | |
31887 | (rtx_equal_p_cb): Remove function declaration. | |
31888 | (hash_rtx_cb): Ditto. | |
31889 | (hash_rtx): Add hash_rtx_callback_function argument | |
31890 | with NULL default value. | |
31891 | * sel-sched-ir.cc (free_nop_pool): Update function comment. | |
31892 | (skip_unspecs_callback): Ditto. | |
31893 | (vinsn_init): Update to call hash_rtx with | |
31894 | hash_rtx_callback_function argument. | |
31895 | (vinsn_equal_p): Ditto. | |
31896 | ||
31897 | 2023-06-18 yulong <shiyulong@iscas.ac.cn> | |
31898 | ||
31899 | * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple. | |
31900 | * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro. | |
31901 | (ADJUST_ALIGNMENT): Ditto. | |
31902 | (RVV_TUPLE_PARTIAL_MODES): Ditto. | |
31903 | (ADJUST_NUNITS): Ditto. | |
31904 | * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): | |
31905 | New types. | |
31906 | (vfloat16mf4x3_t): Ditto. | |
31907 | (vfloat16mf4x4_t): Ditto. | |
31908 | (vfloat16mf4x5_t): Ditto. | |
31909 | (vfloat16mf4x6_t): Ditto. | |
31910 | (vfloat16mf4x7_t): Ditto. | |
31911 | (vfloat16mf4x8_t): Ditto. | |
31912 | (vfloat16mf2x2_t): Ditto. | |
31913 | (vfloat16mf2x3_t): Ditto. | |
31914 | (vfloat16mf2x4_t): Ditto. | |
31915 | (vfloat16mf2x5_t): Ditto. | |
31916 | (vfloat16mf2x6_t): Ditto. | |
31917 | (vfloat16mf2x7_t): Ditto. | |
31918 | (vfloat16mf2x8_t): Ditto. | |
31919 | (vfloat16m1x2_t): Ditto. | |
31920 | (vfloat16m1x3_t): Ditto. | |
31921 | (vfloat16m1x4_t): Ditto. | |
31922 | (vfloat16m1x5_t): Ditto. | |
31923 | (vfloat16m1x6_t): Ditto. | |
31924 | (vfloat16m1x7_t): Ditto. | |
31925 | (vfloat16m1x8_t): Ditto. | |
31926 | (vfloat16m2x2_t): Ditto. | |
31927 | (vfloat16m2x3_t): Ditto. | |
31928 | (vfloat16m2x4_t): Ditto. | |
31929 | (vfloat16m4x2_t): Ditto. | |
31930 | * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro. | |
31931 | (vfloat16mf4x3_t): Ditto. | |
31932 | (vfloat16mf4x4_t): Ditto. | |
31933 | (vfloat16mf4x5_t): Ditto. | |
31934 | (vfloat16mf4x6_t): Ditto. | |
31935 | (vfloat16mf4x7_t): Ditto. | |
31936 | (vfloat16mf4x8_t): Ditto. | |
31937 | (vfloat16mf2x2_t): Ditto. | |
31938 | (vfloat16mf2x3_t): Ditto. | |
31939 | (vfloat16mf2x4_t): Ditto. | |
31940 | (vfloat16mf2x5_t): Ditto. | |
31941 | (vfloat16mf2x6_t): Ditto. | |
31942 | (vfloat16mf2x7_t): Ditto. | |
31943 | (vfloat16mf2x8_t): Ditto. | |
31944 | (vfloat16m1x2_t): Ditto. | |
31945 | (vfloat16m1x3_t): Ditto. | |
31946 | (vfloat16m1x4_t): Ditto. | |
31947 | (vfloat16m1x5_t): Ditto. | |
31948 | (vfloat16m1x6_t): Ditto. | |
31949 | (vfloat16m1x7_t): Ditto. | |
31950 | (vfloat16m1x8_t): Ditto. | |
31951 | (vfloat16m2x2_t): Ditto. | |
31952 | (vfloat16m2x3_t): Ditto. | |
31953 | (vfloat16m2x4_t): Ditto. | |
31954 | (vfloat16m4x2_t): Ditto. | |
31955 | * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New. | |
31956 | * config/riscv/riscv.md: New. | |
31957 | * config/riscv/vector-iterators.md: New. | |
31958 | ||
31959 | 2023-06-17 Roger Sayle <roger@nextmovesoftware.com> | |
31960 | ||
31961 | * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is | |
31962 | CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast. | |
31963 | Generalize special case for converting TImode to V1TImode to handle | |
31964 | all 128-bit vector conversions. | |
31965 | ||
31966 | 2023-06-17 Costas Argyris <costas.argyris@gmail.com> | |
31967 | ||
31968 | * gcc-ar.cc (main): Refactor to slightly reduce code | |
31969 | duplication. Avoid unnecessary elements in nargv. | |
31970 | ||
31971 | 2023-06-16 Pan Li <pan2.li@intel.com> | |
31972 | ||
31973 | PR target/110265 | |
31974 | * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for | |
31975 | integer reduction expand. | |
31976 | * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI, | |
31977 | and the LMUL1 attr respectively. | |
31978 | * config/riscv/vector.md | |
31979 | (@pred_reduc_<reduc><mode><vlmul1>): Removed. | |
31980 | (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise. | |
31981 | (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise. | |
31982 | (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern. | |
31983 | (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise. | |
31984 | (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise. | |
31985 | (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise. | |
31986 | ||
31987 | 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
31988 | ||
31989 | PR target/110264 | |
31990 | * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug. | |
31991 | ||
31992 | 2023-06-16 Jakub Jelinek <jakub@redhat.com> | |
31993 | ||
31994 | PR middle-end/79173 | |
31995 | * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR, | |
31996 | BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR, | |
31997 | BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New | |
31998 | types. | |
31999 | * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL, | |
32000 | BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins. | |
32001 | * builtins.cc (fold_builtin_addc_subc): New function. | |
32002 | (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}. | |
32003 | * doc/extend.texi (__builtin_addc, __builtin_subc): Document. | |
32004 | ||
32005 | 2023-06-16 Jakub Jelinek <jakub@redhat.com> | |
32006 | ||
32007 | PR tree-optimization/110271 | |
32008 | * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children) | |
32009 | <case PLUS_EXPR>: Ignore return value from match_arith_overflow, | |
32010 | instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt. | |
32011 | ||
32012 | 2023-06-16 Martin Jambor <mjambor@suse.cz> | |
32013 | ||
32014 | * configure: Regenerate. | |
32015 | ||
32016 | 2023-06-16 Roger Sayle <roger@nextmovesoftware.com> | |
32017 | Uros Bizjak <ubizjak@gmail.com> | |
32018 | ||
32019 | PR target/31985 | |
32020 | * config/i386/i386.md (*add<dwi>3_doubleword_concat): New | |
32021 | define_insn_and_split combine *add<dwi>3_doubleword with | |
32022 | a *concat<mode><dwi>3 for more efficient lowering after reload. | |
32023 | ||
32024 | 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com> | |
32025 | ||
32026 | * ira-lives.cc: Include except.h. | |
32027 | (process_bb_node_lives): Ignore conflicts from cleanup exceptions | |
32028 | when the pseudo does not live at the exception landing pad. | |
32029 | ||
32030 | 2023-06-16 Alex Coplan <alex.coplan@arm.com> | |
32031 | ||
32032 | * doc/invoke.texi: Document -Welaborated-enum-base. | |
32033 | ||
32034 | 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32035 | ||
32036 | * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to... | |
32037 | (ushrn2_n): ... This. | |
32038 | (sqshrn2_n): Rename builtins to... | |
32039 | (ssqshrn2_n): ... This. | |
32040 | (uqshrn2_n): Rename builtins to... | |
32041 | (uqushrn2_n): ... This. | |
32042 | * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above. | |
32043 | (vqshrn_high_n_s32): Likewise. | |
32044 | (vqshrn_high_n_s64): Likewise. | |
32045 | (vqshrn_high_n_u16): Likewise. | |
32046 | (vqshrn_high_n_u32): Likewise. | |
32047 | (vqshrn_high_n_u64): Likewise. | |
32048 | (vshrn_high_n_s16): Likewise. | |
32049 | (vshrn_high_n_s32): Likewise. | |
32050 | (vshrn_high_n_s64): Likewise. | |
32051 | (vshrn_high_n_u16): Likewise. | |
32052 | (vshrn_high_n_u32): Likewise. | |
32053 | (vshrn_high_n_u64): Likewise. | |
32054 | * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le): | |
32055 | Rename to... | |
32056 | (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This. | |
32057 | Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check. | |
32058 | (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to... | |
32059 | (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This. | |
32060 | Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check. | |
32061 | (aarch64_<shrn_op>shrn2_n<mode>): Rename to... | |
32062 | (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This. | |
32063 | Update expander for the above. | |
32064 | ||
32065 | 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32066 | ||
32067 | * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to... | |
32068 | (shrn2_n): ... This. | |
32069 | (rshrn2): Rename builtins to... | |
32070 | (rshrn2_n): ... This. | |
32071 | * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above. | |
32072 | (vrshrn_high_n_s32): Likewise. | |
32073 | (vrshrn_high_n_s64): Likewise. | |
32074 | (vrshrn_high_n_u16): Likewise. | |
32075 | (vrshrn_high_n_u32): Likewise. | |
32076 | (vrshrn_high_n_u64): Likewise. | |
32077 | (vshrn_high_n_s16): Likewise. | |
32078 | (vshrn_high_n_s32): Likewise. | |
32079 | (vshrn_high_n_s64): Likewise. | |
32080 | (vshrn_high_n_u16): Likewise. | |
32081 | (vshrn_high_n_u32): Likewise. | |
32082 | (vshrn_high_n_u64): Likewise. | |
32083 | * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le): | |
32084 | Delete. | |
32085 | (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise. | |
32086 | (aarch64_shrn2<mode>_insn_le): Likewise. | |
32087 | (aarch64_shrn2<mode>_insn_be): Likewise. | |
32088 | (aarch64_shrn2<mode>): Likewise. | |
32089 | (aarch64_rshrn2<mode>_insn_le): Likewise. | |
32090 | (aarch64_rshrn2<mode>_insn_be): Likewise. | |
32091 | (aarch64_rshrn2<mode>): Likewise. | |
32092 | (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise. | |
32093 | (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn. | |
32094 | (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete. | |
32095 | (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn. | |
32096 | (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete. | |
32097 | (aarch64_<shrn_op>shrn2_n<mode>): New define_expand. | |
32098 | (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn. | |
32099 | (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn. | |
32100 | (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand. | |
32101 | (aarch64_sqshrun2_n<mode>_insn_le): New define_insn. | |
32102 | (aarch64_sqshrun2_n<mode>_insn_be): New define_insn. | |
32103 | (aarch64_sqshrun2_n<mode>): New define_expand. | |
32104 | (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn. | |
32105 | (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn. | |
32106 | (aarch64_sqrshrun2_n<mode>): New define_expand. | |
32107 | * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN, | |
32108 | UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN): | |
32109 | Delete unspec values. | |
32110 | (VQSHRN_N): Delete int iterator. | |
32111 | ||
32112 | 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32113 | ||
32114 | * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define. | |
32115 | * config/aarch64/aarch64-simd.md | |
32116 | (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to... | |
32117 | (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This. | |
32118 | Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition. | |
32119 | * config/aarch64/iterators.md (shrn_s): New code attribute. | |
32120 | ||
32121 | 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32122 | ||
32123 | * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>): | |
32124 | Rename to... | |
32125 | (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes. | |
32126 | (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn. | |
32127 | (aarch64_sqrshrun_n<mode>_insn): Likewise. | |
32128 | (aarch64_sqshrun_n<mode>_insn): Likewise. | |
32129 | (aarch64_<shrn_op>rshrn_n<mode>): New define_expand. | |
32130 | (aarch64_sqshrun_n<mode>): Likewise. | |
32131 | (aarch64_sqrshrun_n<mode>): Likewise. | |
32132 | * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes. | |
32133 | ||
32134 | 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32135 | ||
32136 | * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to... | |
32137 | (shrn_n): ... This. | |
32138 | (rshrn): Rename builtins to... | |
32139 | (rshrn_n): ... This. | |
32140 | * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above. | |
32141 | (vshrn_n_s32): Likewise. | |
32142 | (vshrn_n_s64): Likewise. | |
32143 | (vshrn_n_u16): Likewise. | |
32144 | (vshrn_n_u32): Likewise. | |
32145 | (vshrn_n_u64): Likewise. | |
32146 | (vrshrn_n_s16): Likewise. | |
32147 | (vrshrn_n_s32): Likewise. | |
32148 | (vrshrn_n_s64): Likewise. | |
32149 | (vrshrn_n_u16): Likewise. | |
32150 | (vrshrn_n_u32): Likewise. | |
32151 | (vrshrn_n_u64): Likewise. | |
32152 | * config/aarch64/aarch64-simd.md | |
32153 | (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete. | |
32154 | (aarch64_shrn<mode>): Likewise. | |
32155 | (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise. | |
32156 | (aarch64_rshrn<mode>): Likewise. | |
32157 | (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise. | |
32158 | (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise. | |
32159 | (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn. | |
32160 | (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise. | |
32161 | (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise. | |
32162 | (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise. | |
32163 | (aarch64_<shrn_op>shrn_n<mode>): New define_expand. | |
32164 | (aarch64_<shrn_op>rshrn_n<mode>): Likewise. | |
32165 | (aarch64_sqshrun_n<mode>): Likewise. | |
32166 | (aarch64_sqrshrun_n<mode>): Likewise. | |
32167 | * config/aarch64/iterators.md (ALL_TRUNC): New code iterator. | |
32168 | (TRUNCEXTEND): New code attribute. | |
32169 | (TRUNC_SHIFT): Likewise. | |
32170 | (shrn_op): Likewise. | |
32171 | * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode): | |
32172 | New predicate. | |
32173 | ||
32174 | 2023-06-16 Pan Li <pan2.li@intel.com> | |
32175 | ||
32176 | * config/riscv/riscv-vsetvl.cc | |
32177 | (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL. | |
32178 | ||
32179 | 2023-06-16 Richard Biener <rguenther@suse.de> | |
32180 | ||
32181 | PR tree-optimization/110278 | |
32182 | * match.pd (uns < (typeof uns)(uns != 0) -> false): New. | |
32183 | (x != (typeof x)(x == 0) -> true): Likewise. | |
32184 | ||
32185 | 2023-06-16 Pali Rohár <pali@kernel.org> | |
32186 | ||
32187 | * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=. | |
32188 | (REAL_LIBGCC_SPEC): New define. | |
32189 | * config/i386/mingw.opt: Add mcrtdll= | |
32190 | * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=. | |
32191 | (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=. | |
32192 | (STARTFILE_SPEC): Adjust for -mcrtdll=. | |
32193 | * doc/invoke.texi: Add mcrtdll= documentation. | |
32194 | ||
32195 | 2023-06-16 Simon Dardis <simon.dardis@imgtec.com> | |
32196 | ||
32197 | * config/mips/mips.cc (enum mips_code_readable_setting):New enmu. | |
32198 | (mips_handle_code_readable_attr):New static function. | |
32199 | (mips_get_code_readable_attr):New static enum function. | |
32200 | (mips_set_current_function):Set the code_readable mode. | |
32201 | (mips_option_override):Same as above. | |
32202 | * doc/extend.texi:Document code_readable. | |
32203 | ||
32204 | 2023-06-16 Richard Biener <rguenther@suse.de> | |
32205 | ||
32206 | PR tree-optimization/110269 | |
32207 | * fold-const.cc (fold_binary_loc): Merge x != 0 folding | |
32208 | with tree_expr_nonzero_p ... | |
32209 | * match.pd (cmp (convert? addr@0) integer_zerop): With this | |
32210 | pattern. | |
32211 | ||
32212 | 2023-06-15 Marek Polacek <polacek@redhat.com> | |
32213 | ||
32214 | * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie. | |
32215 | Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to | |
32216 | ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie. | |
32217 | * configure.ac (--enable-host-shared): Don't set PICFLAG here. | |
32218 | (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this | |
32219 | check. | |
32220 | * configure: Regenerate. | |
32221 | * doc/install.texi: Document --enable-host-pie. | |
32222 | ||
32223 | 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu> | |
32224 | ||
32225 | * regcprop.cc (maybe_mode_change): Enable stack pointer | |
32226 | propagation. | |
32227 | ||
32228 | 2023-06-15 Andrew MacLeod <amacleod@redhat.com> | |
32229 | ||
32230 | PR tree-optimization/110266 | |
32231 | * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer | |
32232 | complex type. | |
32233 | (adjust_realpart_expr): Ditto. | |
32234 | ||
32235 | 2023-06-15 Jan Beulich <jbeulich@suse.com> | |
32236 | ||
32237 | * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use | |
32238 | vmovddup. | |
32239 | ||
32240 | 2023-06-15 Jan Beulich <jbeulich@suse.com> | |
32241 | ||
32242 | * config/i386/constraints.md: Mention k and r for B. | |
32243 | ||
32244 | 2023-06-15 Lulu Cheng <chenglulu@loongson.cn> | |
32245 | Andrew Pinski <apinski@marvell.com> | |
32246 | ||
32247 | PR target/110136 | |
32248 | * config/loongarch/loongarch.md: Modify the register constraints for template | |
32249 | "jumptable" and "indirect_jump" from "r" to "e". | |
32250 | ||
32251 | 2023-06-15 Xi Ruoyao <xry111@xry111.site> | |
32252 | ||
32253 | * config/loongarch/loongarch-tune.h (loongarch_align): New | |
32254 | struct. | |
32255 | * config/loongarch/loongarch-def.h (loongarch_cpu_align): New | |
32256 | array. | |
32257 | * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define | |
32258 | the array. | |
32259 | * config/loongarch/loongarch.cc | |
32260 | (loongarch_option_override_internal): Set the value of | |
32261 | -falign-functions= if -falign-functions is enabled but no value | |
32262 | is given. Likewise for -falign-labels=. | |
32263 | ||
32264 | 2023-06-15 Jakub Jelinek <jakub@redhat.com> | |
32265 | ||
32266 | PR middle-end/79173 | |
32267 | * internal-fn.def (UADDC, USUBC): New internal functions. | |
32268 | * internal-fn.cc (expand_UADDC, expand_USUBC): New functions. | |
32269 | (commutative_ternary_fn_p): Return true also for IFN_UADDC. | |
32270 | * optabs.def (uaddc5_optab, usubc5_optab): New optabs. | |
32271 | * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart, | |
32272 | match_uaddc_usubc): New functions. | |
32273 | (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc | |
32274 | for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless | |
32275 | other optimizations have been successful for those. | |
32276 | * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC. | |
32277 | * fold-const-call.cc (fold_const_call): Likewise. | |
32278 | * gimple-range-fold.cc (adjust_imagpart_expr): Likewise. | |
32279 | * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise. | |
32280 | * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named | |
32281 | patterns. | |
32282 | * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New | |
32283 | define_expand patterns. | |
32284 | (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split | |
32285 | into NOTE_INSN_DELETED note rather than nop instruction. | |
32286 | (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>): | |
32287 | Likewise. | |
32288 | ||
32289 | 2023-06-15 Jakub Jelinek <jakub@redhat.com> | |
32290 | ||
32291 | PR middle-end/79173 | |
32292 | * config/i386/i386.md (subborrow<mode>): Add alternative with | |
32293 | memory destination and add for it define_peephole2 | |
32294 | TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory | |
32295 | destination in these patterns. | |
32296 | ||
32297 | 2023-06-15 Jakub Jelinek <jakub@redhat.com> | |
32298 | ||
32299 | PR middle-end/79173 | |
32300 | * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry, | |
32301 | addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add | |
32302 | define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer | |
32303 | using memory destination in these patterns. | |
32304 | ||
32305 | 2023-06-15 Jakub Jelinek <jakub@redhat.com> | |
32306 | ||
32307 | * gimple-fold.cc (gimple_fold_call): Move handling of arg0 | |
32308 | as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL} | |
32309 | and .{ADD,SUB,MUL}_OVERFLOW calls from here... | |
32310 | * fold-const-call.cc (fold_const_call): ... here. | |
32311 | ||
32312 | 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com> | |
32313 | ||
32314 | * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): | |
32315 | Rename to <su>abd<mode>3. | |
32316 | * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename | |
32317 | to <su>abd<mode>3. | |
32318 | ||
32319 | 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com> | |
32320 | ||
32321 | * doc/md.texi (sabd, uabd): Document them. | |
32322 | * internal-fn.def (ABD): Use new optab. | |
32323 | * optabs.def (sabd_optab, uabd_optab): New optabs, | |
32324 | * tree-vect-patterns.cc (vect_recog_absolute_difference): | |
32325 | Recognize the following idiom abs (a - b). | |
32326 | (vect_recog_sad_pattern): Refactor to use | |
32327 | vect_recog_absolute_difference. | |
32328 | (vect_recog_abd_pattern): Use patterns found by | |
32329 | vect_recog_absolute_difference to build a new ABD | |
32330 | internal call. | |
32331 | ||
32332 | 2023-06-15 chenxiaolong <chenxl04200420@163.com> | |
32333 | ||
32334 | * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value | |
32335 | of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally. | |
32336 | ||
32337 | 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32338 | ||
32339 | * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern. | |
32340 | (expand_vec_perm_const_1): Add merge optmization. | |
32341 | ||
32342 | 2023-06-15 Lehua Ding <lehua.ding@rivai.ai> | |
32343 | ||
32344 | PR target/110119 | |
32345 | * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode | |
32346 | (riscv_pass_by_reference): Return true for vector mode | |
32347 | ||
32348 | 2023-06-15 Pan Li <pan2.li@intel.com> | |
32349 | ||
32350 | * config/riscv/autovec-opt.md: Align the predictor sytle. | |
32351 | * config/riscv/autovec.md: Ditto. | |
32352 | ||
32353 | 2023-06-15 Pan Li <pan2.li@intel.com> | |
32354 | ||
32355 | * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask): | |
32356 | Take elen instead of scalar BITS_PER_WORD. | |
32357 | (expand_vector_init_merge_repeating_sequence): Use inner_bits_size | |
32358 | instead of scaler BITS_PER_WORD. | |
32359 | ||
32360 | 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
32361 | ||
32362 | * config/moxie/uclinux.h (MFWRAP_SPEC): Remove | |
32363 | ||
32364 | 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32365 | ||
32366 | * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): | |
32367 | Fix signed comparison warning in loop from npats to enelts. | |
32368 | ||
32369 | 2023-06-14 Thomas Schwinge <thomas@codesourcery.com> | |
32370 | ||
32371 | * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm' | |
32372 | to offloading compilation. | |
32373 | * config/gcn/mkoffload.cc (main): Adjust. | |
32374 | * config/nvptx/mkoffload.cc (main): Likewise. | |
32375 | * doc/invoke.texi (foffload-options): Update example. | |
32376 | ||
32377 | 2023-06-14 liuhongt <hongtao.liu@intel.com> | |
32378 | ||
32379 | PR target/110227 | |
32380 | * config/i386/sse.md (mov<mode>_internal>): Use x instead of v | |
32381 | for alternative 2 since there's no evex version for vpcmpeqd | |
32382 | ymm, ymm, ymm. | |
32383 | ||
32384 | 2023-06-13 Jeff Law <jlaw@ventanamicro.com> | |
32385 | ||
32386 | * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling. | |
32387 | ||
32388 | 2023-06-13 Jeff Law <jlaw@ventanamicro.com> | |
32389 | ||
32390 | * config/sh/divtab.cc: Remove. | |
32391 | ||
32392 | 2023-06-13 Jakub Jelinek <jakub@redhat.com> | |
32393 | ||
32394 | * config/i386/i386.cc (standard_sse_constant_opcode): Remove | |
32395 | superfluous spaces around \t for vpcmpeqd. | |
32396 | ||
32397 | 2023-06-13 Roger Sayle <roger@nextmovesoftware.com> | |
32398 | ||
32399 | * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother | |
32400 | clearing vectors with only a single element. Set CLEARED if the | |
32401 | vector was initialized to zero. | |
32402 | ||
32403 | 2023-06-13 Lehua Ding <lehua.ding@rivai.ai> | |
32404 | ||
32405 | * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate | |
32406 | #include. | |
32407 | (ENTRY): Undef. | |
32408 | (TUPLE_ENTRY): Undef. | |
32409 | ||
32410 | 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32411 | ||
32412 | * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment. | |
32413 | (shuffle_generic_patterns): Ditto. | |
32414 | (expand_vec_perm_const_1): Ditto. | |
32415 | ||
32416 | 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32417 | ||
32418 | * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug. | |
32419 | (shuffle_decompress_patterns): Ditto. | |
32420 | ||
32421 | 2023-06-13 Richard Biener <rguenther@suse.de> | |
32422 | ||
32423 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs. | |
32424 | ||
32425 | 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com> | |
32426 | Kito Cheng <kito.cheng@sifive.com> | |
32427 | ||
32428 | * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set | |
32429 | warning flag if func is not builtin | |
32430 | * config/riscv/riscv.cc | |
32431 | (riscv_scalable_vector_type_p): Determine whether the type is scalable vector. | |
32432 | (riscv_arg_has_vector): Determine whether the arg is vector type. | |
32433 | (riscv_pass_in_vector_p): Check the vector type param is passed by value. | |
32434 | (riscv_init_cumulative_args): The same as header. | |
32435 | (riscv_get_arg_info): Add the checking. | |
32436 | (riscv_function_value): Check the func return and set warning flag | |
32437 | * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to | |
32438 | determine whether warning psabi or not. | |
32439 | ||
32440 | 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32441 | ||
32442 | * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15. | |
32443 | Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values. | |
32444 | * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype. | |
32445 | * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15 | |
32446 | with TP_TPIDRURO. | |
32447 | (arm_output_load_tpidr): Define. | |
32448 | * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP. | |
32449 | * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output | |
32450 | assembly. | |
32451 | (reload_tp_hard): Likewise. | |
32452 | * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for | |
32453 | arm_tp_type. | |
32454 | * doc/invoke.texi (Arm Options, mtp): Document new values. | |
32455 | ||
32456 | 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32457 | ||
32458 | PR target/108779 | |
32459 | * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add | |
32460 | AARCH64_TPIDRRO_EL0 value. | |
32461 | * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define. | |
32462 | * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2, | |
32463 | tpidr_el3, tpidrro_el3): New accepted values to -mtp=. | |
32464 | * doc/invoke.texi (AArch64 Options): Document new -mtp= options. | |
32465 | ||
32466 | 2023-06-13 Alexandre Oliva <oliva@adacore.com> | |
32467 | ||
32468 | * range-op-float.cc (frange_nextafter): Drop inline. | |
32469 | (frelop_early_resolve): Add static. | |
32470 | (frange_float): Likewise. | |
32471 | ||
32472 | 2023-06-13 Richard Biener <rguenther@suse.de> | |
32473 | ||
32474 | PR middle-end/110232 | |
32475 | * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT | |
32476 | to check whether the buffer covers the whole vector. | |
32477 | ||
32478 | 2023-06-13 Richard Biener <rguenther@suse.de> | |
32479 | ||
32480 | * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For | |
32481 | .MASK_LOAD and friends set the size of the access to unknown. | |
32482 | ||
32483 | 2023-06-13 Tejas Belagod <tbelagod@arm.com> | |
32484 | ||
32485 | PR target/96339 | |
32486 | * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve | |
32487 | calls that have a constant input predicate vector. | |
32488 | (svlast_impl::is_lasta): Query to check if intrinsic is svlasta. | |
32489 | (svlast_impl::is_lastb): Query to check if intrinsic is svlastb. | |
32490 | (svlast_impl::vect_all_same): Check if all vector elements are equal. | |
32491 | ||
32492 | 2023-06-13 Andi Kleen <ak@linux.intel.com> | |
32493 | ||
32494 | * config/i386/gcc-auto-profile: Regenerate. | |
32495 | ||
32496 | 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32497 | ||
32498 | * config/riscv/vector-iterators.md: Fix requirement. | |
32499 | ||
32500 | 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32501 | ||
32502 | * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function. | |
32503 | (shuffle_decompress_patterns): New function. | |
32504 | (expand_vec_perm_const_1): Add decompress optimization. | |
32505 | ||
32506 | 2023-06-12 Jeff Law <jlaw@ventanamicro.com> | |
32507 | ||
32508 | PR rtl-optimization/101188 | |
32509 | * postreload.cc (reload_cse_move2add_invalidate): New function, | |
32510 | extracted from... | |
32511 | (reload_cse_move2add): Call reload_cse_move2add_invalidate. | |
32512 | ||
32513 | 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
32514 | ||
32515 | * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition | |
32516 | if (n_var == n_elts && n_elts <= 16) to allow a single constant, | |
32517 | and if maxv == 1, use constant element for duplicating into register. | |
32518 | ||
32519 | 2023-06-12 Tobias Burnus <tobias@codesourcery.com> | |
32520 | ||
32521 | * gimplify.cc (gimplify_adjust_omp_clauses_1): Use | |
32522 | GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping. | |
32523 | (gimplify_adjust_omp_clauses): Change | |
32524 | GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent | |
32525 | GOMP_MAP_FORCE_PRESENT. | |
32526 | * omp-low.cc (lower_omp_target): Remove handling of no-longer valid | |
32527 | GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for | |
32528 | to/from clauses with present modifier. | |
32529 | ||
32530 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32531 | ||
32532 | PR tree-optimization/110205 | |
32533 | * range-op-float.cc (range_operator::fold_range): Add default FII | |
32534 | fold routine. | |
32535 | * range-op-mixed.h (class operator_gt): Add missing final overrides. | |
32536 | * range-op.cc (range_op_handler::fold_range): Add RO_FII case. | |
32537 | (operator_lshift ::update_bitmask): Add final override. | |
32538 | (operator_rshift ::update_bitmask): Add final override. | |
32539 | * range-op.h (range_operator::fold_range): Add FII prototype. | |
32540 | ||
32541 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32542 | ||
32543 | * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard): | |
32544 | Use range_op_handler directly. | |
32545 | * range-op.cc (range_op_handler::range_op_handler): Unsigned | |
32546 | param instead of tree-code. | |
32547 | (ptr_op_widen_plus_signed): Delete. | |
32548 | (ptr_op_widen_plus_unsigned): Delete. | |
32549 | (ptr_op_widen_mult_signed): Delete. | |
32550 | (ptr_op_widen_mult_unsigned): Delete. | |
32551 | (range_op_table::initialize_integral_ops): Add new opcodes. | |
32552 | * range-op.h (range_op_handler): Use unsigned. | |
32553 | (OP_WIDEN_MULT_SIGNED): New. | |
32554 | (OP_WIDEN_MULT_UNSIGNED): New. | |
32555 | (OP_WIDEN_PLUS_SIGNED): New. | |
32556 | (OP_WIDEN_PLUS_UNSIGNED): New. | |
32557 | (RANGE_OP_TABLE_SIZE): New. | |
32558 | (range_op_table::operator []): Use unsigned. | |
32559 | (range_op_table::set): Use unsigned. | |
32560 | (m_range_tree): Make unsigned. | |
32561 | (ptr_op_widen_mult_signed): Remove. | |
32562 | (ptr_op_widen_mult_unsigned): Remove. | |
32563 | (ptr_op_widen_plus_signed): Remove. | |
32564 | (ptr_op_widen_plus_unsigned): Remove. | |
32565 | ||
32566 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32567 | ||
32568 | * gimple-range-op.cc (gimple_range_op_handler): Set m_operator | |
32569 | manually as there is no access to the default operator. | |
32570 | (cfn_copysign::fold_range): Don't check for validity. | |
32571 | (cfn_ubsan::fold_range): Ditto. | |
32572 | (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL. | |
32573 | * range-op.cc (default_operator): New. | |
32574 | (range_op_handler::range_op_handler): Use default_operator | |
32575 | instead of NULL. | |
32576 | (range_op_handler::operator bool): Move from header, compare | |
32577 | against default operator. | |
32578 | (range_op_handler::range_op): New. | |
32579 | * range-op.h (range_op_handler::operator bool): Move. | |
32580 | ||
32581 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32582 | ||
32583 | * range-op.cc (unified_table): Delete. | |
32584 | (range_op_table operator_table): Instantiate. | |
32585 | (range_op_table::range_op_table): Rename from unified_table. | |
32586 | (range_op_handler::range_op_handler): Use range_op_table. | |
32587 | * range-op.h (range_op_table::operator []): Inline. | |
32588 | (range_op_table::set): Inline. | |
32589 | ||
32590 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32591 | ||
32592 | * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not | |
32593 | pass type. | |
32594 | * gimple-range-op.cc (get_code): Rename from get_code_and_type | |
32595 | and simplify. | |
32596 | (gimple_range_op_handler::supported_p): No need for type. | |
32597 | (gimple_range_op_handler::gimple_range_op_handler): Ditto. | |
32598 | (cfn_copysign::fold_range): Ditto. | |
32599 | (cfn_ubsan::fold_range): Ditto. | |
32600 | * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto. | |
32601 | * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto. | |
32602 | * range-op-float.cc (operator_plus::op1_range): Ditto. | |
32603 | (operator_mult::op1_range): Ditto. | |
32604 | (range_op_float_tests): Ditto. | |
32605 | * range-op.cc (get_op_handler): Remove. | |
32606 | (range_op_handler::set_op_handler): Remove. | |
32607 | (operator_plus::op1_range): No need for type. | |
32608 | (operator_minus::op1_range): Ditto. | |
32609 | (operator_mult::op1_range): Ditto. | |
32610 | (operator_exact_divide::op1_range): Ditto. | |
32611 | (operator_cast::op1_range): Ditto. | |
32612 | (perator_bitwise_not::fold_range): Ditto. | |
32613 | (operator_negate::fold_range): Ditto. | |
32614 | * range-op.h (range_op_handler::range_op_handler): Remove type param. | |
32615 | (range_cast): No need for type. | |
32616 | (range_op_table::operator[]): Check for enum_code >= 0. | |
32617 | * tree-data-ref.cc (compute_distributive_range): No need for type. | |
32618 | * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto. | |
32619 | * value-query.cc (range_query::get_tree_range): Ditto. | |
32620 | * value-relation.cc (relation_oracle::validate_relation): Ditto. | |
32621 | * vr-values.cc (range_of_var_in_loop): Ditto. | |
32622 | (simplify_using_ranges::fold_cond_with_ops): Ditto. | |
32623 | ||
32624 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32625 | ||
32626 | * range-op-mixed.h (operator_max): Remove final. | |
32627 | * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR. | |
32628 | (pointer_table::pointer_table): Remove. | |
32629 | (class hybrid_max_operator): New. | |
32630 | (range_op_table::initialize_pointer_ops): Add hybrid_max_operator. | |
32631 | * range-op.cc (pointer_tree_table): Remove. | |
32632 | (unified_table::unified_table): Comment out MAX_EXPR. | |
32633 | (get_op_handler): Remove check of pointer table. | |
32634 | * range-op.h (class pointer_table): Remove. | |
32635 | ||
32636 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32637 | ||
32638 | * range-op-mixed.h (operator_min): Remove final. | |
32639 | * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR. | |
32640 | (class hybrid_min_operator): New. | |
32641 | (range_op_table::initialize_pointer_ops): Add hybrid_min_operator. | |
32642 | * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR. | |
32643 | ||
32644 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32645 | ||
32646 | * range-op-mixed.h (operator_bitwise_or): Remove final. | |
32647 | * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR. | |
32648 | (class hybrid_or_operator): New. | |
32649 | (range_op_table::initialize_pointer_ops): Add hybrid_or_operator. | |
32650 | * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR. | |
32651 | ||
32652 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32653 | ||
32654 | * range-op-mixed.h (operator_bitwise_and): Remove final. | |
32655 | * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR. | |
32656 | (class hybrid_and_operator): New. | |
32657 | (range_op_table::initialize_pointer_ops): Add hybrid_and_operator. | |
32658 | * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR. | |
32659 | ||
32660 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32661 | ||
32662 | * Makefile.in (OBJS): Add range-op-ptr.o. | |
32663 | * range-op-mixed.h (update_known_bitmask): Move prototype here. | |
32664 | (minus_op1_op2_relation_effect): Move prototype here. | |
32665 | (wi_includes_zero_p): Move function to here. | |
32666 | (wi_zero_p): Ditto. | |
32667 | * range-op.cc (update_known_bitmask): Remove static. | |
32668 | (wi_includes_zero_p): Move to header. | |
32669 | (wi_zero_p): Move to header. | |
32670 | (minus_op1_op2_relation_effect): Remove static. | |
32671 | (operator_pointer_diff): Move class and routines to range-op-ptr.cc. | |
32672 | (pointer_plus_operator): Ditto. | |
32673 | (pointer_min_max_operator): Ditto. | |
32674 | (pointer_and_operator): Ditto. | |
32675 | (pointer_or_operator): Ditto. | |
32676 | (pointer_table): Ditto. | |
32677 | (range_op_table::initialize_pointer_ops): Ditto. | |
32678 | * range-op-ptr.cc: New. | |
32679 | ||
32680 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32681 | ||
32682 | * range-op-mixed.h (class operator_max): Move from... | |
32683 | * range-op.cc (unified_table::unified_table): Add MAX_EXPR. | |
32684 | (get_op_handler): Remove the integral table. | |
32685 | (class operator_max): Move from here. | |
32686 | (integral_table::integral_table): Delete. | |
32687 | * range-op.h (class integral_table): Delete. | |
32688 | ||
32689 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32690 | ||
32691 | * range-op-mixed.h (class operator_min): Move from... | |
32692 | * range-op.cc (unified_table::unified_table): Add MIN_EXPR. | |
32693 | (class operator_min): Move from here. | |
32694 | (integral_table::integral_table): Remove MIN_EXPR. | |
32695 | ||
32696 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32697 | ||
32698 | * range-op-mixed.h (class operator_bitwise_or): Move from... | |
32699 | * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR. | |
32700 | (class operator_bitwise_or): Move from here. | |
32701 | (integral_table::integral_table): Remove BIT_IOR_EXPR. | |
32702 | ||
32703 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32704 | ||
32705 | * range-op-mixed.h (class operator_bitwise_and): Move from... | |
32706 | * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR. | |
32707 | (get_op_handler): Check for a pointer table entry first. | |
32708 | (class operator_bitwise_and): Move from here. | |
32709 | (integral_table::integral_table): Remove BIT_AND_EXPR. | |
32710 | ||
32711 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32712 | ||
32713 | * range-op-mixed.h (class operator_bitwise_xor): Move from... | |
32714 | * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR. | |
32715 | (class operator_bitwise_xor): Move from here. | |
32716 | (integral_table::integral_table): Remove BIT_XOR_EXPR. | |
32717 | (pointer_table::pointer_table): Remove BIT_XOR_EXPR. | |
32718 | ||
32719 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32720 | ||
32721 | * range-op-mixed.h (class operator_bitwise_not): Move from... | |
32722 | * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR. | |
32723 | (class operator_bitwise_not): Move from here. | |
32724 | (integral_table::integral_table): Remove BIT_NOT_EXPR. | |
32725 | (pointer_table::pointer_table): Remove BIT_NOT_EXPR. | |
32726 | ||
32727 | 2023-06-12 Andrew MacLeod <amacleod@redhat.com> | |
32728 | ||
32729 | * range-op-mixed.h (class operator_addr_expr): Move from... | |
32730 | * range-op.cc (unified_table::unified_table): Add ADDR_EXPR. | |
32731 | (class operator_addr_expr): Move from here. | |
32732 | (integral_table::integral_table): Remove ADDR_EXPR. | |
32733 | (pointer_table::pointer_table): Remove ADDR_EXPR. | |
32734 | ||
32735 | 2023-06-12 Pan Li <pan2.li@intel.com> | |
32736 | ||
32737 | * config/riscv/riscv-vector-builtins-types.def | |
32738 | (vfloat16m1_t): Add type to lmul1 ops. | |
32739 | (vfloat16m2_t): Likewise. | |
32740 | (vfloat16m4_t): Likewise. | |
32741 | ||
32742 | 2023-06-12 Richard Biener <rguenther@suse.de> | |
32743 | ||
32744 | * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For | |
32745 | .MASK_STORE and friend set the size of the access to | |
32746 | unknown. | |
32747 | ||
32748 | 2023-06-12 Tamar Christina <tamar.christina@arm.com> | |
32749 | ||
32750 | * config.in: Regenerate. | |
32751 | * configure: Regenerate. | |
32752 | * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS. | |
32753 | ||
32754 | 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32755 | ||
32756 | * config/riscv/autovec-opt.md | |
32757 | (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern. | |
32758 | (*<any_shiftrt:optab>trunc<mode>): Ditto. | |
32759 | * config/riscv/autovec.md (<optab><mode>3): Change to | |
32760 | define_insn_and_split. | |
32761 | (v<optab><mode>3): Ditto. | |
32762 | (trunc<mode><v_double_trunc>2): Ditto. | |
32763 | ||
32764 | 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
32765 | ||
32766 | * simplify-rtx.cc (simplify_const_unary_operation): | |
32767 | Handle US_TRUNCATE, SS_TRUNCATE. | |
32768 | ||
32769 | 2023-06-12 Eric Botcazou <ebotcazou@adacore.com> | |
32770 | ||
32771 | PR modula2/109952 | |
32772 | * doc/gm2.texi (Standard procedures): Fix Next link. | |
32773 | ||
32774 | 2023-06-12 Tamar Christina <tamar.christina@arm.com> | |
32775 | ||
32776 | * config.in: Regenerate. | |
32777 | ||
32778 | 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
32779 | ||
32780 | PR middle-end/110142 | |
32781 | * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass | |
32782 | subtype to vect_widened_op_tree and remove subtype parameter, also | |
32783 | remove superfluous overloaded function definition. | |
32784 | (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass | |
32785 | to call to vect_recog_widen_op_pattern. | |
32786 | (vect_recog_widen_minus_pattern): Likewise. | |
32787 | ||
32788 | 2023-06-12 liuhongt <hongtao.liu@intel.com> | |
32789 | ||
32790 | * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander. | |
32791 | (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto. | |
32792 | (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto. | |
32793 | (vec_unpacks_lo_<mode>): Ditto. | |
32794 | (vec_unpacks_hi_<mode>): Ditto. | |
32795 | (sse_movlhps_<mode>): New define_insn. | |
32796 | (ssse3_palignr<mode>_perm): Extend to V_128H. | |
32797 | (V_128H): New mode iterator. | |
32798 | (ssepackPHmode): New mode attribute. | |
32799 | (vunpck_extract_mode): Ditto. | |
32800 | (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16. | |
32801 | (vpckfloat_temp_mode): Ditto. | |
32802 | (vpckfloat_op_mode): Ditto. | |
32803 | (vunpckfixt_mode): Extend to VxHF. | |
32804 | (vunpckfixt_model): Ditto. | |
32805 | (vunpckfixt_extract_mode): Ditto. | |
32806 | ||
32807 | 2023-06-12 Richard Biener <rguenther@suse.de> | |
32808 | ||
32809 | PR middle-end/110200 | |
32810 | * genmatch.cc (expr::gen_transform): Put braces around | |
32811 | the if arm for the (convert ...) short-cut. | |
32812 | ||
32813 | 2023-06-12 Kewen Lin <linkw@linux.ibm.com> | |
32814 | ||
32815 | PR target/109932 | |
32816 | * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128, | |
32817 | __builtin_unpack_vector_int128): Move from stanza power7 to vsx. | |
32818 | ||
32819 | 2023-06-12 Kewen Lin <linkw@linux.ibm.com> | |
32820 | ||
32821 | PR target/110011 | |
32822 | * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit | |
32823 | floating constant itself for real_to_target call. | |
32824 | ||
32825 | 2023-06-12 Pan Li <pan2.li@intel.com> | |
32826 | ||
32827 | * config/riscv/riscv-vector-builtins-types.def | |
32828 | (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops. | |
32829 | (vfloat16mf2_t): Ditto. | |
32830 | (vfloat16m1_t): Ditto. | |
32831 | (vfloat16m2_t): Ditto. | |
32832 | (vfloat16m4_t): Ditto. | |
32833 | ||
32834 | 2023-06-12 David Edelsohn <dje.gcc@gmail.com> | |
32835 | ||
32836 | * config/rs6000/rs6000-logue.cc (rs6000_stack_info): | |
32837 | Do not require a stack frame when debugging is enabled for AIX. | |
32838 | ||
32839 | 2023-06-11 Georg-Johann Lay <avr@gjlay.de> | |
32840 | ||
32841 | * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]: | |
32842 | Remove attribute values. | |
32843 | (insv_notbit): New post-reload insn. | |
32844 | (*insv.not-shiftrt_split, *insv.xor1-bit.0_split) | |
32845 | (*insv.not-bit.0_split, *insv.not-bit.7_split) | |
32846 | (*insv.xor-extract_split): Split to insv_notbit. | |
32847 | (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7) | |
32848 | (*insv.xor-extract): Remove post-reload insns. | |
32849 | * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter. | |
32850 | (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit. | |
32851 | [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases. | |
32852 | * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype. | |
32853 | ||
32854 | 2023-06-11 Georg-Johann Lay <avr@gjlay.de> | |
32855 | ||
32856 | PR target/109907 | |
32857 | * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements. | |
32858 | (MSB, SIZE): New mode attributes. | |
32859 | (any_shift): New code iterator. | |
32860 | (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3) | |
32861 | (*lshr<mode>3_const_split): Add constraint alternative for | |
32862 | the case of shift-offset = MSB. Ditch "length" attribute. | |
32863 | (extzv<mode): New. replaces extzv. Adjust following patterns. | |
32864 | Use avr_out_extr, avr_out_extr_not to print asm. | |
32865 | (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor) | |
32866 | (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New. | |
32867 | * config/avr/constraints.md (C15, C23, C31, Yil): New | |
32868 | * config/avr/predicates.md (reg_or_low_io_operand) | |
32869 | (const7_operand, reg_or_low_io_operand) | |
32870 | (const15_operand, const_0_to_15_operand) | |
32871 | (const23_operand, const_0_to_23_operand) | |
32872 | (const31_operand, const_0_to_31_operand): New. | |
32873 | * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New. | |
32874 | * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs. | |
32875 | (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust | |
32876 | MSB case to new insn constraint "r" for operands[1]. | |
32877 | (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]: | |
32878 | Handle these cases. | |
32879 | (avr_rtx_costs_1): Adjust cost for a new pattern. | |
32880 | ||
32881 | 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32882 | ||
32883 | * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization. | |
32884 | (vector_insn_info::parse_insn): Add rtx_insn parse. | |
32885 | (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization. | |
32886 | (get_first_vsetvl): New function. | |
32887 | (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto. | |
32888 | (pass_vsetvl::cleanup_insns): Remove it. | |
32889 | (pass_vsetvl::ssa_post_optimization): New function. | |
32890 | (has_no_uses): Ditto. | |
32891 | (pass_vsetvl::propagate_avl): Remove it. | |
32892 | (pass_vsetvl::df_post_optimization): New function. | |
32893 | (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6. | |
32894 | * config/riscv/riscv-vsetvl.h: Adapt declaration. | |
32895 | ||
32896 | 2023-06-10 Aldy Hernandez <aldyh@redhat.com> | |
32897 | ||
32898 | * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument. | |
32899 | (ipcp_vr_lattice::print): Call dump method. | |
32900 | (ipcp_vr_lattice::meet_with): Adjust for m_vr being a | |
32901 | Value_Range. | |
32902 | (ipcp_vr_lattice::meet_with_1): Make argument a reference. | |
32903 | (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported | |
32904 | range. | |
32905 | (initialize_node_lattices): Pass type when appropriate. | |
32906 | (ipa_vr_operation_and_type_effects): Make type agnostic. | |
32907 | (ipa_value_range_from_jfunc): Same. | |
32908 | (propagate_vr_across_jump_function): Same. | |
32909 | * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same. | |
32910 | (evaluate_properties_for_edge): Same. | |
32911 | * ipa-prop.cc (ipa_vr::get_vrange): Same. | |
32912 | (ipcp_update_vr): Same. | |
32913 | * ipa-prop.h (ipa_value_range_from_jfunc): Same. | |
32914 | (ipa_range_set_and_normalize): Same. | |
32915 | ||
32916 | 2023-06-10 Georg-Johann Lay <avr@gjlay.de> | |
32917 | ||
32918 | PR target/109650 | |
32919 | PR target/92729 | |
32920 | * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass. | |
32921 | * config/avr/avr.cc (avr_pass_ifelse): New RTL pass. | |
32922 | (avr_pass_data_ifelse): New pass_data for it. | |
32923 | (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost) | |
32924 | (avr_canonicalize_comparison, avr_out_plus_set_ZN) | |
32925 | (avr_out_cmp_ext): New functions. | |
32926 | (compare_condtition): Make sure REG_CC dies in the branch insn. | |
32927 | (avr_rtx_costs_1): Add computation of cbranch costs. | |
32928 | (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]: | |
32929 | [ADJUST_LEN_CMP_SEXT]Handle them. | |
32930 | (TARGET_CANONICALIZE_COMPARISON): New define. | |
32931 | (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern) | |
32932 | (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions. | |
32933 | (TARGET_MACHINE_DEPENDENT_REORG): Remove define. | |
32934 | * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto. | |
32935 | (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx) | |
32936 | (avr_out_cmp_zext): New Protos | |
32937 | * config/avr/avr.md (branch, difficult_branch): Don't split insns. | |
32938 | (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1") | |
32939 | (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns. | |
32940 | (*cbranch<mode>4): Rename to cbranch<mode>4_insn. | |
32941 | (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed. | |
32942 | (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed. | |
32943 | Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>. | |
32944 | Rework signtest-and-branch peepholes for *sbrx_branch<mode>. | |
32945 | (adjust_len) [add_set_ZN, cmp_zext]: New. | |
32946 | (QIPSI): New mode iterator. | |
32947 | (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators. | |
32948 | (gelt): New code iterator. | |
32949 | (gelt_eqne): New code attribute. | |
32950 | (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch) | |
32951 | (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>) | |
32952 | (*cmpqi_sign_extend): Remove insns. | |
32953 | (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove. | |
32954 | * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons. | |
32955 | * config/avr/predicates.md (scratch_or_d_register_operand): New. | |
32956 | * config/avr/constraints.md (Yxx): New constraint. | |
32957 | ||
32958 | 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
32959 | ||
32960 | * config/riscv/autovec.md (select_vl<mode>): New pattern. | |
32961 | * config/riscv/riscv-protos.h (expand_select_vl): New function. | |
32962 | * config/riscv/riscv-v.cc (expand_select_vl): Ditto. | |
32963 | ||
32964 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
32965 | ||
32966 | * range-op-float.cc (foperator_mult_div_base): Delete. | |
32967 | (foperator_mult_div_base::find_range): Make static local function. | |
32968 | (foperator_mult): Remove. Move prototypes to range-op-mixed.h | |
32969 | (operator_mult::op1_range): Rename from foperator_mult. | |
32970 | (operator_mult::op2_range): Ditto. | |
32971 | (operator_mult::rv_fold): Ditto. | |
32972 | (float_table::float_table): Remove MULT_EXPR. | |
32973 | (class foperator_div): Inherit from range_operator. | |
32974 | (float_table::float_table): Delete. | |
32975 | * range-op-mixed.h (class operator_mult): Combined from integer | |
32976 | and float files. | |
32977 | * range-op.cc (float_tree_table): Delete. | |
32978 | (op_mult): New object. | |
32979 | (unified_table::unified_table): Add MULT_EXPR. | |
32980 | (get_op_handler): Do not check float table any longer. | |
32981 | (class cross_product_operator): Move to range-op-mixed.h. | |
32982 | (class operator_mult): Move to range-op-mixed.h. | |
32983 | (integral_table::integral_table): Remove MULT_EXPR. | |
32984 | (pointer_table::pointer_table): Remove MULT_EXPR. | |
32985 | * range-op.h (float_table): Remove. | |
32986 | ||
32987 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
32988 | ||
32989 | * range-op-float.cc (foperator_negate): Remove. Move prototypes | |
32990 | to range-op-mixed.h | |
32991 | (operator_negate::fold_range): Rename from foperator_negate. | |
32992 | (operator_negate::op1_range): Ditto. | |
32993 | (float_table::float_table): Remove NEGATE_EXPR. | |
32994 | * range-op-mixed.h (class operator_negate): Combined from integer | |
32995 | and float files. | |
32996 | * range-op.cc (op_negate): New object. | |
32997 | (unified_table::unified_table): Add NEGATE_EXPR. | |
32998 | (class operator_negate): Move to range-op-mixed.h. | |
32999 | (integral_table::integral_table): Remove NEGATE_EXPR. | |
33000 | (pointer_table::pointer_table): Remove NEGATE_EXPR. | |
33001 | ||
33002 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33003 | ||
33004 | * range-op-float.cc (foperator_minus): Remove. Move prototypes | |
33005 | to range-op-mixed.h | |
33006 | (operator_minus::fold_range): Rename from foperator_minus. | |
33007 | (operator_minus::op1_range): Ditto. | |
33008 | (operator_minus::op2_range): Ditto. | |
33009 | (operator_minus::rv_fold): Ditto. | |
33010 | (float_table::float_table): Remove MINUS_EXPR. | |
33011 | * range-op-mixed.h (class operator_minus): Combined from integer | |
33012 | and float files. | |
33013 | * range-op.cc (op_minus): New object. | |
33014 | (unified_table::unified_table): Add MINUS_EXPR. | |
33015 | (class operator_minus): Move to range-op-mixed.h. | |
33016 | (integral_table::integral_table): Remove MINUS_EXPR. | |
33017 | (pointer_table::pointer_table): Remove MINUS_EXPR. | |
33018 | ||
33019 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33020 | ||
33021 | * range-op-float.cc (foperator_abs): Remove. Move prototypes | |
33022 | to range-op-mixed.h | |
33023 | (operator_abs::fold_range): Rename from foperator_abs. | |
33024 | (operator_abs::op1_range): Ditto. | |
33025 | (float_table::float_table): Remove ABS_EXPR. | |
33026 | * range-op-mixed.h (class operator_abs): Combined from integer | |
33027 | and float files. | |
33028 | * range-op.cc (op_abs): New object. | |
33029 | (unified_table::unified_table): Add ABS_EXPR. | |
33030 | (class operator_abs): Move to range-op-mixed.h. | |
33031 | (integral_table::integral_table): Remove ABS_EXPR. | |
33032 | (pointer_table::pointer_table): Remove ABS_EXPR. | |
33033 | ||
33034 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33035 | ||
33036 | * range-op-float.cc (foperator_plus): Remove. Move prototypes | |
33037 | to range-op-mixed.h | |
33038 | (operator_plus::fold_range): Rename from foperator_plus. | |
33039 | (operator_plus::op1_range): Ditto. | |
33040 | (operator_plus::op2_range): Ditto. | |
33041 | (operator_plus::rv_fold): Ditto. | |
33042 | (float_table::float_table): Remove PLUS_EXPR. | |
33043 | * range-op-mixed.h (class operator_plus): Combined from integer | |
33044 | and float files. | |
33045 | * range-op.cc (op_plus): New object. | |
33046 | (unified_table::unified_table): Add PLUS_EXPR. | |
33047 | (class operator_plus): Move to range-op-mixed.h. | |
33048 | (integral_table::integral_table): Remove PLUS_EXPR. | |
33049 | (pointer_table::pointer_table): Remove PLUS_EXPR. | |
33050 | ||
33051 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33052 | ||
33053 | * range-op-mixed.h (class operator_cast): Combined from integer | |
33054 | and float files. | |
33055 | * range-op.cc (op_cast): New object. | |
33056 | (unified_table::unified_table): Add op_cast | |
33057 | (class operator_cast): Move to range-op-mixed.h. | |
33058 | (integral_table::integral_table): Remove op_cast | |
33059 | (pointer_table::pointer_table): Remove op_cast. | |
33060 | ||
33061 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33062 | ||
33063 | * range-op-float.cc (operator_cst::fold_range): New. | |
33064 | * range-op-mixed.h (class operator_cst): Move from integer file. | |
33065 | * range-op.cc (op_cst): New object. | |
33066 | (unified_table::unified_table): Add op_cst. Also use for REAL_CST. | |
33067 | (class operator_cst): Move to range-op-mixed.h. | |
33068 | (integral_table::integral_table): Remove op_cst. | |
33069 | (pointer_table::pointer_table): Remove op_cst. | |
33070 | ||
33071 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33072 | ||
33073 | * range-op-float.cc (foperator_identity): Remove. Move prototypes | |
33074 | to range-op-mixed.h | |
33075 | (operator_identity::fold_range): Rename from foperator_identity. | |
33076 | (operator_identity::op1_range): Ditto. | |
33077 | (float_table::float_table): Remove fop_identity. | |
33078 | * range-op-mixed.h (class operator_identity): Combined from integer | |
33079 | and float files. | |
33080 | * range-op.cc (op_identity): New object. | |
33081 | (unified_table::unified_table): Add op_identity. | |
33082 | (class operator_identity): Move to range-op-mixed.h. | |
33083 | (integral_table::integral_table): Remove identity. | |
33084 | (pointer_table::pointer_table): Remove identity. | |
33085 | ||
33086 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33087 | ||
33088 | * range-op-float.cc (foperator_ge): Remove. Move prototypes | |
33089 | to range-op-mixed.h | |
33090 | (operator_ge::fold_range): Rename from foperator_ge. | |
33091 | (operator_ge::op1_range): Ditto. | |
33092 | (float_table::float_table): Remove GE_EXPR. | |
33093 | * range-op-mixed.h (class operator_ge): Combined from integer | |
33094 | and float files. | |
33095 | * range-op.cc (op_ge): New object. | |
33096 | (unified_table::unified_table): Add GE_EXPR. | |
33097 | (class operator_ge): Move to range-op-mixed.h. | |
33098 | (ge_op1_op2_relation): Fold into | |
33099 | operator_ge::op1_op2_relation. | |
33100 | (integral_table::integral_table): Remove GE_EXPR. | |
33101 | (pointer_table::pointer_table): Remove GE_EXPR. | |
33102 | * range-op.h (ge_op1_op2_relation): Delete. | |
33103 | ||
33104 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33105 | ||
33106 | * range-op-float.cc (foperator_gt): Remove. Move prototypes | |
33107 | to range-op-mixed.h | |
33108 | (operator_gt::fold_range): Rename from foperator_gt. | |
33109 | (operator_gt::op1_range): Ditto. | |
33110 | (float_table::float_table): Remove GT_EXPR. | |
33111 | * range-op-mixed.h (class operator_gt): Combined from integer | |
33112 | and float files. | |
33113 | * range-op.cc (op_gt): New object. | |
33114 | (unified_table::unified_table): Add GT_EXPR. | |
33115 | (class operator_gt): Move to range-op-mixed.h. | |
33116 | (gt_op1_op2_relation): Fold into | |
33117 | operator_gt::op1_op2_relation. | |
33118 | (integral_table::integral_table): Remove GT_EXPR. | |
33119 | (pointer_table::pointer_table): Remove GT_EXPR. | |
33120 | * range-op.h (gt_op1_op2_relation): Delete. | |
33121 | ||
33122 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33123 | ||
33124 | * range-op-float.cc (foperator_le): Remove. Move prototypes | |
33125 | to range-op-mixed.h | |
33126 | (operator_le::fold_range): Rename from foperator_le. | |
33127 | (operator_le::op1_range): Ditto. | |
33128 | (float_table::float_table): Remove LE_EXPR. | |
33129 | * range-op-mixed.h (class operator_le): Combined from integer | |
33130 | and float files. | |
33131 | * range-op.cc (op_le): New object. | |
33132 | (unified_table::unified_table): Add LE_EXPR. | |
33133 | (class operator_le): Move to range-op-mixed.h. | |
33134 | (le_op1_op2_relation): Fold into | |
33135 | operator_le::op1_op2_relation. | |
33136 | (integral_table::integral_table): Remove LE_EXPR. | |
33137 | (pointer_table::pointer_table): Remove LE_EXPR. | |
33138 | * range-op.h (le_op1_op2_relation): Delete. | |
33139 | ||
33140 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33141 | ||
33142 | * range-op-float.cc (foperator_lt): Remove. Move prototypes | |
33143 | to range-op-mixed.h | |
33144 | (operator_lt::fold_range): Rename from foperator_lt. | |
33145 | (operator_lt::op1_range): Ditto. | |
33146 | (float_table::float_table): Remove LT_EXPR. | |
33147 | * range-op-mixed.h (class operator_lt): Combined from integer | |
33148 | and float files. | |
33149 | * range-op.cc (op_lt): New object. | |
33150 | (unified_table::unified_table): Add LT_EXPR. | |
33151 | (class operator_lt): Move to range-op-mixed.h. | |
33152 | (lt_op1_op2_relation): Fold into | |
33153 | operator_lt::op1_op2_relation. | |
33154 | (integral_table::integral_table): Remove LT_EXPR. | |
33155 | (pointer_table::pointer_table): Remove LT_EXPR. | |
33156 | * range-op.h (lt_op1_op2_relation): Delete. | |
33157 | ||
33158 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33159 | ||
33160 | * range-op-float.cc (foperator_not_equal): Remove. Move prototypes | |
33161 | to range-op-mixed.h | |
33162 | (operator_equal::fold_range): Rename from foperator_not_equal. | |
33163 | (operator_equal::op1_range): Ditto. | |
33164 | (float_table::float_table): Remove NE_EXPR. | |
33165 | * range-op-mixed.h (class operator_not_equal): Combined from integer | |
33166 | and float files. | |
33167 | * range-op.cc (op_equal): New object. | |
33168 | (unified_table::unified_table): Add NE_EXPR. | |
33169 | (class operator_not_equal): Move to range-op-mixed.h. | |
33170 | (not_equal_op1_op2_relation): Fold into | |
33171 | operator_not_equal::op1_op2_relation. | |
33172 | (integral_table::integral_table): Remove NE_EXPR. | |
33173 | (pointer_table::pointer_table): Remove NE_EXPR. | |
33174 | * range-op.h (not_equal_op1_op2_relation): Delete. | |
33175 | ||
33176 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33177 | ||
33178 | * range-op-float.cc (foperator_equal): Remove. Move prototypes | |
33179 | to range-op-mixed.h | |
33180 | (operator_equal::fold_range): Rename from foperator_equal. | |
33181 | (operator_equal::op1_range): Ditto. | |
33182 | (float_table::float_table): Remove EQ_EXPR. | |
33183 | * range-op-mixed.h (class operator_equal): Combined from integer | |
33184 | and float files. | |
33185 | * range-op.cc (op_equal): New object. | |
33186 | (unified_table::unified_table): Add EQ_EXPR. | |
33187 | (class operator_equal): Move to range-op-mixed.h. | |
33188 | (equal_op1_op2_relation): Fold into | |
33189 | operator_equal::op1_op2_relation. | |
33190 | (integral_table::integral_table): Remove EQ_EXPR. | |
33191 | (pointer_table::pointer_table): Remove EQ_EXPR. | |
33192 | * range-op.h (equal_op1_op2_relation): Delete. | |
33193 | ||
33194 | 2023-06-10 Andrew MacLeod <amacleod@redhat.com> | |
33195 | ||
33196 | * range-op-float.cc (class float_table): Move to header. | |
33197 | (float_table::float_table): Move float only operators to... | |
33198 | (range_op_table::initialize_float_ops): Here. | |
33199 | * range-op-mixed.h: New. | |
33200 | * range-op.cc (integral_tree_table, pointer_tree_table): Moved | |
33201 | to top of file. | |
33202 | (float_tree_table): Moved from range-op-float.cc. | |
33203 | (unified_tree_table): New. | |
33204 | (unified_table::unified_table): New. Call initialize routines. | |
33205 | (get_op_handler): Check unified table first. | |
33206 | (range_op_handler::range_op_handler): Handle no type constructor. | |
33207 | (integral_table::integral_table): Move integral only operators to... | |
33208 | (range_op_table::initialize_integral_ops): Here. | |
33209 | (pointer_table::pointer_table): Move pointer only operators to... | |
33210 | (range_op_table::initialize_pointer_ops): Here. | |
33211 | * range-op.h (enum bool_range_state): Move to range-op-mixed.h. | |
33212 | (get_bool_state): Ditto. | |
33213 | (empty_range_varying): Ditto. | |
33214 | (relop_early_resolve): Ditto. | |
33215 | (class range_op_table): Add new init methods for range types. | |
33216 | (class integral_table): Move declaration to here. | |
33217 | (class pointer_table): Move declaration to here. | |
33218 | (class float_table): Move declaration to here. | |
33219 | ||
33220 | 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
33221 | Richard Sandiford <richard.sandiford@arm.com> | |
33222 | Richard Biener <rguenther@suse.de> | |
33223 | ||
33224 | * doc/md.texi: Add SELECT_VL support. | |
33225 | * internal-fn.def (SELECT_VL): Ditto. | |
33226 | * optabs.def (OPTAB_D): Ditto. | |
33227 | * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto. | |
33228 | * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto. | |
33229 | * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto. | |
33230 | (vectorizable_store): Ditto. | |
33231 | (vectorizable_load): Ditto. | |
33232 | * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto. | |
33233 | ||
33234 | 2023-06-09 Andrew MacLeod <amacleod@redhat.com> | |
33235 | ||
33236 | PR ipa/109886 | |
33237 | * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param | |
33238 | type as well. | |
33239 | ||
33240 | 2023-06-09 Andrew MacLeod <amacleod@redhat.com> | |
33241 | ||
33242 | * range-op.cc (range_cast): Move to... | |
33243 | * range-op.h (range_cast): Here and add generic a version. | |
33244 | ||
33245 | 2023-06-09 Marek Polacek <polacek@redhat.com> | |
33246 | ||
33247 | PR c/39589 | |
33248 | PR c++/96868 | |
33249 | * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't | |
33250 | warn about designated initializers in C only. | |
33251 | ||
33252 | 2023-06-09 Andrew Pinski <apinski@marvell.com> | |
33253 | ||
33254 | PR tree-optimization/97711 | |
33255 | PR tree-optimization/110155 | |
33256 | * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op. | |
33257 | ((zero_one != 0) ? z <op> y : y): Likewise. | |
33258 | ||
33259 | 2023-06-09 Andrew Pinski <apinski@marvell.com> | |
33260 | ||
33261 | * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use | |
33262 | multiply rather than negation/bit_and. | |
33263 | ||
33264 | 2023-06-09 Andrew Pinski <apinski@marvell.com> | |
33265 | ||
33266 | * match.pd (`X & -Y -> X * Y`): Allow for truncation | |
33267 | and the same type for unsigned types. | |
33268 | ||
33269 | 2023-06-09 Andrew Pinski <apinski@marvell.com> | |
33270 | ||
33271 | PR tree-optimization/110165 | |
33272 | PR tree-optimization/110166 | |
33273 | * match.pd (zero_one_valued_p): Don't accept | |
33274 | signed 1-bit integers. | |
33275 | ||
33276 | 2023-06-09 Richard Biener <rguenther@suse.de> | |
33277 | ||
33278 | * match.pd (two conversions in a row): Use element_precision | |
33279 | to DTRT for VECTOR_TYPE. | |
33280 | ||
33281 | 2023-06-09 Pan Li <pan2.li@intel.com> | |
33282 | ||
33283 | * config/riscv/riscv.md (enabled): Move to another place, and | |
33284 | add fp_vector_disabled to the cond. | |
33285 | (fp_vector_disabled): New attr defined for disabling fp. | |
33286 | * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT. | |
33287 | ||
33288 | 2023-06-09 Pan Li <pan2.li@intel.com> | |
33289 | ||
33290 | * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust | |
33291 | literal to int. | |
33292 | ||
33293 | 2023-06-09 liuhongt <hongtao.liu@intel.com> | |
33294 | ||
33295 | PR target/110108 | |
33296 | * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly | |
33297 | view_convert_expr mask to signed type when folding pblendvb | |
33298 | builtins. | |
33299 | ||
33300 | 2023-06-09 liuhongt <hongtao.liu@intel.com> | |
33301 | ||
33302 | PR target/110108 | |
33303 | * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold | |
33304 | _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple | |
33305 | ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o | |
33306 | TARGET_64BIT. | |
33307 | * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with | |
33308 | real codename for __builtin_ia32_pabs{b,w,d}. | |
33309 | ||
33310 | 2023-06-08 Andrew MacLeod <amacleod@redhat.com> | |
33311 | ||
33312 | * gimple-range-op.cc | |
33313 | (gimple_range_op_handler::gimple_range_op_handler): Adjust. | |
33314 | (gimple_range_op_handler::maybe_builtin_call): Adjust. | |
33315 | * gimple-range-op.h (operand1, operand2): Use m_operator. | |
33316 | * range-op.cc (integral_table, pointer_table): Relocate. | |
33317 | (get_op_handler): Rename from get_handler and handle all types. | |
33318 | (range_op_handler::range_op_handler): Relocate. | |
33319 | (range_op_handler::set_op_handler): Relocate and adjust. | |
33320 | (range_op_handler::range_op_handler): Relocate. | |
33321 | (dispatch_trio): New. | |
33322 | (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts. | |
33323 | (range_op_handler::dispatch_kind): New. | |
33324 | (range_op_handler::fold_range): Relocate and Use new dispatch value. | |
33325 | (range_op_handler::op1_range): Ditto. | |
33326 | (range_op_handler::op2_range): Ditto. | |
33327 | (range_op_handler::lhs_op1_relation): Ditto. | |
33328 | (range_op_handler::lhs_op2_relation): Ditto. | |
33329 | (range_op_handler::op1_op2_relation): Ditto. | |
33330 | (range_op_handler::set_op_handler): Use m_operator member. | |
33331 | * range-op.h (range_op_handler::operator bool): Use m_operator. | |
33332 | (range_op_handler::dispatch_kind): New. | |
33333 | (range_op_handler::m_valid): Delete. | |
33334 | (range_op_handler::m_int): Delete | |
33335 | (range_op_handler::m_float): Delete | |
33336 | (range_op_handler::m_operator): New. | |
33337 | (range_op_table::operator[]): Relocate from .cc file. | |
33338 | (range_op_table::set): Ditto. | |
33339 | * value-range.h (class vrange): Make range_op_handler a friend. | |
33340 | ||
33341 | 2023-06-08 Andrew MacLeod <amacleod@redhat.com> | |
33342 | ||
33343 | * gimple-range-op.cc (cfn_constant_float_p): Change base class. | |
33344 | (cfn_pass_through_arg1): Adjust using statemenmt. | |
33345 | (cfn_signbit): Change base class, adjust using statement. | |
33346 | (cfn_copysign): Ditto. | |
33347 | (cfn_sqrt): Ditto. | |
33348 | (cfn_sincos): Ditto. | |
33349 | * range-op-float.cc (fold_range): Change class to range_operator. | |
33350 | (rv_fold): Ditto. | |
33351 | (op1_range): Ditto | |
33352 | (op2_range): Ditto | |
33353 | (lhs_op1_relation): Ditto. | |
33354 | (lhs_op2_relation): Ditto. | |
33355 | (op1_op2_relation): Ditto. | |
33356 | (foperator_*): Ditto. | |
33357 | (class float_table): New. Inherit from range_op_table. | |
33358 | (floating_tree_table) Change to range_op_table pointer. | |
33359 | (class floating_op_table): Delete. | |
33360 | * range-op.cc (operator_equal): Adjust using statement. | |
33361 | (operator_not_equal): Ditto. | |
33362 | (operator_lt, operator_le, operator_gt, operator_ge): Ditto. | |
33363 | (operator_minus, operator_cast): Ditto. | |
33364 | (operator_bitwise_and, pointer_plus_operator): Ditto. | |
33365 | (get_float_handle): Change return type. | |
33366 | * range-op.h (range_operator_float): Delete. Relocate all methods | |
33367 | into class range_operator. | |
33368 | (range_op_handler::m_float): Change type to range_operator. | |
33369 | (floating_op_table): Delete. | |
33370 | (floating_tree_table): Change type. | |
33371 | ||
33372 | 2023-06-08 Andrew MacLeod <amacleod@redhat.com> | |
33373 | ||
33374 | * range-op.cc (range_operator::fold_range): Call virtual routine. | |
33375 | (range_operator::update_bitmask): New. | |
33376 | (operator_equal::update_bitmask): New. | |
33377 | (operator_not_equal::update_bitmask): New. | |
33378 | (operator_lt::update_bitmask): New. | |
33379 | (operator_le::update_bitmask): New. | |
33380 | (operator_gt::update_bitmask): New. | |
33381 | (operator_ge::update_bitmask): New. | |
33382 | (operator_ge::update_bitmask): New. | |
33383 | (operator_plus::update_bitmask): New. | |
33384 | (operator_minus::update_bitmask): New. | |
33385 | (operator_pointer_diff::update_bitmask): New. | |
33386 | (operator_min::update_bitmask): New. | |
33387 | (operator_max::update_bitmask): New. | |
33388 | (operator_mult::update_bitmask): New. | |
33389 | (operator_div:operator_div):New. | |
33390 | (operator_div::update_bitmask): New. | |
33391 | (operator_div::m_code): New member. | |
33392 | (operator_exact_divide::operator_exact_divide): New constructor. | |
33393 | (operator_lshift::update_bitmask): New. | |
33394 | (operator_rshift::update_bitmask): New. | |
33395 | (operator_bitwise_and::update_bitmask): New. | |
33396 | (operator_bitwise_or::update_bitmask): New. | |
33397 | (operator_bitwise_xor::update_bitmask): New. | |
33398 | (operator_trunc_mod::update_bitmask): New. | |
33399 | (op_ident, op_unknown, op_ptr_min_max): New. | |
33400 | (op_nop, op_convert): Delete. | |
33401 | (op_ssa, op_paren, op_obj_type): Delete. | |
33402 | (op_realpart, op_imagpart): Delete. | |
33403 | (op_ptr_min, op_ptr_max): Delete. | |
33404 | (pointer_plus_operator:update_bitmask): New. | |
33405 | (range_op_table::set): Do not use m_code. | |
33406 | (integral_table::integral_table): Adjust to single instances. | |
33407 | * range-op.h (range_operator::range_operator): Delete. | |
33408 | (range_operator::m_code): Delete. | |
33409 | (range_operator::update_bitmask): New. | |
33410 | ||
33411 | 2023-06-08 Andrew MacLeod <amacleod@redhat.com> | |
33412 | ||
33413 | * range-op-float.cc (range_operator_float::fold_range): Return | |
33414 | NAN of the result type. | |
33415 | ||
33416 | 2023-06-08 Jakub Jelinek <jakub@redhat.com> | |
33417 | ||
33418 | * optabs.cc (expand_ffs): Add forward declaration. | |
33419 | (expand_doubleword_clz): Rename to ... | |
33420 | (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument, | |
33421 | handle also doubleword CTZ and FFS in addition to CLZ. | |
33422 | (expand_unop): Adjust caller. Also call it for doubleword | |
33423 | ctz_optab and ffs_optab. | |
33424 | ||
33425 | 2023-06-08 Jakub Jelinek <jakub@redhat.com> | |
33426 | ||
33427 | PR target/110152 | |
33428 | * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For | |
33429 | n_words == 2 recurse with mmx_ok as first argument rather than false. | |
33430 | ||
33431 | 2023-06-07 Roger Sayle <roger@nextmovesoftware.com> | |
33432 | ||
33433 | * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to | |
33434 | avoid sign extension/undefined behaviour when setting each bit. | |
33435 | ||
33436 | 2023-06-07 Roger Sayle <roger@nextmovesoftware.com> | |
33437 | Uros Bizjak <ubizjak@gmail.com> | |
33438 | ||
33439 | * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>: | |
33440 | Use new x86_stc instruction when the carry flag must be set. | |
33441 | * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc. | |
33442 | (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc. | |
33443 | * config/i386/i386.h (TARGET_SLOW_STC): New define. | |
33444 | * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc. | |
33445 | (x86_stc): New define_insn. | |
33446 | (define_peephole2): Convert x86_stc into alternate implementation | |
33447 | on pentium4 without -Os when a QImode register is available. | |
33448 | (*x86_cmc): New define_insn. | |
33449 | (define_peephole2): Convert *x86_cmc into alternate implementation | |
33450 | on pentium4 without -Os when a QImode register is available. | |
33451 | (*setccc): New define_insn_and_split for a no-op CCCmode move. | |
33452 | (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to | |
33453 | recognize (and eliminate) the carry flag being copied to itself. | |
33454 | (*setcc_qi_negqi_ccc_2_<mode>): Likewise. | |
33455 | * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag. | |
33456 | ||
33457 | 2023-06-07 Andrew Pinski <apinski@marvell.com> | |
33458 | ||
33459 | * match.pd: Fix comment for the | |
33460 | `(zero_one ==/!= 0) ? y : z <op> y` patterns. | |
33461 | ||
33462 | 2023-06-07 Jeff Law <jlaw@ventanamicro.com> | |
33463 | Jeff Law <jlaw@ventanamicro.com> | |
33464 | ||
33465 | * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders. | |
33466 | (rotrsi3_sext): Expose generator. | |
33467 | (rotlsi3 pattern): Hide generator. | |
33468 | * config/riscv/riscv-protos.h (riscv_emit_binary): New function | |
33469 | declaration. | |
33470 | * config/riscv/riscv.cc (riscv_emit_binary): Removed static | |
33471 | * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator. | |
33472 | (mulsi3, <optab>si3): Likewise. | |
33473 | (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders. | |
33474 | (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary. | |
33475 | (<u>mulsidi3): Likewise. | |
33476 | (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator. | |
33477 | (mulsi3_extended, <optab>si3_extended): Likewise. | |
33478 | (splitter for shadd feeding divison): Update RTL pattern to account | |
33479 | for changes in how 32 bit ops are expanded for TARGET_64BIT. | |
33480 | * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS. | |
33481 | ||
33482 | 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu> | |
33483 | ||
33484 | PR target/109725 | |
33485 | * config/riscv/riscv.cc (riscv_print_operand): Calculate | |
33486 | memmodel only when it is valid. | |
33487 | ||
33488 | 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu> | |
33489 | ||
33490 | * config/riscv/riscv.cc (riscv_const_insns): Recursively call | |
33491 | for constant element of a vector. | |
33492 | ||
33493 | 2023-06-07 Jakub Jelinek <jakub@redhat.com> | |
33494 | ||
33495 | * match.pd (zero_one_valued_p): Don't handle integer_zerop specially, | |
33496 | instead compare tree_nonzero_bits <= 1U rather than just == 1. | |
33497 | ||
33498 | 2023-06-07 Alex Coplan <alex.coplan@arm.com> | |
33499 | ||
33500 | PR target/110132 | |
33501 | * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin): | |
33502 | New. Use it ... | |
33503 | (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE | |
33504 | names for builtins. | |
33505 | (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h | |
33506 | setup if in_lto_p, just like we do for SVE. | |
33507 | * config/aarch64/arm_acle.h: (__arm_ld64b): Delete. | |
33508 | (__arm_st64b): Delete. | |
33509 | (__arm_st64bv): Delete. | |
33510 | (__arm_st64bv0): Delete. | |
33511 | ||
33512 | 2023-06-07 Alex Coplan <alex.coplan@arm.com> | |
33513 | ||
33514 | PR target/110100 | |
33515 | * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64): | |
33516 | Use input operand for the destination address. | |
33517 | * config/aarch64/aarch64.md (st64b): Fix constraint on address | |
33518 | operand. | |
33519 | ||
33520 | 2023-06-07 Alex Coplan <alex.coplan@arm.com> | |
33521 | ||
33522 | PR target/110100 | |
33523 | * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types): | |
33524 | Replace eight consecutive spaces with tabs. | |
33525 | (aarch64_init_ls64_builtins): Likewise. | |
33526 | (aarch64_expand_builtin_ls64): Likewise. | |
33527 | * config/aarch64/aarch64.md (ld64b): Likewise. | |
33528 | (st64b): Likewise. | |
33529 | (st64bv): Likewise | |
33530 | (st64bv0): Likewise. | |
33531 | ||
33532 | 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com> | |
33533 | ||
33534 | * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic | |
33535 | offset table pseudo to a general reg subset. | |
33536 | ||
33537 | 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
33538 | ||
33539 | * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>): | |
33540 | Rename to... | |
33541 | (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement | |
33542 | with RTL codes. | |
33543 | (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes. | |
33544 | (aarch64_sqxtun2<mode>_le): Likewise. | |
33545 | (aarch64_sqxtun2<mode>_be): Likewise. | |
33546 | (aarch64_sqxtun2<mode>): Adjust for the above. | |
33547 | (aarch64_sqmovun<mode>): New define_expand. | |
33548 | * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete. | |
33549 | (half_mask): New mode attribute. | |
33550 | * config/aarch64/predicates.md (aarch64_simd_umax_half_mode): | |
33551 | New predicate. | |
33552 | ||
33553 | 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
33554 | ||
33555 | * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>): | |
33556 | Reimplement as... | |
33557 | (aarch64_addp<mode>_insn): ... This... | |
33558 | (aarch64_addp<mode><vczle><vczbe>_insn): ... And this. | |
33559 | (aarch64_addp<mode>): New define_expand. | |
33560 | ||
33561 | 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
33562 | ||
33563 | * config/riscv/riscv-protos.h (expand_vec_perm_const): New function. | |
33564 | * config/riscv/riscv-v.cc | |
33565 | (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY | |
33566 | handling. | |
33567 | (rvv_builder::single_step_npatterns_p): New function. | |
33568 | (rvv_builder::npatterns_all_equal_p): Ditto. | |
33569 | (const_vec_all_in_range_p): Support POLY handling. | |
33570 | (gen_const_vector_dup): Ditto. | |
33571 | (emit_vlmax_gather_insn): Add vrgatherei16. | |
33572 | (emit_vlmax_masked_gather_mu_insn): Ditto. | |
33573 | (expand_const_vector): Add VLA SLP const vector support. | |
33574 | (expand_vec_perm): Support POLY. | |
33575 | (struct expand_vec_perm_d): New struct. | |
33576 | (shuffle_generic_patterns): New function. | |
33577 | (expand_vec_perm_const_1): Ditto. | |
33578 | (expand_vec_perm_const): Ditto. | |
33579 | * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto. | |
33580 | (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook. | |
33581 | ||
33582 | 2023-06-07 Andrew Pinski <apinski@marvell.com> | |
33583 | ||
33584 | PR middle-end/110117 | |
33585 | * expr.cc (expand_single_bit_test): Handle | |
33586 | const_int from expand_expr. | |
33587 | ||
33588 | 2023-06-07 Andrew Pinski <apinski@marvell.com> | |
33589 | ||
33590 | * expr.cc (do_store_flag): Rearrange the | |
33591 | TER code so that it overrides the nonzero bits | |
33592 | info if we had `a & POW2`. | |
33593 | ||
33594 | 2023-06-07 Andrew Pinski <apinski@marvell.com> | |
33595 | ||
33596 | PR tree-optimization/110134 | |
33597 | * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer | |
33598 | types. | |
33599 | (-A CMP CST -> B CMP (-CST)): Likewise. | |
33600 | ||
33601 | 2023-06-07 Andrew Pinski <apinski@marvell.com> | |
33602 | ||
33603 | PR tree-optimization/89263 | |
33604 | PR tree-optimization/99069 | |
33605 | PR tree-optimization/20083 | |
33606 | PR tree-optimization/94898 | |
33607 | * match.pd: Add patterns to optimize `a ? onezero : onezero` with | |
33608 | one of the operands are constant. | |
33609 | ||
33610 | 2023-06-07 Andrew Pinski <apinski@marvell.com> | |
33611 | ||
33612 | * match.pd (zero_one_valued_p): Match 0 integer constant | |
33613 | too. | |
33614 | ||
33615 | 2023-06-07 Pan Li <pan2.li@intel.com> | |
33616 | ||
33617 | * config/riscv/riscv-vector-builtins-types.def | |
33618 | (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement. | |
33619 | (vfloat32m1_t): Ditto. | |
33620 | (vfloat32m2_t): Ditto. | |
33621 | (vfloat32m4_t): Ditto. | |
33622 | (vfloat32m8_t): Ditto. | |
33623 | (vint16mf4_t): Ditto. | |
33624 | (vint16mf2_t): Ditto. | |
33625 | (vint16m1_t): Ditto. | |
33626 | (vint16m2_t): Ditto. | |
33627 | (vint16m4_t): Ditto. | |
33628 | (vint16m8_t): Ditto. | |
33629 | (vuint16mf4_t): Ditto. | |
33630 | (vuint16mf2_t): Ditto. | |
33631 | (vuint16m1_t): Ditto. | |
33632 | (vuint16m2_t): Ditto. | |
33633 | (vuint16m4_t): Ditto. | |
33634 | (vuint16m8_t): Ditto. | |
33635 | (vint32mf2_t): Ditto. | |
33636 | (vint32m1_t): Ditto. | |
33637 | (vint32m2_t): Ditto. | |
33638 | (vint32m4_t): Ditto. | |
33639 | (vint32m8_t): Ditto. | |
33640 | (vuint32mf2_t): Ditto. | |
33641 | (vuint32m1_t): Ditto. | |
33642 | (vuint32m2_t): Ditto. | |
33643 | (vuint32m4_t): Ditto. | |
33644 | (vuint32m8_t): Ditto. | |
33645 | ||
33646 | 2023-06-07 Jason Merrill <jason@redhat.com> | |
33647 | ||
33648 | PR c++/58487 | |
33649 | * doc/invoke.texi: Document it. | |
33650 | ||
33651 | 2023-06-06 Roger Sayle <roger@nextmovesoftware.com> | |
33652 | ||
33653 | * doc/rtl.texi (bitreverse, copysign): Document new RTX codes. | |
33654 | * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes. | |
33655 | * simplify-rtx.cc (simplify_unary_operation_1): Optimize | |
33656 | NOT (BITREVERSE x) as BITREVERSE (NOT x). | |
33657 | Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x. | |
33658 | Optimize PARITY (BITREVERSE x) as PARITY x. | |
33659 | Optimize BITREVERSE (BITREVERSE x) as x. | |
33660 | (simplify_const_unary_operation) <case BITREVERSE>: Evaluate | |
33661 | BITREVERSE of a constant integer at compile-time. | |
33662 | (simplify_binary_operation_1) <case COPYSIGN>: Optimize | |
33663 | COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x | |
33664 | or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y) | |
33665 | and COPYSIGN (NEG x, y) as COPYSIGN (x, y). | |
33666 | Optimize COPYSIGN (x, ABS y) as ABS x. | |
33667 | Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z). | |
33668 | Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z). | |
33669 | (simplify_const_binary_operation): Evaluate COPYSIGN of constant | |
33670 | arguments at compile-time. | |
33671 | ||
33672 | 2023-06-06 Uros Bizjak <ubizjak@gmail.com> | |
33673 | ||
33674 | * rtl.h (function_invariant_p): Change return type from int to bool. | |
33675 | * reload1.cc (function_invariant_p): Change return type from | |
33676 | int to bool and adjust function body accordingly. | |
33677 | ||
33678 | 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
33679 | ||
33680 | * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern. | |
33681 | (*single_<optab>mult_plus<mode>): Ditto. | |
33682 | (*double_<optab>mult_plus<mode>): Ditto. | |
33683 | (*sign_zero_extend_fma): Ditto. | |
33684 | (*zero_sign_extend_fma): Ditto. | |
33685 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
33686 | ||
33687 | 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com> | |
33688 | Tobias Burnus <tobias@codesourcery.com> | |
33689 | ||
33690 | * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag | |
33691 | and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag | |
33692 | set. | |
33693 | (omp_get_attachment): Handle map clauses with 'present' modifier. | |
33694 | (omp_group_base): Likewise. | |
33695 | (gimplify_scan_omp_clauses): Reorder present maps to come first. | |
33696 | Set GOVD flags for present defaultmaps. | |
33697 | (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps. | |
33698 | * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map | |
33699 | clauses. | |
33700 | (lower_omp_target): Handle map clauses with 'present' modifier. | |
33701 | Handle 'to' and 'from' clauses with 'present'. | |
33702 | * tree-core.h (enum omp_clause_defaultmap_kind): Add | |
33703 | OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind. | |
33704 | * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and | |
33705 | 'from' clauses with 'present' modifier. Handle present defaultmap. | |
33706 | * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define. | |
33707 | ||
33708 | 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org> | |
33709 | ||
33710 | * config/rs6000/genfusion.pl: Delete some dead code. | |
33711 | ||
33712 | 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org> | |
33713 | ||
33714 | * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and | |
33715 | split out from... | |
33716 | (gen_ld_cmpi_p10): ... this. | |
33717 | ||
33718 | 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com> | |
33719 | ||
33720 | PR target/106907 | |
33721 | * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove | |
33722 | duplicate expression. | |
33723 | ||
33724 | 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
33725 | ||
33726 | * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin): | |
33727 | Handle unsigned reduc_plus_scal_ builtins. | |
33728 | * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances. | |
33729 | * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete. | |
33730 | * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with | |
33731 | __builtin_aarch64_reduc_plus_scal_v2di. | |
33732 | (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu. | |
33733 | ||
33734 | 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
33735 | ||
33736 | * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete. | |
33737 | (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn. | |
33738 | (aarch64_<sra_op>rshr_n<mode>): New define_expand. | |
33739 | ||
33740 | 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
33741 | ||
33742 | * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete. | |
33743 | (aarch64_shrn<mode>_insn_be): Delete. | |
33744 | (*aarch64_<srn_op>shrn<mode>_vect): Rename to... | |
33745 | (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This. | |
33746 | (aarch64_shrn<mode>): Remove reference to the above deleted patterns. | |
33747 | (aarch64_rshrn<mode>_insn_le): Delete. | |
33748 | (aarch64_rshrn<mode>_insn_be): Delete. | |
33749 | (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn. | |
33750 | (aarch64_rshrn<mode>): Remove references to the above deleted patterns. | |
33751 | ||
33752 | 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
33753 | ||
33754 | * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p): | |
33755 | Define prototype. | |
33756 | (aarch64_pars_overlap_p): Likewise. | |
33757 | * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>): | |
33758 | Express in terms of UNSPEC_ADDV. | |
33759 | (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise. | |
33760 | (*aarch64_<su>addlv<mode>_reduction): Define. | |
33761 | (*aarch64_uaddlv<mode>_reduction_2): Likewise. | |
33762 | * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define. | |
33763 | (aarch64_pars_overlap_p): Likewise. | |
33764 | * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete. | |
33765 | (VQUADW): New mode attribute. | |
33766 | (VWIDE2X_S): Likewise. | |
33767 | (USADDLV): Delete. | |
33768 | (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV. | |
33769 | * config/aarch64/predicates.md (vect_par_cnst_select_half): Define. | |
33770 | ||
33771 | 2023-06-06 Richard Biener <rguenther@suse.de> | |
33772 | ||
33773 | PR middle-end/110055 | |
33774 | * gimplify.cc (gimplify_target_expr): Do not emit | |
33775 | CLOBBERs for variables which have static storage duration | |
33776 | after gimplifying their initializers. | |
33777 | ||
33778 | 2023-06-06 Richard Biener <rguenther@suse.de> | |
33779 | ||
33780 | PR tree-optimization/109143 | |
33781 | * tree-ssa-structalias.cc (solution_set_expand): Avoid | |
33782 | one bitmap iteration and optimize bit range setting. | |
33783 | ||
33784 | 2023-06-06 Hans-Peter Nilsson <hp@axis.com> | |
33785 | ||
33786 | PR bootstrap/110120 | |
33787 | * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use | |
33788 | XVECEXP, not XEXP, to access first item of a PARALLEL. | |
33789 | ||
33790 | 2023-06-06 Pan Li <pan2.li@intel.com> | |
33791 | ||
33792 | * config/riscv/riscv-vector-builtins-types.def | |
33793 | (vfloat16mf4_t): Add vfloat16mf4_t to WF operations. | |
33794 | (vfloat16mf2_t): Likewise. | |
33795 | (vfloat16m1_t): Likewise. | |
33796 | (vfloat16m2_t): Likewise. | |
33797 | (vfloat16m4_t): Likewise. | |
33798 | (vfloat16m8_t): Likewise. | |
33799 | * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64, | |
33800 | VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64. | |
33801 | ||
33802 | 2023-06-06 Fei Gao <gaofei@eswincomputing.com> | |
33803 | ||
33804 | * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode | |
33805 | for cfi reg/mem machmode | |
33806 | (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode | |
33807 | ||
33808 | 2023-06-06 Li Xu <xuli1@eswincomputing.com> | |
33809 | ||
33810 | * config/riscv/vector-iterators.md: | |
33811 | Fix 'REQUIREMENT' for machine_mode 'MODE'. | |
33812 | * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode> | |
33813 | <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI. | |
33814 | (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto. | |
33815 | ||
33816 | 2023-06-06 Pan Li <pan2.li@intel.com> | |
33817 | ||
33818 | * config/riscv/vector-iterators.md: Fix typo in mode attr. | |
33819 | ||
33820 | 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
33821 | Joel Hutton <joel.hutton@arm.com> | |
33822 | ||
33823 | * doc/generic.texi: Remove old tree codes. | |
33824 | * expr.cc (expand_expr_real_2): Remove old tree code cases. | |
33825 | * gimple-pretty-print.cc (dump_binary_rhs): Likewise. | |
33826 | * optabs-tree.cc (optab_for_tree_code): Likewise. | |
33827 | (supportable_half_widening_operation): Likewise. | |
33828 | * tree-cfg.cc (verify_gimple_assign_binary): Likewise. | |
33829 | * tree-inline.cc (estimate_operator_cost): Likewise. | |
33830 | (op_symbol_code): Likewise. | |
33831 | * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise. | |
33832 | (vect_analyze_data_ref_accesses): Likewise. | |
33833 | * tree-vect-generic.cc (expand_vector_operations_1): Likewise. | |
33834 | * cfgexpand.cc (expand_debug_expr): Likewise. | |
33835 | * tree-vect-stmts.cc (vectorizable_conversion): Likewise. | |
33836 | (supportable_widening_operation): Likewise. | |
33837 | * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard): | |
33838 | Likewise. | |
33839 | * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab, | |
33840 | vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab, | |
33841 | vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab, | |
33842 | vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs. | |
33843 | * tree-pretty-print.cc (dump_generic_node): Remove tree code definition. | |
33844 | * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR, | |
33845 | VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR, | |
33846 | VEC_WIDEN_MINUS_LO_EXPR): Likewise. | |
33847 | ||
33848 | 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
33849 | Joel Hutton <joel.hutton@arm.com> | |
33850 | Tamar Christina <tamar.christina@arm.com> | |
33851 | ||
33852 | * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename | |
33853 | this ... | |
33854 | (vec_widen_<su>add_lo_<mode>): ... to this. | |
33855 | (vec_widen_<su>addl_hi_<mode>): Rename this ... | |
33856 | (vec_widen_<su>add_hi_<mode>): ... to this. | |
33857 | (vec_widen_<su>subl_lo_<mode>): Rename this ... | |
33858 | (vec_widen_<su>sub_lo_<mode>): ... to this. | |
33859 | (vec_widen_<su>subl_hi_<mode>): Rename this ... | |
33860 | (vec_widen_<su>sub_hi_<mode>): ...to this. | |
33861 | * doc/generic.texi: Document new IFN codes. | |
33862 | * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function. | |
33863 | (commutative_binary_fn_p): Add widen_plus fn's. | |
33864 | (widening_fn_p): New function. | |
33865 | (narrowing_fn_p): New function. | |
33866 | (direct_internal_fn_optab): Change visibility. | |
33867 | * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an | |
33868 | internal_fn that expands into multiple internal_fns for widening. | |
33869 | (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO, | |
33870 | IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD, | |
33871 | IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI, | |
33872 | IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD, | |
33873 | IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions. | |
33874 | * internal-fn.h (direct_internal_fn_optab): Declare new prototype. | |
33875 | (lookup_hilo_internal_fn): Likewise. | |
33876 | (widening_fn_p): Likewise. | |
33877 | (Narrowing_fn_p): Likewise. | |
33878 | * optabs.cc (commutative_optab_p): Add widening plus optabs. | |
33879 | * optabs.def (OPTAB_D): Define widen add, sub optabs. | |
33880 | * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support | |
33881 | patterns with a hi/lo or even/odd split. | |
33882 | (vect_recog_sad_pattern): Refactor to use new IFN codes. | |
33883 | (vect_recog_widen_plus_pattern): Likewise. | |
33884 | (vect_recog_widen_minus_pattern): Likewise. | |
33885 | (vect_recog_average_pattern): Likewise. | |
33886 | * tree-vect-stmts.cc (vectorizable_conversion): Add support for | |
33887 | _HILO IFNs. | |
33888 | (supportable_widening_operation): Likewise. | |
33889 | * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs. | |
33890 | ||
33891 | 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
33892 | Joel Hutton <joel.hutton@arm.com> | |
33893 | ||
33894 | * tree-vect-patterns.cc: Add include for gimple-iterator. | |
33895 | (vect_recog_widen_op_pattern): Refactor to use code_helper. | |
33896 | (vect_gimple_build): New function. | |
33897 | * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use | |
33898 | code_helper. | |
33899 | (vectorizable_call): Likewise. | |
33900 | (vect_gen_widened_results_half): Likewise. | |
33901 | (vect_create_vectorized_demotion_stmts): Likewise. | |
33902 | (vect_create_vectorized_promotion_stmts): Likewise. | |
33903 | (vect_create_half_widening_stmts): Likewise. | |
33904 | (vectorizable_conversion): Likewise. | |
33905 | (supportable_widening_operation): Likewise. | |
33906 | (supportable_narrowing_operation): Likewise. | |
33907 | * tree-vectorizer.h (supportable_widening_operation): Change | |
33908 | prototype to use code_helper. | |
33909 | (supportable_narrowing_operation): Likewise. | |
33910 | (vect_gimple_build): New function prototype. | |
33911 | * tree.h (code_helper::safe_as_tree_code): New function. | |
33912 | (code_helper::safe_as_fn_code): New function. | |
33913 | ||
33914 | 2023-06-05 Roger Sayle <roger@nextmovesoftware.com> | |
33915 | ||
33916 | * wide-int.cc (wi::bitreverse_large): New function implementing | |
33917 | bit reversal of an integer. | |
33918 | * wide-int.h (wi::bitreverse): New (template) function prototype. | |
33919 | (bitreverse_large): Prototype helper function/implementation. | |
33920 | (wi::bitreverse): New template wrapper around bitreverse_large. | |
33921 | ||
33922 | 2023-06-05 Uros Bizjak <ubizjak@gmail.com> | |
33923 | ||
33924 | * rtl.h (print_rtl_single): Change return type from int to void. | |
33925 | (print_rtl_single_with_indent): Ditto. | |
33926 | * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool. | |
33927 | * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change. | |
33928 | (rtx_writer::print_rtx_operand_code_0): Ditto. | |
33929 | (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto. | |
33930 | (rtx_writer::print_rtx_operand_code_i): Ditto. | |
33931 | (rtx_writer::print_rtx_operand_code_u): Ditto. | |
33932 | (rtx_writer::print_rtx_operand): Ditto. | |
33933 | (rtx_writer::print_rtx): Ditto. | |
33934 | (rtx_writer::finish_directive): Ditto. | |
33935 | (print_rtl_single): Change return type from int to void | |
33936 | and adjust function body accordingly. | |
33937 | (rtx_writer::print_rtl_single_with_indent): Ditto. | |
33938 | ||
33939 | 2023-06-05 Uros Bizjak <ubizjak@gmail.com> | |
33940 | ||
33941 | * rtl.h (reg_classes_intersect_p): Change return type from int to bool. | |
33942 | (reg_class_subset_p): Ditto. | |
33943 | * reginfo.cc (reg_classes_intersect_p): Ditto. | |
33944 | (reg_class_subset_p): Ditto. | |
33945 | ||
33946 | 2023-06-05 Pan Li <pan2.li@intel.com> | |
33947 | ||
33948 | * config/riscv/riscv-vector-builtins-types.def | |
33949 | (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS. | |
33950 | (vfloat32m1_t): Ditto. | |
33951 | (vfloat32m2_t): Ditto. | |
33952 | (vfloat32m4_t): Ditto. | |
33953 | (vfloat32m8_t): Ditto. | |
33954 | (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS. | |
33955 | (vint16mf2_t): Ditto. | |
33956 | (vint16m1_t): Ditto. | |
33957 | (vint16m2_t): Ditto. | |
33958 | (vint16m4_t): Ditto. | |
33959 | (vint16m8_t): Ditto. | |
33960 | (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS. | |
33961 | (vuint16mf2_t): Ditto. | |
33962 | (vuint16m1_t): Ditto. | |
33963 | (vuint16m2_t): Ditto. | |
33964 | (vuint16m4_t): Ditto. | |
33965 | (vuint16m8_t): Ditto. | |
33966 | (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS. | |
33967 | (vint32m1_t): Ditto. | |
33968 | (vint32m2_t): Ditto. | |
33969 | (vint32m4_t): Ditto. | |
33970 | (vint32m8_t): Ditto. | |
33971 | (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS. | |
33972 | (vuint32m1_t): Ditto. | |
33973 | (vuint32m2_t): Ditto. | |
33974 | (vuint32m4_t): Ditto. | |
33975 | (vuint32m8_t): Ditto. | |
33976 | * config/riscv/vector-iterators.md: Add FP=16 support for V, | |
33977 | VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1. | |
33978 | ||
33979 | 2023-06-05 Andrew Pinski <apinski@marvell.com> | |
33980 | ||
33981 | PR bootstrap/110085 | |
33982 | * Makefile.in (clean): Remove the removing of | |
33983 | MULTILIB_DIR/MULTILIB_OPTIONS directories. | |
33984 | ||
33985 | 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com> | |
33986 | ||
33987 | * config/mips/mips-protos.h (mips_emit_speculation_barrier): New | |
33988 | prototype. | |
33989 | * config/mips/mips.cc (speculation_barrier_libfunc): New static | |
33990 | variable. | |
33991 | (mips_init_libfuncs): Initialize it. | |
33992 | (mips_emit_speculation_barrier): New function. | |
33993 | * config/mips/mips.md (speculation_barrier): Call | |
33994 | mips_emit_speculation_barrier. | |
33995 | ||
33996 | 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
33997 | ||
33998 | * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions. | |
33999 | (rvv_builder::can_duplicate_repeating_sequence_p): Ditto. | |
34000 | (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto. | |
34001 | (rvv_builder::get_merged_repeating_sequence): Ditto. | |
34002 | (rvv_builder::get_merge_scalar_mask): Ditto. | |
34003 | (emit_scalar_move_insn): Ditto. | |
34004 | (emit_vlmax_integer_move_insn): Ditto. | |
34005 | (emit_nonvlmax_integer_move_insn): Ditto. | |
34006 | (emit_vlmax_gather_insn): Ditto. | |
34007 | (emit_vlmax_masked_gather_mu_insn): Ditto. | |
34008 | (get_repeating_sequence_dup_machine_mode): Ditto. | |
34009 | ||
34010 | 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34011 | ||
34012 | * config/riscv/autovec.md: Split arguments. | |
34013 | * config/riscv/riscv-protos.h (expand_vec_perm): Ditto. | |
34014 | * config/riscv/riscv-v.cc (expand_vec_perm): Ditto. | |
34015 | ||
34016 | 2023-06-04 Andrew Pinski <apinski@marvell.com> | |
34017 | ||
34018 | * expr.cc (do_store_flag): Improve for single bit testing | |
34019 | not against zero but against that single bit. | |
34020 | ||
34021 | 2023-06-04 Andrew Pinski <apinski@marvell.com> | |
34022 | ||
34023 | * expr.cc (do_store_flag): Extend the one bit checking case | |
34024 | to handle the case where we don't have an and but rather still | |
34025 | one bit is known to be non-zero. | |
34026 | ||
34027 | 2023-06-04 Jeff Law <jlaw@ventanamicro.com> | |
34028 | ||
34029 | * config/h8300/constraints.md (Zz): Make this a normal | |
34030 | constraint. | |
34031 | * config/h8300/h8300.cc (TARGET_LRA_P): Remove. | |
34032 | * config/h8300/logical.md (H8/SX bit patterns): Remove. | |
34033 | ||
34034 | 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
34035 | ||
34036 | * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN): | |
34037 | New insn_and_split patterns. | |
34038 | ||
34039 | 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34040 | ||
34041 | PR target/110109 | |
34042 | * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach. | |
34043 | * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it. | |
34044 | (@vlmul_extx4<mode>): Ditto. | |
34045 | (@vlmul_extx8<mode>): Ditto. | |
34046 | (@vlmul_extx16<mode>): Ditto. | |
34047 | (@vlmul_extx32<mode>): Ditto. | |
34048 | (@vlmul_extx64<mode>): Ditto. | |
34049 | (*vlmul_extx2<mode>): Ditto. | |
34050 | (*vlmul_extx4<mode>): Ditto. | |
34051 | (*vlmul_extx8<mode>): Ditto. | |
34052 | (*vlmul_extx16<mode>): Ditto. | |
34053 | (*vlmul_extx32<mode>): Ditto. | |
34054 | (*vlmul_extx64<mode>): Ditto. | |
34055 | ||
34056 | 2023-06-04 Pan Li <pan2.li@intel.com> | |
34057 | ||
34058 | * config/riscv/riscv-vector-builtins-types.def | |
34059 | (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations. | |
34060 | (vfloat32m1_t): Likewise. | |
34061 | (vfloat32m2_t): Likewise. | |
34062 | (vfloat32m4_t): Likewise. | |
34063 | (vfloat32m8_t): Likewise. | |
34064 | * config/riscv/riscv-vector-builtins.def: Fix typo in comments. | |
34065 | * config/riscv/vector-iterators.md: Add single to half machine | |
34066 | mode conversion. | |
34067 | ||
34068 | 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34069 | ||
34070 | * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md. | |
34071 | (*n<optab><mode>): Ditto. | |
34072 | * config/riscv/autovec.md (*<optab>not<mode>): Ditto. | |
34073 | (*n<optab><mode>): Ditto. | |
34074 | * config/riscv/vector.md: Ditto. | |
34075 | ||
34076 | 2023-06-04 Roger Sayle <roger@nextmovesoftware.com> | |
34077 | ||
34078 | PR target/110083 | |
34079 | * config/i386/i386-features.cc (scalar_chain::convert_compare): | |
34080 | Update or delete REG_EQUAL notes, converting CONST_INT and | |
34081 | CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR. | |
34082 | ||
34083 | 2023-06-04 Jason Merrill <jason@redhat.com> | |
34084 | ||
34085 | PR c++/97720 | |
34086 | * tree-eh.cc (lower_resx): Pass the exception pointer to the | |
34087 | failure_decl. | |
34088 | * except.h: Tweak comment. | |
34089 | ||
34090 | 2023-06-04 Hans-Peter Nilsson <hp@axis.com> | |
34091 | ||
34092 | * postreload.cc (move2add_use_add2_insn): Handle | |
34093 | trivial single_sets. Rename variable PAT to SET. | |
34094 | (move2add_use_add3_insn, reload_cse_move2add): Similar. | |
34095 | ||
34096 | 2023-06-04 Pan Li <pan2.li@intel.com> | |
34097 | ||
34098 | * config/riscv/riscv-vector-builtins-types.def | |
34099 | (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS. | |
34100 | (vfloat16mf2_t): Likewise. | |
34101 | (vfloat16m1_t): Likewise. | |
34102 | (vfloat16m2_t): Likewise. | |
34103 | (vfloat16m4_t): Likewise. | |
34104 | (vfloat16m8_t): Likewise. | |
34105 | * config/riscv/riscv.md: Add vfloat16*_t to attr mode. | |
34106 | * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode | |
34107 | to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew. | |
34108 | * config/riscv/vector.md: Add vfloat16*_t machine mode to sew, | |
34109 | vlmul and ratio. | |
34110 | ||
34111 | 2023-06-03 Fei Gao <gaofei@eswincomputing.com> | |
34112 | ||
34113 | * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with | |
34114 | correct offset. | |
34115 | ||
34116 | 2023-06-03 Die Li <lidie@eswincomputing.com> | |
34117 | ||
34118 | * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete. | |
34119 | ||
34120 | 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34121 | ||
34122 | * config/riscv/predicates.md: Change INTVAL into UINTVAL. | |
34123 | ||
34124 | 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34125 | ||
34126 | * config/riscv/vector.md: Add vector-opt.md. | |
34127 | * config/riscv/autovec-opt.md: New file. | |
34128 | ||
34129 | 2023-06-03 liuhongt <hongtao.liu@intel.com> | |
34130 | ||
34131 | PR tree-optimization/110067 | |
34132 | * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try | |
34133 | bswap + rotate when TYPE_PRECISION(n->type) > n->range. | |
34134 | ||
34135 | 2023-06-03 liuhongt <hongtao.liu@intel.com> | |
34136 | ||
34137 | PR target/92658 | |
34138 | * config/i386/mmx.md (truncv2hiv2qi2): New define_insn. | |
34139 | (truncv2si<mode>2): Ditto. | |
34140 | ||
34141 | 2023-06-02 Andrew Pinski <apinski@marvell.com> | |
34142 | ||
34143 | PR rtl-optimization/102733 | |
34144 | * dse.cc (store_info): Add addrspace field. | |
34145 | (record_store): Record the address space | |
34146 | and check to make sure they are the same. | |
34147 | ||
34148 | 2023-06-02 Andrew Pinski <apinski@marvell.com> | |
34149 | ||
34150 | PR rtl-optimization/110042 | |
34151 | * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs. | |
34152 | (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST. | |
34153 | ||
34154 | 2023-06-02 Iain Sandoe <iain@sandoe.co.uk> | |
34155 | ||
34156 | PR target/110044 | |
34157 | * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align): | |
34158 | Make sure that we do not have a cap on field alignment before altering | |
34159 | the struct layout based on the type alignment of the first entry. | |
34160 | ||
34161 | 2023-06-02 David Faust <david.faust@oracle.com> | |
34162 | ||
34163 | PR debug/110073 | |
34164 | * btfout.cc (btf_absolute_func_id): New function. | |
34165 | (btf_asm_func_type): Call it here. Change index parameter from | |
34166 | size_t to ctf_id_t. Use PRIu64 formatter. | |
34167 | ||
34168 | 2023-06-02 Alex Coplan <alex.coplan@arm.com> | |
34169 | ||
34170 | * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t. | |
34171 | (btf_asm_datasec_type): Likewise. | |
34172 | ||
34173 | 2023-06-02 Carl Love <cel@us.ibm.com> | |
34174 | ||
34175 | * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx, | |
34176 | __builtin_altivec_tr_stxvrwx): Fix type of third argument. | |
34177 | ||
34178 | 2023-06-02 Jason Merrill <jason@redhat.com> | |
34179 | ||
34180 | PR c++/110070 | |
34181 | PR c++/105838 | |
34182 | * tree.h (DECL_MERGEABLE): New. | |
34183 | * tree-core.h (struct tree_decl_common): Mention it. | |
34184 | * gimplify.cc (gimplify_init_constructor): Check it. | |
34185 | * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise. | |
34186 | * varasm.cc (categorize_decl_for_section): Likewise. | |
34187 | ||
34188 | 2023-06-02 Uros Bizjak <ubizjak@gmail.com> | |
34189 | ||
34190 | * rtl.h (stack_regs_mentioned): Change return type from int to bool. | |
34191 | * reg-stack.cc (struct_block_info_def): Change "done" to bool. | |
34192 | (stack_regs_mentioned_p): Change return type from int to bool | |
34193 | and adjust function body accordingly. | |
34194 | (stack_regs_mentioned): Ditto. | |
34195 | (check_asm_stack_operands): Ditto. Change "malformed_asm" | |
34196 | variable to bool. | |
34197 | (move_for_stack_reg): Recode handling of control_flow_insn_deleted. | |
34198 | (swap_rtx_condition_1): Change return type from int to bool | |
34199 | and adjust function body accordingly. Change "r" variable to bool. | |
34200 | (swap_rtx_condition): Change return type from int to bool | |
34201 | and adjust function body accordingly. | |
34202 | (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted. | |
34203 | (subst_stack_regs): Ditto. | |
34204 | (convert_regs_entry): Change return type from int to bool and adjust | |
34205 | function body accordingly. Change "inserted" variable to bool. | |
34206 | (convert_regs_1): Recode handling of control_flow_insn_deleted. | |
34207 | (convert_regs_2): Recode handling of cfg_altered. | |
34208 | (convert_regs): Ditto. Change "inserted" variable to bool. | |
34209 | ||
34210 | 2023-06-02 Jason Merrill <jason@redhat.com> | |
34211 | ||
34212 | PR c++/95226 | |
34213 | * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match. | |
34214 | (initializer_constant_valid_p_1): Compare float precision. | |
34215 | ||
34216 | 2023-06-02 Alexander Monakov <amonakov@ispras.ru> | |
34217 | ||
34218 | * doc/extend.texi (Vector Extensions): Clarify bitwise shift | |
34219 | semantics. | |
34220 | ||
34221 | 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
34222 | ||
34223 | * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow. | |
34224 | (vect_set_loop_condition_partial_vectors): Ditto. | |
34225 | ||
34226 | 2023-06-02 Georg-Johann Lay <avr@gjlay.de> | |
34227 | ||
34228 | PR target/110088 | |
34229 | * config/avr/avr.md: Add an RTL peephole to optimize operations on | |
34230 | non-LD_REGS after a move from LD_REGS. | |
34231 | (piaop): New code iterator. | |
34232 | ||
34233 | 2023-06-02 Thomas Schwinge <thomas@codesourcery.com> | |
34234 | ||
34235 | PR testsuite/66005 | |
34236 | * doc/install.texi: Document (optional) Perl usage for parallel | |
34237 | testing of libgomp. | |
34238 | ||
34239 | 2023-06-02 Thomas Schwinge <thomas@codesourcery.com> | |
34240 | ||
34241 | PR bootstrap/82856 | |
34242 | * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or | |
34243 | later)". | |
34244 | ||
34245 | 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34246 | KuanLin Chen <best124612@gmail.com> | |
34247 | ||
34248 | * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics. | |
34249 | * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto. | |
34250 | ||
34251 | 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34252 | ||
34253 | * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector. | |
34254 | ||
34255 | 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34256 | ||
34257 | * config/riscv/predicates.md: Change INTVAL into UINTVAL. | |
34258 | ||
34259 | 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34260 | ||
34261 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add | |
34262 | __RISCV_ prefix. | |
34263 | (DEF_RVV_FRM_ENUM): Ditto. | |
34264 | ||
34265 | 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34266 | ||
34267 | * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv | |
34268 | intrinsic API expander | |
34269 | * config/riscv/vector.md | |
34270 | (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it. | |
34271 | (@pred_single_widen_sub<any_extend:su><mode>): New pattern. | |
34272 | (@pred_single_widen_add<any_extend:su><mode>): New pattern. | |
34273 | ||
34274 | 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34275 | ||
34276 | * config/riscv/autovec.md (vec_perm<mode>): New pattern. | |
34277 | * config/riscv/predicates.md (vector_perm_operand): New predicate. | |
34278 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
34279 | (expand_vec_perm): New function. | |
34280 | * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto. | |
34281 | (gen_const_vector_dup): Ditto. | |
34282 | (emit_vlmax_gather_insn): Ditto. | |
34283 | (emit_vlmax_masked_gather_mu_insn): Ditto. | |
34284 | (expand_vec_perm): Ditto. | |
34285 | ||
34286 | 2023-06-01 Jason Merrill <jason@redhat.com> | |
34287 | ||
34288 | * doc/invoke.texi (-Wpedantic): Improve clarity. | |
34289 | ||
34290 | 2023-06-01 Uros Bizjak <ubizjak@gmail.com> | |
34291 | ||
34292 | * rtl.h (exp_equiv_p): Change return type from int to bool. | |
34293 | * cse.cc (mention_regs): Change return type from int to bool | |
34294 | and adjust function body accordingly. | |
34295 | (exp_equiv_p): Ditto. | |
34296 | (insert_regs): Ditto. Change "modified" function argument to bool | |
34297 | and update usage accordingly. | |
34298 | (record_jump_cond): Remove always zero "reversed_nonequality" | |
34299 | function argument and update usage accordingly. | |
34300 | (fold_rtx): Change "changed" variable to bool. | |
34301 | (record_jump_equiv): Remove unneeded "reversed_nonequality" variable. | |
34302 | (is_dead_reg): Change return type from int to bool. | |
34303 | ||
34304 | 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
34305 | ||
34306 | * config/xtensa/xtensa.md (adddi3, subdi3): | |
34307 | New RTL generation patterns implemented according to the instruc- | |
34308 | tion idioms described in the Xtensa ISA reference manual (p. 600). | |
34309 | ||
34310 | 2023-06-01 Roger Sayle <roger@nextmovesoftware.com> | |
34311 | Uros Bizjak <ubizjak@gmail.com> | |
34312 | ||
34313 | PR target/109973 | |
34314 | * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new | |
34315 | CODE_for_sse4_1_ptestzv2di. | |
34316 | (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di. | |
34317 | (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di. | |
34318 | (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di. | |
34319 | * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode | |
34320 | when expanding UNSPEC_PTEST to compare against zero. | |
34321 | * config/i386/i386-features.cc (scalar_chain::convert_compare): | |
34322 | Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons. | |
34323 | (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result. | |
34324 | (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result. | |
34325 | * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype. | |
34326 | * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to | |
34327 | check for suitable matching modes for the UNSPEC_PTEST pattern. | |
34328 | * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK | |
34329 | to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ. | |
34330 | (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove | |
34331 | ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode. | |
34332 | (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ. | |
34333 | (<sse4_1>_ptestc<mode>): New define_expand to specify CCC. | |
34334 | (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the | |
34335 | current behavior. | |
34336 | (*ptest<mode>_and): Specify CCZ to only perform this optimization | |
34337 | when only the Z flag is required. | |
34338 | ||
34339 | 2023-06-01 Jonathan Wakely <jwakely@redhat.com> | |
34340 | ||
34341 | PR target/109954 | |
34342 | * doc/invoke.texi (x86 Options): Fix description of -m32 option. | |
34343 | ||
34344 | 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34345 | ||
34346 | * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): | |
34347 | Add =r,m and =r,m alternatives. | |
34348 | (load_pair<DREG:mode><DREG2:mode>): Likewise. | |
34349 | (vec_store_pair<DREG:mode><DREG2:mode>): Likewise. | |
34350 | ||
34351 | 2023-06-01 Pan Li <pan2.li@intel.com> | |
34352 | ||
34353 | * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin | |
34354 | and zvfh. | |
34355 | * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16. | |
34356 | (main): Disable FP16 tuple. | |
34357 | * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro. | |
34358 | (TARGET_VECTOR_ELEN_FP_16): Ditto. | |
34359 | * config/riscv/riscv-vector-builtins.cc (check_required_extensions): | |
34360 | Add FP16. | |
34361 | * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type. | |
34362 | (vfloat16mf2_t): Ditto. | |
34363 | (vfloat16m1_t): Ditto. | |
34364 | (vfloat16m2_t): Ditto. | |
34365 | (vfloat16m4_t): Ditto. | |
34366 | (vfloat16m8_t): Ditto. | |
34367 | * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16): | |
34368 | New macro. | |
34369 | * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16 | |
34370 | machine mode based on TARGET_VECTOR_ELEN_FP_16. | |
34371 | ||
34372 | 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34373 | ||
34374 | * config/riscv/riscv-vector-builtins.cc (register_frm): New function. | |
34375 | (DEF_RVV_FRM_ENUM): New macro. | |
34376 | (handle_pragma_vector): Add FRM enum | |
34377 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro. | |
34378 | (RNE): Ditto. | |
34379 | (RTZ): Ditto. | |
34380 | (RDN): Ditto. | |
34381 | (RUP): Ditto. | |
34382 | (RMM): Ditto. | |
34383 | ||
34384 | 2023-05-31 Roger Sayle <roger@nextmovesoftware.com> | |
34385 | Richard Sandiford <richard.sandiford@arm.com> | |
34386 | ||
34387 | * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>: | |
34388 | Update call to wi::bswap. | |
34389 | * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>: | |
34390 | Update call to wi::bswap. | |
34391 | * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>: | |
34392 | Update calls to wi::bswap. | |
34393 | * wide-int.cc (wide_int_storage::bswap): Remove/rename to... | |
34394 | (wi::bswap_large): New function, with revised API. | |
34395 | * wide-int.h (wi::bswap): New (template) function prototype. | |
34396 | (wide_int_storage::bswap): Remove method. | |
34397 | (sext_large, zext_large): Consistent indentation/line wrapping. | |
34398 | (bswap_large): Prototype helper function containing implementation. | |
34399 | (wi::bswap): New template wrapper around bswap_large. | |
34400 | ||
34401 | 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34402 | ||
34403 | PR target/99195 | |
34404 | * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to... | |
34405 | (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This. | |
34406 | (usdot_prod<vsi2qi>): Rename to... | |
34407 | (usdot_prod<vsi2qi><vczle><vczbe>): ... This. | |
34408 | (aarch64_<sur>dot_lane<vsi2qi>): Rename to... | |
34409 | (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This. | |
34410 | (aarch64_<sur>dot_laneq<vsi2qi>): Rename to... | |
34411 | (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This. | |
34412 | (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to... | |
34413 | (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>): | |
34414 | ... This. | |
34415 | ||
34416 | 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34417 | ||
34418 | PR target/99195 | |
34419 | * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to... | |
34420 | (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This. | |
34421 | (aarch64_sq<r>dmulh_n<mode>): Rename to... | |
34422 | (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This. | |
34423 | (aarch64_sq<r>dmulh_lane<mode>): Rename to... | |
34424 | (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This. | |
34425 | (aarch64_sq<r>dmulh_laneq<mode>): Rename to... | |
34426 | (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This. | |
34427 | (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to... | |
34428 | (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This. | |
34429 | (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to... | |
34430 | (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This. | |
34431 | (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to... | |
34432 | (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This. | |
34433 | ||
34434 | 2023-05-31 David Faust <david.faust@oracle.com> | |
34435 | ||
34436 | * btfout.cc (btf_kind_names): New. | |
34437 | (btf_kind_name): New. | |
34438 | (btf_absolute_var_id): New utility function. | |
34439 | (btf_relative_var_id): Likewise. | |
34440 | (btf_relative_func_id): Likewise. | |
34441 | (btf_absolute_datasec_id): Likewise. | |
34442 | (btf_asm_type_ref): New. | |
34443 | (btf_asm_type): Update asm comments and use btf_asm_type_ref (). | |
34444 | (btf_asm_array): Likewise. Accept ctf_container_ref parameter. | |
34445 | (btf_asm_varent): Likewise. | |
34446 | (btf_asm_func_arg): Likewise. | |
34447 | (btf_asm_datasec_entry): Likewise. | |
34448 | (btf_asm_datasec_type): Likewise. | |
34449 | (btf_asm_func_type): Likewise. Add index parameter. | |
34450 | (btf_asm_enum_const): Likewise. | |
34451 | (btf_asm_sou_member): Likewise. | |
34452 | (output_btf_vars): Update btf_asm_* call accordingly. | |
34453 | (output_asm_btf_sou_fields): Likewise. | |
34454 | (output_asm_btf_enum_list): Likewise. | |
34455 | (output_asm_btf_func_args_list): Likewise. | |
34456 | (output_asm_btf_vlen_bytes): Likewise. | |
34457 | (output_btf_func_types): Add ctf_container_ref parameter. | |
34458 | Pass it to btf_asm_func_type. | |
34459 | (output_btf_datasec_types): Update btf_asm_datsec_type call similarly. | |
34460 | (btf_output): Update output_btf_func_types call similarly. | |
34461 | ||
34462 | 2023-05-31 David Faust <david.faust@oracle.com> | |
34463 | ||
34464 | * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY | |
34465 | and BTF_KIND_FWD which do not use the size/type field at all. | |
34466 | ||
34467 | 2023-05-31 Uros Bizjak <ubizjak@gmail.com> | |
34468 | ||
34469 | * rtl.h (subreg_lowpart_p): Change return type from int to bool. | |
34470 | (active_insn_p): Ditto. | |
34471 | (in_sequence_p): Ditto. | |
34472 | (unshare_all_rtl): Change return type from int to void. | |
34473 | * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool. | |
34474 | * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool | |
34475 | and adjust function body accordingly. | |
34476 | (mem_expr_equal_p): Ditto. | |
34477 | (unshare_all_rtl): Change return type from int to void | |
34478 | and adjust function body accordingly. | |
34479 | (verify_rtx_sharing): Remove unneeded return. | |
34480 | (active_insn_p): Change return type from int to bool | |
34481 | and adjust function body accordingly. | |
34482 | (in_sequence_p): Ditto. | |
34483 | ||
34484 | 2023-05-31 Uros Bizjak <ubizjak@gmail.com> | |
34485 | ||
34486 | * rtl.h (true_dependence): Change return type from int to bool. | |
34487 | (canon_true_dependence): Ditto. | |
34488 | (read_dependence): Ditto. | |
34489 | (anti_dependence): Ditto. | |
34490 | (canon_anti_dependence): Ditto. | |
34491 | (output_dependence): Ditto. | |
34492 | (canon_output_dependence): Ditto. | |
34493 | (may_alias_p): Ditto. | |
34494 | * alias.h (alias_sets_conflict_p): Ditto. | |
34495 | (alias_sets_must_conflict_p): Ditto. | |
34496 | (objects_must_conflict_p): Ditto. | |
34497 | (nonoverlapping_memrefs_p): Ditto. | |
34498 | * alias.cc (rtx_equal_for_memref_p): Remove forward declaration. | |
34499 | (record_set): Ditto. | |
34500 | (base_alias_check): Ditto. | |
34501 | (find_base_value): Ditto. | |
34502 | (mems_in_disjoint_alias_sets_p): Ditto. | |
34503 | (get_alias_set_entry): Ditto. | |
34504 | (decl_for_component_ref): Ditto. | |
34505 | (write_dependence_p): Ditto. | |
34506 | (memory_modified_1): Ditto. | |
34507 | (mems_in_disjoint_alias_set_p): Change return type from int to bool | |
34508 | and adjust function body accordingly. | |
34509 | (alias_sets_conflict_p): Ditto. | |
34510 | (alias_sets_must_conflict_p): Ditto. | |
34511 | (objects_must_conflict_p): Ditto. | |
34512 | (rtx_equal_for_memref_p): Ditto. | |
34513 | (base_alias_check): Ditto. | |
34514 | (read_dependence): Ditto. | |
34515 | (nonoverlapping_memrefs_p): Ditto. | |
34516 | (true_dependence_1): Ditto. | |
34517 | (true_dependence): Ditto. | |
34518 | (canon_true_dependence): Ditto. | |
34519 | (write_dependence_p): Ditto. | |
34520 | (anti_dependence): Ditto. | |
34521 | (canon_anti_dependence): Ditto. | |
34522 | (output_dependence): Ditto. | |
34523 | (canon_output_dependence): Ditto. | |
34524 | (may_alias_p): Ditto. | |
34525 | (init_alias_analysis): Change "changed" variable to bool. | |
34526 | ||
34527 | 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34528 | ||
34529 | * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change | |
34530 | expand into define_insn_and_split. | |
34531 | ||
34532 | 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34533 | ||
34534 | * config/riscv/vector.md: Remove FRM. | |
34535 | ||
34536 | 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34537 | ||
34538 | * config/riscv/vector.md: Remove FRM. | |
34539 | ||
34540 | 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34541 | ||
34542 | * config/riscv/vector.md: Remove FRM. | |
34543 | ||
34544 | 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org> | |
34545 | ||
34546 | PR target/110039 | |
34547 | * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New | |
34548 | pattern. | |
34549 | ||
34550 | 2023-05-31 Richard Biener <rguenther@suse.de> | |
34551 | ||
34552 | PR ipa/109983 | |
34553 | PR tree-optimization/109143 | |
34554 | * tree-ssa-structalias.cc (struct topo_info): Remove. | |
34555 | (init_topo_info): Likewise. | |
34556 | (free_topo_info): Likewise. | |
34557 | (compute_topo_order): Simplify API, put the component | |
34558 | with ESCAPED last so it's processed first. | |
34559 | (topo_visit): Adjust. | |
34560 | (solve_graph): Likewise. | |
34561 | ||
34562 | 2023-05-31 Richard Biener <rguenther@suse.de> | |
34563 | ||
34564 | * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges): | |
34565 | New. | |
34566 | (add_graph_edge): Count redundant edges we avoid to create. | |
34567 | (dump_sa_stats): Dump them. | |
34568 | (ipa_pta_execute): Do not dump generating constraints when | |
34569 | we are not dumping them. | |
34570 | ||
34571 | 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34572 | ||
34573 | * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite | |
34574 | output template to avoid explicit switch on which_alternative. | |
34575 | (*aarch64_simd_mov<VQMOV:mode>): Likewise. | |
34576 | (and<mode>3): Likewise. | |
34577 | (ior<mode>3): Likewise. | |
34578 | * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise. | |
34579 | ||
34580 | 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
34581 | ||
34582 | * config/xtensa/predicates.md (xtensa_bit_join_operator): | |
34583 | New predicate. | |
34584 | * config/xtensa/xtensa.md (ior_op): Remove. | |
34585 | (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the | |
34586 | insn_and_split pattern of the same name to express and capture | |
34587 | the bit-combining operation with both sides swapped. | |
34588 | In addition, replace use of code iterator with new operator | |
34589 | predicate. | |
34590 | (*shlrd_const, *shlrd_per_byte): | |
34591 | Likewise regarding the code iterator. | |
34592 | ||
34593 | 2023-05-31 Cui, Lili <lili.cui@intel.com> | |
34594 | ||
34595 | PR tree-optimization/110038 | |
34596 | * params.opt: Add a limit on tree-reassoc-width. | |
34597 | * tree-ssa-reassoc.cc | |
34598 | (rewrite_expr_tree_parallel): Add width limit. | |
34599 | ||
34600 | 2023-05-31 Pan Li <pan2.li@intel.com> | |
34601 | ||
34602 | * common/config/riscv/riscv-common.cc: | |
34603 | (riscv_implied_info): Add zvfh item. | |
34604 | (riscv_ext_version_table): Ditto. | |
34605 | (riscv_ext_flag_table): Ditto. | |
34606 | * config/riscv/riscv-opts.h (MASK_ZVFH): New macro. | |
34607 | (TARGET_ZVFH): Ditto. | |
34608 | ||
34609 | 2023-05-30 liuhongt <hongtao.liu@intel.com> | |
34610 | ||
34611 | PR tree-optimization/108804 | |
34612 | * tree-vect-patterns.cc (vect_get_range_info): Remove static. | |
34613 | * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts): | |
34614 | Add new parameter narrow_src_p. | |
34615 | (vectorizable_conversion): Enhance NARROW FLOAT_EXPR | |
34616 | vectorization by truncating to lower precision. | |
34617 | * tree-vectorizer.h (vect_get_range_info): New declare. | |
34618 | ||
34619 | 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com> | |
34620 | ||
34621 | * lra-int.h (lra_update_sp_offset): Add the prototype. | |
34622 | * lra.cc (setup_sp_offset): Change the return type. Use | |
34623 | lra_update_sp_offset. | |
34624 | * lra-eliminations.cc (lra_update_sp_offset): New function. | |
34625 | (lra_process_new_insns): Push the current insn to reprocess if the | |
34626 | input reload changes sp offset. | |
34627 | ||
34628 | 2023-05-30 Uros Bizjak <ubizjak@gmail.com> | |
34629 | ||
34630 | PR target/110041 | |
34631 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): | |
34632 | Fix misleading identation. | |
34633 | ||
34634 | 2023-05-30 Uros Bizjak <ubizjak@gmail.com> | |
34635 | ||
34636 | * rtl.h (comparison_dominates_p): Change return type from int to bool. | |
34637 | (condjump_p): Ditto. | |
34638 | (any_condjump_p): Ditto. | |
34639 | (any_uncondjump_p): Ditto. | |
34640 | (simplejump_p): Ditto. | |
34641 | (returnjump_p): Ditto. | |
34642 | (eh_returnjump_p): Ditto. | |
34643 | (onlyjump_p): Ditto. | |
34644 | (invert_jump_1): Ditto. | |
34645 | (invert_jump): Ditto. | |
34646 | (rtx_renumbered_equal_p): Ditto. | |
34647 | (redirect_jump_1): Ditto. | |
34648 | (redirect_jump): Ditto. | |
34649 | (condjump_in_parallel_p): Ditto. | |
34650 | * jump.cc (invert_exp_1): Adjust forward declaration. | |
34651 | (comparison_dominates_p): Change return type from int to bool | |
34652 | and adjust function body accordingly. | |
34653 | (simplejump_p): Ditto. | |
34654 | (condjump_p): Ditto. | |
34655 | (condjump_in_parallel_p): Ditto. | |
34656 | (any_uncondjump_p): Ditto. | |
34657 | (any_condjump_p): Ditto. | |
34658 | (returnjump_p): Ditto. | |
34659 | (eh_returnjump_p): Ditto. | |
34660 | (onlyjump_p): Ditto. | |
34661 | (redirect_jump_1): Ditto. | |
34662 | (redirect_jump): Ditto. | |
34663 | (invert_exp_1): Ditto. | |
34664 | (invert_jump_1): Ditto. | |
34665 | (invert_jump): Ditto. | |
34666 | (rtx_renumbered_equal_p): Ditto. | |
34667 | ||
34668 | 2023-05-30 Andrew Pinski <apinski@marvell.com> | |
34669 | ||
34670 | * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR. | |
34671 | * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern): | |
34672 | Add ne as a possible cmp. | |
34673 | ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise. | |
34674 | ||
34675 | 2023-05-30 Andrew Pinski <apinski@marvell.com> | |
34676 | ||
34677 | * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New | |
34678 | pattern. | |
34679 | ||
34680 | 2023-05-30 Roger Sayle <roger@nextmovesoftware.com> | |
34681 | ||
34682 | * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int | |
34683 | instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of | |
34684 | (and (extend X) C) as (zero_extend (and X C)), to also optimize | |
34685 | modes wider than HOST_WIDE_INT. | |
34686 | ||
34687 | 2023-05-30 Roger Sayle <roger@nextmovesoftware.com> | |
34688 | ||
34689 | PR target/107172 | |
34690 | * simplify-rtx.cc (simplify_const_relational_operation): Return | |
34691 | early if we have a MODE_CC comparison that isn't a COMPARE against | |
34692 | const0_rtx. | |
34693 | ||
34694 | 2023-05-30 Robin Dapp <rdapp@ventanamicro.com> | |
34695 | ||
34696 | * config/riscv/riscv.cc (riscv_const_insns): Allow | |
34697 | const_vec_duplicates. | |
34698 | ||
34699 | 2023-05-30 liuhongt <hongtao.liu@intel.com> | |
34700 | ||
34701 | PR middle-end/108938 | |
34702 | * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New | |
34703 | function, cut from original find_bswap_or_nop function. | |
34704 | (find_bswap_or_nop): Add a new parameter, detect bswap + | |
34705 | rotate and save rotate result in the new parameter. | |
34706 | (bswap_replace): Add a new parameter to indicate rotate and | |
34707 | generate rotate stmt if needed. | |
34708 | (maybe_optimize_vector_constructor): Adjust for new rotate | |
34709 | parameter in the upper 2 functions. | |
34710 | (pass_optimize_bswap::execute): Ditto. | |
34711 | (imm_store_chain_info::output_merged_store): Ditto. | |
34712 | ||
34713 | 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34714 | ||
34715 | * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete. | |
34716 | (aarch64_<su>adalp<mode>): New define_expand. | |
34717 | (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn. | |
34718 | (aarch64_<su>addlp<mode>): Convert to define_expand. | |
34719 | (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn. | |
34720 | * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete. | |
34721 | (ADALP): Likewise. | |
34722 | (USADDLP): Likewise. | |
34723 | * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define. | |
34724 | ||
34725 | 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34726 | ||
34727 | * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of | |
34728 | aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd, | |
34729 | srhadd, urhadd builtin codes for standard optab ones. | |
34730 | * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to... | |
34731 | (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than | |
34732 | unspec. | |
34733 | (<u>avg<mode>3_ceil): Rename to... | |
34734 | (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than | |
34735 | unspec. | |
34736 | (aarch64_<su>hsub<mode>): New define_expand. | |
34737 | (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into... | |
34738 | (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This... | |
34739 | (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this. | |
34740 | ||
34741 | 2023-05-30 Andreas Schwab <schwab@suse.de> | |
34742 | ||
34743 | PR target/110036 | |
34744 | * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to | |
34745 | match libsanitizer. | |
34746 | ||
34747 | 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
34748 | ||
34749 | * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes. | |
34750 | * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p): | |
34751 | Declare prototype. | |
34752 | (aarch64_const_vec_rsra_rnd_imm_p): Likewise. | |
34753 | * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to... | |
34754 | (aarch64_<sra_op>sra_n<mode>_insn): ... This. | |
34755 | (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn. | |
34756 | (aarch64_<sra_op>sra_n<mode>): New define_expand. | |
34757 | (aarch64_<sra_op>rsra_n<mode>): Likewise. | |
34758 | (aarch64_<sur>sra_n<mode>): Rename to... | |
34759 | (aarch64_<sur>sra_ndi): ... This. | |
34760 | * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add | |
34761 | any_target_p argument. | |
34762 | (aarch64_extract_vec_duplicate_wide_int): Define. | |
34763 | (aarch64_const_vec_rsra_rnd_imm_p): Likewise. | |
34764 | (aarch64_const_vec_rnd_cst_p): Likewise. | |
34765 | (aarch64_vector_mode_supported_any_target_p): Likewise. | |
34766 | (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise. | |
34767 | * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete. | |
34768 | (VSRA): Adjust for the above. | |
34769 | (sur): Likewise. | |
34770 | (V2XWIDE): New mode_attr. | |
34771 | (vec_or_offset): Likewise. | |
34772 | (SHIFTEXTEND): Likewise. | |
34773 | * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New | |
34774 | predicate. | |
34775 | * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to | |
34776 | clarify that it applies to current target options. | |
34777 | (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document. | |
34778 | * doc/tm.texi.in: Regenerate. | |
34779 | * stor-layout.cc (mode_for_vector): Check | |
34780 | vector_mode_supported_any_target_p when iterating through vector modes. | |
34781 | * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to | |
34782 | clarify that it applies to current target options. | |
34783 | (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define. | |
34784 | ||
34785 | 2023-05-30 Lili Cui <lili.cui@intel.com> | |
34786 | ||
34787 | PR tree-optimization/98350 | |
34788 | * tree-ssa-reassoc.cc | |
34789 | (rewrite_expr_tree_parallel): Rewrite this function. | |
34790 | (rank_ops_for_fma): New. | |
34791 | (reassociate_bb): Handle new function. | |
34792 | ||
34793 | 2023-05-30 Uros Bizjak <ubizjak@gmail.com> | |
34794 | ||
34795 | * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool. | |
34796 | (rtx_unstable_p): Ditto. | |
34797 | (reg_mentioned_p): Ditto. | |
34798 | (reg_referenced_p): Ditto. | |
34799 | (reg_used_between_p): Ditto. | |
34800 | (reg_set_between_p): Ditto. | |
34801 | (modified_between_p): Ditto. | |
34802 | (no_labels_between_p): Ditto. | |
34803 | (modified_in_p): Ditto. | |
34804 | (reg_set_p): Ditto. | |
34805 | (multiple_sets): Ditto. | |
34806 | (set_noop_p): Ditto. | |
34807 | (noop_move_p): Ditto. | |
34808 | (reg_overlap_mentioned_p): Ditto. | |
34809 | (dead_or_set_p): Ditto. | |
34810 | (dead_or_set_regno_p): Ditto. | |
34811 | (find_reg_fusage): Ditto. | |
34812 | (find_regno_fusage): Ditto. | |
34813 | (side_effects_p): Ditto. | |
34814 | (volatile_refs_p): Ditto. | |
34815 | (volatile_insn_p): Ditto. | |
34816 | (may_trap_p_1): Ditto. | |
34817 | (may_trap_p): Ditto. | |
34818 | (may_trap_or_fault_p): Ditto. | |
34819 | (computed_jump_p): Ditto. | |
34820 | (auto_inc_p): Ditto. | |
34821 | (loc_mentioned_in_p): Ditto. | |
34822 | * rtlanal.cc (computed_jump_p_1): Adjust forward declaration. | |
34823 | (rtx_unstable_p): Change return type from int to bool | |
34824 | and adjust function body accordingly. | |
34825 | (rtx_addr_can_trap_p): Ditto. | |
34826 | (reg_mentioned_p): Ditto. | |
34827 | (no_labels_between_p): Ditto. | |
34828 | (reg_used_between_p): Ditto. | |
34829 | (reg_referenced_p): Ditto. | |
34830 | (reg_set_between_p): Ditto. | |
34831 | (reg_set_p): Ditto. | |
34832 | (modified_between_p): Ditto. | |
34833 | (modified_in_p): Ditto. | |
34834 | (multiple_sets): Ditto. | |
34835 | (set_noop_p): Ditto. | |
34836 | (noop_move_p): Ditto. | |
34837 | (reg_overlap_mentioned_p): Ditto. | |
34838 | (dead_or_set_p): Ditto. | |
34839 | (dead_or_set_regno_p): Ditto. | |
34840 | (find_reg_fusage): Ditto. | |
34841 | (find_regno_fusage): Ditto. | |
34842 | (remove_node_from_insn_list): Ditto. | |
34843 | (volatile_insn_p): Ditto. | |
34844 | (volatile_refs_p): Ditto. | |
34845 | (side_effects_p): Ditto. | |
34846 | (may_trap_p_1): Ditto. | |
34847 | (may_trap_p): Ditto. | |
34848 | (may_trap_or_fault_p): Ditto. | |
34849 | (computed_jump_p): Ditto. | |
34850 | (auto_inc_p): Ditto. | |
34851 | (loc_mentioned_in_p): Ditto. | |
34852 | * combine.cc (can_combine_p): Update indirect function. | |
34853 | ||
34854 | 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34855 | ||
34856 | * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern. | |
34857 | * config/riscv/iterators.md: New attribute. | |
34858 | * config/riscv/vector-iterators.md: New attribute. | |
34859 | ||
34860 | 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34861 | ||
34862 | * config/riscv/riscv.md: Fix signed and unsigned comparison | |
34863 | warning. | |
34864 | ||
34865 | 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34866 | ||
34867 | * config/riscv/autovec.md (fnma<mode>4): New pattern. | |
34868 | (*fnma<mode>): Ditto. | |
34869 | ||
34870 | 2023-05-29 Die Li <lidie@eswincomputing.com> | |
34871 | ||
34872 | * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided): | |
34873 | Delete. | |
34874 | (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand | |
34875 | process for TARGET_XTHEADCONDMOV | |
34876 | ||
34877 | 2023-05-29 Uros Bizjak <ubizjak@gmail.com> | |
34878 | ||
34879 | PR target/110021 | |
34880 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require | |
34881 | TARGET_AVX512BW to generate truncv16hiv16qi2. | |
34882 | ||
34883 | 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
34884 | ||
34885 | * config/riscv/riscv.md (and<mode>3): New expander. | |
34886 | (*and<mode>3) New pattern. | |
34887 | * config/riscv/predicates.md (arith_operand_or_mode_mask): New | |
34888 | predicate. | |
34889 | ||
34890 | 2023-05-29 Pan Li <pan2.li@intel.com> | |
34891 | ||
34892 | * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary | |
34893 | comments and rename local variables. | |
34894 | (emit_nonvlmax_insn): Diito. | |
34895 | (emit_vlmax_merge_insn): Ditto. | |
34896 | (emit_vlmax_cmp_insn): Ditto. | |
34897 | (emit_vlmax_cmp_mu_insn): Ditto. | |
34898 | (emit_scalar_move_insn): Ditto. | |
34899 | ||
34900 | 2023-05-29 Pan Li <pan2.li@intel.com> | |
34901 | ||
34902 | * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the | |
34903 | magic number. | |
34904 | (emit_nonvlmax_insn): Ditto. | |
34905 | (emit_vlmax_merge_insn): Ditto. | |
34906 | (emit_vlmax_cmp_insn): Ditto. | |
34907 | (emit_vlmax_cmp_mu_insn): Ditto. | |
34908 | (expand_vec_series): Ditto. | |
34909 | ||
34910 | 2023-05-29 Pan Li <pan2.li@intel.com> | |
34911 | ||
34912 | * config/riscv/riscv-protos.h (enum insn_type): New type. | |
34913 | * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro. | |
34914 | (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced | |
34915 | class member. | |
34916 | (rvv_builder::get_merged_repeating_sequence): Ditto. | |
34917 | (rvv_builder::repeating_sequence_use_merge_profitable_p): New function | |
34918 | to evaluate the optimization cost. | |
34919 | (rvv_builder::get_merge_scalar_mask): New function to get the merge | |
34920 | mask. | |
34921 | (emit_scalar_move_insn): New function to emit vmv.s.x. | |
34922 | (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x. | |
34923 | (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax | |
34924 | vmv.v.x. | |
34925 | (get_repeating_sequence_dup_machine_mode): New function to get the dup | |
34926 | machine mode. | |
34927 | (expand_vector_init_merge_repeating_sequence): New function to perform | |
34928 | the optimization. | |
34929 | (expand_vec_init): Add this vector init optimization. | |
34930 | * config/riscv/riscv.h (BITS_PER_WORD): New macro. | |
34931 | ||
34932 | 2023-05-29 Eric Botcazou <ebotcazou@adacore.com> | |
34933 | ||
34934 | * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to | |
34935 | put onto the increment when it is inserted after the position. | |
34936 | ||
34937 | 2023-05-29 Eric Botcazou <ebotcazou@adacore.com> | |
34938 | ||
34939 | * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow | |
34940 | on constants. | |
34941 | ||
34942 | 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34943 | ||
34944 | * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE. | |
34945 | ||
34946 | 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34947 | ||
34948 | * config/riscv/autovec.md (fma<mode>4): New pattern. | |
34949 | (*fma<mode>): Ditto. | |
34950 | * config/riscv/riscv-protos.h (enum insn_type): New enum. | |
34951 | (emit_vlmax_ternary_insn): New function. | |
34952 | * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto. | |
34953 | ||
34954 | 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34955 | ||
34956 | * config/riscv/vector.md: Fix vimuladd instruction bug. | |
34957 | ||
34958 | 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
34959 | ||
34960 | * config/riscv/riscv.cc (global_state_unknown_p): New function. | |
34961 | (riscv_mode_after): Fix incorrect VXM. | |
34962 | ||
34963 | 2023-05-29 Pan Li <pan2.li@intel.com> | |
34964 | ||
34965 | * common/config/riscv/riscv-common.cc: | |
34966 | (riscv_implied_info): Add zvfhmin item. | |
34967 | (riscv_ext_version_table): Ditto. | |
34968 | (riscv_ext_flag_table): Ditto. | |
34969 | * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro. | |
34970 | (TARGET_ZFHMIN): Align indent. | |
34971 | (TARGET_ZFH): Ditto. | |
34972 | (TARGET_ZVFHMIN): New macro. | |
34973 | ||
34974 | 2023-05-27 liuhongt <hongtao.liu@intel.com> | |
34975 | ||
34976 | PR target/100711 | |
34977 | * config/i386/sse.md (*andnot<mode>3): Extend below splitter | |
34978 | to VI_AVX2 to cover more modes. | |
34979 | ||
34980 | 2023-05-27 liuhongt <hongtao.liu@intel.com> | |
34981 | ||
34982 | * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): | |
34983 | Remove ATOM and ICELAKE(and later) core processors. | |
34984 | ||
34985 | 2023-05-26 Robin Dapp <rdapp@ventanamicro.com> | |
34986 | ||
34987 | * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot. | |
34988 | (abs<mode>2): Add. | |
34989 | * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn): | |
34990 | Declare. | |
34991 | * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New | |
34992 | function. | |
34993 | ||
34994 | 2023-05-26 Robin Dapp <rdapp@ventanamicro.com> | |
34995 | Juzhe Zhong <juzhe.zhong@rivai.ai> | |
34996 | ||
34997 | * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New | |
34998 | expander. | |
34999 | (<optab><v_quad_trunc><mode>2): Dito. | |
35000 | (<optab><v_oct_trunc><mode>2): Dito. | |
35001 | (trunc<mode><v_double_trunc>2): Dito. | |
35002 | (trunc<mode><v_quad_trunc>2): Dito. | |
35003 | (trunc<mode><v_oct_trunc>2): Dito. | |
35004 | * config/riscv/riscv-protos.h (vectorize_related_mode): Define. | |
35005 | (autovectorize_vector_modes): Define. | |
35006 | * config/riscv/riscv-v.cc (vectorize_related_mode): Implement | |
35007 | hook. | |
35008 | (autovectorize_vector_modes): Implement hook. | |
35009 | * config/riscv/riscv.cc (riscv_autovectorize_vector_modes): | |
35010 | Implement target hook. | |
35011 | (riscv_vectorize_related_mode): Implement target hook. | |
35012 | (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define. | |
35013 | (TARGET_VECTORIZE_RELATED_MODE): Define. | |
35014 | * config/riscv/vector-iterators.md: Add lowercase versions of | |
35015 | mode_attr iterators. | |
35016 | ||
35017 | 2023-05-26 Andrew Stubbs <ams@codesourcery.com> | |
35018 | Tobias Burnus <tobias@codesourcery.com> | |
35019 | ||
35020 | * config/gcn/gcn-hsa.h (XNACKOPT): New macro. | |
35021 | (ASM_SPEC): Use XNACKOPT. | |
35022 | * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ... | |
35023 | (enum hsaco_attr_type): ... this, and generalize the names. | |
35024 | (TARGET_XNACK): New macro. | |
35025 | * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all | |
35026 | but -mxnack=off. | |
35027 | (output_file_start): Update xnack handling. | |
35028 | (gcn_hsa_declare_function_name): Use TARGET_XNACK. | |
35029 | * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax. | |
35030 | (sram_ecc_type): Rename to ... | |
35031 | (hsaco_attr_type: ... this.) | |
35032 | * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro. | |
35033 | (TEST_XNACK): Delete. | |
35034 | (TEST_XNACK_ANY): New macro. | |
35035 | (TEST_XNACK_ON): New macro. | |
35036 | (main): Support the new -mxnack=on/off/any syntax. | |
35037 | * doc/invoke.texi (-mxnack): Update for new syntax. | |
35038 | ||
35039 | 2023-05-26 Andrew Pinski <apinski@marvell.com> | |
35040 | ||
35041 | * genmatch.cc (emit_debug_printf): New function. | |
35042 | (dt_simplify::gen_1): Emit printf into the code | |
35043 | before the `return true` or returning the folded result | |
35044 | instead of emitting it always. | |
35045 | ||
35046 | 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
35047 | ||
35048 | * config/xtensa/xtensa-protos.h | |
35049 | (xtensa_expand_block_set_unrolled_loop, | |
35050 | xtensa_expand_block_set_small_loop): Remove. | |
35051 | (xtensa_expand_block_set): New prototype. | |
35052 | * config/xtensa/xtensa.cc | |
35053 | (xtensa_expand_block_set_libcall): New subfunction. | |
35054 | (xtensa_expand_block_set_unrolled_loop, | |
35055 | xtensa_expand_block_set_small_loop): Rewrite as subfunctions. | |
35056 | (xtensa_expand_block_set): New function that calls the above | |
35057 | subfunctions. | |
35058 | * config/xtensa/xtensa.md (memsetsi): Change to invoke only | |
35059 | xtensa_expand_block_set(). | |
35060 | ||
35061 | 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
35062 | ||
35063 | * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15): | |
35064 | New prototype. | |
35065 | * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15): | |
35066 | New function. | |
35067 | * config/xtensa/constraints.md (O): | |
35068 | Change to use the above function. | |
35069 | * config/xtensa/xtensa.md (*subsi3_from_const): | |
35070 | New insn_and_split pattern. | |
35071 | ||
35072 | 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
35073 | ||
35074 | * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3): | |
35075 | Retract excessive line folding, and correct the value of | |
35076 | the "length" insn attribute related to TARGET_DENSITY. | |
35077 | (*extzvsi-1bit_addsubx): Ditto. | |
35078 | ||
35079 | 2023-05-26 Uros Bizjak <ubizjak@gmail.com> | |
35080 | ||
35081 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi): | |
35082 | Do not disable call to ix86_expand_vecop_qihi2. | |
35083 | ||
35084 | 2023-05-26 liuhongt <hongtao.liu@intel.com> | |
35085 | ||
35086 | PR target/109610 | |
35087 | PR target/109858 | |
35088 | * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost | |
35089 | calculation when !hard_regno_mode_ok for GENERAL_REGS and | |
35090 | mode, otherwise still use GENERAL_REGS. | |
35091 | ||
35092 | 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35093 | ||
35094 | * config/riscv/riscv.cc (vector_zero_call_used_regs): Add | |
35095 | explict VL and drop VL in ops. | |
35096 | ||
35097 | 2023-05-25 Jin Ma <jinma@linux.alibaba.com> | |
35098 | ||
35099 | * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion | |
35100 | in different BB blocks. | |
35101 | ||
35102 | 2023-05-25 Uros Bizjak <ubizjak@gmail.com> | |
35103 | ||
35104 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): | |
35105 | Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode) | |
35106 | instructions when available. Emulate truncation via | |
35107 | ix86_expand_vec_perm_const_1 when native truncate insn | |
35108 | is not available. | |
35109 | (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx | |
35110 | when available. Trivially rename some variables. | |
35111 | (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2. | |
35112 | * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost | |
35113 | calculation of V*QImode emulations to account for generation of | |
35114 | 2x-wider mode instructions. | |
35115 | (ix86_shift_rotate_cost): Update cost calculation of V*QImode | |
35116 | emulations to account for generation of 2x-wider mode instructions. | |
35117 | ||
35118 | 2023-05-25 Georg-Johann Lay <avr@gjlay.de> | |
35119 | ||
35120 | PR target/104327 | |
35121 | * config/avr/avr.cc (avr_can_inline_p): New static function. | |
35122 | (TARGET_CAN_INLINE_P): Define to that function. | |
35123 | ||
35124 | 2023-05-25 Georg-Johann Lay <avr@gjlay.de> | |
35125 | ||
35126 | PR target/82931 | |
35127 | * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6. | |
35128 | Handle any bit position and use mode QISI. | |
35129 | * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost | |
35130 | of 2 insns for bit-transfer of respective style. | |
35131 | ||
35132 | 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org> | |
35133 | ||
35134 | * config/arm/iterators.md (MVE_6): Remove. | |
35135 | * config/arm/mve.md: Replace MVE_6 with MVE_5. | |
35136 | ||
35137 | 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
35138 | Richard Sandiford <richard.sandiford@arm.com> | |
35139 | ||
35140 | * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New | |
35141 | function. | |
35142 | (vect_set_loop_controls_directly): Add decrement IV support. | |
35143 | (vect_set_loop_condition_partial_vectors): Ditto. | |
35144 | * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New | |
35145 | variable. | |
35146 | * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New | |
35147 | macro. | |
35148 | ||
35149 | 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
35150 | ||
35151 | PR target/99195 | |
35152 | * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to... | |
35153 | (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This. | |
35154 | Fix canonicalization of PLUS operands. | |
35155 | (aarch64_fcmla<rot><mode>): Rename to... | |
35156 | (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This. | |
35157 | Fix canonicalization of PLUS operands. | |
35158 | (aarch64_fcmla_lane<rot><mode>): Rename to... | |
35159 | (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This. | |
35160 | Fix canonicalization of PLUS operands. | |
35161 | (aarch64_fcmla_laneq<rot>v4hf): Rename to... | |
35162 | (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This. | |
35163 | Fix canonicalization of PLUS operands. | |
35164 | (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands. | |
35165 | ||
35166 | 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com> | |
35167 | ||
35168 | * config/arm/arm.md (rbitsi2): Rename to... | |
35169 | (arm_rbit): ... This. | |
35170 | (ctzsi2): Adjust for the above. | |
35171 | (arm_rev16si2): Convert to define_expand. | |
35172 | (arm_rev16si2_alt1): New pattern. | |
35173 | (arm_rev16si2_alt): Rename to... | |
35174 | (*arm_rev16si2_alt2): ... This. | |
35175 | * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll, | |
35176 | __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16, | |
35177 | __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics. | |
35178 | * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins. | |
35179 | ||
35180 | 2023-05-25 Alex Coplan <alex.coplan@arm.com> | |
35181 | ||
35182 | PR target/109800 | |
35183 | * config/arm/arm.md (movdf): Generate temporary pseudo in DImode | |
35184 | instead of DFmode. | |
35185 | * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an | |
35186 | lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into | |
35187 | DFmode as an rvalue. | |
35188 | ||
35189 | 2023-05-25 Richard Biener <rguenther@suse.de> | |
35190 | ||
35191 | PR target/109955 | |
35192 | * tree-vect-stmts.cc (vectorizable_condition): For | |
35193 | embedded comparisons also handle the case when the target | |
35194 | only provides vec_cmp and vcond_mask. | |
35195 | ||
35196 | 2023-05-25 Claudiu Zissulescu <claziss@gmail.com> | |
35197 | ||
35198 | * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using | |
35199 | TLS Local Dynamic. | |
35200 | ||
35201 | 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
35202 | ||
35203 | * config/aarch64/aarch64.cc (scalar_move_insn_p): New function. | |
35204 | (seq_cost_ignoring_scalar_moves): Likewise. | |
35205 | (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves. | |
35206 | ||
35207 | 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
35208 | ||
35209 | * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins. | |
35210 | (vcage_f32): Likewise. | |
35211 | (vcages_f32): Likewise. | |
35212 | (vcageq_f32): Likewise. | |
35213 | (vcaged_f64): Likewise. | |
35214 | (vcageq_f64): Likewise. | |
35215 | (vcagts_f32): Likewise. | |
35216 | (vcagt_f32): Likewise. | |
35217 | (vcagt_f64): Likewise. | |
35218 | (vcagtq_f32): Likewise. | |
35219 | (vcagtd_f64): Likewise. | |
35220 | (vcagtq_f64): Likewise. | |
35221 | (vcale_f32): Likewise. | |
35222 | (vcale_f64): Likewise. | |
35223 | (vcaled_f64): Likewise. | |
35224 | (vcales_f32): Likewise. | |
35225 | (vcaleq_f32): Likewise. | |
35226 | (vcaleq_f64): Likewise. | |
35227 | (vcalt_f32): Likewise. | |
35228 | (vcalt_f64): Likewise. | |
35229 | (vcaltd_f64): Likewise. | |
35230 | (vcaltq_f32): Likewise. | |
35231 | (vcaltq_f64): Likewise. | |
35232 | (vcalts_f32): Likewise. | |
35233 | ||
35234 | 2023-05-25 Hu, Lin1 <lin1.hu@intel.com> | |
35235 | ||
35236 | PR target/109173 | |
35237 | PR target/109174 | |
35238 | * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from | |
35239 | int to const int or const int to const unsigned int. | |
35240 | (_mm512_mask_srli_epi16): Ditto. | |
35241 | (_mm512_slli_epi16): Ditto. | |
35242 | (_mm512_mask_slli_epi16): Ditto. | |
35243 | (_mm512_maskz_slli_epi16): Ditto. | |
35244 | (_mm512_srai_epi16): Ditto. | |
35245 | (_mm512_mask_srai_epi16): Ditto. | |
35246 | (_mm512_maskz_srai_epi16): Ditto. | |
35247 | * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto. | |
35248 | (_mm512_mask_slli_epi64): Ditto. | |
35249 | (_mm512_maskz_slli_epi64): Ditto. | |
35250 | (_mm512_srli_epi64): Ditto. | |
35251 | (_mm512_mask_srli_epi64): Ditto. | |
35252 | (_mm512_maskz_srli_epi64): Ditto. | |
35253 | (_mm512_srai_epi64): Ditto. | |
35254 | (_mm512_mask_srai_epi64): Ditto. | |
35255 | (_mm512_maskz_srai_epi64): Ditto. | |
35256 | (_mm512_slli_epi32): Ditto. | |
35257 | (_mm512_mask_slli_epi32): Ditto. | |
35258 | (_mm512_maskz_slli_epi32): Ditto. | |
35259 | (_mm512_srli_epi32): Ditto. | |
35260 | (_mm512_mask_srli_epi32): Ditto. | |
35261 | (_mm512_maskz_srli_epi32): Ditto. | |
35262 | (_mm512_srai_epi32): Ditto. | |
35263 | (_mm512_mask_srai_epi32): Ditto. | |
35264 | (_mm512_maskz_srai_epi32): Ditto. | |
35265 | * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto. | |
35266 | (_mm256_maskz_srai_epi16): Ditto. | |
35267 | (_mm_mask_srai_epi16): Ditto. | |
35268 | (_mm_maskz_srai_epi16): Ditto. | |
35269 | (_mm256_mask_slli_epi16): Ditto. | |
35270 | (_mm256_maskz_slli_epi16): Ditto. | |
35271 | (_mm_mask_slli_epi16): Ditto. | |
35272 | (_mm_maskz_slli_epi16): Ditto. | |
35273 | (_mm_maskz_srli_epi16): Ditto. | |
35274 | * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto. | |
35275 | (_mm256_maskz_srli_epi32): Ditto. | |
35276 | (_mm_mask_srli_epi32): Ditto. | |
35277 | (_mm_maskz_srli_epi32): Ditto. | |
35278 | (_mm256_mask_srli_epi64): Ditto. | |
35279 | (_mm256_maskz_srli_epi64): Ditto. | |
35280 | (_mm_mask_srli_epi64): Ditto. | |
35281 | (_mm_maskz_srli_epi64): Ditto. | |
35282 | (_mm256_mask_srai_epi32): Ditto. | |
35283 | (_mm256_maskz_srai_epi32): Ditto. | |
35284 | (_mm_mask_srai_epi32): Ditto. | |
35285 | (_mm_maskz_srai_epi32): Ditto. | |
35286 | (_mm256_srai_epi64): Ditto. | |
35287 | (_mm256_mask_srai_epi64): Ditto. | |
35288 | (_mm256_maskz_srai_epi64): Ditto. | |
35289 | (_mm_srai_epi64): Ditto. | |
35290 | (_mm_mask_srai_epi64): Ditto. | |
35291 | (_mm_maskz_srai_epi64): Ditto. | |
35292 | (_mm_mask_slli_epi32): Ditto. | |
35293 | (_mm_maskz_slli_epi32): Ditto. | |
35294 | (_mm_mask_slli_epi64): Ditto. | |
35295 | (_mm_maskz_slli_epi64): Ditto. | |
35296 | (_mm256_mask_slli_epi32): Ditto. | |
35297 | (_mm256_maskz_slli_epi32): Ditto. | |
35298 | (_mm256_mask_slli_epi64): Ditto. | |
35299 | (_mm256_maskz_slli_epi64): Ditto. | |
35300 | ||
35301 | 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35302 | ||
35303 | * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz | |
35304 | instructions. | |
35305 | ||
35306 | 2023-05-25 Aldy Hernandez <aldyh@redhat.com> | |
35307 | ||
35308 | * data-streamer-in.cc (streamer_read_value_range): Handle NANs. | |
35309 | * data-streamer-out.cc (streamer_write_vrange): Same. | |
35310 | * value-range.h (class vrange): Make streamer_write_vrange a friend. | |
35311 | ||
35312 | 2023-05-25 Aldy Hernandez <aldyh@redhat.com> | |
35313 | ||
35314 | * value-query.cc (range_query::get_tree_range): Set NAN directly | |
35315 | if necessary. | |
35316 | * value-range.cc (frange::set): Assert that bounds are not NAN. | |
35317 | ||
35318 | 2023-05-25 Aldy Hernandez <aldyh@redhat.com> | |
35319 | ||
35320 | * value-range.cc (add_vrange): Handle known NANs. | |
35321 | ||
35322 | 2023-05-25 Aldy Hernandez <aldyh@redhat.com> | |
35323 | ||
35324 | * value-range.h (frange::set_nan): New. | |
35325 | ||
35326 | 2023-05-25 Alexandre Oliva <oliva@adacore.com> | |
35327 | ||
35328 | PR target/100106 | |
35329 | * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that | |
35330 | requires stricter alignment than MEM's. | |
35331 | ||
35332 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35333 | ||
35334 | PR tree-optimization/107822 | |
35335 | PR tree-optimization/107986 | |
35336 | * Makefile.in (OBJS): Add gimple-range-phi.o. | |
35337 | * gimple-range-cache.h (ranger_cache::m_estimate): New | |
35338 | phi_analyzer pointer member. | |
35339 | * gimple-range-fold.cc (fold_using_range::range_of_phi): Use | |
35340 | phi_analyzer if no loop info is available. | |
35341 | * gimple-range-phi.cc: New file. | |
35342 | * gimple-range-phi.h: New file. | |
35343 | * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer. | |
35344 | ||
35345 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35346 | ||
35347 | * gimple-range-fold.cc (fur_list::fur_list): Add range_query param | |
35348 | to contructors. | |
35349 | (fold_range): Add range_query parameter. | |
35350 | (fur_relation::fur_relation): New. | |
35351 | (fur_relation::trio): New. | |
35352 | (fur_relation::register_relation): New. | |
35353 | (fold_relations): New. | |
35354 | * gimple-range-fold.h (fold_range): Adjust prototypes. | |
35355 | (fold_relations): New. | |
35356 | ||
35357 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35358 | ||
35359 | * gimple-range-cache.cc (ssa_cache::range_of_expr): New. | |
35360 | * gimple-range-cache.h (class ssa_cache): Inherit from range_query. | |
35361 | (ranger_cache::const_query): New. | |
35362 | * gimple-range.cc (gimple_ranger::const_query): New. | |
35363 | * gimple-range.h (gimple_ranger::const_query): New prototype. | |
35364 | ||
35365 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35366 | ||
35367 | * gimple-range-cache.cc (ssa_cache::dump): Use get_range. | |
35368 | (ssa_cache::dump_range_query): Delete. | |
35369 | (ssa_lazy_cache::dump_range_query): Delete. | |
35370 | (ssa_lazy_cache::get_range): Move from header file. | |
35371 | (ssa_lazy_cache::clear_range): ditto. | |
35372 | (ssa_lazy_cache::clear): Ditto. | |
35373 | * gimple-range-cache.h (class ssa_cache): Virtualize. | |
35374 | (class ssa_lazy_cache): Inherit and virtualize. | |
35375 | ||
35376 | 2023-05-24 Aldy Hernandez <aldyh@redhat.com> | |
35377 | ||
35378 | * value-range.h (vrange::kind): Remove. | |
35379 | ||
35380 | 2023-05-24 Roger Sayle <roger@nextmovesoftware.com> | |
35381 | ||
35382 | PR middle-end/109840 | |
35383 | * match.pd <popcount optimizations>: Preserve zero-extension when | |
35384 | optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as | |
35385 | popcount((T)x), so the popcount's argument keeps the same type. | |
35386 | <parity optimizations>: Likewise preserve extensions when | |
35387 | simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as | |
35388 | parity((T)x), so that the parity's argument type is the same. | |
35389 | ||
35390 | 2023-05-24 Aldy Hernandez <aldyh@redhat.com> | |
35391 | ||
35392 | * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API. | |
35393 | (ipcp_store_vr_results): Same. | |
35394 | * ipa-prop.cc (ipa_vr::ipa_vr): New. | |
35395 | (ipa_vr::get_vrange): New. | |
35396 | (ipa_vr::set_unknown): New. | |
35397 | (ipa_vr::streamer_read): New. | |
35398 | (ipa_vr::streamer_write): New. | |
35399 | (write_ipcp_transformation_info): Use new ipa_vr API. | |
35400 | (read_ipcp_transformation_info): Same. | |
35401 | (ipa_vr::nonzero_p): Delete. | |
35402 | (ipcp_update_vr): Use new ipa_vr API. | |
35403 | * ipa-prop.h (class ipa_vr): Provide an API and hide internals. | |
35404 | * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API. | |
35405 | ||
35406 | 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de> | |
35407 | ||
35408 | * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to | |
35409 | silence overflow warnings later on. | |
35410 | ||
35411 | 2023-05-24 Uros Bizjak <ubizjak@gmail.com> | |
35412 | ||
35413 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): | |
35414 | Remove handling of V8QImode. | |
35415 | * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md. | |
35416 | Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE. | |
35417 | (v<insn>v4qi3): Ditto. | |
35418 | * config/i386/sse.md (v<insn>v8qi3): Remove. | |
35419 | ||
35420 | 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
35421 | ||
35422 | PR target/99195 | |
35423 | * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to... | |
35424 | (aarch64_simd_lshr<mode><vczle><vczbe>): ... This. | |
35425 | (aarch64_simd_ashr<mode>): Rename to... | |
35426 | (aarch64_simd_ashr<mode><vczle><vczbe>): ... This. | |
35427 | (aarch64_simd_imm_shl<mode>): Rename to... | |
35428 | (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This. | |
35429 | (aarch64_simd_reg_sshl<mode>): Rename to... | |
35430 | (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This. | |
35431 | (aarch64_simd_reg_shl<mode>_unsigned): Rename to... | |
35432 | (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This. | |
35433 | (aarch64_simd_reg_shl<mode>_signed): Rename to... | |
35434 | (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This. | |
35435 | (vec_shr_<mode>): Rename to... | |
35436 | (vec_shr_<mode><vczle><vczbe>): ... This. | |
35437 | (aarch64_<sur>shl<mode>): Rename to... | |
35438 | (aarch64_<sur>shl<mode><vczle><vczbe>): ... This. | |
35439 | (aarch64_<sur>q<r>shl<mode>): Rename to... | |
35440 | (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This. | |
35441 | ||
35442 | 2023-05-24 Richard Biener <rguenther@suse.de> | |
35443 | ||
35444 | PR target/109944 | |
35445 | * config/i386/i386-expand.cc (ix86_expand_vector_init_general): | |
35446 | Perform final vector composition using | |
35447 | ix86_expand_vector_init_general instead of setting | |
35448 | the highpart and lowpart which causes spilling. | |
35449 | ||
35450 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35451 | ||
35452 | PR tree-optimization/109695 | |
35453 | * gimple-range-cache.cc (ranger_cache::get_global_range): Add | |
35454 | changed param. | |
35455 | * gimple-range-cache.h (ranger_cache::get_global_range): Ditto. | |
35456 | * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed | |
35457 | flag to set_global_range. | |
35458 | (gimple_ranger::prefill_stmt_dependencies): Ditto. | |
35459 | ||
35460 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35461 | ||
35462 | PR tree-optimization/109695 | |
35463 | * gimple-range-cache.cc (temporal_cache::temporal_value): Return | |
35464 | a positive int. | |
35465 | (temporal_cache::current_p): Check always_current method. | |
35466 | (temporal_cache::set_always_current): Add param and set value | |
35467 | appropriately. | |
35468 | (temporal_cache::always_current_p): New. | |
35469 | (ranger_cache::get_global_range): Adjust. | |
35470 | (ranger_cache::set_global_range): set always current first. | |
35471 | ||
35472 | 2023-05-24 Andrew MacLeod <amacleod@redhat.com> | |
35473 | ||
35474 | PR tree-optimization/109695 | |
35475 | * gimple-range-cache.cc (ranger_cache::get_global_range): Call | |
35476 | fold_range with global query to choose an initial value. | |
35477 | ||
35478 | 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35479 | ||
35480 | * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_ | |
35481 | prefix. | |
35482 | ||
35483 | 2023-05-24 Richard Biener <rguenther@suse.de> | |
35484 | ||
35485 | PR tree-optimization/109849 | |
35486 | * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect | |
35487 | expressions but take the first sets. | |
35488 | ||
35489 | 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com> | |
35490 | ||
35491 | PR modula2/109952 | |
35492 | * doc/gm2.texi (High procedure function): New node. | |
35493 | (Using): New menu entry for High procedure function. | |
35494 | ||
35495 | 2023-05-24 Richard Sandiford <richard.sandiford@arm.com> | |
35496 | ||
35497 | PR rtl-optimization/109940 | |
35498 | * early-remat.cc (postorder_index): Rename to... | |
35499 | (rpo_index): ...this. | |
35500 | (compare_candidates): Sort by decreasing rpo_index rather than | |
35501 | increasing postorder_index. | |
35502 | (early_remat::sort_candidates): Calculate the forward RPO from | |
35503 | DF_FORWARD. | |
35504 | (early_remat::local_phase): Follow forward RPO using DF_FORWARD, | |
35505 | rather than DF_BACKWARD in reverse. | |
35506 | ||
35507 | 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
35508 | ||
35509 | PR target/109939 | |
35510 | * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use | |
35511 | qualifier_none for the return operand. | |
35512 | ||
35513 | 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35514 | ||
35515 | * config/riscv/autovec.md (<optab><mode>3): New pattern. | |
35516 | (one_cmpl<mode>2): Ditto. | |
35517 | (*<optab>not<mode>): Ditto. | |
35518 | (*n<optab><mode>): Ditto. | |
35519 | * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to | |
35520 | one_cmpl. | |
35521 | ||
35522 | 2023-05-24 Kewen Lin <linkw@linux.ibm.com> | |
35523 | ||
35524 | * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the | |
35525 | calculation on n_perms by considering nvectors_per_build. | |
35526 | ||
35527 | 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35528 | Richard Sandiford <richard.sandiford@arm.com> | |
35529 | ||
35530 | * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern. | |
35531 | (vec_cmp<mode><vm>): New pattern. | |
35532 | (vec_cmpu<mode><vm>): New pattern. | |
35533 | (vcond<V:mode><VI:mode>): New pattern. | |
35534 | (vcondu<V:mode><VI:mode>): New pattern. | |
35535 | * config/riscv/riscv-protos.h (enum insn_type): Add new enum. | |
35536 | (emit_vlmax_merge_insn): New function. | |
35537 | (emit_vlmax_cmp_insn): Ditto. | |
35538 | (emit_vlmax_cmp_mu_insn): Ditto. | |
35539 | (expand_vec_cmp): Ditto. | |
35540 | (expand_vec_cmp_float): Ditto. | |
35541 | (expand_vcond): Ditto. | |
35542 | * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto. | |
35543 | (emit_vlmax_cmp_insn): Ditto. | |
35544 | (emit_vlmax_cmp_mu_insn): Ditto. | |
35545 | (get_cmp_insn_code): Ditto. | |
35546 | (expand_vec_cmp): Ditto. | |
35547 | (expand_vec_cmp_float): Ditto. | |
35548 | (expand_vcond): Ditto. | |
35549 | ||
35550 | 2023-05-24 Pan Li <pan2.li@intel.com> | |
35551 | ||
35552 | * config/riscv/genrvv-type-indexer.cc (main): Add | |
35553 | unsigned_eew*_lmul1_interpret for indexer. | |
35554 | * config/riscv/riscv-vector-builtins-functions.def (vreinterpret): | |
35555 | Register vuint*m1_t interpret function. | |
35556 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS): | |
35557 | New macro for vuint8m1_t. | |
35558 | (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise. | |
35559 | (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise. | |
35560 | (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise. | |
35561 | (vbool1_t): Add to unsigned_eew*_interpret_ops. | |
35562 | (vbool2_t): Likewise. | |
35563 | (vbool4_t): Likewise. | |
35564 | (vbool8_t): Likewise. | |
35565 | (vbool16_t): Likewise. | |
35566 | (vbool32_t): Likewise. | |
35567 | (vbool64_t): Likewise. | |
35568 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS): | |
35569 | New macro for vuint*m1_t. | |
35570 | (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise. | |
35571 | (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise. | |
35572 | (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise. | |
35573 | (required_extensions_p): Add vuint*m1_t interpret case. | |
35574 | * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret): | |
35575 | Add vuint*m1_t interpret to base type. | |
35576 | (unsigned_eew16_lmul1_interpret): Likewise. | |
35577 | (unsigned_eew32_lmul1_interpret): Likewise. | |
35578 | (unsigned_eew64_lmul1_interpret): Likewise. | |
35579 | ||
35580 | 2023-05-24 Pan Li <pan2.li@intel.com> | |
35581 | ||
35582 | * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro | |
35583 | for the eew size list. | |
35584 | (LMUL1_LOG2): New macro for the log2 value of lmul=1. | |
35585 | (main): Add signed_eew*_lmul1_interpret for indexer. | |
35586 | * config/riscv/riscv-vector-builtins-functions.def (vreinterpret): | |
35587 | Register vint*m1_t interpret function. | |
35588 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS): | |
35589 | New macro for vint8m1_t. | |
35590 | (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise. | |
35591 | (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise. | |
35592 | (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise. | |
35593 | (vbool1_t): Add to signed_eew*_interpret_ops. | |
35594 | (vbool2_t): Likewise. | |
35595 | (vbool4_t): Likewise. | |
35596 | (vbool8_t): Likewise. | |
35597 | (vbool16_t): Likewise. | |
35598 | (vbool32_t): Likewise. | |
35599 | (vbool64_t): Likewise. | |
35600 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS): | |
35601 | New macro for vint*m1_t. | |
35602 | (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise. | |
35603 | (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise. | |
35604 | (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise. | |
35605 | (required_extensions_p): Add vint8m1_t interpret case. | |
35606 | * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret): | |
35607 | Add vint*m1_t interpret to base type. | |
35608 | (signed_eew16_lmul1_interpret): Likewise. | |
35609 | (signed_eew32_lmul1_interpret): Likewise. | |
35610 | (signed_eew64_lmul1_interpret): Likewise. | |
35611 | ||
35612 | 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35613 | ||
35614 | * config/riscv/autovec.md: Adjust for new interface. | |
35615 | * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand. | |
35616 | (emit_nonvlmax_insn): Add AVL operand. | |
35617 | * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand. | |
35618 | (emit_nonvlmax_insn): Add AVL operand. | |
35619 | (sew64_scalar_helper): Adjust for new interface. | |
35620 | (expand_tuple_move): Ditto. | |
35621 | * config/riscv/vector.md: Ditto. | |
35622 | ||
35623 | 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35624 | ||
35625 | * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number. | |
35626 | (expand_const_vector): Ditto. | |
35627 | (legitimize_move): Ditto. | |
35628 | (sew64_scalar_helper): Ditto. | |
35629 | (expand_tuple_move): Ditto. | |
35630 | (expand_vector_init_insert_elems): Ditto. | |
35631 | * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto. | |
35632 | ||
35633 | 2023-05-24 liuhongt <hongtao.liu@intel.com> | |
35634 | ||
35635 | PR target/109900 | |
35636 | * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold | |
35637 | _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and | |
35638 | _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR. | |
35639 | (ix86_masked_all_ones): Handle 64-bit mask. | |
35640 | * config/i386/i386-builtin.def: Replace icode of related | |
35641 | non-mask simd abs builtins with CODE_FOR_nothing. | |
35642 | ||
35643 | 2023-05-23 Martin Uecker <uecker@tugraz.at> | |
35644 | ||
35645 | PR c/109450 | |
35646 | * function.cc (gimplify_parm_type): Remove function. | |
35647 | (gimplify_parameters): Call gimplify_type_sizes. | |
35648 | ||
35649 | 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
35650 | ||
35651 | * config/xtensa/xtensa.md (*addsubx): Rename from '*addx', | |
35652 | and change to also accept '*subx' pattern. | |
35653 | (*subx): Remove. | |
35654 | ||
35655 | 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
35656 | ||
35657 | * config/xtensa/predicates.md (addsub_operator): New. | |
35658 | * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3, | |
35659 | *extzvsi-1bit_addsubx): New insn_and_split patterns. | |
35660 | * config/xtensa/xtensa.cc (xtensa_rtx_costs): | |
35661 | Add a special case about ifcvt 'noce_try_cmove()' to handle | |
35662 | constant loads that do not fit into signed 12 bits in the | |
35663 | patterns added above. | |
35664 | ||
35665 | 2023-05-23 Richard Biener <rguenther@suse.de> | |
35666 | ||
35667 | PR tree-optimization/109747 | |
35668 | * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down | |
35669 | the SLP node only once to the cost hook. | |
35670 | ||
35671 | 2023-05-23 Georg-Johann Lay <avr@gjlay.de> | |
35672 | ||
35673 | * config/avr/avr.cc (avr_insn_cost): New static function. | |
35674 | (TARGET_INSN_COST): Define to that function. | |
35675 | ||
35676 | 2023-05-23 Richard Biener <rguenther@suse.de> | |
35677 | ||
35678 | PR target/109944 | |
35679 | * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): | |
35680 | For vector construction or splats apply GPR->XMM move | |
35681 | costing. QImode memory can be handled directly only | |
35682 | with SSE4.1 pinsrb. | |
35683 | ||
35684 | 2023-05-23 Richard Biener <rguenther@suse.de> | |
35685 | ||
35686 | PR tree-optimization/108752 | |
35687 | * tree-vect-stmts.cc (vectorizable_operation): For bit | |
35688 | operations with generic word_mode vectors do not cost | |
35689 | an extra stmt. For plus, minus and negate also cost the | |
35690 | constant materialization. | |
35691 | ||
35692 | 2023-05-23 Uros Bizjak <ubizjak@gmail.com> | |
35693 | ||
35694 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): | |
35695 | Call ix86_expand_vec_shift_qihi_constant for shifts | |
35696 | with constant count operand. | |
35697 | * config/i386/i386.cc (ix86_shift_rotate_cost): | |
35698 | Handle V4QImode and V8QImode. | |
35699 | * config/i386/mmx.md (<insn>v8qi3): New insn pattern. | |
35700 | (<insn>v4qi3): Ditto. | |
35701 | ||
35702 | 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35703 | ||
35704 | * config/riscv/vector.md: Add mode. | |
35705 | ||
35706 | 2023-05-23 Aldy Hernandez <aldyh@redhat.com> | |
35707 | ||
35708 | PR tree-optimization/109934 | |
35709 | * value-range.cc (irange::invert): Remove buggy special case. | |
35710 | ||
35711 | 2023-05-23 Richard Biener <rguenther@suse.de> | |
35712 | ||
35713 | * tree-ssa-pre.cc (compute_antic_aux): Dump the correct | |
35714 | ANTIC_OUT. | |
35715 | ||
35716 | 2023-05-23 Richard Sandiford <richard.sandiford@arm.com> | |
35717 | ||
35718 | PR target/109632 | |
35719 | * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow | |
35720 | subregs between any scalars that are 64 bits or smaller. | |
35721 | * config/aarch64/iterators.md (SUBDI_BITS): New int iterator. | |
35722 | (bits_etype): New int attribute. | |
35723 | * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>) | |
35724 | (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns. | |
35725 | (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise. | |
35726 | ||
35727 | 2023-05-23 Richard Sandiford <richard.sandiford@arm.com> | |
35728 | ||
35729 | * doc/md.texi: Document that <FOO> can be used to refer to the | |
35730 | numerical value of an int iterator FOO. Tweak other parts of | |
35731 | the int iterator documentation. | |
35732 | * read-rtl.cc (iterator_group::has_self_attr): New field. | |
35733 | (map_attr_string): When has_self_attr is true, make <FOO> | |
35734 | expand to the current value of iterator FOO. | |
35735 | (initialize_iterators): Set has_self_attr for int iterators. | |
35736 | ||
35737 | 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35738 | ||
35739 | * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization. | |
35740 | * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto. | |
35741 | (RVV_UNOP_NUM): New macro. | |
35742 | (RVV_BINOP_NUM): Ditto. | |
35743 | (legitimize_move): Refactor the framework of RVV auto-vectorization. | |
35744 | (emit_vlmax_op): Ditto. | |
35745 | (emit_vlmax_reg_op): Ditto. | |
35746 | (emit_len_op): Ditto. | |
35747 | (emit_len_binop): Ditto. | |
35748 | (emit_vlmax_tany_many): Ditto. | |
35749 | (emit_nonvlmax_tany_many): Ditto. | |
35750 | (sew64_scalar_helper): Ditto. | |
35751 | (expand_tuple_move): Ditto. | |
35752 | * config/riscv/riscv-v.cc (emit_pred_op): Ditto. | |
35753 | (emit_pred_binop): Ditto. | |
35754 | (emit_vlmax_op): Ditto. | |
35755 | (emit_vlmax_tany_many): New function. | |
35756 | (emit_len_op): Remove. | |
35757 | (emit_nonvlmax_tany_many): New function. | |
35758 | (emit_vlmax_reg_op): Remove. | |
35759 | (emit_len_binop): Ditto. | |
35760 | (emit_index_op): Ditto. | |
35761 | (expand_vec_series): Refactor the framework of RVV auto-vectorization. | |
35762 | (expand_const_vector): Ditto. | |
35763 | (legitimize_move): Ditto. | |
35764 | (sew64_scalar_helper): Ditto. | |
35765 | (expand_tuple_move): Ditto. | |
35766 | (expand_vector_init_insert_elems): Ditto. | |
35767 | * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto. | |
35768 | * config/riscv/vector.md: Ditto. | |
35769 | ||
35770 | 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
35771 | ||
35772 | PR target/109855 | |
35773 | * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate | |
35774 | and constraint for operand 0. | |
35775 | (add_vec_concat_subst_be): Likewise. | |
35776 | ||
35777 | 2023-05-23 Richard Biener <rguenther@suse.de> | |
35778 | ||
35779 | PR tree-optimization/109849 | |
35780 | * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT | |
35781 | and use that to determine what to hoist. | |
35782 | ||
35783 | 2023-05-23 Eric Botcazou <ebotcazou@adacore.com> | |
35784 | ||
35785 | * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the | |
35786 | specific treatment for bit-fields only if they have an integral type | |
35787 | and filter out non-integral bit-fields that do not start and end on | |
35788 | a byte boundary. | |
35789 | ||
35790 | 2023-05-23 Aldy Hernandez <aldyh@redhat.com> | |
35791 | ||
35792 | PR tree-optimization/109920 | |
35793 | * value-range.h (RESIZABLE>::~int_range): Use delete[]. | |
35794 | ||
35795 | 2023-05-22 Uros Bizjak <ubizjak@gmail.com> | |
35796 | ||
35797 | * config/i386/i386.cc (ix86_shift_rotate_cost): Correct | |
35798 | calcuation of integer vector mode costs to reflect generated | |
35799 | instruction sequences of different integer vector modes and | |
35800 | different target ABIs. Remove "speed" function argument. | |
35801 | (ix86_rtx_costs): Update call for removed function argument. | |
35802 | (ix86_vector_costs::add_stmt_cost): Ditto. | |
35803 | ||
35804 | 2023-05-22 Aldy Hernandez <aldyh@redhat.com> | |
35805 | ||
35806 | * value-range.h (class Value_Range): Implement set_zero, | |
35807 | set_nonzero, and nonzero_p. | |
35808 | ||
35809 | 2023-05-22 Uros Bizjak <ubizjak@gmail.com> | |
35810 | ||
35811 | * config/i386/i386.cc (ix86_multiplication_cost): Add | |
35812 | the cost of a memory read to the cost of V?QImode sequences. | |
35813 | ||
35814 | 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35815 | ||
35816 | * config/riscv/riscv-v.cc: Add "m_" prefix. | |
35817 | ||
35818 | 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
35819 | ||
35820 | * tree-vect-loop.cc (vect_get_loop_len): Fix issue for | |
35821 | multiple-rgroup of length. | |
35822 | * tree-vect-stmts.cc (vectorizable_store): Ditto. | |
35823 | (vectorizable_load): Ditto. | |
35824 | * tree-vectorizer.h (vect_get_loop_len): Ditto. | |
35825 | ||
35826 | 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
35827 | ||
35828 | * config/riscv/riscv.cc (riscv_const_insns): Reorganize the | |
35829 | codes. | |
35830 | ||
35831 | 2023-05-22 Kewen Lin <linkw@linux.ibm.com> | |
35832 | ||
35833 | * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the | |
35834 | handling for the case index == count. | |
35835 | ||
35836 | 2023-05-21 Georg-Johann Lay <avr@gjlay.de> | |
35837 | ||
35838 | PR target/90622 | |
35839 | * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]: | |
35840 | Don't fold to XOR / AND / XOR if just one bit is copied to the | |
35841 | same position. | |
35842 | ||
35843 | 2023-05-21 Roger Sayle <roger@nextmovesoftware.com> | |
35844 | ||
35845 | * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target | |
35846 | builtin for bit reversal using brev instruction. | |
35847 | (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and | |
35848 | NVPTX_BUILTIN_BREVLL. | |
35849 | (nvptx_init_builtins): Define "brev" and "brevll". | |
35850 | (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and | |
35851 | NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function. | |
35852 | * doc/extend.texi (Nvidia PTX Builtin-in Functions): New | |
35853 | section, document __builtin_nvptx_brev{,ll}. | |
35854 | ||
35855 | 2023-05-21 Jakub Jelinek <jakub@redhat.com> | |
35856 | ||
35857 | PR tree-optimization/109505 | |
35858 | * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2), | |
35859 | Combine successive equal operations with constants, | |
35860 | (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A, | |
35861 | CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P | |
35862 | operands. | |
35863 | ||
35864 | 2023-05-21 Andrew Pinski <apinski@marvell.com> | |
35865 | ||
35866 | * expr.cc (expand_single_bit_test): Correct bitpos for big-endian. | |
35867 | ||
35868 | 2023-05-21 Pan Li <pan2.li@intel.com> | |
35869 | ||
35870 | * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the | |
35871 | rest bool size, aka 2, 4, 8, 16, 32, 64. | |
35872 | * config/riscv/riscv-vector-builtins-functions.def (vreinterpret): | |
35873 | Register vbool[2|4|8|16|32|64] interpret function. | |
35874 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS): | |
35875 | New macro for vbool2_t. | |
35876 | (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise. | |
35877 | (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise. | |
35878 | (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise. | |
35879 | (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise. | |
35880 | (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise. | |
35881 | (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops. | |
35882 | (vint16m1_t): Likewise. | |
35883 | (vint32m1_t): Likewise. | |
35884 | (vint64m1_t): Likewise. | |
35885 | (vuint8m1_t): Likewise. | |
35886 | (vuint16m1_t): Likewise. | |
35887 | (vuint32m1_t): Likewise. | |
35888 | (vuint64m1_t): Likewise. | |
35889 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS): | |
35890 | New macro for vbool2_t. | |
35891 | (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise. | |
35892 | (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise. | |
35893 | (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise. | |
35894 | (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise. | |
35895 | (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise. | |
35896 | (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case. | |
35897 | * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add | |
35898 | vbool2_t interprect to base type. | |
35899 | (bool4_interpret): Likewise. | |
35900 | (bool8_interpret): Likewise. | |
35901 | (bool16_interpret): Likewise. | |
35902 | (bool32_interpret): Likewise. | |
35903 | (bool64_interpret): Likewise. | |
35904 | ||
35905 | 2023-05-21 Andrew Pinski <apinski@marvell.com> | |
35906 | ||
35907 | PR middle-end/109919 | |
35908 | * expr.cc (expand_single_bit_test): Don't use the | |
35909 | target for expand_expr. | |
35910 | ||
35911 | 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com> | |
35912 | ||
35913 | * doc/install.texi (Specific): Remove de facto empty alpha*-*-* | |
35914 | section. | |
35915 | ||
35916 | 2023-05-20 Pan Li <pan2.li@intel.com> | |
35917 | ||
35918 | * mode-switching.cc (entity_map): Initialize the array to zero. | |
35919 | (bb_info): Ditto. | |
35920 | ||
35921 | 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com> | |
35922 | ||
35923 | PR target/105753 | |
35924 | * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi): | |
35925 | Remove superfluous "parallel" in insn pattern. | |
35926 | ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of | |
35927 | printing error text to assembly. | |
35928 | ||
35929 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35930 | ||
35931 | * expr.cc (fold_single_bit_test): Rename to ... | |
35932 | (expand_single_bit_test): This and expand directly. | |
35933 | (do_store_flag): Update for the rename function. | |
35934 | ||
35935 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35936 | ||
35937 | * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF | |
35938 | instead of shift/and. | |
35939 | ||
35940 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35941 | ||
35942 | * expr.cc (fold_single_bit_test): Add an assert | |
35943 | and simplify based on code being NE_EXPR or EQ_EXPR. | |
35944 | ||
35945 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35946 | ||
35947 | * expr.cc (fold_single_bit_test): Take inner and bitnum | |
35948 | instead of arg0 and arg1. Update the code. | |
35949 | (do_store_flag): Don't create a tree when calling | |
35950 | fold_single_bit_test instead just call it with the bitnum | |
35951 | and the inner tree. | |
35952 | ||
35953 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35954 | ||
35955 | * expr.cc (fold_single_bit_test): Use get_def_for_expr | |
35956 | instead of checking the inner's code. | |
35957 | ||
35958 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35959 | ||
35960 | * expr.cc (fold_single_bit_test_into_sign_test): Inline into ... | |
35961 | (fold_single_bit_test): This and simplify. | |
35962 | ||
35963 | 2023-05-20 Andrew Pinski <apinski@marvell.com> | |
35964 | ||
35965 | * fold-const.cc (fold_single_bit_test_into_sign_test): Move to | |
35966 | expr.cc. | |
35967 | (fold_single_bit_test): Likewise. | |
35968 | * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc | |
35969 | (fold_single_bit_test): Likewise and make static. | |
35970 | * fold-const.h (fold_single_bit_test): Remove declaration. | |
35971 | ||
35972 | 2023-05-20 Die Li <lidie@eswincomputing.com> | |
35973 | ||
35974 | * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode | |
35975 | checking. | |
35976 | ||
35977 | 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com> | |
35978 | ||
35979 | * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern. | |
35980 | ||
35981 | 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com> | |
35982 | ||
35983 | PR target/106888 | |
35984 | * config/riscv/bitmanip.md | |
35985 | (<bitmanip_optab>disi2): Match with any_extend. | |
35986 | (<bitmanip_optab>disi2_sext): New pattern to match | |
35987 | with sign extend using an ANDI instruction. | |
35988 | ||
35989 | 2023-05-19 Nathan Sidwell <nathan@acm.org> | |
35990 | ||
35991 | PR other/99451 | |
35992 | * opts.h (handle_deferred_dump_options): Declare. | |
35993 | * opts-global.cc (handle_common_deferred_options): Do not handle | |
35994 | dump options here. | |
35995 | (handle_deferred_dump_options): New. | |
35996 | * toplev.cc (toplev::main): Call it after plugin init. | |
35997 | ||
35998 | 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com> | |
35999 | ||
36000 | * config/riscv/constraints.md (DsS, DsD): Restore agreement | |
36001 | with shiftm1 mode attribute. | |
36002 | ||
36003 | 2023-05-19 Andrew Pinski <apinski@marvell.com> | |
36004 | ||
36005 | PR driver/33980 | |
36006 | * gcc.cc (default_compilers["@c-header"]): Add %w | |
36007 | after the --output-pch. | |
36008 | ||
36009 | 2023-05-19 Vineet Gupta <vineetg@rivosinc.com> | |
36010 | ||
36011 | * config/riscv/riscv.cc (riscv_split_integer): if loval is equal | |
36012 | to hival, ASHIFT the corresponding regs. | |
36013 | ||
36014 | 2023-05-19 Robin Dapp <rdapp@ventanamicro.com> | |
36015 | ||
36016 | * config/riscv/riscv.cc (riscv_const_insns): Remove else. | |
36017 | ||
36018 | 2023-05-19 Jakub Jelinek <jakub@redhat.com> | |
36019 | ||
36020 | PR tree-optimization/105776 | |
36021 | * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is | |
36022 | non-NULL, allow division statement to have a cast as single imm use | |
36023 | rather than comparison/condition. | |
36024 | (match_arith_overflow): In that case remove the cast stmt in addition | |
36025 | to the division statement. | |
36026 | ||
36027 | 2023-05-19 Jakub Jelinek <jakub@redhat.com> | |
36028 | ||
36029 | PR tree-optimization/101856 | |
36030 | * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect | |
36031 | unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't | |
36032 | support it but umul_highpart_optab does. | |
36033 | ||
36034 | 2023-05-19 Eric Botcazou <ebotcazou@adacore.com> | |
36035 | ||
36036 | * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead | |
36037 | of tree_to_shwi on array indices. Minor tweaks. | |
36038 | ||
36039 | 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> | |
36040 | ||
36041 | * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h. | |
36042 | * attribs.cc (diag_attr_exclusions): Ditto. | |
36043 | (decl_attributes): Ditto. | |
36044 | (build_type_attribute_qual_variant): Ditto. | |
36045 | * builtins.cc (fold_builtin_carg): Ditto. | |
36046 | (fold_builtin_next_arg): Ditto. | |
36047 | (do_mpc_arg2): Ditto. | |
36048 | * cfgexpand.cc (expand_return): Ditto. | |
36049 | * cgraph.h (decl_in_symtab_p): Ditto. | |
36050 | (symtab_node::get_create): Ditto. | |
36051 | * dwarf2out.cc (base_type_die): Ditto. | |
36052 | (implicit_ptr_descriptor): Ditto. | |
36053 | (gen_array_type_die): Ditto. | |
36054 | (gen_type_die_with_usage): Ditto. | |
36055 | (optimize_location_into_implicit_ptr): Ditto. | |
36056 | * expr.cc (do_store_flag): Ditto. | |
36057 | * fold-const.cc (negate_expr_p): Ditto. | |
36058 | (fold_negate_expr_1): Ditto. | |
36059 | (fold_convert_const): Ditto. | |
36060 | (fold_convert_loc): Ditto. | |
36061 | (constant_boolean_node): Ditto. | |
36062 | (fold_binary_op_with_conditional_arg): Ditto. | |
36063 | (build_fold_addr_expr_with_type_loc): Ditto. | |
36064 | (fold_comparison): Ditto. | |
36065 | (fold_checksum_tree): Ditto. | |
36066 | (tree_unary_nonnegative_warnv_p): Ditto. | |
36067 | (integer_valued_real_unary_p): Ditto. | |
36068 | (fold_read_from_constant_string): Ditto. | |
36069 | * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto. | |
36070 | * gimple-expr.cc (useless_type_conversion_p): Ditto. | |
36071 | (is_gimple_reg): Ditto. | |
36072 | (is_gimple_asm_val): Ditto. | |
36073 | (mark_addressable): Ditto. | |
36074 | * gimple-expr.h (is_gimple_variable): Ditto. | |
36075 | (virtual_operand_p): Ditto. | |
36076 | * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto. | |
36077 | * gimplify.cc (gimplify_bind_expr): Ditto. | |
36078 | (gimplify_return_expr): Ditto. | |
36079 | (gimple_add_padding_init_for_auto_var): Ditto. | |
36080 | (gimplify_addr_expr): Ditto. | |
36081 | (omp_add_variable): Ditto. | |
36082 | (omp_notice_variable): Ditto. | |
36083 | (omp_get_base_pointer): Ditto. | |
36084 | (omp_strip_components_and_deref): Ditto. | |
36085 | (omp_strip_indirections): Ditto. | |
36086 | (omp_accumulate_sibling_list): Ditto. | |
36087 | (omp_build_struct_sibling_lists): Ditto. | |
36088 | (gimplify_adjust_omp_clauses_1): Ditto. | |
36089 | (gimplify_adjust_omp_clauses): Ditto. | |
36090 | (gimplify_omp_for): Ditto. | |
36091 | (goa_lhs_expr_p): Ditto. | |
36092 | (gimplify_one_sizepos): Ditto. | |
36093 | * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto. | |
36094 | * ipa-devirt.cc (odr_types_equivalent_p): Ditto. | |
36095 | * ipa-prop.cc (ipa_set_jf_constant): Ditto. | |
36096 | (propagate_controlled_uses): Ditto. | |
36097 | * ipa-sra.cc (type_prevails_p): Ditto. | |
36098 | (scan_expr_access): Ditto. | |
36099 | * optabs-tree.cc (optab_for_tree_code): Ditto. | |
36100 | * toplev.cc (wrapup_global_declaration_1): Ditto. | |
36101 | * trans-mem.cc (transaction_invariant_address_p): Ditto. | |
36102 | * tree-cfg.cc (verify_types_in_gimple_reference): Ditto. | |
36103 | (verify_gimple_comparison): Ditto. | |
36104 | (verify_gimple_assign_binary): Ditto. | |
36105 | (verify_gimple_assign_single): Ditto. | |
36106 | * tree-complex.cc (get_component_ssa_name): Ditto. | |
36107 | * tree-emutls.cc (lower_emutls_2): Ditto. | |
36108 | * tree-inline.cc (copy_tree_body_r): Ditto. | |
36109 | (estimate_move_cost): Ditto. | |
36110 | (copy_decl_for_dup_finish): Ditto. | |
36111 | * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto. | |
36112 | (note_nonlocal_vla_type): Ditto. | |
36113 | (convert_local_omp_clauses): Ditto. | |
36114 | (remap_vla_decls): Ditto. | |
36115 | (fixup_vla_decls): Ditto. | |
36116 | * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto. | |
36117 | * tree-pretty-print.cc (print_declaration): Ditto. | |
36118 | (print_call_name): Ditto. | |
36119 | * tree-sra.cc (compare_access_positions): Ditto. | |
36120 | * tree-ssa-alias.cc (compare_type_sizes): Ditto. | |
36121 | * tree-ssa-ccp.cc (get_default_value): Ditto. | |
36122 | * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto. | |
36123 | * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto. | |
36124 | * tree-ssa-forwprop.cc (can_propagate_from): Ditto. | |
36125 | * tree-ssa-propagate.cc (may_propagate_copy): Ditto. | |
36126 | * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto. | |
36127 | * tree-ssa-sink.cc (statement_sink_location): Ditto. | |
36128 | * tree-ssa-structalias.cc (type_must_have_pointers): Ditto. | |
36129 | * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto. | |
36130 | * tree-ssa-uninit.cc (warn_uninit): Ditto. | |
36131 | * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto. | |
36132 | (non_rewritable_mem_ref_base): Ditto. | |
36133 | * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto. | |
36134 | * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto. | |
36135 | * tree-vect-generic.cc (do_binop): Ditto. | |
36136 | (do_cond): Ditto. | |
36137 | * tree-vect-stmts.cc (vect_init_vector): Ditto. | |
36138 | * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto. | |
36139 | * tree.cc (sign_mask_for): Ditto. | |
36140 | (verify_type_variant): Ditto. | |
36141 | (gimple_canonical_types_compatible_p): Ditto. | |
36142 | (verify_type): Ditto. | |
36143 | * ubsan.cc (get_ubsan_type_info_for_type): Ditto. | |
36144 | * var-tracking.cc (prepare_call_arguments): Ditto. | |
36145 | (vt_add_function_parameters): Ditto. | |
36146 | * varasm.cc (decode_addr_const): Ditto. | |
36147 | ||
36148 | 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> | |
36149 | ||
36150 | * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h. | |
36151 | (lower_reduction_clauses): Ditto. | |
36152 | (lower_send_clauses): Ditto. | |
36153 | (lower_omp_task_reductions): Ditto. | |
36154 | * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto. | |
36155 | (worker_single_copy): Ditto. | |
36156 | * omp-offload.cc (oacc_rewrite_var_decl): Ditto. | |
36157 | * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto. | |
36158 | ||
36159 | 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> | |
36160 | ||
36161 | * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from | |
36162 | tree.h. | |
36163 | (lto_read_body_or_constructor): Ditto. | |
36164 | * lto-streamer-out.cc (tree_is_indexable): Ditto. | |
36165 | (lto_output_var_decl_ref): Ditto. | |
36166 | (DFS::DFS_write_tree_body): Ditto. | |
36167 | (wrap_refs): Ditto. | |
36168 | (write_symbol_extension_info): Ditto. | |
36169 | ||
36170 | 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> | |
36171 | ||
36172 | * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P | |
36173 | defines from tree.h. | |
36174 | (aarch64_mangle_type): Ditto. | |
36175 | * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto. | |
36176 | (alpha_gimplify_va_arg_1): Ditto. | |
36177 | * config/arc/arc.cc (arc_encode_section_info): Ditto. | |
36178 | (arc_is_aux_reg_p): Ditto. | |
36179 | (arc_is_uncached_mem_p): Ditto. | |
36180 | (arc_handle_aux_attribute): Ditto. | |
36181 | * config/arm/arm.cc (arm_handle_isr_attribute): Ditto. | |
36182 | (arm_handle_cmse_nonsecure_call): Ditto. | |
36183 | (arm_set_default_type_attributes): Ditto. | |
36184 | (arm_is_segment_info_known): Ditto. | |
36185 | (arm_mangle_type): Ditto. | |
36186 | * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto. | |
36187 | * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto. | |
36188 | (avr_decl_absdata_p): Ditto. | |
36189 | (avr_insert_attributes): Ditto. | |
36190 | (avr_section_type_flags): Ditto. | |
36191 | (avr_encode_section_info): Ditto. | |
36192 | * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto. | |
36193 | * config/bpf/bpf.cc (bpf_core_compute): Ditto. | |
36194 | * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto. | |
36195 | * config/csky/csky.cc (csky_handle_isr_attribute): Ditto. | |
36196 | (csky_mangle_type): Ditto. | |
36197 | * config/darwin-c.cc (darwin_pragma_unused): Ditto. | |
36198 | * config/darwin.cc (is_objc_metadata): Ditto. | |
36199 | * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto. | |
36200 | * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto. | |
36201 | * config/frv/frv.cc (frv_emit_movsi): Ditto. | |
36202 | * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto. | |
36203 | * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto. | |
36204 | * config/h8300/h8300.cc (h8300_encode_section_info): Ditto. | |
36205 | * config/i386/i386-expand.cc: Ditto. | |
36206 | * config/i386/i386.cc (type_natural_mode): Ditto. | |
36207 | (ix86_function_arg): Ditto. | |
36208 | (ix86_data_alignment): Ditto. | |
36209 | (ix86_local_alignment): Ditto. | |
36210 | (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto. | |
36211 | * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto. | |
36212 | (i386_pe_type_dllexport_p): Ditto. | |
36213 | (i386_pe_adjust_class_at_definition): Ditto. | |
36214 | * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto. | |
36215 | (i386_pe_binds_local_p): Ditto. | |
36216 | (i386_pe_section_type_flags): Ditto. | |
36217 | * config/ia64/ia64.cc (ia64_encode_section_info): Ditto. | |
36218 | (ia64_gimplify_va_arg): Ditto. | |
36219 | (ia64_in_small_data_p): Ditto. | |
36220 | * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto. | |
36221 | * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto. | |
36222 | * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto. | |
36223 | * config/m32c/m32c.cc (m32c_insert_attributes): Ditto. | |
36224 | * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto. | |
36225 | (mcore_encode_section_info): Ditto. | |
36226 | * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto. | |
36227 | * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto. | |
36228 | * config/mmix/mmix.cc (mmix_encode_section_info): Ditto. | |
36229 | * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto. | |
36230 | (pass_in_memory): Ditto. | |
36231 | (nvptx_generate_vector_shuffle): Ditto. | |
36232 | (nvptx_lockless_update): Ditto. | |
36233 | * config/pa/pa.cc (pa_function_arg_padding): Ditto. | |
36234 | (pa_function_value): Ditto. | |
36235 | (pa_function_arg): Ditto. | |
36236 | * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto. | |
36237 | (TEXT_SPACE_P): Ditto. | |
36238 | * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto. | |
36239 | * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto. | |
36240 | * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto. | |
36241 | (riscv_mangle_type): Ditto. | |
36242 | * config/rl78/rl78.cc (rl78_insert_attributes): Ditto. | |
36243 | (rl78_addsi3_internal): Ditto. | |
36244 | * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto. | |
36245 | * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto. | |
36246 | * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto. | |
36247 | * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto. | |
36248 | * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto. | |
36249 | (rs6000_function_arg_advance_1): Ditto. | |
36250 | (rs6000_function_arg): Ditto. | |
36251 | (rs6000_pass_by_reference): Ditto. | |
36252 | * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto. | |
36253 | * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto. | |
36254 | (rs6000_set_default_type_attributes): Ditto. | |
36255 | (rs6000_elf_in_small_data_p): Ditto. | |
36256 | (IN_NAMED_SECTION): Ditto. | |
36257 | (rs6000_xcoff_encode_section_info): Ditto. | |
36258 | (rs6000_function_value): Ditto. | |
36259 | (invalid_arg_for_unprototyped_fn): Ditto. | |
36260 | * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto. | |
36261 | (s390_vec_n_elem): Ditto. | |
36262 | * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto. | |
36263 | (s390_function_arg_integer): Ditto. | |
36264 | (s390_return_in_memory): Ditto. | |
36265 | (s390_encode_section_info): Ditto. | |
36266 | * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto. | |
36267 | (sh_function_value): Ditto. | |
36268 | * config/sol2.cc (solaris_insert_attributes): Ditto. | |
36269 | * config/sparc/sparc.cc (function_arg_slotno): Ditto. | |
36270 | * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto. | |
36271 | * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto. | |
36272 | (xstormy16_handle_below100_attribute): Ditto. | |
36273 | * config/v850/v850.cc (v850_encode_section_info): Ditto. | |
36274 | (v850_insert_attributes): Ditto. | |
36275 | * config/visium/visium.cc (visium_pass_by_reference): Ditto. | |
36276 | (visium_return_in_memory): Ditto. | |
36277 | * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto. | |
36278 | ||
36279 | 2023-05-18 Uros Bizjak <ubizjak@gmail.com> | |
36280 | ||
36281 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New. | |
36282 | (ix86_expand_vecop_qihi): Add op2vec bool variable. | |
36283 | Do not set REG_EQUAL note. | |
36284 | * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial): | |
36285 | Add prototype. | |
36286 | * config/i386/i386.cc (ix86_multiplication_cost): Handle | |
36287 | V4QImode and V8QImode. | |
36288 | * config/i386/mmx.md (mulv8qi3): New expander. | |
36289 | (mulv4qi3): Ditto. | |
36290 | * config/i386/sse.md (mulv8qi3): Remove. | |
36291 | ||
36292 | 2023-05-18 Georg-Johann Lay <avr@gjlay.de> | |
36293 | ||
36294 | * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment. | |
36295 | ||
36296 | 2023-05-18 Jonathan Wakely <jwakely@redhat.com> | |
36297 | ||
36298 | PR bootstrap/105831 | |
36299 | * config.gcc: Use = operator instead of ==. | |
36300 | ||
36301 | 2023-05-18 Michael Bäuerle <micha@NetBSD.org> | |
36302 | ||
36303 | PR bootstrap/105831 | |
36304 | * config/nvptx/gen-opt.sh: Use = operator instead of ==. | |
36305 | * configure.ac: Likewise. | |
36306 | * configure: Regenerate. | |
36307 | ||
36308 | 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com> | |
36309 | ||
36310 | * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types. | |
36311 | (__ARM_mve_coerce1): Remove. | |
36312 | (__ARM_mve_coerce2): Remove. | |
36313 | (__ARM_mve_coerce3): Remove. | |
36314 | (__ARM_mve_coerce_i_scalar): New. | |
36315 | (__ARM_mve_coerce_s8_ptr): New. | |
36316 | (__ARM_mve_coerce_u8_ptr): New. | |
36317 | (__ARM_mve_coerce_s16_ptr): New. | |
36318 | (__ARM_mve_coerce_u16_ptr): New. | |
36319 | (__ARM_mve_coerce_s32_ptr): New. | |
36320 | (__ARM_mve_coerce_u32_ptr): New. | |
36321 | (__ARM_mve_coerce_s64_ptr): New. | |
36322 | (__ARM_mve_coerce_u64_ptr): New. | |
36323 | (__ARM_mve_coerce_f_scalar): New. | |
36324 | (__ARM_mve_coerce_f16_ptr): New. | |
36325 | (__ARM_mve_coerce_f32_ptr): New. | |
36326 | (__arm_vst4q): Change _coerce_ overloads. | |
36327 | (__arm_vbicq): Change _coerce_ overloads. | |
36328 | (__arm_vld1q): Change _coerce_ overloads. | |
36329 | (__arm_vld1q_z): Change _coerce_ overloads. | |
36330 | (__arm_vld2q): Change _coerce_ overloads. | |
36331 | (__arm_vld4q): Change _coerce_ overloads. | |
36332 | (__arm_vldrhq_gather_offset): Change _coerce_ overloads. | |
36333 | (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads. | |
36334 | (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads. | |
36335 | (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads. | |
36336 | (__arm_vldrwq_gather_offset): Change _coerce_ overloads. | |
36337 | (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads. | |
36338 | (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads. | |
36339 | (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads. | |
36340 | (__arm_vst1q_p): Change _coerce_ overloads. | |
36341 | (__arm_vst2q): Change _coerce_ overloads. | |
36342 | (__arm_vst1q): Change _coerce_ overloads. | |
36343 | (__arm_vstrhq): Change _coerce_ overloads. | |
36344 | (__arm_vstrhq_p): Change _coerce_ overloads. | |
36345 | (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads. | |
36346 | (__arm_vstrhq_scatter_offset): Change _coerce_ overloads. | |
36347 | (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads. | |
36348 | (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads. | |
36349 | (__arm_vstrwq_p): Change _coerce_ overloads. | |
36350 | (__arm_vstrwq): Change _coerce_ overloads. | |
36351 | (__arm_vstrwq_scatter_offset): Change _coerce_ overloads. | |
36352 | (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads. | |
36353 | (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads. | |
36354 | (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads. | |
36355 | (__arm_vsetq_lane): Change _coerce_ overloads. | |
36356 | (__arm_vldrbq_gather_offset): Change _coerce_ overloads. | |
36357 | (__arm_vdwdupq_x_u8): Change _coerce_ overloads. | |
36358 | (__arm_vdwdupq_x_u16): Change _coerce_ overloads. | |
36359 | (__arm_vdwdupq_x_u32): Change _coerce_ overloads. | |
36360 | (__arm_viwdupq_x_u8): Change _coerce_ overloads. | |
36361 | (__arm_viwdupq_x_u16): Change _coerce_ overloads. | |
36362 | (__arm_viwdupq_x_u32): Change _coerce_ overloads. | |
36363 | (__arm_vidupq_x_u8): Change _coerce_ overloads. | |
36364 | (__arm_vddupq_x_u8): Change _coerce_ overloads. | |
36365 | (__arm_vidupq_x_u16): Change _coerce_ overloads. | |
36366 | (__arm_vddupq_x_u16): Change _coerce_ overloads. | |
36367 | (__arm_vidupq_x_u32): Change _coerce_ overloads. | |
36368 | (__arm_vddupq_x_u32): Change _coerce_ overloads. | |
36369 | (__arm_vldrdq_gather_offset): Change _coerce_ overloads. | |
36370 | (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads. | |
36371 | (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads. | |
36372 | (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads. | |
36373 | (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads. | |
36374 | (__arm_vidupq_u16): Change _coerce_ overloads. | |
36375 | (__arm_vidupq_u32): Change _coerce_ overloads. | |
36376 | (__arm_vidupq_u8): Change _coerce_ overloads. | |
36377 | (__arm_vddupq_u16): Change _coerce_ overloads. | |
36378 | (__arm_vddupq_u32): Change _coerce_ overloads. | |
36379 | (__arm_vddupq_u8): Change _coerce_ overloads. | |
36380 | (__arm_viwdupq_m): Change _coerce_ overloads. | |
36381 | (__arm_viwdupq_u16): Change _coerce_ overloads. | |
36382 | (__arm_viwdupq_u32): Change _coerce_ overloads. | |
36383 | (__arm_viwdupq_u8): Change _coerce_ overloads. | |
36384 | (__arm_vdwdupq_m): Change _coerce_ overloads. | |
36385 | (__arm_vdwdupq_u16): Change _coerce_ overloads. | |
36386 | (__arm_vdwdupq_u32): Change _coerce_ overloads. | |
36387 | (__arm_vdwdupq_u8): Change _coerce_ overloads. | |
36388 | (__arm_vstrbq): Change _coerce_ overloads. | |
36389 | (__arm_vstrbq_p): Change _coerce_ overloads. | |
36390 | (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads. | |
36391 | (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads. | |
36392 | (__arm_vstrdq_scatter_offset): Change _coerce_ overloads. | |
36393 | (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads. | |
36394 | (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads. | |
36395 | ||
36396 | 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com> | |
36397 | ||
36398 | * config/arm/arm_mve.h (__arm_vbicq): Change coerce on | |
36399 | scalar constant. | |
36400 | ||
36401 | 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com> | |
36402 | ||
36403 | * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic. | |
36404 | (__arm_vadcq_u32): Likewise. | |
36405 | (__arm_vadcq_m_s32): Likewise. | |
36406 | (__arm_vadcq_m_u32): Likewise. | |
36407 | (__arm_vsbcq_s32): Likewise. | |
36408 | (__arm_vsbcq_u32): Likewise. | |
36409 | (__arm_vsbcq_m_s32): Likewise. | |
36410 | (__arm_vsbcq_m_u32): Likewise. | |
36411 | * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile. | |
36412 | ||
36413 | 2023-05-18 Andrea Corallo <andrea.corallo@arm.com> | |
36414 | ||
36415 | * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>) | |
36416 | (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf) | |
36417 | (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>) | |
36418 | (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>) | |
36419 | (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>) | |
36420 | (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>) | |
36421 | (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>) | |
36422 | (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi) | |
36423 | (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>) | |
36424 | (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>) | |
36425 | (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf) | |
36426 | (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>) | |
36427 | (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>) | |
36428 | (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>) | |
36429 | (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>) | |
36430 | (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>) | |
36431 | (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf) | |
36432 | (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf) | |
36433 | (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>) | |
36434 | (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>) | |
36435 | (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>) | |
36436 | (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>) | |
36437 | (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf) | |
36438 | (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>) | |
36439 | (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si) | |
36440 | (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si) | |
36441 | (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi) | |
36442 | (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si) | |
36443 | (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>) | |
36444 | (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>) | |
36445 | (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>) | |
36446 | (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>) | |
36447 | (mve_vorrq_m_f<mode>) | |
36448 | (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn) | |
36449 | (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn) | |
36450 | (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and | |
36451 | capitalization in the emitted asm. | |
36452 | ||
36453 | 2023-05-18 Andrea Corallo <andrea.corallo@arm.com> | |
36454 | ||
36455 | * config/arm/constraints.md (mve_vldrd_immediate): Move it to | |
36456 | predicates.md. | |
36457 | (Ri): Move constraint definition from predicates.md. | |
36458 | (Rl): Define new constraint. | |
36459 | * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add | |
36460 | missing constraint. | |
36461 | (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint | |
36462 | for op 1, use mve_vstrw_immediate predicate and Rl constraint for | |
36463 | op 2. Fix asm output spacing. | |
36464 | (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint. | |
36465 | * config/arm/predicates.md (Ri) Move constraint to constraints.md | |
36466 | (mve_vldrd_immediate): Move it from | |
36467 | constraints.md. | |
36468 | (mve_vstrw_immediate): New predicate. | |
36469 | ||
36470 | 2023-05-18 Pan Li <pan2.li@intel.com> | |
36471 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
36472 | Kito Cheng <kito.cheng@sifive.com> | |
36473 | Richard Biener <rguenther@suse.de> | |
36474 | Richard Sandiford <richard.sandiford@arm.com> | |
36475 | ||
36476 | * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits. | |
36477 | * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits | |
36478 | (struct table_elt): Extend machine_mode to 16 bits. | |
36479 | (struct set): Ditto. | |
36480 | * genmodes.cc (emit_mode_wider): Extend type from char to short. | |
36481 | (emit_mode_complex): Ditto. | |
36482 | (emit_mode_inner): Ditto. | |
36483 | (emit_class_narrowest_mode): Ditto. | |
36484 | * genopinit.cc (main): Extend the machine_mode limit. | |
36485 | * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and | |
36486 | re-ordered the struct fields for padding. | |
36487 | * machmode.h (MACHINE_MODE_BITSIZE): New macro. | |
36488 | (GET_MODE_2XWIDER_MODE): Extend type from char to short. | |
36489 | (get_mode_alignment): Extend type from char to short. | |
36490 | * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and | |
36491 | removed the ATTRIBUTE_PACKED. | |
36492 | * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow | |
36493 | * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment. | |
36494 | m_kind to 2 bits and remove m_spare. | |
36495 | * rtl.h (RTX_CODE_BITSIZE): New macro. | |
36496 | (struct rtx_def): Swap both the bit size and location between the | |
36497 | rtx_code and the machine_mode. | |
36498 | (subreg_shape::unique_id): Extend the machine_mode limit. | |
36499 | * rtlanal.h: Extend machine_mode to 16 bits. | |
36500 | * tree-core.h (struct tree_type_common): Extend machine_mode to 16 | |
36501 | bits and re-ordered the struct fields for padding. | |
36502 | (struct tree_decl_common): Extend machine_mode to 16 bits. | |
36503 | ||
36504 | 2023-05-17 Jin Ma <jinma@linux.alibaba.com> | |
36505 | ||
36506 | * genrecog.cc (print_nonbool_test): Fix type error of | |
36507 | switch (SUBREG_BYTE (op))'. | |
36508 | ||
36509 | 2023-05-17 Jin Ma <jinma@linux.alibaba.com> | |
36510 | ||
36511 | * common/config/riscv/riscv-common.cc: Remove | |
36512 | trailing spaces on lines. | |
36513 | * config/riscv/riscv.cc (riscv_legitimize_move): Likewise. | |
36514 | * config/riscv/riscv.h (enum reg_class): Likewise. | |
36515 | * config/riscv/riscv.md: Likewise. | |
36516 | ||
36517 | 2023-05-17 John David Anglin <danglin@gcc.gnu.org> | |
36518 | ||
36519 | * config/pa/pa.md (clear_cache): New. | |
36520 | ||
36521 | 2023-05-17 Arsen Arsenović <arsen@aarsen.me> | |
36522 | ||
36523 | * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous | |
36524 | parenthesis. Fix misnamed index entry. | |
36525 | <concept>: Fix misnamed index entry. | |
36526 | ||
36527 | 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
36528 | ||
36529 | * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern, | |
36530 | combined from ... | |
36531 | (*<optab>si3_mask, *<optab>di3_mask): Here. | |
36532 | (*<optab>si3_mask_1, *<optab>di3_mask_1): And here. | |
36533 | * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New | |
36534 | pattern. | |
36535 | (*<bitmanip_optab>si3_sext_mask): Likewise. | |
36536 | * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand | |
36537 | and const_di_mask_operand. | |
36538 | (bitmanip_rotate): New iterator. | |
36539 | (bitmanip_optab): Add rotates. | |
36540 | * config/riscv/predicates.md (const_si_mask_operand): Renamed | |
36541 | from const31_operand. Generalize to handle more mask constants. | |
36542 | (const_di_mask_operand): Similarly. | |
36543 | ||
36544 | 2023-05-17 Jakub Jelinek <jakub@redhat.com> | |
36545 | ||
36546 | PR c++/109884 | |
36547 | * config/i386/i386-builtin-types.def (FLOAT128): Use | |
36548 | float128t_type_node rather than float128_type_node. | |
36549 | ||
36550 | 2023-05-17 Alexander Monakov <amonakov@ispras.ru> | |
36551 | ||
36552 | * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for | |
36553 | FP_CONTRACT_FAST (no functional change). | |
36554 | ||
36555 | 2023-05-17 Uros Bizjak <ubizjak@gmail.com> | |
36556 | ||
36557 | * config/i386/i386.cc (ix86_multiplication_cost): Correct | |
36558 | calcuation of integer vector mode costs to reflect generated | |
36559 | instruction sequences of different integer vector modes and | |
36560 | different target ABIs. | |
36561 | ||
36562 | 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36563 | ||
36564 | * config/riscv/riscv-opts.h (enum riscv_entity): New enum. | |
36565 | * config/riscv/riscv.cc (riscv_emit_mode_set): New function. | |
36566 | (riscv_mode_needed): Ditto. | |
36567 | (riscv_mode_after): Ditto. | |
36568 | (riscv_mode_entry): Ditto. | |
36569 | (riscv_mode_exit): Ditto. | |
36570 | (riscv_mode_priority): Ditto. | |
36571 | (TARGET_MODE_EMIT): New target hook. | |
36572 | (TARGET_MODE_NEEDED): Ditto. | |
36573 | (TARGET_MODE_AFTER): Ditto. | |
36574 | (TARGET_MODE_ENTRY): Ditto. | |
36575 | (TARGET_MODE_EXIT): Ditto. | |
36576 | (TARGET_MODE_PRIORITY): Ditto. | |
36577 | * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto. | |
36578 | (NUM_MODES_FOR_MODE_SWITCHING): Ditto. | |
36579 | * config/riscv/riscv.md: Add csrwvxrm. | |
36580 | * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute. | |
36581 | (vxrmsi): New pattern. | |
36582 | ||
36583 | 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36584 | ||
36585 | * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode. | |
36586 | * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto. | |
36587 | (struct narrow_alu_def): Ditto. | |
36588 | * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto. | |
36589 | (function_expander::use_exact_insn): Ditto. | |
36590 | * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function. | |
36591 | (function_base::has_rounding_mode_operand_p): New function. | |
36592 | ||
36593 | 2023-05-17 Andrew Pinski <apinski@marvell.com> | |
36594 | ||
36595 | * tree-ssa-forwprop.cc (simplify_builtin_call): Check | |
36596 | against 0 instead of calling integer_zerop. | |
36597 | ||
36598 | 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36599 | ||
36600 | * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function. | |
36601 | (DEF_RVV_VXRM_ENUM): New macro. | |
36602 | (handle_pragma_vector): Add vxrm enum register. | |
36603 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro. | |
36604 | (RNU): Ditto. | |
36605 | (RNE): Ditto. | |
36606 | (RDN): Ditto. | |
36607 | (ROD): Ditto. | |
36608 | ||
36609 | 2023-05-17 Aldy Hernandez <aldyh@redhat.com> | |
36610 | ||
36611 | * value-range.h (Value_Range::operator=): New. | |
36612 | ||
36613 | 2023-05-17 Aldy Hernandez <aldyh@redhat.com> | |
36614 | ||
36615 | * value-range.cc (vrange::operator=): Add a stub to copy | |
36616 | unsupported ranges. | |
36617 | * value-range.h (is_a <unsupported_range>): New. | |
36618 | (Value_Range::operator=): Support copying unsupported ranges. | |
36619 | ||
36620 | 2023-05-17 Aldy Hernandez <aldyh@redhat.com> | |
36621 | ||
36622 | * data-streamer-in.cc (streamer_read_real_value): New. | |
36623 | (streamer_read_value_range): New. | |
36624 | * data-streamer-out.cc (streamer_write_real_value): New. | |
36625 | (streamer_write_vrange): New. | |
36626 | * data-streamer.h (streamer_write_vrange): New. | |
36627 | (streamer_read_value_range): New. | |
36628 | ||
36629 | 2023-05-17 Jonathan Wakely <jwakely@redhat.com> | |
36630 | ||
36631 | PR c++/109532 | |
36632 | * doc/invoke.texi (Code Gen Options): Note that -fshort-enums | |
36633 | is ignored for a fixed underlying type. | |
36634 | (C++ Dialect Options): Likewise for -fstrict-enums. | |
36635 | ||
36636 | 2023-05-17 Tobias Burnus <tobias@codesourcery.com> | |
36637 | ||
36638 | * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran | |
36639 | special case. | |
36640 | ||
36641 | 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
36642 | ||
36643 | * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE): | |
36644 | New. | |
36645 | (s390_atomic_align_for_mode): New. | |
36646 | ||
36647 | 2023-05-17 Jakub Jelinek <jakub@redhat.com> | |
36648 | ||
36649 | * wide-int.cc (wi::from_array): Add missing closing paren in function | |
36650 | comment. | |
36651 | ||
36652 | 2023-05-17 Kewen Lin <linkw@linux.ibm.com> | |
36653 | ||
36654 | * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with | |
36655 | suggested unroll factor once the previous analysis fails. | |
36656 | ||
36657 | 2023-05-17 Pan Li <pan2.li@intel.com> | |
36658 | ||
36659 | * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New | |
36660 | macro. | |
36661 | (main): Add bool1 to the type indexer. | |
36662 | * config/riscv/riscv-vector-builtins-functions.def | |
36663 | (vreinterpret): Register vbool1 interpret function. | |
36664 | * config/riscv/riscv-vector-builtins-types.def | |
36665 | (DEF_RVV_BOOL1_INTERPRET_OPS): New macro. | |
36666 | (vint8m1_t): Add the type to bool1_interpret_ops. | |
36667 | (vint16m1_t): Ditto. | |
36668 | (vint32m1_t): Ditto. | |
36669 | (vint64m1_t): Ditto. | |
36670 | (vuint8m1_t): Ditto. | |
36671 | (vuint16m1_t): Ditto. | |
36672 | (vuint32m1_t): Ditto. | |
36673 | (vuint64m1_t): Ditto. | |
36674 | * config/riscv/riscv-vector-builtins.cc | |
36675 | (DEF_RVV_BOOL1_INTERPRET_OPS): New macro. | |
36676 | (required_extensions_p): Add bool1 interpret case. | |
36677 | * config/riscv/riscv-vector-builtins.def | |
36678 | (bool1_interpret): Add bool1 interpret to base type. | |
36679 | * config/riscv/vector.md (@vreinterpret<mode>): Add new expand | |
36680 | with VB dest for vreinterpret. | |
36681 | ||
36682 | 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com> | |
36683 | ||
36684 | PR target/106708 | |
36685 | * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building | |
36686 | constants through "lis; xoris". | |
36687 | ||
36688 | 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com> | |
36689 | ||
36690 | * common/config/rs6000/rs6000-common.cc: Add REE pass as a | |
36691 | default rs6000 target pass for O2 and above. | |
36692 | * doc/invoke.texi: Document -free | |
36693 | ||
36694 | 2023-05-16 Kito Cheng <kito.cheng@sifive.com> | |
36695 | ||
36696 | * common/config/riscv/riscv-common.cc (riscv_compute_multilib): | |
36697 | Fix wrong select_kind... | |
36698 | ||
36699 | 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
36700 | ||
36701 | * config/s390/s390-protos.h (s390_expand_setmem): Change | |
36702 | function signature. | |
36703 | * config/s390/s390.cc (s390_expand_setmem): For memset's less | |
36704 | than or equal to 256 byte do not perform a libc call. | |
36705 | * config/s390/s390.md: Change expander into a version which | |
36706 | takes 8 operands. | |
36707 | ||
36708 | 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
36709 | ||
36710 | * config/s390/s390-protos.h (s390_expand_movmem): New. | |
36711 | * config/s390/s390.cc (s390_expand_movmem): New. | |
36712 | * config/s390/s390.md (movmem<mode>): New. | |
36713 | (*mvcrl): New. | |
36714 | (mvcrl): New. | |
36715 | ||
36716 | 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
36717 | ||
36718 | * config/s390/s390-protos.h (s390_expand_cpymem): Change | |
36719 | function signature. | |
36720 | * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less | |
36721 | than or equal to 256 byte do not perform a libc call. | |
36722 | (s390_expand_insv): Adapt new function signature of | |
36723 | s390_expand_cpymem. | |
36724 | * config/s390/s390.md: Change expander into a version which | |
36725 | takes 8 operands. | |
36726 | ||
36727 | 2023-05-16 Andrew Pinski <apinski@marvell.com> | |
36728 | ||
36729 | PR tree-optimization/109424 | |
36730 | * match.pd: Add patterns for min/max of zero_one_valued | |
36731 | values to `&`/`|`. | |
36732 | ||
36733 | 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36734 | ||
36735 | * config/riscv/riscv-protos.h (enum frm_field_enum): New enum. | |
36736 | * config/riscv/riscv-vector-builtins.cc | |
36737 | (function_expander::use_ternop_insn): Add default rounding mode. | |
36738 | (function_expander::use_widen_ternop_insn): Ditto. | |
36739 | * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM. | |
36740 | (riscv_hard_regno_mode_ok): Ditto. | |
36741 | (riscv_conditional_register_usage): Ditto. | |
36742 | * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto. | |
36743 | (FRM_REG_P): Ditto. | |
36744 | (RISCV_DWARF_FRM): Ditto. | |
36745 | * config/riscv/riscv.md: Ditto. | |
36746 | * config/riscv/vector-iterators.md: split no frm and has frm operations. | |
36747 | * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern. | |
36748 | (@pred_<optab><mode>): Ditto. | |
36749 | ||
36750 | 2023-05-15 Aldy Hernandez <aldyh@redhat.com> | |
36751 | ||
36752 | PR tree-optimization/109695 | |
36753 | * value-range.cc (irange::operator=): Resize range. | |
36754 | (irange::union_): Same. | |
36755 | (irange::intersect): Same. | |
36756 | (irange::invert): Same. | |
36757 | (int_range_max): Default to 3 sub-ranges and resize as needed. | |
36758 | * value-range.h (irange::maybe_resize): New. | |
36759 | (~int_range): New. | |
36760 | (int_range::int_range): Adjust for resizing. | |
36761 | (int_range::operator=): Same. | |
36762 | ||
36763 | 2023-05-15 Aldy Hernandez <aldyh@redhat.com> | |
36764 | ||
36765 | * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary | |
36766 | range copying | |
36767 | * value-range.cc (irange::union_nonzero_bits): Return TRUE only | |
36768 | when range changed. | |
36769 | ||
36770 | 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36771 | ||
36772 | * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum. | |
36773 | * config/riscv/riscv-vector-builtins.cc | |
36774 | (function_expander::use_exact_insn): Add default rounding mode operand. | |
36775 | * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM. | |
36776 | (riscv_hard_regno_mode_ok): Ditto. | |
36777 | (riscv_conditional_register_usage): Ditto. | |
36778 | * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto. | |
36779 | (VXRM_REG_P): Ditto. | |
36780 | (RISCV_DWARF_VXRM): Ditto. | |
36781 | * config/riscv/riscv.md: Ditto. | |
36782 | * config/riscv/vector.md: Ditto | |
36783 | ||
36784 | 2023-05-15 Pan Li <pan2.li@intel.com> | |
36785 | ||
36786 | * optabs.cc (maybe_gen_insn): Add case to generate instruction | |
36787 | that has 11 operands. | |
36788 | ||
36789 | 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
36790 | ||
36791 | * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing | |
36792 | logic for vector modes. | |
36793 | ||
36794 | 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
36795 | ||
36796 | PR target/99195 | |
36797 | * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to... | |
36798 | (aarch64_cm<optab><mode><vczle><vczbe>): ... This. | |
36799 | (aarch64_cmtst<mode>): Rename to... | |
36800 | (aarch64_cmtst<mode><vczle><vczbe>): ... This. | |
36801 | (*aarch64_cmtst_same_<mode>): Rename to... | |
36802 | (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This. | |
36803 | (*aarch64_cmtstdi): Rename to... | |
36804 | (*aarch64_cmtstdi<vczle><vczbe>): ... This. | |
36805 | (aarch64_fac<optab><mode>): Rename to... | |
36806 | (aarch64_fac<optab><mode><vczle><vczbe>): ... This. | |
36807 | ||
36808 | 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
36809 | ||
36810 | PR target/99195 | |
36811 | * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to... | |
36812 | (aarch64_s<optab><mode><vczle><vczbe>): ... This. | |
36813 | ||
36814 | 2023-05-15 Pan Li <pan2.li@intel.com> | |
36815 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36816 | kito-cheng <kito.cheng@sifive.com> | |
36817 | ||
36818 | * config/riscv/riscv-v.cc (const_vlmax_p): New function for | |
36819 | deciding the mode is constant or not. | |
36820 | (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli. | |
36821 | ||
36822 | 2023-05-15 Richard Biener <rguenther@suse.de> | |
36823 | ||
36824 | PR tree-optimization/109848 | |
36825 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the | |
36826 | TARGET_MEM_REF address preparation before the store, not | |
36827 | before the CTOR. | |
36828 | ||
36829 | 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36830 | ||
36831 | * config/riscv/riscv.cc | |
36832 | (riscv_vectorize_preferred_vector_alignment): New function. | |
36833 | (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook. | |
36834 | ||
36835 | 2023-05-14 Andrew Pinski <apinski@marvell.com> | |
36836 | ||
36837 | PR tree-optimization/109829 | |
36838 | * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`. | |
36839 | ||
36840 | 2023-05-14 Uros Bizjak <ubizjak@gmail.com> | |
36841 | ||
36842 | PR target/109807 | |
36843 | * config/i386/i386.cc: Revert the 2023-05-11 change. | |
36844 | (ix86_widen_mult_cost): Return high value instead of | |
36845 | ICEing for unsupported modes. | |
36846 | ||
36847 | 2023-05-14 Ard Biesheuvel <ardb@kernel.org> | |
36848 | ||
36849 | * config/i386/i386.cc (x86_function_profiler): Take | |
36850 | ix86_direct_extern_access into account when generating calls | |
36851 | to __fentry__() | |
36852 | ||
36853 | 2023-05-14 Pan Li <pan2.li@intel.com> | |
36854 | ||
36855 | * config/riscv/riscv-vector-builtins.cc (required_extensions_p): | |
36856 | Refactor the or pattern to switch cases. | |
36857 | ||
36858 | 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
36859 | ||
36860 | * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename | |
36861 | aarch64_expand_vector_init to this, and remove interleaving case. | |
36862 | Recursively call aarch64_expand_vector_init_fallback, instead of | |
36863 | aarch64_expand_vector_init. | |
36864 | (aarch64_unzip_vector_init): New function. | |
36865 | (aarch64_expand_vector_init): Likewise. | |
36866 | ||
36867 | 2023-05-13 Kito Cheng <kito.cheng@sifive.com> | |
36868 | ||
36869 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): | |
36870 | Pull out function call from the gcc_assert. | |
36871 | ||
36872 | 2023-05-13 Kito Cheng <kito.cheng@sifive.com> | |
36873 | ||
36874 | * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New. | |
36875 | (policy_to_str): New. | |
36876 | (vector_insn_info::dump): Use vlmul_to_str and policy_to_str. | |
36877 | ||
36878 | 2023-05-13 Andrew Pinski <apinski@marvell.com> | |
36879 | ||
36880 | PR tree-optimization/109834 | |
36881 | * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking. | |
36882 | (popcount(rotate(x,y))->popcount(x)): Likewise. | |
36883 | ||
36884 | 2023-05-12 Uros Bizjak <ubizjak@gmail.com> | |
36885 | ||
36886 | * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also | |
36887 | reject ymm instructions for TARGET_PREFER_AVX128. Use generic | |
36888 | gen_extend_insn to generate zero/sign extension instructions. | |
36889 | Fix comments. | |
36890 | (ix86_expand_vecop_qihi): Initialize interleave functions | |
36891 | for MULT code only. Fix comments. | |
36892 | ||
36893 | 2023-05-12 Uros Bizjak <ubizjak@gmail.com> | |
36894 | ||
36895 | PR target/109797 | |
36896 | * config/i386/mmx.md (mulv2si3): Remove expander. | |
36897 | (mulv2si3): Rename insn pattern from *mulv2si. | |
36898 | ||
36899 | 2023-05-12 Tobias Burnus <tobias@codesourcery.com> | |
36900 | ||
36901 | PR libstdc++/109816 | |
36902 | * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by | |
36903 | '!lto_stream_offload_p'. | |
36904 | ||
36905 | 2023-05-12 Kito Cheng <kito.cheng@sifive.com> | |
36906 | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
36907 | ||
36908 | PR target/109743 | |
36909 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New. | |
36910 | (local_avl_compatible_p): New. | |
36911 | (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations | |
36912 | for LCM, rewrite as a backward algorithm. | |
36913 | (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn | |
36914 | interface, handle a BB at once. | |
36915 | ||
36916 | 2023-05-12 Richard Biener <rguenther@suse.de> | |
36917 | ||
36918 | PR tree-optimization/64731 | |
36919 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Also | |
36920 | handle TARGET_MEM_REF destinations of stores from vector | |
36921 | CTORs. | |
36922 | ||
36923 | 2023-05-12 Richard Biener <rguenther@suse.de> | |
36924 | ||
36925 | PR tree-optimization/109791 | |
36926 | * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))): | |
36927 | New pattern. | |
36928 | (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)): | |
36929 | Likewise. | |
36930 | ||
36931 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
36932 | ||
36933 | * config/arm/arm-mve-builtins-base.cc (vsriq): New. | |
36934 | * config/arm/arm-mve-builtins-base.def (vsriq): New. | |
36935 | * config/arm/arm-mve-builtins-base.h (vsriq): New. | |
36936 | * config/arm/arm-mve-builtins.cc | |
36937 | (function_instance::has_inactive_argument): Handle vsriq. | |
36938 | * config/arm/arm_mve.h (vsriq): Remove. | |
36939 | (vsriq_m): Remove. | |
36940 | (vsriq_n_u8): Remove. | |
36941 | (vsriq_n_s8): Remove. | |
36942 | (vsriq_n_u16): Remove. | |
36943 | (vsriq_n_s16): Remove. | |
36944 | (vsriq_n_u32): Remove. | |
36945 | (vsriq_n_s32): Remove. | |
36946 | (vsriq_m_n_s8): Remove. | |
36947 | (vsriq_m_n_u8): Remove. | |
36948 | (vsriq_m_n_s16): Remove. | |
36949 | (vsriq_m_n_u16): Remove. | |
36950 | (vsriq_m_n_s32): Remove. | |
36951 | (vsriq_m_n_u32): Remove. | |
36952 | (__arm_vsriq_n_u8): Remove. | |
36953 | (__arm_vsriq_n_s8): Remove. | |
36954 | (__arm_vsriq_n_u16): Remove. | |
36955 | (__arm_vsriq_n_s16): Remove. | |
36956 | (__arm_vsriq_n_u32): Remove. | |
36957 | (__arm_vsriq_n_s32): Remove. | |
36958 | (__arm_vsriq_m_n_s8): Remove. | |
36959 | (__arm_vsriq_m_n_u8): Remove. | |
36960 | (__arm_vsriq_m_n_s16): Remove. | |
36961 | (__arm_vsriq_m_n_u16): Remove. | |
36962 | (__arm_vsriq_m_n_s32): Remove. | |
36963 | (__arm_vsriq_m_n_u32): Remove. | |
36964 | (__arm_vsriq): Remove. | |
36965 | (__arm_vsriq_m): Remove. | |
36966 | ||
36967 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
36968 | ||
36969 | * config/arm/iterators.md (mve_insn): Add vsri. | |
36970 | * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ... | |
36971 | (@mve_<mve_insn>q_n_<supf><mode>): .,. this. | |
36972 | (mve_vsriq_m_n_<supf><mode>): Rename into ... | |
36973 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
36974 | ||
36975 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
36976 | ||
36977 | * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New. | |
36978 | * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New. | |
36979 | ||
36980 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
36981 | ||
36982 | * config/arm/arm-mve-builtins-base.cc (vsliq): New. | |
36983 | * config/arm/arm-mve-builtins-base.def (vsliq): New. | |
36984 | * config/arm/arm-mve-builtins-base.h (vsliq): New. | |
36985 | * config/arm/arm-mve-builtins.cc | |
36986 | (function_instance::has_inactive_argument): Handle vsliq. | |
36987 | * config/arm/arm_mve.h (vsliq): Remove. | |
36988 | (vsliq_m): Remove. | |
36989 | (vsliq_n_u8): Remove. | |
36990 | (vsliq_n_s8): Remove. | |
36991 | (vsliq_n_u16): Remove. | |
36992 | (vsliq_n_s16): Remove. | |
36993 | (vsliq_n_u32): Remove. | |
36994 | (vsliq_n_s32): Remove. | |
36995 | (vsliq_m_n_s8): Remove. | |
36996 | (vsliq_m_n_s32): Remove. | |
36997 | (vsliq_m_n_s16): Remove. | |
36998 | (vsliq_m_n_u8): Remove. | |
36999 | (vsliq_m_n_u32): Remove. | |
37000 | (vsliq_m_n_u16): Remove. | |
37001 | (__arm_vsliq_n_u8): Remove. | |
37002 | (__arm_vsliq_n_s8): Remove. | |
37003 | (__arm_vsliq_n_u16): Remove. | |
37004 | (__arm_vsliq_n_s16): Remove. | |
37005 | (__arm_vsliq_n_u32): Remove. | |
37006 | (__arm_vsliq_n_s32): Remove. | |
37007 | (__arm_vsliq_m_n_s8): Remove. | |
37008 | (__arm_vsliq_m_n_s32): Remove. | |
37009 | (__arm_vsliq_m_n_s16): Remove. | |
37010 | (__arm_vsliq_m_n_u8): Remove. | |
37011 | (__arm_vsliq_m_n_u32): Remove. | |
37012 | (__arm_vsliq_m_n_u16): Remove. | |
37013 | (__arm_vsliq): Remove. | |
37014 | (__arm_vsliq_m): Remove. | |
37015 | ||
37016 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37017 | ||
37018 | * config/arm/iterators.md (mve_insn>): Add vsli. | |
37019 | * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ... | |
37020 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
37021 | (mve_vsliq_m_n_<supf><mode>): Rename into ... | |
37022 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
37023 | ||
37024 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37025 | ||
37026 | * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New. | |
37027 | * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New. | |
37028 | ||
37029 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37030 | ||
37031 | * config/arm/arm-mve-builtins-base.cc (vpselq): New. | |
37032 | * config/arm/arm-mve-builtins-base.def (vpselq): New. | |
37033 | * config/arm/arm-mve-builtins-base.h (vpselq): New. | |
37034 | * config/arm/arm_mve.h (vpselq): Remove. | |
37035 | (vpselq_u8): Remove. | |
37036 | (vpselq_s8): Remove. | |
37037 | (vpselq_u16): Remove. | |
37038 | (vpselq_s16): Remove. | |
37039 | (vpselq_u32): Remove. | |
37040 | (vpselq_s32): Remove. | |
37041 | (vpselq_u64): Remove. | |
37042 | (vpselq_s64): Remove. | |
37043 | (vpselq_f16): Remove. | |
37044 | (vpselq_f32): Remove. | |
37045 | (__arm_vpselq_u8): Remove. | |
37046 | (__arm_vpselq_s8): Remove. | |
37047 | (__arm_vpselq_u16): Remove. | |
37048 | (__arm_vpselq_s16): Remove. | |
37049 | (__arm_vpselq_u32): Remove. | |
37050 | (__arm_vpselq_s32): Remove. | |
37051 | (__arm_vpselq_u64): Remove. | |
37052 | (__arm_vpselq_s64): Remove. | |
37053 | (__arm_vpselq_f16): Remove. | |
37054 | (__arm_vpselq_f32): Remove. | |
37055 | (__arm_vpselq): Remove. | |
37056 | ||
37057 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37058 | ||
37059 | * config/arm/arm-mve-builtins-shapes.cc (vpsel): New. | |
37060 | * config/arm/arm-mve-builtins-shapes.h (vpsel): New. | |
37061 | ||
37062 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37063 | ||
37064 | * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of | |
37065 | gen_mve_vpselq. | |
37066 | * config/arm/iterators.md (MVE_VPSELQ_F): New. | |
37067 | (mve_insn): Add vpsel. | |
37068 | * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ... | |
37069 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
37070 | (@mve_vpselq_f<mode>): Rename into ... | |
37071 | (@mve_<mve_insn>q_f<mode>): ... this. | |
37072 | ||
37073 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37074 | ||
37075 | * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New. | |
37076 | * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New. | |
37077 | * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New. | |
37078 | * config/arm/arm-mve-builtins.cc | |
37079 | (function_instance::has_inactive_argument): Handle vfmaq, vfmasq, | |
37080 | vfmsq. | |
37081 | * config/arm/arm_mve.h (vfmaq): Remove. | |
37082 | (vfmasq): Remove. | |
37083 | (vfmsq): Remove. | |
37084 | (vfmaq_m): Remove. | |
37085 | (vfmasq_m): Remove. | |
37086 | (vfmsq_m): Remove. | |
37087 | (vfmaq_f16): Remove. | |
37088 | (vfmaq_n_f16): Remove. | |
37089 | (vfmasq_n_f16): Remove. | |
37090 | (vfmsq_f16): Remove. | |
37091 | (vfmaq_f32): Remove. | |
37092 | (vfmaq_n_f32): Remove. | |
37093 | (vfmasq_n_f32): Remove. | |
37094 | (vfmsq_f32): Remove. | |
37095 | (vfmaq_m_f32): Remove. | |
37096 | (vfmaq_m_f16): Remove. | |
37097 | (vfmaq_m_n_f32): Remove. | |
37098 | (vfmaq_m_n_f16): Remove. | |
37099 | (vfmasq_m_n_f32): Remove. | |
37100 | (vfmasq_m_n_f16): Remove. | |
37101 | (vfmsq_m_f32): Remove. | |
37102 | (vfmsq_m_f16): Remove. | |
37103 | (__arm_vfmaq_f16): Remove. | |
37104 | (__arm_vfmaq_n_f16): Remove. | |
37105 | (__arm_vfmasq_n_f16): Remove. | |
37106 | (__arm_vfmsq_f16): Remove. | |
37107 | (__arm_vfmaq_f32): Remove. | |
37108 | (__arm_vfmaq_n_f32): Remove. | |
37109 | (__arm_vfmasq_n_f32): Remove. | |
37110 | (__arm_vfmsq_f32): Remove. | |
37111 | (__arm_vfmaq_m_f32): Remove. | |
37112 | (__arm_vfmaq_m_f16): Remove. | |
37113 | (__arm_vfmaq_m_n_f32): Remove. | |
37114 | (__arm_vfmaq_m_n_f16): Remove. | |
37115 | (__arm_vfmasq_m_n_f32): Remove. | |
37116 | (__arm_vfmasq_m_n_f16): Remove. | |
37117 | (__arm_vfmsq_m_f32): Remove. | |
37118 | (__arm_vfmsq_m_f16): Remove. | |
37119 | (__arm_vfmaq): Remove. | |
37120 | (__arm_vfmasq): Remove. | |
37121 | (__arm_vfmsq): Remove. | |
37122 | (__arm_vfmaq_m): Remove. | |
37123 | (__arm_vfmasq_m): Remove. | |
37124 | (__arm_vfmsq_m): Remove. | |
37125 | ||
37126 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37127 | ||
37128 | * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F, | |
37129 | VFMSQ_M_F. | |
37130 | (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F. | |
37131 | (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New. | |
37132 | (mve_insn): Add vfma, vfmas, vfms. | |
37133 | * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge | |
37134 | into ... | |
37135 | (@mve_<mve_insn>q_f<mode>): ... this. | |
37136 | (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ... | |
37137 | (@mve_<mve_insn>q_n_f<mode>): ... this. | |
37138 | (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into | |
37139 | @mve_<mve_insn>q_m_f<mode>. | |
37140 | (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into | |
37141 | @mve_<mve_insn>q_m_n_f<mode>. | |
37142 | ||
37143 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37144 | ||
37145 | * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New. | |
37146 | * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New. | |
37147 | ||
37148 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37149 | ||
37150 | * config/arm/arm-mve-builtins-base.cc | |
37151 | (FUNCTION_WITH_RTX_M_N_NO_F): New. | |
37152 | (vmvnq): New. | |
37153 | * config/arm/arm-mve-builtins-base.def (vmvnq): New. | |
37154 | * config/arm/arm-mve-builtins-base.h (vmvnq): New. | |
37155 | * config/arm/arm_mve.h (vmvnq): Remove. | |
37156 | (vmvnq_m): Remove. | |
37157 | (vmvnq_x): Remove. | |
37158 | (vmvnq_s8): Remove. | |
37159 | (vmvnq_s16): Remove. | |
37160 | (vmvnq_s32): Remove. | |
37161 | (vmvnq_n_s16): Remove. | |
37162 | (vmvnq_n_s32): Remove. | |
37163 | (vmvnq_u8): Remove. | |
37164 | (vmvnq_u16): Remove. | |
37165 | (vmvnq_u32): Remove. | |
37166 | (vmvnq_n_u16): Remove. | |
37167 | (vmvnq_n_u32): Remove. | |
37168 | (vmvnq_m_u8): Remove. | |
37169 | (vmvnq_m_s8): Remove. | |
37170 | (vmvnq_m_u16): Remove. | |
37171 | (vmvnq_m_s16): Remove. | |
37172 | (vmvnq_m_u32): Remove. | |
37173 | (vmvnq_m_s32): Remove. | |
37174 | (vmvnq_m_n_s16): Remove. | |
37175 | (vmvnq_m_n_u16): Remove. | |
37176 | (vmvnq_m_n_s32): Remove. | |
37177 | (vmvnq_m_n_u32): Remove. | |
37178 | (vmvnq_x_s8): Remove. | |
37179 | (vmvnq_x_s16): Remove. | |
37180 | (vmvnq_x_s32): Remove. | |
37181 | (vmvnq_x_u8): Remove. | |
37182 | (vmvnq_x_u16): Remove. | |
37183 | (vmvnq_x_u32): Remove. | |
37184 | (vmvnq_x_n_s16): Remove. | |
37185 | (vmvnq_x_n_s32): Remove. | |
37186 | (vmvnq_x_n_u16): Remove. | |
37187 | (vmvnq_x_n_u32): Remove. | |
37188 | (__arm_vmvnq_s8): Remove. | |
37189 | (__arm_vmvnq_s16): Remove. | |
37190 | (__arm_vmvnq_s32): Remove. | |
37191 | (__arm_vmvnq_n_s16): Remove. | |
37192 | (__arm_vmvnq_n_s32): Remove. | |
37193 | (__arm_vmvnq_u8): Remove. | |
37194 | (__arm_vmvnq_u16): Remove. | |
37195 | (__arm_vmvnq_u32): Remove. | |
37196 | (__arm_vmvnq_n_u16): Remove. | |
37197 | (__arm_vmvnq_n_u32): Remove. | |
37198 | (__arm_vmvnq_m_u8): Remove. | |
37199 | (__arm_vmvnq_m_s8): Remove. | |
37200 | (__arm_vmvnq_m_u16): Remove. | |
37201 | (__arm_vmvnq_m_s16): Remove. | |
37202 | (__arm_vmvnq_m_u32): Remove. | |
37203 | (__arm_vmvnq_m_s32): Remove. | |
37204 | (__arm_vmvnq_m_n_s16): Remove. | |
37205 | (__arm_vmvnq_m_n_u16): Remove. | |
37206 | (__arm_vmvnq_m_n_s32): Remove. | |
37207 | (__arm_vmvnq_m_n_u32): Remove. | |
37208 | (__arm_vmvnq_x_s8): Remove. | |
37209 | (__arm_vmvnq_x_s16): Remove. | |
37210 | (__arm_vmvnq_x_s32): Remove. | |
37211 | (__arm_vmvnq_x_u8): Remove. | |
37212 | (__arm_vmvnq_x_u16): Remove. | |
37213 | (__arm_vmvnq_x_u32): Remove. | |
37214 | (__arm_vmvnq_x_n_s16): Remove. | |
37215 | (__arm_vmvnq_x_n_s32): Remove. | |
37216 | (__arm_vmvnq_x_n_u16): Remove. | |
37217 | (__arm_vmvnq_x_n_u32): Remove. | |
37218 | (__arm_vmvnq): Remove. | |
37219 | (__arm_vmvnq_m): Remove. | |
37220 | (__arm_vmvnq_x): Remove. | |
37221 | ||
37222 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37223 | ||
37224 | * config/arm/iterators.md (mve_insn): Add vmvn. | |
37225 | * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ... | |
37226 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
37227 | (mve_vmvnq_m_<supf><mode>): Rename into ... | |
37228 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
37229 | (mve_vmvnq_m_n_<supf><mode>): Rename into ... | |
37230 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
37231 | ||
37232 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37233 | ||
37234 | * config/arm/arm-mve-builtins-shapes.cc (mvn): New. | |
37235 | * config/arm/arm-mve-builtins-shapes.h (mvn): New. | |
37236 | ||
37237 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37238 | ||
37239 | * config/arm/arm-mve-builtins-base.cc (vbrsrq): New. | |
37240 | * config/arm/arm-mve-builtins-base.def (vbrsrq): New. | |
37241 | * config/arm/arm-mve-builtins-base.h (vbrsrq): New. | |
37242 | * config/arm/arm_mve.h (vbrsrq): Remove. | |
37243 | (vbrsrq_m): Remove. | |
37244 | (vbrsrq_x): Remove. | |
37245 | (vbrsrq_n_f16): Remove. | |
37246 | (vbrsrq_n_f32): Remove. | |
37247 | (vbrsrq_n_u8): Remove. | |
37248 | (vbrsrq_n_s8): Remove. | |
37249 | (vbrsrq_n_u16): Remove. | |
37250 | (vbrsrq_n_s16): Remove. | |
37251 | (vbrsrq_n_u32): Remove. | |
37252 | (vbrsrq_n_s32): Remove. | |
37253 | (vbrsrq_m_n_s8): Remove. | |
37254 | (vbrsrq_m_n_s32): Remove. | |
37255 | (vbrsrq_m_n_s16): Remove. | |
37256 | (vbrsrq_m_n_u8): Remove. | |
37257 | (vbrsrq_m_n_u32): Remove. | |
37258 | (vbrsrq_m_n_u16): Remove. | |
37259 | (vbrsrq_m_n_f32): Remove. | |
37260 | (vbrsrq_m_n_f16): Remove. | |
37261 | (vbrsrq_x_n_s8): Remove. | |
37262 | (vbrsrq_x_n_s16): Remove. | |
37263 | (vbrsrq_x_n_s32): Remove. | |
37264 | (vbrsrq_x_n_u8): Remove. | |
37265 | (vbrsrq_x_n_u16): Remove. | |
37266 | (vbrsrq_x_n_u32): Remove. | |
37267 | (vbrsrq_x_n_f16): Remove. | |
37268 | (vbrsrq_x_n_f32): Remove. | |
37269 | (__arm_vbrsrq_n_u8): Remove. | |
37270 | (__arm_vbrsrq_n_s8): Remove. | |
37271 | (__arm_vbrsrq_n_u16): Remove. | |
37272 | (__arm_vbrsrq_n_s16): Remove. | |
37273 | (__arm_vbrsrq_n_u32): Remove. | |
37274 | (__arm_vbrsrq_n_s32): Remove. | |
37275 | (__arm_vbrsrq_m_n_s8): Remove. | |
37276 | (__arm_vbrsrq_m_n_s32): Remove. | |
37277 | (__arm_vbrsrq_m_n_s16): Remove. | |
37278 | (__arm_vbrsrq_m_n_u8): Remove. | |
37279 | (__arm_vbrsrq_m_n_u32): Remove. | |
37280 | (__arm_vbrsrq_m_n_u16): Remove. | |
37281 | (__arm_vbrsrq_x_n_s8): Remove. | |
37282 | (__arm_vbrsrq_x_n_s16): Remove. | |
37283 | (__arm_vbrsrq_x_n_s32): Remove. | |
37284 | (__arm_vbrsrq_x_n_u8): Remove. | |
37285 | (__arm_vbrsrq_x_n_u16): Remove. | |
37286 | (__arm_vbrsrq_x_n_u32): Remove. | |
37287 | (__arm_vbrsrq_n_f16): Remove. | |
37288 | (__arm_vbrsrq_n_f32): Remove. | |
37289 | (__arm_vbrsrq_m_n_f32): Remove. | |
37290 | (__arm_vbrsrq_m_n_f16): Remove. | |
37291 | (__arm_vbrsrq_x_n_f16): Remove. | |
37292 | (__arm_vbrsrq_x_n_f32): Remove. | |
37293 | (__arm_vbrsrq): Remove. | |
37294 | (__arm_vbrsrq_m): Remove. | |
37295 | (__arm_vbrsrq_x): Remove. | |
37296 | ||
37297 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37298 | ||
37299 | * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New. | |
37300 | (mve_insn): Add vbrsr. | |
37301 | * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ... | |
37302 | (@mve_<mve_insn>q_n_f<mode>): ... this. | |
37303 | (mve_vbrsrq_n_<supf><mode>): Rename into ... | |
37304 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
37305 | (mve_vbrsrq_m_n_<supf><mode>): Rename into ... | |
37306 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
37307 | (mve_vbrsrq_m_n_f<mode>): Rename into ... | |
37308 | (@mve_<mve_insn>q_m_n_f<mode>): ... this. | |
37309 | ||
37310 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37311 | ||
37312 | * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New. | |
37313 | * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New. | |
37314 | ||
37315 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37316 | ||
37317 | * config/arm/arm-mve-builtins-base.cc (vqshluq): New. | |
37318 | * config/arm/arm-mve-builtins-base.def (vqshluq): New. | |
37319 | * config/arm/arm-mve-builtins-base.h (vqshluq): New. | |
37320 | * config/arm/arm_mve.h (vqshluq): Remove. | |
37321 | (vqshluq_m): Remove. | |
37322 | (vqshluq_n_s8): Remove. | |
37323 | (vqshluq_n_s16): Remove. | |
37324 | (vqshluq_n_s32): Remove. | |
37325 | (vqshluq_m_n_s8): Remove. | |
37326 | (vqshluq_m_n_s16): Remove. | |
37327 | (vqshluq_m_n_s32): Remove. | |
37328 | (__arm_vqshluq_n_s8): Remove. | |
37329 | (__arm_vqshluq_n_s16): Remove. | |
37330 | (__arm_vqshluq_n_s32): Remove. | |
37331 | (__arm_vqshluq_m_n_s8): Remove. | |
37332 | (__arm_vqshluq_m_n_s16): Remove. | |
37333 | (__arm_vqshluq_m_n_s32): Remove. | |
37334 | (__arm_vqshluq): Remove. | |
37335 | (__arm_vqshluq_m): Remove. | |
37336 | ||
37337 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37338 | ||
37339 | * config/arm/iterators.md (mve_insn): Add vqshlu. | |
37340 | (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S. | |
37341 | (VQSHLUQ_M_N, VQSHLUQ_N): New. | |
37342 | * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ... | |
37343 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
37344 | (mve_vqshluq_m_n_s<mode>): Change name into ... | |
37345 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
37346 | ||
37347 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37348 | ||
37349 | * config/arm/arm-mve-builtins-shapes.cc | |
37350 | (binary_lshift_unsigned): New. | |
37351 | * config/arm/arm-mve-builtins-shapes.h | |
37352 | (binary_lshift_unsigned): New. | |
37353 | ||
37354 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37355 | ||
37356 | * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq) | |
37357 | (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New. | |
37358 | * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq) | |
37359 | (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New. | |
37360 | * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq) | |
37361 | (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New. | |
37362 | * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq, | |
37363 | vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq. | |
37364 | * config/arm/arm_mve.h (vrmlaldavhaq): Remove. | |
37365 | (vrmlaldavhaxq): Remove. | |
37366 | (vrmlsldavhaq): Remove. | |
37367 | (vrmlsldavhaxq): Remove. | |
37368 | (vrmlaldavhaq_p): Remove. | |
37369 | (vrmlaldavhaxq_p): Remove. | |
37370 | (vrmlsldavhaq_p): Remove. | |
37371 | (vrmlsldavhaxq_p): Remove. | |
37372 | (vrmlaldavhaq_s32): Remove. | |
37373 | (vrmlaldavhaq_u32): Remove. | |
37374 | (vrmlaldavhaxq_s32): Remove. | |
37375 | (vrmlsldavhaq_s32): Remove. | |
37376 | (vrmlsldavhaxq_s32): Remove. | |
37377 | (vrmlaldavhaq_p_s32): Remove. | |
37378 | (vrmlaldavhaq_p_u32): Remove. | |
37379 | (vrmlaldavhaxq_p_s32): Remove. | |
37380 | (vrmlsldavhaq_p_s32): Remove. | |
37381 | (vrmlsldavhaxq_p_s32): Remove. | |
37382 | (__arm_vrmlaldavhaq_s32): Remove. | |
37383 | (__arm_vrmlaldavhaq_u32): Remove. | |
37384 | (__arm_vrmlaldavhaxq_s32): Remove. | |
37385 | (__arm_vrmlsldavhaq_s32): Remove. | |
37386 | (__arm_vrmlsldavhaxq_s32): Remove. | |
37387 | (__arm_vrmlaldavhaq_p_s32): Remove. | |
37388 | (__arm_vrmlaldavhaq_p_u32): Remove. | |
37389 | (__arm_vrmlaldavhaxq_p_s32): Remove. | |
37390 | (__arm_vrmlsldavhaq_p_s32): Remove. | |
37391 | (__arm_vrmlsldavhaxq_p_s32): Remove. | |
37392 | (__arm_vrmlaldavhaq): Remove. | |
37393 | (__arm_vrmlaldavhaxq): Remove. | |
37394 | (__arm_vrmlsldavhaq): Remove. | |
37395 | (__arm_vrmlsldavhaxq): Remove. | |
37396 | (__arm_vrmlaldavhaq_p): Remove. | |
37397 | (__arm_vrmlaldavhaxq_p): Remove. | |
37398 | (__arm_vrmlsldavhaq_p): Remove. | |
37399 | (__arm_vrmlsldavhaxq_p): Remove. | |
37400 | ||
37401 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37402 | ||
37403 | * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ) | |
37404 | (MVE_VRMLxLDAVHAxQ_P): New. | |
37405 | (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha, | |
37406 | vrmlsldavhax. | |
37407 | (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S, | |
37408 | VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S, | |
37409 | VRMLALDAVHAQ_P_S. | |
37410 | * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si) | |
37411 | (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si) | |
37412 | (mve_vrmlsldavhaq_sv4si): Merge into ... | |
37413 | (@mve_<mve_insn>q_<supf>v4si): ... this. | |
37414 | (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si) | |
37415 | (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si) | |
37416 | (mve_vrmlsldavhaxq_p_sv4si): Merge into ... | |
37417 | (@mve_<mve_insn>q_p_<supf>v4si): ... this. | |
37418 | ||
37419 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37420 | ||
37421 | * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New. | |
37422 | * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq): | |
37423 | New. | |
37424 | * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New. | |
37425 | * config/arm/arm_mve.h (vqdmulltq): Remove. | |
37426 | (vqdmullbq): Remove. | |
37427 | (vqdmullbq_m): Remove. | |
37428 | (vqdmulltq_m): Remove. | |
37429 | (vqdmulltq_s16): Remove. | |
37430 | (vqdmulltq_n_s16): Remove. | |
37431 | (vqdmullbq_s16): Remove. | |
37432 | (vqdmullbq_n_s16): Remove. | |
37433 | (vqdmulltq_s32): Remove. | |
37434 | (vqdmulltq_n_s32): Remove. | |
37435 | (vqdmullbq_s32): Remove. | |
37436 | (vqdmullbq_n_s32): Remove. | |
37437 | (vqdmullbq_m_n_s32): Remove. | |
37438 | (vqdmullbq_m_n_s16): Remove. | |
37439 | (vqdmullbq_m_s32): Remove. | |
37440 | (vqdmullbq_m_s16): Remove. | |
37441 | (vqdmulltq_m_n_s32): Remove. | |
37442 | (vqdmulltq_m_n_s16): Remove. | |
37443 | (vqdmulltq_m_s32): Remove. | |
37444 | (vqdmulltq_m_s16): Remove. | |
37445 | (__arm_vqdmulltq_s16): Remove. | |
37446 | (__arm_vqdmulltq_n_s16): Remove. | |
37447 | (__arm_vqdmullbq_s16): Remove. | |
37448 | (__arm_vqdmullbq_n_s16): Remove. | |
37449 | (__arm_vqdmulltq_s32): Remove. | |
37450 | (__arm_vqdmulltq_n_s32): Remove. | |
37451 | (__arm_vqdmullbq_s32): Remove. | |
37452 | (__arm_vqdmullbq_n_s32): Remove. | |
37453 | (__arm_vqdmullbq_m_n_s32): Remove. | |
37454 | (__arm_vqdmullbq_m_n_s16): Remove. | |
37455 | (__arm_vqdmullbq_m_s32): Remove. | |
37456 | (__arm_vqdmullbq_m_s16): Remove. | |
37457 | (__arm_vqdmulltq_m_n_s32): Remove. | |
37458 | (__arm_vqdmulltq_m_n_s16): Remove. | |
37459 | (__arm_vqdmulltq_m_s32): Remove. | |
37460 | (__arm_vqdmulltq_m_s16): Remove. | |
37461 | (__arm_vqdmulltq): Remove. | |
37462 | (__arm_vqdmullbq): Remove. | |
37463 | (__arm_vqdmullbq_m): Remove. | |
37464 | (__arm_vqdmulltq_m): Remove. | |
37465 | ||
37466 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37467 | ||
37468 | * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M) | |
37469 | (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New. | |
37470 | (mve_insn): Add vqdmullb, vqdmullt. | |
37471 | (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S, | |
37472 | VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S, | |
37473 | VQDMULLTQ_N_S. | |
37474 | * config/arm/mve.md (mve_vqdmullbq_n_s<mode>) | |
37475 | (mve_vqdmulltq_n_s<mode>): Merge into ... | |
37476 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
37477 | (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ... | |
37478 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
37479 | (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into | |
37480 | ... | |
37481 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
37482 | (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ... | |
37483 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
37484 | ||
37485 | 2023-05-12 Christophe Lyon <christophe.lyon@arm.com> | |
37486 | ||
37487 | * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New. | |
37488 | * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New. | |
37489 | ||
37490 | 2023-05-12 Kito Cheng <kito.cheng@sifive.com> | |
37491 | ||
37492 | * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): | |
37493 | Drop unused parameter. | |
37494 | (riscv_select_multilib): Ditto. | |
37495 | (riscv_compute_multilib): Update call site of | |
37496 | riscv_select_multilib_by_abi and riscv_select_multilib_by_abi. | |
37497 | ||
37498 | 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai> | |
37499 | ||
37500 | * config/riscv/autovec.md (vec_init<mode><vel>): New pattern. | |
37501 | * config/riscv/riscv-protos.h (expand_vec_init): New function. | |
37502 | * config/riscv/riscv-v.cc (class rvv_builder): New class. | |
37503 | (rvv_builder::can_duplicate_repeating_sequence_p): New function. | |
37504 | (rvv_builder::get_merged_repeating_sequence): Ditto. | |
37505 | (expand_vector_init_insert_elems): Ditto. | |
37506 | (expand_vec_init): Ditto. | |
37507 | * config/riscv/vector-iterators.md: New attribute. | |
37508 | ||
37509 | 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org> | |
37510 | ||
37511 | * config/rs6000/rs6000-builtins.def | |
37512 | (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp | |
37513 | to xsiexpdp_di. | |
37514 | (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from | |
37515 | xsiexpdpf to xsiexpdpf_di. | |
37516 | * config/rs6000/vsx.md (xsiexpdp): Rename to... | |
37517 | (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and | |
37518 | replace TARGET_64BIT with TARGET_POWERPC64. | |
37519 | (xsiexpdpf): Rename to... | |
37520 | (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and | |
37521 | replace TARGET_64BIT with TARGET_POWERPC64. | |
37522 | ||
37523 | 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org> | |
37524 | ||
37525 | * config/rs6000/rs6000-builtins.def | |
37526 | (__builtin_vsx_scalar_extract_sig): Set return type to const signed | |
37527 | long long. | |
37528 | * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with | |
37529 | TARGET_POWERPC64. | |
37530 | ||
37531 | 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org> | |
37532 | ||
37533 | * config/rs6000/rs6000-builtins.def | |
37534 | (__builtin_vsx_scalar_extract_exp): Set return type to const signed | |
37535 | int and set its bif-pattern to xsxexpdp_si, move it from power9-64 | |
37536 | to power9 catalog. | |
37537 | * config/rs6000/vsx.md (xsxexpdp): Rename to ... | |
37538 | (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove | |
37539 | TARGET_64BIT check. | |
37540 | * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment | |
37541 | requirement when it has a 64-bit argument. | |
37542 | ||
37543 | 2023-05-12 Pan Li <pan2.li@intel.com> | |
37544 | Richard Sandiford <richard.sandiford@arm.com> | |
37545 | Richard Biener <rguenther@suse.de> | |
37546 | Jakub Jelinek <jakub@redhat.com> | |
37547 | ||
37548 | * mux-utils.h: Add overload operator == and != for pointer_mux. | |
37549 | * var-tracking.cc: Included mux-utils.h for pointer_tmux. | |
37550 | (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>. | |
37551 | (dv_is_decl_p): Reconciled to the new type, aka pointer_mux. | |
37552 | (dv_as_decl): Ditto. | |
37553 | (dv_as_opaque): Removed due to unnecessary. | |
37554 | (struct variable_hasher): Take decl_or_value as compare_type. | |
37555 | (variable_hasher::equal): Diito. | |
37556 | (dv_from_decl): Reconciled to the new type, aka pointer_mux. | |
37557 | (dv_from_value): Ditto. | |
37558 | (attrs_list_member): Ditto. | |
37559 | (vars_copy): Ditto. | |
37560 | (var_reg_decl_set): Ditto. | |
37561 | (var_reg_delete_and_set): Ditto. | |
37562 | (find_loc_in_1pdv): Ditto. | |
37563 | (canonicalize_values_star): Ditto. | |
37564 | (variable_post_merge_new_vals): Ditto. | |
37565 | (dump_onepart_variable_differences): Ditto. | |
37566 | (variable_different_p): Ditto. | |
37567 | (set_slot_part): Ditto. | |
37568 | (clobber_slot_part): Ditto. | |
37569 | (clobber_variable_part): Ditto. | |
37570 | ||
37571 | 2023-05-11 mtsamis <manolis.tsamis@vrull.eu> | |
37572 | ||
37573 | * match.pd: simplify vector shift + bit_and + multiply. | |
37574 | ||
37575 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37576 | ||
37577 | * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq) | |
37578 | (vqdmlashq, vqrdmlahq, vqrdmlashq): New. | |
37579 | * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq) | |
37580 | (vqdmlashq, vqrdmlahq, vqrdmlashq): New. | |
37581 | * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq) | |
37582 | (vqdmlashq, vqrdmlahq, vqrdmlashq): New. | |
37583 | * config/arm/arm-mve-builtins.cc | |
37584 | (function_instance::has_inactive_argument): Handle vmlaq, vmlasq, | |
37585 | vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq. | |
37586 | * config/arm/arm_mve.h (vqrdmlashq): Remove. | |
37587 | (vqrdmlahq): Remove. | |
37588 | (vqdmlashq): Remove. | |
37589 | (vqdmlahq): Remove. | |
37590 | (vmlasq): Remove. | |
37591 | (vmlaq): Remove. | |
37592 | (vmlaq_m): Remove. | |
37593 | (vmlasq_m): Remove. | |
37594 | (vqdmlashq_m): Remove. | |
37595 | (vqdmlahq_m): Remove. | |
37596 | (vqrdmlahq_m): Remove. | |
37597 | (vqrdmlashq_m): Remove. | |
37598 | (vmlasq_n_u8): Remove. | |
37599 | (vmlaq_n_u8): Remove. | |
37600 | (vqrdmlashq_n_s8): Remove. | |
37601 | (vqrdmlahq_n_s8): Remove. | |
37602 | (vqdmlahq_n_s8): Remove. | |
37603 | (vqdmlashq_n_s8): Remove. | |
37604 | (vmlasq_n_s8): Remove. | |
37605 | (vmlaq_n_s8): Remove. | |
37606 | (vmlasq_n_u16): Remove. | |
37607 | (vmlaq_n_u16): Remove. | |
37608 | (vqrdmlashq_n_s16): Remove. | |
37609 | (vqrdmlahq_n_s16): Remove. | |
37610 | (vqdmlashq_n_s16): Remove. | |
37611 | (vqdmlahq_n_s16): Remove. | |
37612 | (vmlasq_n_s16): Remove. | |
37613 | (vmlaq_n_s16): Remove. | |
37614 | (vmlasq_n_u32): Remove. | |
37615 | (vmlaq_n_u32): Remove. | |
37616 | (vqrdmlashq_n_s32): Remove. | |
37617 | (vqrdmlahq_n_s32): Remove. | |
37618 | (vqdmlashq_n_s32): Remove. | |
37619 | (vqdmlahq_n_s32): Remove. | |
37620 | (vmlasq_n_s32): Remove. | |
37621 | (vmlaq_n_s32): Remove. | |
37622 | (vmlaq_m_n_s8): Remove. | |
37623 | (vmlaq_m_n_s32): Remove. | |
37624 | (vmlaq_m_n_s16): Remove. | |
37625 | (vmlaq_m_n_u8): Remove. | |
37626 | (vmlaq_m_n_u32): Remove. | |
37627 | (vmlaq_m_n_u16): Remove. | |
37628 | (vmlasq_m_n_s8): Remove. | |
37629 | (vmlasq_m_n_s32): Remove. | |
37630 | (vmlasq_m_n_s16): Remove. | |
37631 | (vmlasq_m_n_u8): Remove. | |
37632 | (vmlasq_m_n_u32): Remove. | |
37633 | (vmlasq_m_n_u16): Remove. | |
37634 | (vqdmlashq_m_n_s8): Remove. | |
37635 | (vqdmlashq_m_n_s32): Remove. | |
37636 | (vqdmlashq_m_n_s16): Remove. | |
37637 | (vqdmlahq_m_n_s8): Remove. | |
37638 | (vqdmlahq_m_n_s32): Remove. | |
37639 | (vqdmlahq_m_n_s16): Remove. | |
37640 | (vqrdmlahq_m_n_s8): Remove. | |
37641 | (vqrdmlahq_m_n_s32): Remove. | |
37642 | (vqrdmlahq_m_n_s16): Remove. | |
37643 | (vqrdmlashq_m_n_s8): Remove. | |
37644 | (vqrdmlashq_m_n_s32): Remove. | |
37645 | (vqrdmlashq_m_n_s16): Remove. | |
37646 | (__arm_vmlasq_n_u8): Remove. | |
37647 | (__arm_vmlaq_n_u8): Remove. | |
37648 | (__arm_vqrdmlashq_n_s8): Remove. | |
37649 | (__arm_vqdmlashq_n_s8): Remove. | |
37650 | (__arm_vqrdmlahq_n_s8): Remove. | |
37651 | (__arm_vqdmlahq_n_s8): Remove. | |
37652 | (__arm_vmlasq_n_s8): Remove. | |
37653 | (__arm_vmlaq_n_s8): Remove. | |
37654 | (__arm_vmlasq_n_u16): Remove. | |
37655 | (__arm_vmlaq_n_u16): Remove. | |
37656 | (__arm_vqrdmlashq_n_s16): Remove. | |
37657 | (__arm_vqdmlashq_n_s16): Remove. | |
37658 | (__arm_vqrdmlahq_n_s16): Remove. | |
37659 | (__arm_vqdmlahq_n_s16): Remove. | |
37660 | (__arm_vmlasq_n_s16): Remove. | |
37661 | (__arm_vmlaq_n_s16): Remove. | |
37662 | (__arm_vmlasq_n_u32): Remove. | |
37663 | (__arm_vmlaq_n_u32): Remove. | |
37664 | (__arm_vqrdmlashq_n_s32): Remove. | |
37665 | (__arm_vqdmlashq_n_s32): Remove. | |
37666 | (__arm_vqrdmlahq_n_s32): Remove. | |
37667 | (__arm_vqdmlahq_n_s32): Remove. | |
37668 | (__arm_vmlasq_n_s32): Remove. | |
37669 | (__arm_vmlaq_n_s32): Remove. | |
37670 | (__arm_vmlaq_m_n_s8): Remove. | |
37671 | (__arm_vmlaq_m_n_s32): Remove. | |
37672 | (__arm_vmlaq_m_n_s16): Remove. | |
37673 | (__arm_vmlaq_m_n_u8): Remove. | |
37674 | (__arm_vmlaq_m_n_u32): Remove. | |
37675 | (__arm_vmlaq_m_n_u16): Remove. | |
37676 | (__arm_vmlasq_m_n_s8): Remove. | |
37677 | (__arm_vmlasq_m_n_s32): Remove. | |
37678 | (__arm_vmlasq_m_n_s16): Remove. | |
37679 | (__arm_vmlasq_m_n_u8): Remove. | |
37680 | (__arm_vmlasq_m_n_u32): Remove. | |
37681 | (__arm_vmlasq_m_n_u16): Remove. | |
37682 | (__arm_vqdmlahq_m_n_s8): Remove. | |
37683 | (__arm_vqdmlahq_m_n_s32): Remove. | |
37684 | (__arm_vqdmlahq_m_n_s16): Remove. | |
37685 | (__arm_vqrdmlahq_m_n_s8): Remove. | |
37686 | (__arm_vqrdmlahq_m_n_s32): Remove. | |
37687 | (__arm_vqrdmlahq_m_n_s16): Remove. | |
37688 | (__arm_vqrdmlashq_m_n_s8): Remove. | |
37689 | (__arm_vqrdmlashq_m_n_s32): Remove. | |
37690 | (__arm_vqrdmlashq_m_n_s16): Remove. | |
37691 | (__arm_vqdmlashq_m_n_s8): Remove. | |
37692 | (__arm_vqdmlashq_m_n_s16): Remove. | |
37693 | (__arm_vqdmlashq_m_n_s32): Remove. | |
37694 | (__arm_vmlasq): Remove. | |
37695 | (__arm_vmlaq): Remove. | |
37696 | (__arm_vqrdmlashq): Remove. | |
37697 | (__arm_vqdmlashq): Remove. | |
37698 | (__arm_vqrdmlahq): Remove. | |
37699 | (__arm_vqdmlahq): Remove. | |
37700 | (__arm_vmlaq_m): Remove. | |
37701 | (__arm_vmlasq_m): Remove. | |
37702 | (__arm_vqdmlahq_m): Remove. | |
37703 | (__arm_vqrdmlahq_m): Remove. | |
37704 | (__arm_vqrdmlashq_m): Remove. | |
37705 | (__arm_vqdmlashq_m): Remove. | |
37706 | ||
37707 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37708 | ||
37709 | * config/arm/iterators.md (MVE_VMLxQ_N): New. | |
37710 | (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah, | |
37711 | vqrdmlash. | |
37712 | (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S, | |
37713 | VQRDMLASHQ_N_S. | |
37714 | * config/arm/mve.md (mve_vmlaq_n_<supf><mode>) | |
37715 | (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>) | |
37716 | (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>) | |
37717 | (mve_vqrdmlashq_n_<supf><mode>): Merge into ... | |
37718 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
37719 | ||
37720 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37721 | ||
37722 | * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New. | |
37723 | * config/arm/arm-mve-builtins-shapes.h (ternary_n): New. | |
37724 | ||
37725 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37726 | ||
37727 | * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq) | |
37728 | (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq) | |
37729 | (vqrdmlsdhxq): New. | |
37730 | * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq) | |
37731 | (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq) | |
37732 | (vqrdmlsdhxq): New. | |
37733 | * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq) | |
37734 | (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq) | |
37735 | (vqrdmlsdhxq): New. | |
37736 | * config/arm/arm-mve-builtins.cc | |
37737 | (function_instance::has_inactive_argument): Handle vqrdmladhq, | |
37738 | vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq, | |
37739 | vqdmlsdhq, vqdmlsdhxq. | |
37740 | * config/arm/arm_mve.h (vqrdmlsdhxq): Remove. | |
37741 | (vqrdmlsdhq): Remove. | |
37742 | (vqrdmladhxq): Remove. | |
37743 | (vqrdmladhq): Remove. | |
37744 | (vqdmlsdhxq): Remove. | |
37745 | (vqdmlsdhq): Remove. | |
37746 | (vqdmladhxq): Remove. | |
37747 | (vqdmladhq): Remove. | |
37748 | (vqdmladhq_m): Remove. | |
37749 | (vqdmladhxq_m): Remove. | |
37750 | (vqdmlsdhq_m): Remove. | |
37751 | (vqdmlsdhxq_m): Remove. | |
37752 | (vqrdmladhq_m): Remove. | |
37753 | (vqrdmladhxq_m): Remove. | |
37754 | (vqrdmlsdhq_m): Remove. | |
37755 | (vqrdmlsdhxq_m): Remove. | |
37756 | (vqrdmlsdhxq_s8): Remove. | |
37757 | (vqrdmlsdhq_s8): Remove. | |
37758 | (vqrdmladhxq_s8): Remove. | |
37759 | (vqrdmladhq_s8): Remove. | |
37760 | (vqdmlsdhxq_s8): Remove. | |
37761 | (vqdmlsdhq_s8): Remove. | |
37762 | (vqdmladhxq_s8): Remove. | |
37763 | (vqdmladhq_s8): Remove. | |
37764 | (vqrdmlsdhxq_s16): Remove. | |
37765 | (vqrdmlsdhq_s16): Remove. | |
37766 | (vqrdmladhxq_s16): Remove. | |
37767 | (vqrdmladhq_s16): Remove. | |
37768 | (vqdmlsdhxq_s16): Remove. | |
37769 | (vqdmlsdhq_s16): Remove. | |
37770 | (vqdmladhxq_s16): Remove. | |
37771 | (vqdmladhq_s16): Remove. | |
37772 | (vqrdmlsdhxq_s32): Remove. | |
37773 | (vqrdmlsdhq_s32): Remove. | |
37774 | (vqrdmladhxq_s32): Remove. | |
37775 | (vqrdmladhq_s32): Remove. | |
37776 | (vqdmlsdhxq_s32): Remove. | |
37777 | (vqdmlsdhq_s32): Remove. | |
37778 | (vqdmladhxq_s32): Remove. | |
37779 | (vqdmladhq_s32): Remove. | |
37780 | (vqdmladhq_m_s8): Remove. | |
37781 | (vqdmladhq_m_s32): Remove. | |
37782 | (vqdmladhq_m_s16): Remove. | |
37783 | (vqdmladhxq_m_s8): Remove. | |
37784 | (vqdmladhxq_m_s32): Remove. | |
37785 | (vqdmladhxq_m_s16): Remove. | |
37786 | (vqdmlsdhq_m_s8): Remove. | |
37787 | (vqdmlsdhq_m_s32): Remove. | |
37788 | (vqdmlsdhq_m_s16): Remove. | |
37789 | (vqdmlsdhxq_m_s8): Remove. | |
37790 | (vqdmlsdhxq_m_s32): Remove. | |
37791 | (vqdmlsdhxq_m_s16): Remove. | |
37792 | (vqrdmladhq_m_s8): Remove. | |
37793 | (vqrdmladhq_m_s32): Remove. | |
37794 | (vqrdmladhq_m_s16): Remove. | |
37795 | (vqrdmladhxq_m_s8): Remove. | |
37796 | (vqrdmladhxq_m_s32): Remove. | |
37797 | (vqrdmladhxq_m_s16): Remove. | |
37798 | (vqrdmlsdhq_m_s8): Remove. | |
37799 | (vqrdmlsdhq_m_s32): Remove. | |
37800 | (vqrdmlsdhq_m_s16): Remove. | |
37801 | (vqrdmlsdhxq_m_s8): Remove. | |
37802 | (vqrdmlsdhxq_m_s32): Remove. | |
37803 | (vqrdmlsdhxq_m_s16): Remove. | |
37804 | (__arm_vqrdmlsdhxq_s8): Remove. | |
37805 | (__arm_vqrdmlsdhq_s8): Remove. | |
37806 | (__arm_vqrdmladhxq_s8): Remove. | |
37807 | (__arm_vqrdmladhq_s8): Remove. | |
37808 | (__arm_vqdmlsdhxq_s8): Remove. | |
37809 | (__arm_vqdmlsdhq_s8): Remove. | |
37810 | (__arm_vqdmladhxq_s8): Remove. | |
37811 | (__arm_vqdmladhq_s8): Remove. | |
37812 | (__arm_vqrdmlsdhxq_s16): Remove. | |
37813 | (__arm_vqrdmlsdhq_s16): Remove. | |
37814 | (__arm_vqrdmladhxq_s16): Remove. | |
37815 | (__arm_vqrdmladhq_s16): Remove. | |
37816 | (__arm_vqdmlsdhxq_s16): Remove. | |
37817 | (__arm_vqdmlsdhq_s16): Remove. | |
37818 | (__arm_vqdmladhxq_s16): Remove. | |
37819 | (__arm_vqdmladhq_s16): Remove. | |
37820 | (__arm_vqrdmlsdhxq_s32): Remove. | |
37821 | (__arm_vqrdmlsdhq_s32): Remove. | |
37822 | (__arm_vqrdmladhxq_s32): Remove. | |
37823 | (__arm_vqrdmladhq_s32): Remove. | |
37824 | (__arm_vqdmlsdhxq_s32): Remove. | |
37825 | (__arm_vqdmlsdhq_s32): Remove. | |
37826 | (__arm_vqdmladhxq_s32): Remove. | |
37827 | (__arm_vqdmladhq_s32): Remove. | |
37828 | (__arm_vqdmladhq_m_s8): Remove. | |
37829 | (__arm_vqdmladhq_m_s32): Remove. | |
37830 | (__arm_vqdmladhq_m_s16): Remove. | |
37831 | (__arm_vqdmladhxq_m_s8): Remove. | |
37832 | (__arm_vqdmladhxq_m_s32): Remove. | |
37833 | (__arm_vqdmladhxq_m_s16): Remove. | |
37834 | (__arm_vqdmlsdhq_m_s8): Remove. | |
37835 | (__arm_vqdmlsdhq_m_s32): Remove. | |
37836 | (__arm_vqdmlsdhq_m_s16): Remove. | |
37837 | (__arm_vqdmlsdhxq_m_s8): Remove. | |
37838 | (__arm_vqdmlsdhxq_m_s32): Remove. | |
37839 | (__arm_vqdmlsdhxq_m_s16): Remove. | |
37840 | (__arm_vqrdmladhq_m_s8): Remove. | |
37841 | (__arm_vqrdmladhq_m_s32): Remove. | |
37842 | (__arm_vqrdmladhq_m_s16): Remove. | |
37843 | (__arm_vqrdmladhxq_m_s8): Remove. | |
37844 | (__arm_vqrdmladhxq_m_s32): Remove. | |
37845 | (__arm_vqrdmladhxq_m_s16): Remove. | |
37846 | (__arm_vqrdmlsdhq_m_s8): Remove. | |
37847 | (__arm_vqrdmlsdhq_m_s32): Remove. | |
37848 | (__arm_vqrdmlsdhq_m_s16): Remove. | |
37849 | (__arm_vqrdmlsdhxq_m_s8): Remove. | |
37850 | (__arm_vqrdmlsdhxq_m_s32): Remove. | |
37851 | (__arm_vqrdmlsdhxq_m_s16): Remove. | |
37852 | (__arm_vqrdmlsdhxq): Remove. | |
37853 | (__arm_vqrdmlsdhq): Remove. | |
37854 | (__arm_vqrdmladhxq): Remove. | |
37855 | (__arm_vqrdmladhq): Remove. | |
37856 | (__arm_vqdmlsdhxq): Remove. | |
37857 | (__arm_vqdmlsdhq): Remove. | |
37858 | (__arm_vqdmladhxq): Remove. | |
37859 | (__arm_vqdmladhq): Remove. | |
37860 | (__arm_vqdmladhq_m): Remove. | |
37861 | (__arm_vqdmladhxq_m): Remove. | |
37862 | (__arm_vqdmlsdhq_m): Remove. | |
37863 | (__arm_vqdmlsdhxq_m): Remove. | |
37864 | (__arm_vqrdmladhq_m): Remove. | |
37865 | (__arm_vqrdmladhxq_m): Remove. | |
37866 | (__arm_vqrdmlsdhq_m): Remove. | |
37867 | (__arm_vqrdmlsdhxq_m): Remove. | |
37868 | ||
37869 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37870 | ||
37871 | * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New. | |
37872 | (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx, | |
37873 | vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx. | |
37874 | (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S, | |
37875 | VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S. | |
37876 | * config/arm/mve.md (mve_vqrdmladhq_s<mode>) | |
37877 | (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>) | |
37878 | (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>) | |
37879 | (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>) | |
37880 | (mve_vqdmladhq_s<mode>): Merge into ... | |
37881 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
37882 | ||
37883 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37884 | ||
37885 | * config/arm/arm-mve-builtins-shapes.cc (ternary): New. | |
37886 | * config/arm/arm-mve-builtins-shapes.h (ternary): New. | |
37887 | ||
37888 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37889 | ||
37890 | * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq) | |
37891 | (vmlsldavaq, vmlsldavaxq): New. | |
37892 | * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq) | |
37893 | (vmlsldavaq, vmlsldavaxq): New. | |
37894 | * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq) | |
37895 | (vmlsldavaq, vmlsldavaxq): New. | |
37896 | * config/arm/arm_mve.h (vmlaldavaq): Remove. | |
37897 | (vmlaldavaxq): Remove. | |
37898 | (vmlsldavaq): Remove. | |
37899 | (vmlsldavaxq): Remove. | |
37900 | (vmlaldavaq_p): Remove. | |
37901 | (vmlaldavaxq_p): Remove. | |
37902 | (vmlsldavaq_p): Remove. | |
37903 | (vmlsldavaxq_p): Remove. | |
37904 | (vmlaldavaq_s16): Remove. | |
37905 | (vmlaldavaxq_s16): Remove. | |
37906 | (vmlsldavaq_s16): Remove. | |
37907 | (vmlsldavaxq_s16): Remove. | |
37908 | (vmlaldavaq_u16): Remove. | |
37909 | (vmlaldavaq_s32): Remove. | |
37910 | (vmlaldavaxq_s32): Remove. | |
37911 | (vmlsldavaq_s32): Remove. | |
37912 | (vmlsldavaxq_s32): Remove. | |
37913 | (vmlaldavaq_u32): Remove. | |
37914 | (vmlaldavaq_p_s32): Remove. | |
37915 | (vmlaldavaq_p_s16): Remove. | |
37916 | (vmlaldavaq_p_u32): Remove. | |
37917 | (vmlaldavaq_p_u16): Remove. | |
37918 | (vmlaldavaxq_p_s32): Remove. | |
37919 | (vmlaldavaxq_p_s16): Remove. | |
37920 | (vmlsldavaq_p_s32): Remove. | |
37921 | (vmlsldavaq_p_s16): Remove. | |
37922 | (vmlsldavaxq_p_s32): Remove. | |
37923 | (vmlsldavaxq_p_s16): Remove. | |
37924 | (__arm_vmlaldavaq_s16): Remove. | |
37925 | (__arm_vmlaldavaxq_s16): Remove. | |
37926 | (__arm_vmlsldavaq_s16): Remove. | |
37927 | (__arm_vmlsldavaxq_s16): Remove. | |
37928 | (__arm_vmlaldavaq_u16): Remove. | |
37929 | (__arm_vmlaldavaq_s32): Remove. | |
37930 | (__arm_vmlaldavaxq_s32): Remove. | |
37931 | (__arm_vmlsldavaq_s32): Remove. | |
37932 | (__arm_vmlsldavaxq_s32): Remove. | |
37933 | (__arm_vmlaldavaq_u32): Remove. | |
37934 | (__arm_vmlaldavaq_p_s32): Remove. | |
37935 | (__arm_vmlaldavaq_p_s16): Remove. | |
37936 | (__arm_vmlaldavaq_p_u32): Remove. | |
37937 | (__arm_vmlaldavaq_p_u16): Remove. | |
37938 | (__arm_vmlaldavaxq_p_s32): Remove. | |
37939 | (__arm_vmlaldavaxq_p_s16): Remove. | |
37940 | (__arm_vmlsldavaq_p_s32): Remove. | |
37941 | (__arm_vmlsldavaq_p_s16): Remove. | |
37942 | (__arm_vmlsldavaxq_p_s32): Remove. | |
37943 | (__arm_vmlsldavaxq_p_s16): Remove. | |
37944 | (__arm_vmlaldavaq): Remove. | |
37945 | (__arm_vmlaldavaxq): Remove. | |
37946 | (__arm_vmlsldavaq): Remove. | |
37947 | (__arm_vmlsldavaxq): Remove. | |
37948 | (__arm_vmlaldavaq_p): Remove. | |
37949 | (__arm_vmlaldavaxq_p): Remove. | |
37950 | (__arm_vmlsldavaq_p): Remove. | |
37951 | (__arm_vmlsldavaxq_p): Remove. | |
37952 | ||
37953 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37954 | ||
37955 | * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P): | |
37956 | New. | |
37957 | (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax. | |
37958 | (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S, | |
37959 | VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S. | |
37960 | * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>) | |
37961 | (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>) | |
37962 | (mve_vmlaldavaxq_s<mode>): Merge into ... | |
37963 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
37964 | (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>) | |
37965 | (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into | |
37966 | ... | |
37967 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
37968 | ||
37969 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37970 | ||
37971 | * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New. | |
37972 | * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New. | |
37973 | ||
37974 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
37975 | ||
37976 | * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq) | |
37977 | (vrmlsldavhq, vrmlsldavhxq): New. | |
37978 | * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq) | |
37979 | (vrmlsldavhq, vrmlsldavhxq): New. | |
37980 | * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq) | |
37981 | (vrmlsldavhq, vrmlsldavhxq): New. | |
37982 | * config/arm/arm-mve-builtins-functions.h | |
37983 | (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq, | |
37984 | vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq. | |
37985 | * config/arm/arm_mve.h (vrmlaldavhq): Remove. | |
37986 | (vrmlsldavhxq): Remove. | |
37987 | (vrmlsldavhq): Remove. | |
37988 | (vrmlaldavhxq): Remove. | |
37989 | (vrmlaldavhq_p): Remove. | |
37990 | (vrmlaldavhxq_p): Remove. | |
37991 | (vrmlsldavhq_p): Remove. | |
37992 | (vrmlsldavhxq_p): Remove. | |
37993 | (vrmlaldavhq_u32): Remove. | |
37994 | (vrmlsldavhxq_s32): Remove. | |
37995 | (vrmlsldavhq_s32): Remove. | |
37996 | (vrmlaldavhxq_s32): Remove. | |
37997 | (vrmlaldavhq_s32): Remove. | |
37998 | (vrmlaldavhq_p_s32): Remove. | |
37999 | (vrmlaldavhxq_p_s32): Remove. | |
38000 | (vrmlsldavhq_p_s32): Remove. | |
38001 | (vrmlsldavhxq_p_s32): Remove. | |
38002 | (vrmlaldavhq_p_u32): Remove. | |
38003 | (__arm_vrmlaldavhq_u32): Remove. | |
38004 | (__arm_vrmlsldavhxq_s32): Remove. | |
38005 | (__arm_vrmlsldavhq_s32): Remove. | |
38006 | (__arm_vrmlaldavhxq_s32): Remove. | |
38007 | (__arm_vrmlaldavhq_s32): Remove. | |
38008 | (__arm_vrmlaldavhq_p_s32): Remove. | |
38009 | (__arm_vrmlaldavhxq_p_s32): Remove. | |
38010 | (__arm_vrmlsldavhq_p_s32): Remove. | |
38011 | (__arm_vrmlsldavhxq_p_s32): Remove. | |
38012 | (__arm_vrmlaldavhq_p_u32): Remove. | |
38013 | (__arm_vrmlaldavhq): Remove. | |
38014 | (__arm_vrmlsldavhxq): Remove. | |
38015 | (__arm_vrmlsldavhq): Remove. | |
38016 | (__arm_vrmlaldavhxq): Remove. | |
38017 | (__arm_vrmlaldavhq_p): Remove. | |
38018 | (__arm_vrmlaldavhxq_p): Remove. | |
38019 | (__arm_vrmlsldavhq_p): Remove. | |
38020 | (__arm_vrmlsldavhxq_p): Remove. | |
38021 | ||
38022 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38023 | ||
38024 | * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P): | |
38025 | New. | |
38026 | (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx. | |
38027 | (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S, | |
38028 | VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S. | |
38029 | * config/arm/mve.md (mve_vrmlaldavhxq_sv4si) | |
38030 | (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si) | |
38031 | (mve_vrmlaldavhq_<supf>v4si): Merge into ... | |
38032 | (@mve_<mve_insn>q_<supf>v4si): ... this. | |
38033 | (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si) | |
38034 | (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge | |
38035 | into ... | |
38036 | (@mve_<mve_insn>q_p_<supf>v4si): ... this. | |
38037 | ||
38038 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38039 | ||
38040 | * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq) | |
38041 | (vmlsldavq, vmlsldavxq): New. | |
38042 | * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq) | |
38043 | (vmlsldavq, vmlsldavxq): New. | |
38044 | * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq) | |
38045 | (vmlsldavq, vmlsldavxq): New. | |
38046 | * config/arm/arm_mve.h (vmlaldavq): Remove. | |
38047 | (vmlsldavxq): Remove. | |
38048 | (vmlsldavq): Remove. | |
38049 | (vmlaldavxq): Remove. | |
38050 | (vmlaldavq_p): Remove. | |
38051 | (vmlaldavxq_p): Remove. | |
38052 | (vmlsldavq_p): Remove. | |
38053 | (vmlsldavxq_p): Remove. | |
38054 | (vmlaldavq_u16): Remove. | |
38055 | (vmlsldavxq_s16): Remove. | |
38056 | (vmlsldavq_s16): Remove. | |
38057 | (vmlaldavxq_s16): Remove. | |
38058 | (vmlaldavq_s16): Remove. | |
38059 | (vmlaldavq_u32): Remove. | |
38060 | (vmlsldavxq_s32): Remove. | |
38061 | (vmlsldavq_s32): Remove. | |
38062 | (vmlaldavxq_s32): Remove. | |
38063 | (vmlaldavq_s32): Remove. | |
38064 | (vmlaldavq_p_s16): Remove. | |
38065 | (vmlaldavxq_p_s16): Remove. | |
38066 | (vmlsldavq_p_s16): Remove. | |
38067 | (vmlsldavxq_p_s16): Remove. | |
38068 | (vmlaldavq_p_u16): Remove. | |
38069 | (vmlaldavq_p_s32): Remove. | |
38070 | (vmlaldavxq_p_s32): Remove. | |
38071 | (vmlsldavq_p_s32): Remove. | |
38072 | (vmlsldavxq_p_s32): Remove. | |
38073 | (vmlaldavq_p_u32): Remove. | |
38074 | (__arm_vmlaldavq_u16): Remove. | |
38075 | (__arm_vmlsldavxq_s16): Remove. | |
38076 | (__arm_vmlsldavq_s16): Remove. | |
38077 | (__arm_vmlaldavxq_s16): Remove. | |
38078 | (__arm_vmlaldavq_s16): Remove. | |
38079 | (__arm_vmlaldavq_u32): Remove. | |
38080 | (__arm_vmlsldavxq_s32): Remove. | |
38081 | (__arm_vmlsldavq_s32): Remove. | |
38082 | (__arm_vmlaldavxq_s32): Remove. | |
38083 | (__arm_vmlaldavq_s32): Remove. | |
38084 | (__arm_vmlaldavq_p_s16): Remove. | |
38085 | (__arm_vmlaldavxq_p_s16): Remove. | |
38086 | (__arm_vmlsldavq_p_s16): Remove. | |
38087 | (__arm_vmlsldavxq_p_s16): Remove. | |
38088 | (__arm_vmlaldavq_p_u16): Remove. | |
38089 | (__arm_vmlaldavq_p_s32): Remove. | |
38090 | (__arm_vmlaldavxq_p_s32): Remove. | |
38091 | (__arm_vmlsldavq_p_s32): Remove. | |
38092 | (__arm_vmlsldavxq_p_s32): Remove. | |
38093 | (__arm_vmlaldavq_p_u32): Remove. | |
38094 | (__arm_vmlaldavq): Remove. | |
38095 | (__arm_vmlsldavxq): Remove. | |
38096 | (__arm_vmlsldavq): Remove. | |
38097 | (__arm_vmlaldavxq): Remove. | |
38098 | (__arm_vmlaldavq_p): Remove. | |
38099 | (__arm_vmlaldavxq_p): Remove. | |
38100 | (__arm_vmlsldavq_p): Remove. | |
38101 | (__arm_vmlsldavxq_p): Remove. | |
38102 | ||
38103 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38104 | ||
38105 | * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New. | |
38106 | (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx. | |
38107 | (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S, | |
38108 | VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S. | |
38109 | * config/arm/mve.md (mve_vmlaldavq_<supf><mode>) | |
38110 | (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>) | |
38111 | (mve_vmlsldavxq_s<mode>): Merge into ... | |
38112 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38113 | (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>) | |
38114 | (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into | |
38115 | ... | |
38116 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
38117 | ||
38118 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38119 | ||
38120 | * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New. | |
38121 | * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New. | |
38122 | ||
38123 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38124 | ||
38125 | * config/arm/arm-mve-builtins-base.cc (vabavq): New. | |
38126 | * config/arm/arm-mve-builtins-base.def (vabavq): New. | |
38127 | * config/arm/arm-mve-builtins-base.h (vabavq): New. | |
38128 | * config/arm/arm_mve.h (vabavq): Remove. | |
38129 | (vabavq_p): Remove. | |
38130 | (vabavq_s8): Remove. | |
38131 | (vabavq_s16): Remove. | |
38132 | (vabavq_s32): Remove. | |
38133 | (vabavq_u8): Remove. | |
38134 | (vabavq_u16): Remove. | |
38135 | (vabavq_u32): Remove. | |
38136 | (vabavq_p_s8): Remove. | |
38137 | (vabavq_p_u8): Remove. | |
38138 | (vabavq_p_s16): Remove. | |
38139 | (vabavq_p_u16): Remove. | |
38140 | (vabavq_p_s32): Remove. | |
38141 | (vabavq_p_u32): Remove. | |
38142 | (__arm_vabavq_s8): Remove. | |
38143 | (__arm_vabavq_s16): Remove. | |
38144 | (__arm_vabavq_s32): Remove. | |
38145 | (__arm_vabavq_u8): Remove. | |
38146 | (__arm_vabavq_u16): Remove. | |
38147 | (__arm_vabavq_u32): Remove. | |
38148 | (__arm_vabavq_p_s8): Remove. | |
38149 | (__arm_vabavq_p_u8): Remove. | |
38150 | (__arm_vabavq_p_s16): Remove. | |
38151 | (__arm_vabavq_p_u16): Remove. | |
38152 | (__arm_vabavq_p_s32): Remove. | |
38153 | (__arm_vabavq_p_u32): Remove. | |
38154 | (__arm_vabavq): Remove. | |
38155 | (__arm_vabavq_p): Remove. | |
38156 | ||
38157 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38158 | ||
38159 | * config/arm/iterators.md (mve_insn): Add vabav. | |
38160 | * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ... | |
38161 | (@mve_<mve_insn>q_<supf><mode>): ... this,. | |
38162 | (mve_vabavq_p_<supf><mode>): Rename into ... | |
38163 | (@mve_<mve_insn>q_p_<supf><mode>): ... this,. | |
38164 | ||
38165 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38166 | ||
38167 | * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq) | |
38168 | (vmlsdavaq, vmlsdavaxq): New. | |
38169 | * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq) | |
38170 | (vmlsdavaq, vmlsdavaxq): New. | |
38171 | * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq) | |
38172 | (vmlsdavaq, vmlsdavaxq): New. | |
38173 | * config/arm/arm_mve.h (vmladavaq): Remove. | |
38174 | (vmlsdavaxq): Remove. | |
38175 | (vmlsdavaq): Remove. | |
38176 | (vmladavaxq): Remove. | |
38177 | (vmladavaq_p): Remove. | |
38178 | (vmladavaxq_p): Remove. | |
38179 | (vmlsdavaq_p): Remove. | |
38180 | (vmlsdavaxq_p): Remove. | |
38181 | (vmladavaq_u8): Remove. | |
38182 | (vmlsdavaxq_s8): Remove. | |
38183 | (vmlsdavaq_s8): Remove. | |
38184 | (vmladavaxq_s8): Remove. | |
38185 | (vmladavaq_s8): Remove. | |
38186 | (vmladavaq_u16): Remove. | |
38187 | (vmlsdavaxq_s16): Remove. | |
38188 | (vmlsdavaq_s16): Remove. | |
38189 | (vmladavaxq_s16): Remove. | |
38190 | (vmladavaq_s16): Remove. | |
38191 | (vmladavaq_u32): Remove. | |
38192 | (vmlsdavaxq_s32): Remove. | |
38193 | (vmlsdavaq_s32): Remove. | |
38194 | (vmladavaxq_s32): Remove. | |
38195 | (vmladavaq_s32): Remove. | |
38196 | (vmladavaq_p_s8): Remove. | |
38197 | (vmladavaq_p_s32): Remove. | |
38198 | (vmladavaq_p_s16): Remove. | |
38199 | (vmladavaq_p_u8): Remove. | |
38200 | (vmladavaq_p_u32): Remove. | |
38201 | (vmladavaq_p_u16): Remove. | |
38202 | (vmladavaxq_p_s8): Remove. | |
38203 | (vmladavaxq_p_s32): Remove. | |
38204 | (vmladavaxq_p_s16): Remove. | |
38205 | (vmlsdavaq_p_s8): Remove. | |
38206 | (vmlsdavaq_p_s32): Remove. | |
38207 | (vmlsdavaq_p_s16): Remove. | |
38208 | (vmlsdavaxq_p_s8): Remove. | |
38209 | (vmlsdavaxq_p_s32): Remove. | |
38210 | (vmlsdavaxq_p_s16): Remove. | |
38211 | (__arm_vmladavaq_u8): Remove. | |
38212 | (__arm_vmlsdavaxq_s8): Remove. | |
38213 | (__arm_vmlsdavaq_s8): Remove. | |
38214 | (__arm_vmladavaxq_s8): Remove. | |
38215 | (__arm_vmladavaq_s8): Remove. | |
38216 | (__arm_vmladavaq_u16): Remove. | |
38217 | (__arm_vmlsdavaxq_s16): Remove. | |
38218 | (__arm_vmlsdavaq_s16): Remove. | |
38219 | (__arm_vmladavaxq_s16): Remove. | |
38220 | (__arm_vmladavaq_s16): Remove. | |
38221 | (__arm_vmladavaq_u32): Remove. | |
38222 | (__arm_vmlsdavaxq_s32): Remove. | |
38223 | (__arm_vmlsdavaq_s32): Remove. | |
38224 | (__arm_vmladavaxq_s32): Remove. | |
38225 | (__arm_vmladavaq_s32): Remove. | |
38226 | (__arm_vmladavaq_p_s8): Remove. | |
38227 | (__arm_vmladavaq_p_s32): Remove. | |
38228 | (__arm_vmladavaq_p_s16): Remove. | |
38229 | (__arm_vmladavaq_p_u8): Remove. | |
38230 | (__arm_vmladavaq_p_u32): Remove. | |
38231 | (__arm_vmladavaq_p_u16): Remove. | |
38232 | (__arm_vmladavaxq_p_s8): Remove. | |
38233 | (__arm_vmladavaxq_p_s32): Remove. | |
38234 | (__arm_vmladavaxq_p_s16): Remove. | |
38235 | (__arm_vmlsdavaq_p_s8): Remove. | |
38236 | (__arm_vmlsdavaq_p_s32): Remove. | |
38237 | (__arm_vmlsdavaq_p_s16): Remove. | |
38238 | (__arm_vmlsdavaxq_p_s8): Remove. | |
38239 | (__arm_vmlsdavaxq_p_s32): Remove. | |
38240 | (__arm_vmlsdavaxq_p_s16): Remove. | |
38241 | (__arm_vmladavaq): Remove. | |
38242 | (__arm_vmlsdavaxq): Remove. | |
38243 | (__arm_vmlsdavaq): Remove. | |
38244 | (__arm_vmladavaxq): Remove. | |
38245 | (__arm_vmladavaq_p): Remove. | |
38246 | (__arm_vmladavaxq_p): Remove. | |
38247 | (__arm_vmlsdavaq_p): Remove. | |
38248 | (__arm_vmlsdavaxq_p): Remove. | |
38249 | ||
38250 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38251 | ||
38252 | * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New. | |
38253 | * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New. | |
38254 | ||
38255 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38256 | ||
38257 | * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq) | |
38258 | (vmlsdavq, vmlsdavxq): New. | |
38259 | * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq) | |
38260 | (vmlsdavq, vmlsdavxq): New. | |
38261 | * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq) | |
38262 | (vmlsdavq, vmlsdavxq): New. | |
38263 | * config/arm/arm_mve.h (vmladavq): Remove. | |
38264 | (vmlsdavxq): Remove. | |
38265 | (vmlsdavq): Remove. | |
38266 | (vmladavxq): Remove. | |
38267 | (vmladavq_p): Remove. | |
38268 | (vmlsdavxq_p): Remove. | |
38269 | (vmlsdavq_p): Remove. | |
38270 | (vmladavxq_p): Remove. | |
38271 | (vmladavq_u8): Remove. | |
38272 | (vmlsdavxq_s8): Remove. | |
38273 | (vmlsdavq_s8): Remove. | |
38274 | (vmladavxq_s8): Remove. | |
38275 | (vmladavq_s8): Remove. | |
38276 | (vmladavq_u16): Remove. | |
38277 | (vmlsdavxq_s16): Remove. | |
38278 | (vmlsdavq_s16): Remove. | |
38279 | (vmladavxq_s16): Remove. | |
38280 | (vmladavq_s16): Remove. | |
38281 | (vmladavq_u32): Remove. | |
38282 | (vmlsdavxq_s32): Remove. | |
38283 | (vmlsdavq_s32): Remove. | |
38284 | (vmladavxq_s32): Remove. | |
38285 | (vmladavq_s32): Remove. | |
38286 | (vmladavq_p_u8): Remove. | |
38287 | (vmlsdavxq_p_s8): Remove. | |
38288 | (vmlsdavq_p_s8): Remove. | |
38289 | (vmladavxq_p_s8): Remove. | |
38290 | (vmladavq_p_s8): Remove. | |
38291 | (vmladavq_p_u16): Remove. | |
38292 | (vmlsdavxq_p_s16): Remove. | |
38293 | (vmlsdavq_p_s16): Remove. | |
38294 | (vmladavxq_p_s16): Remove. | |
38295 | (vmladavq_p_s16): Remove. | |
38296 | (vmladavq_p_u32): Remove. | |
38297 | (vmlsdavxq_p_s32): Remove. | |
38298 | (vmlsdavq_p_s32): Remove. | |
38299 | (vmladavxq_p_s32): Remove. | |
38300 | (vmladavq_p_s32): Remove. | |
38301 | (__arm_vmladavq_u8): Remove. | |
38302 | (__arm_vmlsdavxq_s8): Remove. | |
38303 | (__arm_vmlsdavq_s8): Remove. | |
38304 | (__arm_vmladavxq_s8): Remove. | |
38305 | (__arm_vmladavq_s8): Remove. | |
38306 | (__arm_vmladavq_u16): Remove. | |
38307 | (__arm_vmlsdavxq_s16): Remove. | |
38308 | (__arm_vmlsdavq_s16): Remove. | |
38309 | (__arm_vmladavxq_s16): Remove. | |
38310 | (__arm_vmladavq_s16): Remove. | |
38311 | (__arm_vmladavq_u32): Remove. | |
38312 | (__arm_vmlsdavxq_s32): Remove. | |
38313 | (__arm_vmlsdavq_s32): Remove. | |
38314 | (__arm_vmladavxq_s32): Remove. | |
38315 | (__arm_vmladavq_s32): Remove. | |
38316 | (__arm_vmladavq_p_u8): Remove. | |
38317 | (__arm_vmlsdavxq_p_s8): Remove. | |
38318 | (__arm_vmlsdavq_p_s8): Remove. | |
38319 | (__arm_vmladavxq_p_s8): Remove. | |
38320 | (__arm_vmladavq_p_s8): Remove. | |
38321 | (__arm_vmladavq_p_u16): Remove. | |
38322 | (__arm_vmlsdavxq_p_s16): Remove. | |
38323 | (__arm_vmlsdavq_p_s16): Remove. | |
38324 | (__arm_vmladavxq_p_s16): Remove. | |
38325 | (__arm_vmladavq_p_s16): Remove. | |
38326 | (__arm_vmladavq_p_u32): Remove. | |
38327 | (__arm_vmlsdavxq_p_s32): Remove. | |
38328 | (__arm_vmlsdavq_p_s32): Remove. | |
38329 | (__arm_vmladavxq_p_s32): Remove. | |
38330 | (__arm_vmladavq_p_s32): Remove. | |
38331 | (__arm_vmladavq): Remove. | |
38332 | (__arm_vmlsdavxq): Remove. | |
38333 | (__arm_vmlsdavq): Remove. | |
38334 | (__arm_vmladavxq): Remove. | |
38335 | (__arm_vmladavq_p): Remove. | |
38336 | (__arm_vmlsdavxq_p): Remove. | |
38337 | (__arm_vmlsdavq_p): Remove. | |
38338 | (__arm_vmladavxq_p): Remove. | |
38339 | ||
38340 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38341 | ||
38342 | * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P) | |
38343 | (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New. | |
38344 | (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava, | |
38345 | vmlsdavax, vmlsdav, vmlsdavx. | |
38346 | (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S, | |
38347 | VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S, | |
38348 | VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S, | |
38349 | VMLSDAVXQ_S. | |
38350 | * config/arm/mve.md (mve_vmladavq_<supf><mode>) | |
38351 | (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>) | |
38352 | (mve_vmlsdavxq_s<mode>): Merge into ... | |
38353 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38354 | (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>) | |
38355 | (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into | |
38356 | ... | |
38357 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38358 | (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>) | |
38359 | (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ... | |
38360 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
38361 | (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>) | |
38362 | (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into | |
38363 | ... | |
38364 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
38365 | ||
38366 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38367 | ||
38368 | * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New. | |
38369 | * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New. | |
38370 | ||
38371 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38372 | ||
38373 | * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New. | |
38374 | * config/arm/arm-mve-builtins-base.def (vaddlvaq): New. | |
38375 | * config/arm/arm-mve-builtins-base.h (vaddlvaq): New. | |
38376 | * config/arm/arm_mve.h (vaddlvaq): Remove. | |
38377 | (vaddlvaq_p): Remove. | |
38378 | (vaddlvaq_u32): Remove. | |
38379 | (vaddlvaq_s32): Remove. | |
38380 | (vaddlvaq_p_s32): Remove. | |
38381 | (vaddlvaq_p_u32): Remove. | |
38382 | (__arm_vaddlvaq_u32): Remove. | |
38383 | (__arm_vaddlvaq_s32): Remove. | |
38384 | (__arm_vaddlvaq_p_s32): Remove. | |
38385 | (__arm_vaddlvaq_p_u32): Remove. | |
38386 | (__arm_vaddlvaq): Remove. | |
38387 | (__arm_vaddlvaq_p): Remove. | |
38388 | ||
38389 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38390 | ||
38391 | * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New. | |
38392 | * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New. | |
38393 | ||
38394 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38395 | ||
38396 | * config/arm/iterators.md (mve_insn): Add vaddlva. | |
38397 | * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ... | |
38398 | (@mve_<mve_insn>q_<supf>v4si): ... this. | |
38399 | (mve_vaddlvaq_p_<supf>v4si): Rename into ... | |
38400 | (@mve_<mve_insn>q_p_<supf>v4si): ... this. | |
38401 | ||
38402 | 2023-05-11 Uros Bizjak <ubizjak@gmail.com> | |
38403 | ||
38404 | PR target/109807 | |
38405 | * config/i386/i386.cc (ix86_widen_mult_cost): | |
38406 | Handle V4HImode and V2SImode. | |
38407 | ||
38408 | 2023-05-11 Andrew Pinski <apinski@marvell.com> | |
38409 | ||
38410 | * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names | |
38411 | defined by a phi node with more than one uses, allow for the | |
38412 | only uses are in that same defining statement. | |
38413 | ||
38414 | 2023-05-11 Robin Dapp <rdapp@ventanamicro.com> | |
38415 | ||
38416 | * config/riscv/riscv.cc (riscv_const_insns): Add permissible | |
38417 | vector constants. | |
38418 | ||
38419 | 2023-05-11 Pan Li <pan2.li@intel.com> | |
38420 | ||
38421 | * config/riscv/vector.md: Add comments for simplifying to vmset. | |
38422 | ||
38423 | 2023-05-11 Robin Dapp <rdapp@ventanamicro.com> | |
38424 | ||
38425 | * config/riscv/autovec.md (<optab><mode>3): Add scalar shift | |
38426 | pattern. | |
38427 | (v<optab><mode>3): Add vector shift pattern. | |
38428 | * config/riscv/vector-iterators.md: New iterator. | |
38429 | ||
38430 | 2023-05-11 Robin Dapp <rdapp@ventanamicro.com> | |
38431 | ||
38432 | * config/riscv/autovec.md: Use renamed functions. | |
38433 | * config/riscv/riscv-protos.h (emit_vlmax_op): Rename. | |
38434 | (emit_vlmax_reg_op): To this. | |
38435 | (emit_nonvlmax_op): Rename. | |
38436 | (emit_len_op): To this. | |
38437 | (emit_nonvlmax_binop): Rename. | |
38438 | (emit_len_binop): To this. | |
38439 | * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter. | |
38440 | (emit_pred_binop): Remove vlmax_p. | |
38441 | (emit_vlmax_op): Rename. | |
38442 | (emit_vlmax_reg_op): To this. | |
38443 | (emit_nonvlmax_op): Rename. | |
38444 | (emit_len_op): To this. | |
38445 | (emit_nonvlmax_binop): Rename. | |
38446 | (emit_len_binop): To this. | |
38447 | (sew64_scalar_helper): Use renamed functions. | |
38448 | (expand_tuple_move): Use renamed functions. | |
38449 | * config/riscv/riscv.cc (vector_zero_call_used_regs): Use | |
38450 | renamed functions. | |
38451 | * config/riscv/vector.md: Use renamed functions. | |
38452 | ||
38453 | 2023-05-11 Robin Dapp <rdapp@ventanamicro.com> | |
38454 | Michael Collison <collison@rivosinc.com> | |
38455 | ||
38456 | * config/riscv/autovec.md (<optab><mode>3): Add integer binops. | |
38457 | * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare. | |
38458 | * config/riscv/riscv-v.cc (emit_pred_op): New function. | |
38459 | (set_expander_dest_and_mask): New function. | |
38460 | (emit_pred_binop): New function. | |
38461 | (emit_nonvlmax_binop): New function. | |
38462 | ||
38463 | 2023-05-11 Pan Li <pan2.li@intel.com> | |
38464 | ||
38465 | * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR. | |
38466 | * gimple-loop-interchange.cc | |
38467 | (tree_loop_interchange::map_inductions_to_loop): Ditto. | |
38468 | * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto. | |
38469 | * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto. | |
38470 | * tree-ssa-loop-manip.cc (create_iv): Ditto. | |
38471 | (tree_transform_and_unroll_loop): Ditto. | |
38472 | (canonicalize_loop_ivs): Ditto. | |
38473 | * tree-ssa-loop-manip.h (create_iv): Ditto. | |
38474 | * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto. | |
38475 | * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): | |
38476 | Ditto. | |
38477 | (vect_set_loop_condition_normal): Ditto. | |
38478 | * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto. | |
38479 | * tree-vect-stmts.cc (vectorizable_store): Ditto. | |
38480 | (vectorizable_load): Ditto. | |
38481 | ||
38482 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38483 | ||
38484 | * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New. | |
38485 | * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New. | |
38486 | * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New. | |
38487 | * config/arm/arm_mve.h (vmovlbq): Remove. | |
38488 | (vmovltq): Remove. | |
38489 | (vmovlbq_m): Remove. | |
38490 | (vmovltq_m): Remove. | |
38491 | (vmovlbq_x): Remove. | |
38492 | (vmovltq_x): Remove. | |
38493 | (vmovlbq_s8): Remove. | |
38494 | (vmovlbq_s16): Remove. | |
38495 | (vmovltq_s8): Remove. | |
38496 | (vmovltq_s16): Remove. | |
38497 | (vmovltq_u8): Remove. | |
38498 | (vmovltq_u16): Remove. | |
38499 | (vmovlbq_u8): Remove. | |
38500 | (vmovlbq_u16): Remove. | |
38501 | (vmovlbq_m_s8): Remove. | |
38502 | (vmovltq_m_s8): Remove. | |
38503 | (vmovlbq_m_u8): Remove. | |
38504 | (vmovltq_m_u8): Remove. | |
38505 | (vmovlbq_m_s16): Remove. | |
38506 | (vmovltq_m_s16): Remove. | |
38507 | (vmovlbq_m_u16): Remove. | |
38508 | (vmovltq_m_u16): Remove. | |
38509 | (vmovlbq_x_s8): Remove. | |
38510 | (vmovlbq_x_s16): Remove. | |
38511 | (vmovlbq_x_u8): Remove. | |
38512 | (vmovlbq_x_u16): Remove. | |
38513 | (vmovltq_x_s8): Remove. | |
38514 | (vmovltq_x_s16): Remove. | |
38515 | (vmovltq_x_u8): Remove. | |
38516 | (vmovltq_x_u16): Remove. | |
38517 | (__arm_vmovlbq_s8): Remove. | |
38518 | (__arm_vmovlbq_s16): Remove. | |
38519 | (__arm_vmovltq_s8): Remove. | |
38520 | (__arm_vmovltq_s16): Remove. | |
38521 | (__arm_vmovltq_u8): Remove. | |
38522 | (__arm_vmovltq_u16): Remove. | |
38523 | (__arm_vmovlbq_u8): Remove. | |
38524 | (__arm_vmovlbq_u16): Remove. | |
38525 | (__arm_vmovlbq_m_s8): Remove. | |
38526 | (__arm_vmovltq_m_s8): Remove. | |
38527 | (__arm_vmovlbq_m_u8): Remove. | |
38528 | (__arm_vmovltq_m_u8): Remove. | |
38529 | (__arm_vmovlbq_m_s16): Remove. | |
38530 | (__arm_vmovltq_m_s16): Remove. | |
38531 | (__arm_vmovlbq_m_u16): Remove. | |
38532 | (__arm_vmovltq_m_u16): Remove. | |
38533 | (__arm_vmovlbq_x_s8): Remove. | |
38534 | (__arm_vmovlbq_x_s16): Remove. | |
38535 | (__arm_vmovlbq_x_u8): Remove. | |
38536 | (__arm_vmovlbq_x_u16): Remove. | |
38537 | (__arm_vmovltq_x_s8): Remove. | |
38538 | (__arm_vmovltq_x_s16): Remove. | |
38539 | (__arm_vmovltq_x_u8): Remove. | |
38540 | (__arm_vmovltq_x_u16): Remove. | |
38541 | (__arm_vmovlbq): Remove. | |
38542 | (__arm_vmovltq): Remove. | |
38543 | (__arm_vmovlbq_m): Remove. | |
38544 | (__arm_vmovltq_m): Remove. | |
38545 | (__arm_vmovlbq_x): Remove. | |
38546 | (__arm_vmovltq_x): Remove. | |
38547 | ||
38548 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38549 | ||
38550 | * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New. | |
38551 | * config/arm/arm-mve-builtins-shapes.h (unary_widen): New. | |
38552 | ||
38553 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38554 | ||
38555 | * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt. | |
38556 | (VMOVLBQ, VMOVLTQ): Merge into ... | |
38557 | (VMOVLxQ): ... this. | |
38558 | (VMOVLTQ_M, VMOVLBQ_M): Merge into ... | |
38559 | (VMOVLxQ_M): ... this. | |
38560 | * config/arm/mve.md (mve_vmovltq_<supf><mode>) | |
38561 | (mve_vmovlbq_<supf><mode>): Merge into ... | |
38562 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38563 | (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge | |
38564 | into ... | |
38565 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
38566 | ||
38567 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38568 | ||
38569 | * config/arm/arm-mve-builtins-base.cc (vaddlvq): New. | |
38570 | * config/arm/arm-mve-builtins-base.def (vaddlvq): New. | |
38571 | * config/arm/arm-mve-builtins-base.h (vaddlvq): New. | |
38572 | * config/arm/arm-mve-builtins-functions.h | |
38573 | (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq. | |
38574 | * config/arm/arm_mve.h (vaddlvq): Remove. | |
38575 | (vaddlvq_p): Remove. | |
38576 | (vaddlvq_s32): Remove. | |
38577 | (vaddlvq_u32): Remove. | |
38578 | (vaddlvq_p_s32): Remove. | |
38579 | (vaddlvq_p_u32): Remove. | |
38580 | (__arm_vaddlvq_s32): Remove. | |
38581 | (__arm_vaddlvq_u32): Remove. | |
38582 | (__arm_vaddlvq_p_s32): Remove. | |
38583 | (__arm_vaddlvq_p_u32): Remove. | |
38584 | (__arm_vaddlvq): Remove. | |
38585 | (__arm_vaddlvq_p): Remove. | |
38586 | ||
38587 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38588 | ||
38589 | * config/arm/iterators.md (mve_insn): Add vaddlv. | |
38590 | * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ... | |
38591 | (@mve_<mve_insn>q_<supf>v4si): ... this. | |
38592 | (mve_vaddlvq_p_<supf>v4si): Rename into ... | |
38593 | (@mve_<mve_insn>q_p_<supf>v4si): ... this. | |
38594 | ||
38595 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38596 | ||
38597 | * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New. | |
38598 | * config/arm/arm-mve-builtins-shapes.h (unary_acc): New. | |
38599 | ||
38600 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38601 | ||
38602 | * config/arm/arm-mve-builtins-base.cc (vaddvaq): New. | |
38603 | * config/arm/arm-mve-builtins-base.def (vaddvaq): New. | |
38604 | * config/arm/arm-mve-builtins-base.h (vaddvaq): New. | |
38605 | * config/arm/arm_mve.h (vaddvaq): Remove. | |
38606 | (vaddvaq_p): Remove. | |
38607 | (vaddvaq_u8): Remove. | |
38608 | (vaddvaq_s8): Remove. | |
38609 | (vaddvaq_u16): Remove. | |
38610 | (vaddvaq_s16): Remove. | |
38611 | (vaddvaq_u32): Remove. | |
38612 | (vaddvaq_s32): Remove. | |
38613 | (vaddvaq_p_u8): Remove. | |
38614 | (vaddvaq_p_s8): Remove. | |
38615 | (vaddvaq_p_u16): Remove. | |
38616 | (vaddvaq_p_s16): Remove. | |
38617 | (vaddvaq_p_u32): Remove. | |
38618 | (vaddvaq_p_s32): Remove. | |
38619 | (__arm_vaddvaq_u8): Remove. | |
38620 | (__arm_vaddvaq_s8): Remove. | |
38621 | (__arm_vaddvaq_u16): Remove. | |
38622 | (__arm_vaddvaq_s16): Remove. | |
38623 | (__arm_vaddvaq_u32): Remove. | |
38624 | (__arm_vaddvaq_s32): Remove. | |
38625 | (__arm_vaddvaq_p_u8): Remove. | |
38626 | (__arm_vaddvaq_p_s8): Remove. | |
38627 | (__arm_vaddvaq_p_u16): Remove. | |
38628 | (__arm_vaddvaq_p_s16): Remove. | |
38629 | (__arm_vaddvaq_p_u32): Remove. | |
38630 | (__arm_vaddvaq_p_s32): Remove. | |
38631 | (__arm_vaddvaq): Remove. | |
38632 | (__arm_vaddvaq_p): Remove. | |
38633 | ||
38634 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38635 | ||
38636 | * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New. | |
38637 | * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New. | |
38638 | ||
38639 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38640 | ||
38641 | * config/arm/iterators.md (mve_insn): Add vaddva. | |
38642 | * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ... | |
38643 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38644 | (mve_vaddvaq_p_<supf><mode>): Rename into ... | |
38645 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
38646 | ||
38647 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38648 | ||
38649 | * config/arm/arm-mve-builtins-base.cc (vaddvq): New. | |
38650 | * config/arm/arm-mve-builtins-base.def (vaddvq): New. | |
38651 | * config/arm/arm-mve-builtins-base.h (vaddvq): New. | |
38652 | * config/arm/arm_mve.h (vaddvq): Remove. | |
38653 | (vaddvq_p): Remove. | |
38654 | (vaddvq_s8): Remove. | |
38655 | (vaddvq_s16): Remove. | |
38656 | (vaddvq_s32): Remove. | |
38657 | (vaddvq_u8): Remove. | |
38658 | (vaddvq_u16): Remove. | |
38659 | (vaddvq_u32): Remove. | |
38660 | (vaddvq_p_u8): Remove. | |
38661 | (vaddvq_p_s8): Remove. | |
38662 | (vaddvq_p_u16): Remove. | |
38663 | (vaddvq_p_s16): Remove. | |
38664 | (vaddvq_p_u32): Remove. | |
38665 | (vaddvq_p_s32): Remove. | |
38666 | (__arm_vaddvq_s8): Remove. | |
38667 | (__arm_vaddvq_s16): Remove. | |
38668 | (__arm_vaddvq_s32): Remove. | |
38669 | (__arm_vaddvq_u8): Remove. | |
38670 | (__arm_vaddvq_u16): Remove. | |
38671 | (__arm_vaddvq_u32): Remove. | |
38672 | (__arm_vaddvq_p_u8): Remove. | |
38673 | (__arm_vaddvq_p_s8): Remove. | |
38674 | (__arm_vaddvq_p_u16): Remove. | |
38675 | (__arm_vaddvq_p_s16): Remove. | |
38676 | (__arm_vaddvq_p_u32): Remove. | |
38677 | (__arm_vaddvq_p_s32): Remove. | |
38678 | (__arm_vaddvq): Remove. | |
38679 | (__arm_vaddvq_p): Remove. | |
38680 | ||
38681 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38682 | ||
38683 | * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New. | |
38684 | * config/arm/arm-mve-builtins-shapes.h (unary_int32): New. | |
38685 | ||
38686 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38687 | ||
38688 | * config/arm/iterators.md (mve_insn): Add vaddv. | |
38689 | * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ... | |
38690 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38691 | (mve_vaddvq_p_<supf><mode>): Rename into ... | |
38692 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
38693 | * config/arm/vec-common.md: Use gen_mve_q instead of | |
38694 | gen_mve_vaddvq. | |
38695 | ||
38696 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38697 | ||
38698 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New. | |
38699 | (vdupq): New. | |
38700 | * config/arm/arm-mve-builtins-base.def (vdupq): New. | |
38701 | * config/arm/arm-mve-builtins-base.h: (vdupq): New. | |
38702 | * config/arm/arm_mve.h (vdupq_n): Remove. | |
38703 | (vdupq_m): Remove. | |
38704 | (vdupq_n_f16): Remove. | |
38705 | (vdupq_n_f32): Remove. | |
38706 | (vdupq_n_s8): Remove. | |
38707 | (vdupq_n_s16): Remove. | |
38708 | (vdupq_n_s32): Remove. | |
38709 | (vdupq_n_u8): Remove. | |
38710 | (vdupq_n_u16): Remove. | |
38711 | (vdupq_n_u32): Remove. | |
38712 | (vdupq_m_n_u8): Remove. | |
38713 | (vdupq_m_n_s8): Remove. | |
38714 | (vdupq_m_n_u16): Remove. | |
38715 | (vdupq_m_n_s16): Remove. | |
38716 | (vdupq_m_n_u32): Remove. | |
38717 | (vdupq_m_n_s32): Remove. | |
38718 | (vdupq_m_n_f16): Remove. | |
38719 | (vdupq_m_n_f32): Remove. | |
38720 | (vdupq_x_n_s8): Remove. | |
38721 | (vdupq_x_n_s16): Remove. | |
38722 | (vdupq_x_n_s32): Remove. | |
38723 | (vdupq_x_n_u8): Remove. | |
38724 | (vdupq_x_n_u16): Remove. | |
38725 | (vdupq_x_n_u32): Remove. | |
38726 | (vdupq_x_n_f16): Remove. | |
38727 | (vdupq_x_n_f32): Remove. | |
38728 | (__arm_vdupq_n_s8): Remove. | |
38729 | (__arm_vdupq_n_s16): Remove. | |
38730 | (__arm_vdupq_n_s32): Remove. | |
38731 | (__arm_vdupq_n_u8): Remove. | |
38732 | (__arm_vdupq_n_u16): Remove. | |
38733 | (__arm_vdupq_n_u32): Remove. | |
38734 | (__arm_vdupq_m_n_u8): Remove. | |
38735 | (__arm_vdupq_m_n_s8): Remove. | |
38736 | (__arm_vdupq_m_n_u16): Remove. | |
38737 | (__arm_vdupq_m_n_s16): Remove. | |
38738 | (__arm_vdupq_m_n_u32): Remove. | |
38739 | (__arm_vdupq_m_n_s32): Remove. | |
38740 | (__arm_vdupq_x_n_s8): Remove. | |
38741 | (__arm_vdupq_x_n_s16): Remove. | |
38742 | (__arm_vdupq_x_n_s32): Remove. | |
38743 | (__arm_vdupq_x_n_u8): Remove. | |
38744 | (__arm_vdupq_x_n_u16): Remove. | |
38745 | (__arm_vdupq_x_n_u32): Remove. | |
38746 | (__arm_vdupq_n_f16): Remove. | |
38747 | (__arm_vdupq_n_f32): Remove. | |
38748 | (__arm_vdupq_m_n_f16): Remove. | |
38749 | (__arm_vdupq_m_n_f32): Remove. | |
38750 | (__arm_vdupq_x_n_f16): Remove. | |
38751 | (__arm_vdupq_x_n_f32): Remove. | |
38752 | (__arm_vdupq_n): Remove. | |
38753 | (__arm_vdupq_m): Remove. | |
38754 | ||
38755 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38756 | ||
38757 | * config/arm/arm-mve-builtins-shapes.cc (unary_n): New. | |
38758 | * config/arm/arm-mve-builtins-shapes.h (unary_n): New. | |
38759 | ||
38760 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38761 | ||
38762 | * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY) | |
38763 | (MVE_FP_N_VDUPQ_ONLY): New. | |
38764 | (mve_insn): Add vdupq. | |
38765 | * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ... | |
38766 | (@mve_<mve_insn>q_n_f<mode>): ... this. | |
38767 | (mve_vdupq_n_<supf><mode>): Rename into ... | |
38768 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
38769 | (mve_vdupq_m_n_<supf><mode>): Rename into ... | |
38770 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
38771 | (mve_vdupq_m_n_f<mode>): Rename into ... | |
38772 | (@mve_<mve_insn>q_m_n_f<mode>): ... this. | |
38773 | ||
38774 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38775 | ||
38776 | * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q): | |
38777 | New. | |
38778 | * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q) | |
38779 | (vrev64q): New. | |
38780 | * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q) | |
38781 | (vrev64q): New. | |
38782 | * config/arm/arm_mve.h (vrev16q): Remove. | |
38783 | (vrev32q): Remove. | |
38784 | (vrev64q): Remove. | |
38785 | (vrev64q_m): Remove. | |
38786 | (vrev16q_m): Remove. | |
38787 | (vrev32q_m): Remove. | |
38788 | (vrev16q_x): Remove. | |
38789 | (vrev32q_x): Remove. | |
38790 | (vrev64q_x): Remove. | |
38791 | (vrev64q_f16): Remove. | |
38792 | (vrev64q_f32): Remove. | |
38793 | (vrev32q_f16): Remove. | |
38794 | (vrev16q_s8): Remove. | |
38795 | (vrev32q_s8): Remove. | |
38796 | (vrev32q_s16): Remove. | |
38797 | (vrev64q_s8): Remove. | |
38798 | (vrev64q_s16): Remove. | |
38799 | (vrev64q_s32): Remove. | |
38800 | (vrev64q_u8): Remove. | |
38801 | (vrev64q_u16): Remove. | |
38802 | (vrev64q_u32): Remove. | |
38803 | (vrev32q_u8): Remove. | |
38804 | (vrev32q_u16): Remove. | |
38805 | (vrev16q_u8): Remove. | |
38806 | (vrev64q_m_u8): Remove. | |
38807 | (vrev64q_m_s8): Remove. | |
38808 | (vrev64q_m_u16): Remove. | |
38809 | (vrev64q_m_s16): Remove. | |
38810 | (vrev64q_m_u32): Remove. | |
38811 | (vrev64q_m_s32): Remove. | |
38812 | (vrev16q_m_s8): Remove. | |
38813 | (vrev32q_m_f16): Remove. | |
38814 | (vrev16q_m_u8): Remove. | |
38815 | (vrev32q_m_s8): Remove. | |
38816 | (vrev64q_m_f16): Remove. | |
38817 | (vrev32q_m_u8): Remove. | |
38818 | (vrev32q_m_s16): Remove. | |
38819 | (vrev64q_m_f32): Remove. | |
38820 | (vrev32q_m_u16): Remove. | |
38821 | (vrev16q_x_s8): Remove. | |
38822 | (vrev16q_x_u8): Remove. | |
38823 | (vrev32q_x_s8): Remove. | |
38824 | (vrev32q_x_s16): Remove. | |
38825 | (vrev32q_x_u8): Remove. | |
38826 | (vrev32q_x_u16): Remove. | |
38827 | (vrev64q_x_s8): Remove. | |
38828 | (vrev64q_x_s16): Remove. | |
38829 | (vrev64q_x_s32): Remove. | |
38830 | (vrev64q_x_u8): Remove. | |
38831 | (vrev64q_x_u16): Remove. | |
38832 | (vrev64q_x_u32): Remove. | |
38833 | (vrev32q_x_f16): Remove. | |
38834 | (vrev64q_x_f16): Remove. | |
38835 | (vrev64q_x_f32): Remove. | |
38836 | (__arm_vrev16q_s8): Remove. | |
38837 | (__arm_vrev32q_s8): Remove. | |
38838 | (__arm_vrev32q_s16): Remove. | |
38839 | (__arm_vrev64q_s8): Remove. | |
38840 | (__arm_vrev64q_s16): Remove. | |
38841 | (__arm_vrev64q_s32): Remove. | |
38842 | (__arm_vrev64q_u8): Remove. | |
38843 | (__arm_vrev64q_u16): Remove. | |
38844 | (__arm_vrev64q_u32): Remove. | |
38845 | (__arm_vrev32q_u8): Remove. | |
38846 | (__arm_vrev32q_u16): Remove. | |
38847 | (__arm_vrev16q_u8): Remove. | |
38848 | (__arm_vrev64q_m_u8): Remove. | |
38849 | (__arm_vrev64q_m_s8): Remove. | |
38850 | (__arm_vrev64q_m_u16): Remove. | |
38851 | (__arm_vrev64q_m_s16): Remove. | |
38852 | (__arm_vrev64q_m_u32): Remove. | |
38853 | (__arm_vrev64q_m_s32): Remove. | |
38854 | (__arm_vrev16q_m_s8): Remove. | |
38855 | (__arm_vrev16q_m_u8): Remove. | |
38856 | (__arm_vrev32q_m_s8): Remove. | |
38857 | (__arm_vrev32q_m_u8): Remove. | |
38858 | (__arm_vrev32q_m_s16): Remove. | |
38859 | (__arm_vrev32q_m_u16): Remove. | |
38860 | (__arm_vrev16q_x_s8): Remove. | |
38861 | (__arm_vrev16q_x_u8): Remove. | |
38862 | (__arm_vrev32q_x_s8): Remove. | |
38863 | (__arm_vrev32q_x_s16): Remove. | |
38864 | (__arm_vrev32q_x_u8): Remove. | |
38865 | (__arm_vrev32q_x_u16): Remove. | |
38866 | (__arm_vrev64q_x_s8): Remove. | |
38867 | (__arm_vrev64q_x_s16): Remove. | |
38868 | (__arm_vrev64q_x_s32): Remove. | |
38869 | (__arm_vrev64q_x_u8): Remove. | |
38870 | (__arm_vrev64q_x_u16): Remove. | |
38871 | (__arm_vrev64q_x_u32): Remove. | |
38872 | (__arm_vrev64q_f16): Remove. | |
38873 | (__arm_vrev64q_f32): Remove. | |
38874 | (__arm_vrev32q_f16): Remove. | |
38875 | (__arm_vrev32q_m_f16): Remove. | |
38876 | (__arm_vrev64q_m_f16): Remove. | |
38877 | (__arm_vrev64q_m_f32): Remove. | |
38878 | (__arm_vrev32q_x_f16): Remove. | |
38879 | (__arm_vrev64q_x_f16): Remove. | |
38880 | (__arm_vrev64q_x_f32): Remove. | |
38881 | (__arm_vrev16q): Remove. | |
38882 | (__arm_vrev32q): Remove. | |
38883 | (__arm_vrev64q): Remove. | |
38884 | (__arm_vrev64q_m): Remove. | |
38885 | (__arm_vrev16q_m): Remove. | |
38886 | (__arm_vrev32q_m): Remove. | |
38887 | (__arm_vrev16q_x): Remove. | |
38888 | (__arm_vrev32q_x): Remove. | |
38889 | (__arm_vrev64q_x): Remove. | |
38890 | ||
38891 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38892 | ||
38893 | * config/arm/iterators.md (MVE_V8HF, MVE_V16QI) | |
38894 | (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY) | |
38895 | (MVE_FP_M_VREV32Q_ONLY): New iterators. | |
38896 | (mve_insn): Add vrev16q, vrev32q, vrev64q. | |
38897 | * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ... | |
38898 | (@mve_<mve_insn>q_f<mode>): ... this | |
38899 | (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>. | |
38900 | (mve_vrev64q_<supf><mode>): Rename into ... | |
38901 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
38902 | (mve_vrev32q_<supf><mode>): Rename into | |
38903 | @mve_<mve_insn>q_<supf><mode>. | |
38904 | (mve_vrev16q_<supf>v16qi): Rename into | |
38905 | @mve_<mve_insn>q_<supf><mode>. | |
38906 | (mve_vrev64q_m_<supf><mode>): Rename into | |
38907 | @mve_<mve_insn>q_m_<supf><mode>. | |
38908 | (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>. | |
38909 | (mve_vrev32q_m_<supf><mode>): Rename into | |
38910 | @mve_<mve_insn>q_m_<supf><mode>. | |
38911 | (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>. | |
38912 | (mve_vrev16q_m_<supf>v16qi): Rename into | |
38913 | @mve_<mve_insn>q_m_<supf><mode>. | |
38914 | ||
38915 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
38916 | ||
38917 | * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq) | |
38918 | (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New. | |
38919 | * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq) | |
38920 | (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New. | |
38921 | * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq) | |
38922 | (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New. | |
38923 | * config/arm/arm-mve-builtins-functions.h (class | |
38924 | unspec_based_mve_function_exact_insn_vcmp): New. | |
38925 | * config/arm/arm-mve-builtins.cc | |
38926 | (function_instance::has_inactive_argument): Handle vcmp. | |
38927 | * config/arm/arm_mve.h (vcmpneq): Remove. | |
38928 | (vcmphiq): Remove. | |
38929 | (vcmpeqq): Remove. | |
38930 | (vcmpcsq): Remove. | |
38931 | (vcmpltq): Remove. | |
38932 | (vcmpleq): Remove. | |
38933 | (vcmpgtq): Remove. | |
38934 | (vcmpgeq): Remove. | |
38935 | (vcmpneq_m): Remove. | |
38936 | (vcmphiq_m): Remove. | |
38937 | (vcmpeqq_m): Remove. | |
38938 | (vcmpcsq_m): Remove. | |
38939 | (vcmpcsq_m_n): Remove. | |
38940 | (vcmpltq_m): Remove. | |
38941 | (vcmpleq_m): Remove. | |
38942 | (vcmpgtq_m): Remove. | |
38943 | (vcmpgeq_m): Remove. | |
38944 | (vcmpneq_s8): Remove. | |
38945 | (vcmpneq_s16): Remove. | |
38946 | (vcmpneq_s32): Remove. | |
38947 | (vcmpneq_u8): Remove. | |
38948 | (vcmpneq_u16): Remove. | |
38949 | (vcmpneq_u32): Remove. | |
38950 | (vcmpneq_n_u8): Remove. | |
38951 | (vcmphiq_u8): Remove. | |
38952 | (vcmphiq_n_u8): Remove. | |
38953 | (vcmpeqq_u8): Remove. | |
38954 | (vcmpeqq_n_u8): Remove. | |
38955 | (vcmpcsq_u8): Remove. | |
38956 | (vcmpcsq_n_u8): Remove. | |
38957 | (vcmpneq_n_s8): Remove. | |
38958 | (vcmpltq_s8): Remove. | |
38959 | (vcmpltq_n_s8): Remove. | |
38960 | (vcmpleq_s8): Remove. | |
38961 | (vcmpleq_n_s8): Remove. | |
38962 | (vcmpgtq_s8): Remove. | |
38963 | (vcmpgtq_n_s8): Remove. | |
38964 | (vcmpgeq_s8): Remove. | |
38965 | (vcmpgeq_n_s8): Remove. | |
38966 | (vcmpeqq_s8): Remove. | |
38967 | (vcmpeqq_n_s8): Remove. | |
38968 | (vcmpneq_n_u16): Remove. | |
38969 | (vcmphiq_u16): Remove. | |
38970 | (vcmphiq_n_u16): Remove. | |
38971 | (vcmpeqq_u16): Remove. | |
38972 | (vcmpeqq_n_u16): Remove. | |
38973 | (vcmpcsq_u16): Remove. | |
38974 | (vcmpcsq_n_u16): Remove. | |
38975 | (vcmpneq_n_s16): Remove. | |
38976 | (vcmpltq_s16): Remove. | |
38977 | (vcmpltq_n_s16): Remove. | |
38978 | (vcmpleq_s16): Remove. | |
38979 | (vcmpleq_n_s16): Remove. | |
38980 | (vcmpgtq_s16): Remove. | |
38981 | (vcmpgtq_n_s16): Remove. | |
38982 | (vcmpgeq_s16): Remove. | |
38983 | (vcmpgeq_n_s16): Remove. | |
38984 | (vcmpeqq_s16): Remove. | |
38985 | (vcmpeqq_n_s16): Remove. | |
38986 | (vcmpneq_n_u32): Remove. | |
38987 | (vcmphiq_u32): Remove. | |
38988 | (vcmphiq_n_u32): Remove. | |
38989 | (vcmpeqq_u32): Remove. | |
38990 | (vcmpeqq_n_u32): Remove. | |
38991 | (vcmpcsq_u32): Remove. | |
38992 | (vcmpcsq_n_u32): Remove. | |
38993 | (vcmpneq_n_s32): Remove. | |
38994 | (vcmpltq_s32): Remove. | |
38995 | (vcmpltq_n_s32): Remove. | |
38996 | (vcmpleq_s32): Remove. | |
38997 | (vcmpleq_n_s32): Remove. | |
38998 | (vcmpgtq_s32): Remove. | |
38999 | (vcmpgtq_n_s32): Remove. | |
39000 | (vcmpgeq_s32): Remove. | |
39001 | (vcmpgeq_n_s32): Remove. | |
39002 | (vcmpeqq_s32): Remove. | |
39003 | (vcmpeqq_n_s32): Remove. | |
39004 | (vcmpneq_n_f16): Remove. | |
39005 | (vcmpneq_f16): Remove. | |
39006 | (vcmpltq_n_f16): Remove. | |
39007 | (vcmpltq_f16): Remove. | |
39008 | (vcmpleq_n_f16): Remove. | |
39009 | (vcmpleq_f16): Remove. | |
39010 | (vcmpgtq_n_f16): Remove. | |
39011 | (vcmpgtq_f16): Remove. | |
39012 | (vcmpgeq_n_f16): Remove. | |
39013 | (vcmpgeq_f16): Remove. | |
39014 | (vcmpeqq_n_f16): Remove. | |
39015 | (vcmpeqq_f16): Remove. | |
39016 | (vcmpneq_n_f32): Remove. | |
39017 | (vcmpneq_f32): Remove. | |
39018 | (vcmpltq_n_f32): Remove. | |
39019 | (vcmpltq_f32): Remove. | |
39020 | (vcmpleq_n_f32): Remove. | |
39021 | (vcmpleq_f32): Remove. | |
39022 | (vcmpgtq_n_f32): Remove. | |
39023 | (vcmpgtq_f32): Remove. | |
39024 | (vcmpgeq_n_f32): Remove. | |
39025 | (vcmpgeq_f32): Remove. | |
39026 | (vcmpeqq_n_f32): Remove. | |
39027 | (vcmpeqq_f32): Remove. | |
39028 | (vcmpeqq_m_f16): Remove. | |
39029 | (vcmpeqq_m_f32): Remove. | |
39030 | (vcmpneq_m_u8): Remove. | |
39031 | (vcmpneq_m_n_u8): Remove. | |
39032 | (vcmphiq_m_u8): Remove. | |
39033 | (vcmphiq_m_n_u8): Remove. | |
39034 | (vcmpeqq_m_u8): Remove. | |
39035 | (vcmpeqq_m_n_u8): Remove. | |
39036 | (vcmpcsq_m_u8): Remove. | |
39037 | (vcmpcsq_m_n_u8): Remove. | |
39038 | (vcmpneq_m_s8): Remove. | |
39039 | (vcmpneq_m_n_s8): Remove. | |
39040 | (vcmpltq_m_s8): Remove. | |
39041 | (vcmpltq_m_n_s8): Remove. | |
39042 | (vcmpleq_m_s8): Remove. | |
39043 | (vcmpleq_m_n_s8): Remove. | |
39044 | (vcmpgtq_m_s8): Remove. | |
39045 | (vcmpgtq_m_n_s8): Remove. | |
39046 | (vcmpgeq_m_s8): Remove. | |
39047 | (vcmpgeq_m_n_s8): Remove. | |
39048 | (vcmpeqq_m_s8): Remove. | |
39049 | (vcmpeqq_m_n_s8): Remove. | |
39050 | (vcmpneq_m_u16): Remove. | |
39051 | (vcmpneq_m_n_u16): Remove. | |
39052 | (vcmphiq_m_u16): Remove. | |
39053 | (vcmphiq_m_n_u16): Remove. | |
39054 | (vcmpeqq_m_u16): Remove. | |
39055 | (vcmpeqq_m_n_u16): Remove. | |
39056 | (vcmpcsq_m_u16): Remove. | |
39057 | (vcmpcsq_m_n_u16): Remove. | |
39058 | (vcmpneq_m_s16): Remove. | |
39059 | (vcmpneq_m_n_s16): Remove. | |
39060 | (vcmpltq_m_s16): Remove. | |
39061 | (vcmpltq_m_n_s16): Remove. | |
39062 | (vcmpleq_m_s16): Remove. | |
39063 | (vcmpleq_m_n_s16): Remove. | |
39064 | (vcmpgtq_m_s16): Remove. | |
39065 | (vcmpgtq_m_n_s16): Remove. | |
39066 | (vcmpgeq_m_s16): Remove. | |
39067 | (vcmpgeq_m_n_s16): Remove. | |
39068 | (vcmpeqq_m_s16): Remove. | |
39069 | (vcmpeqq_m_n_s16): Remove. | |
39070 | (vcmpneq_m_u32): Remove. | |
39071 | (vcmpneq_m_n_u32): Remove. | |
39072 | (vcmphiq_m_u32): Remove. | |
39073 | (vcmphiq_m_n_u32): Remove. | |
39074 | (vcmpeqq_m_u32): Remove. | |
39075 | (vcmpeqq_m_n_u32): Remove. | |
39076 | (vcmpcsq_m_u32): Remove. | |
39077 | (vcmpcsq_m_n_u32): Remove. | |
39078 | (vcmpneq_m_s32): Remove. | |
39079 | (vcmpneq_m_n_s32): Remove. | |
39080 | (vcmpltq_m_s32): Remove. | |
39081 | (vcmpltq_m_n_s32): Remove. | |
39082 | (vcmpleq_m_s32): Remove. | |
39083 | (vcmpleq_m_n_s32): Remove. | |
39084 | (vcmpgtq_m_s32): Remove. | |
39085 | (vcmpgtq_m_n_s32): Remove. | |
39086 | (vcmpgeq_m_s32): Remove. | |
39087 | (vcmpgeq_m_n_s32): Remove. | |
39088 | (vcmpeqq_m_s32): Remove. | |
39089 | (vcmpeqq_m_n_s32): Remove. | |
39090 | (vcmpeqq_m_n_f16): Remove. | |
39091 | (vcmpgeq_m_f16): Remove. | |
39092 | (vcmpgeq_m_n_f16): Remove. | |
39093 | (vcmpgtq_m_f16): Remove. | |
39094 | (vcmpgtq_m_n_f16): Remove. | |
39095 | (vcmpleq_m_f16): Remove. | |
39096 | (vcmpleq_m_n_f16): Remove. | |
39097 | (vcmpltq_m_f16): Remove. | |
39098 | (vcmpltq_m_n_f16): Remove. | |
39099 | (vcmpneq_m_f16): Remove. | |
39100 | (vcmpneq_m_n_f16): Remove. | |
39101 | (vcmpeqq_m_n_f32): Remove. | |
39102 | (vcmpgeq_m_f32): Remove. | |
39103 | (vcmpgeq_m_n_f32): Remove. | |
39104 | (vcmpgtq_m_f32): Remove. | |
39105 | (vcmpgtq_m_n_f32): Remove. | |
39106 | (vcmpleq_m_f32): Remove. | |
39107 | (vcmpleq_m_n_f32): Remove. | |
39108 | (vcmpltq_m_f32): Remove. | |
39109 | (vcmpltq_m_n_f32): Remove. | |
39110 | (vcmpneq_m_f32): Remove. | |
39111 | (vcmpneq_m_n_f32): Remove. | |
39112 | (__arm_vcmpneq_s8): Remove. | |
39113 | (__arm_vcmpneq_s16): Remove. | |
39114 | (__arm_vcmpneq_s32): Remove. | |
39115 | (__arm_vcmpneq_u8): Remove. | |
39116 | (__arm_vcmpneq_u16): Remove. | |
39117 | (__arm_vcmpneq_u32): Remove. | |
39118 | (__arm_vcmpneq_n_u8): Remove. | |
39119 | (__arm_vcmphiq_u8): Remove. | |
39120 | (__arm_vcmphiq_n_u8): Remove. | |
39121 | (__arm_vcmpeqq_u8): Remove. | |
39122 | (__arm_vcmpeqq_n_u8): Remove. | |
39123 | (__arm_vcmpcsq_u8): Remove. | |
39124 | (__arm_vcmpcsq_n_u8): Remove. | |
39125 | (__arm_vcmpneq_n_s8): Remove. | |
39126 | (__arm_vcmpltq_s8): Remove. | |
39127 | (__arm_vcmpltq_n_s8): Remove. | |
39128 | (__arm_vcmpleq_s8): Remove. | |
39129 | (__arm_vcmpleq_n_s8): Remove. | |
39130 | (__arm_vcmpgtq_s8): Remove. | |
39131 | (__arm_vcmpgtq_n_s8): Remove. | |
39132 | (__arm_vcmpgeq_s8): Remove. | |
39133 | (__arm_vcmpgeq_n_s8): Remove. | |
39134 | (__arm_vcmpeqq_s8): Remove. | |
39135 | (__arm_vcmpeqq_n_s8): Remove. | |
39136 | (__arm_vcmpneq_n_u16): Remove. | |
39137 | (__arm_vcmphiq_u16): Remove. | |
39138 | (__arm_vcmphiq_n_u16): Remove. | |
39139 | (__arm_vcmpeqq_u16): Remove. | |
39140 | (__arm_vcmpeqq_n_u16): Remove. | |
39141 | (__arm_vcmpcsq_u16): Remove. | |
39142 | (__arm_vcmpcsq_n_u16): Remove. | |
39143 | (__arm_vcmpneq_n_s16): Remove. | |
39144 | (__arm_vcmpltq_s16): Remove. | |
39145 | (__arm_vcmpltq_n_s16): Remove. | |
39146 | (__arm_vcmpleq_s16): Remove. | |
39147 | (__arm_vcmpleq_n_s16): Remove. | |
39148 | (__arm_vcmpgtq_s16): Remove. | |
39149 | (__arm_vcmpgtq_n_s16): Remove. | |
39150 | (__arm_vcmpgeq_s16): Remove. | |
39151 | (__arm_vcmpgeq_n_s16): Remove. | |
39152 | (__arm_vcmpeqq_s16): Remove. | |
39153 | (__arm_vcmpeqq_n_s16): Remove. | |
39154 | (__arm_vcmpneq_n_u32): Remove. | |
39155 | (__arm_vcmphiq_u32): Remove. | |
39156 | (__arm_vcmphiq_n_u32): Remove. | |
39157 | (__arm_vcmpeqq_u32): Remove. | |
39158 | (__arm_vcmpeqq_n_u32): Remove. | |
39159 | (__arm_vcmpcsq_u32): Remove. | |
39160 | (__arm_vcmpcsq_n_u32): Remove. | |
39161 | (__arm_vcmpneq_n_s32): Remove. | |
39162 | (__arm_vcmpltq_s32): Remove. | |
39163 | (__arm_vcmpltq_n_s32): Remove. | |
39164 | (__arm_vcmpleq_s32): Remove. | |
39165 | (__arm_vcmpleq_n_s32): Remove. | |
39166 | (__arm_vcmpgtq_s32): Remove. | |
39167 | (__arm_vcmpgtq_n_s32): Remove. | |
39168 | (__arm_vcmpgeq_s32): Remove. | |
39169 | (__arm_vcmpgeq_n_s32): Remove. | |
39170 | (__arm_vcmpeqq_s32): Remove. | |
39171 | (__arm_vcmpeqq_n_s32): Remove. | |
39172 | (__arm_vcmpneq_m_u8): Remove. | |
39173 | (__arm_vcmpneq_m_n_u8): Remove. | |
39174 | (__arm_vcmphiq_m_u8): Remove. | |
39175 | (__arm_vcmphiq_m_n_u8): Remove. | |
39176 | (__arm_vcmpeqq_m_u8): Remove. | |
39177 | (__arm_vcmpeqq_m_n_u8): Remove. | |
39178 | (__arm_vcmpcsq_m_u8): Remove. | |
39179 | (__arm_vcmpcsq_m_n_u8): Remove. | |
39180 | (__arm_vcmpneq_m_s8): Remove. | |
39181 | (__arm_vcmpneq_m_n_s8): Remove. | |
39182 | (__arm_vcmpltq_m_s8): Remove. | |
39183 | (__arm_vcmpltq_m_n_s8): Remove. | |
39184 | (__arm_vcmpleq_m_s8): Remove. | |
39185 | (__arm_vcmpleq_m_n_s8): Remove. | |
39186 | (__arm_vcmpgtq_m_s8): Remove. | |
39187 | (__arm_vcmpgtq_m_n_s8): Remove. | |
39188 | (__arm_vcmpgeq_m_s8): Remove. | |
39189 | (__arm_vcmpgeq_m_n_s8): Remove. | |
39190 | (__arm_vcmpeqq_m_s8): Remove. | |
39191 | (__arm_vcmpeqq_m_n_s8): Remove. | |
39192 | (__arm_vcmpneq_m_u16): Remove. | |
39193 | (__arm_vcmpneq_m_n_u16): Remove. | |
39194 | (__arm_vcmphiq_m_u16): Remove. | |
39195 | (__arm_vcmphiq_m_n_u16): Remove. | |
39196 | (__arm_vcmpeqq_m_u16): Remove. | |
39197 | (__arm_vcmpeqq_m_n_u16): Remove. | |
39198 | (__arm_vcmpcsq_m_u16): Remove. | |
39199 | (__arm_vcmpcsq_m_n_u16): Remove. | |
39200 | (__arm_vcmpneq_m_s16): Remove. | |
39201 | (__arm_vcmpneq_m_n_s16): Remove. | |
39202 | (__arm_vcmpltq_m_s16): Remove. | |
39203 | (__arm_vcmpltq_m_n_s16): Remove. | |
39204 | (__arm_vcmpleq_m_s16): Remove. | |
39205 | (__arm_vcmpleq_m_n_s16): Remove. | |
39206 | (__arm_vcmpgtq_m_s16): Remove. | |
39207 | (__arm_vcmpgtq_m_n_s16): Remove. | |
39208 | (__arm_vcmpgeq_m_s16): Remove. | |
39209 | (__arm_vcmpgeq_m_n_s16): Remove. | |
39210 | (__arm_vcmpeqq_m_s16): Remove. | |
39211 | (__arm_vcmpeqq_m_n_s16): Remove. | |
39212 | (__arm_vcmpneq_m_u32): Remove. | |
39213 | (__arm_vcmpneq_m_n_u32): Remove. | |
39214 | (__arm_vcmphiq_m_u32): Remove. | |
39215 | (__arm_vcmphiq_m_n_u32): Remove. | |
39216 | (__arm_vcmpeqq_m_u32): Remove. | |
39217 | (__arm_vcmpeqq_m_n_u32): Remove. | |
39218 | (__arm_vcmpcsq_m_u32): Remove. | |
39219 | (__arm_vcmpcsq_m_n_u32): Remove. | |
39220 | (__arm_vcmpneq_m_s32): Remove. | |
39221 | (__arm_vcmpneq_m_n_s32): Remove. | |
39222 | (__arm_vcmpltq_m_s32): Remove. | |
39223 | (__arm_vcmpltq_m_n_s32): Remove. | |
39224 | (__arm_vcmpleq_m_s32): Remove. | |
39225 | (__arm_vcmpleq_m_n_s32): Remove. | |
39226 | (__arm_vcmpgtq_m_s32): Remove. | |
39227 | (__arm_vcmpgtq_m_n_s32): Remove. | |
39228 | (__arm_vcmpgeq_m_s32): Remove. | |
39229 | (__arm_vcmpgeq_m_n_s32): Remove. | |
39230 | (__arm_vcmpeqq_m_s32): Remove. | |
39231 | (__arm_vcmpeqq_m_n_s32): Remove. | |
39232 | (__arm_vcmpneq_n_f16): Remove. | |
39233 | (__arm_vcmpneq_f16): Remove. | |
39234 | (__arm_vcmpltq_n_f16): Remove. | |
39235 | (__arm_vcmpltq_f16): Remove. | |
39236 | (__arm_vcmpleq_n_f16): Remove. | |
39237 | (__arm_vcmpleq_f16): Remove. | |
39238 | (__arm_vcmpgtq_n_f16): Remove. | |
39239 | (__arm_vcmpgtq_f16): Remove. | |
39240 | (__arm_vcmpgeq_n_f16): Remove. | |
39241 | (__arm_vcmpgeq_f16): Remove. | |
39242 | (__arm_vcmpeqq_n_f16): Remove. | |
39243 | (__arm_vcmpeqq_f16): Remove. | |
39244 | (__arm_vcmpneq_n_f32): Remove. | |
39245 | (__arm_vcmpneq_f32): Remove. | |
39246 | (__arm_vcmpltq_n_f32): Remove. | |
39247 | (__arm_vcmpltq_f32): Remove. | |
39248 | (__arm_vcmpleq_n_f32): Remove. | |
39249 | (__arm_vcmpleq_f32): Remove. | |
39250 | (__arm_vcmpgtq_n_f32): Remove. | |
39251 | (__arm_vcmpgtq_f32): Remove. | |
39252 | (__arm_vcmpgeq_n_f32): Remove. | |
39253 | (__arm_vcmpgeq_f32): Remove. | |
39254 | (__arm_vcmpeqq_n_f32): Remove. | |
39255 | (__arm_vcmpeqq_f32): Remove. | |
39256 | (__arm_vcmpeqq_m_f16): Remove. | |
39257 | (__arm_vcmpeqq_m_f32): Remove. | |
39258 | (__arm_vcmpeqq_m_n_f16): Remove. | |
39259 | (__arm_vcmpgeq_m_f16): Remove. | |
39260 | (__arm_vcmpgeq_m_n_f16): Remove. | |
39261 | (__arm_vcmpgtq_m_f16): Remove. | |
39262 | (__arm_vcmpgtq_m_n_f16): Remove. | |
39263 | (__arm_vcmpleq_m_f16): Remove. | |
39264 | (__arm_vcmpleq_m_n_f16): Remove. | |
39265 | (__arm_vcmpltq_m_f16): Remove. | |
39266 | (__arm_vcmpltq_m_n_f16): Remove. | |
39267 | (__arm_vcmpneq_m_f16): Remove. | |
39268 | (__arm_vcmpneq_m_n_f16): Remove. | |
39269 | (__arm_vcmpeqq_m_n_f32): Remove. | |
39270 | (__arm_vcmpgeq_m_f32): Remove. | |
39271 | (__arm_vcmpgeq_m_n_f32): Remove. | |
39272 | (__arm_vcmpgtq_m_f32): Remove. | |
39273 | (__arm_vcmpgtq_m_n_f32): Remove. | |
39274 | (__arm_vcmpleq_m_f32): Remove. | |
39275 | (__arm_vcmpleq_m_n_f32): Remove. | |
39276 | (__arm_vcmpltq_m_f32): Remove. | |
39277 | (__arm_vcmpltq_m_n_f32): Remove. | |
39278 | (__arm_vcmpneq_m_f32): Remove. | |
39279 | (__arm_vcmpneq_m_n_f32): Remove. | |
39280 | (__arm_vcmpneq): Remove. | |
39281 | (__arm_vcmphiq): Remove. | |
39282 | (__arm_vcmpeqq): Remove. | |
39283 | (__arm_vcmpcsq): Remove. | |
39284 | (__arm_vcmpltq): Remove. | |
39285 | (__arm_vcmpleq): Remove. | |
39286 | (__arm_vcmpgtq): Remove. | |
39287 | (__arm_vcmpgeq): Remove. | |
39288 | (__arm_vcmpneq_m): Remove. | |
39289 | (__arm_vcmphiq_m): Remove. | |
39290 | (__arm_vcmpeqq_m): Remove. | |
39291 | (__arm_vcmpcsq_m): Remove. | |
39292 | (__arm_vcmpltq_m): Remove. | |
39293 | (__arm_vcmpleq_m): Remove. | |
39294 | (__arm_vcmpgtq_m): Remove. | |
39295 | (__arm_vcmpgeq_m): Remove. | |
39296 | ||
39297 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
39298 | ||
39299 | * config/arm/arm-mve-builtins-shapes.cc (cmp): New. | |
39300 | * config/arm/arm-mve-builtins-shapes.h (cmp): New. | |
39301 | ||
39302 | 2023-05-11 Christophe Lyon <christophe.lyon@arm.com> | |
39303 | ||
39304 | * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N) | |
39305 | (MVE_CMP_M_N_F, mve_cmp_op1): New. | |
39306 | (isu): Add VCMP* | |
39307 | (supf): Likewise. | |
39308 | * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ... | |
39309 | (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this. | |
39310 | (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>) | |
39311 | (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>) | |
39312 | (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ... | |
39313 | (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this. | |
39314 | (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>) | |
39315 | (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>) | |
39316 | (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>) | |
39317 | (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into | |
39318 | ... | |
39319 | (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this. | |
39320 | (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>) | |
39321 | (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>) | |
39322 | (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>) | |
39323 | (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge | |
39324 | into ... | |
39325 | (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this. | |
39326 | (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>) | |
39327 | (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>) | |
39328 | (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ... | |
39329 | (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this. | |
39330 | ||
39331 | 2023-05-11 Roger Sayle <roger@nextmovesoftware.com> | |
39332 | ||
39333 | * match.pd <popcount optimizations>: Simplify popcount(X|Y) + | |
39334 | popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify | |
39335 | popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and | |
39336 | vice versa. | |
39337 | ||
39338 | 2023-05-11 Roger Sayle <roger@nextmovesoftware.com> | |
39339 | ||
39340 | * match.pd <popcount optimizations>: Simplify popcount(bswap(x)) | |
39341 | as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x). | |
39342 | <parity optimizations>: Simplify parity(bswap(x)) as parity(x). | |
39343 | Simplify parity(rotate(x,y)) as parity(x). | |
39344 | ||
39345 | 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
39346 | ||
39347 | * config/riscv/autovec.md (@vec_series<mode>): New pattern | |
39348 | * config/riscv/riscv-protos.h (expand_vec_series): New function. | |
39349 | * config/riscv/riscv-v.cc (emit_binop): Ditto. | |
39350 | (emit_index_op): Ditto. | |
39351 | (expand_vec_series): Ditto. | |
39352 | (expand_const_vector): Add series vector handling. | |
39353 | * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing. | |
39354 | ||
39355 | 2023-05-10 Roger Sayle <roger@nextmovesoftware.com> | |
39356 | ||
39357 | * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred | |
39358 | [(const_int 0)] idiom, instead of [(clobber (const_int 0))]. | |
39359 | (*concat<mode><dwi>3_2): Likewise. | |
39360 | (*concat<mode><dwi>3_3): Likewise. | |
39361 | (*concat<mode><dwi>3_4): Likewise. | |
39362 | (*concat<mode><dwi>3_5): Likewise. | |
39363 | (*concat<mode><dwi>3_6): Likewise. | |
39364 | (*concat<mode><dwi>3_7): Likewise. | |
39365 | ||
39366 | 2023-05-10 Uros Bizjak <ubizjak@gmail.com> | |
39367 | ||
39368 | PR target/92658 | |
39369 | * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern. | |
39370 | (<insn>v4qiv4hi2): New expander. | |
39371 | (<insn>v2hiv2si2): Ditto. | |
39372 | (<insn>v2qiv2si2): Ditto. | |
39373 | (<insn>v2qiv2hi2): Ditto. | |
39374 | ||
39375 | 2023-05-10 Jeff Law <jlaw@ventanamicro> | |
39376 | ||
39377 | * config/h8300/constraints.md (Q): Make this a special memory | |
39378 | constraint. | |
39379 | (Zz): Similarly. | |
39380 | ||
39381 | 2023-05-10 Jakub Jelinek <jakub@redhat.com> | |
39382 | ||
39383 | PR fortran/109788 | |
39384 | * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t) | |
39385 | if t is void_list_node. | |
39386 | ||
39387 | 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
39388 | ||
39389 | * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete. | |
39390 | (aarch64_sqmovun<mode>_insn_be): Delete. | |
39391 | (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn. | |
39392 | (aarch64_sqmovun<mode>): Delete expander. | |
39393 | ||
39394 | 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
39395 | ||
39396 | PR target/99195 | |
39397 | * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>): | |
39398 | Rename to... | |
39399 | (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This. | |
39400 | (aarch64_rev<REVERSE:rev_op><mode>): Rename to... | |
39401 | (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This. | |
39402 | ||
39403 | 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
39404 | ||
39405 | PR target/99195 | |
39406 | * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>): | |
39407 | Rename to... | |
39408 | (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This. | |
39409 | (aarch64_<sur>qadd<mode>): Rename to... | |
39410 | (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This. | |
39411 | ||
39412 | 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
39413 | ||
39414 | * config/aarch64/aarch64-simd.md | |
39415 | (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete. | |
39416 | (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete. | |
39417 | (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn. | |
39418 | (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander. | |
39419 | ||
39420 | 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
39421 | ||
39422 | PR target/99195 | |
39423 | * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete. | |
39424 | (aarch64_xtn<mode>_insn_be): Likewise. | |
39425 | (trunc<mode><Vnarrowq>2): Rename to... | |
39426 | (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This. | |
39427 | (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL. | |
39428 | (aarch64_<su>qmovn<mode>): Likewise. | |
39429 | (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn. | |
39430 | (aarch64_<su>qmovn<mode>_insn_le): Delete. | |
39431 | (aarch64_<su>qmovn<mode>_insn_be): Likewise. | |
39432 | ||
39433 | 2023-05-10 Li Xu <xuli1@eswincomputing.com> | |
39434 | ||
39435 | * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s | |
39436 | intruction replace null avl with (const_int 0). | |
39437 | ||
39438 | 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
39439 | ||
39440 | * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix | |
39441 | incorrect codes. | |
39442 | ||
39443 | 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
39444 | ||
39445 | PR target/109773 | |
39446 | * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function. | |
39447 | (source_equal_p): Fix dead loop in vsetvl avl checking. | |
39448 | ||
39449 | 2023-05-10 Hans-Peter Nilsson <hp@axis.com> | |
39450 | ||
39451 | * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode | |
39452 | of modeadjusted_dccr. | |
39453 | ||
39454 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39455 | ||
39456 | * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New. | |
39457 | * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New. | |
39458 | * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New. | |
39459 | * config/arm/arm-mve-builtins.cc | |
39460 | (function_instance::has_inactive_argument): Handle vmaxaq and | |
39461 | vminaq. | |
39462 | * config/arm/arm_mve.h (vminaq): Remove. | |
39463 | (vmaxaq): Remove. | |
39464 | (vminaq_m): Remove. | |
39465 | (vmaxaq_m): Remove. | |
39466 | (vminaq_s8): Remove. | |
39467 | (vmaxaq_s8): Remove. | |
39468 | (vminaq_s16): Remove. | |
39469 | (vmaxaq_s16): Remove. | |
39470 | (vminaq_s32): Remove. | |
39471 | (vmaxaq_s32): Remove. | |
39472 | (vminaq_m_s8): Remove. | |
39473 | (vmaxaq_m_s8): Remove. | |
39474 | (vminaq_m_s16): Remove. | |
39475 | (vmaxaq_m_s16): Remove. | |
39476 | (vminaq_m_s32): Remove. | |
39477 | (vmaxaq_m_s32): Remove. | |
39478 | (__arm_vminaq_s8): Remove. | |
39479 | (__arm_vmaxaq_s8): Remove. | |
39480 | (__arm_vminaq_s16): Remove. | |
39481 | (__arm_vmaxaq_s16): Remove. | |
39482 | (__arm_vminaq_s32): Remove. | |
39483 | (__arm_vmaxaq_s32): Remove. | |
39484 | (__arm_vminaq_m_s8): Remove. | |
39485 | (__arm_vmaxaq_m_s8): Remove. | |
39486 | (__arm_vminaq_m_s16): Remove. | |
39487 | (__arm_vmaxaq_m_s16): Remove. | |
39488 | (__arm_vminaq_m_s32): Remove. | |
39489 | (__arm_vmaxaq_m_s32): Remove. | |
39490 | (__arm_vminaq): Remove. | |
39491 | (__arm_vmaxaq): Remove. | |
39492 | (__arm_vminaq_m): Remove. | |
39493 | (__arm_vmaxaq_m): Remove. | |
39494 | ||
39495 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39496 | ||
39497 | * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M): | |
39498 | New. | |
39499 | (mve_insn): Add vmaxa, vmina. | |
39500 | (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S. | |
39501 | * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>): | |
39502 | Merge into ... | |
39503 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
39504 | (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ... | |
39505 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
39506 | ||
39507 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39508 | ||
39509 | * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New. | |
39510 | * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New. | |
39511 | ||
39512 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39513 | ||
39514 | * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New. | |
39515 | * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New. | |
39516 | * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New. | |
39517 | * config/arm/arm-mve-builtins.cc | |
39518 | (function_instance::has_inactive_argument): Handle vmaxnmaq and | |
39519 | vminnmaq. | |
39520 | * config/arm/arm_mve.h (vminnmaq): Remove. | |
39521 | (vmaxnmaq): Remove. | |
39522 | (vmaxnmaq_m): Remove. | |
39523 | (vminnmaq_m): Remove. | |
39524 | (vminnmaq_f16): Remove. | |
39525 | (vmaxnmaq_f16): Remove. | |
39526 | (vminnmaq_f32): Remove. | |
39527 | (vmaxnmaq_f32): Remove. | |
39528 | (vmaxnmaq_m_f16): Remove. | |
39529 | (vminnmaq_m_f16): Remove. | |
39530 | (vmaxnmaq_m_f32): Remove. | |
39531 | (vminnmaq_m_f32): Remove. | |
39532 | (__arm_vminnmaq_f16): Remove. | |
39533 | (__arm_vmaxnmaq_f16): Remove. | |
39534 | (__arm_vminnmaq_f32): Remove. | |
39535 | (__arm_vmaxnmaq_f32): Remove. | |
39536 | (__arm_vmaxnmaq_m_f16): Remove. | |
39537 | (__arm_vminnmaq_m_f16): Remove. | |
39538 | (__arm_vmaxnmaq_m_f32): Remove. | |
39539 | (__arm_vminnmaq_m_f32): Remove. | |
39540 | (__arm_vminnmaq): Remove. | |
39541 | (__arm_vmaxnmaq): Remove. | |
39542 | (__arm_vmaxnmaq_m): Remove. | |
39543 | (__arm_vminnmaq_m): Remove. | |
39544 | ||
39545 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39546 | ||
39547 | * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ) | |
39548 | (MVE_VMAXNMA_VMINNMAQ_M): New. | |
39549 | (mve_insn): Add vmaxnma, vminnma. | |
39550 | * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>): | |
39551 | Merge into ... | |
39552 | (@mve_<mve_insn>q_f<mode>): ... this. | |
39553 | (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ... | |
39554 | (@mve_<mve_insn>q_m_f<mode>): ... this. | |
39555 | ||
39556 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39557 | ||
39558 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New. | |
39559 | (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New. | |
39560 | * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq) | |
39561 | (vminnmavq, vminnmvq): New. | |
39562 | * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq) | |
39563 | (vminnmavq, vminnmvq): New. | |
39564 | * config/arm/arm_mve.h (vminnmvq): Remove. | |
39565 | (vminnmavq): Remove. | |
39566 | (vmaxnmvq): Remove. | |
39567 | (vmaxnmavq): Remove. | |
39568 | (vmaxnmavq_p): Remove. | |
39569 | (vmaxnmvq_p): Remove. | |
39570 | (vminnmavq_p): Remove. | |
39571 | (vminnmvq_p): Remove. | |
39572 | (vminnmvq_f16): Remove. | |
39573 | (vminnmavq_f16): Remove. | |
39574 | (vmaxnmvq_f16): Remove. | |
39575 | (vmaxnmavq_f16): Remove. | |
39576 | (vminnmvq_f32): Remove. | |
39577 | (vminnmavq_f32): Remove. | |
39578 | (vmaxnmvq_f32): Remove. | |
39579 | (vmaxnmavq_f32): Remove. | |
39580 | (vmaxnmavq_p_f16): Remove. | |
39581 | (vmaxnmvq_p_f16): Remove. | |
39582 | (vminnmavq_p_f16): Remove. | |
39583 | (vminnmvq_p_f16): Remove. | |
39584 | (vmaxnmavq_p_f32): Remove. | |
39585 | (vmaxnmvq_p_f32): Remove. | |
39586 | (vminnmavq_p_f32): Remove. | |
39587 | (vminnmvq_p_f32): Remove. | |
39588 | (__arm_vminnmvq_f16): Remove. | |
39589 | (__arm_vminnmavq_f16): Remove. | |
39590 | (__arm_vmaxnmvq_f16): Remove. | |
39591 | (__arm_vmaxnmavq_f16): Remove. | |
39592 | (__arm_vminnmvq_f32): Remove. | |
39593 | (__arm_vminnmavq_f32): Remove. | |
39594 | (__arm_vmaxnmvq_f32): Remove. | |
39595 | (__arm_vmaxnmavq_f32): Remove. | |
39596 | (__arm_vmaxnmavq_p_f16): Remove. | |
39597 | (__arm_vmaxnmvq_p_f16): Remove. | |
39598 | (__arm_vminnmavq_p_f16): Remove. | |
39599 | (__arm_vminnmvq_p_f16): Remove. | |
39600 | (__arm_vmaxnmavq_p_f32): Remove. | |
39601 | (__arm_vmaxnmvq_p_f32): Remove. | |
39602 | (__arm_vminnmavq_p_f32): Remove. | |
39603 | (__arm_vminnmvq_p_f32): Remove. | |
39604 | (__arm_vminnmvq): Remove. | |
39605 | (__arm_vminnmavq): Remove. | |
39606 | (__arm_vmaxnmvq): Remove. | |
39607 | (__arm_vmaxnmavq): Remove. | |
39608 | (__arm_vmaxnmavq_p): Remove. | |
39609 | (__arm_vmaxnmvq_p): Remove. | |
39610 | (__arm_vminnmavq_p): Remove. | |
39611 | (__arm_vminnmvq_p): Remove. | |
39612 | (__arm_vmaxnmavq_m): Remove. | |
39613 | (__arm_vmaxnmvq_m): Remove. | |
39614 | ||
39615 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39616 | ||
39617 | * config/arm/arm-mve-builtins-functions.h | |
39618 | (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f. | |
39619 | ||
39620 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39621 | ||
39622 | * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ) | |
39623 | (MVE_VMAXNMxV_MINNMxVQ_P): New. | |
39624 | (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv. | |
39625 | * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>) | |
39626 | (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ... | |
39627 | (@mve_<mve_insn>q_f<mode>): ... this. | |
39628 | (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>) | |
39629 | (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ... | |
39630 | (@mve_<mve_insn>q_p_f<mode>): ... this. | |
39631 | ||
39632 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39633 | ||
39634 | * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New. | |
39635 | * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New. | |
39636 | * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New. | |
39637 | * config/arm/arm_mve.h (vminnmq): Remove. | |
39638 | (vmaxnmq): Remove. | |
39639 | (vmaxnmq_m): Remove. | |
39640 | (vminnmq_m): Remove. | |
39641 | (vminnmq_x): Remove. | |
39642 | (vmaxnmq_x): Remove. | |
39643 | (vminnmq_f16): Remove. | |
39644 | (vmaxnmq_f16): Remove. | |
39645 | (vminnmq_f32): Remove. | |
39646 | (vmaxnmq_f32): Remove. | |
39647 | (vmaxnmq_m_f32): Remove. | |
39648 | (vmaxnmq_m_f16): Remove. | |
39649 | (vminnmq_m_f32): Remove. | |
39650 | (vminnmq_m_f16): Remove. | |
39651 | (vminnmq_x_f16): Remove. | |
39652 | (vminnmq_x_f32): Remove. | |
39653 | (vmaxnmq_x_f16): Remove. | |
39654 | (vmaxnmq_x_f32): Remove. | |
39655 | (__arm_vminnmq_f16): Remove. | |
39656 | (__arm_vmaxnmq_f16): Remove. | |
39657 | (__arm_vminnmq_f32): Remove. | |
39658 | (__arm_vmaxnmq_f32): Remove. | |
39659 | (__arm_vmaxnmq_m_f32): Remove. | |
39660 | (__arm_vmaxnmq_m_f16): Remove. | |
39661 | (__arm_vminnmq_m_f32): Remove. | |
39662 | (__arm_vminnmq_m_f16): Remove. | |
39663 | (__arm_vminnmq_x_f16): Remove. | |
39664 | (__arm_vminnmq_x_f32): Remove. | |
39665 | (__arm_vmaxnmq_x_f16): Remove. | |
39666 | (__arm_vmaxnmq_x_f32): Remove. | |
39667 | (__arm_vminnmq): Remove. | |
39668 | (__arm_vmaxnmq): Remove. | |
39669 | (__arm_vmaxnmq_m): Remove. | |
39670 | (__arm_vminnmq_m): Remove. | |
39671 | (__arm_vminnmq_x): Remove. | |
39672 | (__arm_vmaxnmq_x): Remove. | |
39673 | ||
39674 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39675 | ||
39676 | * config/arm/iterators.md (MAX_MIN_F): New. | |
39677 | (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F. | |
39678 | (mve_insn): Add vmaxnm, vminnm. | |
39679 | (max_min_f_str): New. | |
39680 | * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>): | |
39681 | Merge into ... | |
39682 | (@mve_<max_min_f_str>q_f<mode>): ... this. | |
39683 | (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ... | |
39684 | (@mve_<mve_insn>q_m_f<mode>): ... this. | |
39685 | ||
39686 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39687 | ||
39688 | * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator. | |
39689 | (smax<mode>3): Likewise. | |
39690 | ||
39691 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39692 | ||
39693 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U) | |
39694 | (FUNCTION_PRED_P_S): New. | |
39695 | (vmaxavq, vminavq, vmaxvq, vminvq): New. | |
39696 | * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq) | |
39697 | (vminvq): New. | |
39698 | * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq) | |
39699 | (vminvq): New. | |
39700 | * config/arm/arm_mve.h (vminvq): Remove. | |
39701 | (vmaxvq): Remove. | |
39702 | (vminvq_p): Remove. | |
39703 | (vmaxvq_p): Remove. | |
39704 | (vminvq_u8): Remove. | |
39705 | (vmaxvq_u8): Remove. | |
39706 | (vminvq_s8): Remove. | |
39707 | (vmaxvq_s8): Remove. | |
39708 | (vminvq_u16): Remove. | |
39709 | (vmaxvq_u16): Remove. | |
39710 | (vminvq_s16): Remove. | |
39711 | (vmaxvq_s16): Remove. | |
39712 | (vminvq_u32): Remove. | |
39713 | (vmaxvq_u32): Remove. | |
39714 | (vminvq_s32): Remove. | |
39715 | (vmaxvq_s32): Remove. | |
39716 | (vminvq_p_u8): Remove. | |
39717 | (vmaxvq_p_u8): Remove. | |
39718 | (vminvq_p_s8): Remove. | |
39719 | (vmaxvq_p_s8): Remove. | |
39720 | (vminvq_p_u16): Remove. | |
39721 | (vmaxvq_p_u16): Remove. | |
39722 | (vminvq_p_s16): Remove. | |
39723 | (vmaxvq_p_s16): Remove. | |
39724 | (vminvq_p_u32): Remove. | |
39725 | (vmaxvq_p_u32): Remove. | |
39726 | (vminvq_p_s32): Remove. | |
39727 | (vmaxvq_p_s32): Remove. | |
39728 | (__arm_vminvq_u8): Remove. | |
39729 | (__arm_vmaxvq_u8): Remove. | |
39730 | (__arm_vminvq_s8): Remove. | |
39731 | (__arm_vmaxvq_s8): Remove. | |
39732 | (__arm_vminvq_u16): Remove. | |
39733 | (__arm_vmaxvq_u16): Remove. | |
39734 | (__arm_vminvq_s16): Remove. | |
39735 | (__arm_vmaxvq_s16): Remove. | |
39736 | (__arm_vminvq_u32): Remove. | |
39737 | (__arm_vmaxvq_u32): Remove. | |
39738 | (__arm_vminvq_s32): Remove. | |
39739 | (__arm_vmaxvq_s32): Remove. | |
39740 | (__arm_vminvq_p_u8): Remove. | |
39741 | (__arm_vmaxvq_p_u8): Remove. | |
39742 | (__arm_vminvq_p_s8): Remove. | |
39743 | (__arm_vmaxvq_p_s8): Remove. | |
39744 | (__arm_vminvq_p_u16): Remove. | |
39745 | (__arm_vmaxvq_p_u16): Remove. | |
39746 | (__arm_vminvq_p_s16): Remove. | |
39747 | (__arm_vmaxvq_p_s16): Remove. | |
39748 | (__arm_vminvq_p_u32): Remove. | |
39749 | (__arm_vmaxvq_p_u32): Remove. | |
39750 | (__arm_vminvq_p_s32): Remove. | |
39751 | (__arm_vmaxvq_p_s32): Remove. | |
39752 | (__arm_vminvq): Remove. | |
39753 | (__arm_vmaxvq): Remove. | |
39754 | (__arm_vminvq_p): Remove. | |
39755 | (__arm_vmaxvq_p): Remove. | |
39756 | (vminavq): Remove. | |
39757 | (vmaxavq): Remove. | |
39758 | (vminavq_p): Remove. | |
39759 | (vmaxavq_p): Remove. | |
39760 | (vminavq_s8): Remove. | |
39761 | (vmaxavq_s8): Remove. | |
39762 | (vminavq_s16): Remove. | |
39763 | (vmaxavq_s16): Remove. | |
39764 | (vminavq_s32): Remove. | |
39765 | (vmaxavq_s32): Remove. | |
39766 | (vminavq_p_s8): Remove. | |
39767 | (vmaxavq_p_s8): Remove. | |
39768 | (vminavq_p_s16): Remove. | |
39769 | (vmaxavq_p_s16): Remove. | |
39770 | (vminavq_p_s32): Remove. | |
39771 | (vmaxavq_p_s32): Remove. | |
39772 | (__arm_vminavq_s8): Remove. | |
39773 | (__arm_vmaxavq_s8): Remove. | |
39774 | (__arm_vminavq_s16): Remove. | |
39775 | (__arm_vmaxavq_s16): Remove. | |
39776 | (__arm_vminavq_s32): Remove. | |
39777 | (__arm_vmaxavq_s32): Remove. | |
39778 | (__arm_vminavq_p_s8): Remove. | |
39779 | (__arm_vmaxavq_p_s8): Remove. | |
39780 | (__arm_vminavq_p_s16): Remove. | |
39781 | (__arm_vmaxavq_p_s16): Remove. | |
39782 | (__arm_vminavq_p_s32): Remove. | |
39783 | (__arm_vmaxavq_p_s32): Remove. | |
39784 | (__arm_vminavq): Remove. | |
39785 | (__arm_vmaxavq): Remove. | |
39786 | (__arm_vminavq_p): Remove. | |
39787 | (__arm_vmaxavq_p): Remove. | |
39788 | ||
39789 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39790 | ||
39791 | * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New. | |
39792 | (mve_insn): Add vmaxav, vmaxv, vminav, vminv. | |
39793 | (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S. | |
39794 | * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>) | |
39795 | (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ... | |
39796 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
39797 | (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>) | |
39798 | (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ... | |
39799 | (@mve_<mve_insn>q_p_<supf><mode>): ... this. | |
39800 | ||
39801 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39802 | ||
39803 | * config/arm/arm-mve-builtins-functions.h (class | |
39804 | unspec_mve_function_exact_insn_pred_p): New. | |
39805 | ||
39806 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39807 | ||
39808 | * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New. | |
39809 | * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New. | |
39810 | ||
39811 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39812 | ||
39813 | * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New. | |
39814 | * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New. | |
39815 | ||
39816 | 2023-05-09 Richard Sandiford <richard.sandiford@arm.com> | |
39817 | ||
39818 | * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order): | |
39819 | Declare. | |
39820 | * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define. | |
39821 | (ADJUST_REG_ALLOC_ORDER): Likewise. | |
39822 | * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New | |
39823 | function. | |
39824 | * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use | |
39825 | Upa rather than Upl for unpredicated movprfx alternatives. | |
39826 | ||
39827 | 2023-05-09 Jeff Law <jlaw@ventanamicro> | |
39828 | ||
39829 | * config/h8300/testcompare.md: Add peephole2 which uses a memory | |
39830 | load to set flags, thus eliminating a compare against zero. | |
39831 | ||
39832 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39833 | ||
39834 | * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New. | |
39835 | * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New. | |
39836 | * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New. | |
39837 | * config/arm/arm_mve.h (vshlltq): Remove. | |
39838 | (vshllbq): Remove. | |
39839 | (vshllbq_m): Remove. | |
39840 | (vshlltq_m): Remove. | |
39841 | (vshllbq_x): Remove. | |
39842 | (vshlltq_x): Remove. | |
39843 | (vshlltq_n_u8): Remove. | |
39844 | (vshllbq_n_u8): Remove. | |
39845 | (vshlltq_n_s8): Remove. | |
39846 | (vshllbq_n_s8): Remove. | |
39847 | (vshlltq_n_u16): Remove. | |
39848 | (vshllbq_n_u16): Remove. | |
39849 | (vshlltq_n_s16): Remove. | |
39850 | (vshllbq_n_s16): Remove. | |
39851 | (vshllbq_m_n_s8): Remove. | |
39852 | (vshllbq_m_n_s16): Remove. | |
39853 | (vshllbq_m_n_u8): Remove. | |
39854 | (vshllbq_m_n_u16): Remove. | |
39855 | (vshlltq_m_n_s8): Remove. | |
39856 | (vshlltq_m_n_s16): Remove. | |
39857 | (vshlltq_m_n_u8): Remove. | |
39858 | (vshlltq_m_n_u16): Remove. | |
39859 | (vshllbq_x_n_s8): Remove. | |
39860 | (vshllbq_x_n_s16): Remove. | |
39861 | (vshllbq_x_n_u8): Remove. | |
39862 | (vshllbq_x_n_u16): Remove. | |
39863 | (vshlltq_x_n_s8): Remove. | |
39864 | (vshlltq_x_n_s16): Remove. | |
39865 | (vshlltq_x_n_u8): Remove. | |
39866 | (vshlltq_x_n_u16): Remove. | |
39867 | (__arm_vshlltq_n_u8): Remove. | |
39868 | (__arm_vshllbq_n_u8): Remove. | |
39869 | (__arm_vshlltq_n_s8): Remove. | |
39870 | (__arm_vshllbq_n_s8): Remove. | |
39871 | (__arm_vshlltq_n_u16): Remove. | |
39872 | (__arm_vshllbq_n_u16): Remove. | |
39873 | (__arm_vshlltq_n_s16): Remove. | |
39874 | (__arm_vshllbq_n_s16): Remove. | |
39875 | (__arm_vshllbq_m_n_s8): Remove. | |
39876 | (__arm_vshllbq_m_n_s16): Remove. | |
39877 | (__arm_vshllbq_m_n_u8): Remove. | |
39878 | (__arm_vshllbq_m_n_u16): Remove. | |
39879 | (__arm_vshlltq_m_n_s8): Remove. | |
39880 | (__arm_vshlltq_m_n_s16): Remove. | |
39881 | (__arm_vshlltq_m_n_u8): Remove. | |
39882 | (__arm_vshlltq_m_n_u16): Remove. | |
39883 | (__arm_vshllbq_x_n_s8): Remove. | |
39884 | (__arm_vshllbq_x_n_s16): Remove. | |
39885 | (__arm_vshllbq_x_n_u8): Remove. | |
39886 | (__arm_vshllbq_x_n_u16): Remove. | |
39887 | (__arm_vshlltq_x_n_s8): Remove. | |
39888 | (__arm_vshlltq_x_n_s16): Remove. | |
39889 | (__arm_vshlltq_x_n_u8): Remove. | |
39890 | (__arm_vshlltq_x_n_u16): Remove. | |
39891 | (__arm_vshlltq): Remove. | |
39892 | (__arm_vshllbq): Remove. | |
39893 | (__arm_vshllbq_m): Remove. | |
39894 | (__arm_vshlltq_m): Remove. | |
39895 | (__arm_vshllbq_x): Remove. | |
39896 | (__arm_vshlltq_x): Remove. | |
39897 | ||
39898 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39899 | ||
39900 | * config/arm/iterators.md (mve_insn): Add vshllb, vshllt. | |
39901 | (VSHLLBQ_N, VSHLLTQ_N): Remove. | |
39902 | (VSHLLxQ_N): New. | |
39903 | (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove. | |
39904 | (VSHLLxQ_M_N): New. | |
39905 | * config/arm/mve.md (mve_vshllbq_n_<supf><mode>) | |
39906 | (mve_vshlltq_n_<supf><mode>): Merge into ... | |
39907 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
39908 | (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>): | |
39909 | Merge into ... | |
39910 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
39911 | ||
39912 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39913 | ||
39914 | * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New. | |
39915 | * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New. | |
39916 | ||
39917 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
39918 | ||
39919 | * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq) | |
39920 | (vqmovntq, vqmovunbq, vqmovuntq): New. | |
39921 | * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq) | |
39922 | (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New. | |
39923 | * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq) | |
39924 | (vqmovntq, vqmovunbq, vqmovuntq): New. | |
39925 | * config/arm/arm-mve-builtins.cc | |
39926 | (function_instance::has_inactive_argument): Handle vmovnbq, | |
39927 | vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq. | |
39928 | * config/arm/arm_mve.h (vqmovntq): Remove. | |
39929 | (vqmovnbq): Remove. | |
39930 | (vqmovnbq_m): Remove. | |
39931 | (vqmovntq_m): Remove. | |
39932 | (vqmovntq_u16): Remove. | |
39933 | (vqmovnbq_u16): Remove. | |
39934 | (vqmovntq_s16): Remove. | |
39935 | (vqmovnbq_s16): Remove. | |
39936 | (vqmovntq_u32): Remove. | |
39937 | (vqmovnbq_u32): Remove. | |
39938 | (vqmovntq_s32): Remove. | |
39939 | (vqmovnbq_s32): Remove. | |
39940 | (vqmovnbq_m_s16): Remove. | |
39941 | (vqmovntq_m_s16): Remove. | |
39942 | (vqmovnbq_m_u16): Remove. | |
39943 | (vqmovntq_m_u16): Remove. | |
39944 | (vqmovnbq_m_s32): Remove. | |
39945 | (vqmovntq_m_s32): Remove. | |
39946 | (vqmovnbq_m_u32): Remove. | |
39947 | (vqmovntq_m_u32): Remove. | |
39948 | (__arm_vqmovntq_u16): Remove. | |
39949 | (__arm_vqmovnbq_u16): Remove. | |
39950 | (__arm_vqmovntq_s16): Remove. | |
39951 | (__arm_vqmovnbq_s16): Remove. | |
39952 | (__arm_vqmovntq_u32): Remove. | |
39953 | (__arm_vqmovnbq_u32): Remove. | |
39954 | (__arm_vqmovntq_s32): Remove. | |
39955 | (__arm_vqmovnbq_s32): Remove. | |
39956 | (__arm_vqmovnbq_m_s16): Remove. | |
39957 | (__arm_vqmovntq_m_s16): Remove. | |
39958 | (__arm_vqmovnbq_m_u16): Remove. | |
39959 | (__arm_vqmovntq_m_u16): Remove. | |
39960 | (__arm_vqmovnbq_m_s32): Remove. | |
39961 | (__arm_vqmovntq_m_s32): Remove. | |
39962 | (__arm_vqmovnbq_m_u32): Remove. | |
39963 | (__arm_vqmovntq_m_u32): Remove. | |
39964 | (__arm_vqmovntq): Remove. | |
39965 | (__arm_vqmovnbq): Remove. | |
39966 | (__arm_vqmovnbq_m): Remove. | |
39967 | (__arm_vqmovntq_m): Remove. | |
39968 | (vmovntq): Remove. | |
39969 | (vmovnbq): Remove. | |
39970 | (vmovnbq_m): Remove. | |
39971 | (vmovntq_m): Remove. | |
39972 | (vmovntq_u16): Remove. | |
39973 | (vmovnbq_u16): Remove. | |
39974 | (vmovntq_s16): Remove. | |
39975 | (vmovnbq_s16): Remove. | |
39976 | (vmovntq_u32): Remove. | |
39977 | (vmovnbq_u32): Remove. | |
39978 | (vmovntq_s32): Remove. | |
39979 | (vmovnbq_s32): Remove. | |
39980 | (vmovnbq_m_s16): Remove. | |
39981 | (vmovntq_m_s16): Remove. | |
39982 | (vmovnbq_m_u16): Remove. | |
39983 | (vmovntq_m_u16): Remove. | |
39984 | (vmovnbq_m_s32): Remove. | |
39985 | (vmovntq_m_s32): Remove. | |
39986 | (vmovnbq_m_u32): Remove. | |
39987 | (vmovntq_m_u32): Remove. | |
39988 | (__arm_vmovntq_u16): Remove. | |
39989 | (__arm_vmovnbq_u16): Remove. | |
39990 | (__arm_vmovntq_s16): Remove. | |
39991 | (__arm_vmovnbq_s16): Remove. | |
39992 | (__arm_vmovntq_u32): Remove. | |
39993 | (__arm_vmovnbq_u32): Remove. | |
39994 | (__arm_vmovntq_s32): Remove. | |
39995 | (__arm_vmovnbq_s32): Remove. | |
39996 | (__arm_vmovnbq_m_s16): Remove. | |
39997 | (__arm_vmovntq_m_s16): Remove. | |
39998 | (__arm_vmovnbq_m_u16): Remove. | |
39999 | (__arm_vmovntq_m_u16): Remove. | |
40000 | (__arm_vmovnbq_m_s32): Remove. | |
40001 | (__arm_vmovntq_m_s32): Remove. | |
40002 | (__arm_vmovnbq_m_u32): Remove. | |
40003 | (__arm_vmovntq_m_u32): Remove. | |
40004 | (__arm_vmovntq): Remove. | |
40005 | (__arm_vmovnbq): Remove. | |
40006 | (__arm_vmovnbq_m): Remove. | |
40007 | (__arm_vmovntq_m): Remove. | |
40008 | (vqmovuntq): Remove. | |
40009 | (vqmovunbq): Remove. | |
40010 | (vqmovunbq_m): Remove. | |
40011 | (vqmovuntq_m): Remove. | |
40012 | (vqmovuntq_s16): Remove. | |
40013 | (vqmovunbq_s16): Remove. | |
40014 | (vqmovuntq_s32): Remove. | |
40015 | (vqmovunbq_s32): Remove. | |
40016 | (vqmovunbq_m_s16): Remove. | |
40017 | (vqmovuntq_m_s16): Remove. | |
40018 | (vqmovunbq_m_s32): Remove. | |
40019 | (vqmovuntq_m_s32): Remove. | |
40020 | (__arm_vqmovuntq_s16): Remove. | |
40021 | (__arm_vqmovunbq_s16): Remove. | |
40022 | (__arm_vqmovuntq_s32): Remove. | |
40023 | (__arm_vqmovunbq_s32): Remove. | |
40024 | (__arm_vqmovunbq_m_s16): Remove. | |
40025 | (__arm_vqmovuntq_m_s16): Remove. | |
40026 | (__arm_vqmovunbq_m_s32): Remove. | |
40027 | (__arm_vqmovuntq_m_s32): Remove. | |
40028 | (__arm_vqmovuntq): Remove. | |
40029 | (__arm_vqmovunbq): Remove. | |
40030 | (__arm_vqmovunbq_m): Remove. | |
40031 | (__arm_vqmovuntq_m): Remove. | |
40032 | ||
40033 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
40034 | ||
40035 | * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New. | |
40036 | (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb, | |
40037 | vqmovunt. | |
40038 | (isu): Likewise. | |
40039 | (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S, | |
40040 | VQMOVUNTQ_S. | |
40041 | * config/arm/mve.md (mve_vmovnbq_<supf><mode>) | |
40042 | (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>) | |
40043 | (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>) | |
40044 | (mve_vqmovuntq_s<mode>): Merge into ... | |
40045 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
40046 | (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>) | |
40047 | (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>) | |
40048 | (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ... | |
40049 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
40050 | ||
40051 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
40052 | ||
40053 | * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New. | |
40054 | (binary_move_narrow_unsigned): New. | |
40055 | * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New. | |
40056 | (binary_move_narrow_unsigned): New. | |
40057 | ||
40058 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
40059 | ||
40060 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New. | |
40061 | (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New. | |
40062 | * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq) | |
40063 | (vrndpq, vrndq, vrndxq): New. | |
40064 | * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq) | |
40065 | (vrndpq, vrndq, vrndxq): New. | |
40066 | * config/arm/arm_mve.h (vrndxq): Remove. | |
40067 | (vrndq): Remove. | |
40068 | (vrndpq): Remove. | |
40069 | (vrndnq): Remove. | |
40070 | (vrndmq): Remove. | |
40071 | (vrndaq): Remove. | |
40072 | (vrndaq_m): Remove. | |
40073 | (vrndmq_m): Remove. | |
40074 | (vrndnq_m): Remove. | |
40075 | (vrndpq_m): Remove. | |
40076 | (vrndq_m): Remove. | |
40077 | (vrndxq_m): Remove. | |
40078 | (vrndq_x): Remove. | |
40079 | (vrndnq_x): Remove. | |
40080 | (vrndmq_x): Remove. | |
40081 | (vrndpq_x): Remove. | |
40082 | (vrndaq_x): Remove. | |
40083 | (vrndxq_x): Remove. | |
40084 | (vrndxq_f16): Remove. | |
40085 | (vrndxq_f32): Remove. | |
40086 | (vrndq_f16): Remove. | |
40087 | (vrndq_f32): Remove. | |
40088 | (vrndpq_f16): Remove. | |
40089 | (vrndpq_f32): Remove. | |
40090 | (vrndnq_f16): Remove. | |
40091 | (vrndnq_f32): Remove. | |
40092 | (vrndmq_f16): Remove. | |
40093 | (vrndmq_f32): Remove. | |
40094 | (vrndaq_f16): Remove. | |
40095 | (vrndaq_f32): Remove. | |
40096 | (vrndaq_m_f16): Remove. | |
40097 | (vrndmq_m_f16): Remove. | |
40098 | (vrndnq_m_f16): Remove. | |
40099 | (vrndpq_m_f16): Remove. | |
40100 | (vrndq_m_f16): Remove. | |
40101 | (vrndxq_m_f16): Remove. | |
40102 | (vrndaq_m_f32): Remove. | |
40103 | (vrndmq_m_f32): Remove. | |
40104 | (vrndnq_m_f32): Remove. | |
40105 | (vrndpq_m_f32): Remove. | |
40106 | (vrndq_m_f32): Remove. | |
40107 | (vrndxq_m_f32): Remove. | |
40108 | (vrndq_x_f16): Remove. | |
40109 | (vrndq_x_f32): Remove. | |
40110 | (vrndnq_x_f16): Remove. | |
40111 | (vrndnq_x_f32): Remove. | |
40112 | (vrndmq_x_f16): Remove. | |
40113 | (vrndmq_x_f32): Remove. | |
40114 | (vrndpq_x_f16): Remove. | |
40115 | (vrndpq_x_f32): Remove. | |
40116 | (vrndaq_x_f16): Remove. | |
40117 | (vrndaq_x_f32): Remove. | |
40118 | (vrndxq_x_f16): Remove. | |
40119 | (vrndxq_x_f32): Remove. | |
40120 | (__arm_vrndxq_f16): Remove. | |
40121 | (__arm_vrndxq_f32): Remove. | |
40122 | (__arm_vrndq_f16): Remove. | |
40123 | (__arm_vrndq_f32): Remove. | |
40124 | (__arm_vrndpq_f16): Remove. | |
40125 | (__arm_vrndpq_f32): Remove. | |
40126 | (__arm_vrndnq_f16): Remove. | |
40127 | (__arm_vrndnq_f32): Remove. | |
40128 | (__arm_vrndmq_f16): Remove. | |
40129 | (__arm_vrndmq_f32): Remove. | |
40130 | (__arm_vrndaq_f16): Remove. | |
40131 | (__arm_vrndaq_f32): Remove. | |
40132 | (__arm_vrndaq_m_f16): Remove. | |
40133 | (__arm_vrndmq_m_f16): Remove. | |
40134 | (__arm_vrndnq_m_f16): Remove. | |
40135 | (__arm_vrndpq_m_f16): Remove. | |
40136 | (__arm_vrndq_m_f16): Remove. | |
40137 | (__arm_vrndxq_m_f16): Remove. | |
40138 | (__arm_vrndaq_m_f32): Remove. | |
40139 | (__arm_vrndmq_m_f32): Remove. | |
40140 | (__arm_vrndnq_m_f32): Remove. | |
40141 | (__arm_vrndpq_m_f32): Remove. | |
40142 | (__arm_vrndq_m_f32): Remove. | |
40143 | (__arm_vrndxq_m_f32): Remove. | |
40144 | (__arm_vrndq_x_f16): Remove. | |
40145 | (__arm_vrndq_x_f32): Remove. | |
40146 | (__arm_vrndnq_x_f16): Remove. | |
40147 | (__arm_vrndnq_x_f32): Remove. | |
40148 | (__arm_vrndmq_x_f16): Remove. | |
40149 | (__arm_vrndmq_x_f32): Remove. | |
40150 | (__arm_vrndpq_x_f16): Remove. | |
40151 | (__arm_vrndpq_x_f32): Remove. | |
40152 | (__arm_vrndaq_x_f16): Remove. | |
40153 | (__arm_vrndaq_x_f32): Remove. | |
40154 | (__arm_vrndxq_x_f16): Remove. | |
40155 | (__arm_vrndxq_x_f32): Remove. | |
40156 | (__arm_vrndxq): Remove. | |
40157 | (__arm_vrndq): Remove. | |
40158 | (__arm_vrndpq): Remove. | |
40159 | (__arm_vrndnq): Remove. | |
40160 | (__arm_vrndmq): Remove. | |
40161 | (__arm_vrndaq): Remove. | |
40162 | (__arm_vrndaq_m): Remove. | |
40163 | (__arm_vrndmq_m): Remove. | |
40164 | (__arm_vrndnq_m): Remove. | |
40165 | (__arm_vrndpq_m): Remove. | |
40166 | (__arm_vrndq_m): Remove. | |
40167 | (__arm_vrndxq_m): Remove. | |
40168 | (__arm_vrndq_x): Remove. | |
40169 | (__arm_vrndnq_x): Remove. | |
40170 | (__arm_vrndmq_x): Remove. | |
40171 | (__arm_vrndpq_x): Remove. | |
40172 | (__arm_vrndaq_x): Remove. | |
40173 | (__arm_vrndxq_x): Remove. | |
40174 | ||
40175 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
40176 | ||
40177 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New. | |
40178 | (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New. | |
40179 | * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq) | |
40180 | (vclzq, vqabsq, vqnegq): New. | |
40181 | * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq) | |
40182 | (vqabsq, vqnegq): New. | |
40183 | * config/arm/arm_mve.h (vabsq): Remove. | |
40184 | (vabsq_m): Remove. | |
40185 | (vabsq_x): Remove. | |
40186 | (vabsq_f16): Remove. | |
40187 | (vabsq_f32): Remove. | |
40188 | (vabsq_s8): Remove. | |
40189 | (vabsq_s16): Remove. | |
40190 | (vabsq_s32): Remove. | |
40191 | (vabsq_m_s8): Remove. | |
40192 | (vabsq_m_s16): Remove. | |
40193 | (vabsq_m_s32): Remove. | |
40194 | (vabsq_m_f16): Remove. | |
40195 | (vabsq_m_f32): Remove. | |
40196 | (vabsq_x_s8): Remove. | |
40197 | (vabsq_x_s16): Remove. | |
40198 | (vabsq_x_s32): Remove. | |
40199 | (vabsq_x_f16): Remove. | |
40200 | (vabsq_x_f32): Remove. | |
40201 | (__arm_vabsq_s8): Remove. | |
40202 | (__arm_vabsq_s16): Remove. | |
40203 | (__arm_vabsq_s32): Remove. | |
40204 | (__arm_vabsq_m_s8): Remove. | |
40205 | (__arm_vabsq_m_s16): Remove. | |
40206 | (__arm_vabsq_m_s32): Remove. | |
40207 | (__arm_vabsq_x_s8): Remove. | |
40208 | (__arm_vabsq_x_s16): Remove. | |
40209 | (__arm_vabsq_x_s32): Remove. | |
40210 | (__arm_vabsq_f16): Remove. | |
40211 | (__arm_vabsq_f32): Remove. | |
40212 | (__arm_vabsq_m_f16): Remove. | |
40213 | (__arm_vabsq_m_f32): Remove. | |
40214 | (__arm_vabsq_x_f16): Remove. | |
40215 | (__arm_vabsq_x_f32): Remove. | |
40216 | (__arm_vabsq): Remove. | |
40217 | (__arm_vabsq_m): Remove. | |
40218 | (__arm_vabsq_x): Remove. | |
40219 | (vnegq): Remove. | |
40220 | (vnegq_m): Remove. | |
40221 | (vnegq_x): Remove. | |
40222 | (vnegq_f16): Remove. | |
40223 | (vnegq_f32): Remove. | |
40224 | (vnegq_s8): Remove. | |
40225 | (vnegq_s16): Remove. | |
40226 | (vnegq_s32): Remove. | |
40227 | (vnegq_m_s8): Remove. | |
40228 | (vnegq_m_s16): Remove. | |
40229 | (vnegq_m_s32): Remove. | |
40230 | (vnegq_m_f16): Remove. | |
40231 | (vnegq_m_f32): Remove. | |
40232 | (vnegq_x_s8): Remove. | |
40233 | (vnegq_x_s16): Remove. | |
40234 | (vnegq_x_s32): Remove. | |
40235 | (vnegq_x_f16): Remove. | |
40236 | (vnegq_x_f32): Remove. | |
40237 | (__arm_vnegq_s8): Remove. | |
40238 | (__arm_vnegq_s16): Remove. | |
40239 | (__arm_vnegq_s32): Remove. | |
40240 | (__arm_vnegq_m_s8): Remove. | |
40241 | (__arm_vnegq_m_s16): Remove. | |
40242 | (__arm_vnegq_m_s32): Remove. | |
40243 | (__arm_vnegq_x_s8): Remove. | |
40244 | (__arm_vnegq_x_s16): Remove. | |
40245 | (__arm_vnegq_x_s32): Remove. | |
40246 | (__arm_vnegq_f16): Remove. | |
40247 | (__arm_vnegq_f32): Remove. | |
40248 | (__arm_vnegq_m_f16): Remove. | |
40249 | (__arm_vnegq_m_f32): Remove. | |
40250 | (__arm_vnegq_x_f16): Remove. | |
40251 | (__arm_vnegq_x_f32): Remove. | |
40252 | (__arm_vnegq): Remove. | |
40253 | (__arm_vnegq_m): Remove. | |
40254 | (__arm_vnegq_x): Remove. | |
40255 | (vclsq): Remove. | |
40256 | (vclsq_m): Remove. | |
40257 | (vclsq_x): Remove. | |
40258 | (vclsq_s8): Remove. | |
40259 | (vclsq_s16): Remove. | |
40260 | (vclsq_s32): Remove. | |
40261 | (vclsq_m_s8): Remove. | |
40262 | (vclsq_m_s16): Remove. | |
40263 | (vclsq_m_s32): Remove. | |
40264 | (vclsq_x_s8): Remove. | |
40265 | (vclsq_x_s16): Remove. | |
40266 | (vclsq_x_s32): Remove. | |
40267 | (__arm_vclsq_s8): Remove. | |
40268 | (__arm_vclsq_s16): Remove. | |
40269 | (__arm_vclsq_s32): Remove. | |
40270 | (__arm_vclsq_m_s8): Remove. | |
40271 | (__arm_vclsq_m_s16): Remove. | |
40272 | (__arm_vclsq_m_s32): Remove. | |
40273 | (__arm_vclsq_x_s8): Remove. | |
40274 | (__arm_vclsq_x_s16): Remove. | |
40275 | (__arm_vclsq_x_s32): Remove. | |
40276 | (__arm_vclsq): Remove. | |
40277 | (__arm_vclsq_m): Remove. | |
40278 | (__arm_vclsq_x): Remove. | |
40279 | (vclzq): Remove. | |
40280 | (vclzq_m): Remove. | |
40281 | (vclzq_x): Remove. | |
40282 | (vclzq_s8): Remove. | |
40283 | (vclzq_s16): Remove. | |
40284 | (vclzq_s32): Remove. | |
40285 | (vclzq_u8): Remove. | |
40286 | (vclzq_u16): Remove. | |
40287 | (vclzq_u32): Remove. | |
40288 | (vclzq_m_u8): Remove. | |
40289 | (vclzq_m_s8): Remove. | |
40290 | (vclzq_m_u16): Remove. | |
40291 | (vclzq_m_s16): Remove. | |
40292 | (vclzq_m_u32): Remove. | |
40293 | (vclzq_m_s32): Remove. | |
40294 | (vclzq_x_s8): Remove. | |
40295 | (vclzq_x_s16): Remove. | |
40296 | (vclzq_x_s32): Remove. | |
40297 | (vclzq_x_u8): Remove. | |
40298 | (vclzq_x_u16): Remove. | |
40299 | (vclzq_x_u32): Remove. | |
40300 | (__arm_vclzq_s8): Remove. | |
40301 | (__arm_vclzq_s16): Remove. | |
40302 | (__arm_vclzq_s32): Remove. | |
40303 | (__arm_vclzq_u8): Remove. | |
40304 | (__arm_vclzq_u16): Remove. | |
40305 | (__arm_vclzq_u32): Remove. | |
40306 | (__arm_vclzq_m_u8): Remove. | |
40307 | (__arm_vclzq_m_s8): Remove. | |
40308 | (__arm_vclzq_m_u16): Remove. | |
40309 | (__arm_vclzq_m_s16): Remove. | |
40310 | (__arm_vclzq_m_u32): Remove. | |
40311 | (__arm_vclzq_m_s32): Remove. | |
40312 | (__arm_vclzq_x_s8): Remove. | |
40313 | (__arm_vclzq_x_s16): Remove. | |
40314 | (__arm_vclzq_x_s32): Remove. | |
40315 | (__arm_vclzq_x_u8): Remove. | |
40316 | (__arm_vclzq_x_u16): Remove. | |
40317 | (__arm_vclzq_x_u32): Remove. | |
40318 | (__arm_vclzq): Remove. | |
40319 | (__arm_vclzq_m): Remove. | |
40320 | (__arm_vclzq_x): Remove. | |
40321 | (vqabsq): Remove. | |
40322 | (vqnegq): Remove. | |
40323 | (vqnegq_m): Remove. | |
40324 | (vqabsq_m): Remove. | |
40325 | (vqabsq_s8): Remove. | |
40326 | (vqabsq_s16): Remove. | |
40327 | (vqabsq_s32): Remove. | |
40328 | (vqnegq_s8): Remove. | |
40329 | (vqnegq_s16): Remove. | |
40330 | (vqnegq_s32): Remove. | |
40331 | (vqnegq_m_s8): Remove. | |
40332 | (vqabsq_m_s8): Remove. | |
40333 | (vqnegq_m_s16): Remove. | |
40334 | (vqabsq_m_s16): Remove. | |
40335 | (vqnegq_m_s32): Remove. | |
40336 | (vqabsq_m_s32): Remove. | |
40337 | (__arm_vqabsq_s8): Remove. | |
40338 | (__arm_vqabsq_s16): Remove. | |
40339 | (__arm_vqabsq_s32): Remove. | |
40340 | (__arm_vqnegq_s8): Remove. | |
40341 | (__arm_vqnegq_s16): Remove. | |
40342 | (__arm_vqnegq_s32): Remove. | |
40343 | (__arm_vqnegq_m_s8): Remove. | |
40344 | (__arm_vqabsq_m_s8): Remove. | |
40345 | (__arm_vqnegq_m_s16): Remove. | |
40346 | (__arm_vqabsq_m_s16): Remove. | |
40347 | (__arm_vqnegq_m_s32): Remove. | |
40348 | (__arm_vqabsq_m_s32): Remove. | |
40349 | (__arm_vqabsq): Remove. | |
40350 | (__arm_vqnegq): Remove. | |
40351 | (__arm_vqnegq_m): Remove. | |
40352 | (__arm_vqabsq_m): Remove. | |
40353 | ||
40354 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
40355 | ||
40356 | * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY) | |
40357 | (MVE_FP_UNARY, MVE_FP_M_UNARY): New. | |
40358 | (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda, | |
40359 | vrndm, vrndn, vrndp, vrnd, vrndx. | |
40360 | (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S, | |
40361 | VQABSQ_M_S, VQNEGQ_M_S. | |
40362 | (mve_mnemo): New. | |
40363 | * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>) | |
40364 | (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>) | |
40365 | (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ... | |
40366 | (@mve_<mve_insn>q_f<mode>): ... this. | |
40367 | (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ... | |
40368 | (mve_v<absneg_str>q_f<mode>): ... this. | |
40369 | (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ... | |
40370 | (mve_v<absneg_str>q_s<mode>): ... this. | |
40371 | (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ... | |
40372 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
40373 | (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>) | |
40374 | (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>) | |
40375 | (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ... | |
40376 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
40377 | (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>) | |
40378 | (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>) | |
40379 | (mve_vrndxq_m_f<mode>): Merge into ... | |
40380 | (@mve_<mve_insn>q_m_f<mode>): ... this. | |
40381 | ||
40382 | 2023-05-09 Christophe Lyon <christophe.lyon@arm.com> | |
40383 | ||
40384 | * config/arm/arm-mve-builtins-shapes.cc (unary): New. | |
40385 | * config/arm/arm-mve-builtins-shapes.h (unary): New. | |
40386 | ||
40387 | 2023-05-09 Jakub Jelinek <jakub@redhat.com> | |
40388 | ||
40389 | * mux-utils.h: Fix comment typo, avoides -> avoids. | |
40390 | ||
40391 | 2023-05-09 Jakub Jelinek <jakub@redhat.com> | |
40392 | ||
40393 | PR tree-optimization/109778 | |
40394 | * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on | |
40395 | wi::zext (x, width) rather than x if width != precision, rather | |
40396 | than using wi::zext (right, width) after the shift. | |
40397 | * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results | |
40398 | of wi::lrotate or wi::rrotate. | |
40399 | ||
40400 | 2023-05-09 Alexander Monakov <amonakov@ispras.ru> | |
40401 | ||
40402 | * genmatch.cc (get_out_file): Make static and rename to ... | |
40403 | (choose_output): ... this. Reimplement. Update all uses ... | |
40404 | (decision_tree::gen): ... here and ... | |
40405 | (main): ... here. | |
40406 | ||
40407 | 2023-05-09 Alexander Monakov <amonakov@ispras.ru> | |
40408 | ||
40409 | * genmatch.cc (showUsage): Reimplement as ... | |
40410 | (usage): ...this. Adjust all uses. | |
40411 | (main): Print usage when no arguments. Add missing 'return 1'. | |
40412 | ||
40413 | 2023-05-09 Alexander Monakov <amonakov@ispras.ru> | |
40414 | ||
40415 | * genmatch.cc (header_file): Make static. | |
40416 | (emit_func): Rename to... | |
40417 | (fp_decl): ... this. Adjust all uses. | |
40418 | (fp_decl_done): New function. Use it... | |
40419 | (decision_tree::gen): ... here and... | |
40420 | (write_predicate): ... here. | |
40421 | (main): Adjust. | |
40422 | ||
40423 | 2023-05-09 Richard Sandiford <richard.sandiford@arm.com> | |
40424 | ||
40425 | * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching | |
40426 | earlyclobbers. | |
40427 | ||
40428 | 2023-05-08 Roger Sayle <roger@nextmovesoftware.com> | |
40429 | Uros Bizjak <ubizjak@gmail.com> | |
40430 | ||
40431 | * config/i386/i386.md (any_or_plus): Move definition earlier. | |
40432 | (*insvti_highpart_1): New define_insn_and_split to overwrite | |
40433 | (insv) the highpart of a TImode register/memory. | |
40434 | ||
40435 | 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com> | |
40436 | ||
40437 | * auto-profile.cc (auto_profile): Check todo from early_inline | |
40438 | to see if cleanup_tree_vfg needs to be called. | |
40439 | (early_inline): Return todo from early_inliner. | |
40440 | ||
40441 | 2023-05-08 Kito Cheng <kito.cheng@sifive.com> | |
40442 | ||
40443 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info): | |
40444 | New. | |
40445 | (pass_vsetvl::get_block_info): New. | |
40446 | (pass_vsetvl::update_vector_info): New. | |
40447 | (pass_vsetvl::simple_vsetvl): Use get_vector_info. | |
40448 | (pass_vsetvl::compute_local_backward_infos): Ditto. | |
40449 | (pass_vsetvl::transfer_before): Ditto. | |
40450 | (pass_vsetvl::transfer_after): Ditto. | |
40451 | (pass_vsetvl::emit_local_forward_vsetvls): Ditto. | |
40452 | (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto. | |
40453 | (pass_vsetvl::cleanup_insns): Ditto. | |
40454 | (pass_vsetvl::compute_local_backward_infos): Use | |
40455 | update_vector_info. | |
40456 | ||
40457 | 2023-05-08 Jeff Law <jlaw@ventanamicro> | |
40458 | ||
40459 | * config/stormy16/stormy16.md (zero_extendhisi2): Fix length. | |
40460 | ||
40461 | 2023-05-08 Richard Biener <rguenther@suse.de> | |
40462 | Michael Meissner <meissner@linux.ibm.com> | |
40463 | ||
40464 | PR middle-end/108623 | |
40465 | * tree-core.h (tree_type_common): Bump up precision field to 16 bits. | |
40466 | Align bit fields > 1 bit to at least an 8-bit boundary. | |
40467 | ||
40468 | 2023-05-08 Andrew Pinski <apinski@marvell.com> | |
40469 | ||
40470 | PR tree-optimization/109424 | |
40471 | PR tree-optimization/59424 | |
40472 | * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ... | |
40473 | (factor_out_conditional_operation): This and add support for all unary | |
40474 | operations. | |
40475 | (pass_phiopt::execute): Update call to factor_out_conditional_conversion | |
40476 | to call factor_out_conditional_operation instead. | |
40477 | ||
40478 | 2023-05-08 Andrew Pinski <apinski@marvell.com> | |
40479 | ||
40480 | * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop | |
40481 | over factor_out_conditional_conversion. | |
40482 | ||
40483 | 2023-05-08 Andrew Pinski <apinski@marvell.com> | |
40484 | ||
40485 | PR tree-optimization/49959 | |
40486 | PR tree-optimization/103771 | |
40487 | * tree-ssa-phiopt.cc (pass_phiopt::execute): Support | |
40488 | Diamond shapped bb form for factor_out_conditional_conversion. | |
40489 | ||
40490 | 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
40491 | ||
40492 | * config/riscv/autovec.md (movmisalign<mode>): New pattern. | |
40493 | * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete. | |
40494 | (riscv_vector_get_mask_mode): Ditto. | |
40495 | (get_mask_policy_no_pred): Ditto. | |
40496 | (get_tail_policy_no_pred): Ditto. | |
40497 | (get_mask_mode): New function. | |
40498 | * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete. | |
40499 | (get_tail_policy_no_pred): Ditto. | |
40500 | (riscv_vector_mask_mode_p): Ditto. | |
40501 | (riscv_vector_get_mask_mode): Ditto. | |
40502 | (get_mask_mode): New function. | |
40503 | * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove | |
40504 | global extern. | |
40505 | (get_tail_policy_for_pred): Ditto. | |
40506 | * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto. | |
40507 | (get_mask_policy_for_pred): Ditto | |
40508 | * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes. | |
40509 | ||
40510 | 2023-05-08 Kito Cheng <kito.cheng@sifive.com> | |
40511 | ||
40512 | * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New. | |
40513 | (riscv_select_multilib): New. | |
40514 | (riscv_compute_multilib): Extract logic to riscv_select_multilib and | |
40515 | also handle select_by_abi. | |
40516 | * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it | |
40517 | to select_by_abi_arch_cmodel from 1. | |
40518 | * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define. | |
40519 | * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New. | |
40520 | ||
40521 | 2023-05-08 Alexander Monakov <amonakov@ispras.ru> | |
40522 | ||
40523 | * Makefile.in: (gimple-match-head.o-warn): Remove. | |
40524 | (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on | |
40525 | gimple-match-exports.cc. | |
40526 | (gimple-match-auto.h): Only depend on s-gimple-match. | |
40527 | (generic-match-auto.h): Likewise. | |
40528 | ||
40529 | 2023-05-08 Andrew Pinski <apinski@marvell.com> | |
40530 | ||
40531 | PR tree-optimization/109691 | |
40532 | * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup | |
40533 | argument. | |
40534 | If the removed statement can throw, have need_eh_cleanup | |
40535 | include the bb of that statement. | |
40536 | * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration. | |
40537 | * tree-ssa-propagate.cc (struct prop_stats_d): Remove | |
40538 | num_dce. | |
40539 | (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker): | |
40540 | Initialize dceworklist instead of stmts_to_remove. | |
40541 | (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker): | |
40542 | Destore dceworklist instead of stmts_to_remove. | |
40543 | (substitute_and_fold_dom_walker::before_dom_children): | |
40544 | Set dceworklist instead of adding to stmts_to_remove. | |
40545 | (substitute_and_fold_engine::substitute_and_fold): | |
40546 | Call simple_dce_from_worklist instead of poping | |
40547 | from the list. | |
40548 | Don't update the stat on removal statements. | |
40549 | ||
40550 | 2023-05-07 Andrew Pinski <apinski@marvell.com> | |
40551 | ||
40552 | PR target/109762 | |
40553 | * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher): | |
40554 | Change argument type to aarch64_feature_flags. | |
40555 | * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change | |
40556 | constructor argument type to aarch64_feature_flags. | |
40557 | Change m_old_asm_isa_flags to be aarch64_feature_flags. | |
40558 | ||
40559 | 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com> | |
40560 | ||
40561 | * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate | |
40562 | more parallel code if can_create_pseudo_p. | |
40563 | ||
40564 | 2023-05-07 Roger Sayle <roger@nextmovesoftware.com> | |
40565 | ||
40566 | PR target/43644 | |
40567 | * lower-subreg.cc (resolve_simple_move): Don't emit a clobber | |
40568 | immediately before moving a multi-word register by parts. | |
40569 | ||
40570 | 2023-05-06 Jeff Law <jlaw@ventanamicro> | |
40571 | ||
40572 | * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete. | |
40573 | ||
40574 | 2023-05-06 Michael Collison <collison@rivosinc.com> | |
40575 | ||
40576 | * tree-vect-slp.cc (can_duplicate_and_interleave_p): | |
40577 | Check that GET_MODE_NUNITS is a multiple of 2. | |
40578 | ||
40579 | 2023-05-06 Michael Collison <collison@rivosinc.com> | |
40580 | ||
40581 | * config/riscv/riscv.cc | |
40582 | (riscv_estimated_poly_value): Implement | |
40583 | TARGET_ESTIMATED_POLY_VALUE. | |
40584 | (riscv_preferred_simd_mode): Implement | |
40585 | TARGET_VECTORIZE_PREFERRED_SIMD_MODE. | |
40586 | (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE. | |
40587 | (riscv_empty_mask_is_expensive): Implement | |
40588 | TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE. | |
40589 | (riscv_vectorize_create_costs): Implement | |
40590 | TARGET_VECTORIZE_CREATE_COSTS. | |
40591 | (riscv_support_vector_misalignment): Implement | |
40592 | TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT. | |
40593 | (TARGET_ESTIMATED_POLY_VALUE): Register target macro. | |
40594 | (TARGET_VECTORIZE_GET_MASK_MODE): Ditto. | |
40595 | (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto. | |
40596 | (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto. | |
40597 | ||
40598 | 2023-05-06 Jeff Law <jlaw@ventanamicro> | |
40599 | ||
40600 | * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove | |
40601 | duplicate definition. | |
40602 | ||
40603 | 2023-05-06 Michael Collison <collison@rivosinc.com> | |
40604 | ||
40605 | * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function. | |
40606 | (riscv_vector_preferred_simd_mode): Ditto. | |
40607 | (get_mask_policy_no_pred): Ditto. | |
40608 | (get_tail_policy_no_pred): Ditto. | |
40609 | (riscv_vector_mask_mode_p): Ditto. | |
40610 | (riscv_vector_get_mask_mode): Ditto. | |
40611 | ||
40612 | 2023-05-06 Michael Collison <collison@rivosinc.com> | |
40613 | ||
40614 | * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred): | |
40615 | Remove static declaration to to make externally visible. | |
40616 | (get_mask_policy_for_pred): Ditto. | |
40617 | * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): | |
40618 | New external declaration. | |
40619 | (get_mask_policy_for_pred): Ditto. | |
40620 | ||
40621 | 2023-05-06 Michael Collison <collison@rivosinc.com> | |
40622 | ||
40623 | * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New. | |
40624 | (riscv_vector_get_mask_mode): Ditto. | |
40625 | (get_mask_policy_no_pred): Ditto. | |
40626 | (get_tail_policy_no_pred): Ditto. | |
40627 | ||
40628 | 2023-05-06 Xi Ruoyao <xry111@xry111.site> | |
40629 | ||
40630 | * config/loongarch/loongarch.h (struct machine_function): Add | |
40631 | reg_is_wrapped_separately array for register wrapping | |
40632 | information. | |
40633 | * config/loongarch/loongarch.cc | |
40634 | (loongarch_get_separate_components): New function. | |
40635 | (loongarch_components_for_bb): Likewise. | |
40636 | (loongarch_disqualify_components): Likewise. | |
40637 | (loongarch_process_components): Likewise. | |
40638 | (loongarch_emit_prologue_components): Likewise. | |
40639 | (loongarch_emit_epilogue_components): Likewise. | |
40640 | (loongarch_set_handled_components): Likewise. | |
40641 | (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define. | |
40642 | (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise. | |
40643 | (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise. | |
40644 | (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise. | |
40645 | (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise. | |
40646 | (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise. | |
40647 | (loongarch_for_each_saved_reg): Skip registers that are wrapped | |
40648 | separately. | |
40649 | ||
40650 | 2023-05-06 Xi Ruoyao <xry111@xry111.site> | |
40651 | ||
40652 | PR other/109522 | |
40653 | * Makefile.in (s-macro_list): Pass -nostdinc to | |
40654 | $(GCC_FOR_TARGET). | |
40655 | ||
40656 | 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
40657 | ||
40658 | * config/riscv/riscv-protos.h (preferred_simd_mode): New function. | |
40659 | * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto. | |
40660 | (preferred_simd_mode): Ditto. | |
40661 | * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg. | |
40662 | (riscv_convert_vector_bits): Adjust for RVV auto-vectorization. | |
40663 | (riscv_preferred_simd_mode): New function. | |
40664 | (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support. | |
40665 | * config/riscv/vector.md: Add autovec.md. | |
40666 | * config/riscv/autovec.md: New file. | |
40667 | ||
40668 | 2023-05-06 Jakub Jelinek <jakub@redhat.com> | |
40669 | ||
40670 | * real.h (dconst_pi): Define. | |
40671 | (dconst_e_ptr): Formatting fix. | |
40672 | (dconst_pi_ptr): Declare. | |
40673 | * real.cc (dconst_pi_ptr): New function. | |
40674 | * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic | |
40675 | boundaries range with range computed from sin/cos of the particular | |
40676 | bounds if the argument range is shorter than 2*pi. | |
40677 | (cfn_sincos::op1_range): Take bulps into account when determining | |
40678 | which result ranges are always invalid or behave like known NAN. | |
40679 | ||
40680 | 2023-05-06 Aldy Hernandez <aldyh@redhat.com> | |
40681 | ||
40682 | * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not | |
40683 | pass type to vrange_storage::equal_p. | |
40684 | * value-range-storage.cc (vrange_storage::equal_p): Remove type. | |
40685 | (irange_storage::equal_p): Same. | |
40686 | (frange_storage::equal_p): Same. | |
40687 | * value-range-storage.h (class frange_storage): Same. | |
40688 | ||
40689 | 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
40690 | ||
40691 | PR target/109748 | |
40692 | * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it. | |
40693 | (pass_vsetvl::local_eliminate_vsetvl_insn): New function. | |
40694 | ||
40695 | 2023-05-06 liuhongt <hongtao.liu@intel.com> | |
40696 | ||
40697 | * combine.cc (maybe_swap_commutative_operands): Canonicalize | |
40698 | vec_merge when mask is constant. | |
40699 | * doc/md.texi: Document vec_merge canonicalization. | |
40700 | ||
40701 | 2023-05-06 Jakub Jelinek <jakub@redhat.com> | |
40702 | ||
40703 | * value-range.h (frange_arithmetic): Declare. | |
40704 | * range-op-float.cc (frange_arithmetic): No longer static. | |
40705 | * gimple-range-op.cc (frange_mpfr_arg1): New function. | |
40706 | (cfn_sqrt::fold_range): Intersect the generic boundaries range | |
40707 | with range computed from sqrt of the particular bounds. | |
40708 | (cfn_sqrt::op1_range): Intersect the generic boundaries range | |
40709 | with range computed from squared particular bounds. | |
40710 | ||
40711 | 2023-05-06 Jakub Jelinek <jakub@redhat.com> | |
40712 | ||
40713 | * Makefile.in (check_p_numbers): Rename to one_to_9999, move | |
40714 | earlier with helper variables also renamed. | |
40715 | (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999)) | |
40716 | instead of $(shell seq 1 $(NUM_MATCH_SPLITS)). | |
40717 | (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers). | |
40718 | ||
40719 | 2023-05-06 Hans-Peter Nilsson <hp@axis.com> | |
40720 | ||
40721 | * config/cris/cris.md (splitop): Add PLUS. | |
40722 | * config/cris/cris.cc (cris_split_constant): Also handle | |
40723 | PLUS when a split into two insns may be useful. | |
40724 | ||
40725 | 2023-05-05 Hans-Peter Nilsson <hp@axis.com> | |
40726 | ||
40727 | * config/cris/cris.md (movandsplit1): New define_peephole2. | |
40728 | ||
40729 | 2023-05-05 Hans-Peter Nilsson <hp@axis.com> | |
40730 | ||
40731 | * config/cris/cris.md (lsrandsplit1): New define_peephole2. | |
40732 | ||
40733 | 2023-05-05 Hans-Peter Nilsson <hp@axis.com> | |
40734 | ||
40735 | * doc/md.texi (define_peephole2): Document order of scanning. | |
40736 | ||
40737 | 2023-05-05 Pan Li <pan2.li@intel.com> | |
40738 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
40739 | ||
40740 | * config/riscv/vector.md: Allow const as the operand of RVV | |
40741 | indexed load/store. | |
40742 | ||
40743 | 2023-05-05 Pan Li <pan2.li@intel.com> | |
40744 | ||
40745 | * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro | |
40746 | consumed by simplify_rtx. | |
40747 | ||
40748 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40749 | ||
40750 | * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New. | |
40751 | * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New. | |
40752 | * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New. | |
40753 | * config/arm/arm_mve.h (vshrq): Remove. | |
40754 | (vrshrq): Remove. | |
40755 | (vrshrq_m): Remove. | |
40756 | (vshrq_m): Remove. | |
40757 | (vrshrq_x): Remove. | |
40758 | (vshrq_x): Remove. | |
40759 | (vshrq_n_s8): Remove. | |
40760 | (vshrq_n_s16): Remove. | |
40761 | (vshrq_n_s32): Remove. | |
40762 | (vshrq_n_u8): Remove. | |
40763 | (vshrq_n_u16): Remove. | |
40764 | (vshrq_n_u32): Remove. | |
40765 | (vrshrq_n_u8): Remove. | |
40766 | (vrshrq_n_s8): Remove. | |
40767 | (vrshrq_n_u16): Remove. | |
40768 | (vrshrq_n_s16): Remove. | |
40769 | (vrshrq_n_u32): Remove. | |
40770 | (vrshrq_n_s32): Remove. | |
40771 | (vrshrq_m_n_s8): Remove. | |
40772 | (vrshrq_m_n_s32): Remove. | |
40773 | (vrshrq_m_n_s16): Remove. | |
40774 | (vrshrq_m_n_u8): Remove. | |
40775 | (vrshrq_m_n_u32): Remove. | |
40776 | (vrshrq_m_n_u16): Remove. | |
40777 | (vshrq_m_n_s8): Remove. | |
40778 | (vshrq_m_n_s32): Remove. | |
40779 | (vshrq_m_n_s16): Remove. | |
40780 | (vshrq_m_n_u8): Remove. | |
40781 | (vshrq_m_n_u32): Remove. | |
40782 | (vshrq_m_n_u16): Remove. | |
40783 | (vrshrq_x_n_s8): Remove. | |
40784 | (vrshrq_x_n_s16): Remove. | |
40785 | (vrshrq_x_n_s32): Remove. | |
40786 | (vrshrq_x_n_u8): Remove. | |
40787 | (vrshrq_x_n_u16): Remove. | |
40788 | (vrshrq_x_n_u32): Remove. | |
40789 | (vshrq_x_n_s8): Remove. | |
40790 | (vshrq_x_n_s16): Remove. | |
40791 | (vshrq_x_n_s32): Remove. | |
40792 | (vshrq_x_n_u8): Remove. | |
40793 | (vshrq_x_n_u16): Remove. | |
40794 | (vshrq_x_n_u32): Remove. | |
40795 | (__arm_vshrq_n_s8): Remove. | |
40796 | (__arm_vshrq_n_s16): Remove. | |
40797 | (__arm_vshrq_n_s32): Remove. | |
40798 | (__arm_vshrq_n_u8): Remove. | |
40799 | (__arm_vshrq_n_u16): Remove. | |
40800 | (__arm_vshrq_n_u32): Remove. | |
40801 | (__arm_vrshrq_n_u8): Remove. | |
40802 | (__arm_vrshrq_n_s8): Remove. | |
40803 | (__arm_vrshrq_n_u16): Remove. | |
40804 | (__arm_vrshrq_n_s16): Remove. | |
40805 | (__arm_vrshrq_n_u32): Remove. | |
40806 | (__arm_vrshrq_n_s32): Remove. | |
40807 | (__arm_vrshrq_m_n_s8): Remove. | |
40808 | (__arm_vrshrq_m_n_s32): Remove. | |
40809 | (__arm_vrshrq_m_n_s16): Remove. | |
40810 | (__arm_vrshrq_m_n_u8): Remove. | |
40811 | (__arm_vrshrq_m_n_u32): Remove. | |
40812 | (__arm_vrshrq_m_n_u16): Remove. | |
40813 | (__arm_vshrq_m_n_s8): Remove. | |
40814 | (__arm_vshrq_m_n_s32): Remove. | |
40815 | (__arm_vshrq_m_n_s16): Remove. | |
40816 | (__arm_vshrq_m_n_u8): Remove. | |
40817 | (__arm_vshrq_m_n_u32): Remove. | |
40818 | (__arm_vshrq_m_n_u16): Remove. | |
40819 | (__arm_vrshrq_x_n_s8): Remove. | |
40820 | (__arm_vrshrq_x_n_s16): Remove. | |
40821 | (__arm_vrshrq_x_n_s32): Remove. | |
40822 | (__arm_vrshrq_x_n_u8): Remove. | |
40823 | (__arm_vrshrq_x_n_u16): Remove. | |
40824 | (__arm_vrshrq_x_n_u32): Remove. | |
40825 | (__arm_vshrq_x_n_s8): Remove. | |
40826 | (__arm_vshrq_x_n_s16): Remove. | |
40827 | (__arm_vshrq_x_n_s32): Remove. | |
40828 | (__arm_vshrq_x_n_u8): Remove. | |
40829 | (__arm_vshrq_x_n_u16): Remove. | |
40830 | (__arm_vshrq_x_n_u32): Remove. | |
40831 | (__arm_vshrq): Remove. | |
40832 | (__arm_vrshrq): Remove. | |
40833 | (__arm_vrshrq_m): Remove. | |
40834 | (__arm_vshrq_m): Remove. | |
40835 | (__arm_vrshrq_x): Remove. | |
40836 | (__arm_vshrq_x): Remove. | |
40837 | ||
40838 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40839 | ||
40840 | * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New. | |
40841 | (mve_insn): Add vrshr, vshr. | |
40842 | * config/arm/mve.md (mve_vshrq_n_<supf><mode>) | |
40843 | (mve_vrshrq_n_<supf><mode>): Merge into ... | |
40844 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
40845 | (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge | |
40846 | into ... | |
40847 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
40848 | ||
40849 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40850 | ||
40851 | * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New. | |
40852 | * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New. | |
40853 | ||
40854 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40855 | ||
40856 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New. | |
40857 | (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New. | |
40858 | * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq) | |
40859 | (vqrshrunbq, vqrshruntq): New. | |
40860 | * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq) | |
40861 | (vqrshrunbq, vqrshruntq): New. | |
40862 | * config/arm/arm-mve-builtins.cc | |
40863 | (function_instance::has_inactive_argument): Handle vqshrunbq, | |
40864 | vqshruntq, vqrshrunbq, vqrshruntq. | |
40865 | * config/arm/arm_mve.h (vqrshrunbq): Remove. | |
40866 | (vqrshruntq): Remove. | |
40867 | (vqrshrunbq_m): Remove. | |
40868 | (vqrshruntq_m): Remove. | |
40869 | (vqrshrunbq_n_s16): Remove. | |
40870 | (vqrshrunbq_n_s32): Remove. | |
40871 | (vqrshruntq_n_s16): Remove. | |
40872 | (vqrshruntq_n_s32): Remove. | |
40873 | (vqrshrunbq_m_n_s32): Remove. | |
40874 | (vqrshrunbq_m_n_s16): Remove. | |
40875 | (vqrshruntq_m_n_s32): Remove. | |
40876 | (vqrshruntq_m_n_s16): Remove. | |
40877 | (__arm_vqrshrunbq_n_s16): Remove. | |
40878 | (__arm_vqrshrunbq_n_s32): Remove. | |
40879 | (__arm_vqrshruntq_n_s16): Remove. | |
40880 | (__arm_vqrshruntq_n_s32): Remove. | |
40881 | (__arm_vqrshrunbq_m_n_s32): Remove. | |
40882 | (__arm_vqrshrunbq_m_n_s16): Remove. | |
40883 | (__arm_vqrshruntq_m_n_s32): Remove. | |
40884 | (__arm_vqrshruntq_m_n_s16): Remove. | |
40885 | (__arm_vqrshrunbq): Remove. | |
40886 | (__arm_vqrshruntq): Remove. | |
40887 | (__arm_vqrshrunbq_m): Remove. | |
40888 | (__arm_vqrshruntq_m): Remove. | |
40889 | (vqshrunbq): Remove. | |
40890 | (vqshruntq): Remove. | |
40891 | (vqshrunbq_m): Remove. | |
40892 | (vqshruntq_m): Remove. | |
40893 | (vqshrunbq_n_s16): Remove. | |
40894 | (vqshruntq_n_s16): Remove. | |
40895 | (vqshrunbq_n_s32): Remove. | |
40896 | (vqshruntq_n_s32): Remove. | |
40897 | (vqshrunbq_m_n_s32): Remove. | |
40898 | (vqshrunbq_m_n_s16): Remove. | |
40899 | (vqshruntq_m_n_s32): Remove. | |
40900 | (vqshruntq_m_n_s16): Remove. | |
40901 | (__arm_vqshrunbq_n_s16): Remove. | |
40902 | (__arm_vqshruntq_n_s16): Remove. | |
40903 | (__arm_vqshrunbq_n_s32): Remove. | |
40904 | (__arm_vqshruntq_n_s32): Remove. | |
40905 | (__arm_vqshrunbq_m_n_s32): Remove. | |
40906 | (__arm_vqshrunbq_m_n_s16): Remove. | |
40907 | (__arm_vqshruntq_m_n_s32): Remove. | |
40908 | (__arm_vqshruntq_m_n_s16): Remove. | |
40909 | (__arm_vqshrunbq): Remove. | |
40910 | (__arm_vqshruntq): Remove. | |
40911 | (__arm_vqshrunbq_m): Remove. | |
40912 | (__arm_vqshruntq_m): Remove. | |
40913 | ||
40914 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40915 | ||
40916 | * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ, | |
40917 | VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ. | |
40918 | (MVE_SHRN_M_N): Likewise. | |
40919 | (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt. | |
40920 | (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ. | |
40921 | (supf): Likewise. | |
40922 | * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove. | |
40923 | (mve_vqrshruntq_n_s<mode>): Remove. | |
40924 | (mve_vqshrunbq_n_s<mode>): Remove. | |
40925 | (mve_vqshruntq_n_s<mode>): Remove. | |
40926 | (mve_vqrshrunbq_m_n_s<mode>): Remove. | |
40927 | (mve_vqrshruntq_m_n_s<mode>): Remove. | |
40928 | (mve_vqshrunbq_m_n_s<mode>): Remove. | |
40929 | (mve_vqshruntq_m_n_s<mode>): Remove. | |
40930 | ||
40931 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40932 | ||
40933 | * config/arm/arm-mve-builtins-shapes.cc | |
40934 | (binary_rshift_narrow_unsigned): New. | |
40935 | * config/arm/arm-mve-builtins-shapes.h | |
40936 | (binary_rshift_narrow_unsigned): New. | |
40937 | ||
40938 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
40939 | ||
40940 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New. | |
40941 | (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq) | |
40942 | (vqrshrnbq, vqrshrntq): New. | |
40943 | * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq) | |
40944 | (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): | |
40945 | New. | |
40946 | * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq) | |
40947 | (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New. | |
40948 | * config/arm/arm-mve-builtins.cc | |
40949 | (function_instance::has_inactive_argument): Handle vshrnbq, | |
40950 | vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, | |
40951 | vqrshrntq. | |
40952 | * config/arm/arm_mve.h (vshrnbq): Remove. | |
40953 | (vshrntq): Remove. | |
40954 | (vshrnbq_m): Remove. | |
40955 | (vshrntq_m): Remove. | |
40956 | (vshrnbq_n_s16): Remove. | |
40957 | (vshrntq_n_s16): Remove. | |
40958 | (vshrnbq_n_u16): Remove. | |
40959 | (vshrntq_n_u16): Remove. | |
40960 | (vshrnbq_n_s32): Remove. | |
40961 | (vshrntq_n_s32): Remove. | |
40962 | (vshrnbq_n_u32): Remove. | |
40963 | (vshrntq_n_u32): Remove. | |
40964 | (vshrnbq_m_n_s32): Remove. | |
40965 | (vshrnbq_m_n_s16): Remove. | |
40966 | (vshrnbq_m_n_u32): Remove. | |
40967 | (vshrnbq_m_n_u16): Remove. | |
40968 | (vshrntq_m_n_s32): Remove. | |
40969 | (vshrntq_m_n_s16): Remove. | |
40970 | (vshrntq_m_n_u32): Remove. | |
40971 | (vshrntq_m_n_u16): Remove. | |
40972 | (__arm_vshrnbq_n_s16): Remove. | |
40973 | (__arm_vshrntq_n_s16): Remove. | |
40974 | (__arm_vshrnbq_n_u16): Remove. | |
40975 | (__arm_vshrntq_n_u16): Remove. | |
40976 | (__arm_vshrnbq_n_s32): Remove. | |
40977 | (__arm_vshrntq_n_s32): Remove. | |
40978 | (__arm_vshrnbq_n_u32): Remove. | |
40979 | (__arm_vshrntq_n_u32): Remove. | |
40980 | (__arm_vshrnbq_m_n_s32): Remove. | |
40981 | (__arm_vshrnbq_m_n_s16): Remove. | |
40982 | (__arm_vshrnbq_m_n_u32): Remove. | |
40983 | (__arm_vshrnbq_m_n_u16): Remove. | |
40984 | (__arm_vshrntq_m_n_s32): Remove. | |
40985 | (__arm_vshrntq_m_n_s16): Remove. | |
40986 | (__arm_vshrntq_m_n_u32): Remove. | |
40987 | (__arm_vshrntq_m_n_u16): Remove. | |
40988 | (__arm_vshrnbq): Remove. | |
40989 | (__arm_vshrntq): Remove. | |
40990 | (__arm_vshrnbq_m): Remove. | |
40991 | (__arm_vshrntq_m): Remove. | |
40992 | (vrshrnbq): Remove. | |
40993 | (vrshrntq): Remove. | |
40994 | (vrshrnbq_m): Remove. | |
40995 | (vrshrntq_m): Remove. | |
40996 | (vrshrnbq_n_s16): Remove. | |
40997 | (vrshrntq_n_s16): Remove. | |
40998 | (vrshrnbq_n_u16): Remove. | |
40999 | (vrshrntq_n_u16): Remove. | |
41000 | (vrshrnbq_n_s32): Remove. | |
41001 | (vrshrntq_n_s32): Remove. | |
41002 | (vrshrnbq_n_u32): Remove. | |
41003 | (vrshrntq_n_u32): Remove. | |
41004 | (vrshrnbq_m_n_s32): Remove. | |
41005 | (vrshrnbq_m_n_s16): Remove. | |
41006 | (vrshrnbq_m_n_u32): Remove. | |
41007 | (vrshrnbq_m_n_u16): Remove. | |
41008 | (vrshrntq_m_n_s32): Remove. | |
41009 | (vrshrntq_m_n_s16): Remove. | |
41010 | (vrshrntq_m_n_u32): Remove. | |
41011 | (vrshrntq_m_n_u16): Remove. | |
41012 | (__arm_vrshrnbq_n_s16): Remove. | |
41013 | (__arm_vrshrntq_n_s16): Remove. | |
41014 | (__arm_vrshrnbq_n_u16): Remove. | |
41015 | (__arm_vrshrntq_n_u16): Remove. | |
41016 | (__arm_vrshrnbq_n_s32): Remove. | |
41017 | (__arm_vrshrntq_n_s32): Remove. | |
41018 | (__arm_vrshrnbq_n_u32): Remove. | |
41019 | (__arm_vrshrntq_n_u32): Remove. | |
41020 | (__arm_vrshrnbq_m_n_s32): Remove. | |
41021 | (__arm_vrshrnbq_m_n_s16): Remove. | |
41022 | (__arm_vrshrnbq_m_n_u32): Remove. | |
41023 | (__arm_vrshrnbq_m_n_u16): Remove. | |
41024 | (__arm_vrshrntq_m_n_s32): Remove. | |
41025 | (__arm_vrshrntq_m_n_s16): Remove. | |
41026 | (__arm_vrshrntq_m_n_u32): Remove. | |
41027 | (__arm_vrshrntq_m_n_u16): Remove. | |
41028 | (__arm_vrshrnbq): Remove. | |
41029 | (__arm_vrshrntq): Remove. | |
41030 | (__arm_vrshrnbq_m): Remove. | |
41031 | (__arm_vrshrntq_m): Remove. | |
41032 | (vqshrnbq): Remove. | |
41033 | (vqshrntq): Remove. | |
41034 | (vqshrnbq_m): Remove. | |
41035 | (vqshrntq_m): Remove. | |
41036 | (vqshrnbq_n_s16): Remove. | |
41037 | (vqshrntq_n_s16): Remove. | |
41038 | (vqshrnbq_n_u16): Remove. | |
41039 | (vqshrntq_n_u16): Remove. | |
41040 | (vqshrnbq_n_s32): Remove. | |
41041 | (vqshrntq_n_s32): Remove. | |
41042 | (vqshrnbq_n_u32): Remove. | |
41043 | (vqshrntq_n_u32): Remove. | |
41044 | (vqshrnbq_m_n_s32): Remove. | |
41045 | (vqshrnbq_m_n_s16): Remove. | |
41046 | (vqshrnbq_m_n_u32): Remove. | |
41047 | (vqshrnbq_m_n_u16): Remove. | |
41048 | (vqshrntq_m_n_s32): Remove. | |
41049 | (vqshrntq_m_n_s16): Remove. | |
41050 | (vqshrntq_m_n_u32): Remove. | |
41051 | (vqshrntq_m_n_u16): Remove. | |
41052 | (__arm_vqshrnbq_n_s16): Remove. | |
41053 | (__arm_vqshrntq_n_s16): Remove. | |
41054 | (__arm_vqshrnbq_n_u16): Remove. | |
41055 | (__arm_vqshrntq_n_u16): Remove. | |
41056 | (__arm_vqshrnbq_n_s32): Remove. | |
41057 | (__arm_vqshrntq_n_s32): Remove. | |
41058 | (__arm_vqshrnbq_n_u32): Remove. | |
41059 | (__arm_vqshrntq_n_u32): Remove. | |
41060 | (__arm_vqshrnbq_m_n_s32): Remove. | |
41061 | (__arm_vqshrnbq_m_n_s16): Remove. | |
41062 | (__arm_vqshrnbq_m_n_u32): Remove. | |
41063 | (__arm_vqshrnbq_m_n_u16): Remove. | |
41064 | (__arm_vqshrntq_m_n_s32): Remove. | |
41065 | (__arm_vqshrntq_m_n_s16): Remove. | |
41066 | (__arm_vqshrntq_m_n_u32): Remove. | |
41067 | (__arm_vqshrntq_m_n_u16): Remove. | |
41068 | (__arm_vqshrnbq): Remove. | |
41069 | (__arm_vqshrntq): Remove. | |
41070 | (__arm_vqshrnbq_m): Remove. | |
41071 | (__arm_vqshrntq_m): Remove. | |
41072 | (vqrshrnbq): Remove. | |
41073 | (vqrshrntq): Remove. | |
41074 | (vqrshrnbq_m): Remove. | |
41075 | (vqrshrntq_m): Remove. | |
41076 | (vqrshrnbq_n_s16): Remove. | |
41077 | (vqrshrnbq_n_u16): Remove. | |
41078 | (vqrshrnbq_n_s32): Remove. | |
41079 | (vqrshrnbq_n_u32): Remove. | |
41080 | (vqrshrntq_n_s16): Remove. | |
41081 | (vqrshrntq_n_u16): Remove. | |
41082 | (vqrshrntq_n_s32): Remove. | |
41083 | (vqrshrntq_n_u32): Remove. | |
41084 | (vqrshrnbq_m_n_s32): Remove. | |
41085 | (vqrshrnbq_m_n_s16): Remove. | |
41086 | (vqrshrnbq_m_n_u32): Remove. | |
41087 | (vqrshrnbq_m_n_u16): Remove. | |
41088 | (vqrshrntq_m_n_s32): Remove. | |
41089 | (vqrshrntq_m_n_s16): Remove. | |
41090 | (vqrshrntq_m_n_u32): Remove. | |
41091 | (vqrshrntq_m_n_u16): Remove. | |
41092 | (__arm_vqrshrnbq_n_s16): Remove. | |
41093 | (__arm_vqrshrnbq_n_u16): Remove. | |
41094 | (__arm_vqrshrnbq_n_s32): Remove. | |
41095 | (__arm_vqrshrnbq_n_u32): Remove. | |
41096 | (__arm_vqrshrntq_n_s16): Remove. | |
41097 | (__arm_vqrshrntq_n_u16): Remove. | |
41098 | (__arm_vqrshrntq_n_s32): Remove. | |
41099 | (__arm_vqrshrntq_n_u32): Remove. | |
41100 | (__arm_vqrshrnbq_m_n_s32): Remove. | |
41101 | (__arm_vqrshrnbq_m_n_s16): Remove. | |
41102 | (__arm_vqrshrnbq_m_n_u32): Remove. | |
41103 | (__arm_vqrshrnbq_m_n_u16): Remove. | |
41104 | (__arm_vqrshrntq_m_n_s32): Remove. | |
41105 | (__arm_vqrshrntq_m_n_s16): Remove. | |
41106 | (__arm_vqrshrntq_m_n_u32): Remove. | |
41107 | (__arm_vqrshrntq_m_n_u16): Remove. | |
41108 | (__arm_vqrshrnbq): Remove. | |
41109 | (__arm_vqrshrntq): Remove. | |
41110 | (__arm_vqrshrnbq_m): Remove. | |
41111 | (__arm_vqrshrntq_m): Remove. | |
41112 | ||
41113 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41114 | ||
41115 | * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New. | |
41116 | (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb, | |
41117 | vrshrnt, vshrnb, vshrnt. | |
41118 | (isu): New. | |
41119 | * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>) | |
41120 | (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>) | |
41121 | (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>) | |
41122 | (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>) | |
41123 | (mve_vshrntq_n_<supf><mode>): Merge into ... | |
41124 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
41125 | (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>) | |
41126 | (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>) | |
41127 | (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>) | |
41128 | (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>): | |
41129 | Merge into ... | |
41130 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
41131 | ||
41132 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41133 | ||
41134 | * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow): | |
41135 | New. | |
41136 | * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New. | |
41137 | ||
41138 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41139 | ||
41140 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New. | |
41141 | (vmaxq, vminq): New. | |
41142 | * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New. | |
41143 | * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New. | |
41144 | * config/arm/arm_mve.h (vminq): Remove. | |
41145 | (vmaxq): Remove. | |
41146 | (vmaxq_m): Remove. | |
41147 | (vminq_m): Remove. | |
41148 | (vminq_x): Remove. | |
41149 | (vmaxq_x): Remove. | |
41150 | (vminq_u8): Remove. | |
41151 | (vmaxq_u8): Remove. | |
41152 | (vminq_s8): Remove. | |
41153 | (vmaxq_s8): Remove. | |
41154 | (vminq_u16): Remove. | |
41155 | (vmaxq_u16): Remove. | |
41156 | (vminq_s16): Remove. | |
41157 | (vmaxq_s16): Remove. | |
41158 | (vminq_u32): Remove. | |
41159 | (vmaxq_u32): Remove. | |
41160 | (vminq_s32): Remove. | |
41161 | (vmaxq_s32): Remove. | |
41162 | (vmaxq_m_s8): Remove. | |
41163 | (vmaxq_m_s32): Remove. | |
41164 | (vmaxq_m_s16): Remove. | |
41165 | (vmaxq_m_u8): Remove. | |
41166 | (vmaxq_m_u32): Remove. | |
41167 | (vmaxq_m_u16): Remove. | |
41168 | (vminq_m_s8): Remove. | |
41169 | (vminq_m_s32): Remove. | |
41170 | (vminq_m_s16): Remove. | |
41171 | (vminq_m_u8): Remove. | |
41172 | (vminq_m_u32): Remove. | |
41173 | (vminq_m_u16): Remove. | |
41174 | (vminq_x_s8): Remove. | |
41175 | (vminq_x_s16): Remove. | |
41176 | (vminq_x_s32): Remove. | |
41177 | (vminq_x_u8): Remove. | |
41178 | (vminq_x_u16): Remove. | |
41179 | (vminq_x_u32): Remove. | |
41180 | (vmaxq_x_s8): Remove. | |
41181 | (vmaxq_x_s16): Remove. | |
41182 | (vmaxq_x_s32): Remove. | |
41183 | (vmaxq_x_u8): Remove. | |
41184 | (vmaxq_x_u16): Remove. | |
41185 | (vmaxq_x_u32): Remove. | |
41186 | (__arm_vminq_u8): Remove. | |
41187 | (__arm_vmaxq_u8): Remove. | |
41188 | (__arm_vminq_s8): Remove. | |
41189 | (__arm_vmaxq_s8): Remove. | |
41190 | (__arm_vminq_u16): Remove. | |
41191 | (__arm_vmaxq_u16): Remove. | |
41192 | (__arm_vminq_s16): Remove. | |
41193 | (__arm_vmaxq_s16): Remove. | |
41194 | (__arm_vminq_u32): Remove. | |
41195 | (__arm_vmaxq_u32): Remove. | |
41196 | (__arm_vminq_s32): Remove. | |
41197 | (__arm_vmaxq_s32): Remove. | |
41198 | (__arm_vmaxq_m_s8): Remove. | |
41199 | (__arm_vmaxq_m_s32): Remove. | |
41200 | (__arm_vmaxq_m_s16): Remove. | |
41201 | (__arm_vmaxq_m_u8): Remove. | |
41202 | (__arm_vmaxq_m_u32): Remove. | |
41203 | (__arm_vmaxq_m_u16): Remove. | |
41204 | (__arm_vminq_m_s8): Remove. | |
41205 | (__arm_vminq_m_s32): Remove. | |
41206 | (__arm_vminq_m_s16): Remove. | |
41207 | (__arm_vminq_m_u8): Remove. | |
41208 | (__arm_vminq_m_u32): Remove. | |
41209 | (__arm_vminq_m_u16): Remove. | |
41210 | (__arm_vminq_x_s8): Remove. | |
41211 | (__arm_vminq_x_s16): Remove. | |
41212 | (__arm_vminq_x_s32): Remove. | |
41213 | (__arm_vminq_x_u8): Remove. | |
41214 | (__arm_vminq_x_u16): Remove. | |
41215 | (__arm_vminq_x_u32): Remove. | |
41216 | (__arm_vmaxq_x_s8): Remove. | |
41217 | (__arm_vmaxq_x_s16): Remove. | |
41218 | (__arm_vmaxq_x_s32): Remove. | |
41219 | (__arm_vmaxq_x_u8): Remove. | |
41220 | (__arm_vmaxq_x_u16): Remove. | |
41221 | (__arm_vmaxq_x_u32): Remove. | |
41222 | (__arm_vminq): Remove. | |
41223 | (__arm_vmaxq): Remove. | |
41224 | (__arm_vmaxq_m): Remove. | |
41225 | (__arm_vminq_m): Remove. | |
41226 | (__arm_vminq_x): Remove. | |
41227 | (__arm_vmaxq_x): Remove. | |
41228 | ||
41229 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41230 | ||
41231 | * config/arm/iterators.md (MAX_MIN_SU): New. | |
41232 | (max_min_su_str): New. | |
41233 | (max_min_supf): New. | |
41234 | * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>) | |
41235 | (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ... | |
41236 | (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this. | |
41237 | ||
41238 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41239 | ||
41240 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New. | |
41241 | (vqshlq, vshlq): New. | |
41242 | * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New. | |
41243 | * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New. | |
41244 | * config/arm/arm_mve.h (vshlq): Remove. | |
41245 | (vshlq_r): Remove. | |
41246 | (vshlq_n): Remove. | |
41247 | (vshlq_m_r): Remove. | |
41248 | (vshlq_m): Remove. | |
41249 | (vshlq_m_n): Remove. | |
41250 | (vshlq_x): Remove. | |
41251 | (vshlq_x_n): Remove. | |
41252 | (vshlq_s8): Remove. | |
41253 | (vshlq_s16): Remove. | |
41254 | (vshlq_s32): Remove. | |
41255 | (vshlq_u8): Remove. | |
41256 | (vshlq_u16): Remove. | |
41257 | (vshlq_u32): Remove. | |
41258 | (vshlq_r_u8): Remove. | |
41259 | (vshlq_n_u8): Remove. | |
41260 | (vshlq_r_s8): Remove. | |
41261 | (vshlq_n_s8): Remove. | |
41262 | (vshlq_r_u16): Remove. | |
41263 | (vshlq_n_u16): Remove. | |
41264 | (vshlq_r_s16): Remove. | |
41265 | (vshlq_n_s16): Remove. | |
41266 | (vshlq_r_u32): Remove. | |
41267 | (vshlq_n_u32): Remove. | |
41268 | (vshlq_r_s32): Remove. | |
41269 | (vshlq_n_s32): Remove. | |
41270 | (vshlq_m_r_u8): Remove. | |
41271 | (vshlq_m_r_s8): Remove. | |
41272 | (vshlq_m_r_u16): Remove. | |
41273 | (vshlq_m_r_s16): Remove. | |
41274 | (vshlq_m_r_u32): Remove. | |
41275 | (vshlq_m_r_s32): Remove. | |
41276 | (vshlq_m_u8): Remove. | |
41277 | (vshlq_m_s8): Remove. | |
41278 | (vshlq_m_u16): Remove. | |
41279 | (vshlq_m_s16): Remove. | |
41280 | (vshlq_m_u32): Remove. | |
41281 | (vshlq_m_s32): Remove. | |
41282 | (vshlq_m_n_s8): Remove. | |
41283 | (vshlq_m_n_s32): Remove. | |
41284 | (vshlq_m_n_s16): Remove. | |
41285 | (vshlq_m_n_u8): Remove. | |
41286 | (vshlq_m_n_u32): Remove. | |
41287 | (vshlq_m_n_u16): Remove. | |
41288 | (vshlq_x_s8): Remove. | |
41289 | (vshlq_x_s16): Remove. | |
41290 | (vshlq_x_s32): Remove. | |
41291 | (vshlq_x_u8): Remove. | |
41292 | (vshlq_x_u16): Remove. | |
41293 | (vshlq_x_u32): Remove. | |
41294 | (vshlq_x_n_s8): Remove. | |
41295 | (vshlq_x_n_s16): Remove. | |
41296 | (vshlq_x_n_s32): Remove. | |
41297 | (vshlq_x_n_u8): Remove. | |
41298 | (vshlq_x_n_u16): Remove. | |
41299 | (vshlq_x_n_u32): Remove. | |
41300 | (__arm_vshlq_s8): Remove. | |
41301 | (__arm_vshlq_s16): Remove. | |
41302 | (__arm_vshlq_s32): Remove. | |
41303 | (__arm_vshlq_u8): Remove. | |
41304 | (__arm_vshlq_u16): Remove. | |
41305 | (__arm_vshlq_u32): Remove. | |
41306 | (__arm_vshlq_r_u8): Remove. | |
41307 | (__arm_vshlq_n_u8): Remove. | |
41308 | (__arm_vshlq_r_s8): Remove. | |
41309 | (__arm_vshlq_n_s8): Remove. | |
41310 | (__arm_vshlq_r_u16): Remove. | |
41311 | (__arm_vshlq_n_u16): Remove. | |
41312 | (__arm_vshlq_r_s16): Remove. | |
41313 | (__arm_vshlq_n_s16): Remove. | |
41314 | (__arm_vshlq_r_u32): Remove. | |
41315 | (__arm_vshlq_n_u32): Remove. | |
41316 | (__arm_vshlq_r_s32): Remove. | |
41317 | (__arm_vshlq_n_s32): Remove. | |
41318 | (__arm_vshlq_m_r_u8): Remove. | |
41319 | (__arm_vshlq_m_r_s8): Remove. | |
41320 | (__arm_vshlq_m_r_u16): Remove. | |
41321 | (__arm_vshlq_m_r_s16): Remove. | |
41322 | (__arm_vshlq_m_r_u32): Remove. | |
41323 | (__arm_vshlq_m_r_s32): Remove. | |
41324 | (__arm_vshlq_m_u8): Remove. | |
41325 | (__arm_vshlq_m_s8): Remove. | |
41326 | (__arm_vshlq_m_u16): Remove. | |
41327 | (__arm_vshlq_m_s16): Remove. | |
41328 | (__arm_vshlq_m_u32): Remove. | |
41329 | (__arm_vshlq_m_s32): Remove. | |
41330 | (__arm_vshlq_m_n_s8): Remove. | |
41331 | (__arm_vshlq_m_n_s32): Remove. | |
41332 | (__arm_vshlq_m_n_s16): Remove. | |
41333 | (__arm_vshlq_m_n_u8): Remove. | |
41334 | (__arm_vshlq_m_n_u32): Remove. | |
41335 | (__arm_vshlq_m_n_u16): Remove. | |
41336 | (__arm_vshlq_x_s8): Remove. | |
41337 | (__arm_vshlq_x_s16): Remove. | |
41338 | (__arm_vshlq_x_s32): Remove. | |
41339 | (__arm_vshlq_x_u8): Remove. | |
41340 | (__arm_vshlq_x_u16): Remove. | |
41341 | (__arm_vshlq_x_u32): Remove. | |
41342 | (__arm_vshlq_x_n_s8): Remove. | |
41343 | (__arm_vshlq_x_n_s16): Remove. | |
41344 | (__arm_vshlq_x_n_s32): Remove. | |
41345 | (__arm_vshlq_x_n_u8): Remove. | |
41346 | (__arm_vshlq_x_n_u16): Remove. | |
41347 | (__arm_vshlq_x_n_u32): Remove. | |
41348 | (__arm_vshlq): Remove. | |
41349 | (__arm_vshlq_r): Remove. | |
41350 | (__arm_vshlq_n): Remove. | |
41351 | (__arm_vshlq_m_r): Remove. | |
41352 | (__arm_vshlq_m): Remove. | |
41353 | (__arm_vshlq_m_n): Remove. | |
41354 | (__arm_vshlq_x): Remove. | |
41355 | (__arm_vshlq_x_n): Remove. | |
41356 | (vqshlq): Remove. | |
41357 | (vqshlq_r): Remove. | |
41358 | (vqshlq_n): Remove. | |
41359 | (vqshlq_m_r): Remove. | |
41360 | (vqshlq_m_n): Remove. | |
41361 | (vqshlq_m): Remove. | |
41362 | (vqshlq_u8): Remove. | |
41363 | (vqshlq_r_u8): Remove. | |
41364 | (vqshlq_n_u8): Remove. | |
41365 | (vqshlq_s8): Remove. | |
41366 | (vqshlq_r_s8): Remove. | |
41367 | (vqshlq_n_s8): Remove. | |
41368 | (vqshlq_u16): Remove. | |
41369 | (vqshlq_r_u16): Remove. | |
41370 | (vqshlq_n_u16): Remove. | |
41371 | (vqshlq_s16): Remove. | |
41372 | (vqshlq_r_s16): Remove. | |
41373 | (vqshlq_n_s16): Remove. | |
41374 | (vqshlq_u32): Remove. | |
41375 | (vqshlq_r_u32): Remove. | |
41376 | (vqshlq_n_u32): Remove. | |
41377 | (vqshlq_s32): Remove. | |
41378 | (vqshlq_r_s32): Remove. | |
41379 | (vqshlq_n_s32): Remove. | |
41380 | (vqshlq_m_r_u8): Remove. | |
41381 | (vqshlq_m_r_s8): Remove. | |
41382 | (vqshlq_m_r_u16): Remove. | |
41383 | (vqshlq_m_r_s16): Remove. | |
41384 | (vqshlq_m_r_u32): Remove. | |
41385 | (vqshlq_m_r_s32): Remove. | |
41386 | (vqshlq_m_n_s8): Remove. | |
41387 | (vqshlq_m_n_s32): Remove. | |
41388 | (vqshlq_m_n_s16): Remove. | |
41389 | (vqshlq_m_n_u8): Remove. | |
41390 | (vqshlq_m_n_u32): Remove. | |
41391 | (vqshlq_m_n_u16): Remove. | |
41392 | (vqshlq_m_s8): Remove. | |
41393 | (vqshlq_m_s32): Remove. | |
41394 | (vqshlq_m_s16): Remove. | |
41395 | (vqshlq_m_u8): Remove. | |
41396 | (vqshlq_m_u32): Remove. | |
41397 | (vqshlq_m_u16): Remove. | |
41398 | (__arm_vqshlq_u8): Remove. | |
41399 | (__arm_vqshlq_r_u8): Remove. | |
41400 | (__arm_vqshlq_n_u8): Remove. | |
41401 | (__arm_vqshlq_s8): Remove. | |
41402 | (__arm_vqshlq_r_s8): Remove. | |
41403 | (__arm_vqshlq_n_s8): Remove. | |
41404 | (__arm_vqshlq_u16): Remove. | |
41405 | (__arm_vqshlq_r_u16): Remove. | |
41406 | (__arm_vqshlq_n_u16): Remove. | |
41407 | (__arm_vqshlq_s16): Remove. | |
41408 | (__arm_vqshlq_r_s16): Remove. | |
41409 | (__arm_vqshlq_n_s16): Remove. | |
41410 | (__arm_vqshlq_u32): Remove. | |
41411 | (__arm_vqshlq_r_u32): Remove. | |
41412 | (__arm_vqshlq_n_u32): Remove. | |
41413 | (__arm_vqshlq_s32): Remove. | |
41414 | (__arm_vqshlq_r_s32): Remove. | |
41415 | (__arm_vqshlq_n_s32): Remove. | |
41416 | (__arm_vqshlq_m_r_u8): Remove. | |
41417 | (__arm_vqshlq_m_r_s8): Remove. | |
41418 | (__arm_vqshlq_m_r_u16): Remove. | |
41419 | (__arm_vqshlq_m_r_s16): Remove. | |
41420 | (__arm_vqshlq_m_r_u32): Remove. | |
41421 | (__arm_vqshlq_m_r_s32): Remove. | |
41422 | (__arm_vqshlq_m_n_s8): Remove. | |
41423 | (__arm_vqshlq_m_n_s32): Remove. | |
41424 | (__arm_vqshlq_m_n_s16): Remove. | |
41425 | (__arm_vqshlq_m_n_u8): Remove. | |
41426 | (__arm_vqshlq_m_n_u32): Remove. | |
41427 | (__arm_vqshlq_m_n_u16): Remove. | |
41428 | (__arm_vqshlq_m_s8): Remove. | |
41429 | (__arm_vqshlq_m_s32): Remove. | |
41430 | (__arm_vqshlq_m_s16): Remove. | |
41431 | (__arm_vqshlq_m_u8): Remove. | |
41432 | (__arm_vqshlq_m_u32): Remove. | |
41433 | (__arm_vqshlq_m_u16): Remove. | |
41434 | (__arm_vqshlq): Remove. | |
41435 | (__arm_vqshlq_r): Remove. | |
41436 | (__arm_vqshlq_n): Remove. | |
41437 | (__arm_vqshlq_m_r): Remove. | |
41438 | (__arm_vqshlq_m_n): Remove. | |
41439 | (__arm_vqshlq_m): Remove. | |
41440 | ||
41441 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41442 | ||
41443 | * config/arm/arm-mve-builtins-functions.h (class | |
41444 | unspec_mve_function_exact_insn_vshl): New. | |
41445 | ||
41446 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41447 | ||
41448 | * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New. | |
41449 | * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New. | |
41450 | ||
41451 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41452 | ||
41453 | * config/arm/arm-mve-builtins.cc (has_inactive_argument) | |
41454 | (finish_opt_n_resolution): Handle MODE_r. | |
41455 | * config/arm/arm-mve-builtins.def (r): New mode. | |
41456 | ||
41457 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41458 | ||
41459 | * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New. | |
41460 | * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New. | |
41461 | ||
41462 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41463 | ||
41464 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New. | |
41465 | (vabdq): New. | |
41466 | * config/arm/arm-mve-builtins-base.def (vabdq): New. | |
41467 | * config/arm/arm-mve-builtins-base.h (vabdq): New. | |
41468 | * config/arm/arm_mve.h (vabdq): Remove. | |
41469 | (vabdq_m): Remove. | |
41470 | (vabdq_x): Remove. | |
41471 | (vabdq_u8): Remove. | |
41472 | (vabdq_s8): Remove. | |
41473 | (vabdq_u16): Remove. | |
41474 | (vabdq_s16): Remove. | |
41475 | (vabdq_u32): Remove. | |
41476 | (vabdq_s32): Remove. | |
41477 | (vabdq_f16): Remove. | |
41478 | (vabdq_f32): Remove. | |
41479 | (vabdq_m_s8): Remove. | |
41480 | (vabdq_m_s32): Remove. | |
41481 | (vabdq_m_s16): Remove. | |
41482 | (vabdq_m_u8): Remove. | |
41483 | (vabdq_m_u32): Remove. | |
41484 | (vabdq_m_u16): Remove. | |
41485 | (vabdq_m_f32): Remove. | |
41486 | (vabdq_m_f16): Remove. | |
41487 | (vabdq_x_s8): Remove. | |
41488 | (vabdq_x_s16): Remove. | |
41489 | (vabdq_x_s32): Remove. | |
41490 | (vabdq_x_u8): Remove. | |
41491 | (vabdq_x_u16): Remove. | |
41492 | (vabdq_x_u32): Remove. | |
41493 | (vabdq_x_f16): Remove. | |
41494 | (vabdq_x_f32): Remove. | |
41495 | (__arm_vabdq_u8): Remove. | |
41496 | (__arm_vabdq_s8): Remove. | |
41497 | (__arm_vabdq_u16): Remove. | |
41498 | (__arm_vabdq_s16): Remove. | |
41499 | (__arm_vabdq_u32): Remove. | |
41500 | (__arm_vabdq_s32): Remove. | |
41501 | (__arm_vabdq_m_s8): Remove. | |
41502 | (__arm_vabdq_m_s32): Remove. | |
41503 | (__arm_vabdq_m_s16): Remove. | |
41504 | (__arm_vabdq_m_u8): Remove. | |
41505 | (__arm_vabdq_m_u32): Remove. | |
41506 | (__arm_vabdq_m_u16): Remove. | |
41507 | (__arm_vabdq_x_s8): Remove. | |
41508 | (__arm_vabdq_x_s16): Remove. | |
41509 | (__arm_vabdq_x_s32): Remove. | |
41510 | (__arm_vabdq_x_u8): Remove. | |
41511 | (__arm_vabdq_x_u16): Remove. | |
41512 | (__arm_vabdq_x_u32): Remove. | |
41513 | (__arm_vabdq_f16): Remove. | |
41514 | (__arm_vabdq_f32): Remove. | |
41515 | (__arm_vabdq_m_f32): Remove. | |
41516 | (__arm_vabdq_m_f16): Remove. | |
41517 | (__arm_vabdq_x_f16): Remove. | |
41518 | (__arm_vabdq_x_f32): Remove. | |
41519 | (__arm_vabdq): Remove. | |
41520 | (__arm_vabdq_m): Remove. | |
41521 | (__arm_vabdq_x): Remove. | |
41522 | ||
41523 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41524 | ||
41525 | * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq. | |
41526 | (MVE_FP_VABDQ_ONLY): New. | |
41527 | (mve_insn): Add vabd. | |
41528 | * config/arm/mve.md (mve_vabdq_f<mode>): Move into ... | |
41529 | (@mve_<mve_insn>q_f<mode>): ... this. | |
41530 | (mve_vabdq_m_f<mode>): Remove. | |
41531 | ||
41532 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41533 | ||
41534 | * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New. | |
41535 | * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New. | |
41536 | * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New. | |
41537 | * config/arm/arm_mve.h (vqrdmulhq): Remove. | |
41538 | (vqrdmulhq_m): Remove. | |
41539 | (vqrdmulhq_s8): Remove. | |
41540 | (vqrdmulhq_n_s8): Remove. | |
41541 | (vqrdmulhq_s16): Remove. | |
41542 | (vqrdmulhq_n_s16): Remove. | |
41543 | (vqrdmulhq_s32): Remove. | |
41544 | (vqrdmulhq_n_s32): Remove. | |
41545 | (vqrdmulhq_m_n_s8): Remove. | |
41546 | (vqrdmulhq_m_n_s32): Remove. | |
41547 | (vqrdmulhq_m_n_s16): Remove. | |
41548 | (vqrdmulhq_m_s8): Remove. | |
41549 | (vqrdmulhq_m_s32): Remove. | |
41550 | (vqrdmulhq_m_s16): Remove. | |
41551 | (__arm_vqrdmulhq_s8): Remove. | |
41552 | (__arm_vqrdmulhq_n_s8): Remove. | |
41553 | (__arm_vqrdmulhq_s16): Remove. | |
41554 | (__arm_vqrdmulhq_n_s16): Remove. | |
41555 | (__arm_vqrdmulhq_s32): Remove. | |
41556 | (__arm_vqrdmulhq_n_s32): Remove. | |
41557 | (__arm_vqrdmulhq_m_n_s8): Remove. | |
41558 | (__arm_vqrdmulhq_m_n_s32): Remove. | |
41559 | (__arm_vqrdmulhq_m_n_s16): Remove. | |
41560 | (__arm_vqrdmulhq_m_s8): Remove. | |
41561 | (__arm_vqrdmulhq_m_s32): Remove. | |
41562 | (__arm_vqrdmulhq_m_s16): Remove. | |
41563 | (__arm_vqrdmulhq): Remove. | |
41564 | (__arm_vqrdmulhq_m): Remove. | |
41565 | ||
41566 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41567 | ||
41568 | * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N) | |
41569 | (MVE_SHIFT_N, MVE_SHIFT_R): New. | |
41570 | (mve_insn): Add vqshl, vshl. | |
41571 | * config/arm/mve.md (mve_vqshlq_n_<supf><mode>) | |
41572 | (mve_vshlq_n_<supf><mode>): Merge into ... | |
41573 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
41574 | (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into | |
41575 | ... | |
41576 | (@mve_<mve_insn>q_r_<supf><mode>): ... this. | |
41577 | (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge | |
41578 | into ... | |
41579 | (@mve_<mve_insn>q_m_r_<supf><mode>): ... this. | |
41580 | (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge | |
41581 | into ... | |
41582 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
41583 | * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform | |
41584 | into ... | |
41585 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
41586 | ||
41587 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41588 | ||
41589 | * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New. | |
41590 | * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New. | |
41591 | * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New. | |
41592 | * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle | |
41593 | vqrshlq, vrshlq. | |
41594 | * config/arm/arm_mve.h (vrshlq): Remove. | |
41595 | (vrshlq_m_n): Remove. | |
41596 | (vrshlq_m): Remove. | |
41597 | (vrshlq_x): Remove. | |
41598 | (vrshlq_u8): Remove. | |
41599 | (vrshlq_n_u8): Remove. | |
41600 | (vrshlq_s8): Remove. | |
41601 | (vrshlq_n_s8): Remove. | |
41602 | (vrshlq_u16): Remove. | |
41603 | (vrshlq_n_u16): Remove. | |
41604 | (vrshlq_s16): Remove. | |
41605 | (vrshlq_n_s16): Remove. | |
41606 | (vrshlq_u32): Remove. | |
41607 | (vrshlq_n_u32): Remove. | |
41608 | (vrshlq_s32): Remove. | |
41609 | (vrshlq_n_s32): Remove. | |
41610 | (vrshlq_m_n_u8): Remove. | |
41611 | (vrshlq_m_n_s8): Remove. | |
41612 | (vrshlq_m_n_u16): Remove. | |
41613 | (vrshlq_m_n_s16): Remove. | |
41614 | (vrshlq_m_n_u32): Remove. | |
41615 | (vrshlq_m_n_s32): Remove. | |
41616 | (vrshlq_m_s8): Remove. | |
41617 | (vrshlq_m_s32): Remove. | |
41618 | (vrshlq_m_s16): Remove. | |
41619 | (vrshlq_m_u8): Remove. | |
41620 | (vrshlq_m_u32): Remove. | |
41621 | (vrshlq_m_u16): Remove. | |
41622 | (vrshlq_x_s8): Remove. | |
41623 | (vrshlq_x_s16): Remove. | |
41624 | (vrshlq_x_s32): Remove. | |
41625 | (vrshlq_x_u8): Remove. | |
41626 | (vrshlq_x_u16): Remove. | |
41627 | (vrshlq_x_u32): Remove. | |
41628 | (__arm_vrshlq_u8): Remove. | |
41629 | (__arm_vrshlq_n_u8): Remove. | |
41630 | (__arm_vrshlq_s8): Remove. | |
41631 | (__arm_vrshlq_n_s8): Remove. | |
41632 | (__arm_vrshlq_u16): Remove. | |
41633 | (__arm_vrshlq_n_u16): Remove. | |
41634 | (__arm_vrshlq_s16): Remove. | |
41635 | (__arm_vrshlq_n_s16): Remove. | |
41636 | (__arm_vrshlq_u32): Remove. | |
41637 | (__arm_vrshlq_n_u32): Remove. | |
41638 | (__arm_vrshlq_s32): Remove. | |
41639 | (__arm_vrshlq_n_s32): Remove. | |
41640 | (__arm_vrshlq_m_n_u8): Remove. | |
41641 | (__arm_vrshlq_m_n_s8): Remove. | |
41642 | (__arm_vrshlq_m_n_u16): Remove. | |
41643 | (__arm_vrshlq_m_n_s16): Remove. | |
41644 | (__arm_vrshlq_m_n_u32): Remove. | |
41645 | (__arm_vrshlq_m_n_s32): Remove. | |
41646 | (__arm_vrshlq_m_s8): Remove. | |
41647 | (__arm_vrshlq_m_s32): Remove. | |
41648 | (__arm_vrshlq_m_s16): Remove. | |
41649 | (__arm_vrshlq_m_u8): Remove. | |
41650 | (__arm_vrshlq_m_u32): Remove. | |
41651 | (__arm_vrshlq_m_u16): Remove. | |
41652 | (__arm_vrshlq_x_s8): Remove. | |
41653 | (__arm_vrshlq_x_s16): Remove. | |
41654 | (__arm_vrshlq_x_s32): Remove. | |
41655 | (__arm_vrshlq_x_u8): Remove. | |
41656 | (__arm_vrshlq_x_u16): Remove. | |
41657 | (__arm_vrshlq_x_u32): Remove. | |
41658 | (__arm_vrshlq): Remove. | |
41659 | (__arm_vrshlq_m_n): Remove. | |
41660 | (__arm_vrshlq_m): Remove. | |
41661 | (__arm_vrshlq_x): Remove. | |
41662 | (vqrshlq): Remove. | |
41663 | (vqrshlq_m_n): Remove. | |
41664 | (vqrshlq_m): Remove. | |
41665 | (vqrshlq_u8): Remove. | |
41666 | (vqrshlq_n_u8): Remove. | |
41667 | (vqrshlq_s8): Remove. | |
41668 | (vqrshlq_n_s8): Remove. | |
41669 | (vqrshlq_u16): Remove. | |
41670 | (vqrshlq_n_u16): Remove. | |
41671 | (vqrshlq_s16): Remove. | |
41672 | (vqrshlq_n_s16): Remove. | |
41673 | (vqrshlq_u32): Remove. | |
41674 | (vqrshlq_n_u32): Remove. | |
41675 | (vqrshlq_s32): Remove. | |
41676 | (vqrshlq_n_s32): Remove. | |
41677 | (vqrshlq_m_n_u8): Remove. | |
41678 | (vqrshlq_m_n_s8): Remove. | |
41679 | (vqrshlq_m_n_u16): Remove. | |
41680 | (vqrshlq_m_n_s16): Remove. | |
41681 | (vqrshlq_m_n_u32): Remove. | |
41682 | (vqrshlq_m_n_s32): Remove. | |
41683 | (vqrshlq_m_s8): Remove. | |
41684 | (vqrshlq_m_s32): Remove. | |
41685 | (vqrshlq_m_s16): Remove. | |
41686 | (vqrshlq_m_u8): Remove. | |
41687 | (vqrshlq_m_u32): Remove. | |
41688 | (vqrshlq_m_u16): Remove. | |
41689 | (__arm_vqrshlq_u8): Remove. | |
41690 | (__arm_vqrshlq_n_u8): Remove. | |
41691 | (__arm_vqrshlq_s8): Remove. | |
41692 | (__arm_vqrshlq_n_s8): Remove. | |
41693 | (__arm_vqrshlq_u16): Remove. | |
41694 | (__arm_vqrshlq_n_u16): Remove. | |
41695 | (__arm_vqrshlq_s16): Remove. | |
41696 | (__arm_vqrshlq_n_s16): Remove. | |
41697 | (__arm_vqrshlq_u32): Remove. | |
41698 | (__arm_vqrshlq_n_u32): Remove. | |
41699 | (__arm_vqrshlq_s32): Remove. | |
41700 | (__arm_vqrshlq_n_s32): Remove. | |
41701 | (__arm_vqrshlq_m_n_u8): Remove. | |
41702 | (__arm_vqrshlq_m_n_s8): Remove. | |
41703 | (__arm_vqrshlq_m_n_u16): Remove. | |
41704 | (__arm_vqrshlq_m_n_s16): Remove. | |
41705 | (__arm_vqrshlq_m_n_u32): Remove. | |
41706 | (__arm_vqrshlq_m_n_s32): Remove. | |
41707 | (__arm_vqrshlq_m_s8): Remove. | |
41708 | (__arm_vqrshlq_m_s32): Remove. | |
41709 | (__arm_vqrshlq_m_s16): Remove. | |
41710 | (__arm_vqrshlq_m_u8): Remove. | |
41711 | (__arm_vqrshlq_m_u32): Remove. | |
41712 | (__arm_vqrshlq_m_u16): Remove. | |
41713 | (__arm_vqrshlq): Remove. | |
41714 | (__arm_vqrshlq_m_n): Remove. | |
41715 | (__arm_vqrshlq_m): Remove. | |
41716 | ||
41717 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41718 | ||
41719 | * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New. | |
41720 | (mve_insn): Add vqrshl, vrshl. | |
41721 | * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>) | |
41722 | (mve_vrshlq_n_<supf><mode>): Merge into ... | |
41723 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
41724 | (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge | |
41725 | into ... | |
41726 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
41727 | ||
41728 | 2023-05-05 Christophe Lyon <christophe.lyon@arm.com> | |
41729 | ||
41730 | * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New. | |
41731 | * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New. | |
41732 | ||
41733 | 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
41734 | ||
41735 | PR target/109615 | |
41736 | * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add | |
41737 | denegrate PHI optmization. | |
41738 | ||
41739 | 2023-05-05 Uros Bizjak <ubizjak@gmail.com> | |
41740 | ||
41741 | * config/i386/predicates.md (register_no_SP_operand): | |
41742 | Rename from index_register_operand. | |
41743 | (call_register_operand): Update for rename. | |
41744 | * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename. | |
41745 | ||
41746 | 2023-05-05 Tamar Christina <tamar.christina@arm.com> | |
41747 | ||
41748 | PR bootstrap/84402 | |
41749 | * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ, | |
41750 | GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O, | |
41751 | GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New. | |
41752 | (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them. | |
41753 | (s-match): Split into s-generic-match and s-gimple-match. | |
41754 | * configure.ac (with-matchpd-partitions, | |
41755 | DEFAULT_MATCHPD_PARTITIONS): New. | |
41756 | * configure: Regenerate. | |
41757 | ||
41758 | 2023-05-05 Tamar Christina <tamar.christina@arm.com> | |
41759 | ||
41760 | PR bootstrap/84402 | |
41761 | * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New. | |
41762 | (decision_tree::gen): Accept list of files instead of single and update | |
41763 | to write function definition to header and main file. | |
41764 | (write_predicate): Likewise. | |
41765 | (write_header): Emit pragmas and new includes. | |
41766 | (main): Create file buffers and cleanup. | |
41767 | (showUsage, write_header_includes): New. | |
41768 | ||
41769 | 2023-05-05 Tamar Christina <tamar.christina@arm.com> | |
41770 | ||
41771 | PR bootstrap/84402 | |
41772 | * Makefile.in (OBJS): Add gimple-match-exports.o. | |
41773 | * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers. | |
41774 | * gimple-match-head.cc (gimple_simplify, gimple_resimplify1, | |
41775 | gimple_resimplify2, gimple_resimplify3, gimple_resimplify4, | |
41776 | gimple_resimplify5, constant_for_folding, convert_conditional_op, | |
41777 | maybe_resimplify_conditional_op, gimple_match_op::resimplify, | |
41778 | maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq, | |
41779 | do_valueize, try_conditional_simplification, gimple_extract, | |
41780 | gimple_extract_op, canonicalize_code, commutative_binary_op_p, | |
41781 | commutative_ternary_op_p, first_commutative_argument, | |
41782 | associative_binary_op_p, directly_supported_p, | |
41783 | get_conditional_internal_fn): Moved to gimple-match-exports.cc | |
41784 | * gimple-match-exports.cc: New file. | |
41785 | ||
41786 | 2023-05-05 Tamar Christina <tamar.christina@arm.com> | |
41787 | ||
41788 | PR bootstrap/84402 | |
41789 | * genmatch.cc (decision_tree::gen, write_predicate): Generate new | |
41790 | debug_dump var. | |
41791 | (dt_simplify::gen_1): Use it. | |
41792 | ||
41793 | 2023-05-05 Tamar Christina <tamar.christina@arm.com> | |
41794 | ||
41795 | PR bootstrap/84402 | |
41796 | * genmatch.cc (output_line_directive): Only emit commented directive | |
41797 | when -vv. | |
41798 | ||
41799 | 2023-05-05 Tamar Christina <tamar.christina@arm.com> | |
41800 | ||
41801 | PR bootstrap/84402 | |
41802 | * genmatch.cc (dt_simplify::gen_1): Only emit labels if used. | |
41803 | ||
41804 | 2023-05-05 Tobias Burnus <tobias@codesourcery.com> | |
41805 | ||
41806 | * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove | |
41807 | unused in_mode/in_n variables. | |
41808 | ||
41809 | 2023-05-05 Richard Biener <rguenther@suse.de> | |
41810 | ||
41811 | PR tree-optimization/109735 | |
41812 | * tree-vect-stmts.cc (vectorizable_operation): Perform | |
41813 | conversion for POINTER_DIFF_EXPR unconditionally. | |
41814 | ||
41815 | 2023-05-05 Uros Bizjak <ubizjak@gmail.com> | |
41816 | ||
41817 | * config/i386/mmx.md (mulv2si3): New expander. | |
41818 | (*mulv2si3): New insn pattern. | |
41819 | ||
41820 | 2023-05-05 Tobias Burnus <tobias@codesourcery.com> | |
41821 | Thomas Schwinge <thomas@codesourcery.com> | |
41822 | ||
41823 | PR libgomp/108098 | |
41824 | * config/nvptx/mkoffload.cc (process): Emit dummy procedure | |
41825 | alongside reverse-offload function table to prevent NULL values | |
41826 | of the function addresses. | |
41827 | ||
41828 | 2023-05-05 Jakub Jelinek <jakub@redhat.com> | |
41829 | ||
41830 | * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo, | |
41831 | mpft_t -> mpfr_t. | |
41832 | * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise. | |
41833 | ||
41834 | 2023-05-05 Andrew Pinski <apinski@marvell.com> | |
41835 | ||
41836 | PR tree-optimization/109732 | |
41837 | * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection | |
41838 | of the argtrue/argfalse. | |
41839 | ||
41840 | 2023-05-05 Andrew Pinski <apinski@marvell.com> | |
41841 | ||
41842 | PR tree-optimization/109722 | |
41843 | * match.pd: Extend the `ABS<a> == 0` pattern | |
41844 | to cover `ABSU<a> == 0` too. | |
41845 | ||
41846 | 2023-05-04 Uros Bizjak <ubizjak@gmail.com> | |
41847 | ||
41848 | PR target/109733 | |
41849 | * config/i386/predicates.md (index_reg_operand): New predicate. | |
41850 | * config/i386/i386.md (ashift to lea spliter): Use | |
41851 | general_reg_operand and index_reg_operand predicates. | |
41852 | ||
41853 | 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
41854 | ||
41855 | * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le): | |
41856 | Rename and reimplement with RTL codes to... | |
41857 | (aarch64_<optab>hn2<mode>_insn_le): .. This. | |
41858 | (aarch64_r<optab>hn2<mode>_insn_le): New pattern. | |
41859 | (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL | |
41860 | codes to... | |
41861 | (aarch64_<optab>hn2<mode>_insn_be): ... This. | |
41862 | (aarch64_r<optab>hn2<mode>_insn_be): New pattern. | |
41863 | (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to... | |
41864 | (aarch64_<optab>hn2<mode>): ... This. | |
41865 | (aarch64_r<optab>hn2<mode>): New expander. | |
41866 | * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN, | |
41867 | UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs. | |
41868 | (ADDSUBHN): Delete. | |
41869 | (sur): Remove handling of the above. | |
41870 | (addsub): Likewise. | |
41871 | ||
41872 | 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
41873 | ||
41874 | * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le): | |
41875 | Delete. | |
41876 | (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn. | |
41877 | (aarch64_<sur><addsub>hn<mode>_insn_be): Delete. | |
41878 | (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn. | |
41879 | (aarch64_<sur><addsub>hn<mode>): Delete. | |
41880 | (aarch64_<optab>hn<mode>): New define_expand. | |
41881 | (aarch64_r<optab>hn<mode>): Likewise. | |
41882 | * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec): | |
41883 | New predicate. | |
41884 | ||
41885 | 2023-05-04 Andrew Pinski <apinski@marvell.com> | |
41886 | ||
41887 | * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle | |
41888 | diamond form bb with forwarder only empty blocks better. | |
41889 | ||
41890 | 2023-05-04 Andrew Pinski <apinski@marvell.com> | |
41891 | ||
41892 | * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ... | |
41893 | * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static. | |
41894 | (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead | |
41895 | of an inline version of it. | |
41896 | * tree-cfgcleanup.cc (remove_forwarder_block): Likewise. | |
41897 | * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration. | |
41898 | ||
41899 | 2023-05-04 Andrew Pinski <apinski@marvell.com> | |
41900 | ||
41901 | * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change | |
41902 | the default argument value for dce_ssa_names to nullptr. | |
41903 | Check to make sure dce_ssa_names is a non-nullptr before | |
41904 | calling simple_dce_from_worklist. | |
41905 | ||
41906 | 2023-05-04 Uros Bizjak <ubizjak@gmail.com> | |
41907 | ||
41908 | * config/i386/predicates.md (index_register_operand): Reject | |
41909 | arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and | |
41910 | VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload. | |
41911 | (call_register_no_elim_operand): Rewrite as ... | |
41912 | (call_register_operand): ... this. | |
41913 | (call_insn_operand): Use call_register_operand predicate. | |
41914 | ||
41915 | 2023-05-04 Richard Biener <rguenther@suse.de> | |
41916 | ||
41917 | PR tree-optimization/109721 | |
41918 | * tree-vect-stmts.cc (vectorizable_operation): Make sure | |
41919 | to test word_mode for all !target_support_p operations. | |
41920 | ||
41921 | 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
41922 | ||
41923 | PR target/99195 | |
41924 | * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to... | |
41925 | (aarch64_<su>aba<mode><vczle><vczbe>): ... This. | |
41926 | (aarch64_mla<mode>): Rename to... | |
41927 | (aarch64_mla<mode><vczle><vczbe>): ... This. | |
41928 | (*aarch64_mla_elt<mode>): Rename to... | |
41929 | (*aarch64_mla_elt<mode><vczle><vczbe>): ... This. | |
41930 | (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to... | |
41931 | (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This. | |
41932 | (aarch64_mla_n<mode>): Rename to... | |
41933 | (aarch64_mla_n<mode><vczle><vczbe>): ... This. | |
41934 | (aarch64_mls<mode>): Rename to... | |
41935 | (aarch64_mls<mode><vczle><vczbe>): ... This. | |
41936 | (*aarch64_mls_elt<mode>): Rename to... | |
41937 | (*aarch64_mls_elt<mode><vczle><vczbe>): ... This. | |
41938 | (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to... | |
41939 | (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This. | |
41940 | (aarch64_mls_n<mode>): Rename to... | |
41941 | (aarch64_mls_n<mode><vczle><vczbe>): ... This. | |
41942 | (fma<mode>4): Rename to... | |
41943 | (fma<mode>4<vczle><vczbe>): ... This. | |
41944 | (*aarch64_fma4_elt<mode>): Rename to... | |
41945 | (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This. | |
41946 | (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to... | |
41947 | (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This. | |
41948 | (*aarch64_fma4_elt_from_dup<mode>): Rename to... | |
41949 | (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This. | |
41950 | (fnma<mode>4): Rename to... | |
41951 | (fnma<mode>4<vczle><vczbe>): ... This. | |
41952 | (*aarch64_fnma4_elt<mode>): Rename to... | |
41953 | (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This. | |
41954 | (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to... | |
41955 | (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This. | |
41956 | (*aarch64_fnma4_elt_from_dup<mode>): Rename to... | |
41957 | (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This. | |
41958 | (aarch64_simd_bsl<mode>_internal): Rename to... | |
41959 | (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This. | |
41960 | (*aarch64_simd_bsl<mode>_alt): Rename to... | |
41961 | (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This. | |
41962 | ||
41963 | 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
41964 | ||
41965 | PR target/99195 | |
41966 | * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to... | |
41967 | (aarch64_<su>abd<mode><vczle><vczbe>): ... This. | |
41968 | (fabd<mode>3): Rename to... | |
41969 | (fabd<mode>3<vczle><vczbe>): ... This. | |
41970 | (aarch64_<optab>p<mode>): Rename to... | |
41971 | (aarch64_<optab>p<mode><vczle><vczbe>): ... This. | |
41972 | (aarch64_faddp<mode>): Rename to... | |
41973 | (aarch64_faddp<mode><vczle><vczbe>): ... This. | |
41974 | ||
41975 | 2023-05-04 Martin Liska <mliska@suse.cz> | |
41976 | ||
41977 | * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition. | |
41978 | (print_version): Use it. | |
41979 | (generate_results): Likewise. | |
41980 | ||
41981 | 2023-05-04 Richard Biener <rguenther@suse.de> | |
41982 | ||
41983 | * tree-cfg.h (last_stmt): Rename to ... | |
41984 | (last_nondebug_stmt): ... this. | |
41985 | * tree-cfg.cc (last_stmt): Rename to ... | |
41986 | (last_nondebug_stmt): ... this. | |
41987 | (assign_discriminators): Adjust. | |
41988 | (group_case_labels_stmt): Likewise. | |
41989 | (gimple_can_duplicate_bb_p): Likewise. | |
41990 | (execute_fixup_cfg): Likewise. | |
41991 | * auto-profile.cc (afdo_propagate_circuit): Likewise. | |
41992 | * gimple-range.cc (gimple_ranger::range_on_exit): Likewise. | |
41993 | * omp-expand.cc (workshare_safe_to_combine_p): Likewise. | |
41994 | (determine_parallel_type): Likewise. | |
41995 | (adjust_context_and_scope): Likewise. | |
41996 | (expand_task_call): Likewise. | |
41997 | (remove_exit_barrier): Likewise. | |
41998 | (expand_omp_taskreg): Likewise. | |
41999 | (expand_omp_for_init_counts): Likewise. | |
42000 | (expand_omp_for_init_vars): Likewise. | |
42001 | (expand_omp_for_static_chunk): Likewise. | |
42002 | (expand_omp_simd): Likewise. | |
42003 | (expand_oacc_for): Likewise. | |
42004 | (expand_omp_for): Likewise. | |
42005 | (expand_omp_sections): Likewise. | |
42006 | (expand_omp_atomic_fetch_op): Likewise. | |
42007 | (expand_omp_atomic_cas): Likewise. | |
42008 | (expand_omp_atomic): Likewise. | |
42009 | (expand_omp_target): Likewise. | |
42010 | (expand_omp): Likewise. | |
42011 | (omp_make_gimple_edges): Likewise. | |
42012 | * trans-mem.cc (tm_region_init): Likewise. | |
42013 | * tree-inline.cc (redirect_all_calls): Likewise. | |
42014 | * tree-parloops.cc (gen_parallel_loop): Likewise. | |
42015 | * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise. | |
42016 | * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables): | |
42017 | Likewise. | |
42018 | * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise. | |
42019 | (may_eliminate_iv): Likewise. | |
42020 | * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise. | |
42021 | * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): | |
42022 | Likewise. | |
42023 | (estimate_numbers_of_iterations): Likewise. | |
42024 | * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise. | |
42025 | * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise. | |
42026 | (set_predicates_for_bb): Likewise. | |
42027 | (init_loop_unswitch_info): Likewise. | |
42028 | (hoist_guard): Likewise. | |
42029 | * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise. | |
42030 | (minmax_replacement): Likewise. | |
42031 | * tree-ssa-reassoc.cc (update_range_test): Likewise. | |
42032 | (optimize_range_tests_to_bit_test): Likewise. | |
42033 | (optimize_range_tests_var_bound): Likewise. | |
42034 | (optimize_range_tests): Likewise. | |
42035 | (no_side_effect_bb): Likewise. | |
42036 | (suitable_cond_bb): Likewise. | |
42037 | (maybe_optimize_range_tests): Likewise. | |
42038 | (reassociate_bb): Likewise. | |
42039 | * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise. | |
42040 | ||
42041 | 2023-05-04 Jakub Jelinek <jakub@redhat.com> | |
42042 | ||
42043 | PR debug/109676 | |
42044 | * config/i386/i386-features.cc (timode_scalar_chain::convert_insn): | |
42045 | If src is REG, change its mode to V1TImode and call fix_debug_reg_uses | |
42046 | for it only if it still has TImode. Don't decide whether to call | |
42047 | fix_debug_reg_uses based on whether SRC is ever set or not. | |
42048 | ||
42049 | 2023-05-04 Hans-Peter Nilsson <hp@axis.com> | |
42050 | ||
42051 | * config/cris/cris.cc (cris_split_constant): New function. | |
42052 | * config/cris/cris.md (splitop): New iterator. | |
42053 | (opsplit1): New define_peephole2. | |
42054 | * config/cris/cris-protos.h (cris_split_constant): Declare. | |
42055 | (cris_splittable_constant_p): New macro. | |
42056 | ||
42057 | 2023-05-04 Hans-Peter Nilsson <hp@axis.com> | |
42058 | ||
42059 | * config/cris/cris.cc (TARGET_SPILL_CLASS): Define | |
42060 | to ALL_REGS. | |
42061 | ||
42062 | 2023-05-04 Hans-Peter Nilsson <hp@axis.com> | |
42063 | ||
42064 | * config/cris/cris.cc (cris_side_effect_mode_ok): Use | |
42065 | lra_in_progress, not reload_in_progress. | |
42066 | * config/cris/cris.md ("movdi", "*addi_reload"): Ditto. | |
42067 | * config/cris/constraints.md ("Q"): Ditto. | |
42068 | ||
42069 | 2023-05-03 Andrew Pinski <apinski@marvell.com> | |
42070 | ||
42071 | * tree-ssa-dce.cc (simple_dce_from_worklist): Record | |
42072 | stats on removed number of statements and phis. | |
42073 | ||
42074 | 2023-05-03 Aldy Hernandez <aldyh@redhat.com> | |
42075 | ||
42076 | PR tree-optimization/109711 | |
42077 | * value-range.cc (irange::verify_range): Allow types of | |
42078 | error_mark_node. | |
42079 | ||
42080 | 2023-05-03 Alexander Monakov <amonakov@ispras.ru> | |
42081 | ||
42082 | PR sanitizer/90746 | |
42083 | * calls.cc (can_implement_as_sibling_call_p): Reject calls | |
42084 | to __sanitizer_cov_trace_pc. | |
42085 | ||
42086 | 2023-05-03 Richard Sandiford <richard.sandiford@arm.com> | |
42087 | ||
42088 | PR target/109661 | |
42089 | * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add | |
42090 | a new ABI break parameter for GCC 14. Set it to the alignment | |
42091 | of enums that have an underlying type. Take the true alignment | |
42092 | of such enums from the TYPE_ALIGN of the underlying type's | |
42093 | TYPE_MAIN_VARIANT. | |
42094 | (aarch64_function_arg_boundary): Update accordingly. | |
42095 | (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise. | |
42096 | Warn about ABI differences. | |
42097 | ||
42098 | 2023-05-03 Richard Sandiford <richard.sandiford@arm.com> | |
42099 | ||
42100 | PR target/109661 | |
42101 | * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename | |
42102 | ABI break variables to abi_break_gcc_9 and abi_break_gcc_13. | |
42103 | (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise. | |
42104 | (aarch64_gimplify_va_arg_expr): Likewise. | |
42105 | ||
42106 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42107 | ||
42108 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F) | |
42109 | (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New. | |
42110 | (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq) | |
42111 | (vrmulhq): New. | |
42112 | * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq) | |
42113 | (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New. | |
42114 | * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq) | |
42115 | (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New. | |
42116 | * config/arm/arm_mve.h (vhsubq): Remove. | |
42117 | (vhaddq): Remove. | |
42118 | (vhaddq_m): Remove. | |
42119 | (vhsubq_m): Remove. | |
42120 | (vhaddq_x): Remove. | |
42121 | (vhsubq_x): Remove. | |
42122 | (vhsubq_u8): Remove. | |
42123 | (vhsubq_n_u8): Remove. | |
42124 | (vhaddq_u8): Remove. | |
42125 | (vhaddq_n_u8): Remove. | |
42126 | (vhsubq_s8): Remove. | |
42127 | (vhsubq_n_s8): Remove. | |
42128 | (vhaddq_s8): Remove. | |
42129 | (vhaddq_n_s8): Remove. | |
42130 | (vhsubq_u16): Remove. | |
42131 | (vhsubq_n_u16): Remove. | |
42132 | (vhaddq_u16): Remove. | |
42133 | (vhaddq_n_u16): Remove. | |
42134 | (vhsubq_s16): Remove. | |
42135 | (vhsubq_n_s16): Remove. | |
42136 | (vhaddq_s16): Remove. | |
42137 | (vhaddq_n_s16): Remove. | |
42138 | (vhsubq_u32): Remove. | |
42139 | (vhsubq_n_u32): Remove. | |
42140 | (vhaddq_u32): Remove. | |
42141 | (vhaddq_n_u32): Remove. | |
42142 | (vhsubq_s32): Remove. | |
42143 | (vhsubq_n_s32): Remove. | |
42144 | (vhaddq_s32): Remove. | |
42145 | (vhaddq_n_s32): Remove. | |
42146 | (vhaddq_m_n_s8): Remove. | |
42147 | (vhaddq_m_n_s32): Remove. | |
42148 | (vhaddq_m_n_s16): Remove. | |
42149 | (vhaddq_m_n_u8): Remove. | |
42150 | (vhaddq_m_n_u32): Remove. | |
42151 | (vhaddq_m_n_u16): Remove. | |
42152 | (vhaddq_m_s8): Remove. | |
42153 | (vhaddq_m_s32): Remove. | |
42154 | (vhaddq_m_s16): Remove. | |
42155 | (vhaddq_m_u8): Remove. | |
42156 | (vhaddq_m_u32): Remove. | |
42157 | (vhaddq_m_u16): Remove. | |
42158 | (vhsubq_m_n_s8): Remove. | |
42159 | (vhsubq_m_n_s32): Remove. | |
42160 | (vhsubq_m_n_s16): Remove. | |
42161 | (vhsubq_m_n_u8): Remove. | |
42162 | (vhsubq_m_n_u32): Remove. | |
42163 | (vhsubq_m_n_u16): Remove. | |
42164 | (vhsubq_m_s8): Remove. | |
42165 | (vhsubq_m_s32): Remove. | |
42166 | (vhsubq_m_s16): Remove. | |
42167 | (vhsubq_m_u8): Remove. | |
42168 | (vhsubq_m_u32): Remove. | |
42169 | (vhsubq_m_u16): Remove. | |
42170 | (vhaddq_x_n_s8): Remove. | |
42171 | (vhaddq_x_n_s16): Remove. | |
42172 | (vhaddq_x_n_s32): Remove. | |
42173 | (vhaddq_x_n_u8): Remove. | |
42174 | (vhaddq_x_n_u16): Remove. | |
42175 | (vhaddq_x_n_u32): Remove. | |
42176 | (vhaddq_x_s8): Remove. | |
42177 | (vhaddq_x_s16): Remove. | |
42178 | (vhaddq_x_s32): Remove. | |
42179 | (vhaddq_x_u8): Remove. | |
42180 | (vhaddq_x_u16): Remove. | |
42181 | (vhaddq_x_u32): Remove. | |
42182 | (vhsubq_x_n_s8): Remove. | |
42183 | (vhsubq_x_n_s16): Remove. | |
42184 | (vhsubq_x_n_s32): Remove. | |
42185 | (vhsubq_x_n_u8): Remove. | |
42186 | (vhsubq_x_n_u16): Remove. | |
42187 | (vhsubq_x_n_u32): Remove. | |
42188 | (vhsubq_x_s8): Remove. | |
42189 | (vhsubq_x_s16): Remove. | |
42190 | (vhsubq_x_s32): Remove. | |
42191 | (vhsubq_x_u8): Remove. | |
42192 | (vhsubq_x_u16): Remove. | |
42193 | (vhsubq_x_u32): Remove. | |
42194 | (__arm_vhsubq_u8): Remove. | |
42195 | (__arm_vhsubq_n_u8): Remove. | |
42196 | (__arm_vhaddq_u8): Remove. | |
42197 | (__arm_vhaddq_n_u8): Remove. | |
42198 | (__arm_vhsubq_s8): Remove. | |
42199 | (__arm_vhsubq_n_s8): Remove. | |
42200 | (__arm_vhaddq_s8): Remove. | |
42201 | (__arm_vhaddq_n_s8): Remove. | |
42202 | (__arm_vhsubq_u16): Remove. | |
42203 | (__arm_vhsubq_n_u16): Remove. | |
42204 | (__arm_vhaddq_u16): Remove. | |
42205 | (__arm_vhaddq_n_u16): Remove. | |
42206 | (__arm_vhsubq_s16): Remove. | |
42207 | (__arm_vhsubq_n_s16): Remove. | |
42208 | (__arm_vhaddq_s16): Remove. | |
42209 | (__arm_vhaddq_n_s16): Remove. | |
42210 | (__arm_vhsubq_u32): Remove. | |
42211 | (__arm_vhsubq_n_u32): Remove. | |
42212 | (__arm_vhaddq_u32): Remove. | |
42213 | (__arm_vhaddq_n_u32): Remove. | |
42214 | (__arm_vhsubq_s32): Remove. | |
42215 | (__arm_vhsubq_n_s32): Remove. | |
42216 | (__arm_vhaddq_s32): Remove. | |
42217 | (__arm_vhaddq_n_s32): Remove. | |
42218 | (__arm_vhaddq_m_n_s8): Remove. | |
42219 | (__arm_vhaddq_m_n_s32): Remove. | |
42220 | (__arm_vhaddq_m_n_s16): Remove. | |
42221 | (__arm_vhaddq_m_n_u8): Remove. | |
42222 | (__arm_vhaddq_m_n_u32): Remove. | |
42223 | (__arm_vhaddq_m_n_u16): Remove. | |
42224 | (__arm_vhaddq_m_s8): Remove. | |
42225 | (__arm_vhaddq_m_s32): Remove. | |
42226 | (__arm_vhaddq_m_s16): Remove. | |
42227 | (__arm_vhaddq_m_u8): Remove. | |
42228 | (__arm_vhaddq_m_u32): Remove. | |
42229 | (__arm_vhaddq_m_u16): Remove. | |
42230 | (__arm_vhsubq_m_n_s8): Remove. | |
42231 | (__arm_vhsubq_m_n_s32): Remove. | |
42232 | (__arm_vhsubq_m_n_s16): Remove. | |
42233 | (__arm_vhsubq_m_n_u8): Remove. | |
42234 | (__arm_vhsubq_m_n_u32): Remove. | |
42235 | (__arm_vhsubq_m_n_u16): Remove. | |
42236 | (__arm_vhsubq_m_s8): Remove. | |
42237 | (__arm_vhsubq_m_s32): Remove. | |
42238 | (__arm_vhsubq_m_s16): Remove. | |
42239 | (__arm_vhsubq_m_u8): Remove. | |
42240 | (__arm_vhsubq_m_u32): Remove. | |
42241 | (__arm_vhsubq_m_u16): Remove. | |
42242 | (__arm_vhaddq_x_n_s8): Remove. | |
42243 | (__arm_vhaddq_x_n_s16): Remove. | |
42244 | (__arm_vhaddq_x_n_s32): Remove. | |
42245 | (__arm_vhaddq_x_n_u8): Remove. | |
42246 | (__arm_vhaddq_x_n_u16): Remove. | |
42247 | (__arm_vhaddq_x_n_u32): Remove. | |
42248 | (__arm_vhaddq_x_s8): Remove. | |
42249 | (__arm_vhaddq_x_s16): Remove. | |
42250 | (__arm_vhaddq_x_s32): Remove. | |
42251 | (__arm_vhaddq_x_u8): Remove. | |
42252 | (__arm_vhaddq_x_u16): Remove. | |
42253 | (__arm_vhaddq_x_u32): Remove. | |
42254 | (__arm_vhsubq_x_n_s8): Remove. | |
42255 | (__arm_vhsubq_x_n_s16): Remove. | |
42256 | (__arm_vhsubq_x_n_s32): Remove. | |
42257 | (__arm_vhsubq_x_n_u8): Remove. | |
42258 | (__arm_vhsubq_x_n_u16): Remove. | |
42259 | (__arm_vhsubq_x_n_u32): Remove. | |
42260 | (__arm_vhsubq_x_s8): Remove. | |
42261 | (__arm_vhsubq_x_s16): Remove. | |
42262 | (__arm_vhsubq_x_s32): Remove. | |
42263 | (__arm_vhsubq_x_u8): Remove. | |
42264 | (__arm_vhsubq_x_u16): Remove. | |
42265 | (__arm_vhsubq_x_u32): Remove. | |
42266 | (__arm_vhsubq): Remove. | |
42267 | (__arm_vhaddq): Remove. | |
42268 | (__arm_vhaddq_m): Remove. | |
42269 | (__arm_vhsubq_m): Remove. | |
42270 | (__arm_vhaddq_x): Remove. | |
42271 | (__arm_vhsubq_x): Remove. | |
42272 | (vmulhq): Remove. | |
42273 | (vmulhq_m): Remove. | |
42274 | (vmulhq_x): Remove. | |
42275 | (vmulhq_u8): Remove. | |
42276 | (vmulhq_s8): Remove. | |
42277 | (vmulhq_u16): Remove. | |
42278 | (vmulhq_s16): Remove. | |
42279 | (vmulhq_u32): Remove. | |
42280 | (vmulhq_s32): Remove. | |
42281 | (vmulhq_m_s8): Remove. | |
42282 | (vmulhq_m_s32): Remove. | |
42283 | (vmulhq_m_s16): Remove. | |
42284 | (vmulhq_m_u8): Remove. | |
42285 | (vmulhq_m_u32): Remove. | |
42286 | (vmulhq_m_u16): Remove. | |
42287 | (vmulhq_x_s8): Remove. | |
42288 | (vmulhq_x_s16): Remove. | |
42289 | (vmulhq_x_s32): Remove. | |
42290 | (vmulhq_x_u8): Remove. | |
42291 | (vmulhq_x_u16): Remove. | |
42292 | (vmulhq_x_u32): Remove. | |
42293 | (__arm_vmulhq_u8): Remove. | |
42294 | (__arm_vmulhq_s8): Remove. | |
42295 | (__arm_vmulhq_u16): Remove. | |
42296 | (__arm_vmulhq_s16): Remove. | |
42297 | (__arm_vmulhq_u32): Remove. | |
42298 | (__arm_vmulhq_s32): Remove. | |
42299 | (__arm_vmulhq_m_s8): Remove. | |
42300 | (__arm_vmulhq_m_s32): Remove. | |
42301 | (__arm_vmulhq_m_s16): Remove. | |
42302 | (__arm_vmulhq_m_u8): Remove. | |
42303 | (__arm_vmulhq_m_u32): Remove. | |
42304 | (__arm_vmulhq_m_u16): Remove. | |
42305 | (__arm_vmulhq_x_s8): Remove. | |
42306 | (__arm_vmulhq_x_s16): Remove. | |
42307 | (__arm_vmulhq_x_s32): Remove. | |
42308 | (__arm_vmulhq_x_u8): Remove. | |
42309 | (__arm_vmulhq_x_u16): Remove. | |
42310 | (__arm_vmulhq_x_u32): Remove. | |
42311 | (__arm_vmulhq): Remove. | |
42312 | (__arm_vmulhq_m): Remove. | |
42313 | (__arm_vmulhq_x): Remove. | |
42314 | (vqsubq): Remove. | |
42315 | (vqaddq): Remove. | |
42316 | (vqaddq_m): Remove. | |
42317 | (vqsubq_m): Remove. | |
42318 | (vqsubq_u8): Remove. | |
42319 | (vqsubq_n_u8): Remove. | |
42320 | (vqaddq_u8): Remove. | |
42321 | (vqaddq_n_u8): Remove. | |
42322 | (vqsubq_s8): Remove. | |
42323 | (vqsubq_n_s8): Remove. | |
42324 | (vqaddq_s8): Remove. | |
42325 | (vqaddq_n_s8): Remove. | |
42326 | (vqsubq_u16): Remove. | |
42327 | (vqsubq_n_u16): Remove. | |
42328 | (vqaddq_u16): Remove. | |
42329 | (vqaddq_n_u16): Remove. | |
42330 | (vqsubq_s16): Remove. | |
42331 | (vqsubq_n_s16): Remove. | |
42332 | (vqaddq_s16): Remove. | |
42333 | (vqaddq_n_s16): Remove. | |
42334 | (vqsubq_u32): Remove. | |
42335 | (vqsubq_n_u32): Remove. | |
42336 | (vqaddq_u32): Remove. | |
42337 | (vqaddq_n_u32): Remove. | |
42338 | (vqsubq_s32): Remove. | |
42339 | (vqsubq_n_s32): Remove. | |
42340 | (vqaddq_s32): Remove. | |
42341 | (vqaddq_n_s32): Remove. | |
42342 | (vqaddq_m_n_s8): Remove. | |
42343 | (vqaddq_m_n_s32): Remove. | |
42344 | (vqaddq_m_n_s16): Remove. | |
42345 | (vqaddq_m_n_u8): Remove. | |
42346 | (vqaddq_m_n_u32): Remove. | |
42347 | (vqaddq_m_n_u16): Remove. | |
42348 | (vqaddq_m_s8): Remove. | |
42349 | (vqaddq_m_s32): Remove. | |
42350 | (vqaddq_m_s16): Remove. | |
42351 | (vqaddq_m_u8): Remove. | |
42352 | (vqaddq_m_u32): Remove. | |
42353 | (vqaddq_m_u16): Remove. | |
42354 | (vqsubq_m_n_s8): Remove. | |
42355 | (vqsubq_m_n_s32): Remove. | |
42356 | (vqsubq_m_n_s16): Remove. | |
42357 | (vqsubq_m_n_u8): Remove. | |
42358 | (vqsubq_m_n_u32): Remove. | |
42359 | (vqsubq_m_n_u16): Remove. | |
42360 | (vqsubq_m_s8): Remove. | |
42361 | (vqsubq_m_s32): Remove. | |
42362 | (vqsubq_m_s16): Remove. | |
42363 | (vqsubq_m_u8): Remove. | |
42364 | (vqsubq_m_u32): Remove. | |
42365 | (vqsubq_m_u16): Remove. | |
42366 | (__arm_vqsubq_u8): Remove. | |
42367 | (__arm_vqsubq_n_u8): Remove. | |
42368 | (__arm_vqaddq_u8): Remove. | |
42369 | (__arm_vqaddq_n_u8): Remove. | |
42370 | (__arm_vqsubq_s8): Remove. | |
42371 | (__arm_vqsubq_n_s8): Remove. | |
42372 | (__arm_vqaddq_s8): Remove. | |
42373 | (__arm_vqaddq_n_s8): Remove. | |
42374 | (__arm_vqsubq_u16): Remove. | |
42375 | (__arm_vqsubq_n_u16): Remove. | |
42376 | (__arm_vqaddq_u16): Remove. | |
42377 | (__arm_vqaddq_n_u16): Remove. | |
42378 | (__arm_vqsubq_s16): Remove. | |
42379 | (__arm_vqsubq_n_s16): Remove. | |
42380 | (__arm_vqaddq_s16): Remove. | |
42381 | (__arm_vqaddq_n_s16): Remove. | |
42382 | (__arm_vqsubq_u32): Remove. | |
42383 | (__arm_vqsubq_n_u32): Remove. | |
42384 | (__arm_vqaddq_u32): Remove. | |
42385 | (__arm_vqaddq_n_u32): Remove. | |
42386 | (__arm_vqsubq_s32): Remove. | |
42387 | (__arm_vqsubq_n_s32): Remove. | |
42388 | (__arm_vqaddq_s32): Remove. | |
42389 | (__arm_vqaddq_n_s32): Remove. | |
42390 | (__arm_vqaddq_m_n_s8): Remove. | |
42391 | (__arm_vqaddq_m_n_s32): Remove. | |
42392 | (__arm_vqaddq_m_n_s16): Remove. | |
42393 | (__arm_vqaddq_m_n_u8): Remove. | |
42394 | (__arm_vqaddq_m_n_u32): Remove. | |
42395 | (__arm_vqaddq_m_n_u16): Remove. | |
42396 | (__arm_vqaddq_m_s8): Remove. | |
42397 | (__arm_vqaddq_m_s32): Remove. | |
42398 | (__arm_vqaddq_m_s16): Remove. | |
42399 | (__arm_vqaddq_m_u8): Remove. | |
42400 | (__arm_vqaddq_m_u32): Remove. | |
42401 | (__arm_vqaddq_m_u16): Remove. | |
42402 | (__arm_vqsubq_m_n_s8): Remove. | |
42403 | (__arm_vqsubq_m_n_s32): Remove. | |
42404 | (__arm_vqsubq_m_n_s16): Remove. | |
42405 | (__arm_vqsubq_m_n_u8): Remove. | |
42406 | (__arm_vqsubq_m_n_u32): Remove. | |
42407 | (__arm_vqsubq_m_n_u16): Remove. | |
42408 | (__arm_vqsubq_m_s8): Remove. | |
42409 | (__arm_vqsubq_m_s32): Remove. | |
42410 | (__arm_vqsubq_m_s16): Remove. | |
42411 | (__arm_vqsubq_m_u8): Remove. | |
42412 | (__arm_vqsubq_m_u32): Remove. | |
42413 | (__arm_vqsubq_m_u16): Remove. | |
42414 | (__arm_vqsubq): Remove. | |
42415 | (__arm_vqaddq): Remove. | |
42416 | (__arm_vqaddq_m): Remove. | |
42417 | (__arm_vqsubq_m): Remove. | |
42418 | (vqdmulhq): Remove. | |
42419 | (vqdmulhq_m): Remove. | |
42420 | (vqdmulhq_s8): Remove. | |
42421 | (vqdmulhq_n_s8): Remove. | |
42422 | (vqdmulhq_s16): Remove. | |
42423 | (vqdmulhq_n_s16): Remove. | |
42424 | (vqdmulhq_s32): Remove. | |
42425 | (vqdmulhq_n_s32): Remove. | |
42426 | (vqdmulhq_m_n_s8): Remove. | |
42427 | (vqdmulhq_m_n_s32): Remove. | |
42428 | (vqdmulhq_m_n_s16): Remove. | |
42429 | (vqdmulhq_m_s8): Remove. | |
42430 | (vqdmulhq_m_s32): Remove. | |
42431 | (vqdmulhq_m_s16): Remove. | |
42432 | (__arm_vqdmulhq_s8): Remove. | |
42433 | (__arm_vqdmulhq_n_s8): Remove. | |
42434 | (__arm_vqdmulhq_s16): Remove. | |
42435 | (__arm_vqdmulhq_n_s16): Remove. | |
42436 | (__arm_vqdmulhq_s32): Remove. | |
42437 | (__arm_vqdmulhq_n_s32): Remove. | |
42438 | (__arm_vqdmulhq_m_n_s8): Remove. | |
42439 | (__arm_vqdmulhq_m_n_s32): Remove. | |
42440 | (__arm_vqdmulhq_m_n_s16): Remove. | |
42441 | (__arm_vqdmulhq_m_s8): Remove. | |
42442 | (__arm_vqdmulhq_m_s32): Remove. | |
42443 | (__arm_vqdmulhq_m_s16): Remove. | |
42444 | (__arm_vqdmulhq): Remove. | |
42445 | (__arm_vqdmulhq_m): Remove. | |
42446 | (vrhaddq): Remove. | |
42447 | (vrhaddq_m): Remove. | |
42448 | (vrhaddq_x): Remove. | |
42449 | (vrhaddq_u8): Remove. | |
42450 | (vrhaddq_s8): Remove. | |
42451 | (vrhaddq_u16): Remove. | |
42452 | (vrhaddq_s16): Remove. | |
42453 | (vrhaddq_u32): Remove. | |
42454 | (vrhaddq_s32): Remove. | |
42455 | (vrhaddq_m_s8): Remove. | |
42456 | (vrhaddq_m_s32): Remove. | |
42457 | (vrhaddq_m_s16): Remove. | |
42458 | (vrhaddq_m_u8): Remove. | |
42459 | (vrhaddq_m_u32): Remove. | |
42460 | (vrhaddq_m_u16): Remove. | |
42461 | (vrhaddq_x_s8): Remove. | |
42462 | (vrhaddq_x_s16): Remove. | |
42463 | (vrhaddq_x_s32): Remove. | |
42464 | (vrhaddq_x_u8): Remove. | |
42465 | (vrhaddq_x_u16): Remove. | |
42466 | (vrhaddq_x_u32): Remove. | |
42467 | (__arm_vrhaddq_u8): Remove. | |
42468 | (__arm_vrhaddq_s8): Remove. | |
42469 | (__arm_vrhaddq_u16): Remove. | |
42470 | (__arm_vrhaddq_s16): Remove. | |
42471 | (__arm_vrhaddq_u32): Remove. | |
42472 | (__arm_vrhaddq_s32): Remove. | |
42473 | (__arm_vrhaddq_m_s8): Remove. | |
42474 | (__arm_vrhaddq_m_s32): Remove. | |
42475 | (__arm_vrhaddq_m_s16): Remove. | |
42476 | (__arm_vrhaddq_m_u8): Remove. | |
42477 | (__arm_vrhaddq_m_u32): Remove. | |
42478 | (__arm_vrhaddq_m_u16): Remove. | |
42479 | (__arm_vrhaddq_x_s8): Remove. | |
42480 | (__arm_vrhaddq_x_s16): Remove. | |
42481 | (__arm_vrhaddq_x_s32): Remove. | |
42482 | (__arm_vrhaddq_x_u8): Remove. | |
42483 | (__arm_vrhaddq_x_u16): Remove. | |
42484 | (__arm_vrhaddq_x_u32): Remove. | |
42485 | (__arm_vrhaddq): Remove. | |
42486 | (__arm_vrhaddq_m): Remove. | |
42487 | (__arm_vrhaddq_x): Remove. | |
42488 | (vrmulhq): Remove. | |
42489 | (vrmulhq_m): Remove. | |
42490 | (vrmulhq_x): Remove. | |
42491 | (vrmulhq_u8): Remove. | |
42492 | (vrmulhq_s8): Remove. | |
42493 | (vrmulhq_u16): Remove. | |
42494 | (vrmulhq_s16): Remove. | |
42495 | (vrmulhq_u32): Remove. | |
42496 | (vrmulhq_s32): Remove. | |
42497 | (vrmulhq_m_s8): Remove. | |
42498 | (vrmulhq_m_s32): Remove. | |
42499 | (vrmulhq_m_s16): Remove. | |
42500 | (vrmulhq_m_u8): Remove. | |
42501 | (vrmulhq_m_u32): Remove. | |
42502 | (vrmulhq_m_u16): Remove. | |
42503 | (vrmulhq_x_s8): Remove. | |
42504 | (vrmulhq_x_s16): Remove. | |
42505 | (vrmulhq_x_s32): Remove. | |
42506 | (vrmulhq_x_u8): Remove. | |
42507 | (vrmulhq_x_u16): Remove. | |
42508 | (vrmulhq_x_u32): Remove. | |
42509 | (__arm_vrmulhq_u8): Remove. | |
42510 | (__arm_vrmulhq_s8): Remove. | |
42511 | (__arm_vrmulhq_u16): Remove. | |
42512 | (__arm_vrmulhq_s16): Remove. | |
42513 | (__arm_vrmulhq_u32): Remove. | |
42514 | (__arm_vrmulhq_s32): Remove. | |
42515 | (__arm_vrmulhq_m_s8): Remove. | |
42516 | (__arm_vrmulhq_m_s32): Remove. | |
42517 | (__arm_vrmulhq_m_s16): Remove. | |
42518 | (__arm_vrmulhq_m_u8): Remove. | |
42519 | (__arm_vrmulhq_m_u32): Remove. | |
42520 | (__arm_vrmulhq_m_u16): Remove. | |
42521 | (__arm_vrmulhq_x_s8): Remove. | |
42522 | (__arm_vrmulhq_x_s16): Remove. | |
42523 | (__arm_vrmulhq_x_s32): Remove. | |
42524 | (__arm_vrmulhq_x_u8): Remove. | |
42525 | (__arm_vrmulhq_x_u16): Remove. | |
42526 | (__arm_vrmulhq_x_u32): Remove. | |
42527 | (__arm_vrmulhq): Remove. | |
42528 | (__arm_vrmulhq_m): Remove. | |
42529 | (__arm_vrmulhq_x): Remove. | |
42530 | ||
42531 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42532 | ||
42533 | * config/arm/iterators.md (MVE_INT_SU_BINARY): New. | |
42534 | (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq, | |
42535 | vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq. | |
42536 | (supf): Add VQDMULHQ_S, VQRDMULHQ_S. | |
42537 | * config/arm/mve.md (mve_vabdq_<supf><mode>) | |
42538 | (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>) | |
42539 | (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>) | |
42540 | (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>) | |
42541 | (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>) | |
42542 | (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>) | |
42543 | (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into | |
42544 | ... | |
42545 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
42546 | * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor) | |
42547 | (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of | |
42548 | gen_mve_vhaddq / gen_mve_vrhaddq. | |
42549 | ||
42550 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42551 | ||
42552 | * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New. | |
42553 | (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq, | |
42554 | vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq. | |
42555 | (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S, | |
42556 | VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S. | |
42557 | * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>) | |
42558 | (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>) | |
42559 | (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>) | |
42560 | (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>) | |
42561 | (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>) | |
42562 | (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>) | |
42563 | (mve_vqrdmulhq_m_n_s<mode>): Merge into ... | |
42564 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
42565 | ||
42566 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42567 | ||
42568 | * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New. | |
42569 | (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq, | |
42570 | vqsubq. | |
42571 | (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S. | |
42572 | * config/arm/mve.md (mve_vhaddq_n_<supf><mode>) | |
42573 | (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>) | |
42574 | (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>) | |
42575 | (mve_vqsubq_n_<supf><mode>): Merge into ... | |
42576 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
42577 | ||
42578 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42579 | ||
42580 | * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New. | |
42581 | (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq, | |
42582 | vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq, | |
42583 | vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq, | |
42584 | vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq. | |
42585 | (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S, | |
42586 | VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S, | |
42587 | VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S. | |
42588 | * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New. | |
42589 | (mve_vshlq_m_<supf><mode>): Merged into | |
42590 | @mve_<mve_insn>q_m_<supf><mode>. | |
42591 | (mve_vabdq_m_<supf><mode>): Likewise. | |
42592 | (mve_vhaddq_m_<supf><mode>): Likewise. | |
42593 | (mve_vhsubq_m_<supf><mode>): Likewise. | |
42594 | (mve_vmaxq_m_<supf><mode>): Likewise. | |
42595 | (mve_vminq_m_<supf><mode>): Likewise. | |
42596 | (mve_vmulhq_m_<supf><mode>): Likewise. | |
42597 | (mve_vqaddq_m_<supf><mode>): Likewise. | |
42598 | (mve_vqrshlq_m_<supf><mode>): Likewise. | |
42599 | (mve_vqshlq_m_<supf><mode>): Likewise. | |
42600 | (mve_vqsubq_m_<supf><mode>): Likewise. | |
42601 | (mve_vrhaddq_m_<supf><mode>): Likewise. | |
42602 | (mve_vrmulhq_m_<supf><mode>): Likewise. | |
42603 | (mve_vrshlq_m_<supf><mode>): Likewise. | |
42604 | (mve_vqdmladhq_m_s<mode>): Likewise. | |
42605 | (mve_vqdmladhxq_m_s<mode>): Likewise. | |
42606 | (mve_vqdmlsdhq_m_s<mode>): Likewise. | |
42607 | (mve_vqdmlsdhxq_m_s<mode>): Likewise. | |
42608 | (mve_vqdmulhq_m_s<mode>): Likewise. | |
42609 | (mve_vqrdmladhq_m_s<mode>): Likewise. | |
42610 | (mve_vqrdmladhxq_m_s<mode>): Likewise. | |
42611 | (mve_vqrdmlsdhq_m_s<mode>): Likewise. | |
42612 | (mve_vqrdmlsdhxq_m_s<mode>): Likewise. | |
42613 | (mve_vqrdmulhq_m_s<mode>): Likewise. | |
42614 | ||
42615 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42616 | ||
42617 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New. | |
42618 | * config/arm/arm-mve-builtins-base.def (vcreateq): New. | |
42619 | * config/arm/arm-mve-builtins-base.h (vcreateq): New. | |
42620 | * config/arm/arm_mve.h (vcreateq_f16): Remove. | |
42621 | (vcreateq_f32): Remove. | |
42622 | (vcreateq_u8): Remove. | |
42623 | (vcreateq_u16): Remove. | |
42624 | (vcreateq_u32): Remove. | |
42625 | (vcreateq_u64): Remove. | |
42626 | (vcreateq_s8): Remove. | |
42627 | (vcreateq_s16): Remove. | |
42628 | (vcreateq_s32): Remove. | |
42629 | (vcreateq_s64): Remove. | |
42630 | (__arm_vcreateq_u8): Remove. | |
42631 | (__arm_vcreateq_u16): Remove. | |
42632 | (__arm_vcreateq_u32): Remove. | |
42633 | (__arm_vcreateq_u64): Remove. | |
42634 | (__arm_vcreateq_s8): Remove. | |
42635 | (__arm_vcreateq_s16): Remove. | |
42636 | (__arm_vcreateq_s32): Remove. | |
42637 | (__arm_vcreateq_s64): Remove. | |
42638 | (__arm_vcreateq_f16): Remove. | |
42639 | (__arm_vcreateq_f32): Remove. | |
42640 | ||
42641 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42642 | ||
42643 | * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New. | |
42644 | (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F. | |
42645 | * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ... | |
42646 | (@mve_<mve_insn>q_f<mode>): ... this. | |
42647 | (mve_vcreateq_<supf><mode>): Rename into ... | |
42648 | (@mve_<mve_insn>q_<supf><mode>): ... this. | |
42649 | ||
42650 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42651 | ||
42652 | * config/arm/arm-mve-builtins-shapes.cc (create): New. | |
42653 | * config/arm/arm-mve-builtins-shapes.h: (create): New. | |
42654 | ||
42655 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42656 | ||
42657 | * config/arm/arm-mve-builtins-functions.h (class | |
42658 | unspec_mve_function_exact_insn): New. | |
42659 | ||
42660 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42661 | ||
42662 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New. | |
42663 | (vorrq): New. | |
42664 | * config/arm/arm-mve-builtins-base.def (vorrq): New. | |
42665 | * config/arm/arm-mve-builtins-base.h (vorrq): New. | |
42666 | * config/arm/arm-mve-builtins.cc | |
42667 | (function_instance::has_inactive_argument): Handle vorrq. | |
42668 | * config/arm/arm_mve.h (vorrq): Remove. | |
42669 | (vorrq_m_n): Remove. | |
42670 | (vorrq_m): Remove. | |
42671 | (vorrq_x): Remove. | |
42672 | (vorrq_u8): Remove. | |
42673 | (vorrq_s8): Remove. | |
42674 | (vorrq_u16): Remove. | |
42675 | (vorrq_s16): Remove. | |
42676 | (vorrq_u32): Remove. | |
42677 | (vorrq_s32): Remove. | |
42678 | (vorrq_n_u16): Remove. | |
42679 | (vorrq_f16): Remove. | |
42680 | (vorrq_n_s16): Remove. | |
42681 | (vorrq_n_u32): Remove. | |
42682 | (vorrq_f32): Remove. | |
42683 | (vorrq_n_s32): Remove. | |
42684 | (vorrq_m_n_s16): Remove. | |
42685 | (vorrq_m_n_u16): Remove. | |
42686 | (vorrq_m_n_s32): Remove. | |
42687 | (vorrq_m_n_u32): Remove. | |
42688 | (vorrq_m_s8): Remove. | |
42689 | (vorrq_m_s32): Remove. | |
42690 | (vorrq_m_s16): Remove. | |
42691 | (vorrq_m_u8): Remove. | |
42692 | (vorrq_m_u32): Remove. | |
42693 | (vorrq_m_u16): Remove. | |
42694 | (vorrq_m_f32): Remove. | |
42695 | (vorrq_m_f16): Remove. | |
42696 | (vorrq_x_s8): Remove. | |
42697 | (vorrq_x_s16): Remove. | |
42698 | (vorrq_x_s32): Remove. | |
42699 | (vorrq_x_u8): Remove. | |
42700 | (vorrq_x_u16): Remove. | |
42701 | (vorrq_x_u32): Remove. | |
42702 | (vorrq_x_f16): Remove. | |
42703 | (vorrq_x_f32): Remove. | |
42704 | (__arm_vorrq_u8): Remove. | |
42705 | (__arm_vorrq_s8): Remove. | |
42706 | (__arm_vorrq_u16): Remove. | |
42707 | (__arm_vorrq_s16): Remove. | |
42708 | (__arm_vorrq_u32): Remove. | |
42709 | (__arm_vorrq_s32): Remove. | |
42710 | (__arm_vorrq_n_u16): Remove. | |
42711 | (__arm_vorrq_n_s16): Remove. | |
42712 | (__arm_vorrq_n_u32): Remove. | |
42713 | (__arm_vorrq_n_s32): Remove. | |
42714 | (__arm_vorrq_m_n_s16): Remove. | |
42715 | (__arm_vorrq_m_n_u16): Remove. | |
42716 | (__arm_vorrq_m_n_s32): Remove. | |
42717 | (__arm_vorrq_m_n_u32): Remove. | |
42718 | (__arm_vorrq_m_s8): Remove. | |
42719 | (__arm_vorrq_m_s32): Remove. | |
42720 | (__arm_vorrq_m_s16): Remove. | |
42721 | (__arm_vorrq_m_u8): Remove. | |
42722 | (__arm_vorrq_m_u32): Remove. | |
42723 | (__arm_vorrq_m_u16): Remove. | |
42724 | (__arm_vorrq_x_s8): Remove. | |
42725 | (__arm_vorrq_x_s16): Remove. | |
42726 | (__arm_vorrq_x_s32): Remove. | |
42727 | (__arm_vorrq_x_u8): Remove. | |
42728 | (__arm_vorrq_x_u16): Remove. | |
42729 | (__arm_vorrq_x_u32): Remove. | |
42730 | (__arm_vorrq_f16): Remove. | |
42731 | (__arm_vorrq_f32): Remove. | |
42732 | (__arm_vorrq_m_f32): Remove. | |
42733 | (__arm_vorrq_m_f16): Remove. | |
42734 | (__arm_vorrq_x_f16): Remove. | |
42735 | (__arm_vorrq_x_f32): Remove. | |
42736 | (__arm_vorrq): Remove. | |
42737 | (__arm_vorrq_m_n): Remove. | |
42738 | (__arm_vorrq_m): Remove. | |
42739 | (__arm_vorrq_x): Remove. | |
42740 | ||
42741 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42742 | ||
42743 | * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New. | |
42744 | * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New. | |
42745 | * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static. | |
42746 | * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare. | |
42747 | ||
42748 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42749 | ||
42750 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New. | |
42751 | (vandq,veorq): New. | |
42752 | * config/arm/arm-mve-builtins-base.def (vandq, veorq): New. | |
42753 | * config/arm/arm-mve-builtins-base.h (vandq, veorq): New. | |
42754 | * config/arm/arm_mve.h (vandq): Remove. | |
42755 | (vandq_m): Remove. | |
42756 | (vandq_x): Remove. | |
42757 | (vandq_u8): Remove. | |
42758 | (vandq_s8): Remove. | |
42759 | (vandq_u16): Remove. | |
42760 | (vandq_s16): Remove. | |
42761 | (vandq_u32): Remove. | |
42762 | (vandq_s32): Remove. | |
42763 | (vandq_f16): Remove. | |
42764 | (vandq_f32): Remove. | |
42765 | (vandq_m_s8): Remove. | |
42766 | (vandq_m_s32): Remove. | |
42767 | (vandq_m_s16): Remove. | |
42768 | (vandq_m_u8): Remove. | |
42769 | (vandq_m_u32): Remove. | |
42770 | (vandq_m_u16): Remove. | |
42771 | (vandq_m_f32): Remove. | |
42772 | (vandq_m_f16): Remove. | |
42773 | (vandq_x_s8): Remove. | |
42774 | (vandq_x_s16): Remove. | |
42775 | (vandq_x_s32): Remove. | |
42776 | (vandq_x_u8): Remove. | |
42777 | (vandq_x_u16): Remove. | |
42778 | (vandq_x_u32): Remove. | |
42779 | (vandq_x_f16): Remove. | |
42780 | (vandq_x_f32): Remove. | |
42781 | (__arm_vandq_u8): Remove. | |
42782 | (__arm_vandq_s8): Remove. | |
42783 | (__arm_vandq_u16): Remove. | |
42784 | (__arm_vandq_s16): Remove. | |
42785 | (__arm_vandq_u32): Remove. | |
42786 | (__arm_vandq_s32): Remove. | |
42787 | (__arm_vandq_m_s8): Remove. | |
42788 | (__arm_vandq_m_s32): Remove. | |
42789 | (__arm_vandq_m_s16): Remove. | |
42790 | (__arm_vandq_m_u8): Remove. | |
42791 | (__arm_vandq_m_u32): Remove. | |
42792 | (__arm_vandq_m_u16): Remove. | |
42793 | (__arm_vandq_x_s8): Remove. | |
42794 | (__arm_vandq_x_s16): Remove. | |
42795 | (__arm_vandq_x_s32): Remove. | |
42796 | (__arm_vandq_x_u8): Remove. | |
42797 | (__arm_vandq_x_u16): Remove. | |
42798 | (__arm_vandq_x_u32): Remove. | |
42799 | (__arm_vandq_f16): Remove. | |
42800 | (__arm_vandq_f32): Remove. | |
42801 | (__arm_vandq_m_f32): Remove. | |
42802 | (__arm_vandq_m_f16): Remove. | |
42803 | (__arm_vandq_x_f16): Remove. | |
42804 | (__arm_vandq_x_f32): Remove. | |
42805 | (__arm_vandq): Remove. | |
42806 | (__arm_vandq_m): Remove. | |
42807 | (__arm_vandq_x): Remove. | |
42808 | (veorq_m): Remove. | |
42809 | (veorq_x): Remove. | |
42810 | (veorq_u8): Remove. | |
42811 | (veorq_s8): Remove. | |
42812 | (veorq_u16): Remove. | |
42813 | (veorq_s16): Remove. | |
42814 | (veorq_u32): Remove. | |
42815 | (veorq_s32): Remove. | |
42816 | (veorq_f16): Remove. | |
42817 | (veorq_f32): Remove. | |
42818 | (veorq_m_s8): Remove. | |
42819 | (veorq_m_s32): Remove. | |
42820 | (veorq_m_s16): Remove. | |
42821 | (veorq_m_u8): Remove. | |
42822 | (veorq_m_u32): Remove. | |
42823 | (veorq_m_u16): Remove. | |
42824 | (veorq_m_f32): Remove. | |
42825 | (veorq_m_f16): Remove. | |
42826 | (veorq_x_s8): Remove. | |
42827 | (veorq_x_s16): Remove. | |
42828 | (veorq_x_s32): Remove. | |
42829 | (veorq_x_u8): Remove. | |
42830 | (veorq_x_u16): Remove. | |
42831 | (veorq_x_u32): Remove. | |
42832 | (veorq_x_f16): Remove. | |
42833 | (veorq_x_f32): Remove. | |
42834 | (__arm_veorq_u8): Remove. | |
42835 | (__arm_veorq_s8): Remove. | |
42836 | (__arm_veorq_u16): Remove. | |
42837 | (__arm_veorq_s16): Remove. | |
42838 | (__arm_veorq_u32): Remove. | |
42839 | (__arm_veorq_s32): Remove. | |
42840 | (__arm_veorq_m_s8): Remove. | |
42841 | (__arm_veorq_m_s32): Remove. | |
42842 | (__arm_veorq_m_s16): Remove. | |
42843 | (__arm_veorq_m_u8): Remove. | |
42844 | (__arm_veorq_m_u32): Remove. | |
42845 | (__arm_veorq_m_u16): Remove. | |
42846 | (__arm_veorq_x_s8): Remove. | |
42847 | (__arm_veorq_x_s16): Remove. | |
42848 | (__arm_veorq_x_s32): Remove. | |
42849 | (__arm_veorq_x_u8): Remove. | |
42850 | (__arm_veorq_x_u16): Remove. | |
42851 | (__arm_veorq_x_u32): Remove. | |
42852 | (__arm_veorq_f16): Remove. | |
42853 | (__arm_veorq_f32): Remove. | |
42854 | (__arm_veorq_m_f32): Remove. | |
42855 | (__arm_veorq_m_f16): Remove. | |
42856 | (__arm_veorq_x_f16): Remove. | |
42857 | (__arm_veorq_x_f32): Remove. | |
42858 | (__arm_veorq): Remove. | |
42859 | (__arm_veorq_m): Remove. | |
42860 | (__arm_veorq_x): Remove. | |
42861 | ||
42862 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42863 | ||
42864 | * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC) | |
42865 | (MVE_FP_M_BINARY_LOGIC): New. | |
42866 | (MVE_INT_M_N_BINARY_LOGIC): New. | |
42867 | (MVE_INT_N_BINARY_LOGIC): New. | |
42868 | (mve_insn): Add vand, veor, vorr, vbic. | |
42869 | * config/arm/mve.md (mve_vandq_m_<supf><mode>) | |
42870 | (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>) | |
42871 | (mve_vbicq_m_<supf><mode>): Merge into ... | |
42872 | (@mve_<mve_insn>q_m_<supf><mode>): ... this. | |
42873 | (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>) | |
42874 | (mve_vbicq_m_f<mode>): Merge into ... | |
42875 | (@mve_<mve_insn>q_m_f<mode>): ... this. | |
42876 | (mve_vorrq_n_<supf><mode>) | |
42877 | (mve_vbicq_n_<supf><mode>): Merge into ... | |
42878 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
42879 | (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge | |
42880 | into ... | |
42881 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
42882 | ||
42883 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42884 | ||
42885 | * config/arm/arm-mve-builtins-shapes.cc (binary): New. | |
42886 | * config/arm/arm-mve-builtins-shapes.h (binary): New. | |
42887 | ||
42888 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
42889 | ||
42890 | * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N): | |
42891 | New. | |
42892 | (vaddq, vmulq, vsubq): New. | |
42893 | * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New. | |
42894 | * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New. | |
42895 | * config/arm/arm_mve.h (vaddq): Remove. | |
42896 | (vaddq_m): Remove. | |
42897 | (vaddq_x): Remove. | |
42898 | (vaddq_n_u8): Remove. | |
42899 | (vaddq_n_s8): Remove. | |
42900 | (vaddq_n_u16): Remove. | |
42901 | (vaddq_n_s16): Remove. | |
42902 | (vaddq_n_u32): Remove. | |
42903 | (vaddq_n_s32): Remove. | |
42904 | (vaddq_n_f16): Remove. | |
42905 | (vaddq_n_f32): Remove. | |
42906 | (vaddq_m_n_s8): Remove. | |
42907 | (vaddq_m_n_s32): Remove. | |
42908 | (vaddq_m_n_s16): Remove. | |
42909 | (vaddq_m_n_u8): Remove. | |
42910 | (vaddq_m_n_u32): Remove. | |
42911 | (vaddq_m_n_u16): Remove. | |
42912 | (vaddq_m_s8): Remove. | |
42913 | (vaddq_m_s32): Remove. | |
42914 | (vaddq_m_s16): Remove. | |
42915 | (vaddq_m_u8): Remove. | |
42916 | (vaddq_m_u32): Remove. | |
42917 | (vaddq_m_u16): Remove. | |
42918 | (vaddq_m_f32): Remove. | |
42919 | (vaddq_m_f16): Remove. | |
42920 | (vaddq_m_n_f32): Remove. | |
42921 | (vaddq_m_n_f16): Remove. | |
42922 | (vaddq_s8): Remove. | |
42923 | (vaddq_s16): Remove. | |
42924 | (vaddq_s32): Remove. | |
42925 | (vaddq_u8): Remove. | |
42926 | (vaddq_u16): Remove. | |
42927 | (vaddq_u32): Remove. | |
42928 | (vaddq_f16): Remove. | |
42929 | (vaddq_f32): Remove. | |
42930 | (vaddq_x_s8): Remove. | |
42931 | (vaddq_x_s16): Remove. | |
42932 | (vaddq_x_s32): Remove. | |
42933 | (vaddq_x_n_s8): Remove. | |
42934 | (vaddq_x_n_s16): Remove. | |
42935 | (vaddq_x_n_s32): Remove. | |
42936 | (vaddq_x_u8): Remove. | |
42937 | (vaddq_x_u16): Remove. | |
42938 | (vaddq_x_u32): Remove. | |
42939 | (vaddq_x_n_u8): Remove. | |
42940 | (vaddq_x_n_u16): Remove. | |
42941 | (vaddq_x_n_u32): Remove. | |
42942 | (vaddq_x_f16): Remove. | |
42943 | (vaddq_x_f32): Remove. | |
42944 | (vaddq_x_n_f16): Remove. | |
42945 | (vaddq_x_n_f32): Remove. | |
42946 | (__arm_vaddq_n_u8): Remove. | |
42947 | (__arm_vaddq_n_s8): Remove. | |
42948 | (__arm_vaddq_n_u16): Remove. | |
42949 | (__arm_vaddq_n_s16): Remove. | |
42950 | (__arm_vaddq_n_u32): Remove. | |
42951 | (__arm_vaddq_n_s32): Remove. | |
42952 | (__arm_vaddq_m_n_s8): Remove. | |
42953 | (__arm_vaddq_m_n_s32): Remove. | |
42954 | (__arm_vaddq_m_n_s16): Remove. | |
42955 | (__arm_vaddq_m_n_u8): Remove. | |
42956 | (__arm_vaddq_m_n_u32): Remove. | |
42957 | (__arm_vaddq_m_n_u16): Remove. | |
42958 | (__arm_vaddq_m_s8): Remove. | |
42959 | (__arm_vaddq_m_s32): Remove. | |
42960 | (__arm_vaddq_m_s16): Remove. | |
42961 | (__arm_vaddq_m_u8): Remove. | |
42962 | (__arm_vaddq_m_u32): Remove. | |
42963 | (__arm_vaddq_m_u16): Remove. | |
42964 | (__arm_vaddq_s8): Remove. | |
42965 | (__arm_vaddq_s16): Remove. | |
42966 | (__arm_vaddq_s32): Remove. | |
42967 | (__arm_vaddq_u8): Remove. | |
42968 | (__arm_vaddq_u16): Remove. | |
42969 | (__arm_vaddq_u32): Remove. | |
42970 | (__arm_vaddq_x_s8): Remove. | |
42971 | (__arm_vaddq_x_s16): Remove. | |
42972 | (__arm_vaddq_x_s32): Remove. | |
42973 | (__arm_vaddq_x_n_s8): Remove. | |
42974 | (__arm_vaddq_x_n_s16): Remove. | |
42975 | (__arm_vaddq_x_n_s32): Remove. | |
42976 | (__arm_vaddq_x_u8): Remove. | |
42977 | (__arm_vaddq_x_u16): Remove. | |
42978 | (__arm_vaddq_x_u32): Remove. | |
42979 | (__arm_vaddq_x_n_u8): Remove. | |
42980 | (__arm_vaddq_x_n_u16): Remove. | |
42981 | (__arm_vaddq_x_n_u32): Remove. | |
42982 | (__arm_vaddq_n_f16): Remove. | |
42983 | (__arm_vaddq_n_f32): Remove. | |
42984 | (__arm_vaddq_m_f32): Remove. | |
42985 | (__arm_vaddq_m_f16): Remove. | |
42986 | (__arm_vaddq_m_n_f32): Remove. | |
42987 | (__arm_vaddq_m_n_f16): Remove. | |
42988 | (__arm_vaddq_f16): Remove. | |
42989 | (__arm_vaddq_f32): Remove. | |
42990 | (__arm_vaddq_x_f16): Remove. | |
42991 | (__arm_vaddq_x_f32): Remove. | |
42992 | (__arm_vaddq_x_n_f16): Remove. | |
42993 | (__arm_vaddq_x_n_f32): Remove. | |
42994 | (__arm_vaddq): Remove. | |
42995 | (__arm_vaddq_m): Remove. | |
42996 | (__arm_vaddq_x): Remove. | |
42997 | (vmulq): Remove. | |
42998 | (vmulq_m): Remove. | |
42999 | (vmulq_x): Remove. | |
43000 | (vmulq_u8): Remove. | |
43001 | (vmulq_n_u8): Remove. | |
43002 | (vmulq_s8): Remove. | |
43003 | (vmulq_n_s8): Remove. | |
43004 | (vmulq_u16): Remove. | |
43005 | (vmulq_n_u16): Remove. | |
43006 | (vmulq_s16): Remove. | |
43007 | (vmulq_n_s16): Remove. | |
43008 | (vmulq_u32): Remove. | |
43009 | (vmulq_n_u32): Remove. | |
43010 | (vmulq_s32): Remove. | |
43011 | (vmulq_n_s32): Remove. | |
43012 | (vmulq_n_f16): Remove. | |
43013 | (vmulq_f16): Remove. | |
43014 | (vmulq_n_f32): Remove. | |
43015 | (vmulq_f32): Remove. | |
43016 | (vmulq_m_n_s8): Remove. | |
43017 | (vmulq_m_n_s32): Remove. | |
43018 | (vmulq_m_n_s16): Remove. | |
43019 | (vmulq_m_n_u8): Remove. | |
43020 | (vmulq_m_n_u32): Remove. | |
43021 | (vmulq_m_n_u16): Remove. | |
43022 | (vmulq_m_s8): Remove. | |
43023 | (vmulq_m_s32): Remove. | |
43024 | (vmulq_m_s16): Remove. | |
43025 | (vmulq_m_u8): Remove. | |
43026 | (vmulq_m_u32): Remove. | |
43027 | (vmulq_m_u16): Remove. | |
43028 | (vmulq_m_f32): Remove. | |
43029 | (vmulq_m_f16): Remove. | |
43030 | (vmulq_m_n_f32): Remove. | |
43031 | (vmulq_m_n_f16): Remove. | |
43032 | (vmulq_x_s8): Remove. | |
43033 | (vmulq_x_s16): Remove. | |
43034 | (vmulq_x_s32): Remove. | |
43035 | (vmulq_x_n_s8): Remove. | |
43036 | (vmulq_x_n_s16): Remove. | |
43037 | (vmulq_x_n_s32): Remove. | |
43038 | (vmulq_x_u8): Remove. | |
43039 | (vmulq_x_u16): Remove. | |
43040 | (vmulq_x_u32): Remove. | |
43041 | (vmulq_x_n_u8): Remove. | |
43042 | (vmulq_x_n_u16): Remove. | |
43043 | (vmulq_x_n_u32): Remove. | |
43044 | (vmulq_x_f16): Remove. | |
43045 | (vmulq_x_f32): Remove. | |
43046 | (vmulq_x_n_f16): Remove. | |
43047 | (vmulq_x_n_f32): Remove. | |
43048 | (__arm_vmulq_u8): Remove. | |
43049 | (__arm_vmulq_n_u8): Remove. | |
43050 | (__arm_vmulq_s8): Remove. | |
43051 | (__arm_vmulq_n_s8): Remove. | |
43052 | (__arm_vmulq_u16): Remove. | |
43053 | (__arm_vmulq_n_u16): Remove. | |
43054 | (__arm_vmulq_s16): Remove. | |
43055 | (__arm_vmulq_n_s16): Remove. | |
43056 | (__arm_vmulq_u32): Remove. | |
43057 | (__arm_vmulq_n_u32): Remove. | |
43058 | (__arm_vmulq_s32): Remove. | |
43059 | (__arm_vmulq_n_s32): Remove. | |
43060 | (__arm_vmulq_m_n_s8): Remove. | |
43061 | (__arm_vmulq_m_n_s32): Remove. | |
43062 | (__arm_vmulq_m_n_s16): Remove. | |
43063 | (__arm_vmulq_m_n_u8): Remove. | |
43064 | (__arm_vmulq_m_n_u32): Remove. | |
43065 | (__arm_vmulq_m_n_u16): Remove. | |
43066 | (__arm_vmulq_m_s8): Remove. | |
43067 | (__arm_vmulq_m_s32): Remove. | |
43068 | (__arm_vmulq_m_s16): Remove. | |
43069 | (__arm_vmulq_m_u8): Remove. | |
43070 | (__arm_vmulq_m_u32): Remove. | |
43071 | (__arm_vmulq_m_u16): Remove. | |
43072 | (__arm_vmulq_x_s8): Remove. | |
43073 | (__arm_vmulq_x_s16): Remove. | |
43074 | (__arm_vmulq_x_s32): Remove. | |
43075 | (__arm_vmulq_x_n_s8): Remove. | |
43076 | (__arm_vmulq_x_n_s16): Remove. | |
43077 | (__arm_vmulq_x_n_s32): Remove. | |
43078 | (__arm_vmulq_x_u8): Remove. | |
43079 | (__arm_vmulq_x_u16): Remove. | |
43080 | (__arm_vmulq_x_u32): Remove. | |
43081 | (__arm_vmulq_x_n_u8): Remove. | |
43082 | (__arm_vmulq_x_n_u16): Remove. | |
43083 | (__arm_vmulq_x_n_u32): Remove. | |
43084 | (__arm_vmulq_n_f16): Remove. | |
43085 | (__arm_vmulq_f16): Remove. | |
43086 | (__arm_vmulq_n_f32): Remove. | |
43087 | (__arm_vmulq_f32): Remove. | |
43088 | (__arm_vmulq_m_f32): Remove. | |
43089 | (__arm_vmulq_m_f16): Remove. | |
43090 | (__arm_vmulq_m_n_f32): Remove. | |
43091 | (__arm_vmulq_m_n_f16): Remove. | |
43092 | (__arm_vmulq_x_f16): Remove. | |
43093 | (__arm_vmulq_x_f32): Remove. | |
43094 | (__arm_vmulq_x_n_f16): Remove. | |
43095 | (__arm_vmulq_x_n_f32): Remove. | |
43096 | (__arm_vmulq): Remove. | |
43097 | (__arm_vmulq_m): Remove. | |
43098 | (__arm_vmulq_x): Remove. | |
43099 | (vsubq): Remove. | |
43100 | (vsubq_m): Remove. | |
43101 | (vsubq_x): Remove. | |
43102 | (vsubq_n_f16): Remove. | |
43103 | (vsubq_n_f32): Remove. | |
43104 | (vsubq_u8): Remove. | |
43105 | (vsubq_n_u8): Remove. | |
43106 | (vsubq_s8): Remove. | |
43107 | (vsubq_n_s8): Remove. | |
43108 | (vsubq_u16): Remove. | |
43109 | (vsubq_n_u16): Remove. | |
43110 | (vsubq_s16): Remove. | |
43111 | (vsubq_n_s16): Remove. | |
43112 | (vsubq_u32): Remove. | |
43113 | (vsubq_n_u32): Remove. | |
43114 | (vsubq_s32): Remove. | |
43115 | (vsubq_n_s32): Remove. | |
43116 | (vsubq_f16): Remove. | |
43117 | (vsubq_f32): Remove. | |
43118 | (vsubq_m_s8): Remove. | |
43119 | (vsubq_m_u8): Remove. | |
43120 | (vsubq_m_s16): Remove. | |
43121 | (vsubq_m_u16): Remove. | |
43122 | (vsubq_m_s32): Remove. | |
43123 | (vsubq_m_u32): Remove. | |
43124 | (vsubq_m_n_s8): Remove. | |
43125 | (vsubq_m_n_s32): Remove. | |
43126 | (vsubq_m_n_s16): Remove. | |
43127 | (vsubq_m_n_u8): Remove. | |
43128 | (vsubq_m_n_u32): Remove. | |
43129 | (vsubq_m_n_u16): Remove. | |
43130 | (vsubq_m_f32): Remove. | |
43131 | (vsubq_m_f16): Remove. | |
43132 | (vsubq_m_n_f32): Remove. | |
43133 | (vsubq_m_n_f16): Remove. | |
43134 | (vsubq_x_s8): Remove. | |
43135 | (vsubq_x_s16): Remove. | |
43136 | (vsubq_x_s32): Remove. | |
43137 | (vsubq_x_n_s8): Remove. | |
43138 | (vsubq_x_n_s16): Remove. | |
43139 | (vsubq_x_n_s32): Remove. | |
43140 | (vsubq_x_u8): Remove. | |
43141 | (vsubq_x_u16): Remove. | |
43142 | (vsubq_x_u32): Remove. | |
43143 | (vsubq_x_n_u8): Remove. | |
43144 | (vsubq_x_n_u16): Remove. | |
43145 | (vsubq_x_n_u32): Remove. | |
43146 | (vsubq_x_f16): Remove. | |
43147 | (vsubq_x_f32): Remove. | |
43148 | (vsubq_x_n_f16): Remove. | |
43149 | (vsubq_x_n_f32): Remove. | |
43150 | (__arm_vsubq_u8): Remove. | |
43151 | (__arm_vsubq_n_u8): Remove. | |
43152 | (__arm_vsubq_s8): Remove. | |
43153 | (__arm_vsubq_n_s8): Remove. | |
43154 | (__arm_vsubq_u16): Remove. | |
43155 | (__arm_vsubq_n_u16): Remove. | |
43156 | (__arm_vsubq_s16): Remove. | |
43157 | (__arm_vsubq_n_s16): Remove. | |
43158 | (__arm_vsubq_u32): Remove. | |
43159 | (__arm_vsubq_n_u32): Remove. | |
43160 | (__arm_vsubq_s32): Remove. | |
43161 | (__arm_vsubq_n_s32): Remove. | |
43162 | (__arm_vsubq_m_s8): Remove. | |
43163 | (__arm_vsubq_m_u8): Remove. | |
43164 | (__arm_vsubq_m_s16): Remove. | |
43165 | (__arm_vsubq_m_u16): Remove. | |
43166 | (__arm_vsubq_m_s32): Remove. | |
43167 | (__arm_vsubq_m_u32): Remove. | |
43168 | (__arm_vsubq_m_n_s8): Remove. | |
43169 | (__arm_vsubq_m_n_s32): Remove. | |
43170 | (__arm_vsubq_m_n_s16): Remove. | |
43171 | (__arm_vsubq_m_n_u8): Remove. | |
43172 | (__arm_vsubq_m_n_u32): Remove. | |
43173 | (__arm_vsubq_m_n_u16): Remove. | |
43174 | (__arm_vsubq_x_s8): Remove. | |
43175 | (__arm_vsubq_x_s16): Remove. | |
43176 | (__arm_vsubq_x_s32): Remove. | |
43177 | (__arm_vsubq_x_n_s8): Remove. | |
43178 | (__arm_vsubq_x_n_s16): Remove. | |
43179 | (__arm_vsubq_x_n_s32): Remove. | |
43180 | (__arm_vsubq_x_u8): Remove. | |
43181 | (__arm_vsubq_x_u16): Remove. | |
43182 | (__arm_vsubq_x_u32): Remove. | |
43183 | (__arm_vsubq_x_n_u8): Remove. | |
43184 | (__arm_vsubq_x_n_u16): Remove. | |
43185 | (__arm_vsubq_x_n_u32): Remove. | |
43186 | (__arm_vsubq_n_f16): Remove. | |
43187 | (__arm_vsubq_n_f32): Remove. | |
43188 | (__arm_vsubq_f16): Remove. | |
43189 | (__arm_vsubq_f32): Remove. | |
43190 | (__arm_vsubq_m_f32): Remove. | |
43191 | (__arm_vsubq_m_f16): Remove. | |
43192 | (__arm_vsubq_m_n_f32): Remove. | |
43193 | (__arm_vsubq_m_n_f16): Remove. | |
43194 | (__arm_vsubq_x_f16): Remove. | |
43195 | (__arm_vsubq_x_f32): Remove. | |
43196 | (__arm_vsubq_x_n_f16): Remove. | |
43197 | (__arm_vsubq_x_n_f32): Remove. | |
43198 | (__arm_vsubq): Remove. | |
43199 | (__arm_vsubq_m): Remove. | |
43200 | (__arm_vsubq_x): Remove. | |
43201 | * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f): | |
43202 | Remove. | |
43203 | (vmulq_u, vmulq_s, vmulq_f): Remove. | |
43204 | * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove. | |
43205 | (mve_vmulq_<supf><mode>): Remove. | |
43206 | ||
43207 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
43208 | ||
43209 | * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY) | |
43210 | (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY) | |
43211 | (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New | |
43212 | iterators. | |
43213 | * config/arm/mve.md | |
43214 | (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>): | |
43215 | Factorize into ... | |
43216 | (@mve_<mve_insn>q_n_f<mode>): ... this. | |
43217 | (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>) | |
43218 | (mve_vsubq_n_<supf><mode>): Factorize into ... | |
43219 | (@mve_<mve_insn>q_n_<supf><mode>): ... this. | |
43220 | (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize | |
43221 | into ... | |
43222 | (mve_<mve_addsubmul>q<mode>): ... this. | |
43223 | (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>): | |
43224 | Factorize into ... | |
43225 | (mve_<mve_addsubmul>q_f<mode>): ... this. | |
43226 | (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>) | |
43227 | (mve_vsubq_m_<supf><mode>): Factorize into ... | |
43228 | (@mve_<mve_insn>q_m_<supf><mode>): ... this, | |
43229 | (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>) | |
43230 | (mve_vsubq_m_n_<supf><mode>): Factorize into ... | |
43231 | (@mve_<mve_insn>q_m_n_<supf><mode>): ... this. | |
43232 | (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>): | |
43233 | Factorize into ... | |
43234 | (@mve_<mve_insn>q_m_f<mode>): ... this. | |
43235 | (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>) | |
43236 | (mve_vsubq_m_n_f<mode>): Factorize into ... | |
43237 | (@mve_<mve_insn>q_m_n_f<mode>): ... this. | |
43238 | ||
43239 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
43240 | ||
43241 | * config/arm/arm-mve-builtins-functions.h (class | |
43242 | unspec_based_mve_function_base): New. | |
43243 | (class unspec_based_mve_function_exact_insn): New. | |
43244 | ||
43245 | 2023-05-03 Christophe Lyon <christophe.lyon@arm.com> | |
43246 | ||
43247 | * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New. | |
43248 | * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New. | |
43249 | ||
43250 | 2023-05-03 Murray Steele <murray.steele@arm.com> | |
43251 | Christophe Lyon <christophe.lyon@arm.com> | |
43252 | ||
43253 | * config/arm/arm-mve-builtins-base.cc (class | |
43254 | vuninitializedq_impl): New. | |
43255 | * config/arm/arm-mve-builtins-base.def (vuninitializedq): New. | |
43256 | * config/arm/arm-mve-builtins-base.h (vuninitializedq): New | |
43257 | declaration. | |
43258 | * config/arm/arm-mve-builtins-shapes.cc (inherent): New. | |
43259 | * config/arm/arm-mve-builtins-shapes.h (inherent): New | |
43260 | declaration. | |
43261 | * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ... | |
43262 | * config/arm/arm_mve.h (__arm_vuninitializedq): ... here. | |
43263 | (__arm_vuninitializedq_u8): Remove. | |
43264 | (__arm_vuninitializedq_u16): Remove. | |
43265 | (__arm_vuninitializedq_u32): Remove. | |
43266 | (__arm_vuninitializedq_u64): Remove. | |
43267 | (__arm_vuninitializedq_s8): Remove. | |
43268 | (__arm_vuninitializedq_s16): Remove. | |
43269 | (__arm_vuninitializedq_s32): Remove. | |
43270 | (__arm_vuninitializedq_s64): Remove. | |
43271 | (__arm_vuninitializedq_f16): Remove. | |
43272 | (__arm_vuninitializedq_f32): Remove. | |
43273 | ||
43274 | 2023-05-03 Murray Steele <murray.steele@arm.com> | |
43275 | Christophe Lyon <christophe.lyon@arm.com> | |
43276 | ||
43277 | * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class. | |
43278 | * config/arm/arm-mve-builtins-base.def: Define vreinterpretq. | |
43279 | * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration. | |
43280 | * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function. | |
43281 | (parse_type): Likewise. | |
43282 | (parse_signature): Likewise. | |
43283 | (build_one): Likewise. | |
43284 | (build_all): Likewise. | |
43285 | (overloaded_base): New struct. | |
43286 | (unary_convert_def): Likewise. | |
43287 | * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare. | |
43288 | * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New | |
43289 | macro. | |
43290 | (TYPES_reinterpret_unsigned1): Likewise. | |
43291 | (TYPES_reinterpret_integer): Likewise. | |
43292 | (TYPES_reinterpret_integer1): Likewise. | |
43293 | (TYPES_reinterpret_float1): Likewise. | |
43294 | (TYPES_reinterpret_float): Likewise. | |
43295 | (reinterpret_integer): New. | |
43296 | (reinterpret_float): New. | |
43297 | (handle_arm_mve_h): Register builtins. | |
43298 | * config/arm/arm_mve.h (vreinterpretq_s16): Remove. | |
43299 | (vreinterpretq_s32): Likewise. | |
43300 | (vreinterpretq_s64): Likewise. | |
43301 | (vreinterpretq_s8): Likewise. | |
43302 | (vreinterpretq_u16): Likewise. | |
43303 | (vreinterpretq_u32): Likewise. | |
43304 | (vreinterpretq_u64): Likewise. | |
43305 | (vreinterpretq_u8): Likewise. | |
43306 | (vreinterpretq_f16): Likewise. | |
43307 | (vreinterpretq_f32): Likewise. | |
43308 | (vreinterpretq_s16_s32): Likewise. | |
43309 | (vreinterpretq_s16_s64): Likewise. | |
43310 | (vreinterpretq_s16_s8): Likewise. | |
43311 | (vreinterpretq_s16_u16): Likewise. | |
43312 | (vreinterpretq_s16_u32): Likewise. | |
43313 | (vreinterpretq_s16_u64): Likewise. | |
43314 | (vreinterpretq_s16_u8): Likewise. | |
43315 | (vreinterpretq_s32_s16): Likewise. | |
43316 | (vreinterpretq_s32_s64): Likewise. | |
43317 | (vreinterpretq_s32_s8): Likewise. | |
43318 | (vreinterpretq_s32_u16): Likewise. | |
43319 | (vreinterpretq_s32_u32): Likewise. | |
43320 | (vreinterpretq_s32_u64): Likewise. | |
43321 | (vreinterpretq_s32_u8): Likewise. | |
43322 | (vreinterpretq_s64_s16): Likewise. | |
43323 | (vreinterpretq_s64_s32): Likewise. | |
43324 | (vreinterpretq_s64_s8): Likewise. | |
43325 | (vreinterpretq_s64_u16): Likewise. | |
43326 | (vreinterpretq_s64_u32): Likewise. | |
43327 | (vreinterpretq_s64_u64): Likewise. | |
43328 | (vreinterpretq_s64_u8): Likewise. | |
43329 | (vreinterpretq_s8_s16): Likewise. | |
43330 | (vreinterpretq_s8_s32): Likewise. | |
43331 | (vreinterpretq_s8_s64): Likewise. | |
43332 | (vreinterpretq_s8_u16): Likewise. | |
43333 | (vreinterpretq_s8_u32): Likewise. | |
43334 | (vreinterpretq_s8_u64): Likewise. | |
43335 | (vreinterpretq_s8_u8): Likewise. | |
43336 | (vreinterpretq_u16_s16): Likewise. | |
43337 | (vreinterpretq_u16_s32): Likewise. | |
43338 | (vreinterpretq_u16_s64): Likewise. | |
43339 | (vreinterpretq_u16_s8): Likewise. | |
43340 | (vreinterpretq_u16_u32): Likewise. | |
43341 | (vreinterpretq_u16_u64): Likewise. | |
43342 | (vreinterpretq_u16_u8): Likewise. | |
43343 | (vreinterpretq_u32_s16): Likewise. | |
43344 | (vreinterpretq_u32_s32): Likewise. | |
43345 | (vreinterpretq_u32_s64): Likewise. | |
43346 | (vreinterpretq_u32_s8): Likewise. | |
43347 | (vreinterpretq_u32_u16): Likewise. | |
43348 | (vreinterpretq_u32_u64): Likewise. | |
43349 | (vreinterpretq_u32_u8): Likewise. | |
43350 | (vreinterpretq_u64_s16): Likewise. | |
43351 | (vreinterpretq_u64_s32): Likewise. | |
43352 | (vreinterpretq_u64_s64): Likewise. | |
43353 | (vreinterpretq_u64_s8): Likewise. | |
43354 | (vreinterpretq_u64_u16): Likewise. | |
43355 | (vreinterpretq_u64_u32): Likewise. | |
43356 | (vreinterpretq_u64_u8): Likewise. | |
43357 | (vreinterpretq_u8_s16): Likewise. | |
43358 | (vreinterpretq_u8_s32): Likewise. | |
43359 | (vreinterpretq_u8_s64): Likewise. | |
43360 | (vreinterpretq_u8_s8): Likewise. | |
43361 | (vreinterpretq_u8_u16): Likewise. | |
43362 | (vreinterpretq_u8_u32): Likewise. | |
43363 | (vreinterpretq_u8_u64): Likewise. | |
43364 | (vreinterpretq_s32_f16): Likewise. | |
43365 | (vreinterpretq_s32_f32): Likewise. | |
43366 | (vreinterpretq_u16_f16): Likewise. | |
43367 | (vreinterpretq_u16_f32): Likewise. | |
43368 | (vreinterpretq_u32_f16): Likewise. | |
43369 | (vreinterpretq_u32_f32): Likewise. | |
43370 | (vreinterpretq_u64_f16): Likewise. | |
43371 | (vreinterpretq_u64_f32): Likewise. | |
43372 | (vreinterpretq_u8_f16): Likewise. | |
43373 | (vreinterpretq_u8_f32): Likewise. | |
43374 | (vreinterpretq_f16_f32): Likewise. | |
43375 | (vreinterpretq_f16_s16): Likewise. | |
43376 | (vreinterpretq_f16_s32): Likewise. | |
43377 | (vreinterpretq_f16_s64): Likewise. | |
43378 | (vreinterpretq_f16_s8): Likewise. | |
43379 | (vreinterpretq_f16_u16): Likewise. | |
43380 | (vreinterpretq_f16_u32): Likewise. | |
43381 | (vreinterpretq_f16_u64): Likewise. | |
43382 | (vreinterpretq_f16_u8): Likewise. | |
43383 | (vreinterpretq_f32_f16): Likewise. | |
43384 | (vreinterpretq_f32_s16): Likewise. | |
43385 | (vreinterpretq_f32_s32): Likewise. | |
43386 | (vreinterpretq_f32_s64): Likewise. | |
43387 | (vreinterpretq_f32_s8): Likewise. | |
43388 | (vreinterpretq_f32_u16): Likewise. | |
43389 | (vreinterpretq_f32_u32): Likewise. | |
43390 | (vreinterpretq_f32_u64): Likewise. | |
43391 | (vreinterpretq_f32_u8): Likewise. | |
43392 | (vreinterpretq_s16_f16): Likewise. | |
43393 | (vreinterpretq_s16_f32): Likewise. | |
43394 | (vreinterpretq_s64_f16): Likewise. | |
43395 | (vreinterpretq_s64_f32): Likewise. | |
43396 | (vreinterpretq_s8_f16): Likewise. | |
43397 | (vreinterpretq_s8_f32): Likewise. | |
43398 | (__arm_vreinterpretq_f16): Likewise. | |
43399 | (__arm_vreinterpretq_f32): Likewise. | |
43400 | (__arm_vreinterpretq_s16): Likewise. | |
43401 | (__arm_vreinterpretq_s32): Likewise. | |
43402 | (__arm_vreinterpretq_s64): Likewise. | |
43403 | (__arm_vreinterpretq_s8): Likewise. | |
43404 | (__arm_vreinterpretq_u16): Likewise. | |
43405 | (__arm_vreinterpretq_u32): Likewise. | |
43406 | (__arm_vreinterpretq_u64): Likewise. | |
43407 | (__arm_vreinterpretq_u8): Likewise. | |
43408 | * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove. | |
43409 | (__arm_vreinterpretq_s16_s64): Likewise. | |
43410 | (__arm_vreinterpretq_s16_s8): Likewise. | |
43411 | (__arm_vreinterpretq_s16_u16): Likewise. | |
43412 | (__arm_vreinterpretq_s16_u32): Likewise. | |
43413 | (__arm_vreinterpretq_s16_u64): Likewise. | |
43414 | (__arm_vreinterpretq_s16_u8): Likewise. | |
43415 | (__arm_vreinterpretq_s32_s16): Likewise. | |
43416 | (__arm_vreinterpretq_s32_s64): Likewise. | |
43417 | (__arm_vreinterpretq_s32_s8): Likewise. | |
43418 | (__arm_vreinterpretq_s32_u16): Likewise. | |
43419 | (__arm_vreinterpretq_s32_u32): Likewise. | |
43420 | (__arm_vreinterpretq_s32_u64): Likewise. | |
43421 | (__arm_vreinterpretq_s32_u8): Likewise. | |
43422 | (__arm_vreinterpretq_s64_s16): Likewise. | |
43423 | (__arm_vreinterpretq_s64_s32): Likewise. | |
43424 | (__arm_vreinterpretq_s64_s8): Likewise. | |
43425 | (__arm_vreinterpretq_s64_u16): Likewise. | |
43426 | (__arm_vreinterpretq_s64_u32): Likewise. | |
43427 | (__arm_vreinterpretq_s64_u64): Likewise. | |
43428 | (__arm_vreinterpretq_s64_u8): Likewise. | |
43429 | (__arm_vreinterpretq_s8_s16): Likewise. | |
43430 | (__arm_vreinterpretq_s8_s32): Likewise. | |
43431 | (__arm_vreinterpretq_s8_s64): Likewise. | |
43432 | (__arm_vreinterpretq_s8_u16): Likewise. | |
43433 | (__arm_vreinterpretq_s8_u32): Likewise. | |
43434 | (__arm_vreinterpretq_s8_u64): Likewise. | |
43435 | (__arm_vreinterpretq_s8_u8): Likewise. | |
43436 | (__arm_vreinterpretq_u16_s16): Likewise. | |
43437 | (__arm_vreinterpretq_u16_s32): Likewise. | |
43438 | (__arm_vreinterpretq_u16_s64): Likewise. | |
43439 | (__arm_vreinterpretq_u16_s8): Likewise. | |
43440 | (__arm_vreinterpretq_u16_u32): Likewise. | |
43441 | (__arm_vreinterpretq_u16_u64): Likewise. | |
43442 | (__arm_vreinterpretq_u16_u8): Likewise. | |
43443 | (__arm_vreinterpretq_u32_s16): Likewise. | |
43444 | (__arm_vreinterpretq_u32_s32): Likewise. | |
43445 | (__arm_vreinterpretq_u32_s64): Likewise. | |
43446 | (__arm_vreinterpretq_u32_s8): Likewise. | |
43447 | (__arm_vreinterpretq_u32_u16): Likewise. | |
43448 | (__arm_vreinterpretq_u32_u64): Likewise. | |
43449 | (__arm_vreinterpretq_u32_u8): Likewise. | |
43450 | (__arm_vreinterpretq_u64_s16): Likewise. | |
43451 | (__arm_vreinterpretq_u64_s32): Likewise. | |
43452 | (__arm_vreinterpretq_u64_s64): Likewise. | |
43453 | (__arm_vreinterpretq_u64_s8): Likewise. | |
43454 | (__arm_vreinterpretq_u64_u16): Likewise. | |
43455 | (__arm_vreinterpretq_u64_u32): Likewise. | |
43456 | (__arm_vreinterpretq_u64_u8): Likewise. | |
43457 | (__arm_vreinterpretq_u8_s16): Likewise. | |
43458 | (__arm_vreinterpretq_u8_s32): Likewise. | |
43459 | (__arm_vreinterpretq_u8_s64): Likewise. | |
43460 | (__arm_vreinterpretq_u8_s8): Likewise. | |
43461 | (__arm_vreinterpretq_u8_u16): Likewise. | |
43462 | (__arm_vreinterpretq_u8_u32): Likewise. | |
43463 | (__arm_vreinterpretq_u8_u64): Likewise. | |
43464 | (__arm_vreinterpretq_s32_f16): Likewise. | |
43465 | (__arm_vreinterpretq_s32_f32): Likewise. | |
43466 | (__arm_vreinterpretq_s16_f16): Likewise. | |
43467 | (__arm_vreinterpretq_s16_f32): Likewise. | |
43468 | (__arm_vreinterpretq_s64_f16): Likewise. | |
43469 | (__arm_vreinterpretq_s64_f32): Likewise. | |
43470 | (__arm_vreinterpretq_s8_f16): Likewise. | |
43471 | (__arm_vreinterpretq_s8_f32): Likewise. | |
43472 | (__arm_vreinterpretq_u16_f16): Likewise. | |
43473 | (__arm_vreinterpretq_u16_f32): Likewise. | |
43474 | (__arm_vreinterpretq_u32_f16): Likewise. | |
43475 | (__arm_vreinterpretq_u32_f32): Likewise. | |
43476 | (__arm_vreinterpretq_u64_f16): Likewise. | |
43477 | (__arm_vreinterpretq_u64_f32): Likewise. | |
43478 | (__arm_vreinterpretq_u8_f16): Likewise. | |
43479 | (__arm_vreinterpretq_u8_f32): Likewise. | |
43480 | (__arm_vreinterpretq_f16_f32): Likewise. | |
43481 | (__arm_vreinterpretq_f16_s16): Likewise. | |
43482 | (__arm_vreinterpretq_f16_s32): Likewise. | |
43483 | (__arm_vreinterpretq_f16_s64): Likewise. | |
43484 | (__arm_vreinterpretq_f16_s8): Likewise. | |
43485 | (__arm_vreinterpretq_f16_u16): Likewise. | |
43486 | (__arm_vreinterpretq_f16_u32): Likewise. | |
43487 | (__arm_vreinterpretq_f16_u64): Likewise. | |
43488 | (__arm_vreinterpretq_f16_u8): Likewise. | |
43489 | (__arm_vreinterpretq_f32_f16): Likewise. | |
43490 | (__arm_vreinterpretq_f32_s16): Likewise. | |
43491 | (__arm_vreinterpretq_f32_s32): Likewise. | |
43492 | (__arm_vreinterpretq_f32_s64): Likewise. | |
43493 | (__arm_vreinterpretq_f32_s8): Likewise. | |
43494 | (__arm_vreinterpretq_f32_u16): Likewise. | |
43495 | (__arm_vreinterpretq_f32_u32): Likewise. | |
43496 | (__arm_vreinterpretq_f32_u64): Likewise. | |
43497 | (__arm_vreinterpretq_f32_u8): Likewise. | |
43498 | (__arm_vreinterpretq_s16): Likewise. | |
43499 | (__arm_vreinterpretq_s32): Likewise. | |
43500 | (__arm_vreinterpretq_s64): Likewise. | |
43501 | (__arm_vreinterpretq_s8): Likewise. | |
43502 | (__arm_vreinterpretq_u16): Likewise. | |
43503 | (__arm_vreinterpretq_u32): Likewise. | |
43504 | (__arm_vreinterpretq_u64): Likewise. | |
43505 | (__arm_vreinterpretq_u8): Likewise. | |
43506 | (__arm_vreinterpretq_f16): Likewise. | |
43507 | (__arm_vreinterpretq_f32): Likewise. | |
43508 | * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern. | |
43509 | * config/arm/unspecs.md: (REINTERPRET): New unspec. | |
43510 | ||
43511 | 2023-05-03 Murray Steele <murray.steele@arm.com> | |
43512 | Christophe Lyon <christophe.lyon@arm.com> | |
43513 | Christophe Lyon <christophe.lyon@arm.com | |
43514 | ||
43515 | * config.gcc: Add arm-mve-builtins-base.o and | |
43516 | arm-mve-builtins-shapes.o to extra_objs. | |
43517 | * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin | |
43518 | numberspace. | |
43519 | (arm_expand_builtin): Likewise | |
43520 | (arm_check_builtin_call): Likewise | |
43521 | (arm_describe_resolver): Likewise. | |
43522 | * config/arm/arm-builtins.h (enum resolver_ident): Add | |
43523 | arm_mve_resolver. | |
43524 | * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma. | |
43525 | (arm_resolve_overloaded_builtin): Handle MVE builtins. | |
43526 | (arm_register_target_pragmas): Register arm_check_builtin_call. | |
43527 | * config/arm/arm-mve-builtins.cc (class registered_function): New | |
43528 | class. | |
43529 | (struct registered_function_hasher): New struct. | |
43530 | (pred_suffixes): New table. | |
43531 | (mode_suffixes): New table. | |
43532 | (type_suffix_info): New table. | |
43533 | (TYPES_float16): New. | |
43534 | (TYPES_all_float): New. | |
43535 | (TYPES_integer_8): New. | |
43536 | (TYPES_integer_8_16): New. | |
43537 | (TYPES_integer_16_32): New. | |
43538 | (TYPES_integer_32): New. | |
43539 | (TYPES_signed_16_32): New. | |
43540 | (TYPES_signed_32): New. | |
43541 | (TYPES_all_signed): New. | |
43542 | (TYPES_all_unsigned): New. | |
43543 | (TYPES_all_integer): New. | |
43544 | (TYPES_all_integer_with_64): New. | |
43545 | (DEF_VECTOR_TYPE): New. | |
43546 | (DEF_DOUBLE_TYPE): New. | |
43547 | (DEF_MVE_TYPES_ARRAY): New. | |
43548 | (all_integer): New. | |
43549 | (all_integer_with_64): New. | |
43550 | (float16): New. | |
43551 | (all_float): New. | |
43552 | (all_signed): New. | |
43553 | (all_unsigned): New. | |
43554 | (integer_8): New. | |
43555 | (integer_8_16): New. | |
43556 | (integer_16_32): New. | |
43557 | (integer_32): New. | |
43558 | (signed_16_32): New. | |
43559 | (signed_32): New. | |
43560 | (register_vector_type): Use void_type_node for mve.fp-only types when | |
43561 | mve.fp is not enabled. | |
43562 | (register_builtin_tuple_types): Likewise. | |
43563 | (handle_arm_mve_h): New function.. | |
43564 | (matches_type_p): Likewise.. | |
43565 | (report_out_of_range): Likewise. | |
43566 | (report_not_enum): Likewise. | |
43567 | (report_missing_float): Likewise. | |
43568 | (report_non_ice): Likewise. | |
43569 | (check_requires_float): Likewise. | |
43570 | (function_instance::hash): Likewise | |
43571 | (function_instance::call_properties): Likewise. | |
43572 | (function_instance::reads_global_state_p): Likewise. | |
43573 | (function_instance::modifies_global_state_p): Likewise. | |
43574 | (function_instance::could_trap_p): Likewise. | |
43575 | (function_instance::has_inactive_argument): Likewise. | |
43576 | (registered_function_hasher::hash): Likewise. | |
43577 | (registered_function_hasher::equal): Likewise. | |
43578 | (function_builder::function_builder): Likewise. | |
43579 | (function_builder::~function_builder): Likewise. | |
43580 | (function_builder::append_name): Likewise. | |
43581 | (function_builder::finish_name): Likewise. | |
43582 | (function_builder::get_name): Likewise. | |
43583 | (add_attribute): Likewise. | |
43584 | (function_builder::get_attributes): Likewise. | |
43585 | (function_builder::add_function): Likewise. | |
43586 | (function_builder::add_unique_function): Likewise. | |
43587 | (function_builder::add_overloaded_function): Likewise. | |
43588 | (function_builder::add_overloaded_functions): Likewise. | |
43589 | (function_builder::register_function_group): Likewise. | |
43590 | (function_call_info::function_call_info): Likewise. | |
43591 | (function_resolver::function_resolver): Likewise. | |
43592 | (function_resolver::get_vector_type): Likewise. | |
43593 | (function_resolver::get_scalar_type_name): Likewise. | |
43594 | (function_resolver::get_argument_type): Likewise. | |
43595 | (function_resolver::scalar_argument_p): Likewise. | |
43596 | (function_resolver::report_no_such_form): Likewise. | |
43597 | (function_resolver::lookup_form): Likewise. | |
43598 | (function_resolver::resolve_to): Likewise. | |
43599 | (function_resolver::infer_vector_or_tuple_type): Likewise. | |
43600 | (function_resolver::infer_vector_type): Likewise. | |
43601 | (function_resolver::require_vector_or_scalar_type): Likewise. | |
43602 | (function_resolver::require_vector_type): Likewise. | |
43603 | (function_resolver::require_matching_vector_type): Likewise. | |
43604 | (function_resolver::require_derived_vector_type): Likewise. | |
43605 | (function_resolver::require_derived_scalar_type): Likewise. | |
43606 | (function_resolver::require_integer_immediate): Likewise. | |
43607 | (function_resolver::require_scalar_type): Likewise. | |
43608 | (function_resolver::check_num_arguments): Likewise. | |
43609 | (function_resolver::check_gp_argument): Likewise. | |
43610 | (function_resolver::finish_opt_n_resolution): Likewise. | |
43611 | (function_resolver::resolve_unary): Likewise. | |
43612 | (function_resolver::resolve_unary_n): Likewise. | |
43613 | (function_resolver::resolve_uniform): Likewise. | |
43614 | (function_resolver::resolve_uniform_opt_n): Likewise. | |
43615 | (function_resolver::resolve): Likewise. | |
43616 | (function_checker::function_checker): Likewise. | |
43617 | (function_checker::argument_exists_p): Likewise. | |
43618 | (function_checker::require_immediate): Likewise. | |
43619 | (function_checker::require_immediate_enum): Likewise. | |
43620 | (function_checker::require_immediate_range): Likewise. | |
43621 | (function_checker::check): Likewise. | |
43622 | (gimple_folder::gimple_folder): Likewise. | |
43623 | (gimple_folder::fold): Likewise. | |
43624 | (function_expander::function_expander): Likewise. | |
43625 | (function_expander::direct_optab_handler): Likewise. | |
43626 | (function_expander::get_fallback_value): Likewise. | |
43627 | (function_expander::get_reg_target): Likewise. | |
43628 | (function_expander::add_output_operand): Likewise. | |
43629 | (function_expander::add_input_operand): Likewise. | |
43630 | (function_expander::add_integer_operand): Likewise. | |
43631 | (function_expander::generate_insn): Likewise. | |
43632 | (function_expander::use_exact_insn): Likewise. | |
43633 | (function_expander::use_unpred_insn): Likewise. | |
43634 | (function_expander::use_pred_x_insn): Likewise. | |
43635 | (function_expander::use_cond_insn): Likewise. | |
43636 | (function_expander::map_to_rtx_codes): Likewise. | |
43637 | (function_expander::expand): Likewise. | |
43638 | (resolve_overloaded_builtin): Likewise. | |
43639 | (check_builtin_call): Likewise. | |
43640 | (gimple_fold_builtin): Likewise. | |
43641 | (expand_builtin): Likewise. | |
43642 | (gt_ggc_mx): Likewise. | |
43643 | (gt_pch_nx): Likewise. | |
43644 | (gt_pch_nx): Likewise. | |
43645 | * config/arm/arm-mve-builtins.def(s8): Define new type suffix. | |
43646 | (s16): Likewise. | |
43647 | (s32): Likewise. | |
43648 | (s64): Likewise. | |
43649 | (u8): Likewise. | |
43650 | (u16): Likewise. | |
43651 | (u32): Likewise. | |
43652 | (u64): Likewise. | |
43653 | (f16): Likewise. | |
43654 | (f32): Likewise. | |
43655 | (n): New mode. | |
43656 | (offset): New mode. | |
43657 | * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant. | |
43658 | (CP_READ_FPCR): Likewise. | |
43659 | (CP_RAISE_FP_EXCEPTIONS): Likewise. | |
43660 | (CP_READ_MEMORY): Likewise. | |
43661 | (CP_WRITE_MEMORY): Likewise. | |
43662 | (enum units_index): New enum. | |
43663 | (enum predication_index): New. | |
43664 | (enum type_class_index): New. | |
43665 | (enum mode_suffix_index): New enum. | |
43666 | (enum type_suffix_index): New. | |
43667 | (struct mode_suffix_info): New struct. | |
43668 | (struct type_suffix_info): New. | |
43669 | (struct function_group_info): Likewise. | |
43670 | (class function_instance): Likewise. | |
43671 | (class registered_function): Likewise. | |
43672 | (class function_builder): Likewise. | |
43673 | (class function_call_info): Likewise. | |
43674 | (class function_resolver): Likewise. | |
43675 | (class function_checker): Likewise. | |
43676 | (class gimple_folder): Likewise. | |
43677 | (class function_expander): Likewise. | |
43678 | (get_mve_pred16_t): Likewise. | |
43679 | (find_mode_suffix): New function. | |
43680 | (class function_base): Likewise. | |
43681 | (class function_shape): Likewise. | |
43682 | (function_instance::operator==): New function. | |
43683 | (function_instance::operator!=): Likewise. | |
43684 | (function_instance::vectors_per_tuple): Likewise. | |
43685 | (function_instance::mode_suffix): Likewise. | |
43686 | (function_instance::type_suffix): Likewise. | |
43687 | (function_instance::scalar_type): Likewise. | |
43688 | (function_instance::vector_type): Likewise. | |
43689 | (function_instance::tuple_type): Likewise. | |
43690 | (function_instance::vector_mode): Likewise. | |
43691 | (function_call_info::function_returns_void_p): Likewise. | |
43692 | (function_base::call_properties): Likewise. | |
43693 | * config/arm/arm-protos.h (enum arm_builtin_class): Add | |
43694 | ARM_BUILTIN_MVE. | |
43695 | (handle_arm_mve_h): New. | |
43696 | (resolve_overloaded_builtin): New. | |
43697 | (check_builtin_call): New. | |
43698 | (gimple_fold_builtin): New. | |
43699 | (expand_builtin): New. | |
43700 | * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as | |
43701 | arm_gimple_fold_builtin. | |
43702 | (arm_gimple_fold_builtin): New function. | |
43703 | * config/arm/arm_mve.h: Use new arm_mve.h pragma. | |
43704 | * config/arm/predicates.md (arm_any_register_operand): New predicate. | |
43705 | * config/arm/t-arm: (arm-mve-builtins.o): Add includes. | |
43706 | (arm-mve-builtins-shapes.o): New target. | |
43707 | (arm-mve-builtins-base.o): New target. | |
43708 | * config/arm/arm-mve-builtins-base.cc: New file. | |
43709 | * config/arm/arm-mve-builtins-base.def: New file. | |
43710 | * config/arm/arm-mve-builtins-base.h: New file. | |
43711 | * config/arm/arm-mve-builtins-functions.h: New file. | |
43712 | * config/arm/arm-mve-builtins-shapes.cc: New file. | |
43713 | * config/arm/arm-mve-builtins-shapes.h: New file. | |
43714 | ||
43715 | 2023-05-03 Murray Steele <murray.steele@arm.com> | |
43716 | Christophe Lyon <christophe.lyon@arm.com> | |
43717 | Christophe Lyon <christophe.lyon@arm.com> | |
43718 | ||
43719 | * config/arm/arm-builtins.cc (arm_general_add_builtin_function): | |
43720 | New function. | |
43721 | (arm_init_builtin): Use arm_general_add_builtin_function instead | |
43722 | of arm_add_builtin_function. | |
43723 | (arm_init_acle_builtins): Likewise. | |
43724 | (arm_init_mve_builtins): Likewise. | |
43725 | (arm_init_crypto_builtins): Likewise. | |
43726 | (arm_init_builtins): Likewise. | |
43727 | (arm_general_builtin_decl): New function. | |
43728 | (arm_builtin_decl): Defer to numberspace-specialized functions. | |
43729 | (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args. | |
43730 | (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ... | |
43731 | (arm_general_expand_builtin_1): ... specialize for general builtins. | |
43732 | (arm_expand_acle_builtin): Use arm_general_expand_builtin | |
43733 | instead of arm_expand_builtin. | |
43734 | (arm_expand_mve_builtin): Likewise. | |
43735 | (arm_expand_neon_builtin): Likewise. | |
43736 | (arm_expand_vfp_builtin): Likewise. | |
43737 | (arm_general_expand_builtin): New function. | |
43738 | (arm_expand_builtin): Specialize for general builtins. | |
43739 | (arm_general_check_builtin_call): New function. | |
43740 | (arm_check_builtin_call): Specialize for general builtins. | |
43741 | (arm_describe_resolver): Validate numberspace. | |
43742 | (arm_cde_end_args): Likewise. | |
43743 | * config/arm/arm-protos.h (enum arm_builtin_class): New enum. | |
43744 | (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants. | |
43745 | ||
43746 | 2023-05-03 Martin Liska <mliska@suse.cz> | |
43747 | ||
43748 | PR target/109713 | |
43749 | * config/riscv/sync.md: Add gcc_unreachable to a switch. | |
43750 | ||
43751 | 2023-05-03 Richard Biener <rguenther@suse.de> | |
43752 | ||
43753 | * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt. | |
43754 | (patch_loop_exit): Likewise. | |
43755 | (connect_loops): Likewise. | |
43756 | (split_loop): Likewise. | |
43757 | (control_dep_semi_invariant_p): Likewise. | |
43758 | (do_split_loop_on_cond): Likewise. | |
43759 | (split_loop_on_cond): Likewise. | |
43760 | * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb): | |
43761 | Likewise. | |
43762 | (simplify_loop_version): Likewise. | |
43763 | (evaluate_bbs): Likewise. | |
43764 | (find_loop_guard): Likewise. | |
43765 | (clean_up_after_unswitching): Likewise. | |
43766 | * tree-ssa-math-opts.cc (maybe_optimize_guarding_check): | |
43767 | Likewise. | |
43768 | (optimize_spaceship): Take a gcond * argument, avoid | |
43769 | last_stmt. | |
43770 | (math_opts_dom_walker::after_dom_children): Adjust call to | |
43771 | optimize_spaceship. | |
43772 | * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt. | |
43773 | * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge): | |
43774 | Likewise. | |
43775 | ||
43776 | 2023-05-03 Andreas Schwab <schwab@suse.de> | |
43777 | ||
43778 | * config/riscv/linux.h (LIB_SPEC): Don't redefine. | |
43779 | ||
43780 | 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
43781 | ||
43782 | * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load): | |
43783 | New function. | |
43784 | (class vlseg): New class. | |
43785 | (class vsseg): Ditto. | |
43786 | (class vlsseg): Ditto. | |
43787 | (class vssseg): Ditto. | |
43788 | (class seg_indexed_load): Ditto. | |
43789 | (class seg_indexed_store): Ditto. | |
43790 | (class vlsegff): Ditto. | |
43791 | (BASE): Ditto. | |
43792 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
43793 | * config/riscv/riscv-vector-builtins-functions.def (vlseg): | |
43794 | Ditto. | |
43795 | (vsseg): Ditto. | |
43796 | (vlsseg): Ditto. | |
43797 | (vssseg): Ditto. | |
43798 | (vluxseg): Ditto. | |
43799 | (vloxseg): Ditto. | |
43800 | (vsuxseg): Ditto. | |
43801 | (vsoxseg): Ditto. | |
43802 | (vlsegff): Ditto. | |
43803 | * config/riscv/riscv-vector-builtins-shapes.cc (struct | |
43804 | seg_loadstore_def): Ditto. | |
43805 | (struct seg_indexed_loadstore_def): Ditto. | |
43806 | (struct seg_fault_load_def): Ditto. | |
43807 | (SHAPE): Ditto. | |
43808 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
43809 | * config/riscv/riscv-vector-builtins.cc | |
43810 | (function_builder::append_nf): New function. | |
43811 | * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t): | |
43812 | Change ptr from double into float. | |
43813 | (vfloat32m1x3_t): Ditto. | |
43814 | (vfloat32m1x4_t): Ditto. | |
43815 | (vfloat32m1x5_t): Ditto. | |
43816 | (vfloat32m1x6_t): Ditto. | |
43817 | (vfloat32m1x7_t): Ditto. | |
43818 | (vfloat32m1x8_t): Ditto. | |
43819 | (vfloat32m2x2_t): Ditto. | |
43820 | (vfloat32m2x3_t): Ditto. | |
43821 | (vfloat32m2x4_t): Ditto. | |
43822 | (vfloat32m4x2_t): Ditto. | |
43823 | * config/riscv/riscv-vector-builtins.h: Add segment intrinsics. | |
43824 | * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for | |
43825 | segment ff load. | |
43826 | * config/riscv/riscv.md: Add segment instructions. | |
43827 | * config/riscv/vector-iterators.md: Support segment intrinsics. | |
43828 | * config/riscv/vector.md (@pred_unit_strided_load<mode>): New | |
43829 | pattern. | |
43830 | (@pred_unit_strided_store<mode>): Ditto. | |
43831 | (@pred_strided_load<mode>): Ditto. | |
43832 | (@pred_strided_store<mode>): Ditto. | |
43833 | (@pred_fault_load<mode>): Ditto. | |
43834 | (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto. | |
43835 | (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto. | |
43836 | (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto. | |
43837 | (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto. | |
43838 | (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto. | |
43839 | (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto. | |
43840 | (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto. | |
43841 | (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto. | |
43842 | (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto. | |
43843 | (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto. | |
43844 | (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto. | |
43845 | (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto. | |
43846 | (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto. | |
43847 | (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto. | |
43848 | ||
43849 | 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
43850 | ||
43851 | * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for | |
43852 | tuple type support. | |
43853 | (inttype): Ditto. | |
43854 | (floattype): Ditto. | |
43855 | (main): Ditto. | |
43856 | * config/riscv/riscv-vector-builtins-bases.cc: Ditto. | |
43857 | * config/riscv/riscv-vector-builtins-functions.def (vset): Add | |
43858 | tuple type vset. | |
43859 | (vget): Add tuple type vget. | |
43860 | * config/riscv/riscv-vector-builtins-types.def | |
43861 | (DEF_RVV_TUPLE_OPS): New macro. | |
43862 | (vint8mf8x2_t): Ditto. | |
43863 | (vuint8mf8x2_t): Ditto. | |
43864 | (vint8mf8x3_t): Ditto. | |
43865 | (vuint8mf8x3_t): Ditto. | |
43866 | (vint8mf8x4_t): Ditto. | |
43867 | (vuint8mf8x4_t): Ditto. | |
43868 | (vint8mf8x5_t): Ditto. | |
43869 | (vuint8mf8x5_t): Ditto. | |
43870 | (vint8mf8x6_t): Ditto. | |
43871 | (vuint8mf8x6_t): Ditto. | |
43872 | (vint8mf8x7_t): Ditto. | |
43873 | (vuint8mf8x7_t): Ditto. | |
43874 | (vint8mf8x8_t): Ditto. | |
43875 | (vuint8mf8x8_t): Ditto. | |
43876 | (vint8mf4x2_t): Ditto. | |
43877 | (vuint8mf4x2_t): Ditto. | |
43878 | (vint8mf4x3_t): Ditto. | |
43879 | (vuint8mf4x3_t): Ditto. | |
43880 | (vint8mf4x4_t): Ditto. | |
43881 | (vuint8mf4x4_t): Ditto. | |
43882 | (vint8mf4x5_t): Ditto. | |
43883 | (vuint8mf4x5_t): Ditto. | |
43884 | (vint8mf4x6_t): Ditto. | |
43885 | (vuint8mf4x6_t): Ditto. | |
43886 | (vint8mf4x7_t): Ditto. | |
43887 | (vuint8mf4x7_t): Ditto. | |
43888 | (vint8mf4x8_t): Ditto. | |
43889 | (vuint8mf4x8_t): Ditto. | |
43890 | (vint8mf2x2_t): Ditto. | |
43891 | (vuint8mf2x2_t): Ditto. | |
43892 | (vint8mf2x3_t): Ditto. | |
43893 | (vuint8mf2x3_t): Ditto. | |
43894 | (vint8mf2x4_t): Ditto. | |
43895 | (vuint8mf2x4_t): Ditto. | |
43896 | (vint8mf2x5_t): Ditto. | |
43897 | (vuint8mf2x5_t): Ditto. | |
43898 | (vint8mf2x6_t): Ditto. | |
43899 | (vuint8mf2x6_t): Ditto. | |
43900 | (vint8mf2x7_t): Ditto. | |
43901 | (vuint8mf2x7_t): Ditto. | |
43902 | (vint8mf2x8_t): Ditto. | |
43903 | (vuint8mf2x8_t): Ditto. | |
43904 | (vint8m1x2_t): Ditto. | |
43905 | (vuint8m1x2_t): Ditto. | |
43906 | (vint8m1x3_t): Ditto. | |
43907 | (vuint8m1x3_t): Ditto. | |
43908 | (vint8m1x4_t): Ditto. | |
43909 | (vuint8m1x4_t): Ditto. | |
43910 | (vint8m1x5_t): Ditto. | |
43911 | (vuint8m1x5_t): Ditto. | |
43912 | (vint8m1x6_t): Ditto. | |
43913 | (vuint8m1x6_t): Ditto. | |
43914 | (vint8m1x7_t): Ditto. | |
43915 | (vuint8m1x7_t): Ditto. | |
43916 | (vint8m1x8_t): Ditto. | |
43917 | (vuint8m1x8_t): Ditto. | |
43918 | (vint8m2x2_t): Ditto. | |
43919 | (vuint8m2x2_t): Ditto. | |
43920 | (vint8m2x3_t): Ditto. | |
43921 | (vuint8m2x3_t): Ditto. | |
43922 | (vint8m2x4_t): Ditto. | |
43923 | (vuint8m2x4_t): Ditto. | |
43924 | (vint8m4x2_t): Ditto. | |
43925 | (vuint8m4x2_t): Ditto. | |
43926 | (vint16mf4x2_t): Ditto. | |
43927 | (vuint16mf4x2_t): Ditto. | |
43928 | (vint16mf4x3_t): Ditto. | |
43929 | (vuint16mf4x3_t): Ditto. | |
43930 | (vint16mf4x4_t): Ditto. | |
43931 | (vuint16mf4x4_t): Ditto. | |
43932 | (vint16mf4x5_t): Ditto. | |
43933 | (vuint16mf4x5_t): Ditto. | |
43934 | (vint16mf4x6_t): Ditto. | |
43935 | (vuint16mf4x6_t): Ditto. | |
43936 | (vint16mf4x7_t): Ditto. | |
43937 | (vuint16mf4x7_t): Ditto. | |
43938 | (vint16mf4x8_t): Ditto. | |
43939 | (vuint16mf4x8_t): Ditto. | |
43940 | (vint16mf2x2_t): Ditto. | |
43941 | (vuint16mf2x2_t): Ditto. | |
43942 | (vint16mf2x3_t): Ditto. | |
43943 | (vuint16mf2x3_t): Ditto. | |
43944 | (vint16mf2x4_t): Ditto. | |
43945 | (vuint16mf2x4_t): Ditto. | |
43946 | (vint16mf2x5_t): Ditto. | |
43947 | (vuint16mf2x5_t): Ditto. | |
43948 | (vint16mf2x6_t): Ditto. | |
43949 | (vuint16mf2x6_t): Ditto. | |
43950 | (vint16mf2x7_t): Ditto. | |
43951 | (vuint16mf2x7_t): Ditto. | |
43952 | (vint16mf2x8_t): Ditto. | |
43953 | (vuint16mf2x8_t): Ditto. | |
43954 | (vint16m1x2_t): Ditto. | |
43955 | (vuint16m1x2_t): Ditto. | |
43956 | (vint16m1x3_t): Ditto. | |
43957 | (vuint16m1x3_t): Ditto. | |
43958 | (vint16m1x4_t): Ditto. | |
43959 | (vuint16m1x4_t): Ditto. | |
43960 | (vint16m1x5_t): Ditto. | |
43961 | (vuint16m1x5_t): Ditto. | |
43962 | (vint16m1x6_t): Ditto. | |
43963 | (vuint16m1x6_t): Ditto. | |
43964 | (vint16m1x7_t): Ditto. | |
43965 | (vuint16m1x7_t): Ditto. | |
43966 | (vint16m1x8_t): Ditto. | |
43967 | (vuint16m1x8_t): Ditto. | |
43968 | (vint16m2x2_t): Ditto. | |
43969 | (vuint16m2x2_t): Ditto. | |
43970 | (vint16m2x3_t): Ditto. | |
43971 | (vuint16m2x3_t): Ditto. | |
43972 | (vint16m2x4_t): Ditto. | |
43973 | (vuint16m2x4_t): Ditto. | |
43974 | (vint16m4x2_t): Ditto. | |
43975 | (vuint16m4x2_t): Ditto. | |
43976 | (vint32mf2x2_t): Ditto. | |
43977 | (vuint32mf2x2_t): Ditto. | |
43978 | (vint32mf2x3_t): Ditto. | |
43979 | (vuint32mf2x3_t): Ditto. | |
43980 | (vint32mf2x4_t): Ditto. | |
43981 | (vuint32mf2x4_t): Ditto. | |
43982 | (vint32mf2x5_t): Ditto. | |
43983 | (vuint32mf2x5_t): Ditto. | |
43984 | (vint32mf2x6_t): Ditto. | |
43985 | (vuint32mf2x6_t): Ditto. | |
43986 | (vint32mf2x7_t): Ditto. | |
43987 | (vuint32mf2x7_t): Ditto. | |
43988 | (vint32mf2x8_t): Ditto. | |
43989 | (vuint32mf2x8_t): Ditto. | |
43990 | (vint32m1x2_t): Ditto. | |
43991 | (vuint32m1x2_t): Ditto. | |
43992 | (vint32m1x3_t): Ditto. | |
43993 | (vuint32m1x3_t): Ditto. | |
43994 | (vint32m1x4_t): Ditto. | |
43995 | (vuint32m1x4_t): Ditto. | |
43996 | (vint32m1x5_t): Ditto. | |
43997 | (vuint32m1x5_t): Ditto. | |
43998 | (vint32m1x6_t): Ditto. | |
43999 | (vuint32m1x6_t): Ditto. | |
44000 | (vint32m1x7_t): Ditto. | |
44001 | (vuint32m1x7_t): Ditto. | |
44002 | (vint32m1x8_t): Ditto. | |
44003 | (vuint32m1x8_t): Ditto. | |
44004 | (vint32m2x2_t): Ditto. | |
44005 | (vuint32m2x2_t): Ditto. | |
44006 | (vint32m2x3_t): Ditto. | |
44007 | (vuint32m2x3_t): Ditto. | |
44008 | (vint32m2x4_t): Ditto. | |
44009 | (vuint32m2x4_t): Ditto. | |
44010 | (vint32m4x2_t): Ditto. | |
44011 | (vuint32m4x2_t): Ditto. | |
44012 | (vint64m1x2_t): Ditto. | |
44013 | (vuint64m1x2_t): Ditto. | |
44014 | (vint64m1x3_t): Ditto. | |
44015 | (vuint64m1x3_t): Ditto. | |
44016 | (vint64m1x4_t): Ditto. | |
44017 | (vuint64m1x4_t): Ditto. | |
44018 | (vint64m1x5_t): Ditto. | |
44019 | (vuint64m1x5_t): Ditto. | |
44020 | (vint64m1x6_t): Ditto. | |
44021 | (vuint64m1x6_t): Ditto. | |
44022 | (vint64m1x7_t): Ditto. | |
44023 | (vuint64m1x7_t): Ditto. | |
44024 | (vint64m1x8_t): Ditto. | |
44025 | (vuint64m1x8_t): Ditto. | |
44026 | (vint64m2x2_t): Ditto. | |
44027 | (vuint64m2x2_t): Ditto. | |
44028 | (vint64m2x3_t): Ditto. | |
44029 | (vuint64m2x3_t): Ditto. | |
44030 | (vint64m2x4_t): Ditto. | |
44031 | (vuint64m2x4_t): Ditto. | |
44032 | (vint64m4x2_t): Ditto. | |
44033 | (vuint64m4x2_t): Ditto. | |
44034 | (vfloat32mf2x2_t): Ditto. | |
44035 | (vfloat32mf2x3_t): Ditto. | |
44036 | (vfloat32mf2x4_t): Ditto. | |
44037 | (vfloat32mf2x5_t): Ditto. | |
44038 | (vfloat32mf2x6_t): Ditto. | |
44039 | (vfloat32mf2x7_t): Ditto. | |
44040 | (vfloat32mf2x8_t): Ditto. | |
44041 | (vfloat32m1x2_t): Ditto. | |
44042 | (vfloat32m1x3_t): Ditto. | |
44043 | (vfloat32m1x4_t): Ditto. | |
44044 | (vfloat32m1x5_t): Ditto. | |
44045 | (vfloat32m1x6_t): Ditto. | |
44046 | (vfloat32m1x7_t): Ditto. | |
44047 | (vfloat32m1x8_t): Ditto. | |
44048 | (vfloat32m2x2_t): Ditto. | |
44049 | (vfloat32m2x3_t): Ditto. | |
44050 | (vfloat32m2x4_t): Ditto. | |
44051 | (vfloat32m4x2_t): Ditto. | |
44052 | (vfloat64m1x2_t): Ditto. | |
44053 | (vfloat64m1x3_t): Ditto. | |
44054 | (vfloat64m1x4_t): Ditto. | |
44055 | (vfloat64m1x5_t): Ditto. | |
44056 | (vfloat64m1x6_t): Ditto. | |
44057 | (vfloat64m1x7_t): Ditto. | |
44058 | (vfloat64m1x8_t): Ditto. | |
44059 | (vfloat64m2x2_t): Ditto. | |
44060 | (vfloat64m2x3_t): Ditto. | |
44061 | (vfloat64m2x4_t): Ditto. | |
44062 | (vfloat64m4x2_t): Ditto. | |
44063 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS): | |
44064 | Ditto. | |
44065 | (DEF_RVV_TYPE_INDEX): Ditto. | |
44066 | (rvv_arg_type_info::get_tuple_subpart_type): New function. | |
44067 | (DEF_RVV_TUPLE_TYPE): New macro. | |
44068 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX): | |
44069 | Adapt for tuple vget/vset support. | |
44070 | (vint8mf4_t): Ditto. | |
44071 | (vuint8mf4_t): Ditto. | |
44072 | (vint8mf2_t): Ditto. | |
44073 | (vuint8mf2_t): Ditto. | |
44074 | (vint8m1_t): Ditto. | |
44075 | (vuint8m1_t): Ditto. | |
44076 | (vint8m2_t): Ditto. | |
44077 | (vuint8m2_t): Ditto. | |
44078 | (vint8m4_t): Ditto. | |
44079 | (vuint8m4_t): Ditto. | |
44080 | (vint8m8_t): Ditto. | |
44081 | (vuint8m8_t): Ditto. | |
44082 | (vint16mf4_t): Ditto. | |
44083 | (vuint16mf4_t): Ditto. | |
44084 | (vint16mf2_t): Ditto. | |
44085 | (vuint16mf2_t): Ditto. | |
44086 | (vint16m1_t): Ditto. | |
44087 | (vuint16m1_t): Ditto. | |
44088 | (vint16m2_t): Ditto. | |
44089 | (vuint16m2_t): Ditto. | |
44090 | (vint16m4_t): Ditto. | |
44091 | (vuint16m4_t): Ditto. | |
44092 | (vint16m8_t): Ditto. | |
44093 | (vuint16m8_t): Ditto. | |
44094 | (vint32mf2_t): Ditto. | |
44095 | (vuint32mf2_t): Ditto. | |
44096 | (vint32m1_t): Ditto. | |
44097 | (vuint32m1_t): Ditto. | |
44098 | (vint32m2_t): Ditto. | |
44099 | (vuint32m2_t): Ditto. | |
44100 | (vint32m4_t): Ditto. | |
44101 | (vuint32m4_t): Ditto. | |
44102 | (vint32m8_t): Ditto. | |
44103 | (vuint32m8_t): Ditto. | |
44104 | (vint64m1_t): Ditto. | |
44105 | (vuint64m1_t): Ditto. | |
44106 | (vint64m2_t): Ditto. | |
44107 | (vuint64m2_t): Ditto. | |
44108 | (vint64m4_t): Ditto. | |
44109 | (vuint64m4_t): Ditto. | |
44110 | (vint64m8_t): Ditto. | |
44111 | (vuint64m8_t): Ditto. | |
44112 | (vfloat32mf2_t): Ditto. | |
44113 | (vfloat32m1_t): Ditto. | |
44114 | (vfloat32m2_t): Ditto. | |
44115 | (vfloat32m4_t): Ditto. | |
44116 | (vfloat32m8_t): Ditto. | |
44117 | (vfloat64m1_t): Ditto. | |
44118 | (vfloat64m2_t): Ditto. | |
44119 | (vfloat64m4_t): Ditto. | |
44120 | (vfloat64m8_t): Ditto. | |
44121 | (tuple_subpart): Add tuple subpart base type. | |
44122 | * config/riscv/riscv-vector-builtins.h (struct | |
44123 | rvv_arg_type_info): Ditto. | |
44124 | (tuple_type_field): New function. | |
44125 | ||
44126 | 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
44127 | ||
44128 | * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro. | |
44129 | (RVV_TUPLE_PARTIAL_MODES): Ditto. | |
44130 | * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New | |
44131 | function. | |
44132 | (get_nf): Ditto. | |
44133 | (get_subpart_mode): Ditto. | |
44134 | (get_tuple_mode): Ditto. | |
44135 | (expand_tuple_move): Ditto. | |
44136 | * config/riscv/riscv-v.cc (ENTRY): New macro. | |
44137 | (TUPLE_ENTRY): Ditto. | |
44138 | (get_nf): New function. | |
44139 | (get_subpart_mode): Ditto. | |
44140 | (get_tuple_mode): Ditto. | |
44141 | (expand_tuple_move): Ditto. | |
44142 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE): | |
44143 | New macro. | |
44144 | (register_tuple_type): New function | |
44145 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE): | |
44146 | New macro. | |
44147 | (vint8mf8x2_t): New macro. | |
44148 | (vuint8mf8x2_t): Ditto. | |
44149 | (vint8mf8x3_t): Ditto. | |
44150 | (vuint8mf8x3_t): Ditto. | |
44151 | (vint8mf8x4_t): Ditto. | |
44152 | (vuint8mf8x4_t): Ditto. | |
44153 | (vint8mf8x5_t): Ditto. | |
44154 | (vuint8mf8x5_t): Ditto. | |
44155 | (vint8mf8x6_t): Ditto. | |
44156 | (vuint8mf8x6_t): Ditto. | |
44157 | (vint8mf8x7_t): Ditto. | |
44158 | (vuint8mf8x7_t): Ditto. | |
44159 | (vint8mf8x8_t): Ditto. | |
44160 | (vuint8mf8x8_t): Ditto. | |
44161 | (vint8mf4x2_t): Ditto. | |
44162 | (vuint8mf4x2_t): Ditto. | |
44163 | (vint8mf4x3_t): Ditto. | |
44164 | (vuint8mf4x3_t): Ditto. | |
44165 | (vint8mf4x4_t): Ditto. | |
44166 | (vuint8mf4x4_t): Ditto. | |
44167 | (vint8mf4x5_t): Ditto. | |
44168 | (vuint8mf4x5_t): Ditto. | |
44169 | (vint8mf4x6_t): Ditto. | |
44170 | (vuint8mf4x6_t): Ditto. | |
44171 | (vint8mf4x7_t): Ditto. | |
44172 | (vuint8mf4x7_t): Ditto. | |
44173 | (vint8mf4x8_t): Ditto. | |
44174 | (vuint8mf4x8_t): Ditto. | |
44175 | (vint8mf2x2_t): Ditto. | |
44176 | (vuint8mf2x2_t): Ditto. | |
44177 | (vint8mf2x3_t): Ditto. | |
44178 | (vuint8mf2x3_t): Ditto. | |
44179 | (vint8mf2x4_t): Ditto. | |
44180 | (vuint8mf2x4_t): Ditto. | |
44181 | (vint8mf2x5_t): Ditto. | |
44182 | (vuint8mf2x5_t): Ditto. | |
44183 | (vint8mf2x6_t): Ditto. | |
44184 | (vuint8mf2x6_t): Ditto. | |
44185 | (vint8mf2x7_t): Ditto. | |
44186 | (vuint8mf2x7_t): Ditto. | |
44187 | (vint8mf2x8_t): Ditto. | |
44188 | (vuint8mf2x8_t): Ditto. | |
44189 | (vint8m1x2_t): Ditto. | |
44190 | (vuint8m1x2_t): Ditto. | |
44191 | (vint8m1x3_t): Ditto. | |
44192 | (vuint8m1x3_t): Ditto. | |
44193 | (vint8m1x4_t): Ditto. | |
44194 | (vuint8m1x4_t): Ditto. | |
44195 | (vint8m1x5_t): Ditto. | |
44196 | (vuint8m1x5_t): Ditto. | |
44197 | (vint8m1x6_t): Ditto. | |
44198 | (vuint8m1x6_t): Ditto. | |
44199 | (vint8m1x7_t): Ditto. | |
44200 | (vuint8m1x7_t): Ditto. | |
44201 | (vint8m1x8_t): Ditto. | |
44202 | (vuint8m1x8_t): Ditto. | |
44203 | (vint8m2x2_t): Ditto. | |
44204 | (vuint8m2x2_t): Ditto. | |
44205 | (vint8m2x3_t): Ditto. | |
44206 | (vuint8m2x3_t): Ditto. | |
44207 | (vint8m2x4_t): Ditto. | |
44208 | (vuint8m2x4_t): Ditto. | |
44209 | (vint8m4x2_t): Ditto. | |
44210 | (vuint8m4x2_t): Ditto. | |
44211 | (vint16mf4x2_t): Ditto. | |
44212 | (vuint16mf4x2_t): Ditto. | |
44213 | (vint16mf4x3_t): Ditto. | |
44214 | (vuint16mf4x3_t): Ditto. | |
44215 | (vint16mf4x4_t): Ditto. | |
44216 | (vuint16mf4x4_t): Ditto. | |
44217 | (vint16mf4x5_t): Ditto. | |
44218 | (vuint16mf4x5_t): Ditto. | |
44219 | (vint16mf4x6_t): Ditto. | |
44220 | (vuint16mf4x6_t): Ditto. | |
44221 | (vint16mf4x7_t): Ditto. | |
44222 | (vuint16mf4x7_t): Ditto. | |
44223 | (vint16mf4x8_t): Ditto. | |
44224 | (vuint16mf4x8_t): Ditto. | |
44225 | (vint16mf2x2_t): Ditto. | |
44226 | (vuint16mf2x2_t): Ditto. | |
44227 | (vint16mf2x3_t): Ditto. | |
44228 | (vuint16mf2x3_t): Ditto. | |
44229 | (vint16mf2x4_t): Ditto. | |
44230 | (vuint16mf2x4_t): Ditto. | |
44231 | (vint16mf2x5_t): Ditto. | |
44232 | (vuint16mf2x5_t): Ditto. | |
44233 | (vint16mf2x6_t): Ditto. | |
44234 | (vuint16mf2x6_t): Ditto. | |
44235 | (vint16mf2x7_t): Ditto. | |
44236 | (vuint16mf2x7_t): Ditto. | |
44237 | (vint16mf2x8_t): Ditto. | |
44238 | (vuint16mf2x8_t): Ditto. | |
44239 | (vint16m1x2_t): Ditto. | |
44240 | (vuint16m1x2_t): Ditto. | |
44241 | (vint16m1x3_t): Ditto. | |
44242 | (vuint16m1x3_t): Ditto. | |
44243 | (vint16m1x4_t): Ditto. | |
44244 | (vuint16m1x4_t): Ditto. | |
44245 | (vint16m1x5_t): Ditto. | |
44246 | (vuint16m1x5_t): Ditto. | |
44247 | (vint16m1x6_t): Ditto. | |
44248 | (vuint16m1x6_t): Ditto. | |
44249 | (vint16m1x7_t): Ditto. | |
44250 | (vuint16m1x7_t): Ditto. | |
44251 | (vint16m1x8_t): Ditto. | |
44252 | (vuint16m1x8_t): Ditto. | |
44253 | (vint16m2x2_t): Ditto. | |
44254 | (vuint16m2x2_t): Ditto. | |
44255 | (vint16m2x3_t): Ditto. | |
44256 | (vuint16m2x3_t): Ditto. | |
44257 | (vint16m2x4_t): Ditto. | |
44258 | (vuint16m2x4_t): Ditto. | |
44259 | (vint16m4x2_t): Ditto. | |
44260 | (vuint16m4x2_t): Ditto. | |
44261 | (vint32mf2x2_t): Ditto. | |
44262 | (vuint32mf2x2_t): Ditto. | |
44263 | (vint32mf2x3_t): Ditto. | |
44264 | (vuint32mf2x3_t): Ditto. | |
44265 | (vint32mf2x4_t): Ditto. | |
44266 | (vuint32mf2x4_t): Ditto. | |
44267 | (vint32mf2x5_t): Ditto. | |
44268 | (vuint32mf2x5_t): Ditto. | |
44269 | (vint32mf2x6_t): Ditto. | |
44270 | (vuint32mf2x6_t): Ditto. | |
44271 | (vint32mf2x7_t): Ditto. | |
44272 | (vuint32mf2x7_t): Ditto. | |
44273 | (vint32mf2x8_t): Ditto. | |
44274 | (vuint32mf2x8_t): Ditto. | |
44275 | (vint32m1x2_t): Ditto. | |
44276 | (vuint32m1x2_t): Ditto. | |
44277 | (vint32m1x3_t): Ditto. | |
44278 | (vuint32m1x3_t): Ditto. | |
44279 | (vint32m1x4_t): Ditto. | |
44280 | (vuint32m1x4_t): Ditto. | |
44281 | (vint32m1x5_t): Ditto. | |
44282 | (vuint32m1x5_t): Ditto. | |
44283 | (vint32m1x6_t): Ditto. | |
44284 | (vuint32m1x6_t): Ditto. | |
44285 | (vint32m1x7_t): Ditto. | |
44286 | (vuint32m1x7_t): Ditto. | |
44287 | (vint32m1x8_t): Ditto. | |
44288 | (vuint32m1x8_t): Ditto. | |
44289 | (vint32m2x2_t): Ditto. | |
44290 | (vuint32m2x2_t): Ditto. | |
44291 | (vint32m2x3_t): Ditto. | |
44292 | (vuint32m2x3_t): Ditto. | |
44293 | (vint32m2x4_t): Ditto. | |
44294 | (vuint32m2x4_t): Ditto. | |
44295 | (vint32m4x2_t): Ditto. | |
44296 | (vuint32m4x2_t): Ditto. | |
44297 | (vint64m1x2_t): Ditto. | |
44298 | (vuint64m1x2_t): Ditto. | |
44299 | (vint64m1x3_t): Ditto. | |
44300 | (vuint64m1x3_t): Ditto. | |
44301 | (vint64m1x4_t): Ditto. | |
44302 | (vuint64m1x4_t): Ditto. | |
44303 | (vint64m1x5_t): Ditto. | |
44304 | (vuint64m1x5_t): Ditto. | |
44305 | (vint64m1x6_t): Ditto. | |
44306 | (vuint64m1x6_t): Ditto. | |
44307 | (vint64m1x7_t): Ditto. | |
44308 | (vuint64m1x7_t): Ditto. | |
44309 | (vint64m1x8_t): Ditto. | |
44310 | (vuint64m1x8_t): Ditto. | |
44311 | (vint64m2x2_t): Ditto. | |
44312 | (vuint64m2x2_t): Ditto. | |
44313 | (vint64m2x3_t): Ditto. | |
44314 | (vuint64m2x3_t): Ditto. | |
44315 | (vint64m2x4_t): Ditto. | |
44316 | (vuint64m2x4_t): Ditto. | |
44317 | (vint64m4x2_t): Ditto. | |
44318 | (vuint64m4x2_t): Ditto. | |
44319 | (vfloat32mf2x2_t): Ditto. | |
44320 | (vfloat32mf2x3_t): Ditto. | |
44321 | (vfloat32mf2x4_t): Ditto. | |
44322 | (vfloat32mf2x5_t): Ditto. | |
44323 | (vfloat32mf2x6_t): Ditto. | |
44324 | (vfloat32mf2x7_t): Ditto. | |
44325 | (vfloat32mf2x8_t): Ditto. | |
44326 | (vfloat32m1x2_t): Ditto. | |
44327 | (vfloat32m1x3_t): Ditto. | |
44328 | (vfloat32m1x4_t): Ditto. | |
44329 | (vfloat32m1x5_t): Ditto. | |
44330 | (vfloat32m1x6_t): Ditto. | |
44331 | (vfloat32m1x7_t): Ditto. | |
44332 | (vfloat32m1x8_t): Ditto. | |
44333 | (vfloat32m2x2_t): Ditto. | |
44334 | (vfloat32m2x3_t): Ditto. | |
44335 | (vfloat32m2x4_t): Ditto. | |
44336 | (vfloat32m4x2_t): Ditto. | |
44337 | (vfloat64m1x2_t): Ditto. | |
44338 | (vfloat64m1x3_t): Ditto. | |
44339 | (vfloat64m1x4_t): Ditto. | |
44340 | (vfloat64m1x5_t): Ditto. | |
44341 | (vfloat64m1x6_t): Ditto. | |
44342 | (vfloat64m1x7_t): Ditto. | |
44343 | (vfloat64m1x8_t): Ditto. | |
44344 | (vfloat64m2x2_t): Ditto. | |
44345 | (vfloat64m2x3_t): Ditto. | |
44346 | (vfloat64m2x4_t): Ditto. | |
44347 | (vfloat64m4x2_t): Ditto. | |
44348 | * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE): | |
44349 | Ditto. | |
44350 | * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto. | |
44351 | * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New | |
44352 | function. | |
44353 | (TUPLE_ENTRY): Ditto. | |
44354 | (riscv_v_ext_mode_p): New function. | |
44355 | (riscv_v_adjust_nunits): Add tuple mode adjustment. | |
44356 | (riscv_classify_address): Ditto. | |
44357 | (riscv_binary_cost): Ditto. | |
44358 | (riscv_rtx_costs): Ditto. | |
44359 | (riscv_secondary_memory_needed): Ditto. | |
44360 | (riscv_hard_regno_nregs): Ditto. | |
44361 | (riscv_hard_regno_mode_ok): Ditto. | |
44362 | (riscv_vector_mode_supported_p): Ditto. | |
44363 | (riscv_regmode_natural_size): Ditto. | |
44364 | (riscv_array_mode): New function. | |
44365 | (TARGET_ARRAY_MODE): New target hook. | |
44366 | * config/riscv/riscv.md: Add tuple modes. | |
44367 | * config/riscv/vector-iterators.md: Ditto. | |
44368 | * config/riscv/vector.md (mov<mode>): Add tuple modes data | |
44369 | movement. | |
44370 | (*mov<VT:mode>_<P:mode>): Ditto. | |
44371 | ||
44372 | 2023-05-03 Richard Biener <rguenther@suse.de> | |
44373 | ||
44374 | * cse.cc (cse_insn): Track an equivalence to the destination | |
44375 | separately and delay using src_related for it. | |
44376 | ||
44377 | 2023-05-03 Richard Biener <rguenther@suse.de> | |
44378 | ||
44379 | * cse.cc (HASH): Turn into inline function and mix | |
44380 | in another HASH_SHIFT bits. | |
44381 | (SAFE_HASH): Likewise. | |
44382 | ||
44383 | 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
44384 | ||
44385 | PR target/99195 | |
44386 | * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to... | |
44387 | (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This. | |
44388 | ||
44389 | 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
44390 | ||
44391 | PR target/99195 | |
44392 | * config/aarch64/aarch64-simd.md (add<mode>3): Rename to... | |
44393 | (add<mode>3<vczle><vczbe>): ... This. | |
44394 | (sub<mode>3): Rename to... | |
44395 | (sub<mode>3<vczle><vczbe>): ... This. | |
44396 | (mul<mode>3): Rename to... | |
44397 | (mul<mode>3<vczle><vczbe>): ... This. | |
44398 | (*div<mode>3): Rename to... | |
44399 | (*div<mode>3<vczle><vczbe>): ... This. | |
44400 | (neg<mode>2): Rename to... | |
44401 | (neg<mode>2<vczle><vczbe>): ... This. | |
44402 | (abs<mode>2): Rename to... | |
44403 | (abs<mode>2<vczle><vczbe>): ... This. | |
44404 | (<frint_pattern><mode>2): Rename to... | |
44405 | (<frint_pattern><mode>2<vczle><vczbe>): ... This. | |
44406 | (<fmaxmin><mode>3): Rename to... | |
44407 | (<fmaxmin><mode>3<vczle><vczbe>): ... This. | |
44408 | (*sqrt<mode>2): Rename to... | |
44409 | (*sqrt<mode>2<vczle><vczbe>): ... This. | |
44410 | ||
44411 | 2023-05-03 Kito Cheng <kito.cheng@sifive.com> | |
44412 | ||
44413 | * doc/md.texi (RISC-V): Add vr, vm, vd constarint. | |
44414 | ||
44415 | 2023-05-03 Martin Liska <mliska@suse.cz> | |
44416 | ||
44417 | PR tree-optimization/109693 | |
44418 | * value-range-storage.cc (vrange_allocator::vrange_allocator): | |
44419 | Remove unused field. | |
44420 | * value-range-storage.h: Likewise. | |
44421 | ||
44422 | 2023-05-02 Andrew Pinski <apinski@marvell.com> | |
44423 | ||
44424 | * tree-ssa-phiopt.cc (move_stmt): New function. | |
44425 | (match_simplify_replacement): Use move_stmt instead | |
44426 | of the inlined version. | |
44427 | ||
44428 | 2023-05-02 Andrew Pinski <apinski@marvell.com> | |
44429 | ||
44430 | * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New | |
44431 | pattern. | |
44432 | ||
44433 | 2023-05-02 Andrew Pinski <apinski@marvell.com> | |
44434 | ||
44435 | PR tree-optimization/109702 | |
44436 | * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns | |
44437 | for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ. | |
44438 | ||
44439 | 2023-05-02 Andrew Pinski <apinski@marvell.com> | |
44440 | ||
44441 | PR target/109657 | |
44442 | * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New | |
44443 | insn_and_split pattern. | |
44444 | ||
44445 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44446 | ||
44447 | * config/riscv/sync.md (atomic_load<mode>): Implement atomic | |
44448 | load mapping. | |
44449 | ||
44450 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44451 | ||
44452 | * config/riscv/sync.md (mem_thread_fence_1): Change fence | |
44453 | depending on the given memory model. | |
44454 | ||
44455 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44456 | ||
44457 | * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose | |
44458 | riscv_union_memmodels function to sync.md. | |
44459 | * config/riscv/riscv.cc (riscv_union_memmodels): Add function to | |
44460 | get the union of two memmodels in sync.md. | |
44461 | (riscv_print_operand): Add %I and %J flags that output the | |
44462 | optimal LR/SC flag bits for a given memory model. | |
44463 | * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl | |
44464 | bits on SC op and replace with optimized %I, %J flags. | |
44465 | ||
44466 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44467 | ||
44468 | * config/riscv/riscv.cc | |
44469 | (riscv_memmodel_needs_amo_release): Change function name. | |
44470 | (riscv_print_operand): Remove unneeded %F case. | |
44471 | * config/riscv/sync.md: Remove unneeded fences. | |
44472 | ||
44473 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44474 | ||
44475 | PR target/89835 | |
44476 | * config/riscv/sync.md (atomic_store<mode>): Use simple store | |
44477 | instruction in combination with fence(s). | |
44478 | ||
44479 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44480 | ||
44481 | * config/riscv/riscv.cc (riscv_print_operand): Change behavior | |
44482 | of %A to include release bits. | |
44483 | ||
44484 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44485 | ||
44486 | * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change | |
44487 | FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl | |
44488 | pair. | |
44489 | ||
44490 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44491 | ||
44492 | * config/riscv/sync.md: Change LR.aq/SC.rl pairs into | |
44493 | sequentially consistent LR.aqrl/SC.rl pairs. | |
44494 | ||
44495 | 2023-05-02 Patrick O'Neill <patrick@rivosinc.com> | |
44496 | ||
44497 | * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and | |
44498 | sanitize memmodel input with memmodel_base. | |
44499 | ||
44500 | 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com> | |
44501 | Pan Li <pan2.li@intel.com> | |
44502 | ||
44503 | PR target/109617 | |
44504 | * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128. | |
44505 | ||
44506 | 2023-05-02 Romain Naour <romain.naour@gmail.com> | |
44507 | ||
44508 | * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without | |
44509 | the namespace. | |
44510 | ||
44511 | 2023-05-02 Martin Liska <mliska@suse.cz> | |
44512 | ||
44513 | * doc/invoke.texi: Update documentation based on param.opt file. | |
44514 | ||
44515 | 2023-05-02 Richard Biener <rguenther@suse.de> | |
44516 | ||
44517 | PR tree-optimization/109672 | |
44518 | * tree-vect-stmts.cc (vectorizable_operation): For plus, | |
44519 | minus and negate always check the vector mode is word mode. | |
44520 | ||
44521 | 2023-05-01 Andrew Pinski <apinski@marvell.com> | |
44522 | ||
44523 | * tree-ssa-phiopt.cc: Update comment about | |
44524 | how the transformation are implemented. | |
44525 | ||
44526 | 2023-05-01 Jeff Law <jlaw@ventanamicro> | |
44527 | ||
44528 | * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion. | |
44529 | ||
44530 | 2023-05-01 Jeff Law <jlaw@ventanamicro> | |
44531 | ||
44532 | * config/cris/cris.cc (TARGET_LRA_P): Remove. | |
44533 | * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove. | |
44534 | * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove. | |
44535 | * config/m32r/m32r.cc (TARGET_LRA_P): Remove. | |
44536 | * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove. | |
44537 | * config/mmix/mmix.cc (TARGET_LRA_P): Remove. | |
44538 | ||
44539 | 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk> | |
44540 | ||
44541 | * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag. | |
44542 | * print-tree.cc (print_decl_identifier): Implement it. | |
44543 | * toplev.cc (output_stack_usage_1): Use it. | |
44544 | ||
44545 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44546 | ||
44547 | * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx | |
44548 | friends. | |
44549 | ||
44550 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44551 | ||
44552 | * value-range.h (irange::set_nonzero): Inline. | |
44553 | ||
44554 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44555 | ||
44556 | * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct | |
44557 | precision. | |
44558 | * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for | |
44559 | invalid_range, as it is an inverse range. | |
44560 | * tree-vrp.cc (find_case_label_range): Avoid trees. | |
44561 | * value-range.cc (irange::irange_set): Delete. | |
44562 | (irange::irange_set_1bit_anti_range): Delete. | |
44563 | (irange::irange_set_anti_range): Delete. | |
44564 | (irange::set): Cleanup. | |
44565 | * value-range.h (class irange): Remove irange_set, | |
44566 | irange_set_anti_range, irange_set_1bit_anti_range. | |
44567 | (irange::set_undefined): Remove set to m_type. | |
44568 | ||
44569 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44570 | ||
44571 | * range-op.cc (update_known_bitmask): Adjust for irange containing | |
44572 | wide_ints internally. | |
44573 | * tree-ssanames.cc (set_nonzero_bits): Same. | |
44574 | * tree-ssanames.h (set_nonzero_bits): Same. | |
44575 | * value-range-storage.cc (irange_storage::set_irange): Same. | |
44576 | (irange_storage::get_irange): Same. | |
44577 | * value-range.cc (irange::operator=): Same. | |
44578 | (irange::irange_set): Same. | |
44579 | (irange::irange_set_1bit_anti_range): Same. | |
44580 | (irange::irange_set_anti_range): Same. | |
44581 | (irange::set): Same. | |
44582 | (irange::verify_range): Same. | |
44583 | (irange::contains_p): Same. | |
44584 | (irange::irange_single_pair_union): Same. | |
44585 | (irange::union_): Same. | |
44586 | (irange::irange_contains_p): Same. | |
44587 | (irange::intersect): Same. | |
44588 | (irange::invert): Same. | |
44589 | (irange::set_range_from_nonzero_bits): Same. | |
44590 | (irange::set_nonzero_bits): Same. | |
44591 | (mask_to_wi): Same. | |
44592 | (irange::intersect_nonzero_bits): Same. | |
44593 | (irange::union_nonzero_bits): Same. | |
44594 | (gt_ggc_mx): Same. | |
44595 | (gt_pch_nx): Same. | |
44596 | (tree_range): Same. | |
44597 | (range_tests_strict_enum): Same. | |
44598 | (range_tests_misc): Same. | |
44599 | (range_tests_nonzero_bits): Same. | |
44600 | * value-range.h (irange::type): Same. | |
44601 | (irange::varying_compatible_p): Same. | |
44602 | (irange::irange): Same. | |
44603 | (int_range::int_range): Same. | |
44604 | (irange::set_undefined): Same. | |
44605 | (irange::set_varying): Same. | |
44606 | (irange::lower_bound): Same. | |
44607 | (irange::upper_bound): Same. | |
44608 | ||
44609 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44610 | ||
44611 | * gimple-range-fold.cc (tree_lower_bound): Delete. | |
44612 | (tree_upper_bound): Delete. | |
44613 | (vrp_val_max): Delete. | |
44614 | (vrp_val_min): Delete. | |
44615 | (fold_using_range::range_of_ssa_name_with_loop_info): Call | |
44616 | range_of_var_in_loop. | |
44617 | * vr-values.cc (valid_value_p): Delete. | |
44618 | (fix_overflow): Delete. | |
44619 | (get_scev_info): New. | |
44620 | (bounds_of_var_in_loop): Refactor into... | |
44621 | (induction_variable_may_overflow_p): ...this, | |
44622 | (range_from_loop_direction): ...and this, | |
44623 | (range_of_var_in_loop): ...and this. | |
44624 | * vr-values.h (bounds_of_var_in_loop): Delete. | |
44625 | (range_of_var_in_loop): New. | |
44626 | ||
44627 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44628 | ||
44629 | * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with | |
44630 | irange_val*. | |
44631 | (vrp_val_max): New. | |
44632 | (vrp_val_min): New. | |
44633 | * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*. | |
44634 | * range-op.cc (max_limit): Same. | |
44635 | (min_limit): Same. | |
44636 | (plus_minus_ranges): Same. | |
44637 | (operator_rshift::op1_range): Same. | |
44638 | (operator_cast::inside_domain_p): Same. | |
44639 | * value-range.cc (vrp_val_is_max): Delete. | |
44640 | (vrp_val_is_min): Delete. | |
44641 | (range_tests_misc): Use irange_val_*. | |
44642 | * value-range.h (vrp_val_is_min): Delete. | |
44643 | (vrp_val_is_max): Delete. | |
44644 | (vrp_val_max): Delete. | |
44645 | (irange_val_min): New. | |
44646 | (vrp_val_min): Delete. | |
44647 | (irange_val_max): New. | |
44648 | * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*. | |
44649 | ||
44650 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44651 | ||
44652 | * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API. | |
44653 | * gimple-fold.cc (size_must_be_zero_p): Same. | |
44654 | * gimple-loop-versioning.cc | |
44655 | (loop_versioning::prune_loop_conditions): Same. | |
44656 | * gimple-range-edge.cc (gcond_edge_range): Same. | |
44657 | (gimple_outgoing_range::calc_switch_ranges): Same. | |
44658 | * gimple-range-fold.cc (adjust_imagpart_expr): Same. | |
44659 | (adjust_realpart_expr): Same. | |
44660 | (fold_using_range::range_of_address): Same. | |
44661 | (fold_using_range::relation_fold_and_or): Same. | |
44662 | * gimple-range-gori.cc (gori_compute::gori_compute): Same. | |
44663 | (range_is_either_true_or_false): Same. | |
44664 | * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same. | |
44665 | (cfn_clz::fold_range): Same. | |
44666 | (cfn_ctz::fold_range): Same. | |
44667 | * gimple-range-tests.cc (class test_expr_eval): Same. | |
44668 | * gimple-ssa-warn-alloca.cc (alloca_call_type): Same. | |
44669 | * ipa-cp.cc (ipa_value_range_from_jfunc): Same. | |
44670 | (propagate_vr_across_jump_function): Same. | |
44671 | (decide_whether_version_node): Same. | |
44672 | * ipa-prop.cc (ipa_get_value_range): Same. | |
44673 | * ipa-prop.h (ipa_range_set_and_normalize): Same. | |
44674 | * range-op.cc (get_shift_range): Same. | |
44675 | (value_range_from_overflowed_bounds): Same. | |
44676 | (value_range_with_overflow): Same. | |
44677 | (create_possibly_reversed_range): Same. | |
44678 | (equal_op1_op2_relation): Same. | |
44679 | (not_equal_op1_op2_relation): Same. | |
44680 | (lt_op1_op2_relation): Same. | |
44681 | (le_op1_op2_relation): Same. | |
44682 | (gt_op1_op2_relation): Same. | |
44683 | (ge_op1_op2_relation): Same. | |
44684 | (operator_mult::op1_range): Same. | |
44685 | (operator_exact_divide::op1_range): Same. | |
44686 | (operator_lshift::op1_range): Same. | |
44687 | (operator_rshift::op1_range): Same. | |
44688 | (operator_cast::op1_range): Same. | |
44689 | (operator_logical_and::fold_range): Same. | |
44690 | (set_nonzero_range_from_mask): Same. | |
44691 | (operator_bitwise_or::op1_range): Same. | |
44692 | (operator_bitwise_xor::op1_range): Same. | |
44693 | (operator_addr_expr::fold_range): Same. | |
44694 | (pointer_plus_operator::wi_fold): Same. | |
44695 | (pointer_or_operator::op1_range): Same. | |
44696 | (INT): Same. | |
44697 | (UINT): Same. | |
44698 | (INT16): Same. | |
44699 | (UINT16): Same. | |
44700 | (SCHAR): Same. | |
44701 | (UCHAR): Same. | |
44702 | (range_op_cast_tests): Same. | |
44703 | (range_op_lshift_tests): Same. | |
44704 | (range_op_rshift_tests): Same. | |
44705 | (range_op_bitwise_and_tests): Same. | |
44706 | (range_relational_tests): Same. | |
44707 | * range.cc (range_zero): Same. | |
44708 | (range_nonzero): Same. | |
44709 | * range.h (range_true): Same. | |
44710 | (range_false): Same. | |
44711 | (range_true_and_false): Same. | |
44712 | * tree-data-ref.cc (split_constant_offset_1): Same. | |
44713 | * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same. | |
44714 | * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same. | |
44715 | (find_unswitching_predicates_for_bb): Same. | |
44716 | * tree-ssa-phiopt.cc (value_replacement): Same. | |
44717 | * tree-ssa-threadbackward.cc | |
44718 | (back_threader::find_taken_edge_cond): Same. | |
44719 | * tree-ssanames.cc (ssa_name_has_boolean_range): Same. | |
44720 | * tree-vrp.cc (find_case_label_range): Same. | |
44721 | * value-query.cc (range_query::get_tree_range): Same. | |
44722 | * value-range.cc (irange::set_nonnegative): Same. | |
44723 | (frange::contains_p): Same. | |
44724 | (frange::singleton_p): Same. | |
44725 | (frange::internal_singleton_p): Same. | |
44726 | (irange::irange_set): Same. | |
44727 | (irange::irange_set_1bit_anti_range): Same. | |
44728 | (irange::irange_set_anti_range): Same. | |
44729 | (irange::set): Same. | |
44730 | (irange::operator==): Same. | |
44731 | (irange::singleton_p): Same. | |
44732 | (irange::contains_p): Same. | |
44733 | (irange::set_range_from_nonzero_bits): Same. | |
44734 | (DEFINE_INT_RANGE_INSTANCE): Same. | |
44735 | (INT): Same. | |
44736 | (UINT): Same. | |
44737 | (SCHAR): Same. | |
44738 | (UINT128): Same. | |
44739 | (UCHAR): Same. | |
44740 | (range): New. | |
44741 | (tree_range): New. | |
44742 | (range_int): New. | |
44743 | (range_uint): New. | |
44744 | (range_uint128): New. | |
44745 | (range_uchar): New. | |
44746 | (range_char): New. | |
44747 | (build_range3): Convert to irange wide_int API. | |
44748 | (range_tests_irange3): Same. | |
44749 | (range_tests_int_range_max): Same. | |
44750 | (range_tests_strict_enum): Same. | |
44751 | (range_tests_misc): Same. | |
44752 | (range_tests_nonzero_bits): Same. | |
44753 | (range_tests_nan): Same. | |
44754 | (range_tests_signed_zeros): Same. | |
44755 | * value-range.h (Value_Range::Value_Range): Same. | |
44756 | (irange::set): Same. | |
44757 | (irange::nonzero_p): Same. | |
44758 | (irange::contains_p): Same. | |
44759 | (range_includes_zero_p): Same. | |
44760 | (irange::set_nonzero): Same. | |
44761 | (irange::set_zero): Same. | |
44762 | (contains_zero_p): Same. | |
44763 | (frange::contains_p): Same. | |
44764 | * vr-values.cc | |
44765 | (simplify_using_ranges::op_with_boolean_value_range_p): Same. | |
44766 | (bounds_of_var_in_loop): Same. | |
44767 | (simplify_using_ranges::legacy_fold_cond_overflow): Same. | |
44768 | ||
44769 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44770 | ||
44771 | * value-range.cc (irange::irange_union): Rename to... | |
44772 | (irange::union_): ...this. | |
44773 | (irange::irange_intersect): Rename to... | |
44774 | (irange::intersect): ...this. | |
44775 | * value-range.h (irange::union_): Delete. | |
44776 | (irange::intersect): Delete. | |
44777 | ||
44778 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44779 | ||
44780 | * vr-values.cc (bounds_of_var_in_loop): Convert to irange API. | |
44781 | ||
44782 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44783 | ||
44784 | * vr-values.cc (check_for_binary_op_overflow): Tidy up by using | |
44785 | ranger API. | |
44786 | (compare_ranges): Delete. | |
44787 | (compare_range_with_value): Delete. | |
44788 | (bounds_of_var_in_loop): Tidy up by using ranger API. | |
44789 | (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename | |
44790 | from vrp_evaluate_conditional_warnv_with_ops_using_ranges. | |
44791 | (simplify_using_ranges::legacy_fold_cond_overflow): Remove | |
44792 | strict_overflow_p and only_ranges. | |
44793 | (simplify_using_ranges::legacy_fold_cond): Adjust call to | |
44794 | legacy_fold_cond_overflow. | |
44795 | (simplify_using_ranges::simplify_abs_using_ranges): Adjust for | |
44796 | rename. | |
44797 | (range_fits_type_p): Rename value_range to irange. | |
44798 | * vr-values.h (range_fits_type_p): Adjust prototype. | |
44799 | ||
44800 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44801 | ||
44802 | * value-range.cc (irange::irange_set_anti_range): Remove uses of | |
44803 | tree_lower_bound and tree_upper_bound. | |
44804 | (irange::verify_range): Same. | |
44805 | (irange::operator==): Same. | |
44806 | (irange::singleton_p): Same. | |
44807 | * value-range.h (irange::tree_lower_bound): Delete. | |
44808 | (irange::tree_upper_bound): Delete. | |
44809 | (irange::lower_bound): Delete. | |
44810 | (irange::upper_bound): Delete. | |
44811 | (irange::zero_p): Remove uses of tree_lower_bound and | |
44812 | tree_upper_bound. | |
44813 | ||
44814 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44815 | ||
44816 | * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove | |
44817 | kind() call. | |
44818 | (determine_value_range): Same. | |
44819 | (record_nonwrapping_iv): Same. | |
44820 | (infer_loop_bounds_from_signedness): Same. | |
44821 | (scev_var_range_cant_overflow): Same. | |
44822 | * tree-vrp.cc (operand_less_p): Delete. | |
44823 | * tree-vrp.h (operand_less_p): Delete. | |
44824 | * value-range.cc (get_legacy_range): Remove uses of deprecated API. | |
44825 | (irange::value_inside_range): Delete. | |
44826 | * value-range.h (vrange::kind): Delete. | |
44827 | (irange::num_pairs): Remove check of m_kind. | |
44828 | (irange::min): Delete. | |
44829 | (irange::max): Delete. | |
44830 | ||
44831 | 2023-05-01 Aldy Hernandez <aldyh@redhat.com> | |
44832 | ||
44833 | * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust | |
44834 | for vrange_storage. | |
44835 | * gimple-range-cache.cc (sbr_vector::sbr_vector): Same. | |
44836 | (sbr_vector::grow): Same. | |
44837 | (sbr_vector::set_bb_range): Same. | |
44838 | (sbr_vector::get_bb_range): Same. | |
44839 | (sbr_sparse_bitmap::sbr_sparse_bitmap): Same. | |
44840 | (sbr_sparse_bitmap::set_bb_range): Same. | |
44841 | (sbr_sparse_bitmap::get_bb_range): Same. | |
44842 | (block_range_cache::block_range_cache): Same. | |
44843 | (ssa_global_cache::ssa_global_cache): Same. | |
44844 | (ssa_global_cache::get_global_range): Same. | |
44845 | (ssa_global_cache::set_global_range): Same. | |
44846 | * gimple-range-cache.h: Same. | |
44847 | * gimple-range-edge.cc | |
44848 | (gimple_outgoing_range::gimple_outgoing_range): Same. | |
44849 | (gimple_outgoing_range::switch_edge_range): Same. | |
44850 | (gimple_outgoing_range::calc_switch_ranges): Same. | |
44851 | * gimple-range-edge.h: Same. | |
44852 | * gimple-range-infer.cc | |
44853 | (infer_range_manager::infer_range_manager): Same. | |
44854 | (infer_range_manager::get_nonzero): Same. | |
44855 | (infer_range_manager::maybe_adjust_range): Same. | |
44856 | (infer_range_manager::add_range): Same. | |
44857 | * gimple-range-infer.h: Rename obstack_vrange_allocator to | |
44858 | vrange_allocator. | |
44859 | * tree-core.h (struct irange_storage_slot): Remove. | |
44860 | (struct tree_ssa_name): Remove irange_info and frange_info. Make | |
44861 | range_info a pointer to vrange_storage. | |
44862 | * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage. | |
44863 | (range_info_alloc): Same. | |
44864 | (range_info_free): Same. | |
44865 | (range_info_get_range): Same. | |
44866 | (range_info_set_range): Same. | |
44867 | (get_nonzero_bits): Same. | |
44868 | * value-query.cc (get_ssa_name_range_info): Same. | |
44869 | * value-range-storage.cc (class vrange_internal_alloc): New. | |
44870 | (class vrange_obstack_alloc): New. | |
44871 | (class vrange_ggc_alloc): New. | |
44872 | (vrange_allocator::vrange_allocator): New. | |
44873 | (vrange_allocator::~vrange_allocator): New. | |
44874 | (vrange_storage::alloc_slot): New. | |
44875 | (vrange_allocator::alloc): New. | |
44876 | (vrange_allocator::free): New. | |
44877 | (vrange_allocator::clone): New. | |
44878 | (vrange_allocator::clone_varying): New. | |
44879 | (vrange_allocator::clone_undefined): New. | |
44880 | (vrange_storage::alloc): New. | |
44881 | (vrange_storage::set_vrange): Remove slot argument. | |
44882 | (vrange_storage::get_vrange): Same. | |
44883 | (vrange_storage::fits_p): Same. | |
44884 | (vrange_storage::equal_p): New. | |
44885 | (irange_storage::write_lengths_address): New. | |
44886 | (irange_storage::lengths_address): New. | |
44887 | (irange_storage_slot::alloc_slot): Remove. | |
44888 | (irange_storage::alloc): New. | |
44889 | (irange_storage_slot::irange_storage_slot): Remove. | |
44890 | (irange_storage::irange_storage): New. | |
44891 | (write_wide_int): New. | |
44892 | (irange_storage_slot::set_irange): Remove. | |
44893 | (irange_storage::set_irange): New. | |
44894 | (read_wide_int): New. | |
44895 | (irange_storage_slot::get_irange): Remove. | |
44896 | (irange_storage::get_irange): New. | |
44897 | (irange_storage_slot::size): Remove. | |
44898 | (irange_storage::equal_p): New. | |
44899 | (irange_storage_slot::num_wide_ints_needed): Remove. | |
44900 | (irange_storage::size): New. | |
44901 | (irange_storage_slot::fits_p): Remove. | |
44902 | (irange_storage::fits_p): New. | |
44903 | (irange_storage_slot::dump): Remove. | |
44904 | (irange_storage::dump): New. | |
44905 | (frange_storage_slot::alloc_slot): Remove. | |
44906 | (frange_storage::alloc): New. | |
44907 | (frange_storage_slot::set_frange): Remove. | |
44908 | (frange_storage::set_frange): New. | |
44909 | (frange_storage_slot::get_frange): Remove. | |
44910 | (frange_storage::get_frange): New. | |
44911 | (frange_storage_slot::fits_p): Remove. | |
44912 | (frange_storage::equal_p): New. | |
44913 | (frange_storage::fits_p): New. | |
44914 | (ggc_vrange_allocator): New. | |
44915 | (ggc_alloc_vrange_storage): New. | |
44916 | * value-range-storage.h (class vrange_storage): Rewrite. | |
44917 | (class irange_storage): Rewrite. | |
44918 | (class frange_storage): Rewrite. | |
44919 | (class obstack_vrange_allocator): Remove. | |
44920 | (class ggc_vrange_allocator): Remove. | |
44921 | (vrange_allocator::alloc_vrange): Remove. | |
44922 | (vrange_allocator::alloc_irange): Remove. | |
44923 | (vrange_allocator::alloc_frange): Remove. | |
44924 | (ggc_alloc_vrange_storage): New. | |
44925 | * value-range.h (class irange): Rename vrange_allocator to | |
44926 | irange_storage. | |
44927 | (class frange): Same. | |
44928 | ||
44929 | 2023-04-30 Roger Sayle <roger@nextmovesoftware.com> | |
44930 | ||
44931 | * config/stormy16/stormy16.md (neghi2): Rewrite pattern using | |
44932 | inc to avoid clobbering the carry flag. | |
44933 | ||
44934 | 2023-04-30 Andrew Pinski <apinski@marvell.com> | |
44935 | ||
44936 | * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST" | |
44937 | for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ. | |
44938 | ||
44939 | 2023-04-30 Andrew Pinski <apinski@marvell.com> | |
44940 | ||
44941 | * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p): | |
44942 | Allow some builtin/internal function calls which | |
44943 | are known not to trap/throw. | |
44944 | (phiopt_worker::match_simplify_replacement): | |
44945 | Use name instead of getting the lhs again. | |
44946 | ||
44947 | 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se> | |
44948 | ||
44949 | * configure: Regenerate. | |
44950 | * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING | |
44951 | ||
44952 | 2023-04-29 Hans-Peter Nilsson <hp@axis.com> | |
44953 | ||
44954 | * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from | |
44955 | emit_insn_if_valid_for_reload. | |
44956 | (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails | |
44957 | to be recognized, also try emitting a parallel that clobbers | |
44958 | TARGET_FLAGS_REGNUM, as applicable. | |
44959 | ||
44960 | 2023-04-29 Roger Sayle <roger@nextmovesoftware.com> | |
44961 | ||
44962 | * config/stormy16/stormy16.md (neghi2): Convert from a define_expand | |
44963 | to a define_insn. | |
44964 | (*rotatehi_1): New define_insn for efficient 2 insn sequence. | |
44965 | (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb. | |
44966 | ||
44967 | 2023-04-29 Roger Sayle <roger@nextmovesoftware.com> | |
44968 | ||
44969 | * config/stormy16/stormy16.md (any_lshift): New code iterator. | |
44970 | (any_or_plus): Likewise. | |
44971 | (any_rotate): Likewise. | |
44972 | (*<any_lshift>_and_internal): New define_insn_and_split to | |
44973 | recognize a logical shift followed by an AND, and split it | |
44974 | again after reload. | |
44975 | (*swpn): New define_insn matching xstormy16's swpn. | |
44976 | (*swpn_zext): New define_insn recognizing swpn followed by | |
44977 | zero_extendqihi2, i.e. with the high byte set to zero. | |
44978 | (*swpn_sext): Likewise, for swpn followed by cbw. | |
44979 | (*swpn_sext_2): Likewise, for an alternate RTL form. | |
44980 | (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior | |
44981 | sequence is split in the correct place to recognize the *swpn_zext | |
44982 | followed by any_or_plus (ior, xor or plus) instruction. | |
44983 | ||
44984 | 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com> | |
44985 | ||
44986 | PR target/105525 | |
44987 | * config.gcc (vax-*-linux*): Add glibc-stdint.h. | |
44988 | (lm32-*-uclinux*): Likewise. | |
44989 | ||
44990 | 2023-04-29 Fei Gao <gaofei@eswincomputing.com> | |
44991 | ||
44992 | * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function | |
44993 | for riscv_use_save_libcall. | |
44994 | (riscv_use_save_libcall): call riscv_avoid_save_libcall. | |
44995 | (riscv_compute_frame_info): restructure to decouple stack allocation | |
44996 | for rv32e w/o save-restore. | |
44997 | ||
44998 | 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com> | |
44999 | ||
45000 | * doc/install.texi: Fix documentation typo | |
45001 | ||
45002 | 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com> | |
45003 | ||
45004 | * config/riscv/iterators.md (only_div, paired_mod): New iterators. | |
45005 | (u): Add div/udiv cases. | |
45006 | * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype. | |
45007 | * config/riscv/riscv.cc (struct riscv_tune_param): Add field for | |
45008 | divmod expansion. | |
45009 | (rocket_tune_info, sifive_7_tune_info): Initialize new field. | |
45010 | (thead_c906_tune_info): Likewise. | |
45011 | (optimize_size_tune_info): Likewise. | |
45012 | (riscv_use_divmod_expander): New function. | |
45013 | * config/riscv/riscv.md (<u>divmod<mode>4): New expander. | |
45014 | ||
45015 | 2023-04-28 Karen Sargsyan <karen1999411@gmail.com> | |
45016 | ||
45017 | * config/riscv/bitmanip.md: Added clmulr instruction. | |
45018 | * config/riscv/riscv-builtins.cc (AVAIL): Add new. | |
45019 | * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type. | |
45020 | (type): Add clmul | |
45021 | * config/riscv/riscv-cmo.def: Added built-in function for clmulr. | |
45022 | * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md. | |
45023 | * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in | |
45024 | functions to riscv-cmo.def. | |
45025 | * config/riscv/generic.md: Add clmul to list of instructions | |
45026 | using the generic_imul reservation. | |
45027 | ||
45028 | 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
45029 | ||
45030 | * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions | |
45031 | ||
45032 | 2023-04-28 Andrew Pinski <apinski@marvell.com> | |
45033 | ||
45034 | PR tree-optimization/100958 | |
45035 | * tree-ssa-phiopt.cc (two_value_replacement): Remove. | |
45036 | (pass_phiopt::execute): Don't call two_value_replacement. | |
45037 | * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to | |
45038 | handle what two_value_replacement did. | |
45039 | ||
45040 | 2023-04-28 Andrew Pinski <apinski@marvell.com> | |
45041 | ||
45042 | * match.pd: Add patterns for | |
45043 | "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>". | |
45044 | ||
45045 | 2023-04-28 Andrew Pinski <apinski@marvell.com> | |
45046 | ||
45047 | * match.pd: Factor out the deciding the min/max from | |
45048 | the "(cond (cmp (convert1? x) c1) (convert2? x) c2)" | |
45049 | pattern to ... | |
45050 | * fold-const.cc (minmax_from_comparison): this new function. | |
45051 | * fold-const.h (minmax_from_comparison): New prototype. | |
45052 | ||
45053 | 2023-04-28 Roger Sayle <roger@nextmovesoftware.com> | |
45054 | ||
45055 | PR rtl-optimization/109476 | |
45056 | * lower-subreg.cc: Include explow.h for force_reg. | |
45057 | (find_decomposable_shift_zext): Pass an additional SPEED_P argument. | |
45058 | If decomposing a suitable LSHIFTRT and we're not splitting | |
45059 | ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND | |
45060 | instead of setting a high part SUBREG to zero, which helps combine. | |
45061 | (decompose_multiword_subregs): Update call to resolve_shift_zext. | |
45062 | ||
45063 | 2023-04-28 Richard Biener <rguenther@suse.de> | |
45064 | ||
45065 | * tree-vect-data-refs.cc (vect_analyze_data_refs): Always | |
45066 | consider scatters. | |
45067 | * tree-vect-stmts.cc (vect_model_store_cost): Pass in the | |
45068 | gather-scatter info and cost emulated scatters accordingly. | |
45069 | (get_load_store_type): Support emulated scatters. | |
45070 | (vectorizable_store): Likewise. Emulate them by extracting | |
45071 | scalar offsets and data, doing scalar stores. | |
45072 | ||
45073 | 2023-04-28 Richard Biener <rguenther@suse.de> | |
45074 | ||
45075 | * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): | |
45076 | Tame down element extracts and scalar loads for gather/scatter | |
45077 | similar to elementwise strided accesses. | |
45078 | ||
45079 | 2023-04-28 Pan Li <pan2.li@intel.com> | |
45080 | kito-cheng <kito.cheng@sifive.com> | |
45081 | ||
45082 | * config/riscv/vector.md: Add new define split to perform | |
45083 | the simplification. | |
45084 | ||
45085 | 2023-04-28 Richard Biener <rguenther@suse.de> | |
45086 | ||
45087 | PR ipa/109652 | |
45088 | * ipa-param-manipulation.cc | |
45089 | (ipa_param_body_adjustments::modify_expression): Allow | |
45090 | conversion of a register to a non-register type. Elide | |
45091 | conversions inside BIT_FIELD_REFs. | |
45092 | ||
45093 | 2023-04-28 Richard Biener <rguenther@suse.de> | |
45094 | ||
45095 | PR tree-optimization/109644 | |
45096 | * tree-cfg.cc (verify_types_in_gimple_reference): Check | |
45097 | register constraints on the outermost VIEW_CONVERT_EXPR | |
45098 | only. Do not allow register or invariant bases on | |
45099 | multi-level or possibly variable index handled components. | |
45100 | ||
45101 | 2023-04-28 Richard Biener <rguenther@suse.de> | |
45102 | ||
45103 | * gimplify.cc (gimplify_compound_lval): When there's a | |
45104 | non-register type produced by one of the handled component | |
45105 | operations make sure we get a non-register base. | |
45106 | ||
45107 | 2023-04-28 Richard Biener <rguenther@suse.de> | |
45108 | ||
45109 | PR tree-optimization/108752 | |
45110 | * tree-vect-generic.cc (build_replicated_const): Rename | |
45111 | to build_replicated_int_cst and move to tree.{h,cc}. | |
45112 | (do_plus_minus): Adjust. | |
45113 | (do_negate): Likewise. | |
45114 | * tree-vect-stmts.cc (vectorizable_operation): Emit emulated | |
45115 | arithmetic vector operations in lowered form. | |
45116 | * tree.h (build_replicated_int_cst): Declare. | |
45117 | * tree.cc (build_replicated_int_cst): Moved from | |
45118 | tree-vect-generic.cc build_replicated_const. | |
45119 | ||
45120 | 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45121 | ||
45122 | PR target/99195 | |
45123 | * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to... | |
45124 | (aarch64_rbit<mode><vczle><vczbe>): ... This. | |
45125 | (neg<mode>2): Rename to... | |
45126 | (neg<mode>2<vczle><vczbe>): ... This. | |
45127 | (abs<mode>2): Rename to... | |
45128 | (abs<mode>2<vczle><vczbe>): ... This. | |
45129 | (aarch64_abs<mode>): Rename to... | |
45130 | (aarch64_abs<mode><vczle><vczbe>): ... This. | |
45131 | (one_cmpl<mode>2): Rename to... | |
45132 | (one_cmpl<mode>2<vczle><vczbe>): ... This. | |
45133 | (clrsb<mode>2): Rename to... | |
45134 | (clrsb<mode>2<vczle><vczbe>): ... This. | |
45135 | (clz<mode>2): Rename to... | |
45136 | (clz<mode>2<vczle><vczbe>): ... This. | |
45137 | (popcount<mode>2): Rename to... | |
45138 | (popcount<mode>2<vczle><vczbe>): ... This. | |
45139 | ||
45140 | 2023-04-28 Jakub Jelinek <jakub@redhat.com> | |
45141 | ||
45142 | * gimple-range-op.cc (class cfn_sqrt): New type. | |
45143 | (op_cfn_sqrt): New variable. | |
45144 | (gimple_range_op_handler::maybe_builtin_call): Handle | |
45145 | CASE_CFN_SQRT{,_FN}. | |
45146 | ||
45147 | 2023-04-28 Aldy Hernandez <aldyh@redhat.com> | |
45148 | Jakub Jelinek <jakub@redhat.com> | |
45149 | ||
45150 | * value-range.h (frange_nextafter): Declare. | |
45151 | * gimple-range-op.cc (class cfn_sincos): New. | |
45152 | (op_cfn_sin, op_cfn_cos): New variables. | |
45153 | (gimple_range_op_handler::maybe_builtin_call): Handle | |
45154 | CASE_CFN_{SIN,COS}{,_FN}. | |
45155 | ||
45156 | 2023-04-28 Jakub Jelinek <jakub@redhat.com> | |
45157 | ||
45158 | * target.def (libm_function_max_error): New target hook. | |
45159 | * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add. | |
45160 | * doc/tm.texi: Regenerated. | |
45161 | * targhooks.h (default_libm_function_max_error, | |
45162 | glibc_linux_libm_function_max_error): Declare. | |
45163 | * targhooks.cc: Include case-cfn-macros.h. | |
45164 | (default_libm_function_max_error, | |
45165 | glibc_linux_libm_function_max_error): New functions. | |
45166 | * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine. | |
45167 | * config/linux-protos.h (linux_libm_function_max_error): Declare. | |
45168 | * config/linux.cc: Include target.h and targhooks.h. | |
45169 | (linux_libm_function_max_error): New function. | |
45170 | * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h. | |
45171 | (arc_libm_function_max_error): New function. | |
45172 | (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine. | |
45173 | * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix. | |
45174 | (ix86_libm_function_max_error): New function. | |
45175 | (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine. | |
45176 | * config/rs6000/rs6000-protos.h | |
45177 | (rs6000_linux_libm_function_max_error): Declare. | |
45178 | * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h | |
45179 | and case-cfn-macros.h. | |
45180 | (rs6000_linux_libm_function_max_error): New function. | |
45181 | * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine. | |
45182 | * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine. | |
45183 | * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h. | |
45184 | (or1k_libm_function_max_error): New function. | |
45185 | (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine. | |
45186 | ||
45187 | 2023-04-28 Alexandre Oliva <oliva@adacore.com> | |
45188 | ||
45189 | * gimple-harden-conditionals.cc (insert_edge_check_and_trap): | |
45190 | Move detach value calls... | |
45191 | (pass_harden_conditional_branches::execute): ... here. | |
45192 | (pass_harden_compares::execute): Detach values before | |
45193 | compares. | |
45194 | ||
45195 | 2023-04-27 Andrew Stubbs <ams@codesourcery.com> | |
45196 | ||
45197 | * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef. | |
45198 | (cml<addsub_as><mode>4): Likewise. | |
45199 | (vec_addsub<mode>3): Likewise. | |
45200 | (cadd<rot><mode>3): Likewise. | |
45201 | (vec_fmaddsub<mode>4): Likewise. | |
45202 | (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes. | |
45203 | ||
45204 | 2023-04-27 Andrew Pinski <apinski@marvell.com> | |
45205 | ||
45206 | * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for | |
45207 | up to 2 min/max expressions in the sequence/match code. | |
45208 | ||
45209 | 2023-04-27 Andrew Pinski <apinski@marvell.com> | |
45210 | ||
45211 | * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as | |
45212 | COMPARISON. | |
45213 | * tree-eh.cc (operation_could_trap_helper_p): Treate | |
45214 | MIN_EXPR/MAX_EXPR similar as other comparisons. | |
45215 | ||
45216 | 2023-04-27 Andrew Pinski <apinski@marvell.com> | |
45217 | ||
45218 | * tree-ssa-phiopt.cc (cond_store_replacement): Remove | |
45219 | prototype. | |
45220 | (cond_if_else_store_replacement): Likewise. | |
45221 | (get_non_trapping): Likewise. | |
45222 | (store_elim_worker): Move into ... | |
45223 | (pass_cselim::execute): This. | |
45224 | ||
45225 | 2023-04-27 Andrew Pinski <apinski@marvell.com> | |
45226 | ||
45227 | * tree-ssa-phiopt.cc (two_value_replacement): Remove | |
45228 | prototype. | |
45229 | (match_simplify_replacement): Likewise. | |
45230 | (factor_out_conditional_conversion): Likewise. | |
45231 | (value_replacement): Likewise. | |
45232 | (minmax_replacement): Likewise. | |
45233 | (spaceship_replacement): Likewise. | |
45234 | (cond_removal_in_builtin_zero_pattern): Likewise. | |
45235 | (hoist_adjacent_loads): Likewise. | |
45236 | (tree_ssa_phiopt_worker): Move into ... | |
45237 | (pass_phiopt::execute): this. | |
45238 | ||
45239 | 2023-04-27 Andrew Pinski <apinski@marvell.com> | |
45240 | ||
45241 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove | |
45242 | do_store_elim argument and split that part out to ... | |
45243 | (store_elim_worker): This new function. | |
45244 | (pass_cselim::execute): Call store_elim_worker. | |
45245 | (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker. | |
45246 | ||
45247 | 2023-04-27 Jan Hubicka <jh@suse.cz> | |
45248 | ||
45249 | * cfgloopmanip.h (unloop_loops): Export. | |
45250 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops | |
45251 | that no longer loop. | |
45252 | * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free | |
45253 | vectors of loops to unloop. | |
45254 | (canonicalize_induction_variables): Free vectors here. | |
45255 | (tree_unroll_loops_completely): Free vectors here. | |
45256 | ||
45257 | 2023-04-27 Richard Biener <rguenther@suse.de> | |
45258 | ||
45259 | PR tree-optimization/109170 | |
45260 | * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call): | |
45261 | Handle __builtin_expect and similar via cfn_pass_through_arg1 | |
45262 | and inspecting the calls fnspec. | |
45263 | * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT | |
45264 | and BUILT_IN_EXPECT_WITH_PROBABILITY. | |
45265 | ||
45266 | 2023-04-27 Alexandre Oliva <oliva@adacore.com> | |
45267 | ||
45268 | * genmultilib: Use CONFIG_SHELL to run sub-scripts. | |
45269 | ||
45270 | 2023-04-27 Aldy Hernandez <aldyh@redhat.com> | |
45271 | ||
45272 | PR tree-optimization/109639 | |
45273 | * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range. | |
45274 | (propagate_vr_across_jump_function): Same. | |
45275 | * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same. | |
45276 | * ipa-prop.h (ipa_range_set_and_normalize): New. | |
45277 | * value-range.cc (irange::set): Assert min and max are INTEGER_CST. | |
45278 | ||
45279 | 2023-04-27 Richard Biener <rguenther@suse.de> | |
45280 | ||
45281 | * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not | |
45282 | create a CTOR operand in the result when simplifying GIMPLE. | |
45283 | ||
45284 | 2023-04-27 Richard Biener <rguenther@suse.de> | |
45285 | ||
45286 | * gimplify.cc (gimplify_compound_lval): When the base | |
45287 | gimplified to a register make sure to split up chains | |
45288 | of operations. | |
45289 | ||
45290 | 2023-04-27 Richard Biener <rguenther@suse.de> | |
45291 | ||
45292 | PR ipa/109607 | |
45293 | * ipa-param-manipulation.h | |
45294 | (ipa_param_body_adjustments::modify_expression): Add extra_stmts | |
45295 | argument. | |
45296 | * ipa-param-manipulation.cc | |
45297 | (ipa_param_body_adjustments::modify_expression): Likewise. | |
45298 | When we need a conversion and the replacement is a register | |
45299 | split the conversion out. | |
45300 | (ipa_param_body_adjustments::modify_assignment): Pass | |
45301 | extra_stmts to RHS modify_expression. | |
45302 | ||
45303 | 2023-04-27 Jonathan Wakely <jwakely@redhat.com> | |
45304 | ||
45305 | * doc/extend.texi (Zero Length): Describe example. | |
45306 | ||
45307 | 2023-04-27 Richard Biener <rguenther@suse.de> | |
45308 | ||
45309 | PR tree-optimization/109594 | |
45310 | * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain | |
45311 | what we rewrite to a register based on the above. | |
45312 | ||
45313 | 2023-04-26 Patrick O'Neill <patrick@rivosinc.com> | |
45314 | ||
45315 | * config/riscv/riscv.cc: Fix whitespace. | |
45316 | * config/riscv/sync.md: Fix whitespace. | |
45317 | ||
45318 | 2023-04-26 Andrew MacLeod <amacleod@redhat.com> | |
45319 | ||
45320 | PR tree-optimization/108697 | |
45321 | * gimple-range-cache.cc (ssa_global_cache::clear_range): Do | |
45322 | not clear the vector on an out of range query. | |
45323 | (ssa_cache::dump): Use dump_range_query instead of get_range. | |
45324 | (ssa_cache::dump_range_query): New. | |
45325 | (ssa_lazy_cache::dump_range_query): New. | |
45326 | (ssa_lazy_cache::set_range): New. | |
45327 | * gimple-range-cache.h (ssa_cache::dump_range_query): New. | |
45328 | (class ssa_lazy_cache): New. | |
45329 | (ssa_lazy_cache::ssa_lazy_cache): New. | |
45330 | (ssa_lazy_cache::~ssa_lazy_cache): New. | |
45331 | (ssa_lazy_cache::get_range): New. | |
45332 | (ssa_lazy_cache::clear_range): New. | |
45333 | (ssa_lazy_cache::clear): New. | |
45334 | (ssa_lazy_cache::dump): New. | |
45335 | * gimple-range-path.cc (path_range_query::path_range_query): Do | |
45336 | not allocate a ssa_cache object nor has_cache bitmap. | |
45337 | (path_range_query::~path_range_query): Do not free objects. | |
45338 | (path_range_query::clear_cache): Remove. | |
45339 | (path_range_query::get_cache): Adjust. | |
45340 | (path_range_query::set_cache): Remove. | |
45341 | (path_range_query::dump): Don't call through a pointer. | |
45342 | (path_range_query::internal_range_of_expr): Set cache directly. | |
45343 | (path_range_query::reset_path): Clear cache directly. | |
45344 | (path_range_query::ssa_range_in_phi): Fold with globals only. | |
45345 | (path_range_query::compute_ranges_in_phis): Simply set range. | |
45346 | (path_range_query::compute_ranges_in_block): Call cache directly. | |
45347 | * gimple-range-path.h (class path_range_query): Replace bitmap | |
45348 | and cache pointer with lazy cache object. | |
45349 | * gimple-range.h (class assume_query): Use ssa_lazy_cache. | |
45350 | ||
45351 | 2023-04-26 Andrew MacLeod <amacleod@redhat.com> | |
45352 | ||
45353 | * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename. | |
45354 | (ssa_cache::~ssa_cache): Rename. | |
45355 | (ssa_cache::has_range): New. | |
45356 | (ssa_cache::get_range): Rename. | |
45357 | (ssa_cache::set_range): Rename. | |
45358 | (ssa_cache::clear_range): Rename. | |
45359 | (ssa_cache::clear): Rename. | |
45360 | (ssa_cache::dump): Rename and use get_range. | |
45361 | (ranger_cache::get_global_range): Use get_range and set_range. | |
45362 | (ranger_cache::range_of_def): Use get_range. | |
45363 | * gimple-range-cache.h (class ssa_cache): Rename class and methods. | |
45364 | (class ranger_cache): Use ssa_cache. | |
45365 | * gimple-range-path.cc (path_range_query::path_range_query): Use | |
45366 | ssa_cache. | |
45367 | (path_range_query::get_cache): Use get_range. | |
45368 | (path_range_query::set_cache): Use set_range. | |
45369 | * gimple-range-path.h (class path_range_query): Use ssa_cache. | |
45370 | * gimple-range.cc (assume_query::assume_range_p): Use get_range. | |
45371 | (assume_query::range_of_expr): Use get_range. | |
45372 | (assume_query::assume_query): Use set_range. | |
45373 | (assume_query::calculate_op): Use get_range and set_range. | |
45374 | * gimple-range.h (class assume_query): Use ssa_cache. | |
45375 | ||
45376 | 2023-04-26 Andrew MacLeod <amacleod@redhat.com> | |
45377 | ||
45378 | * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter | |
45379 | and local to optionally zero memory. | |
45380 | (br_vector::grow): Only zero memory if flag is set. | |
45381 | (class sbr_lazy_vector): New. | |
45382 | (sbr_lazy_vector::sbr_lazy_vector): New. | |
45383 | (sbr_lazy_vector::set_bb_range): New. | |
45384 | (sbr_lazy_vector::get_bb_range): New. | |
45385 | (sbr_lazy_vector::bb_range_p): New. | |
45386 | (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector. | |
45387 | * gimple-range-gori.cc (gori_map::calculate_gori): Use | |
45388 | param_vrp_switch_limit. | |
45389 | (gori_compute::gori_compute): Use param_vrp_switch_limit. | |
45390 | * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold. | |
45391 | (vrp_switch_limit): Rename from evrp_switch_limit. | |
45392 | (vrp_vector_threshold): New. | |
45393 | ||
45394 | 2023-04-26 Andrew MacLeod <amacleod@redhat.com> | |
45395 | ||
45396 | * value-relation.cc (dom_oracle::query_relation): Check early for lack | |
45397 | of any relation. | |
45398 | * value-relation.h (equiv_oracle::has_equiv_p): New. | |
45399 | ||
45400 | 2023-04-26 Andrew MacLeod <amacleod@redhat.com> | |
45401 | ||
45402 | PR tree-optimization/109417 | |
45403 | * gimple-range-gori.cc (range_def_chain::register_dependency): | |
45404 | Save the ssa version number, not the pointer. | |
45405 | (gori_compute::may_recompute_p): No need to check if a dependency | |
45406 | is in the free list. | |
45407 | * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2 | |
45408 | fields to be unsigned int instead of trees. | |
45409 | (ange_def_chain::depend1): Adjust. | |
45410 | (ange_def_chain::depend2): Adjust. | |
45411 | * gimple-range.h: Include "ssa.h" to inline ssa_name(). | |
45412 | ||
45413 | 2023-04-26 David Edelsohn <dje.gcc@gmail.com> | |
45414 | ||
45415 | * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER. | |
45416 | * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER. | |
45417 | (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8. | |
45418 | ||
45419 | 2023-04-26 Patrick O'Neill <patrick@rivosinc.com> | |
45420 | ||
45421 | PR target/104338 | |
45422 | * config/riscv/riscv-protos.h: Add helper function stubs. | |
45423 | * config/riscv/riscv.cc: Add helper functions for subword masking. | |
45424 | * config/riscv/riscv.opt: Add command-line flags -minline-atomics and | |
45425 | -mno-inline-atomics. | |
45426 | * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op, | |
45427 | fetch_and_nand, CAS, and exchange ops. | |
45428 | * doc/invoke.texi: Add blurb regarding new command-line flags | |
45429 | -minline-atomics and -mno-inline-atomics. | |
45430 | ||
45431 | 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45432 | ||
45433 | * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le): | |
45434 | Reimplement using standard RTL codes instead of unspec. | |
45435 | (aarch64_rshrn2<mode>_insn_be): Likewise. | |
45436 | (aarch64_rshrn2<mode>): Adjust for the above. | |
45437 | * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete. | |
45438 | ||
45439 | 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45440 | ||
45441 | * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement | |
45442 | with standard RTL codes instead of an UNSPEC. | |
45443 | (aarch64_rshrn<mode>_insn_be): Likewise. | |
45444 | (aarch64_rshrn<mode>): Adjust for the above. | |
45445 | * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define. | |
45446 | ||
45447 | 2023-04-26 Pan Li <pan2.li@intel.com> | |
45448 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
45449 | ||
45450 | * config/riscv/riscv.cc (riscv_classify_address): Allow | |
45451 | const0_rtx for the RVV load/store. | |
45452 | ||
45453 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45454 | ||
45455 | * range-op.cc (range_op_cast_tests): Remove legacy support. | |
45456 | * value-range-storage.h (vrange_allocator::alloc_irange): Same. | |
45457 | * value-range.cc (irange::operator=): Same. | |
45458 | (get_legacy_range): Same. | |
45459 | (irange::copy_legacy_to_multi_range): Delete. | |
45460 | (irange::copy_to_legacy): Delete. | |
45461 | (irange::irange_set_anti_range): Delete. | |
45462 | (irange::set): Remove legacy support. | |
45463 | (irange::verify_range): Same. | |
45464 | (irange::legacy_lower_bound): Delete. | |
45465 | (irange::legacy_upper_bound): Delete. | |
45466 | (irange::legacy_equal_p): Delete. | |
45467 | (irange::operator==): Remove legacy support. | |
45468 | (irange::singleton_p): Same. | |
45469 | (irange::value_inside_range): Same. | |
45470 | (irange::contains_p): Same. | |
45471 | (intersect_ranges): Delete. | |
45472 | (irange::legacy_intersect): Delete. | |
45473 | (union_ranges): Delete. | |
45474 | (irange::legacy_union): Delete. | |
45475 | (irange::legacy_verbose_union_): Delete. | |
45476 | (irange::legacy_verbose_intersect): Delete. | |
45477 | (irange::irange_union): Remove legacy support. | |
45478 | (irange::irange_intersect): Same. | |
45479 | (irange::intersect): Same. | |
45480 | (irange::invert): Same. | |
45481 | (ranges_from_anti_range): Delete. | |
45482 | (gt_pch_nx): Adjust for legacy removal. | |
45483 | (gt_ggc_mx): Same. | |
45484 | (range_tests_legacy): Delete. | |
45485 | (range_tests_misc): Adjust for legacy removal. | |
45486 | (range_tests): Same. | |
45487 | * value-range.h (class irange): Same. | |
45488 | (irange::legacy_mode_p): Delete. | |
45489 | (ranges_from_anti_range): Delete. | |
45490 | (irange::nonzero_p): Adjust for legacy removal. | |
45491 | (irange::lower_bound): Same. | |
45492 | (irange::upper_bound): Same. | |
45493 | (irange::union_): Same. | |
45494 | (irange::intersect): Same. | |
45495 | (irange::set_nonzero): Same. | |
45496 | (irange::set_zero): Same. | |
45497 | * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same. | |
45498 | ||
45499 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45500 | ||
45501 | * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use | |
45502 | of range_has_numeric_bounds_p with irange API. | |
45503 | (range_has_numeric_bounds_p): Delete. | |
45504 | * value-range.h (range_has_numeric_bounds_p): Delete. | |
45505 | ||
45506 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45507 | ||
45508 | * tree-data-ref.cc (compute_distributive_range): Replace uses of | |
45509 | range_int_cst_p with irange API. | |
45510 | * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same. | |
45511 | * tree-vrp.h (range_int_cst_p): Delete. | |
45512 | * vr-values.cc (check_for_binary_op_overflow): Replace usees of | |
45513 | range_int_cst_p with irange API. | |
45514 | (vr_set_zero_nonzero_bits): Same. | |
45515 | (range_fits_type_p): Same. | |
45516 | (simplify_using_ranges::simplify_casted_cond): Same. | |
45517 | * tree-vrp.cc (range_int_cst_p): Remove. | |
45518 | ||
45519 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45520 | ||
45521 | * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints. | |
45522 | ||
45523 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45524 | ||
45525 | * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange | |
45526 | API uses to new API. | |
45527 | * gimple-predicate-analysis.cc (find_var_cmp_const): Same. | |
45528 | * internal-fn.cc (get_min_precision): Same. | |
45529 | * match.pd: Same. | |
45530 | * tree-affine.cc (expr_to_aff_combination): Same. | |
45531 | * tree-data-ref.cc (dr_step_indicator): Same. | |
45532 | * tree-dfa.cc (get_ref_base_and_extent): Same. | |
45533 | * tree-scalar-evolution.cc (iv_can_overflow_p): Same. | |
45534 | * tree-ssa-phiopt.cc (two_value_replacement): Same. | |
45535 | * tree-ssa-pre.cc (insert_into_preds_of_block): Same. | |
45536 | * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same. | |
45537 | * tree-ssa-strlen.cc (compare_nonzero_chars): Same. | |
45538 | * tree-switch-conversion.cc (bit_test_cluster::emit): Same. | |
45539 | * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same. | |
45540 | * tree.cc (get_range_pos_neg): Same. | |
45541 | ||
45542 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45543 | ||
45544 | * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use | |
45545 | vrange::dump instead of ad-hoc dumper. | |
45546 | * tree-ssa-strlen.cc (dump_strlen_info): Same. | |
45547 | * value-range-pretty-print.cc (visit): Pass TDF_NOUID to | |
45548 | dump_generic_node. | |
45549 | ||
45550 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45551 | ||
45552 | * range-op.cc (operator_cast::op1_range): Use | |
45553 | create_possibly_reversed_range. | |
45554 | (operator_bitwise_and::simple_op1_range_solver): Same. | |
45555 | * value-range.cc (swap_out_of_order_endpoints): Delete. | |
45556 | (irange::set): Remove call to swap_out_of_order_endpoints. | |
45557 | ||
45558 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45559 | ||
45560 | * builtins.cc (determine_block_size): Convert use of legacy API to | |
45561 | get_legacy_range. | |
45562 | * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same. | |
45563 | (array_bounds_checker::check_array_ref): Same. | |
45564 | * gimple-ssa-warn-restrict.cc | |
45565 | (builtin_memref::extend_offset_range): Same. | |
45566 | * ipa-cp.cc (ipcp_store_vr_results): Same. | |
45567 | * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same. | |
45568 | * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same. | |
45569 | (ipa_write_jump_function): Same. | |
45570 | * pointer-query.cc (get_size_range): Same. | |
45571 | * tree-data-ref.cc (split_constant_offset): Same. | |
45572 | * tree-ssa-strlen.cc (get_range): Same. | |
45573 | (maybe_diag_stxncpy_trunc): Same. | |
45574 | (strlen_pass::get_len_or_size): Same. | |
45575 | (strlen_pass::count_nonzero_bytes_addr): Same. | |
45576 | * tree-vect-patterns.cc (vect_get_range_info): Same. | |
45577 | * value-range.cc (irange::maybe_anti_range): Remove. | |
45578 | (get_legacy_range): New. | |
45579 | (irange::copy_to_legacy): Use get_legacy_range. | |
45580 | (ranges_from_anti_range): Same. | |
45581 | * value-range.h (class irange): Remove maybe_anti_range. | |
45582 | (get_legacy_range): New. | |
45583 | * vr-values.cc (check_for_binary_op_overflow): Convert use of | |
45584 | legacy API to get_legacy_range. | |
45585 | (compare_ranges): Same. | |
45586 | (compare_range_with_value): Same. | |
45587 | (bounds_of_var_in_loop): Same. | |
45588 | (find_case_label_ranges): Same. | |
45589 | (simplify_using_ranges::simplify_switch_using_ranges): Same. | |
45590 | ||
45591 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45592 | ||
45593 | * value-range-pretty-print.cc (vrange_printer::visit): Remove | |
45594 | constant_p use. | |
45595 | * value-range.cc (irange::constant_p): Remove. | |
45596 | (irange::get_nonzero_bits_from_range): Remove constant_p use. | |
45597 | * value-range.h (class irange): Remove constant_p. | |
45598 | (irange::num_pairs): Remove constant_p use. | |
45599 | ||
45600 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45601 | ||
45602 | * value-range.cc (irange::copy_legacy_to_multi_range): Remove | |
45603 | symbolics support. | |
45604 | (irange::set): Same. | |
45605 | (irange::legacy_lower_bound): Same. | |
45606 | (irange::legacy_upper_bound): Same. | |
45607 | (irange::contains_p): Same. | |
45608 | (range_tests_legacy): Same. | |
45609 | (irange::normalize_addresses): Remove. | |
45610 | (irange::normalize_symbolics): Remove. | |
45611 | (irange::symbolic_p): Remove. | |
45612 | * value-range.h (class irange): Remove symbolic_p, | |
45613 | normalize_symbolics, and normalize_addresses. | |
45614 | * vr-values.cc (simplify_using_ranges::two_valued_val_range_p): | |
45615 | Remove symbolics support. | |
45616 | ||
45617 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45618 | ||
45619 | * value-range.cc (irange::may_contain_p): Remove. | |
45620 | * value-range.h (range_includes_zero_p): Rewrite may_contain_p | |
45621 | usage with contains_p. | |
45622 | * vr-values.cc (compare_range_with_value): Same. | |
45623 | ||
45624 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45625 | ||
45626 | * tree-vrp.cc (supported_types_p): Remove. | |
45627 | (defined_ranges_p): Remove. | |
45628 | (range_fold_binary_expr): Remove. | |
45629 | (range_fold_unary_expr): Remove. | |
45630 | * tree-vrp.h (range_fold_unary_expr): Remove. | |
45631 | (range_fold_binary_expr): Remove. | |
45632 | ||
45633 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45634 | ||
45635 | * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API. | |
45636 | (ipa_value_range_from_jfunc): Same. | |
45637 | (propagate_vr_across_jump_function): Same. | |
45638 | * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same. | |
45639 | * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same. | |
45640 | * vr-values.cc (bounds_of_var_in_loop): Same. | |
45641 | ||
45642 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45643 | ||
45644 | * gimple-array-bounds.cc (array_bounds_checker::get_value_range): | |
45645 | Add irange argument. | |
45646 | (check_out_of_bounds_and_warn): Remove check for vr. | |
45647 | (array_bounds_checker::check_array_ref): Remove pointer qualifier | |
45648 | for vr and adjust accordingly. | |
45649 | * gimple-array-bounds.h (get_value_range): Add irange argument. | |
45650 | * value-query.cc (class equiv_allocator): Delete. | |
45651 | (range_query::get_value_range): Delete. | |
45652 | (range_query::range_query): Remove allocator access. | |
45653 | (range_query::~range_query): Same. | |
45654 | * value-query.h (get_value_range): Delete. | |
45655 | * vr-values.cc | |
45656 | (simplify_using_ranges::op_with_boolean_value_range_p): Remove | |
45657 | call to get_value_range. | |
45658 | (check_for_binary_op_overflow): Same. | |
45659 | (simplify_using_ranges::legacy_fold_cond_overflow): Same. | |
45660 | (simplify_using_ranges::simplify_abs_using_ranges): Same. | |
45661 | (simplify_using_ranges::simplify_cond_using_ranges_1): Same. | |
45662 | (simplify_using_ranges::simplify_casted_cond): Same. | |
45663 | (simplify_using_ranges::simplify_switch_using_ranges): Same. | |
45664 | (simplify_using_ranges::two_valued_val_range_p): Same. | |
45665 | ||
45666 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45667 | ||
45668 | * vr-values.cc | |
45669 | (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops): | |
45670 | Rename to... | |
45671 | (simplify_using_ranges::legacy_fold_cond_overflow): ...this. | |
45672 | (simplify_using_ranges::vrp_visit_cond_stmt): Rename to... | |
45673 | (simplify_using_ranges::legacy_fold_cond): ...this. | |
45674 | (simplify_using_ranges::fold_cond): Rename | |
45675 | vrp_evaluate_conditional_warnv_with_ops to | |
45676 | legacy_fold_cond_overflow. | |
45677 | * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and | |
45678 | vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and | |
45679 | legacy_fold_cond_overflow respectively. | |
45680 | ||
45681 | 2023-04-26 Aldy Hernandez <aldyh@redhat.com> | |
45682 | ||
45683 | * vr-values.cc (get_vr_for_comparison): Remove. | |
45684 | (compare_name_with_value): Same. | |
45685 | (vrp_evaluate_conditional_warnv_with_ops): Remove calls to | |
45686 | compare_name_with_value. | |
45687 | * vr-values.h: Remove compare_name_with_value. | |
45688 | Remove get_vr_for_comparison. | |
45689 | ||
45690 | 2023-04-26 Roger Sayle <roger@nextmovesoftware.com> | |
45691 | ||
45692 | * config/stormy16/stormy16.md (bswaphi2): New define_insn. | |
45693 | (bswapsi2): New define_insn. | |
45694 | (swaphi): New define_insn to exchange two registers (swpw). | |
45695 | (define_peephole2): Recognize exchange of registers as swaphi. | |
45696 | ||
45697 | 2023-04-26 Richard Biener <rguenther@suse.de> | |
45698 | ||
45699 | * gimple-range-path.cc (path_range_query::compute_outgoing_relations): | |
45700 | Avoid last_stmt. | |
45701 | * ipa-pure-const.cc (pass_nothrow::execute): Likewise. | |
45702 | * predict.cc (apply_return_prediction): Likewise. | |
45703 | * sese.cc (set_ifsese_condition): Likewise. Simplify. | |
45704 | * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt. | |
45705 | (make_edges_bb): Likewise. | |
45706 | (make_cond_expr_edges): Likewise. | |
45707 | (end_recording_case_labels): Likewise. | |
45708 | (make_gimple_asm_edges): Likewise. | |
45709 | (cleanup_dead_labels): Likewise. | |
45710 | (group_case_labels): Likewise. | |
45711 | (gimple_can_merge_blocks_p): Likewise. | |
45712 | (gimple_merge_blocks): Likewise. | |
45713 | (find_taken_edge): Likewise. Also handle empty fallthru blocks. | |
45714 | (gimple_duplicate_sese_tail): Avoid last_stmt. | |
45715 | (find_loop_dist_alias): Likewise. | |
45716 | (gimple_block_ends_with_condjump_p): Likewise. | |
45717 | (gimple_purge_dead_eh_edges): Likewise. | |
45718 | (gimple_purge_dead_abnormal_call_edges): Likewise. | |
45719 | (pass_warn_function_return::execute): Likewise. | |
45720 | (execute_fixup_cfg): Likewise. | |
45721 | * tree-eh.cc (redirect_eh_edge_1): Likewise. | |
45722 | (pass_lower_resx::execute): Likewise. | |
45723 | (pass_lower_eh_dispatch::execute): Likewise. | |
45724 | (cleanup_empty_eh): Likewise. | |
45725 | * tree-if-conv.cc (if_convertible_bb_p): Likewise. | |
45726 | (predicate_bbs): Likewise. | |
45727 | (ifcvt_split_critical_edges): Likewise. | |
45728 | * tree-loop-distribution.cc (create_edge_for_control_dependence): | |
45729 | Likewise. | |
45730 | (loop_distribution::transform_reduction_loop): Likewise. | |
45731 | * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise. | |
45732 | (try_transform_to_exit_first_loop_alt): Likewise. | |
45733 | (transform_to_exit_first_loop): Likewise. | |
45734 | (create_parallel_loop): Likewise. | |
45735 | * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise. | |
45736 | * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise. | |
45737 | (eliminate_unnecessary_stmts): Likewise. | |
45738 | * tree-ssa-dom.cc | |
45739 | (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges): | |
45740 | Likewise. | |
45741 | * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise. | |
45742 | (pass_tree_ifcombine::execute): Likewise. | |
45743 | * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise. | |
45744 | (should_duplicate_loop_header_p): Likewise. | |
45745 | * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise. | |
45746 | (tree_estimate_loop_size): Likewise. | |
45747 | (try_unroll_loop_completely): Likewise. | |
45748 | * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise. | |
45749 | * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise. | |
45750 | (canonicalize_loop_ivs): Likewise. | |
45751 | * tree-ssa-loop-niter.cc (determine_value_range): Likewise. | |
45752 | (bound_difference): Likewise. | |
45753 | (number_of_iterations_popcount): Likewise. | |
45754 | (number_of_iterations_cltz): Likewise. | |
45755 | (number_of_iterations_cltz_complement): Likewise. | |
45756 | (simplify_using_initial_conditions): Likewise. | |
45757 | (number_of_iterations_exit_assumptions): Likewise. | |
45758 | (loop_niter_by_eval): Likewise. | |
45759 | (estimate_numbers_of_iterations): Likewise. | |
45760 | ||
45761 | 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
45762 | ||
45763 | * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint. | |
45764 | ||
45765 | 2023-04-26 Kewen Lin <linkw@linux.ibm.com> | |
45766 | ||
45767 | PR target/108758 | |
45768 | * config/rs6000/rs6000-builtins.def | |
45769 | (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt | |
45770 | __builtin_vsx_scalar_cmp_exp_qp_lt, | |
45771 | __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw | |
45772 | to power9-vector. | |
45773 | ||
45774 | 2023-04-26 Kewen Lin <linkw@linux.ibm.com> | |
45775 | ||
45776 | PR target/109069 | |
45777 | * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate | |
45778 | easy_vector_constant with const_vector_each_byte_same, add | |
45779 | handlings in preparation for !easy_vector_constant, and update | |
45780 | VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P. | |
45781 | * config/rs6000/predicates.md (const_vector_each_byte_same): New | |
45782 | predicate. | |
45783 | ||
45784 | 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
45785 | ||
45786 | * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern. | |
45787 | (*pred_ltge<mode>_merge_tie_mask): Ditto. | |
45788 | (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto. | |
45789 | (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto. | |
45790 | (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto. | |
45791 | (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto. | |
45792 | (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto. | |
45793 | ||
45794 | 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
45795 | ||
45796 | * config/riscv/vector.md: Fix redundant vmv1r.v. | |
45797 | ||
45798 | 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
45799 | ||
45800 | * config/riscv/vector.md: Fix RA constraint. | |
45801 | ||
45802 | 2023-04-26 Pan Li <pan2.li@intel.com> | |
45803 | ||
45804 | PR target/109272 | |
45805 | * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts | |
45806 | check for vn_reference equal. | |
45807 | ||
45808 | 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
45809 | ||
45810 | * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for | |
45811 | auto-vectorization preference. | |
45812 | (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV | |
45813 | auto-vectorization. | |
45814 | * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization. | |
45815 | ||
45816 | 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com> | |
45817 | ||
45818 | * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits | |
45819 | and bclridisi_nottwobits patterns. | |
45820 | * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust | |
45821 | predicate to avoid splitting arith constants. | |
45822 | (const_nottwobits_not_arith_operand): New predicate. | |
45823 | ||
45824 | 2023-04-25 Hans-Peter Nilsson <hp@axis.com> | |
45825 | ||
45826 | * recog.cc (peep2_attempt, peep2_update_life): Correct | |
45827 | head-comment description of parameter match_len. | |
45828 | ||
45829 | 2023-04-25 Vineet Gupta <vineetg@rivosinc.com> | |
45830 | ||
45831 | * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg. | |
45832 | riscv_split_symbol() drop in_splitter arg. | |
45833 | * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg. | |
45834 | riscv_split_symbol() drop in_splitter arg. | |
45835 | riscv_force_temporary() drop in_splitter arg. | |
45836 | * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg. | |
45837 | riscv_split_symbol() drop in_splitter arg. | |
45838 | ||
45839 | 2023-04-25 Eric Botcazou <ebotcazou@adacore.com> | |
45840 | ||
45841 | * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create | |
45842 | superfluous debug temporaries for single GIMPLE assignments. | |
45843 | ||
45844 | 2023-04-25 Richard Biener <rguenther@suse.de> | |
45845 | ||
45846 | PR tree-optimization/109609 | |
45847 | * attr-fnspec.h (arg_max_access_size_given_by_arg_p): | |
45848 | Clarify semantics. | |
45849 | * tree-ssa-alias.cc (check_fnspec): Correctly interpret | |
45850 | the size given by arg_max_access_size_given_by_arg_p as | |
45851 | maximum, not exact, size. | |
45852 | ||
45853 | 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45854 | ||
45855 | PR target/99195 | |
45856 | * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to... | |
45857 | (orn<mode>3<vczle><vczbe>): ... This. | |
45858 | (bic<mode>3): Rename to... | |
45859 | (bic<mode>3<vczle><vczbe>): ... This. | |
45860 | (<su><maxmin><mode>3): Rename to... | |
45861 | (<su><maxmin><mode>3<vczle><vczbe>): ... This. | |
45862 | ||
45863 | 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45864 | ||
45865 | * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand. | |
45866 | * config/aarch64/iterators.md (VQDIV): New mode iterator. | |
45867 | (vnx2di): New mode attribute. | |
45868 | ||
45869 | 2023-04-25 Richard Biener <rguenther@suse.de> | |
45870 | ||
45871 | PR rtl-optimization/109585 | |
45872 | * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo. | |
45873 | ||
45874 | 2023-04-25 Jakub Jelinek <jakub@redhat.com> | |
45875 | ||
45876 | PR target/109566 | |
45877 | * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For | |
45878 | !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb) | |
45879 | is larger than signed int maximum. | |
45880 | ||
45881 | 2023-04-25 Martin Liska <mliska@suse.cz> | |
45882 | ||
45883 | * doc/gcov.texi: Document the new "calls" field and document | |
45884 | the API bump. Mention also "block_ids" for lines. | |
45885 | * gcov.cc (output_intermediate_json_line): Output info about | |
45886 | calls and extend branches as well. | |
45887 | (generate_results): Bump version to 2. | |
45888 | (output_line_details): Use block ID instead of a non-sensual | |
45889 | index. | |
45890 | ||
45891 | 2023-04-25 Roger Sayle <roger@nextmovesoftware.com> | |
45892 | ||
45893 | * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix | |
45894 | length attribute for the first (memory operand) alternative. | |
45895 | ||
45896 | 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com> | |
45897 | ||
45898 | * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New. | |
45899 | * config/aarch64/constraints.md: Make "Umn" relaxed memory | |
45900 | constraint. | |
45901 | * config/aarch64/iterators.md(ldpstp_vel_sz): New. | |
45902 | ||
45903 | 2023-04-25 Aldy Hernandez <aldyh@redhat.com> | |
45904 | ||
45905 | * value-range.cc (frange::set): Adjust constructor. | |
45906 | * value-range.h (nan_state::nan_state): Replace default | |
45907 | constructor with one taking an argument. | |
45908 | ||
45909 | 2023-04-25 Aldy Hernandez <aldyh@redhat.com> | |
45910 | ||
45911 | * ipa-cp.cc (ipa_range_contains_p): New. | |
45912 | (decide_whether_version_node): Use it. | |
45913 | ||
45914 | 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
45915 | ||
45916 | * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to | |
45917 | simplify two successive VEC_PERM_EXPRs with same VLA mask, | |
45918 | where mask chooses elements in reverse order. | |
45919 | ||
45920 | 2023-04-24 Andrew Pinski <apinski@marvell.com> | |
45921 | ||
45922 | * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments | |
45923 | and support diamond shaped basic block form. | |
45924 | (tree_ssa_phiopt_worker): Update call to match_simplify_replacement | |
45925 | ||
45926 | 2023-04-24 Andrew Pinski <apinski@marvell.com> | |
45927 | ||
45928 | * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p): | |
45929 | Instead of calling last_and_only_stmt, look for the last statement | |
45930 | manually. | |
45931 | ||
45932 | 2023-04-24 Andrew Pinski <apinski@marvell.com> | |
45933 | ||
45934 | * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p): | |
45935 | New function. | |
45936 | (match_simplify_replacement): Call | |
45937 | empty_bb_or_one_feeding_into_p instead of doing it inline. | |
45938 | ||
45939 | 2023-04-24 Andrew Pinski <apinski@marvell.com> | |
45940 | ||
45941 | PR tree-optimization/68894 | |
45942 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the | |
45943 | continue for the do_hoist_loads diamond case. | |
45944 | ||
45945 | 2023-04-24 Andrew Pinski <apinski@marvell.com> | |
45946 | ||
45947 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange | |
45948 | code for better code readability. | |
45949 | ||
45950 | 2023-04-24 Andrew Pinski <apinski@marvell.com> | |
45951 | ||
45952 | PR tree-optimization/109604 | |
45953 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the | |
45954 | diamond form check from ... | |
45955 | (minmax_replacement): Here. | |
45956 | ||
45957 | 2023-04-24 Patrick Palka <ppalka@redhat.com> | |
45958 | ||
45959 | * tree.cc (strip_array_types): Don't define here. | |
45960 | (is_typedef_decl): Don't define here. | |
45961 | (typedef_variant_p): Don't define here. | |
45962 | * tree.h (strip_array_types): Define here. | |
45963 | (is_typedef_decl): Define here. | |
45964 | (typedef_variant_p): Define here. | |
45965 | ||
45966 | 2023-04-24 Frederik Harwath <frederik@codesourcery.com> | |
45967 | ||
45968 | * doc/generic.texi (OpenMP): Add != to allowed | |
45969 | conditions and state that vars can be unsigned. | |
45970 | * tree.def (OMP_FOR): Likewise. | |
45971 | ||
45972 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45973 | ||
45974 | * config/aarch64/aarch64-simd.md (mulv2di3): New expander. | |
45975 | ||
45976 | 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> | |
45977 | ||
45978 | * doc/install.texi: Consistently use Solaris rather than Solaris 2. | |
45979 | Remove explicit Solaris 11 references. | |
45980 | Markup fixes. | |
45981 | (Options specification, --with-gnu-as): as and gas always differ | |
45982 | on Solaris. | |
45983 | Remove /usr/ccs/bin reference. | |
45984 | (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove. | |
45985 | (i?86-*-solaris2*): Merge assembler, linker recommendations ... | |
45986 | (*-*-solaris2*): ... here. | |
45987 | Update bundled GCC versions. | |
45988 | Don't refer to pre-built binaries. | |
45989 | Remove /bin/sh warning. | |
45990 | Update assembler, linker recommendations. | |
45991 | Document GNAT bootstrap compiler. | |
45992 | (sparc-sun-solaris2*): Remove non-UltraSPARC reference. | |
45993 | (sparc64-*-solaris2*): Move content... | |
45994 | (sparcv9-*-solaris2*): ...here. | |
45995 | Add GDC for 64-bit bootstrap compilers. | |
45996 | ||
45997 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
45998 | ||
45999 | PR target/109406 | |
46000 | * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL | |
46001 | case. | |
46002 | * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New | |
46003 | pattern. | |
46004 | ||
46005 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46006 | ||
46007 | * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to... | |
46008 | (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec. | |
46009 | (aarch64_<su>abal2<mode>): New define_expand. | |
46010 | * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function. | |
46011 | (aarch64_rtx_costs): Handle ABD rtxes. | |
46012 | * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete. | |
46013 | * config/aarch64/iterators.md (ABAL2): Delete. | |
46014 | (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2. | |
46015 | ||
46016 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46017 | ||
46018 | * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to... | |
46019 | (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec. | |
46020 | (<sur>sadv16qi): Rename to... | |
46021 | (<su>sadv16qi): ... This. Adjust for the above. | |
46022 | * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to... | |
46023 | (<su>sad<vsi2qi>): ... This. Adjust for the above. | |
46024 | * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete. | |
46025 | * config/aarch64/iterators.md (ABAL): Delete. | |
46026 | (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL. | |
46027 | ||
46028 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46029 | ||
46030 | * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to... | |
46031 | (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec. | |
46032 | (aarch64_<su>abdl2<mode>): New define_expand. | |
46033 | * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete. | |
46034 | * config/aarch64/iterators.md (ABDL2): Delete. | |
46035 | (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2. | |
46036 | ||
46037 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46038 | ||
46039 | * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to... | |
46040 | (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of | |
46041 | unspec. | |
46042 | * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete. | |
46043 | * config/aarch64/iterators.md (ABDL): Delete. | |
46044 | (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL. | |
46045 | ||
46046 | 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46047 | ||
46048 | * config/aarch64/aarch64-simd.md | |
46049 | (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern. | |
46050 | ||
46051 | 2023-04-24 Richard Biener <rguenther@suse.de> | |
46052 | ||
46053 | * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid | |
46054 | last_stmt. | |
46055 | * graphite-scop-detection.cc (single_pred_cond_non_loop_exit): | |
46056 | Likewise. | |
46057 | * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise. | |
46058 | (set_switch_stmt_execution_predicate): Likewise. | |
46059 | (phi_result_unknown_predicate): Likewise. | |
46060 | * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise. | |
46061 | (ipa_analyze_indirect_call_uses): Likewise. | |
46062 | * predict.cc (predict_iv_comparison): Likewise. | |
46063 | (predict_extra_loop_exits): Likewise. | |
46064 | (predict_loops): Likewise. | |
46065 | (tree_predict_by_opcode): Likewise. | |
46066 | * gimple-predicate-analysis.cc (predicate::init_from_control_deps): | |
46067 | Likewise. | |
46068 | * gimple-pretty-print.cc (dump_implicit_edges): Likewise. | |
46069 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise. | |
46070 | (replace_phi_edge_with_variable): Likewise. | |
46071 | (two_value_replacement): Likewise. | |
46072 | (value_replacement): Likewise. | |
46073 | (minmax_replacement): Likewise. | |
46074 | (spaceship_replacement): Likewise. | |
46075 | (cond_removal_in_builtin_zero_pattern): Likewise. | |
46076 | * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise. | |
46077 | * tree-ssa-sccvn.cc (vn_phi_eq): Likewise. | |
46078 | (vn_phi_lookup): Likewise. | |
46079 | (vn_phi_insert): Likewise. | |
46080 | * tree-ssa-structalias.cc (compute_points_to_sets): Likewise. | |
46081 | * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block): | |
46082 | Likewise. | |
46083 | (back_threader_profitability::possibly_profitable_path_p): | |
46084 | Likewise. | |
46085 | * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges): | |
46086 | Likewise. | |
46087 | * tree-switch-conversion.cc (pass_convert_switch::execute): | |
46088 | Likewise. | |
46089 | (pass_lower_switch<O0>::execute): Likewise. | |
46090 | * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise. | |
46091 | * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise. | |
46092 | * tree-vect-slp.cc (vect_slp_function): Likewise. | |
46093 | * tree-vect-stmts.cc (cfun_returns): Likewise. | |
46094 | * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise. | |
46095 | (vect_loop_dist_alias_call): Likewise. | |
46096 | ||
46097 | 2023-04-24 Richard Biener <rguenther@suse.de> | |
46098 | ||
46099 | * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P. | |
46100 | ||
46101 | 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46102 | ||
46103 | * config/riscv/riscv-vsetvl.cc | |
46104 | (vector_infos_manager::all_avail_in_compatible_p): New function. | |
46105 | (pass_vsetvl::refine_vsetvls): Optimize vsetvls. | |
46106 | * config/riscv/riscv-vsetvl.h: New function. | |
46107 | ||
46108 | 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46109 | ||
46110 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function | |
46111 | comment for cleanup_insns. | |
46112 | ||
46113 | 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46114 | ||
46115 | * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern. | |
46116 | * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions | |
46117 | with the fault first load property. | |
46118 | ||
46119 | 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46120 | ||
46121 | * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to... | |
46122 | (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This. | |
46123 | ||
46124 | 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46125 | ||
46126 | PR target/99195 | |
46127 | * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to... | |
46128 | (aarch64_addp<mode><vczle><vczbe>): ... This. | |
46129 | ||
46130 | 2023-04-23 Roger Sayle <roger@nextmovesoftware.com> | |
46131 | ||
46132 | * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to | |
46133 | provide reasonable values for common arithmetic operations and | |
46134 | immediate operands (in several machine modes). | |
46135 | ||
46136 | 2023-04-23 Roger Sayle <roger@nextmovesoftware.com> | |
46137 | ||
46138 | * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h | |
46139 | format specifier to output high_part register name of SImode reg. | |
46140 | * config/stormy16/stormy16.md (extendhisi2): New define_insn. | |
46141 | (zero_extendqihi2): Fix lengths, consistent formatting and add | |
46142 | "and Rx,#255" alternative, for documentation purposes. | |
46143 | (zero_extendhisi2): New define_insn. | |
46144 | ||
46145 | 2023-04-23 Roger Sayle <roger@nextmovesoftware.com> | |
46146 | ||
46147 | * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement | |
46148 | SImode shifts by two by performing a single bit SImode shift twice. | |
46149 | ||
46150 | 2023-04-23 Aldy Hernandez <aldyh@redhat.com> | |
46151 | ||
46152 | PR tree-optimization/109593 | |
46153 | * value-range.cc (frange::operator==): Handle NANs. | |
46154 | ||
46155 | 2023-04-23 liuhongt <hongtao.liu@intel.com> | |
46156 | ||
46157 | PR rtl-optimization/108707 | |
46158 | * ira-costs.cc (scan_one_insn): Use NO_REGS instead of | |
46159 | GENERAL_REGS when preferred reg_class is not known. | |
46160 | ||
46161 | 2023-04-22 Andrew Pinski <apinski@marvell.com> | |
46162 | ||
46163 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): | |
46164 | Change the code around slightly to move diamond | |
46165 | handling for do_store_elim/do_hoist_loads out of | |
46166 | the big if/else. | |
46167 | ||
46168 | 2023-04-22 Andrew Pinski <apinski@marvell.com> | |
46169 | ||
46170 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): | |
46171 | Remove check on empty_block_p. | |
46172 | ||
46173 | 2023-04-22 Jakub Jelinek <jakub@redhat.com> | |
46174 | ||
46175 | PR bootstrap/109589 | |
46176 | * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9. | |
46177 | * realmpfr.h (class auto_mpfr): Likewise. | |
46178 | ||
46179 | 2023-04-22 Jakub Jelinek <jakub@redhat.com> | |
46180 | ||
46181 | PR tree-optimization/109583 | |
46182 | * match.pd (fneg/fadd simplify): Don't call related_vector_mode | |
46183 | if vec_mode is not VECTOR_MODE_P. | |
46184 | ||
46185 | 2023-04-22 Jan Hubicka <hubicka@ucw.cz> | |
46186 | Ondrej Kubanek <kubanek0ondrej@gmail.com> | |
46187 | ||
46188 | * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare. | |
46189 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of | |
46190 | loop profile and bounds after header duplication. | |
46191 | * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling): | |
46192 | Break out from try_peel_loop; fix handling of 0 iterations. | |
46193 | (try_peel_loop): Use adjust_loop_info_after_peeling. | |
46194 | ||
46195 | 2023-04-21 Andrew MacLeod <amacleod@redhat.com> | |
46196 | ||
46197 | PR tree-optimization/109546 | |
46198 | * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do | |
46199 | not fold conditions with ADDR_EXPR early. | |
46200 | ||
46201 | 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46202 | ||
46203 | * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete. | |
46204 | (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function | |
46205 | for umax. | |
46206 | (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes. | |
46207 | (*aarch64_<optab><mode>3_zero): Define. | |
46208 | (*aarch64_<optab><mode>3_cssc): Likewise. | |
46209 | * config/aarch64/iterators.md (maxminand): New code attribute. | |
46210 | ||
46211 | 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46212 | ||
46213 | PR target/108779 | |
46214 | * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define. | |
46215 | * config/aarch64/aarch64-protos.h (aarch64_output_load_tp): | |
46216 | Define prototype. | |
46217 | * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare. | |
46218 | (aarch64_override_options_internal): Handle the above. | |
46219 | (aarch64_output_load_tp): New function. | |
46220 | * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call | |
46221 | aarch64_output_load_tp. | |
46222 | * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum. | |
46223 | (mtp=): New option. | |
46224 | * doc/invoke.texi (AArch64 Options): Document -mtp=. | |
46225 | ||
46226 | 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46227 | ||
46228 | PR target/99195 | |
46229 | * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define. | |
46230 | (add_vec_concat_subst_be): Likewise. | |
46231 | (vczle): Likewise. | |
46232 | (vczbe): Likewise. | |
46233 | (add<mode>3): Rename to... | |
46234 | (add<mode>3<vczle><vczbe>): ... This. | |
46235 | (sub<mode>3): Rename to... | |
46236 | (sub<mode>3<vczle><vczbe>): ... This. | |
46237 | (mul<mode>3): Rename to... | |
46238 | (mul<mode>3<vczle><vczbe>): ... This. | |
46239 | (and<mode>3): Rename to... | |
46240 | (and<mode>3<vczle><vczbe>): ... This. | |
46241 | (ior<mode>3): Rename to... | |
46242 | (ior<mode>3<vczle><vczbe>): ... This. | |
46243 | (xor<mode>3): Rename to... | |
46244 | (xor<mode>3<vczle><vczbe>): ... This. | |
46245 | * config/aarch64/iterators.md (VDZ): Define. | |
46246 | ||
46247 | 2023-04-21 Patrick Palka <ppalka@redhat.com> | |
46248 | ||
46249 | * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp | |
46250 | and type_p. | |
46251 | ||
46252 | 2023-04-21 Jan Hubicka <jh@suse.cz> | |
46253 | ||
46254 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous | |
46255 | commit. | |
46256 | ||
46257 | 2023-04-21 Vineet Gupta <vineetg@rivosinc.com> | |
46258 | ||
46259 | * expmed.h (x_shift*_cost): convert to int [speed][mode][shift]. | |
46260 | (shift*_cost_ptr ()): Access x_shift*_cost array directly. | |
46261 | ||
46262 | 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
46263 | ||
46264 | * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use | |
46265 | force_reg instead of copy_to_mode_reg. | |
46266 | (aarch64_expand_vector_init): Likewise. | |
46267 | ||
46268 | 2023-04-21 Uroš Bizjak <ubizjak@gmail.com> | |
46269 | ||
46270 | * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove. | |
46271 | (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto. | |
46272 | (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto. | |
46273 | (FIRST_INDEX_REG, LAST_INDEX_REG): New defines. | |
46274 | (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros. | |
46275 | (INDEX_REG_P, INDEX_REGNO_P): Ditto. | |
46276 | (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates. | |
46277 | (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro. | |
46278 | (EG_OK_FOR_BASE_NONSTRICT_P): Ditto. | |
46279 | * config/i386/predicates.md (index_register_operand): | |
46280 | Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros. | |
46281 | * config/i386/i386.cc (ix86_legitimate_address_p): Use | |
46282 | REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P, | |
46283 | REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros. | |
46284 | ||
46285 | 2023-04-21 Jan Hubicka <hubicka@ucw.cz> | |
46286 | Ondrej Kubanek <kubanek0ondrej@gmail.com> | |
46287 | ||
46288 | * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and | |
46289 | latch. | |
46290 | ||
46291 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46292 | ||
46293 | * is-a.h (safe_is_a): New. | |
46294 | ||
46295 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46296 | ||
46297 | * gimple-iterator.h (gimple_stmt_iterator::operator*): Add. | |
46298 | (gphi_iterator::operator*): Likewise. | |
46299 | ||
46300 | 2023-04-21 Jan Hubicka <hubicka@ucw.cz> | |
46301 | Michal Jires <michal@jires.eu> | |
46302 | ||
46303 | * ipa-inline.cc (class inline_badness): New class. | |
46304 | (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead | |
46305 | of sreal. | |
46306 | (update_edge_key): Update. | |
46307 | (lookup_recursive_calls): Likewise. | |
46308 | (recursive_inlining): Likewise. | |
46309 | (add_new_edges_to_heap): Likewise. | |
46310 | (inline_small_functions): Likewise. | |
46311 | ||
46312 | 2023-04-21 Jan Hubicka <hubicka@ucw.cz> | |
46313 | ||
46314 | * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks. | |
46315 | ||
46316 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46317 | ||
46318 | PR tree-optimization/109573 | |
46319 | * tree-vect-loop.cc (vectorizable_live_operation): Allow | |
46320 | unhandled SSA copy as well. Demote assert to checking only. | |
46321 | ||
46322 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46323 | ||
46324 | * df-core.cc (df_analyze): Compute RPO on the reverse graph | |
46325 | for DF_BACKWARD problems. | |
46326 | (loop_post_order_compute): Rename to ... | |
46327 | (loop_rev_post_order_compute): ... this, compute a RPO. | |
46328 | (loop_inverted_post_order_compute): Rename to ... | |
46329 | (loop_inverted_rev_post_order_compute): ... this, compute a RPO. | |
46330 | (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD | |
46331 | problems, RPO on the inverted graph for DF_BACKWARD. | |
46332 | ||
46333 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46334 | ||
46335 | * cfganal.h (inverted_rev_post_order_compute): Rename | |
46336 | from ... | |
46337 | (inverted_post_order_compute): ... this. Add struct function | |
46338 | argument, change allocation to a C array. | |
46339 | * cfganal.cc (inverted_rev_post_order_compute): Likewise. | |
46340 | * lcm.cc (compute_antinout_edge): Adjust. | |
46341 | * lra-lives.cc (lra_create_live_ranges_1): Likewise. | |
46342 | * tree-ssa-dce.cc (remove_dead_stmt): Likewise. | |
46343 | * tree-ssa-pre.cc (compute_antic): Likewise. | |
46344 | ||
46345 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46346 | ||
46347 | * df.h (df_d::postorder_inverted): Change back to int *, | |
46348 | clarify comments. | |
46349 | * df-core.cc (rest_of_handle_df_finish): Adjust. | |
46350 | (df_analyze_1): Likewise. | |
46351 | (df_analyze): For DF_FORWARD problems use RPO on the forward | |
46352 | graph. Adjust. | |
46353 | (loop_inverted_post_order_compute): Adjust API. | |
46354 | (df_analyze_loop): Adjust. | |
46355 | (df_get_n_blocks): Likewise. | |
46356 | (df_get_postorder): Likewise. | |
46357 | ||
46358 | 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46359 | ||
46360 | PR target/108270 | |
46361 | * config/riscv/riscv-vsetvl.cc | |
46362 | (vector_infos_manager::all_empty_predecessor_p): New function. | |
46363 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
46364 | * config/riscv/riscv-vsetvl.h: Ditto. | |
46365 | ||
46366 | 2023-04-21 Robin Dapp <rdapp@ventanamicro.com> | |
46367 | ||
46368 | PR target/109582 | |
46369 | * config/riscv/generic.md: Change standard names to insn names. | |
46370 | ||
46371 | 2023-04-21 Richard Biener <rguenther@suse.de> | |
46372 | ||
46373 | * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph. | |
46374 | (compute_laterin): Use RPO. | |
46375 | (compute_available): Likewise. | |
46376 | ||
46377 | 2023-04-21 Peng Fan <fanpeng@loongson.cn> | |
46378 | ||
46379 | * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine. | |
46380 | ||
46381 | 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46382 | ||
46383 | PR target/109547 | |
46384 | * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function. | |
46385 | (vector_insn_info::skip_avl_compatible_p): Ditto. | |
46386 | (vector_insn_info::merge): Remove default value. | |
46387 | (pass_vsetvl::compute_local_backward_infos): Ditto. | |
46388 | (pass_vsetvl::cleanup_insns): Add local vsetvl elimination. | |
46389 | * config/riscv/riscv-vsetvl.h: Ditto. | |
46390 | ||
46391 | 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com> | |
46392 | ||
46393 | * doc/extend.texi (Common Function Attributes): Remove duplicate | |
46394 | word. | |
46395 | ||
46396 | 2023-04-20 Andrew MacLeod <amacleod@redhat.com> | |
46397 | ||
46398 | PR tree-optimization/109564 | |
46399 | * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore | |
46400 | UNDEFINED range names when deciding if all PHI arguments are the same, | |
46401 | ||
46402 | 2023-04-20 Jakub Jelinek <jakub@redhat.com> | |
46403 | ||
46404 | PR tree-optimization/109011 | |
46405 | * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use | |
46406 | .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to | |
46407 | .CTZ (X) = PREC - .POPCOUNT (X | -X). | |
46408 | ||
46409 | 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com> | |
46410 | ||
46411 | * lra-constraints.cc (match_reload): Exclude some hard regs for | |
46412 | multi-reg inout reload pseudos used in asm in different mode. | |
46413 | ||
46414 | 2023-04-20 Uros Bizjak <ubizjak@gmail.com> | |
46415 | ||
46416 | * config/arm/arm.cc (thumb1_legitimate_address_p): | |
46417 | Use VIRTUAL_REGISTER_P predicate. | |
46418 | (arm_eliminable_register): Ditto. | |
46419 | * config/avr/avr.md (push<mode>_1): Ditto. | |
46420 | * config/bfin/predicates.md (register_no_elim_operand): Ditto. | |
46421 | * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto. | |
46422 | * config/i386/predicates.md (register_no_elim_operand): Ditto. | |
46423 | * config/iq2000/predicates.md (call_insn_operand): Ditto. | |
46424 | * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto. | |
46425 | ||
46426 | 2023-04-20 Uros Bizjak <ubizjak@gmail.com> | |
46427 | ||
46428 | PR target/78952 | |
46429 | * config/i386/predicates.md (extract_operator): New predicate. | |
46430 | * config/i386/i386.md (any_extract): Remove code iterator. | |
46431 | (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate. | |
46432 | (*cmpqi_ext<mode>_1): Ditto. | |
46433 | (*cmpqi_ext<mode>_2): Ditto. | |
46434 | (*cmpqi_ext<mode>_3_mem_rex64): Ditto. | |
46435 | (*cmpqi_ext<mode>_3): Ditto. | |
46436 | (*cmpqi_ext<mode>_4): Ditto. | |
46437 | (*extzvqi_mem_rex64): Ditto. | |
46438 | (*extzvqi): Ditto. | |
46439 | (*insvqi_2): Ditto. | |
46440 | (*extendqi<SWI24:mode>_ext_1): Ditto. | |
46441 | (*addqi_ext<mode>_0): Ditto. | |
46442 | (*addqi_ext<mode>_1): Ditto. | |
46443 | (*addqi_ext<mode>_2): Ditto. | |
46444 | (*subqi_ext<mode>_0): Ditto. | |
46445 | (*subqi_ext<mode>_2): Ditto. | |
46446 | (*testqi_ext<mode>_1): Ditto. | |
46447 | (*testqi_ext<mode>_2): Ditto. | |
46448 | (*andqi_ext<mode>_0): Ditto. | |
46449 | (*andqi_ext<mode>_1): Ditto. | |
46450 | (*andqi_ext<mode>_1_cc): Ditto. | |
46451 | (*andqi_ext<mode>_2): Ditto. | |
46452 | (*<any_or:code>qi_ext<mode>_0): Ditto. | |
46453 | (*<any_or:code>qi_ext<mode>_1): Ditto. | |
46454 | (*<any_or:code>qi_ext<mode>_2): Ditto. | |
46455 | (*xorqi_ext<mode>_1_cc): Ditto. | |
46456 | (*negqi_ext<mode>_2): Ditto. | |
46457 | (*ashlqi_ext<mode>_2): Ditto. | |
46458 | (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto. | |
46459 | ||
46460 | 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com> | |
46461 | ||
46462 | PR target/108248 | |
46463 | * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use | |
46464 | <bitmanip_insn> as the type to allow for fine grained control of | |
46465 | scheduling these insns. | |
46466 | * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt, | |
46467 | min, max. | |
46468 | * config/riscv/riscv.md (type attribute): Add types for clz, ctz, | |
46469 | pcnt, signed and unsigned min/max. | |
46470 | ||
46471 | 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46472 | kito-cheng <kito.cheng@sifive.com> | |
46473 | ||
46474 | * config/riscv/riscv.h (enum reg_class): Fix RVV register order. | |
46475 | ||
46476 | 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
46477 | kito-cheng <kito.cheng@sifive.com> | |
46478 | ||
46479 | PR target/109535 | |
46480 | * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function. | |
46481 | (pass_vsetvl::cleanup_insns): Fix bug. | |
46482 | ||
46483 | 2023-04-20 Andrew Stubbs <ams@codesourcery.com> | |
46484 | ||
46485 | * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes. | |
46486 | (ldexp<mode>3): Delete. | |
46487 | (ldexp<mode>3<exec>): Change "B" to "A". | |
46488 | ||
46489 | 2023-04-20 Jakub Jelinek <jakub@redhat.com> | |
46490 | Jonathan Wakely <jwakely@redhat.com> | |
46491 | ||
46492 | * tree.h (built_in_function_equal_p): New helper function. | |
46493 | (fndecl_built_in_p): Turn into variadic template to support | |
46494 | 1 or more built_in_function arguments. | |
46495 | * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p. | |
46496 | * gimplify.cc (goa_stabilize_expr): Likewise. | |
46497 | * cgraphclones.cc (cgraph_node::create_clone): Likewise. | |
46498 | * ipa-fnsummary.cc (compute_fn_summary): Likewise. | |
46499 | * omp-low.cc (setjmp_or_longjmp_p): Likewise. | |
46500 | * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee, | |
46501 | cgraph_update_edges_for_call_stmt_node, | |
46502 | cgraph_edge::verify_corresponds_to_fndecl, | |
46503 | cgraph_node::verify_node): Likewise. | |
46504 | * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise. | |
46505 | * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise. | |
46506 | * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise. | |
46507 | ||
46508 | 2023-04-20 Jakub Jelinek <jakub@redhat.com> | |
46509 | ||
46510 | PR tree-optimization/109011 | |
46511 | * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function. | |
46512 | (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected | |
46513 | call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have | |
46514 | direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or | |
46515 | for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that | |
46516 | case. | |
46517 | (vect_vect_recog_func_ptrs): Add ctz_ffs entry. | |
46518 | ||
46519 | 2023-04-20 Richard Biener <rguenther@suse.de> | |
46520 | ||
46521 | * df-core.cc (rest_of_handle_df_initialize): Remove | |
46522 | computation of df->postorder, df->postorder_inverted and | |
46523 | df->n_blocks. | |
46524 | ||
46525 | 2023-04-20 Haochen Jiang <haochen.jiang@intel.com> | |
46526 | ||
46527 | * common/config/i386/i386-common.cc | |
46528 | (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET. | |
46529 | (ix86_handle_option): Set AVX flag for VAES. | |
46530 | * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): | |
46531 | Add OPTION_MASK_ISA2_VAES_UNSET. | |
46532 | (def_builtin): Share builtin between AES and VAES. | |
46533 | * config/i386/i386-expand.cc (ix86_check_builtin_isa_match): | |
46534 | Ditto. | |
46535 | * config/i386/i386.md (aes): New isa attribute. | |
46536 | * config/i386/sse.md (aesenc): Add pattern for VAES with xmm. | |
46537 | (aesenclast): Ditto. | |
46538 | (aesdec): Ditto. | |
46539 | (aesdeclast): Ditto. | |
46540 | * config/i386/vaesintrin.h: Remove redundant avx target push. | |
46541 | * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro. | |
46542 | (_mm_aesdeclast_si128): Ditto. | |
46543 | (_mm_aesenc_si128): Ditto. | |
46544 | (_mm_aesenclast_si128): Ditto. | |
46545 | ||
46546 | 2023-04-20 Hu, Lin1 <lin1.hu@intel.com> | |
46547 | ||
46548 | * config/i386/avx2intrin.h | |
46549 | (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro. | |
46550 | (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto. | |
46551 | (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto. | |
46552 | (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto. | |
46553 | (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto. | |
46554 | (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto. | |
46555 | (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto. | |
46556 | (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto. | |
46557 | (_mm_reduce_add_epi16): New instrinsics. | |
46558 | (_mm_reduce_mul_epi16): Ditto. | |
46559 | (_mm_reduce_and_epi16): Ditto. | |
46560 | (_mm_reduce_or_epi16): Ditto. | |
46561 | (_mm_reduce_max_epi16): Ditto. | |
46562 | (_mm_reduce_max_epu16): Ditto. | |
46563 | (_mm_reduce_min_epi16): Ditto. | |
46564 | (_mm_reduce_min_epu16): Ditto. | |
46565 | (_mm256_reduce_add_epi16): Ditto. | |
46566 | (_mm256_reduce_mul_epi16): Ditto. | |
46567 | (_mm256_reduce_and_epi16): Ditto. | |
46568 | (_mm256_reduce_or_epi16): Ditto. | |
46569 | (_mm256_reduce_max_epi16): Ditto. | |
46570 | (_mm256_reduce_max_epu16): Ditto. | |
46571 | (_mm256_reduce_min_epi16): Ditto. | |
46572 | (_mm256_reduce_min_epu16): Ditto. | |
46573 | (_mm_reduce_add_epi8): Ditto. | |
46574 | (_mm_reduce_mul_epi8): Ditto. | |
46575 | (_mm_reduce_and_epi8): Ditto. | |
46576 | (_mm_reduce_or_epi8): Ditto. | |
46577 | (_mm_reduce_max_epi8): Ditto. | |
46578 | (_mm_reduce_max_epu8): Ditto. | |
46579 | (_mm_reduce_min_epi8): Ditto. | |
46580 | (_mm_reduce_min_epu8): Ditto. | |
46581 | (_mm256_reduce_add_epi8): Ditto. | |
46582 | (_mm256_reduce_mul_epi8): Ditto. | |
46583 | (_mm256_reduce_and_epi8): Ditto. | |
46584 | (_mm256_reduce_or_epi8): Ditto. | |
46585 | (_mm256_reduce_max_epi8): Ditto. | |
46586 | (_mm256_reduce_max_epu8): Ditto. | |
46587 | (_mm256_reduce_min_epi8): Ditto. | |
46588 | (_mm256_reduce_min_epu8): Ditto. | |
46589 | * config/i386/avx512vlbwintrin.h: | |
46590 | (_mm_mask_reduce_add_epi16): Ditto. | |
46591 | (_mm_mask_reduce_mul_epi16): Ditto. | |
46592 | (_mm_mask_reduce_and_epi16): Ditto. | |
46593 | (_mm_mask_reduce_or_epi16): Ditto. | |
46594 | (_mm_mask_reduce_max_epi16): Ditto. | |
46595 | (_mm_mask_reduce_max_epu16): Ditto. | |
46596 | (_mm_mask_reduce_min_epi16): Ditto. | |
46597 | (_mm_mask_reduce_min_epu16): Ditto. | |
46598 | (_mm256_mask_reduce_add_epi16): Ditto. | |
46599 | (_mm256_mask_reduce_mul_epi16): Ditto. | |
46600 | (_mm256_mask_reduce_and_epi16): Ditto. | |
46601 | (_mm256_mask_reduce_or_epi16): Ditto. | |
46602 | (_mm256_mask_reduce_max_epi16): Ditto. | |
46603 | (_mm256_mask_reduce_max_epu16): Ditto. | |
46604 | (_mm256_mask_reduce_min_epi16): Ditto. | |
46605 | (_mm256_mask_reduce_min_epu16): Ditto. | |
46606 | (_mm_mask_reduce_add_epi8): Ditto. | |
46607 | (_mm_mask_reduce_mul_epi8): Ditto. | |
46608 | (_mm_mask_reduce_and_epi8): Ditto. | |
46609 | (_mm_mask_reduce_or_epi8): Ditto. | |
46610 | (_mm_mask_reduce_max_epi8): Ditto. | |
46611 | (_mm_mask_reduce_max_epu8): Ditto. | |
46612 | (_mm_mask_reduce_min_epi8): Ditto. | |
46613 | (_mm_mask_reduce_min_epu8): Ditto. | |
46614 | (_mm256_mask_reduce_add_epi8): Ditto. | |
46615 | (_mm256_mask_reduce_mul_epi8): Ditto. | |
46616 | (_mm256_mask_reduce_and_epi8): Ditto. | |
46617 | (_mm256_mask_reduce_or_epi8): Ditto. | |
46618 | (_mm256_mask_reduce_max_epi8): Ditto. | |
46619 | (_mm256_mask_reduce_max_epu8): Ditto. | |
46620 | (_mm256_mask_reduce_min_epi8): Ditto. | |
46621 | (_mm256_mask_reduce_min_epu8): Ditto. | |
46622 | ||
46623 | 2023-04-20 Haochen Jiang <haochen.jiang@intel.com> | |
46624 | ||
46625 | * common/config/i386/i386-common.cc | |
46626 | (OPTION_MASK_ISA_VPCLMULQDQ_SET): | |
46627 | Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET. | |
46628 | (OPTION_MASK_ISA_AVX_UNSET): | |
46629 | Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET. | |
46630 | (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto. | |
46631 | * config/i386/i386.md (vpclmulqdqvl): New. | |
46632 | * config/i386/sse.md (pclmulqdq): Add evex encoding. | |
46633 | * config/i386/vpclmulqdqintrin.h: Remove redudant avx target | |
46634 | push. | |
46635 | ||
46636 | 2023-04-20 Haochen Jiang <haochen.jiang@intel.com> | |
46637 | ||
46638 | * config/i386/avx512vlbwintrin.h | |
46639 | (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper. | |
46640 | (_mm_mask_blend_epi8): Ditto. | |
46641 | (_mm256_mask_blend_epi16): Ditto. | |
46642 | (_mm256_mask_blend_epi8): Ditto. | |
46643 | * config/i386/avx512vlintrin.h | |
46644 | (_mm256_mask_blend_pd): Ditto. | |
46645 | (_mm256_mask_blend_ps): Ditto. | |
46646 | (_mm256_mask_blend_epi64): Ditto. | |
46647 | (_mm256_mask_blend_epi32): Ditto. | |
46648 | (_mm_mask_blend_pd): Ditto. | |
46649 | (_mm_mask_blend_ps): Ditto. | |
46650 | (_mm_mask_blend_epi64): Ditto. | |
46651 | (_mm_mask_blend_epi32): Ditto. | |
46652 | * config/i386/sse.md (VF_AVX512BWHFBF16): Removed. | |
46653 | (VF_AVX512HFBFVL): Move it before the first usage. | |
46654 | (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16 | |
46655 | to VF_AVX512HFBFVL. | |
46656 | ||
46657 | 2023-04-20 Haochen Jiang <haochen.jiang@intel.com> | |
46658 | ||
46659 | * common/config/i386/i386-common.cc | |
46660 | (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET | |
46661 | to OPTION_MASK_ISA_AVX512BW_SET. | |
46662 | (OPTION_MASK_ISA_AVX512F_UNSET): | |
46663 | Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET. | |
46664 | (OPTION_MASK_ISA_AVX512BW_UNSET): | |
46665 | Add OPTION_MASK_ISA_AVX512VBMI2_UNSET. | |
46666 | * config/i386/avx512vbmi2intrin.h: Do not push avx512bw. | |
46667 | * config/i386/avx512vbmi2vlintrin.h: Ditto. | |
46668 | * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW. | |
46669 | * config/i386/sse.md (VI12_AVX512VLBW): Removed. | |
46670 | (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL. | |
46671 | (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to | |
46672 | VI12_AVX512VL. | |
46673 | (compressstore<mode>_mask): Ditto. | |
46674 | (expand<mode>_mask): Ditto. | |
46675 | (expand<mode>_maskz): Ditto. | |
46676 | (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to | |
46677 | VI12_VI48F_AVX512VL. | |
46678 | ||
46679 | 2023-04-20 Haochen Jiang <haochen.jiang@intel.com> | |
46680 | ||
46681 | * common/config/i386/i386-common.cc | |
46682 | (OPTION_MASK_ISA_AVX512BITALG_SET): | |
46683 | Change OPTION_MASK_ISA_AVX512F_SET | |
46684 | to OPTION_MASK_ISA_AVX512BW_SET. | |
46685 | (OPTION_MASK_ISA_AVX512F_UNSET): | |
46686 | Remove OPTION_MASK_ISA_AVX512BITALG_SET. | |
46687 | (OPTION_MASK_ISA_AVX512BW_UNSET): | |
46688 | Add OPTION_MASK_ISA_AVX512BITALG_SET. | |
46689 | * config/i386/avx512bitalgintrin.h: Do not push avx512bw. | |
46690 | * config/i386/i386-builtin.def: | |
46691 | Remove redundant OPTION_MASK_ISA_AVX512BW. | |
46692 | * config/i386/sse.md (VI1_AVX512VLBW): Removed. | |
46693 | (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): | |
46694 | Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL. | |
46695 | ||
46696 | 2023-04-20 Haochen Jiang <haochen.jiang@intel.com> | |
46697 | ||
46698 | * config/i386/i386-expand.cc | |
46699 | (ix86_check_builtin_isa_match): Correct wrong comments. | |
46700 | Add a new macro SHARE_BUILTIN and refactor the current if | |
46701 | clauses to macro. | |
46702 | ||
46703 | 2023-04-20 Mo, Zewei <zewei.mo@intel.com> | |
46704 | ||
46705 | * config/i386/cpuid.h: Open a new section for Extended Features | |
46706 | Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7, | |
46707 | %ecx == 1). | |
46708 | ||
46709 | 2023-04-20 Hu, Lin1 <lin1.hu@intel.com> | |
46710 | ||
46711 | * config/i386/sse.md: Modify insn vperm{i,f} | |
46712 | and vshuf{i,f}. | |
46713 | ||
46714 | 2023-04-19 Max Filippov <jcmvbkbc@gmail.com> | |
46715 | ||
46716 | * config/xtensa/xtensa-opts.h: New header. | |
46717 | * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as | |
46718 | xtensa_strict_align. | |
46719 | * config/xtensa/xtensa.cc (xtensa_option_override): When | |
46720 | -m[no-]strict-align is not specified in the command line set | |
46721 | xtensa_strict_align to 0 if the hardware supports both unaligned | |
46722 | loads and stores or to 1 otherwise. | |
46723 | * config/xtensa/xtensa.opt (mstrict-align): New option. | |
46724 | * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align. | |
46725 | ||
46726 | 2023-04-19 Max Filippov <jcmvbkbc@gmail.com> | |
46727 | ||
46728 | * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New | |
46729 | function. | |
46730 | ||
46731 | 2023-04-19 Andrew Pinski <apinski@marvell.com> | |
46732 | ||
46733 | * config/i386/i386.md (*movsicc_noc_zext_1): New pattern. | |
46734 | ||
46735 | 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
46736 | ||
46737 | * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support. | |
46738 | (VECTOR_BOOL_MODE): Ditto. | |
46739 | (ADJUST_NUNITS): Ditto. | |
46740 | (ADJUST_ALIGNMENT): Ditto. | |
46741 | (ADJUST_BYTESIZE): Ditto. | |
46742 | (ADJUST_PRECISION): Ditto. | |
46743 | (RVV_MODES): Ditto. | |
46744 | (VECTOR_MODE_WITH_PREFIX): Ditto. | |
46745 | * config/riscv/riscv-v.cc (ENTRY): Ditto. | |
46746 | (get_vlmul): Ditto. | |
46747 | (get_ratio): Ditto. | |
46748 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto. | |
46749 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto. | |
46750 | (vbool64_t): Ditto. | |
46751 | (vbool32_t): Ditto. | |
46752 | (vbool16_t): Ditto. | |
46753 | (vbool8_t): Ditto. | |
46754 | (vbool4_t): Ditto. | |
46755 | (vbool2_t): Ditto. | |
46756 | (vbool1_t): Ditto. | |
46757 | (vint8mf8_t): Ditto. | |
46758 | (vuint8mf8_t): Ditto. | |
46759 | (vint8mf4_t): Ditto. | |
46760 | (vuint8mf4_t): Ditto. | |
46761 | (vint8mf2_t): Ditto. | |
46762 | (vuint8mf2_t): Ditto. | |
46763 | (vint8m1_t): Ditto. | |
46764 | (vuint8m1_t): Ditto. | |
46765 | (vint8m2_t): Ditto. | |
46766 | (vuint8m2_t): Ditto. | |
46767 | (vint8m4_t): Ditto. | |
46768 | (vuint8m4_t): Ditto. | |
46769 | (vint8m8_t): Ditto. | |
46770 | (vuint8m8_t): Ditto. | |
46771 | (vint16mf4_t): Ditto. | |
46772 | (vuint16mf4_t): Ditto. | |
46773 | (vint16mf2_t): Ditto. | |
46774 | (vuint16mf2_t): Ditto. | |
46775 | (vint16m1_t): Ditto. | |
46776 | (vuint16m1_t): Ditto. | |
46777 | (vint16m2_t): Ditto. | |
46778 | (vuint16m2_t): Ditto. | |
46779 | (vint16m4_t): Ditto. | |
46780 | (vuint16m4_t): Ditto. | |
46781 | (vint16m8_t): Ditto. | |
46782 | (vuint16m8_t): Ditto. | |
46783 | (vint32mf2_t): Ditto. | |
46784 | (vuint32mf2_t): Ditto. | |
46785 | (vint32m1_t): Ditto. | |
46786 | (vuint32m1_t): Ditto. | |
46787 | (vint32m2_t): Ditto. | |
46788 | (vuint32m2_t): Ditto. | |
46789 | (vint32m4_t): Ditto. | |
46790 | (vuint32m4_t): Ditto. | |
46791 | (vint32m8_t): Ditto. | |
46792 | (vuint32m8_t): Ditto. | |
46793 | (vint64m1_t): Ditto. | |
46794 | (vuint64m1_t): Ditto. | |
46795 | (vint64m2_t): Ditto. | |
46796 | (vuint64m2_t): Ditto. | |
46797 | (vint64m4_t): Ditto. | |
46798 | (vuint64m4_t): Ditto. | |
46799 | (vint64m8_t): Ditto. | |
46800 | (vuint64m8_t): Ditto. | |
46801 | (vfloat32mf2_t): Ditto. | |
46802 | (vfloat32m1_t): Ditto. | |
46803 | (vfloat32m2_t): Ditto. | |
46804 | (vfloat32m4_t): Ditto. | |
46805 | (vfloat32m8_t): Ditto. | |
46806 | (vfloat64m1_t): Ditto. | |
46807 | (vfloat64m2_t): Ditto. | |
46808 | (vfloat64m4_t): Ditto. | |
46809 | (vfloat64m8_t): Ditto. | |
46810 | * config/riscv/riscv-vector-switch.def (ENTRY): Ditto. | |
46811 | * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto. | |
46812 | (riscv_convert_vector_bits): Ditto. | |
46813 | * config/riscv/riscv.md: | |
46814 | * config/riscv/vector-iterators.md: | |
46815 | * config/riscv/vector.md | |
46816 | (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
46817 | (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto. | |
46818 | (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
46819 | (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto. | |
46820 | (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto. | |
46821 | (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto. | |
46822 | (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto. | |
46823 | (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto. | |
46824 | (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto. | |
46825 | ||
46826 | 2023-04-19 Pan Li <pan2.li@intel.com> | |
46827 | ||
46828 | * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): | |
46829 | Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND. | |
46830 | ||
46831 | 2023-04-19 Uros Bizjak <ubizjak@gmail.com> | |
46832 | ||
46833 | PR target/78904 | |
46834 | PR target/78952 | |
46835 | * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern. | |
46836 | (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate | |
46837 | for operand 0. Use any_extract code iterator. | |
46838 | (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern. | |
46839 | (*cmpqi_ext<mode>_2): Use any_extract code iterator. | |
46840 | (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern. | |
46841 | (*cmpqi_ext<mode>_1): Use general_operand predicate | |
46842 | for operand 1. Use any_extract code iterator. | |
46843 | (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern. | |
46844 | (*cmpqi_ext<mode>_4): Use any_extract code iterator. | |
46845 | ||
46846 | 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46847 | ||
46848 | * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete. | |
46849 | (aarch64_uaddw2<mode>): Delete. | |
46850 | (aarch64_ssubw2<mode>): Delete. | |
46851 | (aarch64_usubw2<mode>): Delete. | |
46852 | (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand. | |
46853 | ||
46854 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46855 | ||
46856 | * tree-ssa-structalias.cc (do_ds_constraint): Use | |
46857 | solve_add_graph_edge. | |
46858 | ||
46859 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46860 | ||
46861 | * tree-ssa-structalias.cc (solve_add_graph_edge): New function, | |
46862 | split out from ... | |
46863 | (do_sd_constraint): ... here. | |
46864 | ||
46865 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46866 | ||
46867 | * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition | |
46868 | rejecting the merge when A contains only a non-local label. | |
46869 | ||
46870 | 2023-04-19 Uros Bizjak <ubizjak@gmail.com> | |
46871 | ||
46872 | * rtl.h (VIRTUAL_REGISTER_P): New predicate. | |
46873 | (VIRTUAL_REGISTER_NUM_P): Ditto. | |
46874 | (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate. | |
46875 | * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate. | |
46876 | * function.cc (instantiate_decl_rtl): Ditto. | |
46877 | * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto. | |
46878 | (nonzero_address_p): Ditto. | |
46879 | (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate. | |
46880 | ||
46881 | 2023-04-19 Aldy Hernandez <aldyh@redhat.com> | |
46882 | ||
46883 | * value-range.h (Value_Range::Value_Range): Avoid pointer sharing. | |
46884 | ||
46885 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46886 | ||
46887 | * system.h (auto_mpz::operator->()): New. | |
46888 | * realmpfr.h (auto_mpfr::operator->()): New. | |
46889 | * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr. | |
46890 | * real.cc (real_from_string): Likewise. | |
46891 | (dconst_e_ptr): Likewise. | |
46892 | (dconst_sqrt2_ptr): Likewise. | |
46893 | * tree-ssa-loop-niter.cc (refine_value_range_using_guard): | |
46894 | Use auto_mpz. | |
46895 | (bound_difference_of_offsetted_base): Likewise. | |
46896 | (number_of_iterations_ne): Likewise. | |
46897 | (number_of_iterations_lt_to_ne): Likewise. | |
46898 | * ubsan.cc: Include realmpfr.h. | |
46899 | (ubsan_instrument_float_cast): Use auto_mpfr. | |
46900 | ||
46901 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46902 | ||
46903 | * tree-ssa-structalias.cc (solve_graph): Remove self-copy | |
46904 | edges, remove edges from escaped after special-casing them. | |
46905 | ||
46906 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46907 | ||
46908 | * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape | |
46909 | special casing. | |
46910 | ||
46911 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46912 | ||
46913 | * tree-ssa-structalias.cc (do_sd_constraint): Do not write | |
46914 | to the LHS varinfo solution member. | |
46915 | ||
46916 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46917 | ||
46918 | * tree-ssa-structalias.cc (topo_visit): Look at the real | |
46919 | destination of edges. | |
46920 | ||
46921 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46922 | ||
46923 | PR tree-optimization/44794 | |
46924 | * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop): | |
46925 | If an epilogue loop is required set its iteration upper bound. | |
46926 | ||
46927 | 2023-04-19 Xi Ruoyao <xry111@xry111.site> | |
46928 | ||
46929 | PR target/109465 | |
46930 | * config/loongarch/loongarch-protos.h | |
46931 | (loongarch_expand_block_move): Add a parameter as alignment RTX. | |
46932 | * config/loongarch/loongarch.h: | |
46933 | (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove. | |
46934 | (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove. | |
46935 | (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define. | |
46936 | (LARCH_MAX_MOVE_OPS_STRAIGHT): Define. | |
46937 | (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of | |
46938 | LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER. | |
46939 | * config/loongarch/loongarch.cc (loongarch_expand_block_move): | |
46940 | Take the alignment from the parameter, but set it to | |
46941 | UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of | |
46942 | straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT | |
46943 | instead of LARCH_MAX_MOVE_BYTES_STRAIGHT. | |
46944 | (loongarch_block_move_straight): When there are left-over bytes, | |
46945 | half the mode size instead of falling back to byte mode at once. | |
46946 | (loongarch_block_move_loop): Limit the length of loop body with | |
46947 | LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of | |
46948 | LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER. | |
46949 | * config/loongarch/loongarch.md (cpymemsi): Pass the alignment | |
46950 | to loongarch_expand_block_move. | |
46951 | ||
46952 | 2023-04-19 Xi Ruoyao <xry111@xry111.site> | |
46953 | ||
46954 | * config/loongarch/loongarch.cc | |
46955 | (loongarch_setup_incoming_varargs): Don't save more GARs than | |
46956 | cfun->va_list_gpr_size / UNITS_PER_WORD. | |
46957 | ||
46958 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46959 | ||
46960 | * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix | |
46961 | no epilogue condition. | |
46962 | ||
46963 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
46964 | ||
46965 | * gimple.h (gimple_assign_load): Outline... | |
46966 | * gimple.cc (gimple_assign_load): ... here. Avoid | |
46967 | get_base_address and instead just strip the outermost | |
46968 | handled component, treating a remaining handled component | |
46969 | as load. | |
46970 | ||
46971 | 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46972 | ||
46973 | * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins | |
46974 | definition. | |
46975 | * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation. | |
46976 | ||
46977 | 2023-04-19 Jakub Jelinek <jakub@redhat.com> | |
46978 | ||
46979 | PR tree-optimization/109011 | |
46980 | * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ... | |
46981 | (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also | |
46982 | CLZ, CTZ and FFS. Remove vargs variable, use | |
46983 | gimple_build_call_internal rather than gimple_build_call_internal_vec. | |
46984 | (vect_vect_recog_func_ptrs): Adjust popcount entry. | |
46985 | ||
46986 | 2023-04-19 Jakub Jelinek <jakub@redhat.com> | |
46987 | ||
46988 | PR target/109040 | |
46989 | * dse.cc (replace_read): If read_reg is a SUBREG of a word mode | |
46990 | REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into | |
46991 | a new REG rather than the SUBREG. | |
46992 | ||
46993 | 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
46994 | ||
46995 | * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>): | |
46996 | New pattern. | |
46997 | ||
46998 | 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
46999 | ||
47000 | PR target/108840 | |
47001 | * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and | |
47002 | ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1. | |
47003 | ||
47004 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
47005 | ||
47006 | PR rtl-optimization/109237 | |
47007 | * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check | |
47008 | TREE_VISITED on INSN_VAR_LOCATION_DECL. | |
47009 | (delete_trivially_dead_insns): Maintain TREE_VISITED on | |
47010 | active debug bind INSN_VAR_LOCATION_DECL. | |
47011 | ||
47012 | 2023-04-19 Richard Biener <rguenther@suse.de> | |
47013 | ||
47014 | PR rtl-optimization/109237 | |
47015 | * cfgcleanup.cc (bb_is_just_return): Walk insns backwards. | |
47016 | ||
47017 | 2023-04-19 Christophe Lyon <christophe.lyon@arm.com> | |
47018 | ||
47019 | * doc/install.texi (enable-decimal-float): Add AArch64. | |
47020 | ||
47021 | 2023-04-19 liuhongt <hongtao.liu@intel.com> | |
47022 | ||
47023 | PR rtl-optimization/109351 | |
47024 | * ira.cc (setup_class_subset_and_memory_move_costs): Check | |
47025 | hard_regno_mode_ok before setting lowest memory move cost for | |
47026 | the mode with different reg classes. | |
47027 | ||
47028 | 2023-04-18 Jason Merrill <jason@redhat.com> | |
47029 | ||
47030 | * doc/invoke.texi: Remove stray @gol. | |
47031 | ||
47032 | 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
47033 | ||
47034 | * ifcvt.cc (cond_move_process_if_block): Consider the result of | |
47035 | targetm.noce_conversion_profitable_p() when replacing the original | |
47036 | sequence with the converted one. | |
47037 | ||
47038 | 2023-04-18 Mark Harmstone <mark@harmstone.com> | |
47039 | ||
47040 | * common.opt (gcodeview): Add new option. | |
47041 | * gcc.cc (driver_handle_option); Handle OPT_gcodeview. | |
47042 | * opts.cc (command_handle_option): Similarly. | |
47043 | * doc/invoke.texi: Add documentation for -gcodeview. | |
47044 | ||
47045 | 2023-04-18 Andrew Pinski <apinski@marvell.com> | |
47046 | ||
47047 | * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration. | |
47048 | (make_pass_phiopt): Make execute out of line. | |
47049 | (tree_ssa_cs_elim): Move code into ... | |
47050 | (pass_cselim::execute): here. | |
47051 | ||
47052 | 2023-04-18 Sam James <sam@gentoo.org> | |
47053 | ||
47054 | * system.h: Drop unused INCLUDE_PTHREAD_H. | |
47055 | ||
47056 | 2023-04-18 Kevin Lee <kevinl@rivosinc.com> | |
47057 | ||
47058 | * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new | |
47059 | condition. | |
47060 | ||
47061 | 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com> | |
47062 | ||
47063 | * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB. | |
47064 | (bswapdi2, bswapsi2): Similarly. | |
47065 | ||
47066 | 2023-04-18 Uros Bizjak <ubizjak@gmail.com> | |
47067 | ||
47068 | PR target/94908 | |
47069 | * config/i386/i386-builtin.def (__builtin_ia32_insertps128): | |
47070 | Use CODE_FOR_sse4_1_insertps_v4sf. | |
47071 | * config/i386/i386-expand.cc (expand_vec_perm_insertps): New. | |
47072 | (expand_vec_perm_1): Call expand_vec_per_insertps. | |
47073 | * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here. | |
47074 | * config/i386/mmx.md (mmxscalarmode): New mode attribute. | |
47075 | (@sse4_1_insertps_<mode>): New insn pattern. | |
47076 | * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn | |
47077 | pattern from sse4_1_insertps using VI4F_128 mode iterator. | |
47078 | ||
47079 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47080 | ||
47081 | * value-range.cc (gt_ggc_mx): New. | |
47082 | (gt_pch_nx): New. | |
47083 | * value-range.h (class vrange): Add GTY marker. | |
47084 | (class frange): Same. | |
47085 | (gt_ggc_mx): Remove. | |
47086 | (gt_pch_nx): Remove. | |
47087 | ||
47088 | 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com> | |
47089 | ||
47090 | * lra-constraints.cc (constraint_unique): New. | |
47091 | (process_address_1): Apply constraint_unique test. | |
47092 | * recog.cc (constrain_operands): Allow relaxed memory | |
47093 | constaints. | |
47094 | ||
47095 | 2023-04-18 Kito Cheng <kito.cheng@sifive.com> | |
47096 | ||
47097 | * doc/extend.texi (Target Builtins): Add RISC-V Vector | |
47098 | Intrinsics. | |
47099 | (RISC-V Vector Intrinsics): Document GCC implemented which | |
47100 | version of RISC-V vector intrinsics and its reference. | |
47101 | ||
47102 | 2023-04-18 Richard Biener <rguenther@suse.de> | |
47103 | ||
47104 | PR middle-end/108786 | |
47105 | * bitmap.h (bitmap_clear_first_set_bit): New. | |
47106 | * bitmap.cc (bitmap_first_set_bit_worker): Rename from | |
47107 | bitmap_first_set_bit and add optional clearing of the bit. | |
47108 | (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker. | |
47109 | (bitmap_clear_first_set_bit): Likewise. | |
47110 | * df-core.cc (df_worklist_dataflow_doublequeue): Use | |
47111 | bitmap_clear_first_set_bit. | |
47112 | * graphite-scop-detection.cc (scop_detection::merge_sese): | |
47113 | Likewise. | |
47114 | * sanopt.cc (sanitize_asan_mark_unpoison): Likewise. | |
47115 | (sanitize_asan_mark_poison): Likewise. | |
47116 | * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise. | |
47117 | * tree-into-ssa.cc (rewrite_blocks): Likewise. | |
47118 | * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise. | |
47119 | * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise. | |
47120 | ||
47121 | 2023-04-18 Richard Biener <rguenther@suse.de> | |
47122 | ||
47123 | * tree-ssa-structalias.cc (dump_sa_stats): Split out from... | |
47124 | (dump_sa_points_to_info): ... this function. | |
47125 | (compute_points_to_sets): Guard large dumps with TDF_DETAILS, | |
47126 | and call dump_sa_stats guarded with TDF_STATS. | |
47127 | (ipa_pta_execute): Likewise. | |
47128 | (compute_may_aliases): Guard dump_alias_info with | |
47129 | TDF_DETAILS|TDF_ALIAS. | |
47130 | ||
47131 | 2023-04-18 Andrew Pinski <apinski@marvell.com> | |
47132 | ||
47133 | * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump | |
47134 | the expression that is being tried when TDF_FOLDING | |
47135 | is true. | |
47136 | (phiopt_worker::match_simplify_replacement): Dump | |
47137 | the sequence which was created by gimple_simplify_phiopt | |
47138 | when TDF_FOLDING is true. | |
47139 | ||
47140 | 2023-04-18 Andrew Pinski <apinski@marvell.com> | |
47141 | ||
47142 | * tree-ssa-phiopt.cc (match_simplify_replacement): | |
47143 | Simplify code that does the movement slightly. | |
47144 | ||
47145 | 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
47146 | ||
47147 | * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to | |
47148 | define_expand. | |
47149 | (rev16<mode>2): Rename to... | |
47150 | (aarch64_rev16<mode>2_alt1): ... This. | |
47151 | (rev16<mode>2_alt): Rename to... | |
47152 | (*aarch64_rev16<mode>2_alt2): ... This. | |
47153 | ||
47154 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47155 | ||
47156 | * emit-rtl.cc (init_emit_once): Initialize dconstm0. | |
47157 | * gimple-range-op.cc (class cfn_signbit): Remove dconstm0 | |
47158 | declaration. | |
47159 | * range-op-float.cc (zero_range): Use dconstm0. | |
47160 | (zero_to_inf_range): Same. | |
47161 | * real.h (dconstm0): New. | |
47162 | * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0. | |
47163 | (frange::set_zero): Do not declare dconstm0. | |
47164 | ||
47165 | 2023-04-18 Richard Biener <rguenther@suse.de> | |
47166 | ||
47167 | * system.h (class auto_mpz): New, | |
47168 | * realmpfr.h (class auto_mpfr): Likewise. | |
47169 | * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr. | |
47170 | (do_mpfr_arg2): Likewise. | |
47171 | * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz; | |
47172 | ||
47173 | 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
47174 | ||
47175 | * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take | |
47176 | builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP. | |
47177 | ||
47178 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47179 | ||
47180 | * value-range.cc (frange::operator==): Adjust for NAN. | |
47181 | (range_tests_nan): Remove some NAN tests. | |
47182 | ||
47183 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47184 | ||
47185 | * inchash.cc (hash::add_real_value): New. | |
47186 | * inchash.h (class hash): Add add_real_value. | |
47187 | * value-range.cc (add_vrange): New. | |
47188 | * value-range.h (inchash::add_vrange): New. | |
47189 | ||
47190 | 2023-04-18 Richard Biener <rguenther@suse.de> | |
47191 | ||
47192 | PR tree-optimization/109539 | |
47193 | * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): | |
47194 | Re-implement pointer relatedness for PHIs. | |
47195 | ||
47196 | 2023-04-18 Andrew Stubbs <ams@codesourcery.com> | |
47197 | ||
47198 | * config/gcn/gcn-valu.md (SV_SFDF): New iterator. | |
47199 | (SV_FP): New iterator. | |
47200 | (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes. | |
47201 | (recip<mode>2): Unify the two patterns using SV_FP. | |
47202 | (div_scale<mode><exec_vcc>): New insn. | |
47203 | (div_fmas<mode><exec>): New insn. | |
47204 | (div_fixup<mode><exec>): New insn. | |
47205 | (div<mode>3): Unify the two expanders and rewrite using hardfp. | |
47206 | * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute. | |
47207 | * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS, | |
47208 | and UNSPEC_DIV_FIXUP. | |
47209 | (vccwait): New attribute. | |
47210 | ||
47211 | 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
47212 | ||
47213 | * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march | |
47214 | if the argument matches that. | |
47215 | ||
47216 | 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
47217 | ||
47218 | * config/aarch64/atomics.md | |
47219 | (*aarch64_atomic_load<ALLX:mode>_rcpc_zext): | |
47220 | Use SD_HSDI for destination mode iterator. | |
47221 | ||
47222 | 2023-04-18 Jin Ma <jinma@linux.alibaba.com> | |
47223 | ||
47224 | * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order | |
47225 | of z-extensions and s-extensions. | |
47226 | (riscv_subset_list::parse): Likewise. | |
47227 | ||
47228 | 2023-04-18 Jakub Jelinek <jakub@redhat.com> | |
47229 | ||
47230 | PR tree-optimization/109240 | |
47231 | * match.pd (fneg/fadd): Rewrite such that it handles both plus as | |
47232 | first vec_perm operand and minus as second using fneg/fadd and | |
47233 | minus as first vec_perm operand and plus as second using fneg/fsub. | |
47234 | ||
47235 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47236 | ||
47237 | * data-streamer.cc (bp_pack_real_value): New. | |
47238 | (bp_unpack_real_value): New. | |
47239 | * data-streamer.h (bp_pack_real_value): New. | |
47240 | (bp_unpack_real_value): New. | |
47241 | * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use | |
47242 | bp_unpack_real_value. | |
47243 | * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use | |
47244 | bp_pack_real_value. | |
47245 | ||
47246 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47247 | ||
47248 | * wide-int.h (WIDE_INT_MAX_HWIS): New. | |
47249 | (class fixed_wide_int_storage): Use it. | |
47250 | (trailing_wide_ints <N>::set_precision): Use it. | |
47251 | (trailing_wide_ints <N>::extra_size): Use it. | |
47252 | ||
47253 | 2023-04-18 Xi Ruoyao <xry111@xry111.site> | |
47254 | ||
47255 | * config/loongarch/loongarch-protos.h | |
47256 | (loongarch_addu16i_imm12_operand_p): New function prototype. | |
47257 | (loongarch_split_plus_constant): Likewise. | |
47258 | * config/loongarch/loongarch.cc | |
47259 | (loongarch_addu16i_imm12_operand_p): New function. | |
47260 | (loongarch_split_plus_constant): Likewise. | |
47261 | * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro. | |
47262 | (DUAL_IMM12_OPERAND): Likewise. | |
47263 | (DUAL_ADDU16I_OPERAND): Likewise. | |
47264 | * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New | |
47265 | constraint. | |
47266 | * config/loongarch/predicates.md (const_dual_imm12_operand): New | |
47267 | predicate. | |
47268 | (const_addu16i_operand): Likewise. | |
47269 | (const_addu16i_imm12_di_operand): Likewise. | |
47270 | (const_addu16i_imm12_si_operand): Likewise. | |
47271 | (plus_di_operand): Likewise. | |
47272 | (plus_si_operand): Likewise. | |
47273 | (plus_si_extend_operand): Likewise. | |
47274 | * config/loongarch/loongarch.md (add<mode>3): Convert to | |
47275 | define_insn_and_split. Use plus_<mode>_operand predicate | |
47276 | instead of arith_operand. Add alternatives for La, Lb, Lc, Ld, | |
47277 | and Le constraints. | |
47278 | (*addsi3_extended): Convert to define_insn_and_split. Use | |
47279 | plus_si_extend_operand instead of arith_operand. Add | |
47280 | alternatives for La and Le alternatives. | |
47281 | ||
47282 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47283 | ||
47284 | * value-range.h (Value_Range::Value_Range): New. | |
47285 | (Value_Range::contains_p): New. | |
47286 | ||
47287 | 2023-04-18 Aldy Hernandez <aldyh@redhat.com> | |
47288 | ||
47289 | * value-range.h (class vrange): Make m_discriminator const. | |
47290 | (class irange): Make m_max_ranges const. Adjust constructors | |
47291 | accordingly. | |
47292 | (class unsupported_range): Construct vrange appropriately. | |
47293 | (class frange): Same. | |
47294 | ||
47295 | 2023-04-18 Lulu Cheng <chenglulu@loongson.cn> | |
47296 | ||
47297 | * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro | |
47298 | definition. | |
47299 | ||
47300 | 2023-04-18 Lulu Cheng <chenglulu@loongson.cn> | |
47301 | ||
47302 | * doc/extend.texi: Add section for LoongArch Base Built-in functions. | |
47303 | ||
47304 | 2023-04-18 Fei Gao <gaofei@eswincomputing.com> | |
47305 | ||
47306 | * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more | |
47307 | readable. | |
47308 | (riscv_expand_epilogue): Likewise. | |
47309 | ||
47310 | 2023-04-17 Fei Gao <gaofei@eswincomputing.com> | |
47311 | ||
47312 | * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in | |
47313 | stack allocation. | |
47314 | (riscv_expand_epilogue): Consider save-restore in stack deallocation. | |
47315 | ||
47316 | 2023-04-17 Andrew Pinski <apinski@marvell.com> | |
47317 | ||
47318 | * tree-ssa-phiopt.cc (gate_hoist_loads): Remove | |
47319 | prototype. | |
47320 | ||
47321 | 2023-04-17 Aldy Hernandez <aldyh@redhat.com> | |
47322 | ||
47323 | * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export | |
47324 | global ranges. | |
47325 | ||
47326 | 2023-04-17 Fei Gao <gaofei@eswincomputing.com> | |
47327 | ||
47328 | * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function | |
47329 | parameter remaining_size. | |
47330 | (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface. | |
47331 | (riscv_expand_prologue): Likewise. | |
47332 | (riscv_expand_epilogue): Likewise. | |
47333 | ||
47334 | 2023-04-17 Feng Wang <wangfeng@eswincomputing.com> | |
47335 | ||
47336 | * config/riscv/bitmanip.md (rotrsi3_sext): Support generating | |
47337 | roriw for constant counts. | |
47338 | * rtl.h (reverse_rotate_by_imm_p): Add function declartion | |
47339 | * simplify-rtx.cc (reverse_rotate_by_imm_p): New function. | |
47340 | (simplify_context::simplify_binary_operation_1): Use it. | |
47341 | * expmed.cc (expand_shift_1): Likewise. | |
47342 | ||
47343 | 2023-04-17 Martin Jambor <mjambor@suse.cz> | |
47344 | ||
47345 | PR ipa/107769 | |
47346 | PR ipa/109318 | |
47347 | * cgraph.h (symtab_node::find_reference): Add parameter use_type. | |
47348 | * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented. | |
47349 | (ipa_zap_jf_refdesc): New function. | |
47350 | (ipa_get_jf_pass_through_refdesc_decremented): Likewise. | |
47351 | (ipa_set_jf_pass_through_refdesc_decremented): Likewise. | |
47352 | * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for | |
47353 | the new parameter of find_reference. | |
47354 | (adjust_references_in_caller): Likewise. Make sure the constant jump | |
47355 | function is not used to decrement a refdec counter again. Only | |
47356 | decrement refdesc counters when the pass_through jump function allows | |
47357 | it. Added a detailed dump when decrementing refdesc counters. | |
47358 | * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag. | |
47359 | (ipa_set_jf_simple_pass_through): Initialize the new flag. | |
47360 | (ipa_set_jf_unary_pass_through): Likewise. | |
47361 | (ipa_set_jf_arith_pass_through): Likewise. | |
47362 | (remove_described_reference): Provide a value for the new parameter of | |
47363 | find_reference. | |
47364 | (update_jump_functions_after_inlining): Zap refdesc of new jfunc if | |
47365 | the previous pass_through had a flag mandating that we do so. | |
47366 | (propagate_controlled_uses): Likewise. Only decrement refdesc | |
47367 | counters when the pass_through jump function allows it. | |
47368 | (ipa_edge_args_sum_t::duplicate): Provide a value for the new | |
47369 | parameter of find_reference. | |
47370 | (ipa_write_jump_function): Assert the new flag does not have to be | |
47371 | streamed. | |
47372 | * symtab.cc (symtab_node::find_reference): Add parameter use_type, use | |
47373 | it in searching. | |
47374 | ||
47375 | 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
47376 | Di Zhao <di.zhao@amperecomputing.com> | |
47377 | ||
47378 | * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION): | |
47379 | Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE. | |
47380 | * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): | |
47381 | Check for the above tuning option when processing loads. | |
47382 | ||
47383 | 2023-04-17 Richard Biener <rguenther@suse.de> | |
47384 | ||
47385 | PR tree-optimization/109524 | |
47386 | * tree-vrp.cc (remove_unreachable::m_list): Change to a | |
47387 | vector of pairs of block indices. | |
47388 | (remove_unreachable::maybe_register_block): Adjust. | |
47389 | (remove_unreachable::remove_and_update_globals): Likewise. | |
47390 | Deal with removed blocks. | |
47391 | ||
47392 | 2023-04-16 Jeff Law <jlaw@ventanamicro> | |
47393 | ||
47394 | PR target/109508 | |
47395 | * config/riscv/riscv.cc (riscv_expand_conditional_move): For | |
47396 | TARGET_SFB_ALU, force the true arm into a register. | |
47397 | ||
47398 | 2023-04-15 John David Anglin <danglin@gcc.gnu.org> | |
47399 | ||
47400 | PR target/104989 | |
47401 | * config/pa/pa-protos.h (pa_function_arg_size): Update prototype. | |
47402 | * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument | |
47403 | size is zero. | |
47404 | (pa_arg_partial_bytes): Don't call pa_function_arg_size twice. | |
47405 | (pa_function_arg_size): Change return type to int. Return zero | |
47406 | for arguments larger than 1 GB. Update comments. | |
47407 | ||
47408 | 2023-04-15 Jakub Jelinek <jakub@redhat.com> | |
47409 | ||
47410 | PR tree-optimization/109154 | |
47411 | * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just | |
47412 | args_len - 1 COND_EXPRs rather than args_len. Formatting fix. | |
47413 | ||
47414 | 2023-04-15 Jason Merrill <jason@redhat.com> | |
47415 | ||
47416 | PR c++/109514 | |
47417 | * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): | |
47418 | Overhaul lhs_ref.ref analysis. | |
47419 | ||
47420 | 2023-04-14 Richard Biener <rguenther@suse.de> | |
47421 | ||
47422 | PR tree-optimization/109502 | |
47423 | * tree-vect-stmts.cc (vectorizable_assignment): Fix | |
47424 | check for conversion between mask and non-mask types. | |
47425 | ||
47426 | 2023-04-14 Jeff Law <jlaw@ventanamicro.com> | |
47427 | Jakub Jelinek <jakub@redhat.com> | |
47428 | ||
47429 | PR target/108947 | |
47430 | PR target/109040 | |
47431 | * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in | |
47432 | word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is | |
47433 | smaller than word_mode. | |
47434 | * simplify-rtx.cc (simplify_context::simplify_binary_operation_1) | |
47435 | <case AND>: Likewise. | |
47436 | ||
47437 | 2023-04-14 Jakub Jelinek <jakub@redhat.com> | |
47438 | ||
47439 | * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead | |
47440 | of GEN_INT. | |
47441 | ||
47442 | 2023-04-13 Andrew MacLeod <amacleod@redhat.com> | |
47443 | ||
47444 | PR tree-optimization/108139 | |
47445 | PR tree-optimization/109462 | |
47446 | * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove | |
47447 | equivalency check for PHI nodes. | |
47448 | * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def | |
47449 | does not dominate single-arg equivalency edges. | |
47450 | ||
47451 | 2023-04-13 Richard Sandiford <richard.sandiford@arm.com> | |
47452 | ||
47453 | PR target/108910 | |
47454 | * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do | |
47455 | not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead. | |
47456 | ||
47457 | 2023-04-13 Richard Biener <rguenther@suse.de> | |
47458 | ||
47459 | PR tree-optimization/109491 | |
47460 | * tree-ssa-sccvn.cc (expressions_equal_p): Restore the | |
47461 | NULL operands test. | |
47462 | ||
47463 | 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
47464 | ||
47465 | PR target/109479 | |
47466 | * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate. | |
47467 | (vint16mf4_t): Ditto. | |
47468 | (vint32mf2_t): Ditto. | |
47469 | (vint64m1_t): Ditto. | |
47470 | (vint64m2_t): Ditto. | |
47471 | (vint64m4_t): Ditto. | |
47472 | (vint64m8_t): Ditto. | |
47473 | (vuint8mf8_t): Ditto. | |
47474 | (vuint16mf4_t): Ditto. | |
47475 | (vuint32mf2_t): Ditto. | |
47476 | (vuint64m1_t): Ditto. | |
47477 | (vuint64m2_t): Ditto. | |
47478 | (vuint64m4_t): Ditto. | |
47479 | (vuint64m8_t): Ditto. | |
47480 | (vfloat32mf2_t): Ditto. | |
47481 | (vbool64_t): Ditto. | |
47482 | * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments. | |
47483 | (register_vector_type): Ditto. | |
47484 | (check_required_extensions): Fix condition. | |
47485 | * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it. | |
47486 | (RVV_REQUIRE_ELEN_64): New define. | |
47487 | (RVV_REQUIRE_MIN_VLEN_64): Ditto. | |
47488 | * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it. | |
47489 | (TARGET_VECTOR_FP64): Ditto. | |
47490 | (ENTRY): Fix predicate. | |
47491 | * config/riscv/vector-iterators.md: Fix predicate. | |
47492 | ||
47493 | 2023-04-12 Jakub Jelinek <jakub@redhat.com> | |
47494 | ||
47495 | PR tree-optimization/109410 | |
47496 | * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry | |
47497 | block if first statement of the function is a call to returns_twice | |
47498 | function. | |
47499 | ||
47500 | 2023-04-12 Jakub Jelinek <jakub@redhat.com> | |
47501 | ||
47502 | PR target/109458 | |
47503 | * config/i386/i386.cc: Include rtl-error.h. | |
47504 | (ix86_print_operand): For z modifier warning, use warning_for_asm | |
47505 | if this_is_asm_operands. For Z modifier errors, use %c and code | |
47506 | instead of hardcoded Z. | |
47507 | ||
47508 | 2023-04-12 Costas Argyris <costas.argyris@gmail.com> | |
47509 | ||
47510 | * config/i386/x-mingw32-utf8: Remove extrataneous $@ | |
47511 | ||
47512 | 2023-04-12 Andrew MacLeod <amacleod@redhat.com> | |
47513 | ||
47514 | PR tree-optimization/109462 | |
47515 | * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't | |
47516 | check for equivalences if NAME is a phi node. | |
47517 | ||
47518 | 2023-04-12 Richard Biener <rguenther@suse.de> | |
47519 | ||
47520 | PR tree-optimization/109473 | |
47521 | * tree-vect-loop.cc (vect_create_epilog_for_reduction): | |
47522 | Convert scalar result to the computation type before performing | |
47523 | the reduction adjustment. | |
47524 | ||
47525 | 2023-04-12 Richard Biener <rguenther@suse.de> | |
47526 | ||
47527 | PR tree-optimization/109469 | |
47528 | * tree-vect-slp.cc (vect_slp_function): Skip region starts with | |
47529 | a returns-twice call. | |
47530 | ||
47531 | 2023-04-12 Richard Biener <rguenther@suse.de> | |
47532 | ||
47533 | PR tree-optimization/109434 | |
47534 | * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly | |
47535 | handle possibly throwing calls when processing the LHS | |
47536 | and may-defs are not OK. | |
47537 | ||
47538 | 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com> | |
47539 | ||
47540 | * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust | |
47541 | predicate to avoid splitting arith constants. | |
47542 | ||
47543 | 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com> | |
47544 | Pan Li <pan2.li@intel.com> | |
47545 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
47546 | Kito Cheng <kito.cheng@sifive.com> | |
47547 | ||
47548 | PR target/109104 | |
47549 | * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New. | |
47550 | * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New. | |
47551 | (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl. | |
47552 | * config/riscv/riscv.cc (vector_zero_call_used_regs): New. | |
47553 | (riscv_zero_call_used_regs): New. | |
47554 | (TARGET_ZERO_CALL_USED_REGS): New. | |
47555 | ||
47556 | 2023-04-11 Martin Liska <mliska@suse.cz> | |
47557 | ||
47558 | PR driver/108241 | |
47559 | * opts.cc (finish_options): Drop also | |
47560 | x_flag_var_tracking_assignments. | |
47561 | ||
47562 | 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
47563 | ||
47564 | PR tree-optimization/108888 | |
47565 | * tree-if-conv.cc (predicate_statements): Fix gimple call check. | |
47566 | ||
47567 | 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org> | |
47568 | ||
47569 | PR target/108812 | |
47570 | * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to... | |
47571 | (vsx_sign_extend_v16qi_<mode>): ... this. | |
47572 | (vsx_sign_extend_hi_<mode>): Rename to... | |
47573 | (vsx_sign_extend_v8hi_<mode>): ... this. | |
47574 | (vsx_sign_extend_si_v2di): Rename to... | |
47575 | (vsx_sign_extend_v4si_v2di): ... this. | |
47576 | (vsignextend_qi_<mode>): Remove. | |
47577 | (vsignextend_hi_<mode>): Remove. | |
47578 | (vsignextend_si_v2di): Remove. | |
47579 | (vsignextend_v2di_v1ti): Remove. | |
47580 | (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with | |
47581 | gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si | |
47582 | with gen_vsx_sign_extend_v16qi_v4si. | |
47583 | * config/rs6000/rs6000.md (split for DI constant generation): | |
47584 | Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si. | |
47585 | (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di | |
47586 | with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si | |
47587 | with gen_vsx_sign_extend_v16qi_si. | |
47588 | * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d): | |
47589 | Set bif-pattern to vsx_sign_extend_v16qi_v2di. | |
47590 | (__builtin_altivec_vsignextsb2w): Set bif-pattern to | |
47591 | vsx_sign_extend_v16qi_v4si. | |
47592 | (__builtin_altivec_visgnextsh2d): Set bif-pattern to | |
47593 | vsx_sign_extend_v8hi_v2di. | |
47594 | (__builtin_altivec_vsignextsh2w): Set bif-pattern to | |
47595 | vsx_sign_extend_v8hi_v4si. | |
47596 | (__builtin_altivec_vsignextsw2d): Set bif-pattern to | |
47597 | vsx_sign_extend_si_v2di. | |
47598 | (__builtin_altivec_vsignext): Set bif-pattern to | |
47599 | vsx_sign_extend_v2di_v1ti. | |
47600 | * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace | |
47601 | gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di, | |
47602 | gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and | |
47603 | gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di. | |
47604 | ||
47605 | 2023-04-10 Michael Meissner <meissner@linux.ibm.com> | |
47606 | ||
47607 | PR target/70243 | |
47608 | * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp. | |
47609 | (vsx_nfmsv4sf4): Do not generate vnmsubfp. | |
47610 | ||
47611 | 2023-04-10 Haochen Jiang <haochen.jiang@intel.com> | |
47612 | ||
47613 | * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX. | |
47614 | ||
47615 | 2023-04-10 Haochen Jiang <haochen.jiang@intel.com> | |
47616 | ||
47617 | * common/config/i386/cpuinfo.h (get_available_features): | |
47618 | Detect AMX-COMPLEX. | |
47619 | * common/config/i386/i386-common.cc | |
47620 | (OPTION_MASK_ISA2_AMX_COMPLEX_SET, | |
47621 | OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New. | |
47622 | (ix86_handle_option): Handle -mamx-complex. | |
47623 | * common/config/i386/i386-cpuinfo.h (enum processor_features): | |
47624 | Add FEATURE_AMX_COMPLEX. | |
47625 | * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for | |
47626 | amx-complex. | |
47627 | * config.gcc: Add amxcomplexintrin.h. | |
47628 | * config/i386/cpuid.h (bit_AMX_COMPLEX): New. | |
47629 | * config/i386/i386-c.cc (ix86_target_macros_internal): Define | |
47630 | __AMX_COMPLEX__. | |
47631 | * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX). | |
47632 | * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p): | |
47633 | Handle amx-complex. | |
47634 | * config/i386/i386.opt: Add option -mamx-complex. | |
47635 | * config/i386/immintrin.h: Include amxcomplexintrin.h. | |
47636 | * doc/extend.texi: Document amx-complex. | |
47637 | * doc/invoke.texi: Document -mamx-complex. | |
47638 | * doc/sourcebuild.texi: Document target amx-complex. | |
47639 | * config/i386/amxcomplexintrin.h: New file. | |
47640 | ||
47641 | 2023-04-08 Jakub Jelinek <jakub@redhat.com> | |
47642 | ||
47643 | PR tree-optimization/109392 | |
47644 | * tree-vect-generic.cc (tree_vec_extract): Handle failure | |
47645 | of maybe_push_res_to_seq better. | |
47646 | ||
47647 | 2023-04-08 Jakub Jelinek <jakub@redhat.com> | |
47648 | ||
47649 | * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and | |
47650 | poly-int-types.h. | |
47651 | (SYSTEM_H): Depend on $(HASHTAB_H). | |
47652 | * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused | |
47653 | dependency on $(RTL_BASE_H), remove redundant dependency on | |
47654 | insn-modes.h. | |
47655 | ||
47656 | 2023-04-06 Richard Earnshaw <rearnsha@arm.com> | |
47657 | ||
47658 | PR target/107674 | |
47659 | * config/arm/arm.cc (arm_effective_regno): New function. | |
47660 | (mve_vector_mem_operand): Use it. | |
47661 | ||
47662 | 2023-04-06 Andrew MacLeod <amacleod@redhat.com> | |
47663 | ||
47664 | PR tree-optimization/109417 | |
47665 | * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if | |
47666 | dependency is in SSA_NAME_FREE_LIST. | |
47667 | ||
47668 | 2023-04-06 Andrew Pinski <apinski@marvell.com> | |
47669 | ||
47670 | PR tree-optimization/109427 | |
47671 | * params.opt (-param=vect-induction-float=): | |
47672 | Fix option attribute typo for IntegerRange. | |
47673 | ||
47674 | 2023-04-05 Jeff Law <jlaw@ventanamicro> | |
47675 | ||
47676 | PR target/108892 | |
47677 | * combine.cc (combine_instructions): Force re-recognition when | |
47678 | after restoring the body of an insn to its original form. | |
47679 | ||
47680 | 2023-04-05 Martin Jambor <mjambor@suse.cz> | |
47681 | ||
47682 | PR ipa/108959 | |
47683 | * ipa-sra.cc (zap_useless_ipcp_results): New function. | |
47684 | (process_isra_node_results): Call it. | |
47685 | ||
47686 | 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
47687 | ||
47688 | * config/riscv/vector.md: Fix incorrect operand order. | |
47689 | ||
47690 | 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
47691 | ||
47692 | * config/riscv/riscv-vsetvl.cc | |
47693 | (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local | |
47694 | demand fusion. | |
47695 | ||
47696 | 2023-04-05 Li Xu <xuli1@eswincomputing.com> | |
47697 | ||
47698 | * config/riscv/riscv-vector-builtins.def: Fix typo. | |
47699 | * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto. | |
47700 | * config/riscv/vector-iterators.md: Ditto. | |
47701 | ||
47702 | 2023-04-04 Hans-Peter Nilsson <hp@axis.com> | |
47703 | ||
47704 | * doc/md.texi (Including Patterns): Fix page break. | |
47705 | ||
47706 | 2023-04-04 Jakub Jelinek <jakub@redhat.com> | |
47707 | ||
47708 | PR tree-optimization/109386 | |
47709 | * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range, | |
47710 | foperator_le::op1_range, foperator_le::op2_range, | |
47711 | foperator_gt::op1_range, foperator_gt::op2_range, | |
47712 | foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for | |
47713 | BRS_FALSE case even if the other op is maybe_isnan, not just | |
47714 | known_isnan. | |
47715 | (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range, | |
47716 | foperator_unordered_le::op1_range, foperator_unordered_le::op2_range, | |
47717 | foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range, | |
47718 | foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range): | |
47719 | Make r varying for BRS_TRUE case even if the other op is maybe_isnan, | |
47720 | not just known_isnan. | |
47721 | ||
47722 | 2023-04-04 Marek Polacek <polacek@redhat.com> | |
47723 | ||
47724 | PR sanitizer/109107 | |
47725 | * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED | |
47726 | when associating. | |
47727 | * match.pd: Use TYPE_OVERFLOW_SANITIZED. | |
47728 | ||
47729 | 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com> | |
47730 | ||
47731 | * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands. | |
47732 | (mve_vcreateq_f<mode>): Swap operands. | |
47733 | ||
47734 | 2023-04-04 Andrew Stubbs <ams@codesourcery.com> | |
47735 | ||
47736 | * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New. | |
47737 | ||
47738 | 2023-04-04 Jakub Jelinek <jakub@redhat.com> | |
47739 | ||
47740 | PR target/109384 | |
47741 | * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): | |
47742 | Reword diagnostics about zfinx conflict with f, formatting fixes. | |
47743 | ||
47744 | 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> | |
47745 | ||
47746 | * config/sol2.h (LIB_SPEC): Don't link with -lpthread. | |
47747 | ||
47748 | 2023-04-04 Richard Biener <rguenther@suse.de> | |
47749 | ||
47750 | PR tree-optimization/109304 | |
47751 | * tree-profile.cc (tree_profiling): Use symtab node | |
47752 | availability to decide whether to skip adjusting calls. | |
47753 | Do not adjust calls to internal functions. | |
47754 | ||
47755 | 2023-04-04 Kewen Lin <linkw@linux.ibm.com> | |
47756 | ||
47757 | PR target/108807 | |
47758 | * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen | |
47759 | function for permutation control vector by considering big endianness. | |
47760 | ||
47761 | 2023-04-04 Kewen Lin <linkw@linux.ibm.com> | |
47762 | ||
47763 | PR target/108699 | |
47764 | * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ... | |
47765 | (rs6000_vprtyb<mode>2): ... this. | |
47766 | * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with | |
47767 | rs6000_vprtybv2di2. | |
47768 | (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2. | |
47769 | (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2. | |
47770 | * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with | |
47771 | popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2. | |
47772 | ||
47773 | 2023-04-04 Hans-Peter Nilsson <hp@axis.com> | |
47774 | Sandra Loosemore <sandra@codesourcery.com> | |
47775 | ||
47776 | * doc/md.texi (Insn Splitting): Tweak wording for readability. | |
47777 | ||
47778 | 2023-04-03 Martin Jambor <mjambor@suse.cz> | |
47779 | ||
47780 | PR ipa/109303 | |
47781 | * ipa-prop.cc (determine_known_aggregate_parts): Check that the | |
47782 | offset + size will be representable in unsigned int. | |
47783 | ||
47784 | 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> | |
47785 | ||
47786 | * configure.ac (ZSTD_LIB): Move before zstd.h check. | |
47787 | Unset gcc_cv_header_zstd_h without libzstd. | |
47788 | * configure: Regenerate. | |
47789 | ||
47790 | 2023-04-03 Martin Liska <mliska@suse.cz> | |
47791 | ||
47792 | * doc/invoke.texi: Document new param. | |
47793 | ||
47794 | 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com> | |
47795 | ||
47796 | * doc/sourcebuild.texi (const_volatile_readonly_section): Document | |
47797 | new check_effective_target function. | |
47798 | ||
47799 | 2023-04-03 Li Xu <xuli1@eswincomputing.com> | |
47800 | ||
47801 | * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo. | |
47802 | (vfloat32m8_t): Likewise | |
47803 | ||
47804 | 2023-04-03 liuhongt <hongtao.liu@intel.com> | |
47805 | ||
47806 | * doc/md.texi: Document signbitm2. | |
47807 | ||
47808 | 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
47809 | kito-cheng <kito.cheng@sifive.com> | |
47810 | ||
47811 | * config/riscv/vector.md: Fix RA constraint. | |
47812 | ||
47813 | 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
47814 | ||
47815 | * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function. | |
47816 | * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function. | |
47817 | * config/riscv/vector.md: Fix scalar move bug. | |
47818 | ||
47819 | 2023-04-01 Jakub Jelinek <jakub@redhat.com> | |
47820 | ||
47821 | * range-op-float.cc (foperator_equal::fold_range): If at least | |
47822 | one of the op ranges is not singleton and neither is NaN and all | |
47823 | 4 bounds are zero, return [1, 1]. | |
47824 | (foperator_not_equal::fold_range): In the same case return [0, 0]. | |
47825 | ||
47826 | 2023-04-01 Jakub Jelinek <jakub@redhat.com> | |
47827 | ||
47828 | * range-op-float.cc (foperator_equal::fold_range): Perform the | |
47829 | non-singleton handling regardless of maybe_isnan (op1, op2). | |
47830 | (foperator_not_equal::fold_range): Likewise. | |
47831 | (foperator_lt::fold_range, foperator_le::fold_range, | |
47832 | foperator_gt::fold_range, foperator_ge::fold_range): Perform the | |
47833 | real_* comparison check which results in range_false (type) | |
47834 | even if maybe_isnan (op1, op2). Simplify. | |
47835 | (foperator_ltgt): New class. | |
47836 | (fop_ltgt): New variable. | |
47837 | (floating_op_table::floating_op_table): Handle LTGT_EXPR using | |
47838 | fop_ltgt. | |
47839 | ||
47840 | 2023-04-01 Jakub Jelinek <jakub@redhat.com> | |
47841 | ||
47842 | PR target/109254 | |
47843 | * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode | |
47844 | returns VOIDmode, handle it like if the register isn't used for | |
47845 | passing arguments at all. | |
47846 | (apply_result_size): If targetm.calls.get_raw_result_mode returns | |
47847 | VOIDmode, handle it like if the register isn't used for returning | |
47848 | results at all. | |
47849 | * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it | |
47850 | means to return VOIDmode. | |
47851 | * doc/tm.texi: Regenerated. | |
47852 | * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return | |
47853 | TARGET_SVE for P0_REGNUM. | |
47854 | (aarch64_function_arg_regno_p): Also return true for p0-p3. | |
47855 | (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs. | |
47856 | ||
47857 | 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com> | |
47858 | ||
47859 | * lra-constraints.cc: (combine_reload_insn): New function. | |
47860 | ||
47861 | 2023-03-31 Jakub Jelinek <jakub@redhat.com> | |
47862 | ||
47863 | PR tree-optimization/91645 | |
47864 | * range-op-float.cc (foperator_unordered_lt::fold_range, | |
47865 | foperator_unordered_le::fold_range, | |
47866 | foperator_unordered_gt::fold_range, | |
47867 | foperator_unordered_ge::fold_range, | |
47868 | foperator_unordered_equal::fold_range): Call the ordered | |
47869 | fold_range on ranges with cleared NaNs. | |
47870 | * value-query.cc (range_query::get_tree_range): Handle also | |
47871 | COMPARISON_CLASS_P trees. | |
47872 | ||
47873 | 2023-03-31 Kito Cheng <kito.cheng@sifive.com> | |
47874 | Andrew Pinski <pinskia@gmail.com> | |
47875 | ||
47876 | PR target/109328 | |
47877 | * config/riscv/t-riscv: Add missing dependencies. | |
47878 | ||
47879 | 2023-03-31 liuhongt <hongtao.liu@intel.com> | |
47880 | ||
47881 | * config/i386/i386.cc (inline_memory_move_cost): Return 100 | |
47882 | for MASK_REGS when MODE_SIZE > 8. | |
47883 | ||
47884 | 2023-03-31 liuhongt <hongtao.liu@intel.com> | |
47885 | ||
47886 | PR target/85048 | |
47887 | * config/i386/i386-builtin.def (BDESC): Adjust icode name from | |
47888 | ufloat/ufix to floatuns/fixuns. | |
47889 | * config/i386/i386-expand.cc | |
47890 | (ix86_expand_vector_convert_uns_vsivsf): Adjust comments. | |
47891 | * config/i386/sse.md | |
47892 | (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>): | |
47893 | Renamed to .. | |
47894 | (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this. | |
47895 | (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>): | |
47896 | Renamed to .. | |
47897 | (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>): | |
47898 | .. this. | |
47899 | (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>): | |
47900 | Renamed to .. | |
47901 | (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this. | |
47902 | (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to .. | |
47903 | (floatuns<si2dfmodelower><mode>2<mask_name>): .. this. | |
47904 | (ufloatv2siv2df2<mask_name>): Renamed to .. | |
47905 | (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this. | |
47906 | (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>): | |
47907 | Renamed to .. | |
47908 | (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>): | |
47909 | .. this. | |
47910 | (ufix_notruncv2dfv2si2): Renamed to .. | |
47911 | (fixuns_notruncv2dfv2si2):.. this. | |
47912 | (ufix_notruncv2dfv2si2_mask): Renamed to .. | |
47913 | (fixuns_notruncv2dfv2si2_mask): .. this. | |
47914 | (*ufix_notruncv2dfv2si2_mask_1): Renamed to .. | |
47915 | (*fixuns_notruncv2dfv2si2_mask_1): .. this. | |
47916 | (ufix_truncv2dfv2si2): Renamed to .. | |
47917 | (*fixuns_truncv2dfv2si2): .. this. | |
47918 | (ufix_truncv2dfv2si2_mask): Renamed to .. | |
47919 | (fixuns_truncv2dfv2si2_mask): .. this. | |
47920 | (*ufix_truncv2dfv2si2_mask_1): Renamed to .. | |
47921 | (*fixuns_truncv2dfv2si2_mask_1): .. this. | |
47922 | (ufix_truncv4dfv4si2<mask_name>): Renamed to .. | |
47923 | (fixuns_truncv4dfv4si2<mask_name>): .. this. | |
47924 | (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>): | |
47925 | Renamed to .. | |
47926 | (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>): | |
47927 | .. this. | |
47928 | (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to .. | |
47929 | (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>): | |
47930 | .. this. | |
47931 | ||
47932 | 2023-03-30 Andrew MacLeod <amacleod@redhat.com> | |
47933 | ||
47934 | PR tree-optimization/109154 | |
47935 | * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit. | |
47936 | * gimple-range-gori.h (may_recompute_p): Add depth param. | |
47937 | * params.opt (ranger-recompute-depth): New param. | |
47938 | ||
47939 | 2023-03-30 Jason Merrill <jason@redhat.com> | |
47940 | ||
47941 | PR c++/107897 | |
47942 | PR c++/108887 | |
47943 | * cgraph.h: Move reset() from cgraph_node to symtab_node. | |
47944 | * cgraphunit.cc (symtab_node::reset): Adjust. Also call | |
47945 | remove_from_same_comdat_group. | |
47946 | ||
47947 | 2023-03-30 Richard Biener <rguenther@suse.de> | |
47948 | ||
47949 | PR tree-optimization/107561 | |
47950 | * gimple-ssa-warn-access.cc (get_size_range): Add flags | |
47951 | argument and pass it on. | |
47952 | (check_access): When querying for the size range pass | |
47953 | SR_ALLOW_ZERO when the known destination size is zero. | |
47954 | ||
47955 | 2023-03-30 Richard Biener <rguenther@suse.de> | |
47956 | ||
47957 | PR tree-optimization/109342 | |
47958 | * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New | |
47959 | overload for edge. When that edge is a backedge use | |
47960 | dominated_by_p directly. | |
47961 | ||
47962 | 2023-03-30 liuhongt <hongtao.liu@intel.com> | |
47963 | ||
47964 | * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate | |
47965 | vpblendd instead of vpblendw for V4SI under avx2. | |
47966 | ||
47967 | 2023-03-29 Hans-Peter Nilsson <hp@axis.com> | |
47968 | ||
47969 | * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0 | |
47970 | for many quick operands, for register-sized modes. | |
47971 | ||
47972 | 2023-03-29 Jiawei <jiawei@iscas.ac.cn> | |
47973 | ||
47974 | * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): | |
47975 | New check. | |
47976 | ||
47977 | 2023-03-29 Martin Liska <mliska@suse.cz> | |
47978 | ||
47979 | PR bootstrap/109310 | |
47980 | * configure.ac: Emit a warning for deprecated option | |
47981 | --enable-link-mutex. | |
47982 | * configure: Regenerate. | |
47983 | ||
47984 | 2023-03-29 Richard Biener <rguenther@suse.de> | |
47985 | ||
47986 | PR tree-optimization/109331 | |
47987 | * tree-ssa-forwprop.cc (pass_forwprop::execute): When we | |
47988 | discover a taken edge make sure to cleanup the CFG. | |
47989 | ||
47990 | 2023-03-29 Richard Biener <rguenther@suse.de> | |
47991 | ||
47992 | PR tree-optimization/109327 | |
47993 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with | |
47994 | already removed stmts when draining to_remove. | |
47995 | ||
47996 | 2023-03-29 Richard Biener <rguenther@suse.de> | |
47997 | ||
47998 | PR ipa/106124 | |
47999 | * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN | |
48000 | so we can re-create the DIE for the type if required. | |
48001 | ||
48002 | 2023-03-29 Jakub Jelinek <jakub@redhat.com> | |
48003 | Richard Biener <rguenther@suse.de> | |
48004 | ||
48005 | PR tree-optimization/109301 | |
48006 | * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change | |
48007 | properties_provided from PROP_gimple_opt_math to 0. | |
48008 | (pass_data_expand_powcabs): Change properties_provided from 0 to | |
48009 | PROP_gimple_opt_math. | |
48010 | ||
48011 | 2023-03-29 Richard Biener <rguenther@suse.de> | |
48012 | ||
48013 | PR tree-optimization/109154 | |
48014 | * tree-if-conv.cc (gen_phi_arg_condition): Handle single | |
48015 | inverted condition specially by inverting at the caller. | |
48016 | (gen_phi_arg_condition): Swap COND_EXPR arms if requested. | |
48017 | ||
48018 | 2023-03-28 David Malcolm <dmalcolm@redhat.com> | |
48019 | ||
48020 | PR c/107002 | |
48021 | * diagnostic-show-locus.cc (column_range::column_range): Factor | |
48022 | out assertion conditional into... | |
48023 | (column_range::valid_p): ...this new function. | |
48024 | (line_corrections::add_hint): Don't attempt to consolidate hints | |
48025 | if it would lead to invalid column_range instances. | |
48026 | ||
48027 | 2023-03-28 Kito Cheng <kito.cheng@sifive.com> | |
48028 | ||
48029 | PR target/109312 | |
48030 | * config/riscv/riscv-c.cc (riscv_ext_version_value): New. | |
48031 | (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and | |
48032 | minor refactor. | |
48033 | ||
48034 | 2023-03-28 Alexander Monakov <amonakov@ispras.ru> | |
48035 | ||
48036 | PR rtl-optimization/109187 | |
48037 | * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing | |
48038 | subtraction in three-way comparison. | |
48039 | ||
48040 | 2023-03-28 Andrew MacLeod <amacleod@redhat.com> | |
48041 | ||
48042 | PR tree-optimization/109265 | |
48043 | PR tree-optimization/109274 | |
48044 | * gimple-range-gori.cc (gori_compute::compute_operand_range): Do | |
48045 | not create a relation record is op1 and op2 are the same symbol. | |
48046 | (gori_compute::compute_operand1_range): Pass op1 == op2 to the | |
48047 | handler for this stmt, but create a new record only if this statement | |
48048 | generates a relation based on the ranges. | |
48049 | (gori_compute::compute_operand2_range): Ditto. | |
48050 | * value-relation.h (value_relation::set_relation): Always create the | |
48051 | record that is requested. | |
48052 | ||
48053 | 2023-03-28 Richard Biener <rguenther@suse.de> | |
48054 | ||
48055 | PR tree-optimization/107087 | |
48056 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Track | |
48057 | executable regions to avoid useless work and to better | |
48058 | propagate degenerate PHIs. | |
48059 | ||
48060 | 2023-03-28 Costas Argyris <costas.argyris@gmail.com> | |
48061 | ||
48062 | * config/i386/x-mingw32-utf8: update comments. | |
48063 | ||
48064 | 2023-03-28 Richard Sandiford <richard.sandiford@arm.com> | |
48065 | ||
48066 | PR target/109072 | |
48067 | * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare. | |
48068 | * config/aarch64/aarch64.h (machine_function::vector_load_decls): New | |
48069 | variable. | |
48070 | * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg): | |
48071 | New function. | |
48072 | (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until | |
48073 | after inlining. Record which decls are loaded from. Fix handling | |
48074 | of vops for loads and stores. | |
48075 | * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function. | |
48076 | (aarch64_accesses_vector_load_decl_p): Likewise. | |
48077 | (aarch64_vector_costs::m_stores_to_vector_load_decl): New member | |
48078 | variable. | |
48079 | (aarch64_vector_costs::add_stmt_cost): If the function has a vld1 | |
48080 | that loads from a decl, treat vector stores to those decls as | |
48081 | zero cost. | |
48082 | (aarch64_vector_costs::finish_cost): ...and in that case, | |
48083 | if the vector code does nothing more than a store, give the | |
48084 | prologue a zero cost as well. | |
48085 | ||
48086 | 2023-03-28 Richard Biener <rguenther@suse.de> | |
48087 | ||
48088 | PR bootstrap/84402 | |
48089 | PR tree-optimization/108129 | |
48090 | * genmatch.cc (lower_for): For (match ...) delay | |
48091 | substituting into the match operator if possible. | |
48092 | (dt_operand::gen_gimple_expr): For user_id look at the | |
48093 | first substitute for determining how to access operands. | |
48094 | (dt_operand::gen_generic_expr): Likewise. | |
48095 | (dt_node::gen_kids): Properly sort user_ids according | |
48096 | to their substitutes. | |
48097 | (dt_node::gen_kids_1): Code-generate user_id matching. | |
48098 | ||
48099 | 2023-03-28 Jakub Jelinek <jakub@redhat.com> | |
48100 | Jonathan Wakely <jwakely@redhat.com> | |
48101 | ||
48102 | * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap): | |
48103 | Use subcommand rather than sub-command in function comments. | |
48104 | ||
48105 | 2023-03-28 Jakub Jelinek <jakub@redhat.com> | |
48106 | ||
48107 | PR tree-optimization/109154 | |
48108 | * value-range.h (frange::flush_denormals_to_zero): Make it public | |
48109 | rather than private. | |
48110 | * value-range.cc (frange::set): Don't call flush_denormals_to_zero | |
48111 | here. | |
48112 | * range-op-float.cc (range_operator_float::fold_range): Call | |
48113 | flush_denormals_to_zero. | |
48114 | ||
48115 | 2023-03-28 Jakub Jelinek <jakub@redhat.com> | |
48116 | ||
48117 | PR middle-end/106190 | |
48118 | * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any | |
48119 | of the IFN_{UB,HWA,A}SAN_* internal fns are lowered. | |
48120 | ||
48121 | 2023-03-28 Jakub Jelinek <jakub@redhat.com> | |
48122 | ||
48123 | * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state | |
48124 | as 4th argument to set to avoid clear_nan and union_ calls. | |
48125 | ||
48126 | 2023-03-28 Jakub Jelinek <jakub@redhat.com> | |
48127 | ||
48128 | PR target/109276 | |
48129 | * config/i386/i386.cc (assign_386_stack_local): For DImode | |
48130 | with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass | |
48131 | align 32 rather than 0 to assign_stack_local. | |
48132 | ||
48133 | 2023-03-28 Eric Botcazou <ebotcazou@adacore.com> | |
48134 | ||
48135 | PR target/109140 | |
48136 | * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition | |
48137 | on operand #3 to get the final condition code. Use std::swap. | |
48138 | * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander. | |
48139 | (fucmp<gcond:code>8<P:mode>_vis): Move around. | |
48140 | (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise. | |
48141 | (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander. | |
48142 | ||
48143 | 2023-03-28 Eric Botcazou <ebotcazou@adacore.com> | |
48144 | ||
48145 | * doc/gm2.texi: Add missing Next, Previous and Top fields to most | |
48146 | top-level sections. | |
48147 | ||
48148 | 2023-03-28 Costas Argyris <costas.argyris@gmail.com> | |
48149 | ||
48150 | * config.host: Pull in i386/x-mingw32-utf8 Makefile | |
48151 | fragment and reference utf8rc-mingw32.o explicitly | |
48152 | for mingw hosts. | |
48153 | * config/i386/sym-mingw32.cc: prevent name mangling of | |
48154 | stub symbol. | |
48155 | * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o | |
48156 | depend on manifest file explicitly. | |
48157 | ||
48158 | 2023-03-28 Richard Biener <rguenther@suse.de> | |
48159 | ||
48160 | Revert: | |
48161 | 2023-03-27 Richard Biener <rguenther@suse.de> | |
48162 | ||
48163 | PR rtl-optimization/109237 | |
48164 | * cfgcleanup.cc (bb_is_just_return): Walk insns backwards. | |
48165 | ||
48166 | 2023-03-28 Richard Biener <rguenther@suse.de> | |
48167 | ||
48168 | * common.opt (gdwarf): Remove Negative(gdwarf-). | |
48169 | ||
48170 | 2023-03-28 Richard Biener <rguenther@suse.de> | |
48171 | ||
48172 | * common.opt (gdwarf): Add RejectNegative. | |
48173 | (gdwarf-): Likewise. | |
48174 | (ggdb): Likewise. | |
48175 | (gvms): Likewise. | |
48176 | ||
48177 | 2023-03-28 Hans-Peter Nilsson <hp@axis.com> | |
48178 | ||
48179 | * config/cris/constraints.md ("T"): Correct to | |
48180 | define_memory_constraint. | |
48181 | ||
48182 | 2023-03-28 Hans-Peter Nilsson <hp@axis.com> | |
48183 | ||
48184 | * config/cris/cris.md (BW2): New mode-iterator. | |
48185 | (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New | |
48186 | peephole2s. | |
48187 | ||
48188 | 2023-03-28 Hans-Peter Nilsson <hp@axis.com> | |
48189 | ||
48190 | * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only | |
48191 | for possible eliminable compares. | |
48192 | ||
48193 | 2023-03-28 Hans-Peter Nilsson <hp@axis.com> | |
48194 | ||
48195 | * config/cris/constraints.md ("R"): Remove unused constraint. | |
48196 | ||
48197 | 2023-03-27 Jonathan Wakely <jwakely@redhat.com> | |
48198 | ||
48199 | PR gcov-profile/109297 | |
48200 | * gcov-tool.cc (merge_usage): Fix "subcomand" typo. | |
48201 | (merge_stream_usage): Likewise. | |
48202 | (overlap_usage): Likewise. | |
48203 | ||
48204 | 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu> | |
48205 | ||
48206 | PR target/109296 | |
48207 | * config/riscv/thead.md: Add missing mode specifiers. | |
48208 | ||
48209 | 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
48210 | Jiangning Liu <jiangning.liu@amperecomputing.com> | |
48211 | Manolis Tsamis <manolis.tsamis@vrull.eu> | |
48212 | ||
48213 | * config/aarch64/aarch64.cc: Update vector costs for ampere1. | |
48214 | ||
48215 | 2023-03-27 Richard Biener <rguenther@suse.de> | |
48216 | ||
48217 | PR rtl-optimization/109237 | |
48218 | * cfgcleanup.cc (bb_is_just_return): Walk insns backwards. | |
48219 | ||
48220 | 2023-03-27 Richard Biener <rguenther@suse.de> | |
48221 | ||
48222 | PR lto/109263 | |
48223 | * lto-wrapper.cc (run_gcc): Parse alternate debug options | |
48224 | as well, they always enable debug. | |
48225 | ||
48226 | 2023-03-27 Kewen Lin <linkw@linux.ibm.com> | |
48227 | ||
48228 | PR target/109167 | |
48229 | * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation | |
48230 | from ... | |
48231 | (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly. | |
48232 | ||
48233 | 2023-03-27 Kewen Lin <linkw@linux.ibm.com> | |
48234 | ||
48235 | PR target/109082 | |
48236 | * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less | |
48237 | than zero when calling vec_sld. | |
48238 | (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than | |
48239 | zero when calling vec_sld. | |
48240 | (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger | |
48241 | than zero when calling vec_sld. | |
48242 | ||
48243 | 2023-03-27 Sandra Loosemore <sandra@codesourcery.com> | |
48244 | ||
48245 | * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE, | |
48246 | OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed | |
48247 | loops are represented and which fields are vectors. Add | |
48248 | documentation for OMP_FOR_PRE_BODY field. Document internal | |
48249 | form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR. | |
48250 | * tree.def (OMP_FOR): Make documentation consistent with the | |
48251 | Texinfo manual, to fill some gaps and correct errors. | |
48252 | ||
48253 | 2023-03-26 Andreas Schwab <schwab@linux-m68k.org> | |
48254 | ||
48255 | PR target/106282 | |
48256 | * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define. | |
48257 | * config/m68k/m68k.cc (m68k_final_prescan_insn): Define. | |
48258 | (handle_move_double): Call it before handle_movsi. | |
48259 | * config/m68k/m68k-protos.h: Declare it. | |
48260 | ||
48261 | 2023-03-26 Jakub Jelinek <jakub@redhat.com> | |
48262 | ||
48263 | PR tree-optimization/109230 | |
48264 | * match.pd (fneg/fadd simplify): Verify also odd permutation indexes. | |
48265 | ||
48266 | 2023-03-26 Jakub Jelinek <jakub@redhat.com> | |
48267 | ||
48268 | PR ipa/105685 | |
48269 | * predict.cc (compute_function_frequency): Don't call | |
48270 | warn_function_cold if function already has cold attribute. | |
48271 | ||
48272 | 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com> | |
48273 | ||
48274 | * doc/install.texi: Remove anachronistic note | |
48275 | related to languages built and separate source tarballs. | |
48276 | ||
48277 | 2023-03-25 David Malcolm <dmalcolm@redhat.com> | |
48278 | ||
48279 | PR analyzer/109098 | |
48280 | * diagnostic-format-sarif.cc (read_until_eof): Delete. | |
48281 | (maybe_read_file): Delete. | |
48282 | (sarif_builder::maybe_make_artifact_content_object): Use | |
48283 | get_source_file_content rather than maybe_read_file. | |
48284 | Reject it if it's not valid UTF-8. | |
48285 | * input.cc (file_cache_slot::get_full_file_content): New. | |
48286 | (get_source_file_content): New. | |
48287 | (selftest::check_cpp_valid_utf8_p): New. | |
48288 | (selftest::test_cpp_valid_utf8_p): New. | |
48289 | (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p. | |
48290 | * input.h (get_source_file_content): New prototype. | |
48291 | ||
48292 | 2023-03-24 David Malcolm <dmalcolm@redhat.com> | |
48293 | ||
48294 | * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful | |
48295 | debugging options. | |
48296 | (Special Functions for Debugging the Analyzer): Convert to a | |
48297 | table, and rewrite in places. | |
48298 | (Other Debugging Techniques): Add notes on how to compare two | |
48299 | different exploded graphs. | |
48300 | ||
48301 | 2023-03-24 David Malcolm <dmalcolm@redhat.com> | |
48302 | ||
48303 | PR other/109163 | |
48304 | * json.cc: Update comments to indicate that we now preserve | |
48305 | insertion order of keys within objects. | |
48306 | (object::print): Traverse keys in insertion order. | |
48307 | (object::set): Preserve insertion order of keys. | |
48308 | (selftest::test_writing_objects): Add an additional key to verify | |
48309 | that we preserve insertion order. | |
48310 | * json.h (object::m_keys): New field. | |
48311 | ||
48312 | 2023-03-24 Andrew MacLeod <amacleod@redhat.com> | |
48313 | ||
48314 | PR tree-optimization/109238 | |
48315 | * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore | |
48316 | predecessors which this block dominates. | |
48317 | ||
48318 | 2023-03-24 Richard Biener <rguenther@suse.de> | |
48319 | ||
48320 | PR tree-optimization/106912 | |
48321 | * tree-profile.cc (tree_profiling): Update stmts only when | |
48322 | profiling or testing coverage. Make sure to update calls | |
48323 | fntype, stripping 'const' there. | |
48324 | ||
48325 | 2023-03-24 Jakub Jelinek <jakub@redhat.com> | |
48326 | ||
48327 | PR middle-end/109258 | |
48328 | * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early | |
48329 | if target == const0_rtx. | |
48330 | ||
48331 | 2023-03-24 Alexandre Oliva <oliva@adacore.com> | |
48332 | ||
48333 | * doc/sourcebuild.texi (weak_undefined, posix_memalign): | |
48334 | Document options and effective targets. | |
48335 | ||
48336 | 2023-03-24 Costas Argyris <costas.argyris@gmail.com> | |
48337 | ||
48338 | * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL | |
48339 | optional. | |
48340 | ||
48341 | 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com> | |
48342 | ||
48343 | * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add | |
48344 | non-earlyclobber alternative. | |
48345 | ||
48346 | 2023-03-23 Andrew Pinski <apinski@marvell.com> | |
48347 | ||
48348 | PR c/84900 | |
48349 | * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR | |
48350 | as a lvalue. | |
48351 | ||
48352 | 2023-03-23 Richard Biener <rguenther@suse.de> | |
48353 | ||
48354 | PR tree-optimization/107569 | |
48355 | * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): | |
48356 | Do not push SSA names with zero uses as available leader. | |
48357 | (process_bb): Likewise. | |
48358 | ||
48359 | 2023-03-23 Richard Biener <rguenther@suse.de> | |
48360 | ||
48361 | PR tree-optimization/109262 | |
48362 | * tree-ssa-forwprop.cc (pass_forwprop::execute): When | |
48363 | combining a piecewise complex load avoid touching loads | |
48364 | that throw internally. Use fun, not cfun throughout. | |
48365 | ||
48366 | 2023-03-23 Jakub Jelinek <jakub@redhat.com> | |
48367 | ||
48368 | * value-range.cc (irange::irange_union, irange::intersect): Fix | |
48369 | comment spelling bugs. | |
48370 | * gimple-range-trace.cc (range_tracer::do_header): Likewise. | |
48371 | * gimple-range-trace.h: Likewise. | |
48372 | * gimple-range-edge.cc: Likewise. | |
48373 | (gimple_outgoing_range_stmt_p, | |
48374 | gimple_outgoing_range::switch_edge_range, | |
48375 | gimple_outgoing_range::edge_range_p): Likewise. | |
48376 | * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies, | |
48377 | gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer, | |
48378 | assume_query::assume_query, assume_query::calculate_phi): Likewise. | |
48379 | * gimple-range-edge.h: Likewise. | |
48380 | * value-range.h (Value_Range::set, Value_Range::lower_bound, | |
48381 | Value_Range::upper_bound, frange::set_undefined): Likewise. | |
48382 | * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing, | |
48383 | gori_compute): Likewise. | |
48384 | * gimple-range-fold.h (fold_using_range): Likewise. | |
48385 | * gimple-range-path.cc (path_range_query::compute_ranges_in_phis): | |
48386 | Likewise. | |
48387 | * gimple-range-gori.cc (range_def_chain::in_chain_p, | |
48388 | range_def_chain::dump, gori_map::calculate_gori, | |
48389 | gori_compute::compute_operand_range_switch, | |
48390 | gori_compute::logical_combine, gori_compute::refine_using_relation, | |
48391 | gori_compute::compute_operand1_range, gori_compute::may_recompute_p): | |
48392 | Likewise. | |
48393 | * gimple-range.h: Likewise. | |
48394 | (enable_ranger): Likewise. | |
48395 | * range-op.h (empty_range_varying): Likewise. | |
48396 | * value-query.h (value_query): Likewise. | |
48397 | * gimple-range-cache.cc (block_range_cache::set_bb_range, | |
48398 | block_range_cache::dump, ssa_global_cache::clear_global_range, | |
48399 | temporal_cache::temporal_value, temporal_cache::current_p, | |
48400 | ranger_cache::range_of_def, ranger_cache::propagate_updated_value, | |
48401 | ranger_cache::range_from_dom, ranger_cache::register_inferred_value): | |
48402 | Likewise. | |
48403 | * gimple-range-fold.cc (fur_edge::get_phi_operand, | |
48404 | fur_stmt::get_operand, gimple_range_adjustment, | |
48405 | fold_using_range::range_of_phi, | |
48406 | fold_using_range::relation_fold_and_or): Likewise. | |
48407 | * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise. | |
48408 | * value-query.cc (range_query::value_of_expr, | |
48409 | range_query::value_on_edge, range_query::query_relation): Likewise. | |
48410 | * tree-vrp.cc (remove_unreachable::remove_and_update_globals, | |
48411 | intersect_range_with_nonzero_bits): Likewise. | |
48412 | * gimple-range-infer.cc (gimple_infer_range::check_assume_func, | |
48413 | exit_range): Likewise. | |
48414 | * value-relation.h: Likewise. | |
48415 | (equiv_oracle, relation_trio::relation_trio, value_relation, | |
48416 | value_relation::value_relation, pe_min): Likewise. | |
48417 | * range-op-float.cc (range_operator_float::rv_fold, | |
48418 | frange_arithmetic, foperator_unordered_equal::op1_range, | |
48419 | foperator_div::rv_fold): Likewise. | |
48420 | * gimple-range-op.cc (cfn_clz::fold_range): Likewise. | |
48421 | * value-relation.cc (equiv_oracle::query_relation, | |
48422 | equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block, | |
48423 | value_relation::apply_transitive, relation_chain_head::find_relation, | |
48424 | dom_oracle::query_relation, dom_oracle::find_relation_block, | |
48425 | dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise. | |
48426 | * range-op.cc (range_operator::wi_fold_in_parts_equiv, | |
48427 | create_possibly_reversed_range, adjust_op1_for_overflow, | |
48428 | operator_mult::wi_fold, operator_exact_divide::op1_range, | |
48429 | operator_cast::lhs_op1_relation, operator_cast::fold_pair, | |
48430 | operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests, | |
48431 | range_op_lshift_tests): Likewise. | |
48432 | ||
48433 | 2023-03-23 Andrew Stubbs <ams@codesourcery.com> | |
48434 | ||
48435 | * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs. | |
48436 | (move_callee_saved_registers): Detect the bug condition early. | |
48437 | ||
48438 | 2023-03-23 Andrew Stubbs <ams@codesourcery.com> | |
48439 | ||
48440 | * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New. | |
48441 | * config/gcn/gcn-valu.md (V_1REG_ALT): New. | |
48442 | (V_2REG_ALT): New. | |
48443 | (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New. | |
48444 | (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New. | |
48445 | (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns. | |
48446 | * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New. | |
48447 | * config/gcn/predicates.md (ascending_zero_int_parallel): New. | |
48448 | ||
48449 | 2023-03-23 Jakub Jelinek <jakub@redhat.com> | |
48450 | ||
48451 | PR tree-optimization/109176 | |
48452 | * tree-vect-generic.cc (expand_vector_condition): If a has | |
48453 | vector boolean type and is a comparison, also check if both | |
48454 | the comparison and VEC_COND_EXPR could be successfully expanded | |
48455 | individually. | |
48456 | ||
48457 | 2023-03-23 Pan Li <pan2.li@intel.com> | |
48458 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48459 | ||
48460 | PR target/108654 | |
48461 | PR target/108185 | |
48462 | * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size | |
48463 | for vector mask modes. | |
48464 | * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New. | |
48465 | * config/riscv/riscv.h (riscv_v_adjust_bytesize): New. | |
48466 | ||
48467 | 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com> | |
48468 | ||
48469 | * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'. | |
48470 | ||
48471 | 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48472 | ||
48473 | PR target/109244 | |
48474 | * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global. | |
48475 | (emit_vlmax_op): Ditto. | |
48476 | * config/riscv/riscv-v.cc (get_sew): New function. | |
48477 | (emit_vlmax_vsetvl): Adapt function. | |
48478 | (emit_pred_op): Ditto. | |
48479 | (emit_vlmax_op): Ditto. | |
48480 | (emit_nonvlmax_op): Ditto. | |
48481 | (legitimize_move): Fix LRA ICE. | |
48482 | (gen_no_side_effects_vsetvl_rtx): Adapt function. | |
48483 | * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern. | |
48484 | (@mov<VB:mode><P:mode>_lra): Ditto. | |
48485 | (*mov<V_FRACT:mode><P:mode>_lra): Ditto. | |
48486 | (*mov<VB:mode><P:mode>_lra): Ditto. | |
48487 | ||
48488 | 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48489 | ||
48490 | PR target/109228 | |
48491 | * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add | |
48492 | __riscv_vlenb support. | |
48493 | (BASE): Ditto. | |
48494 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
48495 | * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto. | |
48496 | * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto. | |
48497 | (SHAPE): Ditto. | |
48498 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
48499 | * config/riscv/riscv-vector-builtins.cc: Ditto. | |
48500 | ||
48501 | 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48502 | kito-cheng <kito.cheng@sifive.com> | |
48503 | ||
48504 | * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs. | |
48505 | (pass_vsetvl::compute_local_backward_infos): Fix bugs. | |
48506 | (pass_vsetvl::need_vsetvl): Fix bugs. | |
48507 | (pass_vsetvl::backward_demand_fusion): Fix bugs. | |
48508 | (pass_vsetvl::demand_fusion): Fix bugs. | |
48509 | (eliminate_insn): Fix bugs. | |
48510 | (insert_vsetvl): Ditto. | |
48511 | (pass_vsetvl::emit_local_forward_vsetvls): Ditto. | |
48512 | * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto. | |
48513 | * config/riscv/vector.md: Ditto. | |
48514 | ||
48515 | 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48516 | kito-cheng <kito.cheng@sifive.com> | |
48517 | ||
48518 | * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug. | |
48519 | * config/riscv/vector-iterators.md (nmsac): Ditto. | |
48520 | (nmsub): Ditto. | |
48521 | (msac): Ditto. | |
48522 | (msub): Ditto. | |
48523 | (nmadd): Ditto. | |
48524 | (nmacc): Ditto. | |
48525 | * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto. | |
48526 | (@pred_mul_plus<mode>): Ditto. | |
48527 | (*pred_madd<mode>): Ditto. | |
48528 | (*pred_macc<mode>): Ditto. | |
48529 | (*pred_mul_plus<mode>): Ditto. | |
48530 | (@pred_mul_plus<mode>_scalar): Ditto. | |
48531 | (*pred_madd<mode>_scalar): Ditto. | |
48532 | (*pred_macc<mode>_scalar): Ditto. | |
48533 | (*pred_mul_plus<mode>_scalar): Ditto. | |
48534 | (*pred_madd<mode>_extended_scalar): Ditto. | |
48535 | (*pred_macc<mode>_extended_scalar): Ditto. | |
48536 | (*pred_mul_plus<mode>_extended_scalar): Ditto. | |
48537 | (@pred_minus_mul<mode>): Ditto. | |
48538 | (*pred_<madd_nmsub><mode>): Ditto. | |
48539 | (*pred_nmsub<mode>): Ditto. | |
48540 | (*pred_<macc_nmsac><mode>): Ditto. | |
48541 | (*pred_nmsac<mode>): Ditto. | |
48542 | (*pred_mul_<optab><mode>): Ditto. | |
48543 | (*pred_minus_mul<mode>): Ditto. | |
48544 | (@pred_mul_<optab><mode>_scalar): Ditto. | |
48545 | (@pred_minus_mul<mode>_scalar): Ditto. | |
48546 | (*pred_<madd_nmsub><mode>_scalar): Ditto. | |
48547 | (*pred_nmsub<mode>_scalar): Ditto. | |
48548 | (*pred_<macc_nmsac><mode>_scalar): Ditto. | |
48549 | (*pred_nmsac<mode>_scalar): Ditto. | |
48550 | (*pred_mul_<optab><mode>_scalar): Ditto. | |
48551 | (*pred_minus_mul<mode>_scalar): Ditto. | |
48552 | (*pred_<madd_nmsub><mode>_extended_scalar): Ditto. | |
48553 | (*pred_nmsub<mode>_extended_scalar): Ditto. | |
48554 | (*pred_<macc_nmsac><mode>_extended_scalar): Ditto. | |
48555 | (*pred_nmsac<mode>_extended_scalar): Ditto. | |
48556 | (*pred_mul_<optab><mode>_extended_scalar): Ditto. | |
48557 | (*pred_minus_mul<mode>_extended_scalar): Ditto. | |
48558 | (*pred_<madd_msub><mode>): Ditto. | |
48559 | (*pred_<macc_msac><mode>): Ditto. | |
48560 | (*pred_<madd_msub><mode>_scalar): Ditto. | |
48561 | (*pred_<macc_msac><mode>_scalar): Ditto. | |
48562 | (@pred_neg_mul_<optab><mode>): Ditto. | |
48563 | (@pred_mul_neg_<optab><mode>): Ditto. | |
48564 | (*pred_<nmadd_msub><mode>): Ditto. | |
48565 | (*pred_<nmsub_nmadd><mode>): Ditto. | |
48566 | (*pred_<nmacc_msac><mode>): Ditto. | |
48567 | (*pred_<nmsac_nmacc><mode>): Ditto. | |
48568 | (*pred_neg_mul_<optab><mode>): Ditto. | |
48569 | (*pred_mul_neg_<optab><mode>): Ditto. | |
48570 | (@pred_neg_mul_<optab><mode>_scalar): Ditto. | |
48571 | (@pred_mul_neg_<optab><mode>_scalar): Ditto. | |
48572 | (*pred_<nmadd_msub><mode>_scalar): Ditto. | |
48573 | (*pred_<nmsub_nmadd><mode>_scalar): Ditto. | |
48574 | (*pred_<nmacc_msac><mode>_scalar): Ditto. | |
48575 | (*pred_<nmsac_nmacc><mode>_scalar): Ditto. | |
48576 | (*pred_neg_mul_<optab><mode>_scalar): Ditto. | |
48577 | (*pred_mul_neg_<optab><mode>_scalar): Ditto. | |
48578 | (@pred_widen_neg_mul_<optab><mode>): Ditto. | |
48579 | (@pred_widen_mul_neg_<optab><mode>): Ditto. | |
48580 | (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto. | |
48581 | (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto. | |
48582 | ||
48583 | 2023-03-23 liuhongt <hongtao.liu@intel.com> | |
48584 | ||
48585 | * builtins.cc (builtin_memset_read_str): Replace | |
48586 | targetm.gen_memset_scratch_rtx with gen_reg_rtx. | |
48587 | (builtin_memset_gen_str): Ditto. | |
48588 | * config/i386/i386-expand.cc | |
48589 | (ix86_convert_const_wide_int_to_broadcast): Replace | |
48590 | ix86_gen_scratch_sse_rtx with gen_reg_rtx. | |
48591 | (ix86_expand_vector_move): Ditto. | |
48592 | * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx): | |
48593 | Removed. | |
48594 | * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed. | |
48595 | (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed. | |
48596 | * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX. | |
48597 | * doc/tm.texi.in: Ditto. | |
48598 | * target.def: Ditto. | |
48599 | ||
48600 | 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com> | |
48601 | ||
48602 | * lra.cc (lra): Do not repeat inheritance and live range splitting | |
48603 | when asm error is found. | |
48604 | ||
48605 | 2023-03-22 Andrew Jenner <andrew@codesourcery.com> | |
48606 | ||
48607 | * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn) | |
48608 | (gcn_expand_dpp_distribute_even_insn) | |
48609 | (gcn_expand_dpp_distribute_odd_insn): Declare. | |
48610 | * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>) | |
48611 | (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>) | |
48612 | (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3) | |
48613 | (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4) | |
48614 | (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4) | |
48615 | (fms<mode>4_negop2): New patterns. | |
48616 | * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn) | |
48617 | (gcn_expand_dpp_distribute_even_insn) | |
48618 | (gcn_expand_dpp_distribute_odd_insn): New functions. | |
48619 | * config/gcn/gcn.md: Add entries to unspec enum. | |
48620 | ||
48621 | 2023-03-22 Aldy Hernandez <aldyh@redhat.com> | |
48622 | ||
48623 | PR tree-optimization/109008 | |
48624 | * value-range.cc (frange::set): Add nan_state argument. | |
48625 | * value-range.h (class nan_state): New. | |
48626 | (frange::get_nan_state): New. | |
48627 | ||
48628 | 2023-03-22 Martin Liska <mliska@suse.cz> | |
48629 | ||
48630 | * configure: Regenerate. | |
48631 | ||
48632 | 2023-03-21 Joseph Myers <joseph@codesourcery.com> | |
48633 | ||
48634 | * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE | |
48635 | to variants. | |
48636 | ||
48637 | 2023-03-21 Andrew MacLeod <amacleod@redhat.com> | |
48638 | ||
48639 | PR tree-optimization/109192 | |
48640 | * gimple-range-gori.cc (gori_compute::compute_operand_range): | |
48641 | Terminate gori calculations if a relation is not relevant. | |
48642 | * value-relation.h (value_relation::set_relation): Allow | |
48643 | equality between op1 and op2 if they are the same. | |
48644 | ||
48645 | 2023-03-21 Richard Biener <rguenther@suse.de> | |
48646 | ||
48647 | PR tree-optimization/109219 | |
48648 | * tree-vect-loop.cc (vectorizable_reduction): Check | |
48649 | slp_node, not STMT_SLP_TYPE. | |
48650 | * tree-vect-stmts.cc (vectorizable_condition): Likewise. | |
48651 | * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): | |
48652 | Remove assertion on STMT_SLP_TYPE. | |
48653 | ||
48654 | 2023-03-21 Jakub Jelinek <jakub@redhat.com> | |
48655 | ||
48656 | PR tree-optimization/109215 | |
48657 | * tree.h (enum special_array_member): Adjust comments for int_0 | |
48658 | and trail_0. | |
48659 | * tree.cc (component_ref_sam_type): Clear zero_elts if memtype | |
48660 | has zero sized element type and the array has variable number of | |
48661 | elements or constant one or more elements. | |
48662 | (component_ref_size): Adjust comments, formatting fix. | |
48663 | ||
48664 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48665 | ||
48666 | * configure.ac: Add check for the Texinfo 6.8 | |
48667 | CONTENTS_OUTPUT_LOCATION customization variable and set it if | |
48668 | supported. | |
48669 | * configure: Regenerate. | |
48670 | * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by | |
48671 | configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if | |
48672 | CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise. | |
48673 | ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG. | |
48674 | ||
48675 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48676 | ||
48677 | * doc/extend.texi: Associate use_hazard_barrier_return index | |
48678 | entry with its attribute. | |
48679 | * doc/invoke.texi: Associate -fcanon-prefix-map index entry with | |
48680 | its attribute | |
48681 | ||
48682 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48683 | ||
48684 | * doc/implement-c.texi: Remove usage of @gol. | |
48685 | * doc/invoke.texi: Ditto. | |
48686 | * doc/sourcebuild.texi: Ditto. | |
48687 | * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and | |
48688 | texinfo.tex versions, the bug it was working around appears to | |
48689 | be gone. | |
48690 | ||
48691 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48692 | ||
48693 | * doc/include/texinfo.tex: Update to 2023-01-17.19. | |
48694 | ||
48695 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48696 | ||
48697 | * doc/include/gcc-common.texi: Add @defbuiltin{,x} and | |
48698 | @enddefbuiltin for defining built-in functions. | |
48699 | * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all, | |
48700 | places where it should be used. | |
48701 | ||
48702 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48703 | ||
48704 | * doc/extend.texi (Formatted Output Function Checking): New | |
48705 | subsection for grouping together printf et al. | |
48706 | (Exception handling) Fix missing @ sign before copyright | |
48707 | header, which lead to the copyright line leaking into | |
48708 | '(gcc)Exception handling'. | |
48709 | * doc/gcc.texi: Set document language to en_US. | |
48710 | (@copying): Wrap front cover texts in quotations, move in manual | |
48711 | description text. | |
48712 | ||
48713 | 2023-03-21 Arsen Arsenović <arsen@aarsen.me> | |
48714 | ||
48715 | * doc/gcc.texi: Add the Indices appendix, to make texinfo | |
48716 | generate nice indices overview page. | |
48717 | ||
48718 | 2023-03-21 Richard Biener <rguenther@suse.de> | |
48719 | ||
48720 | PR tree-optimization/109170 | |
48721 | * gimple-range-op.cc (cfn_pass_through_arg1): New. | |
48722 | (gimple_range_op_handler::maybe_builtin_call): Handle | |
48723 | __builtin_expect via cfn_pass_through_arg1. | |
48724 | ||
48725 | 2023-03-20 Michael Meissner <meissner@linux.ibm.com> | |
48726 | ||
48727 | PR target/109067 | |
48728 | * config/rs6000/rs6000.cc (create_complex_muldiv): Delete. | |
48729 | (init_float128_ieee): Delete code to switch complex multiply and divide | |
48730 | for long double. | |
48731 | (complex_multiply_builtin_code): New helper function. | |
48732 | (complex_divide_builtin_code): Likewise. | |
48733 | (rs6000_mangle_decl_assembler_name): Add support for mangling the name | |
48734 | of complex 128-bit multiply and divide built-in functions. | |
48735 | ||
48736 | 2023-03-20 Peter Bergner <bergner@linux.ibm.com> | |
48737 | ||
48738 | PR target/109178 | |
48739 | * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode. | |
48740 | ||
48741 | 2023-03-19 Jonny Grant <jg@jguk.org> | |
48742 | ||
48743 | * doc/extend.texi (Common Function Attributes) <nonnull>: | |
48744 | Correct typo. | |
48745 | ||
48746 | 2023-03-18 Peter Bergner <bergner@linux.ibm.com> | |
48747 | ||
48748 | PR rtl-optimization/109179 | |
48749 | * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug | |
48750 | insn or note. Move the tests earlier to guard lra_get_insn_recog_data. | |
48751 | ||
48752 | 2023-03-17 Jakub Jelinek <jakub@redhat.com> | |
48753 | ||
48754 | PR target/105554 | |
48755 | * function.h (push_struct_function): Add ABSTRACT_P argument defaulted | |
48756 | to false. | |
48757 | * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it | |
48758 | to allocate_struct_function instead of false. | |
48759 | * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS | |
48760 | nor DECL_RESULT here. Pass true as ABSTRACT_P to | |
48761 | push_struct_function. Call targetm.target_option.relayout_function | |
48762 | after it. | |
48763 | (tree_function_versioning): Formatting fix. | |
48764 | ||
48765 | 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com> | |
48766 | ||
48767 | * lra-constraints.cc: Include hooks.h. | |
48768 | (combine_reload_insn): New function. | |
48769 | (lra_constraints): Call it. | |
48770 | ||
48771 | 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48772 | kito-cheng <kito.cheng@sifive.com> | |
48773 | ||
48774 | * config/riscv/riscv-v.cc (legitimize_move): Allow undef value | |
48775 | as legitimate value. | |
48776 | * config/riscv/riscv-vector-builtins.cc | |
48777 | (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic. | |
48778 | (function_expander::use_widen_ternop_insn): Ditto. | |
48779 | * config/riscv/vector.md (@vundefined<mode>): New pattern. | |
48780 | (pred_mul_<optab><mode>_undef_merge): Remove. | |
48781 | (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto. | |
48782 | (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto. | |
48783 | (pred_neg_mul_<optab><mode>_undef_merge): Ditto. | |
48784 | (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto. | |
48785 | ||
48786 | 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
48787 | ||
48788 | PR target/109092 | |
48789 | * config/riscv/riscv.md: Fix subreg bug. | |
48790 | ||
48791 | 2023-03-17 Jakub Jelinek <jakub@redhat.com> | |
48792 | ||
48793 | PR middle-end/108685 | |
48794 | * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument, | |
48795 | use its loop_father rather than BODY_BB's loop_father. | |
48796 | (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller. | |
48797 | If broken_loop with ordered > collapse and at least one of those | |
48798 | extra loops aren't guaranteed to have at least one iteration, change | |
48799 | l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's | |
48800 | loop_father to l0_bb's loop_father rather than l1_bb's. | |
48801 | ||
48802 | 2023-03-17 Jakub Jelinek <jakub@redhat.com> | |
48803 | ||
48804 | PR plugins/108634 | |
48805 | * gdbhooks.py (TreePrinter.to_string): Wrap | |
48806 | gdb.parse_and_eval('tree_code_type') in a try block, parse | |
48807 | and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it | |
48808 | raises exception. Update comments for the recent tree_code_type | |
48809 | changes. | |
48810 | ||
48811 | 2023-03-17 Sandra Loosemore <sandra@codesourcery.com> | |
48812 | ||
48813 | * doc/extend.texi (BPF Built-in Functions): Fix numerous markup | |
48814 | issues. Add more line breaks to example so it doesn't overflow | |
48815 | the margins. | |
48816 | ||
48817 | 2023-03-17 Sandra Loosemore <sandra@codesourcery.com> | |
48818 | ||
48819 | * doc/extend.texi (Common Function Attributes) <access>: Fix bad | |
48820 | line breaks in examples. | |
48821 | <malloc>: Fix bad line breaks in running text, also copy-edit | |
48822 | for consistency. | |
48823 | (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width. | |
48824 | * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced | |
48825 | @gol. | |
48826 | (C++ Dialect Options) <-fcontracts>: Add line break in example. | |
48827 | <-Wctad-maybe-unsupported>: Likewise. | |
48828 | <-Winvalid-constexpr>: Likewise. | |
48829 | (Warning Options) <-Wdangling-pointer>: Likewise. | |
48830 | <-Winterference-size>: Likewise. | |
48831 | <-Wvla-parameter>: Likewise. | |
48832 | (Static Analyzer Options): Fix bad line breaks in running text, | |
48833 | plus add some missing markup. | |
48834 | (Optimize Options) <openacc-privatization>: Fix more bad line | |
48835 | breaks in running text. | |
48836 | ||
48837 | 2023-03-16 Uros Bizjak <ubizjak@gmail.com> | |
48838 | ||
48839 | * config/i386/i386-expand.cc (expand_vec_perm_pblendv): | |
48840 | Handle 8-byte modes only with TARGET_MMX_WITH_SSE. | |
48841 | (expand_vec_perm_2perm_pblendv): Ditto. | |
48842 | ||
48843 | 2023-03-16 Martin Liska <mliska@suse.cz> | |
48844 | ||
48845 | PR middle-end/106133 | |
48846 | * gcc.cc (driver_handle_option): Use x_main_input_basename | |
48847 | if x_dump_base_name is null. | |
48848 | * opts.cc (common_handle_option): Likewise. | |
48849 | ||
48850 | 2023-03-16 Richard Biener <rguenther@suse.de> | |
48851 | ||
48852 | PR tree-optimization/109123 | |
48853 | * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer): | |
48854 | Do not emit -Wuse-after-free late. | |
48855 | (pass_waccess::check_call): Always check call pointer uses. | |
48856 | ||
48857 | 2023-03-16 Richard Biener <rguenther@suse.de> | |
48858 | ||
48859 | PR tree-optimization/109141 | |
48860 | * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New. | |
48861 | * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split | |
48862 | out from ... | |
48863 | (renumber_gimple_stmt_uids): ... here and | |
48864 | (renumber_gimple_stmt_uids_in_blocks): ... here. | |
48865 | * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p): | |
48866 | Use renumber_gimple_stmt_uids_in_block to also assign UIDs | |
48867 | to PHIs. | |
48868 | (pass_waccess::check_pointer_uses): Process all PHIs. | |
48869 | ||
48870 | 2023-03-15 David Malcolm <dmalcolm@redhat.com> | |
48871 | ||
48872 | PR analyzer/109097 | |
48873 | * diagnostic-format-sarif.cc (class sarif_invocation): New. | |
48874 | (class sarif_ice_notification): New. | |
48875 | (sarif_builder::m_invocation_obj): New field. | |
48876 | (sarif_invocation::add_notification_for_ice): New. | |
48877 | (sarif_invocation::prepare_to_flush): New. | |
48878 | (sarif_ice_notification::sarif_ice_notification): New. | |
48879 | (sarif_builder::sarif_builder): Add m_invocation_obj. | |
48880 | (sarif_builder::end_diagnostic): Special-case DK_ICE and | |
48881 | DK_ICE_NOBT. | |
48882 | (sarif_builder::flush_to_file): Call prepare_to_flush on | |
48883 | m_invocation_obj. Pass the latter to make_top_level_object. | |
48884 | (sarif_builder::make_result_object): Move creation of "locations" | |
48885 | array to... | |
48886 | (sarif_builder::make_locations_arr): ...this new function. | |
48887 | (sarif_builder::make_top_level_object): Add "invocation_obj" param | |
48888 | and pass it to make_run_object. | |
48889 | (sarif_builder::make_run_object): Add "invocation_obj" param and | |
48890 | use it. | |
48891 | (sarif_ice_handler): New callback. | |
48892 | (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler. | |
48893 | * diagnostic.cc (diagnostic_initialize): Initialize new field | |
48894 | "ice_handler_cb". | |
48895 | (diagnostic_action_after_output): If it is set, make one attempt | |
48896 | to call ice_handler_cb. | |
48897 | * diagnostic.h (diagnostic_context::ice_handler_cb): New field. | |
48898 | ||
48899 | 2023-03-15 Uros Bizjak <ubizjak@gmail.com> | |
48900 | ||
48901 | * config/i386/i386-expand.cc (expand_vec_perm_blend): | |
48902 | Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode | |
48903 | and fix V2HImode handling. | |
48904 | (expand_vec_perm_1): Try to emit BLEND instruction | |
48905 | before MOVSS/MOVSD. | |
48906 | * config/i386/mmx.md (*mmx_blendps): New insn pattern. | |
48907 | ||
48908 | 2023-03-15 Tobias Burnus <tobias@codesourcery.com> | |
48909 | ||
48910 | * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task. | |
48911 | ||
48912 | 2023-03-15 Richard Biener <rguenther@suse.de> | |
48913 | ||
48914 | * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): | |
48915 | Do not diagnose clobbers. | |
48916 | ||
48917 | 2023-03-15 Richard Biener <rguenther@suse.de> | |
48918 | ||
48919 | PR tree-optimization/109139 | |
48920 | * tree-ssa-live.cc (remove_unused_locals): Look at the | |
48921 | base address for unused decls on the LHS of .DEFERRED_INIT. | |
48922 | ||
48923 | 2023-03-15 Xi Ruoyao <xry111@xry111.site> | |
48924 | ||
48925 | PR other/109086 | |
48926 | * builtins.cc (inline_string_cmp): Force the character | |
48927 | difference into "result" pseudo-register, instead of reassign | |
48928 | the pseudo-register. | |
48929 | ||
48930 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
48931 | ||
48932 | * config.gcc: Add thead.o to RISC-V extra_objs. | |
48933 | * config/riscv/peephole.md: Add mempair peephole passes. | |
48934 | * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New | |
48935 | prototype. | |
48936 | (th_mempair_operands_p): Likewise. | |
48937 | (th_mempair_order_operands): Likewise. | |
48938 | (th_mempair_prepare_save_restore_operands): Likewise. | |
48939 | (th_mempair_save_restore_regs): Likewise. | |
48940 | (th_mempair_output_move): Likewise. | |
48941 | * config/riscv/riscv.cc (riscv_save_reg): Move code. | |
48942 | (riscv_restore_reg): Move code. | |
48943 | (riscv_for_each_saved_reg): Add code to emit mempair insns. | |
48944 | * config/riscv/t-riscv: Add thead.cc. | |
48945 | * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2): | |
48946 | New insn. | |
48947 | (*th_mempair_store_<GPR:mode>2): Likewise. | |
48948 | (*th_mempair_load_extendsidi2): Likewise. | |
48949 | (*th_mempair_load_zero_extendsidi2): Likewise. | |
48950 | * config/riscv/thead.cc: New file. | |
48951 | ||
48952 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
48953 | ||
48954 | * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS) | |
48955 | New constraint "th_f_fmv". | |
48956 | (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint | |
48957 | "th_r_fmv". | |
48958 | * config/riscv/riscv.cc (riscv_split_doubleword_move): | |
48959 | Add split code for XTheadFmv. | |
48960 | (riscv_secondary_memory_needed): XTheadFmv does not need | |
48961 | secondary memory. | |
48962 | * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and | |
48963 | UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to | |
48964 | movdf_hardfloat_rv32. | |
48965 | * config/riscv/thead.md (th_fmv_hw_w_x): New INSN. | |
48966 | (th_fmv_x_w): New INSN. | |
48967 | (th_fmv_x_hw): New INSN. | |
48968 | ||
48969 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
48970 | ||
48971 | * config/riscv/riscv.md (maddhisi4): New expand. | |
48972 | (msubhisi4): New expand. | |
48973 | * config/riscv/thead.md (*th_mula<mode>): New pattern. | |
48974 | (*th_mulawsi): New pattern. | |
48975 | (*th_mulawsi2): New pattern. | |
48976 | (*th_maddhisi4): New pattern. | |
48977 | (*th_sextw_maddhisi4): New pattern. | |
48978 | (*th_muls<mode>): New pattern. | |
48979 | (*th_mulswsi): New pattern. | |
48980 | (*th_mulswsi2): New pattern. | |
48981 | (*th_msubhisi4): New pattern. | |
48982 | (*th_sextw_msubhisi4): New pattern. | |
48983 | ||
48984 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
48985 | ||
48986 | * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator. | |
48987 | * config/riscv/riscv-protos.h (riscv_expand_conditional_move): | |
48988 | Add prototype. | |
48989 | * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for | |
48990 | XTheadCondMov. | |
48991 | (riscv_expand_conditional_move): New function. | |
48992 | (riscv_expand_conditional_move_onesided): New function. | |
48993 | * config/riscv/riscv.md: Add support for XTheadCondMov. | |
48994 | * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add | |
48995 | support for XTheadCondMov. | |
48996 | (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise. | |
48997 | ||
48998 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
48999 | ||
49000 | * config/riscv/bitmanip.md (clzdi2): New expand. | |
49001 | (clzsi2): New expand. | |
49002 | (ctz<mode>2): New expand. | |
49003 | (popcount<mode>2): New expand. | |
49004 | (<bitmanip_optab>si2): Rename INSN. | |
49005 | (*<bitmanip_optab>si2): Hide INSN name. | |
49006 | (<bitmanip_optab>di2): Rename INSN. | |
49007 | (*<bitmanip_optab>di2): Hide INSN name. | |
49008 | (rotrsi3): Remove INSN. | |
49009 | (rotr<mode>3): Add expand. | |
49010 | (*rotrsi3): New INSN. | |
49011 | (rotrdi3): Rename INSN. | |
49012 | (*rotrdi3): Hide INSN name. | |
49013 | (rotrsi3_sext): Rename INSN. | |
49014 | (*rotrsi3_sext): Hide INSN name. | |
49015 | (bswap<mode>2): Remove INSN. | |
49016 | (bswapdi2): Add expand. | |
49017 | (bswapsi2): Add expand. | |
49018 | (*bswap<mode>2): Hide INSN name. | |
49019 | * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign | |
49020 | extraction. | |
49021 | * config/riscv/riscv.md (extv<mode>): New expand. | |
49022 | (extzv<mode>): New expand. | |
49023 | * config/riscv/thead.md (*th_srri<mode>3): New INSN. | |
49024 | (*th_ext<mode>): New INSN. | |
49025 | (*th_extu<mode>): New INSN. | |
49026 | (*th_clz<mode>2): New INSN. | |
49027 | (*th_rev<mode>2): New INSN. | |
49028 | ||
49029 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
49030 | ||
49031 | * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost. | |
49032 | * config/riscv/thead.md (*th_tst<mode>3): New INSN. | |
49033 | ||
49034 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
49035 | ||
49036 | * config/riscv/riscv.md: Include thead.md | |
49037 | * config/riscv/thead.md: New file. | |
49038 | ||
49039 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
49040 | ||
49041 | * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906". | |
49042 | ||
49043 | 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu> | |
49044 | ||
49045 | * common/config/riscv/riscv-common.cc: Add xthead* extensions. | |
49046 | * config/riscv/riscv-opts.h (MASK_XTHEADBA): New. | |
49047 | (MASK_XTHEADBB): New. | |
49048 | (MASK_XTHEADBS): New. | |
49049 | (MASK_XTHEADCMO): New. | |
49050 | (MASK_XTHEADCONDMOV): New. | |
49051 | (MASK_XTHEADFMEMIDX): New. | |
49052 | (MASK_XTHEADFMV): New. | |
49053 | (MASK_XTHEADINT): New. | |
49054 | (MASK_XTHEADMAC): New. | |
49055 | (MASK_XTHEADMEMIDX): New. | |
49056 | (MASK_XTHEADMEMPAIR): New. | |
49057 | (MASK_XTHEADSYNC): New. | |
49058 | (TARGET_XTHEADBA): New. | |
49059 | (TARGET_XTHEADBB): New. | |
49060 | (TARGET_XTHEADBS): New. | |
49061 | (TARGET_XTHEADCMO): New. | |
49062 | (TARGET_XTHEADCONDMOV): New. | |
49063 | (TARGET_XTHEADFMEMIDX): New. | |
49064 | (TARGET_XTHEADFMV): New. | |
49065 | (TARGET_XTHEADINT): New. | |
49066 | (TARGET_XTHEADMAC): New. | |
49067 | (TARGET_XTHEADMEMIDX): New. | |
49068 | (TARGET_XTHEADMEMPAIR): new. | |
49069 | (TARGET_XTHEADSYNC): New. | |
49070 | * config/riscv/riscv.opt: Add riscv_xthead_subext. | |
49071 | ||
49072 | 2023-03-15 Hu, Lin1 <lin1.hu@intel.com> | |
49073 | ||
49074 | PR target/109117 | |
49075 | * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi, | |
49076 | __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi, | |
49077 | __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL. | |
49078 | ||
49079 | 2023-03-14 Jakub Jelinek <jakub@redhat.com> | |
49080 | ||
49081 | PR target/109109 | |
49082 | * config/i386/i386-expand.cc (split_double_concat): Fix splitting | |
49083 | when lo is equal to dhi and hi is a MEM which uses dlo register. | |
49084 | ||
49085 | 2023-03-14 Martin Jambor <mjambor@suse.cz> | |
49086 | ||
49087 | PR ipa/107925 | |
49088 | * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to | |
49089 | global0 instead of zeroing when it does not have as many counts as | |
49090 | it should. | |
49091 | ||
49092 | 2023-03-14 Martin Jambor <mjambor@suse.cz> | |
49093 | ||
49094 | PR ipa/107925 | |
49095 | * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to | |
49096 | ipa count, remove assert, lenient_count_portion_handling, dump | |
49097 | also orig_node_count. | |
49098 | ||
49099 | 2023-03-14 Uros Bizjak <ubizjak@gmail.com> | |
49100 | ||
49101 | * config/i386/i386-expand.cc (expand_vec_perm_movs): | |
49102 | Handle V2SImode for TARGET_MMX_WITH_SSE. | |
49103 | * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss | |
49104 | using V2FI mode iterator to handle both V2SI and V2SF modes. | |
49105 | ||
49106 | 2023-03-14 Sam James <sam@gentoo.org> | |
49107 | ||
49108 | * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by | |
49109 | including <sstream> earlier. | |
49110 | * system.h: Add INCLUDE_SSTREAM. | |
49111 | ||
49112 | 2023-03-14 Richard Biener <rguenther@suse.de> | |
49113 | ||
49114 | * tree-ssa-live.cc (remove_unused_locals): Do not treat | |
49115 | the .DEFERRED_INIT of a variable as use, instead remove | |
49116 | that if it is the only use. | |
49117 | ||
49118 | 2023-03-14 Eric Botcazou <ebotcazou@adacore.com> | |
49119 | ||
49120 | PR rtl-optimization/107762 | |
49121 | * expr.cc (emit_group_store): Revert latest change. | |
49122 | ||
49123 | 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
49124 | ||
49125 | PR tree-optimization/109005 | |
49126 | * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with | |
49127 | aggregate type check. | |
49128 | ||
49129 | 2023-03-14 Jakub Jelinek <jakub@redhat.com> | |
49130 | ||
49131 | PR tree-optimization/109115 | |
49132 | * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use | |
49133 | r.upper_bound () on r.undefined_p () range. | |
49134 | ||
49135 | 2023-03-14 Jan Hubicka <hubicka@ucw.cz> | |
49136 | ||
49137 | PR tree-optimization/106896 | |
49138 | * profile-count.cc (profile_count::to_sreal_scale): Synchronize | |
49139 | implementatoin with probability_in; avoid some asserts. | |
49140 | ||
49141 | 2023-03-13 Max Filippov <jcmvbkbc@gmail.com> | |
49142 | ||
49143 | * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro. | |
49144 | ||
49145 | 2023-03-13 Sean Bright <sean@seanbright.com> | |
49146 | ||
49147 | * doc/invoke.texi (Warning Options): Remove errant 'See' | |
49148 | before @xref. | |
49149 | ||
49150 | 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
49151 | ||
49152 | * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P, | |
49153 | REG_OK_FOR_BASE_P): Remove. | |
49154 | ||
49155 | 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49156 | ||
49157 | * config/riscv/vector-iterators.md (=vd,vr): Fine tune. | |
49158 | (=vd,vd,vr,vr): Ditto. | |
49159 | * config/riscv/vector.md: Ditto. | |
49160 | ||
49161 | 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49162 | ||
49163 | * config/riscv/riscv-vector-builtins.cc | |
49164 | (function_expander::use_compare_insn): Add operand predicate check. | |
49165 | ||
49166 | 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49167 | ||
49168 | * config/riscv/vector.md: Fine tune RA constraints. | |
49169 | ||
49170 | 2023-03-13 Tobias Burnus <tobias@codesourcery.com> | |
49171 | ||
49172 | * config/gcn/mkoffload.cc (main): Pass -save-temps on for the | |
49173 | hsaco assemble/link. | |
49174 | ||
49175 | 2023-03-13 Richard Biener <rguenther@suse.de> | |
49176 | ||
49177 | PR tree-optimization/109046 | |
49178 | * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine | |
49179 | piecewise complex loads. | |
49180 | ||
49181 | 2023-03-12 Jakub Jelinek <jakub@redhat.com> | |
49182 | ||
49183 | * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove. | |
49184 | (aarch64_bf16_ptr_type_node): Adjust comment. | |
49185 | * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use | |
49186 | bfloat16_type_node rather than aarch64_bf16_type_node. | |
49187 | (aarch64_libgcc_floating_mode_supported_p, | |
49188 | aarch64_scalar_mode_supported_p): Also support BFmode. | |
49189 | (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove. | |
49190 | (aarch64_invalid_binary_op): Remove BFmode related rejections. | |
49191 | (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine. | |
49192 | * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove. | |
49193 | (aarch64_int_or_fp_type): Use bfloat16_type_node rather than | |
49194 | aarch64_bf16_type_node. | |
49195 | (aarch64_init_simd_builtin_types): Likewise. | |
49196 | (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node, | |
49197 | which is created in tree.cc already. | |
49198 | * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise. | |
49199 | ||
49200 | 2023-03-12 Roger Sayle <roger@nextmovesoftware.com> | |
49201 | ||
49202 | PR middle-end/109031 | |
49203 | * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)", | |
49204 | ensure that the type of x is as wide or wider than the type of a. | |
49205 | ||
49206 | 2023-03-12 Tamar Christina <tamar.christina@arm.com> | |
49207 | ||
49208 | PR target/108583 | |
49209 | * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove. | |
49210 | (*bitmask_shift_plus<mode>): New. | |
49211 | * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New. | |
49212 | (@aarch64_bitmask_udiv<mode>3): Remove. | |
49213 | * config/aarch64/aarch64.cc | |
49214 | (aarch64_vectorize_can_special_div_by_constant, | |
49215 | TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed. | |
49216 | (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT, | |
49217 | aarch64_vectorize_preferred_div_as_shifts_over_mult): New. | |
49218 | ||
49219 | 2023-03-12 Tamar Christina <tamar.christina@arm.com> | |
49220 | ||
49221 | PR target/108583 | |
49222 | * target.def (preferred_div_as_shifts_over_mult): New. | |
49223 | * doc/tm.texi.in: Document it. | |
49224 | * doc/tm.texi: Regenerate. | |
49225 | * targhooks.cc (default_preferred_div_as_shifts_over_mult): New. | |
49226 | * targhooks.h (default_preferred_div_as_shifts_over_mult): New. | |
49227 | * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it. | |
49228 | ||
49229 | 2023-03-12 Tamar Christina <tamar.christina@arm.com> | |
49230 | Richard Sandiford <richard.sandiford@arm.com> | |
49231 | ||
49232 | PR target/108583 | |
49233 | * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not | |
49234 | single use. | |
49235 | ||
49236 | 2023-03-12 Tamar Christina <tamar.christina@arm.com> | |
49237 | Andrew MacLeod <amacleod@redhat.com> | |
49238 | ||
49239 | PR target/108583 | |
49240 | * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard. | |
49241 | * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler): | |
49242 | Use it. | |
49243 | (gimple_range_op_handler::maybe_non_standard): New. | |
49244 | * range-op.cc (class operator_widen_plus_signed, | |
49245 | operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned, | |
49246 | operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed, | |
49247 | operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned, | |
49248 | operator_widen_mult_unsigned::wi_fold, | |
49249 | ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned, | |
49250 | ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New. | |
49251 | * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned, | |
49252 | ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New | |
49253 | ||
49254 | 2023-03-12 Tamar Christina <tamar.christina@arm.com> | |
49255 | ||
49256 | PR target/108583 | |
49257 | * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove. | |
49258 | * doc/tm.texi.in: Likewise. | |
49259 | * explow.cc (round_push, align_dynamic_address): Revert previous patch. | |
49260 | * expmed.cc (expand_divmod): Likewise. | |
49261 | * expmed.h (expand_divmod): Likewise. | |
49262 | * expr.cc (force_operand, expand_expr_divmod): Likewise. | |
49263 | * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise. | |
49264 | * target.def (can_special_div_by_const): Remove. | |
49265 | * target.h: Remove tree-core.h include | |
49266 | * targhooks.cc (default_can_special_div_by_const): Remove. | |
49267 | * targhooks.h (default_can_special_div_by_const): Remove. | |
49268 | * tree-vect-generic.cc (expand_vector_operation): Remove hook. | |
49269 | * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook. | |
49270 | * tree-vect-stmts.cc (vectorizable_operation): Remove hook. | |
49271 | ||
49272 | 2023-03-12 Sandra Loosemore <sandra@codesourcery.com> | |
49273 | ||
49274 | * doc/install.texi2html: Fix issue number typo in comment. | |
49275 | ||
49276 | 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com> | |
49277 | ||
49278 | * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with | |
49279 | bool. | |
49280 | ||
49281 | 2023-03-12 Sandra Loosemore <sandra@codesourcery.com> | |
49282 | ||
49283 | * doc/invoke.texi (Optimize Options): Add markup to | |
49284 | description of asan-kernel-mem-intrinsic-prefix, and clarify | |
49285 | wording slightly. | |
49286 | ||
49287 | 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com> | |
49288 | ||
49289 | * doc/extend.texi (Named Address Spaces): Drop a redundant link | |
49290 | to AVR-LibC. | |
49291 | ||
49292 | 2023-03-11 Jeff Law <jlaw@ventanamicro> | |
49293 | ||
49294 | PR web/88860 | |
49295 | * doc/extend.texi: Clarify Attribute Syntax a bit. | |
49296 | ||
49297 | 2023-03-11 Sandra Loosemore <sandra@codesourcery.com> | |
49298 | ||
49299 | * doc/install.texi (Prerequisites): Suggest using newer versions | |
49300 | of Texinfo. | |
49301 | (Final install): Clean up and modernize discussion of how to | |
49302 | build or obtain the GCC manuals. | |
49303 | * doc/install.texi2html: Update comment to point to the PR instead | |
49304 | of "makeinfo 4.7 brokenness" (it's not specific to that version). | |
49305 | ||
49306 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49307 | ||
49308 | PR target/107703 | |
49309 | * optabs.cc (expand_fix): For conversions from BFmode to integral, | |
49310 | use shifts to convert it to SFmode first and then convert SFmode | |
49311 | to integral. | |
49312 | ||
49313 | 2023-03-10 Andrew Pinski <apinski@marvell.com> | |
49314 | ||
49315 | * config/aarch64/aarch64.md: Add a new define_split | |
49316 | to help combine. | |
49317 | ||
49318 | 2023-03-10 Richard Biener <rguenther@suse.de> | |
49319 | ||
49320 | * tree-ssa-structalias.cc (solve_graph): Immediately | |
49321 | iterate self-cycles. | |
49322 | ||
49323 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49324 | ||
49325 | PR tree-optimization/109008 | |
49326 | * range-op-float.cc (float_widen_lhs_range): If not | |
49327 | -frounding-math and not IBM double double format, extend lhs | |
49328 | range just by 0.5ulp rather than 1ulp in each direction. | |
49329 | ||
49330 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49331 | ||
49332 | PR target/107998 | |
49333 | * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into | |
49334 | $tmake_file. | |
49335 | * config/i386/t-cygwin-w64: Remove. | |
49336 | ||
49337 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49338 | ||
49339 | PR plugins/108634 | |
49340 | * tree-core.h (tree_code_type, tree_code_length): For C++11 or | |
49341 | C++14, don't declare as extern const arrays. | |
49342 | (tree_code_type_tmpl, tree_code_length_tmpl): New types with | |
49343 | static constexpr member arrays for C++11 or C++14. | |
49344 | * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use | |
49345 | tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type. | |
49346 | (TREE_CODE_LENGTH): For C++11 or C++14 use | |
49347 | tree_code_length_tmpl <0>::tree_code_length instead of | |
49348 | tree_code_length. | |
49349 | * tree.cc (tree_code_type, tree_code_length): Remove. | |
49350 | ||
49351 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49352 | ||
49353 | PR other/108464 | |
49354 | * common.opt (fcanon-prefix-map): New option. | |
49355 | * opts.cc: Include file-prefix-map.h. | |
49356 | (flag_canon_prefix_map): New variable. | |
49357 | (common_handle_option): Handle OPT_fcanon_prefix_map. | |
49358 | (gen_command_line_string): Ignore OPT_fcanon_prefix_map. | |
49359 | * file-prefix-map.h (flag_canon_prefix_map): Declare. | |
49360 | * file-prefix-map.cc (struct file_prefix_map): Add canonicalize | |
49361 | member. | |
49362 | (add_prefix_map): Initialize canonicalize member from | |
49363 | flag_canon_prefix_map, and if true canonicalize it using lrealpath. | |
49364 | (remap_filename): Revert 2022-11-01 and 2022-11-07 changes, | |
49365 | use lrealpath result only for map->canonicalize map entries. | |
49366 | * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map. | |
49367 | * opts-global.cc (handle_common_deferred_options): Clear | |
49368 | flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map. | |
49369 | * doc/invoke.texi (-fcanon-prefix-map): Document. | |
49370 | (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add | |
49371 | see also for -fcanon-prefix-map. | |
49372 | * doc/cppopts.texi (-fmacro-prefix-map): Likewise. | |
49373 | ||
49374 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49375 | ||
49376 | PR c/108079 | |
49377 | * cgraphunit.cc (check_global_declaration): Don't warn for unused | |
49378 | variables which have OPT_Wunused_variable warning suppressed. | |
49379 | ||
49380 | 2023-03-10 Jakub Jelinek <jakub@redhat.com> | |
49381 | ||
49382 | PR tree-optimization/109008 | |
49383 | * range-op-float.cc (float_widen_lhs_range): If lb is | |
49384 | minimum representable finite number or ub is maximum | |
49385 | representable finite number, instead of widening it to | |
49386 | -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1). | |
49387 | Temporarily clear flag_finite_math_only when canonicalizing | |
49388 | the widened range. | |
49389 | ||
49390 | 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49391 | ||
49392 | * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function. | |
49393 | * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto. | |
49394 | (gimple_fold_builtin): Ditto. | |
49395 | * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class. | |
49396 | (class vleff): Ditto. | |
49397 | (BASE): Ditto. | |
49398 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
49399 | * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto. | |
49400 | (vleff): Ditto. | |
49401 | * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto. | |
49402 | (struct fault_load_def): Ditto. | |
49403 | (SHAPE): Ditto. | |
49404 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
49405 | * config/riscv/riscv-vector-builtins.cc | |
49406 | (rvv_arg_type_info::get_tree_type): Add size_ptr. | |
49407 | (gimple_folder::gimple_folder): New class. | |
49408 | (gimple_folder::fold): Ditto. | |
49409 | (gimple_fold_builtin): New function. | |
49410 | (get_read_vl_instance): Ditto. | |
49411 | (get_read_vl_decl): Ditto. | |
49412 | * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr. | |
49413 | * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class. | |
49414 | (get_read_vl_instance): New function. | |
49415 | (get_read_vl_decl): Ditto. | |
49416 | * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto. | |
49417 | (read_vl_insn_p): Ditto. | |
49418 | (available_occurrence_p): Ditto. | |
49419 | (backward_propagate_worthwhile_p): Ditto. | |
49420 | (gen_vsetvl_pat): Adapt for vleff support. | |
49421 | (get_forward_read_vl_insn): New function. | |
49422 | (get_backward_fault_first_load_insn): Ditto. | |
49423 | (source_equal_p): Adapt for vleff support. | |
49424 | (first_ratio_invalid_for_second_sew_p): Remove. | |
49425 | (first_ratio_invalid_for_second_lmul_p): Ditto. | |
49426 | (first_lmul_less_than_second_lmul_p): Ditto. | |
49427 | (first_ratio_less_than_second_ratio_p): Ditto. | |
49428 | (support_relaxed_compatible_p): New function. | |
49429 | (vector_insn_info::operator>): Remove. | |
49430 | (vector_insn_info::operator>=): Refine. | |
49431 | (vector_insn_info::parse_insn): Adapt for vleff support. | |
49432 | (vector_insn_info::compatible_p): Ditto. | |
49433 | (vector_insn_info::update_fault_first_load_avl): New function. | |
49434 | (pass_vsetvl::transfer_after): Adapt for vleff support. | |
49435 | (pass_vsetvl::demand_fusion): Ditto. | |
49436 | (pass_vsetvl::cleanup_insns): Ditto. | |
49437 | * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove | |
49438 | redundant condtions. | |
49439 | * config/riscv/riscv-vsetvl.h (struct demands_cond): New function. | |
49440 | * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook. | |
49441 | * config/riscv/riscv.md: Adapt for vleff support. | |
49442 | * config/riscv/t-riscv: Ditto. | |
49443 | * config/riscv/vector-iterators.md: New iterator. | |
49444 | * config/riscv/vector.md (read_vlsi): New pattern. | |
49445 | (read_vldi_zero_extend): Ditto. | |
49446 | (@pred_fault_load<mode>): Ditto. | |
49447 | ||
49448 | 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49449 | ||
49450 | * config/riscv/riscv-vector-builtins.cc | |
49451 | (function_expander::use_ternop_insn): Use maybe_gen_insn instead. | |
49452 | (function_expander::use_widen_ternop_insn): Ditto. | |
49453 | * optabs.cc (maybe_gen_insn): Extend nops handling. | |
49454 | ||
49455 | 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49456 | ||
49457 | * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load | |
49458 | patterns according to RVV ISA. | |
49459 | * config/riscv/vector-iterators.md: New iterators. | |
49460 | * config/riscv/vector.md | |
49461 | (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove. | |
49462 | (@pred_indexed_<order>load<mode>_same_eew): New pattern. | |
49463 | (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto. | |
49464 | (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto. | |
49465 | (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto. | |
49466 | (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto. | |
49467 | (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto. | |
49468 | (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto. | |
49469 | (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove. | |
49470 | (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto. | |
49471 | (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto. | |
49472 | (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto. | |
49473 | (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
49474 | (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
49475 | ||
49476 | 2023-03-10 Michael Collison <collison@rivosinc.com> | |
49477 | ||
49478 | * tree-vect-loop-manip.cc (vect_do_peeling): Use | |
49479 | result of constant_lower_bound instead of vf for the lower | |
49480 | bound of the epilog loop trip count. | |
49481 | ||
49482 | 2023-03-09 Tamar Christina <tamar.christina@arm.com> | |
49483 | ||
49484 | * passes.cc (emergency_dump_function): Finish graph generation. | |
49485 | ||
49486 | 2023-03-09 Tamar Christina <tamar.christina@arm.com> | |
49487 | ||
49488 | * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT | |
49489 | and bottom bit only. | |
49490 | ||
49491 | 2023-03-09 Andrew Pinski <apinski@marvell.com> | |
49492 | ||
49493 | PR tree-optimization/108980 | |
49494 | * gimple-array-bounds.cc (array_bounds_checker::check_array_ref): | |
49495 | Reorgnize the call to warning for not strict flexible arrays | |
49496 | to be before the check of warned. | |
49497 | ||
49498 | 2023-03-09 Jason Merrill <jason@redhat.com> | |
49499 | ||
49500 | * doc/extend.texi: Comment out __is_deducible docs. | |
49501 | ||
49502 | 2023-03-09 Jason Merrill <jason@redhat.com> | |
49503 | ||
49504 | PR c++/105841 | |
49505 | * doc/extend.texi (Type Traits):: Document __is_deducible. | |
49506 | ||
49507 | 2023-03-09 Costas Argyris <costas.argyris@gmail.com> | |
49508 | ||
49509 | PR driver/108865 | |
49510 | * config.host: add object for x86_64-*-mingw*. | |
49511 | * config/i386/sym-mingw32.cc: dummy file to attach | |
49512 | symbol. | |
49513 | * config/i386/utf8-mingw32.rc: windres resource file. | |
49514 | * config/i386/winnt-utf8.manifest: XML manifest to | |
49515 | enable UTF-8. | |
49516 | * config/i386/x-mingw32: reference to x-mingw32-utf8. | |
49517 | * config/i386/x-mingw32-utf8: Makefile fragment to | |
49518 | embed UTF-8 manifest. | |
49519 | ||
49520 | 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com> | |
49521 | ||
49522 | * lra-constraints.cc (process_alt_operands): Use operand modes for | |
49523 | clobbered regs instead of the biggest access mode. | |
49524 | ||
49525 | 2023-03-09 Richard Biener <rguenther@suse.de> | |
49526 | ||
49527 | PR middle-end/108995 | |
49528 | * fold-const.cc (extract_muldiv_1): Avoid folding | |
49529 | (CST * b) / CST2 when sanitizing overflow and we rely on | |
49530 | overflow being undefined. | |
49531 | ||
49532 | 2023-03-09 Jakub Jelinek <jakub@redhat.com> | |
49533 | Richard Biener <rguenther@suse.de> | |
49534 | ||
49535 | PR tree-optimization/109008 | |
49536 | * range-op-float.cc (float_widen_lhs_range): New function. | |
49537 | (foperator_plus::op1_range, foperator_minus::op1_range, | |
49538 | foperator_minus::op2_range, foperator_mult::op1_range, | |
49539 | foperator_div::op1_range, foperator_div::op2_range): Use it. | |
49540 | ||
49541 | 2023-03-07 Jonathan Grant <jg@jguk.org> | |
49542 | ||
49543 | PR sanitizer/81649 | |
49544 | * doc/invoke.texi (Instrumentation Options): Clarify | |
49545 | LeakSanitizer behavior. | |
49546 | ||
49547 | 2023-03-07 Benson Muite <benson_muite@emailplus.org> | |
49548 | ||
49549 | * doc/install.texi (Prerequisites): Add link to gmplib.org. | |
49550 | ||
49551 | 2023-03-07 Pan Li <pan2.li@intel.com> | |
49552 | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49553 | ||
49554 | PR target/108185 | |
49555 | PR target/108654 | |
49556 | * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI | |
49557 | modes. | |
49558 | * config/riscv/riscv.cc (riscv_v_adjust_precision): New. | |
49559 | * config/riscv/riscv.h (riscv_v_adjust_precision): New. | |
49560 | * genmodes.cc (adj_precision): New. | |
49561 | (ADJUST_PRECISION): New. | |
49562 | (emit_mode_adjustments): Handle ADJUST_PRECISION. | |
49563 | ||
49564 | 2023-03-07 Hans-Peter Nilsson <hp@axis.com> | |
49565 | ||
49566 | * doc/sourcebuild.texi: Document check_effective_target_tail_call. | |
49567 | ||
49568 | 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com> | |
49569 | ||
49570 | * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for | |
49571 | {s|u}{max|min} in QI, HI and DI modes. | |
49572 | (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode. | |
49573 | (cond_<fexpander><mode>): Add pattern for cond_f{max|min}. | |
49574 | (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}. | |
49575 | * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be | |
49576 | saved in SGPRs. | |
49577 | ||
49578 | 2023-03-06 Richard Biener <rguenther@suse.de> | |
49579 | ||
49580 | PR tree-optimization/109025 | |
49581 | * tree-vect-loop.cc (vect_is_simple_reduction): Verify | |
49582 | the inner LC PHI use is the inner loop PHI latch definition | |
49583 | before classifying an outer PHI as double reduction. | |
49584 | ||
49585 | 2023-03-06 Jan Hubicka <hubicka@ucw.cz> | |
49586 | ||
49587 | PR target/108429 | |
49588 | * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for | |
49589 | generic. | |
49590 | (X86_TUNE_USE_SCATTER_4PARTS): Likewise. | |
49591 | (X86_TUNE_USE_SCATTER): Likewise. | |
49592 | ||
49593 | 2023-03-06 Xi Ruoyao <xry111@xry111.site> | |
49594 | ||
49595 | PR target/109000 | |
49596 | * config/loongarch/loongarch.h (FP_RETURN): Use | |
49597 | TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT. | |
49598 | (UNITS_PER_FP_ARG): Likewise. | |
49599 | ||
49600 | 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49601 | ||
49602 | * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug. | |
49603 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
49604 | ||
49605 | 2023-03-05 Liao Shihua <shihua@iscas.ac.cn> | |
49606 | SiYu Wu <siyu@isrc.iscas.ac.cn> | |
49607 | ||
49608 | * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's | |
49609 | instructions. | |
49610 | (riscv_sm3p1_<mode>): New. | |
49611 | (riscv_sm4ed_<mode>): New. | |
49612 | (riscv_sm4ks_<mode>): New. | |
49613 | * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL. | |
49614 | * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and | |
49615 | ZKSH's built-in functions. | |
49616 | ||
49617 | 2023-03-05 Liao Shihua <shihua@iscas.ac.cn> | |
49618 | SiYu Wu <siyu@isrc.iscas.ac.cn> | |
49619 | ||
49620 | * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions. | |
49621 | (riscv_sha256sig1_<mode>): New. | |
49622 | (riscv_sha256sum0_<mode>): New. | |
49623 | (riscv_sha256sum1_<mode>): New. | |
49624 | (riscv_sha512sig0h): New. | |
49625 | (riscv_sha512sig0l): New. | |
49626 | (riscv_sha512sig1h): New. | |
49627 | (riscv_sha512sig1l): New. | |
49628 | (riscv_sha512sum0r): New. | |
49629 | (riscv_sha512sum1r): New. | |
49630 | (riscv_sha512sig0): New. | |
49631 | (riscv_sha512sig1): New. | |
49632 | (riscv_sha512sum0): New. | |
49633 | (riscv_sha512sum1): New. | |
49634 | * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL. | |
49635 | * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's | |
49636 | built-in functions. | |
49637 | (DIRECT_BUILTIN): Add new. | |
49638 | ||
49639 | 2023-03-05 Liao Shihua <shihua@iscas.ac.cn> | |
49640 | SiYu Wu <siyu@isrc.iscas.ac.cn> | |
49641 | ||
49642 | * config/riscv/constraints.md (D03): Add constants of bs and rnum. | |
49643 | (DsA): New. | |
49644 | * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions. | |
49645 | (riscv_aes32dsmi): New. | |
49646 | (riscv_aes64ds): New. | |
49647 | (riscv_aes64dsm): New. | |
49648 | (riscv_aes64im): New. | |
49649 | (riscv_aes64ks1i): New. | |
49650 | (riscv_aes64ks2): New. | |
49651 | (riscv_aes32esi): New. | |
49652 | (riscv_aes32esmi): New. | |
49653 | (riscv_aes64es): New. | |
49654 | (riscv_aes64esm): New. | |
49655 | * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL. | |
49656 | * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and | |
49657 | ZKNE's built-in functions. | |
49658 | ||
49659 | 2023-03-05 Liao Shihua <shihua@iscas.ac.cn> | |
49660 | SiYu Wu <siyu@isrc.iscas.ac.cn> | |
49661 | ||
49662 | * config/riscv/bitmanip.md: Add ZBKB's instructions. | |
49663 | * config/riscv/riscv-builtins.cc (AVAIL): Add new. | |
49664 | * config/riscv/riscv.md: Add new type for crypto instructions. | |
49665 | * config/riscv/crypto.md: Add Scalar Cryptography extension's machine | |
49666 | description file. | |
49667 | * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography | |
49668 | extension's built-in function file. | |
49669 | ||
49670 | 2023-03-05 Liao Shihua <shihua@iscas.ac.cn> | |
49671 | SiYu Wu <siyu@isrc.iscas.ac.cn> | |
49672 | ||
49673 | * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New. | |
49674 | (RISCV_FTYPE_NAME3): New. | |
49675 | (RISCV_ATYPE_QI): New. | |
49676 | (RISCV_ATYPE_HI): New. | |
49677 | (RISCV_FTYPE_ATYPES2): New. | |
49678 | (RISCV_FTYPE_ATYPES3): New. | |
49679 | * config/riscv/riscv-ftypes.def (2): New. | |
49680 | (3): New. | |
49681 | ||
49682 | 2023-03-05 Vineet Gupta <vineetg@rivosinc.com> | |
49683 | ||
49684 | * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to | |
49685 | use exact_log2(). | |
49686 | ||
49687 | 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49688 | kito-cheng <kito.cheng@sifive.com> | |
49689 | ||
49690 | * config/riscv/predicates.md (vector_any_register_operand): New predicate. | |
49691 | * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function. | |
49692 | (riscv_register_pragmas): Add builtin function check call. | |
49693 | * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro. | |
49694 | (check_builtin_call): New function. | |
49695 | * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class. | |
49696 | (class vreinterpret): Ditto. | |
49697 | (class vlmul_ext): Ditto. | |
49698 | (class vlmul_trunc): Ditto. | |
49699 | (class vset): Ditto. | |
49700 | (class vget): Ditto. | |
49701 | (BASE): Ditto. | |
49702 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
49703 | * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name. | |
49704 | (vluxei16): Ditto. | |
49705 | (vluxei32): Ditto. | |
49706 | (vluxei64): Ditto. | |
49707 | (vloxei8): Ditto. | |
49708 | (vloxei16): Ditto. | |
49709 | (vloxei32): Ditto. | |
49710 | (vloxei64): Ditto. | |
49711 | (vsuxei8): Ditto. | |
49712 | (vsuxei16): Ditto. | |
49713 | (vsuxei32): Ditto. | |
49714 | (vsuxei64): Ditto. | |
49715 | (vsoxei8): Ditto. | |
49716 | (vsoxei16): Ditto. | |
49717 | (vsoxei32): Ditto. | |
49718 | (vsoxei64): Ditto. | |
49719 | (vundefined): Add new intrinsic. | |
49720 | (vreinterpret): Ditto. | |
49721 | (vlmul_ext): Ditto. | |
49722 | (vlmul_trunc): Ditto. | |
49723 | (vset): Ditto. | |
49724 | (vget): Ditto. | |
49725 | * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class. | |
49726 | (struct narrow_alu_def): Ditto. | |
49727 | (struct reduc_alu_def): Ditto. | |
49728 | (struct vundefined_def): Ditto. | |
49729 | (struct misc_def): Ditto. | |
49730 | (struct vset_def): Ditto. | |
49731 | (struct vget_def): Ditto. | |
49732 | (SHAPE): Ditto. | |
49733 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
49734 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def. | |
49735 | (DEF_RVV_EEW16_INTERPRET_OPS): Ditto. | |
49736 | (DEF_RVV_EEW32_INTERPRET_OPS): Ditto. | |
49737 | (DEF_RVV_EEW64_INTERPRET_OPS): Ditto. | |
49738 | (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto. | |
49739 | (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto. | |
49740 | (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto. | |
49741 | (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto. | |
49742 | (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto. | |
49743 | (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto. | |
49744 | (DEF_RVV_LMUL1_OPS): Ditto. | |
49745 | (DEF_RVV_LMUL2_OPS): Ditto. | |
49746 | (DEF_RVV_LMUL4_OPS): Ditto. | |
49747 | (vint16mf4_t): Ditto. | |
49748 | (vint16mf2_t): Ditto. | |
49749 | (vint16m1_t): Ditto. | |
49750 | (vint16m2_t): Ditto. | |
49751 | (vint16m4_t): Ditto. | |
49752 | (vint16m8_t): Ditto. | |
49753 | (vint32mf2_t): Ditto. | |
49754 | (vint32m1_t): Ditto. | |
49755 | (vint32m2_t): Ditto. | |
49756 | (vint32m4_t): Ditto. | |
49757 | (vint32m8_t): Ditto. | |
49758 | (vint64m1_t): Ditto. | |
49759 | (vint64m2_t): Ditto. | |
49760 | (vint64m4_t): Ditto. | |
49761 | (vint64m8_t): Ditto. | |
49762 | (vuint16mf4_t): Ditto. | |
49763 | (vuint16mf2_t): Ditto. | |
49764 | (vuint16m1_t): Ditto. | |
49765 | (vuint16m2_t): Ditto. | |
49766 | (vuint16m4_t): Ditto. | |
49767 | (vuint16m8_t): Ditto. | |
49768 | (vuint32mf2_t): Ditto. | |
49769 | (vuint32m1_t): Ditto. | |
49770 | (vuint32m2_t): Ditto. | |
49771 | (vuint32m4_t): Ditto. | |
49772 | (vuint32m8_t): Ditto. | |
49773 | (vuint64m1_t): Ditto. | |
49774 | (vuint64m2_t): Ditto. | |
49775 | (vuint64m4_t): Ditto. | |
49776 | (vuint64m8_t): Ditto. | |
49777 | (vint8mf4_t): Ditto. | |
49778 | (vint8mf2_t): Ditto. | |
49779 | (vint8m1_t): Ditto. | |
49780 | (vint8m2_t): Ditto. | |
49781 | (vint8m4_t): Ditto. | |
49782 | (vint8m8_t): Ditto. | |
49783 | (vuint8mf4_t): Ditto. | |
49784 | (vuint8mf2_t): Ditto. | |
49785 | (vuint8m1_t): Ditto. | |
49786 | (vuint8m2_t): Ditto. | |
49787 | (vuint8m4_t): Ditto. | |
49788 | (vuint8m8_t): Ditto. | |
49789 | (vint8mf8_t): Ditto. | |
49790 | (vuint8mf8_t): Ditto. | |
49791 | (vfloat32mf2_t): Ditto. | |
49792 | (vfloat32m1_t): Ditto. | |
49793 | (vfloat32m2_t): Ditto. | |
49794 | (vfloat32m4_t): Ditto. | |
49795 | (vfloat64m1_t): Ditto. | |
49796 | (vfloat64m2_t): Ditto. | |
49797 | (vfloat64m4_t): Ditto. | |
49798 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto. | |
49799 | (DEF_RVV_EEW8_INTERPRET_OPS): Ditto. | |
49800 | (DEF_RVV_EEW16_INTERPRET_OPS): Ditto. | |
49801 | (DEF_RVV_EEW32_INTERPRET_OPS): Ditto. | |
49802 | (DEF_RVV_EEW64_INTERPRET_OPS): Ditto. | |
49803 | (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto. | |
49804 | (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto. | |
49805 | (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto. | |
49806 | (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto. | |
49807 | (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto. | |
49808 | (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto. | |
49809 | (DEF_RVV_LMUL1_OPS): Ditto. | |
49810 | (DEF_RVV_LMUL2_OPS): Ditto. | |
49811 | (DEF_RVV_LMUL4_OPS): Ditto. | |
49812 | (DEF_RVV_TYPE_INDEX): Ditto. | |
49813 | (required_extensions_p): Adapt for new intrinsic support/ | |
49814 | (get_required_extensions): New function. | |
49815 | (check_required_extensions): Ditto. | |
49816 | (unsigned_base_type_p): Remove. | |
49817 | (rvv_arg_type_info::get_scalar_ptr_type): New function. | |
49818 | (get_mode_for_bitsize): Remove. | |
49819 | (rvv_arg_type_info::get_scalar_const_ptr_type): New function. | |
49820 | (rvv_arg_type_info::get_base_vector_type): Ditto. | |
49821 | (rvv_arg_type_info::get_function_type_index): Ditto. | |
49822 | (DEF_RVV_BASE_TYPE): New def. | |
49823 | (function_builder::apply_predication): New class. | |
49824 | (function_expander::mask_mode): Ditto. | |
49825 | (function_checker::function_checker): Ditto. | |
49826 | (function_checker::report_non_ice): Ditto. | |
49827 | (function_checker::report_out_of_range): Ditto. | |
49828 | (function_checker::require_immediate): Ditto. | |
49829 | (function_checker::require_immediate_range): Ditto. | |
49830 | (function_checker::check): Ditto. | |
49831 | (check_builtin_call): Ditto. | |
49832 | * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def. | |
49833 | (DEF_RVV_BASE_TYPE): Ditto. | |
49834 | (DEF_RVV_TYPE_INDEX): Ditto. | |
49835 | (vbool64_t): Ditto. | |
49836 | (vbool32_t): Ditto. | |
49837 | (vbool16_t): Ditto. | |
49838 | (vbool8_t): Ditto. | |
49839 | (vbool4_t): Ditto. | |
49840 | (vbool2_t): Ditto. | |
49841 | (vbool1_t): Ditto. | |
49842 | (vuint8mf8_t): Ditto. | |
49843 | (vuint8mf4_t): Ditto. | |
49844 | (vuint8mf2_t): Ditto. | |
49845 | (vuint8m1_t): Ditto. | |
49846 | (vuint8m2_t): Ditto. | |
49847 | (vint8m4_t): Ditto. | |
49848 | (vuint8m4_t): Ditto. | |
49849 | (vint8m8_t): Ditto. | |
49850 | (vuint8m8_t): Ditto. | |
49851 | (vint16mf4_t): Ditto. | |
49852 | (vuint16mf2_t): Ditto. | |
49853 | (vuint16m1_t): Ditto. | |
49854 | (vuint16m2_t): Ditto. | |
49855 | (vuint16m4_t): Ditto. | |
49856 | (vuint16m8_t): Ditto. | |
49857 | (vint32mf2_t): Ditto. | |
49858 | (vuint32m1_t): Ditto. | |
49859 | (vuint32m2_t): Ditto. | |
49860 | (vuint32m4_t): Ditto. | |
49861 | (vuint32m8_t): Ditto. | |
49862 | (vuint64m1_t): Ditto. | |
49863 | (vuint64m2_t): Ditto. | |
49864 | (vuint64m4_t): Ditto. | |
49865 | (vuint64m8_t): Ditto. | |
49866 | (vfloat32mf2_t): Ditto. | |
49867 | (vfloat32m1_t): Ditto. | |
49868 | (vfloat32m2_t): Ditto. | |
49869 | (vfloat32m4_t): Ditto. | |
49870 | (vfloat32m8_t): Ditto. | |
49871 | (vfloat64m1_t): Ditto. | |
49872 | (vfloat64m4_t): Ditto. | |
49873 | (vector): Move it def. | |
49874 | (scalar): Ditto. | |
49875 | (mask): Ditto. | |
49876 | (signed_vector): Ditto. | |
49877 | (unsigned_vector): Ditto. | |
49878 | (unsigned_scalar): Ditto. | |
49879 | (vector_ptr): Ditto. | |
49880 | (scalar_ptr): Ditto. | |
49881 | (scalar_const_ptr): Ditto. | |
49882 | (void): Ditto. | |
49883 | (size): Ditto. | |
49884 | (ptrdiff): Ditto. | |
49885 | (unsigned_long): Ditto. | |
49886 | (long): Ditto. | |
49887 | (eew8_index): Ditto. | |
49888 | (eew16_index): Ditto. | |
49889 | (eew32_index): Ditto. | |
49890 | (eew64_index): Ditto. | |
49891 | (shift_vector): Ditto. | |
49892 | (double_trunc_vector): Ditto. | |
49893 | (quad_trunc_vector): Ditto. | |
49894 | (oct_trunc_vector): Ditto. | |
49895 | (double_trunc_scalar): Ditto. | |
49896 | (double_trunc_signed_vector): Ditto. | |
49897 | (double_trunc_unsigned_vector): Ditto. | |
49898 | (double_trunc_unsigned_scalar): Ditto. | |
49899 | (double_trunc_float_vector): Ditto. | |
49900 | (float_vector): Ditto. | |
49901 | (lmul1_vector): Ditto. | |
49902 | (widen_lmul1_vector): Ditto. | |
49903 | (eew8_interpret): Ditto. | |
49904 | (eew16_interpret): Ditto. | |
49905 | (eew32_interpret): Ditto. | |
49906 | (eew64_interpret): Ditto. | |
49907 | (vlmul_ext_x2): Ditto. | |
49908 | (vlmul_ext_x4): Ditto. | |
49909 | (vlmul_ext_x8): Ditto. | |
49910 | (vlmul_ext_x16): Ditto. | |
49911 | (vlmul_ext_x32): Ditto. | |
49912 | (vlmul_ext_x64): Ditto. | |
49913 | * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def. | |
49914 | (struct function_type_info): New function. | |
49915 | (struct rvv_arg_type_info): Ditto. | |
49916 | (class function_checker): New class. | |
49917 | (rvv_arg_type_info::get_scalar_type): New function. | |
49918 | (rvv_arg_type_info::get_vector_type): Ditto. | |
49919 | (function_expander::ret_mode): New function. | |
49920 | (function_checker::arg_mode): Ditto. | |
49921 | (function_checker::ret_mode): Ditto. | |
49922 | * config/riscv/t-riscv: Add generator. | |
49923 | * config/riscv/vector-iterators.md: New iterators. | |
49924 | * config/riscv/vector.md (vundefined<mode>): New pattern. | |
49925 | (@vundefined<mode>): Ditto. | |
49926 | (@vreinterpret<mode>): Ditto. | |
49927 | (@vlmul_extx2<mode>): Ditto. | |
49928 | (@vlmul_extx4<mode>): Ditto. | |
49929 | (@vlmul_extx8<mode>): Ditto. | |
49930 | (@vlmul_extx16<mode>): Ditto. | |
49931 | (@vlmul_extx32<mode>): Ditto. | |
49932 | (@vlmul_extx64<mode>): Ditto. | |
49933 | (*vlmul_extx2<mode>): Ditto. | |
49934 | (*vlmul_extx4<mode>): Ditto. | |
49935 | (*vlmul_extx8<mode>): Ditto. | |
49936 | (*vlmul_extx16<mode>): Ditto. | |
49937 | (*vlmul_extx32<mode>): Ditto. | |
49938 | (*vlmul_extx64<mode>): Ditto. | |
49939 | * config/riscv/genrvv-type-indexer.cc: New file. | |
49940 | ||
49941 | 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
49942 | ||
49943 | * config/riscv/riscv-protos.h (enum vlen_enum): New enum. | |
49944 | (slide1_sew64_helper): New function. | |
49945 | * config/riscv/riscv-v.cc (compute_vlmax): Ditto. | |
49946 | (get_unknown_min_value): Ditto. | |
49947 | (force_vector_length_operand): Ditto. | |
49948 | (gen_no_side_effects_vsetvl_rtx): Ditto. | |
49949 | (get_vl_x2_rtx): Ditto. | |
49950 | (slide1_sew64_helper): Ditto. | |
49951 | * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class. | |
49952 | (class vrgather): Ditto. | |
49953 | (class vrgatherei16): Ditto. | |
49954 | (class vcompress): Ditto. | |
49955 | (BASE): Ditto. | |
49956 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
49957 | * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto. | |
49958 | (vslidedown): Ditto. | |
49959 | (vslide1up): Ditto. | |
49960 | (vslide1down): Ditto. | |
49961 | (vfslide1up): Ditto. | |
49962 | (vfslide1down): Ditto. | |
49963 | (vrgather): Ditto. | |
49964 | (vrgatherei16): Ditto. | |
49965 | (vcompress): Ditto. | |
49966 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro. | |
49967 | (vint8mf8_t): Ditto. | |
49968 | (vint8mf4_t): Ditto. | |
49969 | (vint8mf2_t): Ditto. | |
49970 | (vint8m1_t): Ditto. | |
49971 | (vint8m2_t): Ditto. | |
49972 | (vint8m4_t): Ditto. | |
49973 | (vint16mf4_t): Ditto. | |
49974 | (vint16mf2_t): Ditto. | |
49975 | (vint16m1_t): Ditto. | |
49976 | (vint16m2_t): Ditto. | |
49977 | (vint16m4_t): Ditto. | |
49978 | (vint16m8_t): Ditto. | |
49979 | (vint32mf2_t): Ditto. | |
49980 | (vint32m1_t): Ditto. | |
49981 | (vint32m2_t): Ditto. | |
49982 | (vint32m4_t): Ditto. | |
49983 | (vint32m8_t): Ditto. | |
49984 | (vint64m1_t): Ditto. | |
49985 | (vint64m2_t): Ditto. | |
49986 | (vint64m4_t): Ditto. | |
49987 | (vint64m8_t): Ditto. | |
49988 | (vuint8mf8_t): Ditto. | |
49989 | (vuint8mf4_t): Ditto. | |
49990 | (vuint8mf2_t): Ditto. | |
49991 | (vuint8m1_t): Ditto. | |
49992 | (vuint8m2_t): Ditto. | |
49993 | (vuint8m4_t): Ditto. | |
49994 | (vuint16mf4_t): Ditto. | |
49995 | (vuint16mf2_t): Ditto. | |
49996 | (vuint16m1_t): Ditto. | |
49997 | (vuint16m2_t): Ditto. | |
49998 | (vuint16m4_t): Ditto. | |
49999 | (vuint16m8_t): Ditto. | |
50000 | (vuint32mf2_t): Ditto. | |
50001 | (vuint32m1_t): Ditto. | |
50002 | (vuint32m2_t): Ditto. | |
50003 | (vuint32m4_t): Ditto. | |
50004 | (vuint32m8_t): Ditto. | |
50005 | (vuint64m1_t): Ditto. | |
50006 | (vuint64m2_t): Ditto. | |
50007 | (vuint64m4_t): Ditto. | |
50008 | (vuint64m8_t): Ditto. | |
50009 | (vfloat32mf2_t): Ditto. | |
50010 | (vfloat32m1_t): Ditto. | |
50011 | (vfloat32m2_t): Ditto. | |
50012 | (vfloat32m4_t): Ditto. | |
50013 | (vfloat32m8_t): Ditto. | |
50014 | (vfloat64m1_t): Ditto. | |
50015 | (vfloat64m2_t): Ditto. | |
50016 | (vfloat64m4_t): Ditto. | |
50017 | (vfloat64m8_t): Ditto. | |
50018 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto. | |
50019 | * config/riscv/riscv.md: Adjust RVV instruction types. | |
50020 | * config/riscv/vector-iterators.md (down): New iterator. | |
50021 | (=vd,vr): New attribute. | |
50022 | (UNSPEC_VSLIDE1UP): New unspec. | |
50023 | * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern. | |
50024 | (*pred_slide<ud><mode>): Ditto. | |
50025 | (*pred_slide<ud><mode>_extended): Ditto. | |
50026 | (@pred_gather<mode>): Ditto. | |
50027 | (@pred_gather<mode>_scalar): Ditto. | |
50028 | (@pred_gatherei16<mode>): Ditto. | |
50029 | (@pred_compress<mode>): Ditto. | |
50030 | ||
50031 | 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
50032 | ||
50033 | * config/riscv/riscv-vector-builtins.cc: Remove void_type_node. | |
50034 | ||
50035 | 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
50036 | ||
50037 | * config/riscv/constraints.md (Wb1): New constraint. | |
50038 | * config/riscv/predicates.md | |
50039 | (vector_least_significant_set_mask_operand): New predicate. | |
50040 | (vector_broadcast_mask_operand): Ditto. | |
50041 | * config/riscv/riscv-protos.h (enum vlmul_type): Adjust. | |
50042 | (gen_scalar_move_mask): New function. | |
50043 | * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto. | |
50044 | * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class. | |
50045 | (class vmv_s): Ditto. | |
50046 | (BASE): Ditto. | |
50047 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
50048 | * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto. | |
50049 | (vmv_s): Ditto. | |
50050 | (vfmv_f): Ditto. | |
50051 | (vfmv_s): Ditto. | |
50052 | * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto. | |
50053 | (SHAPE): Ditto. | |
50054 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
50055 | * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto. | |
50056 | (function_expander::use_exact_insn): New function. | |
50057 | (function_expander::use_contiguous_load_insn): New function. | |
50058 | (function_expander::use_contiguous_store_insn): New function. | |
50059 | (function_expander::use_ternop_insn): New function. | |
50060 | (function_expander::use_widen_ternop_insn): New function. | |
50061 | (function_expander::use_scalar_move_insn): New function. | |
50062 | * config/riscv/riscv-vector-builtins.def (s): New operand suffix. | |
50063 | * config/riscv/riscv-vector-builtins.h | |
50064 | (function_expander::add_scalar_move_mask_operand): New class. | |
50065 | * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function. | |
50066 | (scalar_move_insn_p): Ditto. | |
50067 | (has_vsetvl_killed_avl_p): Ditto. | |
50068 | (anticipatable_occurrence_p): Ditto. | |
50069 | (insert_vsetvl): Ditto. | |
50070 | (get_vl_vtype_info): Ditto. | |
50071 | (calculate_sew): Ditto. | |
50072 | (calculate_vlmul): Ditto. | |
50073 | (incompatible_avl_p): Ditto. | |
50074 | (different_sew_p): Ditto. | |
50075 | (different_lmul_p): Ditto. | |
50076 | (different_ratio_p): Ditto. | |
50077 | (different_tail_policy_p): Ditto. | |
50078 | (different_mask_policy_p): Ditto. | |
50079 | (possible_zero_avl_p): Ditto. | |
50080 | (first_ratio_invalid_for_second_sew_p): Ditto. | |
50081 | (first_ratio_invalid_for_second_lmul_p): Ditto. | |
50082 | (second_ratio_invalid_for_first_sew_p): Ditto. | |
50083 | (second_ratio_invalid_for_first_lmul_p): Ditto. | |
50084 | (second_sew_less_than_first_sew_p): Ditto. | |
50085 | (first_sew_less_than_second_sew_p): Ditto. | |
50086 | (compare_lmul): Ditto. | |
50087 | (second_lmul_less_than_first_lmul_p): Ditto. | |
50088 | (first_lmul_less_than_second_lmul_p): Ditto. | |
50089 | (first_ratio_less_than_second_ratio_p): Ditto. | |
50090 | (second_ratio_less_than_first_ratio_p): Ditto. | |
50091 | (DEF_INCOMPATIBLE_COND): Ditto. | |
50092 | (greatest_sew): Ditto. | |
50093 | (first_sew): Ditto. | |
50094 | (second_sew): Ditto. | |
50095 | (first_vlmul): Ditto. | |
50096 | (second_vlmul): Ditto. | |
50097 | (first_ratio): Ditto. | |
50098 | (second_ratio): Ditto. | |
50099 | (vlmul_for_first_sew_second_ratio): Ditto. | |
50100 | (ratio_for_second_sew_first_vlmul): Ditto. | |
50101 | (DEF_SEW_LMUL_FUSE_RULE): Ditto. | |
50102 | (always_unavailable): Ditto. | |
50103 | (avl_unavailable_p): Ditto. | |
50104 | (sew_unavailable_p): Ditto. | |
50105 | (lmul_unavailable_p): Ditto. | |
50106 | (ge_sew_unavailable_p): Ditto. | |
50107 | (ge_sew_lmul_unavailable_p): Ditto. | |
50108 | (ge_sew_ratio_unavailable_p): Ditto. | |
50109 | (DEF_UNAVAILABLE_COND): Ditto. | |
50110 | (same_sew_lmul_demand_p): Ditto. | |
50111 | (propagate_avl_across_demands_p): Ditto. | |
50112 | (reg_available_p): Ditto. | |
50113 | (avl_info::has_non_zero_avl): Ditto. | |
50114 | (vl_vtype_info::has_non_zero_avl): Ditto. | |
50115 | (vector_insn_info::operator>=): Refactor. | |
50116 | (vector_insn_info::parse_insn): Adjust for scalar move. | |
50117 | (vector_insn_info::demand_vl_vtype): Remove. | |
50118 | (vector_insn_info::compatible_p): New function. | |
50119 | (vector_insn_info::compatible_avl_p): Ditto. | |
50120 | (vector_insn_info::compatible_vtype_p): Ditto. | |
50121 | (vector_insn_info::available_p): Ditto. | |
50122 | (vector_insn_info::merge): Ditto. | |
50123 | (vector_insn_info::fuse_avl): Ditto. | |
50124 | (vector_insn_info::fuse_sew_lmul): Ditto. | |
50125 | (vector_insn_info::fuse_tail_policy): Ditto. | |
50126 | (vector_insn_info::fuse_mask_policy): Ditto. | |
50127 | (vector_insn_info::dump): Ditto. | |
50128 | (vector_infos_manager::release): Ditto. | |
50129 | (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support. | |
50130 | (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support. | |
50131 | (pass_vsetvl::hard_empty_block_p): Ditto. | |
50132 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
50133 | (pass_vsetvl::forward_demand_fusion): Ditto. | |
50134 | (pass_vsetvl::refine_vsetvls): Ditto. | |
50135 | (pass_vsetvl::cleanup_vsetvls): Ditto. | |
50136 | (pass_vsetvl::commit_vsetvls): Ditto. | |
50137 | (pass_vsetvl::propagate_avl): Ditto. | |
50138 | * config/riscv/riscv-vsetvl.h (enum demand_status): New class. | |
50139 | (struct demands_pair): Ditto. | |
50140 | (struct demands_cond): Ditto. | |
50141 | (struct demands_fuse_rule): Ditto. | |
50142 | * config/riscv/vector-iterators.md: New iterator. | |
50143 | * config/riscv/vector.md (@pred_broadcast<mode>): New pattern. | |
50144 | (*pred_broadcast<mode>): Ditto. | |
50145 | (*pred_broadcast<mode>_extended_scalar): Ditto. | |
50146 | (@pred_extract_first<mode>): Ditto. | |
50147 | (*pred_extract_first<mode>): Ditto. | |
50148 | (@pred_extract_first_trunc<mode>): Ditto. | |
50149 | * config/riscv/riscv-vsetvl.def: New file. | |
50150 | ||
50151 | 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com> | |
50152 | ||
50153 | * config/riscv/bitmanip.md: allow 0 constant in max/min | |
50154 | pattern. | |
50155 | ||
50156 | 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com> | |
50157 | ||
50158 | * config/riscv/bitmanip.md: Fix wrong index in the check. | |
50159 | ||
50160 | 2023-03-04 Jakub Jelinek <jakub@redhat.com> | |
50161 | ||
50162 | PR middle-end/109006 | |
50163 | * vec.cc (test_auto_alias): Adjust comment for removal of | |
50164 | m_vecdata. | |
50165 | * read-rtl-function.cc (function_reader::parse_block): Likewise. | |
50166 | * gdbhooks.py: Likewise. | |
50167 | ||
50168 | 2023-03-04 Jakub Jelinek <jakub@redhat.com> | |
50169 | ||
50170 | PR testsuite/108973 | |
50171 | * selftest-diagnostic.cc | |
50172 | (test_diagnostic_context::test_diagnostic_context): Set | |
50173 | caret_max_width to 80. | |
50174 | ||
50175 | 2023-03-03 Alexandre Oliva <oliva@adacore.com> | |
50176 | ||
50177 | * gimple-ssa-warn-access.cc | |
50178 | (pass_waccess::check_dangling_stores): Skip non-stores. | |
50179 | ||
50180 | 2023-03-03 Alexandre Oliva <oliva@adacore.com> | |
50181 | ||
50182 | * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab | |
50183 | after vmsr and vmrs, and lower the case of P0. | |
50184 | ||
50185 | 2023-03-03 Jonathan Wakely <jwakely@redhat.com> | |
50186 | ||
50187 | PR middle-end/109006 | |
50188 | * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*. | |
50189 | ||
50190 | 2023-03-03 Jonathan Wakely <jwakely@redhat.com> | |
50191 | ||
50192 | PR middle-end/109006 | |
50193 | * gdbhooks.py (VecPrinter): Adjust for new vec layout. | |
50194 | ||
50195 | 2023-03-03 Jakub Jelinek <jakub@redhat.com> | |
50196 | ||
50197 | PR c/108986 | |
50198 | * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes): | |
50199 | Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is | |
50200 | suppressed on stmt. For [static %E] warning, print access_nelts | |
50201 | rather than access_size. Fix up comment wording. | |
50202 | ||
50203 | 2023-03-03 Robin Dapp <rdapp@linux.ibm.com> | |
50204 | ||
50205 | * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use | |
50206 | arch14 instead of z16. | |
50207 | ||
50208 | 2023-03-03 Anthony Green <green@moxielogic.com> | |
50209 | ||
50210 | * config/moxie/moxie.cc (TARGET_LRA_P): Remove. | |
50211 | ||
50212 | 2023-03-03 Anthony Green <green@moxielogic.com> | |
50213 | ||
50214 | * config/moxie/constraints.md (A, B, W): Change | |
50215 | define_constraint to define_memory_constraint. | |
50216 | ||
50217 | 2023-03-03 Xi Ruoyao <xry111@xry111.site> | |
50218 | ||
50219 | * toplev.cc (process_options): Fix the spelling of | |
50220 | "-fstack-clash-protection". | |
50221 | ||
50222 | 2023-03-03 Richard Biener <rguenther@suse.de> | |
50223 | ||
50224 | PR tree-optimization/109002 | |
50225 | * tree-ssa-pre.cc (compute_partial_antic_aux): Properly | |
50226 | PHI-translate ANTIC_IN. | |
50227 | ||
50228 | 2023-03-03 Jakub Jelinek <jakub@redhat.com> | |
50229 | ||
50230 | PR tree-optimization/108988 | |
50231 | * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to | |
50232 | size_type_node before passing it as argument to fwrite. Formatting | |
50233 | fixes. | |
50234 | ||
50235 | 2023-03-03 Richard Biener <rguenther@suse.de> | |
50236 | ||
50237 | PR target/108738 | |
50238 | * config/i386/i386.opt (--param x86-stv-max-visits): New param. | |
50239 | * doc/invoke.texi (--param x86-stv-max-visits): Document it. | |
50240 | * config/i386/i386-features.h (scalar_chain::max_visits): New. | |
50241 | (scalar_chain::build): Add bitmap parameter, return boolean. | |
50242 | (scalar_chain::add_insn): Likewise. | |
50243 | (scalar_chain::analyze_register_chain): Likewise. | |
50244 | * config/i386/i386-features.cc (scalar_chain::scalar_chain): | |
50245 | Initialize max_visits. | |
50246 | (scalar_chain::analyze_register_chain): When we exhaust | |
50247 | max_visits, abort. Also abort when running into any | |
50248 | disallowed insn. | |
50249 | (scalar_chain::add_insn): Propagate abort. | |
50250 | (scalar_chain::build): Likewise. When aborting amend | |
50251 | the set of disallowed insn with the insns set. | |
50252 | (convert_scalars_to_vector): Adjust. Do not convert aborted | |
50253 | chains. | |
50254 | ||
50255 | 2023-03-03 Richard Biener <rguenther@suse.de> | |
50256 | ||
50257 | PR debug/108772 | |
50258 | * dwarf2out.cc (dwarf2out_late_global_decl): Do not | |
50259 | generate a DIE for a function scope static. | |
50260 | ||
50261 | 2023-03-03 Alexandre Oliva <oliva@adacore.com> | |
50262 | ||
50263 | * config/vx-common.h (WINT_TYPE): Alias to "wchar_t". | |
50264 | ||
50265 | 2023-03-02 Jakub Jelinek <jakub@redhat.com> | |
50266 | ||
50267 | PR target/108883 | |
50268 | * target.h (emit_support_tinfos_callback): New typedef. | |
50269 | * targhooks.h (default_emit_support_tinfos): Declare. | |
50270 | * targhooks.cc (default_emit_support_tinfos): New function. | |
50271 | * target.def (emit_support_tinfos): New target hook. | |
50272 | * doc/tm.texi.in (emit_support_tinfos): Document it. | |
50273 | * doc/tm.texi: Regenerated. | |
50274 | * config/i386/i386.cc (ix86_emit_support_tinfos): New function. | |
50275 | (TARGET_EMIT_SUPPORT_TINFOS): Redefine. | |
50276 | ||
50277 | 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com> | |
50278 | ||
50279 | * ira-costs.cc: Include print-rtl.h. | |
50280 | (record_reg_classes, scan_one_insn): Add code to print debug info. | |
50281 | (record_operand_costs): Find and use smaller cost for hard reg | |
50282 | move. | |
50283 | ||
50284 | 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com> | |
50285 | Paul-Antoine Arras <pa@codesourcery.com> | |
50286 | ||
50287 | * builtins.cc (mathfn_built_in_explicit): New. | |
50288 | * config/gcn/gcn.cc: Include case-cfn-macros.h. | |
50289 | (mathfn_built_in_explicit): Add prototype. | |
50290 | (gcn_vectorize_builtin_vectorized_function): New. | |
50291 | (gcn_libc_has_function): New. | |
50292 | (TARGET_LIBC_HAS_FUNCTION): Define. | |
50293 | (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define. | |
50294 | ||
50295 | 2023-03-02 Richard Sandiford <richard.sandiford@arm.com> | |
50296 | ||
50297 | PR tree-optimization/108979 | |
50298 | * tree-vect-stmts.cc (vectorizable_operation): Don't mask | |
50299 | operations on invariants. | |
50300 | ||
50301 | 2023-03-02 Robin Dapp <rdapp@linux.ibm.com> | |
50302 | ||
50303 | * config/s390/predicates.md (vll_bias_operand): Add -1 bias. | |
50304 | * config/s390/s390.cc (s390_option_override_internal): Make | |
50305 | partial vector usage the default from z13 on. | |
50306 | * config/s390/vector.md (len_load_v16qi): Add. | |
50307 | (len_store_v16qi): Add. | |
50308 | ||
50309 | 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
50310 | ||
50311 | * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead | |
50312 | of constant 0 offset. | |
50313 | ||
50314 | 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com> | |
50315 | ||
50316 | * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT | |
50317 | instead of long. | |
50318 | * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise. | |
50319 | ||
50320 | 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com> | |
50321 | ||
50322 | * config.gcc: add -with-{no-}msa build option. | |
50323 | * config/mips/mips.h: Likewise. | |
50324 | * doc/install.texi: Likewise. | |
50325 | ||
50326 | 2023-03-02 Richard Sandiford <richard.sandiford@arm.com> | |
50327 | ||
50328 | PR tree-optimization/108603 | |
50329 | * explow.cc (convert_memory_address_addr_space_1): Only wrap | |
50330 | the result of a recursive call in a CONST if no instructions | |
50331 | were emitted. | |
50332 | ||
50333 | 2023-03-02 Richard Sandiford <richard.sandiford@arm.com> | |
50334 | ||
50335 | PR tree-optimization/108430 | |
50336 | * tree-vect-stmts.cc (vectorizable_condition): Fix handling | |
50337 | of inverted condition. | |
50338 | ||
50339 | 2023-03-02 Jakub Jelinek <jakub@redhat.com> | |
50340 | ||
50341 | PR c++/108934 | |
50342 | * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp | |
50343 | comparison copy the bytes from ptr to a temporary buffer and clearing | |
50344 | padding bits in there. | |
50345 | ||
50346 | 2023-03-01 Tobias Burnus <tobias@codesourcery.com> | |
50347 | ||
50348 | PR middle-end/108545 | |
50349 | * gimplify.cc (struct tree_operand_hash_no_se): New. | |
50350 | (omp_index_mapping_groups_1, omp_index_mapping_groups, | |
50351 | omp_reindex_mapping_groups, omp_mapped_by_containing_struct, | |
50352 | omp_tsort_mapping_groups_1, omp_tsort_mapping_groups, | |
50353 | oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists, | |
50354 | gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead | |
50355 | of tree_operand_hash. | |
50356 | ||
50357 | 2023-03-01 LIU Hao <lh_mouse@126.com> | |
50358 | ||
50359 | PR pch/14940 | |
50360 | * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address): | |
50361 | Remove the size limit `pch_VA_max_size` | |
50362 | ||
50363 | 2023-03-01 Tobias Burnus <tobias@codesourcery.com> | |
50364 | ||
50365 | PR middle-end/108546 | |
50366 | * omp-low.cc (lower_omp_target): Remove optional handling | |
50367 | on the receiver side, i.e. inside target (data), for | |
50368 | use_device_ptr. | |
50369 | ||
50370 | 2023-03-01 Jakub Jelinek <jakub@redhat.com> | |
50371 | ||
50372 | PR debug/108967 | |
50373 | * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR | |
50374 | and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR. | |
50375 | ||
50376 | 2023-03-01 Richard Biener <rguenther@suse.de> | |
50377 | ||
50378 | PR tree-optimization/108970 | |
50379 | * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p): | |
50380 | Check we can copy the BBs. | |
50381 | (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant | |
50382 | check. | |
50383 | (vect_do_peeling): Streamline error handling. | |
50384 | ||
50385 | 2023-03-01 Richard Biener <rguenther@suse.de> | |
50386 | ||
50387 | PR tree-optimization/108950 | |
50388 | * tree-vect-patterns.cc (vect_recog_widen_sum_pattern): | |
50389 | Check oprnd0 is defined in the loop. | |
50390 | * tree-vect-loop.cc (vectorizable_reduction): Record all | |
50391 | operands vector types, compute that of invariants and | |
50392 | properly update their SLP nodes. | |
50393 | ||
50394 | 2023-03-01 Kewen Lin <linkw@linux.ibm.com> | |
50395 | ||
50396 | PR target/108240 | |
50397 | * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow | |
50398 | implicit powerpc64 setting to be unset if 64 bit is enabled implicitly. | |
50399 | ||
50400 | 2023-02-28 Qing Zhao <qing.zhao@oracle.com> | |
50401 | ||
50402 | PR middle-end/107411 | |
50403 | PR middle-end/107411 | |
50404 | * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace | |
50405 | xasprintf. | |
50406 | * tree-ssa-uninit.cc (warn_uninit): Handle the case when the | |
50407 | LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME. | |
50408 | ||
50409 | 2023-02-28 Jakub Jelinek <jakub@redhat.com> | |
50410 | ||
50411 | PR sanitizer/108894 | |
50412 | * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound | |
50413 | comparison rather than index > bound. | |
50414 | * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt | |
50415 | rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison. | |
50416 | * doc/invoke.texi (-fsanitize=bounds): Document that whether | |
50417 | flexible array member-like arrays are instrumented or not depends | |
50418 | on -fstrict-flex-arrays* options of strict_flex_array attributes. | |
50419 | (-fsanitize=bounds-strict): Document that flexible array members | |
50420 | are not instrumented. | |
50421 | ||
50422 | 2023-02-27 Uroš Bizjak <ubizjak@gmail.com> | |
50423 | ||
50424 | PR target/108922 | |
50425 | Revert: | |
50426 | * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only. | |
50427 | (fmod<mode>3): Ditto. | |
50428 | (fpremxf4_i387): Ditto. | |
50429 | (reminderxf3): Ditto. | |
50430 | (reminder<mode>3): Ditto. | |
50431 | (fprem1xf4_i387): Ditto. | |
50432 | ||
50433 | 2023-02-27 Roger Sayle <roger@nextmovesoftware.com> | |
50434 | ||
50435 | * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid | |
50436 | generating FFS with mismatched operand and result modes, by using | |
50437 | an explicit SIGN_EXTEND/ZERO_EXTEND. | |
50438 | <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND. | |
50439 | <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND. | |
50440 | ||
50441 | 2023-02-27 Patrick Palka <ppalka@redhat.com> | |
50442 | ||
50443 | * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static. | |
50444 | * lra-int.h (lra_change_class): Likewise. | |
50445 | * recog.h (which_op_alt): Likewise. | |
50446 | * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline | |
50447 | instead of static. | |
50448 | ||
50449 | 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
50450 | ||
50451 | * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p): | |
50452 | New prototype. | |
50453 | * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p): | |
50454 | New function. | |
50455 | * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition. | |
50456 | * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern. | |
50457 | ||
50458 | 2023-02-27 Max Filippov <jcmvbkbc@gmail.com> | |
50459 | ||
50460 | * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2) | |
50461 | (xtensa_get_config_v3): New functions. | |
50462 | ||
50463 | 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
50464 | ||
50465 | * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment. | |
50466 | ||
50467 | 2023-02-27 Lulu Cheng <chenglulu@loongson.cn> | |
50468 | ||
50469 | * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of | |
50470 | the macro to 0x1000000000. | |
50471 | ||
50472 | 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com> | |
50473 | ||
50474 | PR modula2/108261 | |
50475 | * doc/gm2.texi (-fm2-pathname): New option documented. | |
50476 | (-fm2-pathnameI): New option documented. | |
50477 | (-fm2-prefix=): New option documented. | |
50478 | (-fruntime-modules=): Update default module list. | |
50479 | ||
50480 | 2023-02-25 Max Filippov <jcmvbkbc@gmail.com> | |
50481 | ||
50482 | PR target/108919 | |
50483 | * config/xtensa/xtensa-protos.h | |
50484 | (xtensa_prepare_expand_call): Rename to xtensa_expand_call. | |
50485 | * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename | |
50486 | to xtensa_expand_call. | |
50487 | (xtensa_expand_call): Emit the call and add a clobber expression | |
50488 | for the static chain to it in case of windowed ABI. | |
50489 | * config/xtensa/xtensa.md (call, call_value, sibcall) | |
50490 | (sibcall_value): Call xtensa_expand_call and complete expansion | |
50491 | right after that call. | |
50492 | ||
50493 | 2023-02-24 Richard Biener <rguenther@suse.de> | |
50494 | ||
50495 | * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove. | |
50496 | (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid | |
50497 | changing alignment of vec<T, A, vl_embed> and simplifying | |
50498 | address. | |
50499 | (vec<T, A, vl_embed>::address): Compute as this + 1. | |
50500 | (vec<T, A, vl_embed>::embedded_size): Use sizeof the | |
50501 | vector instead of the offset of the m_vecdata member. | |
50502 | (auto_vec<T, N>::m_data): Turn storage into | |
50503 | uninitialized unsigned char. | |
50504 | (auto_vec<T, N>::auto_vec): Allow allocation of one | |
50505 | stack member. Initialize m_vec in a special way to | |
50506 | avoid later stringop overflow diagnostics. | |
50507 | * vec.cc (test_auto_alias): New. | |
50508 | (vec_cc_tests): Call it. | |
50509 | ||
50510 | 2023-02-24 Richard Biener <rguenther@suse.de> | |
50511 | ||
50512 | * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to | |
50513 | take a const reference to the object, use address to | |
50514 | access data. | |
50515 | (vec<T, A, vl_embed>::contains): Use address to access data. | |
50516 | (vec<T, A, vl_embed>::operator[]): Use address instead of | |
50517 | m_vecdata to access data. | |
50518 | (vec<T, A, vl_embed>::iterate): Likewise. | |
50519 | (vec<T, A, vl_embed>::copy): Likewise. | |
50520 | (vec<T, A, vl_embed>::quick_push): Likewise. | |
50521 | (vec<T, A, vl_embed>::pop): Likewise. | |
50522 | (vec<T, A, vl_embed>::quick_insert): Likewise. | |
50523 | (vec<T, A, vl_embed>::ordered_remove): Likewise. | |
50524 | (vec<T, A, vl_embed>::unordered_remove): Likewise. | |
50525 | (vec<T, A, vl_embed>::block_remove): Likewise. | |
50526 | (vec<T, A, vl_heap>::address): Likewise. | |
50527 | ||
50528 | 2023-02-24 Martin Liska <mliska@suse.cz> | |
50529 | ||
50530 | PR sanitizer/108834 | |
50531 | * asan.cc (asan_add_global): Use proper TU name for normal | |
50532 | global variables (and aux_base_name for the artificial one). | |
50533 | ||
50534 | 2023-02-24 Jakub Jelinek <jakub@redhat.com> | |
50535 | ||
50536 | * config/i386/i386-builtin.def: Update description of BDESC | |
50537 | and BDESC_FIRST in file comment to include mask2. | |
50538 | ||
50539 | 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
50540 | ||
50541 | * config/aarch64/aarch64-cores.def (FLAGS): Update comment. | |
50542 | ||
50543 | 2023-02-24 Jakub Jelinek <jakub@redhat.com> | |
50544 | ||
50545 | PR middle-end/108854 | |
50546 | * cgraphclones.cc (duplicate_thunk_for_node): If no parameter | |
50547 | changes are needed, copy at least DECL_ARGUMENTS PARM_DECL | |
50548 | nodes and adjust their DECL_CONTEXT. | |
50549 | ||
50550 | 2023-02-24 Jakub Jelinek <jakub@redhat.com> | |
50551 | ||
50552 | PR target/108881 | |
50553 | * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf, | |
50554 | __builtin_ia32_cvtne2ps2bf16_v16bf_mask, | |
50555 | __builtin_ia32_cvtne2ps2bf16_v16bf_maskz, | |
50556 | __builtin_ia32_cvtne2ps2bf16_v8bf, | |
50557 | __builtin_ia32_cvtne2ps2bf16_v8bf_mask, | |
50558 | __builtin_ia32_cvtne2ps2bf16_v8bf_maskz, | |
50559 | __builtin_ia32_cvtneps2bf16_v8sf_mask, | |
50560 | __builtin_ia32_cvtneps2bf16_v8sf_maskz, | |
50561 | __builtin_ia32_cvtneps2bf16_v4sf_mask, | |
50562 | __builtin_ia32_cvtneps2bf16_v4sf_maskz, | |
50563 | __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask, | |
50564 | __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf, | |
50565 | __builtin_ia32_dpbf16ps_v4sf_mask, | |
50566 | __builtin_ia32_dpbf16ps_v4sf_maskz): Require also | |
50567 | OPTION_MASK_ISA_AVX512VL. | |
50568 | ||
50569 | 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de> | |
50570 | ||
50571 | * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs. | |
50572 | Add non-compact 32-bit multilibs. | |
50573 | ||
50574 | 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com> | |
50575 | ||
50576 | * config/mips/mips.md (*clo<mode>2): New pattern. | |
50577 | ||
50578 | 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com> | |
50579 | ||
50580 | * config/mips/mips.h (machine_function): New variable | |
50581 | use_hazard_barrier_return_p. | |
50582 | * config/mips/mips.md (UNSPEC_JRHB): New unspec. | |
50583 | (mips_hb_return_internal): New insn pattern. | |
50584 | * config/mips/mips.cc (mips_attribute_table): Add attribute | |
50585 | use_hazard_barrier_return. | |
50586 | (mips_use_hazard_barrier_return_p): New static function. | |
50587 | (mips_function_attr_inlinable_p): Likewise. | |
50588 | (mips_compute_frame_info): Set use_hazard_barrier_return_p. | |
50589 | Emit error for unsupported architecture choice. | |
50590 | (mips_function_ok_for_sibcall, mips_can_use_return_insn): | |
50591 | Return false for use_hazard_barrier_return. | |
50592 | (mips_expand_epilogue): Emit hazard barrier return. | |
50593 | * doc/extend.texi: Document use_hazard_barrier_return. | |
50594 | ||
50595 | 2023-02-23 Max Filippov <jcmvbkbc@gmail.com> | |
50596 | ||
50597 | * config/xtensa/xtensa-dynconfig.cc (config.h, system.h) | |
50598 | (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...> | |
50599 | for the gcc-internal headers. | |
50600 | ||
50601 | 2023-02-23 Max Filippov <jcmvbkbc@gmail.com> | |
50602 | ||
50603 | * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE) | |
50604 | and $(POSTCOMPILE) instead of manual dependency listing. | |
50605 | * config/xtensa/xtensa-dynconfig.c: Rename to ... | |
50606 | * config/xtensa/xtensa-dynconfig.cc: ... this. | |
50607 | ||
50608 | 2023-02-23 Arsen Arsenović <arsen@aarsen.me> | |
50609 | ||
50610 | * doc/cfg.texi: Reorder index entries around @items. | |
50611 | * doc/cpp.texi: Ditto. | |
50612 | * doc/cppenv.texi: Ditto. | |
50613 | * doc/cppopts.texi: Ditto. | |
50614 | * doc/generic.texi: Ditto. | |
50615 | * doc/install.texi: Ditto. | |
50616 | * doc/extend.texi: Ditto. | |
50617 | * doc/invoke.texi: Ditto. | |
50618 | * doc/md.texi: Ditto. | |
50619 | * doc/rtl.texi: Ditto. | |
50620 | * doc/tm.texi.in: Ditto. | |
50621 | * doc/trouble.texi: Ditto. | |
50622 | * doc/tm.texi: Regenerate. | |
50623 | ||
50624 | 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
50625 | ||
50626 | * config/xtensa/xtensa.md: New peephole2 pattern that eliminates | |
50627 | the occurrence of general-purpose register used only once and for | |
50628 | transferring intermediate value. | |
50629 | ||
50630 | 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
50631 | ||
50632 | * config/xtensa/xtensa.cc (machine_function): Add new member | |
50633 | 'eliminated_callee_saved_bmp'. | |
50634 | (xtensa_can_eliminate_callee_saved_reg_p): New function to | |
50635 | determine whether the register can be eliminated or not. | |
50636 | (xtensa_expand_prologue): Add invoking the above function and | |
50637 | elimination the use of callee-saved register by using its stack | |
50638 | slot through the stack pointer (or the frame pointer if needed) | |
50639 | directly. | |
50640 | (xtensa_expand_prologue): Modify to not emit register restoration | |
50641 | insn from its stack slot if the register is already eliminated. | |
50642 | ||
50643 | 2023-02-23 Jakub Jelinek <jakub@redhat.com> | |
50644 | ||
50645 | PR translation/108890 | |
50646 | * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s | |
50647 | around fatal_error format strings. | |
50648 | ||
50649 | 2023-02-23 Richard Biener <rguenther@suse.de> | |
50650 | ||
50651 | * tree-ssa-structalias.cc (handle_lhs_call): Do not | |
50652 | re-create rhsc, only truncate it. | |
50653 | ||
50654 | 2023-02-23 Jakub Jelinek <jakub@redhat.com> | |
50655 | ||
50656 | PR middle-end/106258 | |
50657 | * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle | |
50658 | BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE. | |
50659 | ||
50660 | 2023-02-23 Richard Biener <rguenther@suse.de> | |
50661 | ||
50662 | * tree-if-conv.cc (tree_if_conversion): Properly manage | |
50663 | memory of refs and the contained data references. | |
50664 | ||
50665 | 2023-02-23 Richard Biener <rguenther@suse.de> | |
50666 | ||
50667 | PR tree-optimization/108888 | |
50668 | * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on | |
50669 | calls to predicate. | |
50670 | (predicate_statements): Only predicate calls with PLF_2. | |
50671 | ||
50672 | 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
50673 | ||
50674 | * config/xtensa/xtensa.md | |
50675 | (zero_cost_loop_start, zero_cost_loop_end, loop_end): | |
50676 | Add missing "SI:" to PLUS RTXes. | |
50677 | ||
50678 | 2023-02-23 Max Filippov <jcmvbkbc@gmail.com> | |
50679 | ||
50680 | PR target/108876 | |
50681 | * config/xtensa/xtensa.cc (xtensa_expand_epilogue): | |
50682 | Emit (use (reg:SI A0_REG)) at the end in the sibling call | |
50683 | (i.e. the same place as (return) in the normal call). | |
50684 | ||
50685 | 2023-02-23 Max Filippov <jcmvbkbc@gmail.com> | |
50686 | ||
50687 | Revert: | |
50688 | 2023-02-21 Max Filippov <jcmvbkbc@gmail.com> | |
50689 | ||
50690 | PR target/108876 | |
50691 | * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use | |
50692 | for A0_REG. | |
50693 | * config/xtensa/xtensa.md (sibcall, sibcall_internal) | |
50694 | (sibcall_value, sibcall_value_internal): Add 'use' expression | |
50695 | for A0_REG. | |
50696 | ||
50697 | 2023-02-23 Arsen Arsenović <arsen@aarsen.me> | |
50698 | ||
50699 | * doc/cppdiropts.texi: Reorder @opindex commands to precede | |
50700 | @items they relate to. | |
50701 | * doc/cppopts.texi: Ditto. | |
50702 | * doc/cppwarnopts.texi: Ditto. | |
50703 | * doc/invoke.texi: Ditto. | |
50704 | * doc/lto.texi: Ditto. | |
50705 | ||
50706 | 2023-02-22 Andrew Stubbs <ams@codesourcery.com> | |
50707 | ||
50708 | * internal-fn.cc (expand_MASK_CALL): New. | |
50709 | * internal-fn.def (MASK_CALL): New. | |
50710 | * internal-fn.h (expand_MASK_CALL): New prototype. | |
50711 | * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type | |
50712 | for mask arguments also. | |
50713 | * tree-if-conv.cc: Include cgraph.h. | |
50714 | (if_convertible_stmt_p): Do if conversions for calls to SIMD calls. | |
50715 | (predicate_statements): Convert functions to IFN_MASK_CALL. | |
50716 | * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise | |
50717 | IFN_MASK_CALL as a SIMD function call. | |
50718 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle | |
50719 | IFN_MASK_CALL as an inbranch SIMD function call. | |
50720 | Generate the mask vector arguments. | |
50721 | ||
50722 | 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
50723 | ||
50724 | * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class. | |
50725 | (class widen_reducop): Ditto. | |
50726 | (class freducop): Ditto. | |
50727 | (class widen_freducop): Ditto. | |
50728 | (BASE): Ditto. | |
50729 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
50730 | * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support. | |
50731 | (vredmaxu): Ditto. | |
50732 | (vredmax): Ditto. | |
50733 | (vredminu): Ditto. | |
50734 | (vredmin): Ditto. | |
50735 | (vredand): Ditto. | |
50736 | (vredor): Ditto. | |
50737 | (vredxor): Ditto. | |
50738 | (vwredsum): Ditto. | |
50739 | (vwredsumu): Ditto. | |
50740 | (vfredusum): Ditto. | |
50741 | (vfredosum): Ditto. | |
50742 | (vfredmax): Ditto. | |
50743 | (vfredmin): Ditto. | |
50744 | (vfwredosum): Ditto. | |
50745 | (vfwredusum): Ditto. | |
50746 | * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto. | |
50747 | (SHAPE): Ditto. | |
50748 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
50749 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro. | |
50750 | (DEF_RVV_WU_OPS): Ditto. | |
50751 | (DEF_RVV_WF_OPS): Ditto. | |
50752 | (vint8mf8_t): Ditto. | |
50753 | (vint8mf4_t): Ditto. | |
50754 | (vint8mf2_t): Ditto. | |
50755 | (vint8m1_t): Ditto. | |
50756 | (vint8m2_t): Ditto. | |
50757 | (vint8m4_t): Ditto. | |
50758 | (vint8m8_t): Ditto. | |
50759 | (vint16mf4_t): Ditto. | |
50760 | (vint16mf2_t): Ditto. | |
50761 | (vint16m1_t): Ditto. | |
50762 | (vint16m2_t): Ditto. | |
50763 | (vint16m4_t): Ditto. | |
50764 | (vint16m8_t): Ditto. | |
50765 | (vint32mf2_t): Ditto. | |
50766 | (vint32m1_t): Ditto. | |
50767 | (vint32m2_t): Ditto. | |
50768 | (vint32m4_t): Ditto. | |
50769 | (vint32m8_t): Ditto. | |
50770 | (vuint8mf8_t): Ditto. | |
50771 | (vuint8mf4_t): Ditto. | |
50772 | (vuint8mf2_t): Ditto. | |
50773 | (vuint8m1_t): Ditto. | |
50774 | (vuint8m2_t): Ditto. | |
50775 | (vuint8m4_t): Ditto. | |
50776 | (vuint8m8_t): Ditto. | |
50777 | (vuint16mf4_t): Ditto. | |
50778 | (vuint16mf2_t): Ditto. | |
50779 | (vuint16m1_t): Ditto. | |
50780 | (vuint16m2_t): Ditto. | |
50781 | (vuint16m4_t): Ditto. | |
50782 | (vuint16m8_t): Ditto. | |
50783 | (vuint32mf2_t): Ditto. | |
50784 | (vuint32m1_t): Ditto. | |
50785 | (vuint32m2_t): Ditto. | |
50786 | (vuint32m4_t): Ditto. | |
50787 | (vuint32m8_t): Ditto. | |
50788 | (vfloat32mf2_t): Ditto. | |
50789 | (vfloat32m1_t): Ditto. | |
50790 | (vfloat32m2_t): Ditto. | |
50791 | (vfloat32m4_t): Ditto. | |
50792 | (vfloat32m8_t): Ditto. | |
50793 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto. | |
50794 | (DEF_RVV_WU_OPS): Ditto. | |
50795 | (DEF_RVV_WF_OPS): Ditto. | |
50796 | (required_extensions_p): Add reduction support. | |
50797 | (rvv_arg_type_info::get_base_vector_type): Ditto. | |
50798 | (rvv_arg_type_info::get_tree_type): Ditto. | |
50799 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto. | |
50800 | * config/riscv/riscv.md: Ditto. | |
50801 | * config/riscv/vector-iterators.md (minu): Ditto. | |
50802 | * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern. | |
50803 | (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto. | |
50804 | (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto. | |
50805 | (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto. | |
50806 | (@pred_reduc_plus<order><mode><vlmul1>): Ditto. | |
50807 | (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto. | |
50808 | (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto. | |
50809 | ||
50810 | 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
50811 | ||
50812 | * config/riscv/iterators.md: New iterator. | |
50813 | * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class. | |
50814 | (enum ternop_type): New enum. | |
50815 | (class vmacc): New class. | |
50816 | (class imac): Ditto. | |
50817 | (class vnmsac): Ditto. | |
50818 | (enum widen_ternop_type): New enum. | |
50819 | (class vmadd): Ditto. | |
50820 | (class vnmsub): Ditto. | |
50821 | (class iwmac): Ditto. | |
50822 | (class vwmacc): Ditto. | |
50823 | (class vwmaccu): Ditto. | |
50824 | (class vwmaccsu): Ditto. | |
50825 | (class vwmaccus): Ditto. | |
50826 | (class reverse_binop): Ditto. | |
50827 | (class vfmacc): Ditto. | |
50828 | (class vfnmsac): Ditto. | |
50829 | (class vfmadd): Ditto. | |
50830 | (class vfnmsub): Ditto. | |
50831 | (class vfnmacc): Ditto. | |
50832 | (class vfmsac): Ditto. | |
50833 | (class vfnmadd): Ditto. | |
50834 | (class vfmsub): Ditto. | |
50835 | (class vfwmacc): Ditto. | |
50836 | (class vfwnmacc): Ditto. | |
50837 | (class vfwmsac): Ditto. | |
50838 | (class vfwnmsac): Ditto. | |
50839 | (class float_misc): Ditto. | |
50840 | (class fcmp): Ditto. | |
50841 | (class vfclass): Ditto. | |
50842 | (class vfcvt_x): Ditto. | |
50843 | (class vfcvt_rtz_x): Ditto. | |
50844 | (class vfcvt_f): Ditto. | |
50845 | (class vfwcvt_x): Ditto. | |
50846 | (class vfwcvt_rtz_x): Ditto. | |
50847 | (class vfwcvt_f): Ditto. | |
50848 | (class vfncvt_x): Ditto. | |
50849 | (class vfncvt_rtz_x): Ditto. | |
50850 | (class vfncvt_f): Ditto. | |
50851 | (class vfncvt_rod_f): Ditto. | |
50852 | (BASE): Ditto. | |
50853 | * config/riscv/riscv-vector-builtins-bases.h: | |
50854 | * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto. | |
50855 | (vsext): Ditto. | |
50856 | (vfadd): Ditto. | |
50857 | (vfsub): Ditto. | |
50858 | (vfrsub): Ditto. | |
50859 | (vfwadd): Ditto. | |
50860 | (vfwsub): Ditto. | |
50861 | (vfmul): Ditto. | |
50862 | (vfdiv): Ditto. | |
50863 | (vfrdiv): Ditto. | |
50864 | (vfwmul): Ditto. | |
50865 | (vfmacc): Ditto. | |
50866 | (vfnmsac): Ditto. | |
50867 | (vfmadd): Ditto. | |
50868 | (vfnmsub): Ditto. | |
50869 | (vfnmacc): Ditto. | |
50870 | (vfmsac): Ditto. | |
50871 | (vfnmadd): Ditto. | |
50872 | (vfmsub): Ditto. | |
50873 | (vfwmacc): Ditto. | |
50874 | (vfwnmacc): Ditto. | |
50875 | (vfwmsac): Ditto. | |
50876 | (vfwnmsac): Ditto. | |
50877 | (vfsqrt): Ditto. | |
50878 | (vfrsqrt7): Ditto. | |
50879 | (vfrec7): Ditto. | |
50880 | (vfmin): Ditto. | |
50881 | (vfmax): Ditto. | |
50882 | (vfsgnj): Ditto. | |
50883 | (vfsgnjn): Ditto. | |
50884 | (vfsgnjx): Ditto. | |
50885 | (vfneg): Ditto. | |
50886 | (vfabs): Ditto. | |
50887 | (vmfeq): Ditto. | |
50888 | (vmfne): Ditto. | |
50889 | (vmflt): Ditto. | |
50890 | (vmfle): Ditto. | |
50891 | (vmfgt): Ditto. | |
50892 | (vmfge): Ditto. | |
50893 | (vfclass): Ditto. | |
50894 | (vfmerge): Ditto. | |
50895 | (vfmv_v): Ditto. | |
50896 | (vfcvt_x): Ditto. | |
50897 | (vfcvt_xu): Ditto. | |
50898 | (vfcvt_rtz_x): Ditto. | |
50899 | (vfcvt_rtz_xu): Ditto. | |
50900 | (vfcvt_f): Ditto. | |
50901 | (vfwcvt_x): Ditto. | |
50902 | (vfwcvt_xu): Ditto. | |
50903 | (vfwcvt_rtz_x): Ditto. | |
50904 | (vfwcvt_rtz_xu): Ditto. | |
50905 | (vfwcvt_f): Ditto. | |
50906 | (vfncvt_x): Ditto. | |
50907 | (vfncvt_xu): Ditto. | |
50908 | (vfncvt_rtz_x): Ditto. | |
50909 | (vfncvt_rtz_xu): Ditto. | |
50910 | (vfncvt_f): Ditto. | |
50911 | (vfncvt_rod_f): Ditto. | |
50912 | * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto. | |
50913 | (struct move_def): Ditto. | |
50914 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro. | |
50915 | (DEF_RVV_CONVERT_I_OPS): Ditto. | |
50916 | (DEF_RVV_CONVERT_U_OPS): Ditto. | |
50917 | (DEF_RVV_WCONVERT_I_OPS): Ditto. | |
50918 | (DEF_RVV_WCONVERT_U_OPS): Ditto. | |
50919 | (DEF_RVV_WCONVERT_F_OPS): Ditto. | |
50920 | (vfloat64m1_t): Ditto. | |
50921 | (vfloat64m2_t): Ditto. | |
50922 | (vfloat64m4_t): Ditto. | |
50923 | (vfloat64m8_t): Ditto. | |
50924 | (vint32mf2_t): Ditto. | |
50925 | (vint32m1_t): Ditto. | |
50926 | (vint32m2_t): Ditto. | |
50927 | (vint32m4_t): Ditto. | |
50928 | (vint32m8_t): Ditto. | |
50929 | (vint64m1_t): Ditto. | |
50930 | (vint64m2_t): Ditto. | |
50931 | (vint64m4_t): Ditto. | |
50932 | (vint64m8_t): Ditto. | |
50933 | (vuint32mf2_t): Ditto. | |
50934 | (vuint32m1_t): Ditto. | |
50935 | (vuint32m2_t): Ditto. | |
50936 | (vuint32m4_t): Ditto. | |
50937 | (vuint32m8_t): Ditto. | |
50938 | (vuint64m1_t): Ditto. | |
50939 | (vuint64m2_t): Ditto. | |
50940 | (vuint64m4_t): Ditto. | |
50941 | (vuint64m8_t): Ditto. | |
50942 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto. | |
50943 | (DEF_RVV_CONVERT_U_OPS): Ditto. | |
50944 | (DEF_RVV_WCONVERT_I_OPS): Ditto. | |
50945 | (DEF_RVV_WCONVERT_U_OPS): Ditto. | |
50946 | (DEF_RVV_WCONVERT_F_OPS): Ditto. | |
50947 | (DEF_RVV_F_OPS): Ditto. | |
50948 | (DEF_RVV_WEXTF_OPS): Ditto. | |
50949 | (required_extensions_p): Adjust for floating-point support. | |
50950 | (check_required_extensions): Ditto. | |
50951 | (unsigned_base_type_p): Ditto. | |
50952 | (get_mode_for_bitsize): Ditto. | |
50953 | (rvv_arg_type_info::get_base_vector_type): Ditto. | |
50954 | (rvv_arg_type_info::get_tree_type): Ditto. | |
50955 | * config/riscv/riscv-vector-builtins.def (v_f): New define. | |
50956 | (f): New define. | |
50957 | (f_v): New define. | |
50958 | (xu_v): New define. | |
50959 | (f_w): New define. | |
50960 | (xu_w): New define. | |
50961 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum. | |
50962 | (function_expander::arg_mode): New function. | |
50963 | * config/riscv/vector-iterators.md (sof): New iterator. | |
50964 | (vfrecp): Ditto. | |
50965 | (copysign): Ditto. | |
50966 | (n): Ditto. | |
50967 | (msac): Ditto. | |
50968 | (msub): Ditto. | |
50969 | (fixuns_trunc): Ditto. | |
50970 | (floatuns): Ditto. | |
50971 | * config/riscv/vector.md (@pred_broadcast<mode>): New pattern. | |
50972 | (@pred_<optab><mode>): Ditto. | |
50973 | (@pred_<optab><mode>_scalar): Ditto. | |
50974 | (@pred_<optab><mode>_reverse_scalar): Ditto. | |
50975 | (@pred_<copysign><mode>): Ditto. | |
50976 | (@pred_<copysign><mode>_scalar): Ditto. | |
50977 | (@pred_mul_<optab><mode>): Ditto. | |
50978 | (pred_mul_<optab><mode>_undef_merge): Ditto. | |
50979 | (*pred_<madd_nmsub><mode>): Ditto. | |
50980 | (*pred_<macc_nmsac><mode>): Ditto. | |
50981 | (*pred_mul_<optab><mode>): Ditto. | |
50982 | (@pred_mul_<optab><mode>_scalar): Ditto. | |
50983 | (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto. | |
50984 | (*pred_<madd_nmsub><mode>_scalar): Ditto. | |
50985 | (*pred_<macc_nmsac><mode>_scalar): Ditto. | |
50986 | (*pred_mul_<optab><mode>_scalar): Ditto. | |
50987 | (@pred_neg_mul_<optab><mode>): Ditto. | |
50988 | (pred_neg_mul_<optab><mode>_undef_merge): Ditto. | |
50989 | (*pred_<nmadd_msub><mode>): Ditto. | |
50990 | (*pred_<nmacc_msac><mode>): Ditto. | |
50991 | (*pred_neg_mul_<optab><mode>): Ditto. | |
50992 | (@pred_neg_mul_<optab><mode>_scalar): Ditto. | |
50993 | (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto. | |
50994 | (*pred_<nmadd_msub><mode>_scalar): Ditto. | |
50995 | (*pred_<nmacc_msac><mode>_scalar): Ditto. | |
50996 | (*pred_neg_mul_<optab><mode>_scalar): Ditto. | |
50997 | (@pred_<misc_op><mode>): Ditto. | |
50998 | (@pred_class<mode>): Ditto. | |
50999 | (@pred_dual_widen_<optab><mode>): Ditto. | |
51000 | (@pred_dual_widen_<optab><mode>_scalar): Ditto. | |
51001 | (@pred_single_widen_<plus_minus:optab><mode>): Ditto. | |
51002 | (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto. | |
51003 | (@pred_widen_mul_<optab><mode>): Ditto. | |
51004 | (@pred_widen_mul_<optab><mode>_scalar): Ditto. | |
51005 | (@pred_widen_neg_mul_<optab><mode>): Ditto. | |
51006 | (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto. | |
51007 | (@pred_cmp<mode>): Ditto. | |
51008 | (*pred_cmp<mode>): Ditto. | |
51009 | (*pred_cmp<mode>_narrow): Ditto. | |
51010 | (@pred_cmp<mode>_scalar): Ditto. | |
51011 | (*pred_cmp<mode>_scalar): Ditto. | |
51012 | (*pred_cmp<mode>_scalar_narrow): Ditto. | |
51013 | (@pred_eqne<mode>_scalar): Ditto. | |
51014 | (*pred_eqne<mode>_scalar): Ditto. | |
51015 | (*pred_eqne<mode>_scalar_narrow): Ditto. | |
51016 | (@pred_merge<mode>_scalar): Ditto. | |
51017 | (@pred_fcvt_x<v_su>_f<mode>): Ditto. | |
51018 | (@pred_<fix_cvt><mode>): Ditto. | |
51019 | (@pred_<float_cvt><mode>): Ditto. | |
51020 | (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto. | |
51021 | (@pred_widen_<fix_cvt><mode>): Ditto. | |
51022 | (@pred_widen_<float_cvt><mode>): Ditto. | |
51023 | (@pred_extend<mode>): Ditto. | |
51024 | (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto. | |
51025 | (@pred_narrow_<fix_cvt><mode>): Ditto. | |
51026 | (@pred_narrow_<float_cvt><mode>): Ditto. | |
51027 | (@pred_trunc<mode>): Ditto. | |
51028 | (@pred_rod_trunc<mode>): Ditto. | |
51029 | ||
51030 | 2023-02-22 Jakub Jelinek <jakub@redhat.com> | |
51031 | ||
51032 | PR middle-end/106258 | |
51033 | * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee, | |
51034 | cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node): | |
51035 | Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE. | |
51036 | * cgraphclones.cc (cgraph_node::create_clone): Likewise. | |
51037 | ||
51038 | 2023-02-22 Thomas Schwinge <thomas@codesourcery.com> | |
51039 | ||
51040 | * common.opt (-Wcomplain-wrong-lang): New. | |
51041 | * doc/invoke.texi (-Wno-complain-wrong-lang): Document it. | |
51042 | * opts-common.cc (prune_options): Handle it. | |
51043 | * opts-global.cc (complain_wrong_lang): Use it. | |
51044 | ||
51045 | 2023-02-21 David Malcolm <dmalcolm@redhat.com> | |
51046 | ||
51047 | PR analyzer/108830 | |
51048 | * doc/invoke.texi: Document -fno-analyzer-suppress-followups. | |
51049 | ||
51050 | 2023-02-21 Max Filippov <jcmvbkbc@gmail.com> | |
51051 | ||
51052 | PR target/108876 | |
51053 | * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use | |
51054 | for A0_REG. | |
51055 | * config/xtensa/xtensa.md (sibcall, sibcall_internal) | |
51056 | (sibcall_value, sibcall_value_internal): Add 'use' expression | |
51057 | for A0_REG. | |
51058 | ||
51059 | 2023-02-21 Richard Biener <rguenther@suse.de> | |
51060 | ||
51061 | PR tree-optimization/108691 | |
51062 | * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove | |
51063 | assert about calls_setjmp not becoming true when it was false. | |
51064 | ||
51065 | 2023-02-21 Richard Biener <rguenther@suse.de> | |
51066 | ||
51067 | PR tree-optimization/108793 | |
51068 | * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap): | |
51069 | Use convert operands to niter_type when computing num. | |
51070 | ||
51071 | 2023-02-21 Richard Biener <rguenther@suse.de> | |
51072 | ||
51073 | Revert: | |
51074 | 2023-02-13 Richard Biener <rguenther@suse.de> | |
51075 | ||
51076 | PR tree-optimization/108691 | |
51077 | * tree-cfg.cc (notice_special_calls): When the CFG is built | |
51078 | honor gimple_call_ctrl_altering_p. | |
51079 | * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp | |
51080 | temporarily if the call is not control-altering. | |
51081 | * calls.cc (emit_call_1): Do not add REG_SETJMP if | |
51082 | cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp. | |
51083 | ||
51084 | 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
51085 | ||
51086 | * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return | |
51087 | true if register A0 (return address register) when -Og is specified. | |
51088 | ||
51089 | 2023-02-20 Uroš Bizjak <ubizjak@gmail.com> | |
51090 | ||
51091 | * config/i386/predicates.md | |
51092 | (general_x64constmem_operand): New predicate. | |
51093 | * config/i386/i386.md (*cmpqi_ext<mode>_1): | |
51094 | Use nonimm_x64constmem_operand. | |
51095 | (*cmpqi_ext<mode>_3): Use general_x64constmem_operand. | |
51096 | (*addqi_ext<mode>_1): Ditto. | |
51097 | (*testqi_ext<mode>_1): Ditto. | |
51098 | (*andqi_ext<mode>_1): Ditto. | |
51099 | (*andqi_ext<mode>_1_cc): Ditto. | |
51100 | (*<any_or:code>qi_ext<mode>_1): Ditto. | |
51101 | (*xorqi_ext<mode>_1_cc): Ditto. | |
51102 | ||
51103 | 2023-02-20 Jakub Jelinek <jakub2redhat.com> | |
51104 | ||
51105 | PR target/108862 | |
51106 | * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with | |
51107 | gen_umadddi4_highpart{,_le}. | |
51108 | ||
51109 | 2023-02-20 Kito Cheng <kito.cheng@sifive.com> | |
51110 | ||
51111 | * config/riscv/riscv.md (prefetch): Use r instead of p for the | |
51112 | address operand. | |
51113 | (riscv_prefetchi_<mode>): Ditto. | |
51114 | ||
51115 | 2023-02-20 Richard Biener <rguenther@suse.de> | |
51116 | ||
51117 | PR tree-optimization/108816 | |
51118 | * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust | |
51119 | versioning condition split prerequesite, assert required | |
51120 | invariant. | |
51121 | ||
51122 | 2023-02-20 Richard Biener <rguenther@suse.de> | |
51123 | ||
51124 | PR tree-optimization/108825 | |
51125 | * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For | |
51126 | loop-local verfication only verify there's no pending SSA | |
51127 | update. | |
51128 | ||
51129 | 2023-02-20 Richard Biener <rguenther@suse.de> | |
51130 | ||
51131 | PR tree-optimization/108819 | |
51132 | * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check | |
51133 | we have an SSA name as iv_2 as expected. | |
51134 | ||
51135 | 2023-02-18 Jakub Jelinek <jakub@redhat.com> | |
51136 | ||
51137 | PR tree-optimization/108819 | |
51138 | * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place. | |
51139 | ||
51140 | 2023-02-18 Jakub Jelinek <jakub@redhat.com> | |
51141 | ||
51142 | PR target/108832 | |
51143 | * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare. | |
51144 | * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New | |
51145 | function. | |
51146 | * config/i386/i386.md: Replace replace_rtx calls in all peephole2s | |
51147 | with ix86_replace_reg_with_reg. | |
51148 | ||
51149 | 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com> | |
51150 | ||
51151 | * doc/invoke.texi (AVR Options): Update link to AVR-LibC. | |
51152 | ||
51153 | 2023-02-18 Xi Ruoyao <xry111@xry111.site> | |
51154 | ||
51155 | * config.gcc (triplet_abi): Set its value based on $with_abi, | |
51156 | instead of $target. | |
51157 | (la_canonical_triplet): Set it after $triplet_abi is set | |
51158 | correctly. | |
51159 | * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the | |
51160 | multiarch tuple for lp64d "loongarch64-linux-gnu" (without | |
51161 | "f64" suffix). | |
51162 | ||
51163 | 2023-02-18 Andrew Pinski <apinski@marvell.com> | |
51164 | ||
51165 | * match.pd: Remove #if GIMPLE around the | |
51166 | "1 - a" pattern | |
51167 | ||
51168 | 2023-02-18 Andrew Pinski <apinski@marvell.com> | |
51169 | ||
51170 | * value-query.h (get_range_query): Return the global ranges | |
51171 | for a nullptr func. | |
51172 | ||
51173 | 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org> | |
51174 | ||
51175 | * doc/invoke.texi (@item -Wall): Fix typo in | |
51176 | -Wuse-after-free. | |
51177 | ||
51178 | 2023-02-17 Uroš Bizjak <ubizjak@gmail.com> | |
51179 | ||
51180 | PR target/108831 | |
51181 | * config/i386/predicates.md | |
51182 | (nonimm_x64constmem_operand): New predicate. | |
51183 | * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern. | |
51184 | (*subqi_ext<mode>_0): Ditto. | |
51185 | (*andqi_ext<mode>_0): Ditto. | |
51186 | (*<any_or:code>qi_ext<mode>_0): Ditto. | |
51187 | ||
51188 | 2023-02-17 Uroš Bizjak <ubizjak@gmail.com> | |
51189 | ||
51190 | PR target/108805 | |
51191 | * simplify-rtx.cc (simplify_context::simplify_subreg): Use | |
51192 | int_outermode instead of GET_MODE (tem) to prevent | |
51193 | VOIDmode from entering simplify_gen_subreg. | |
51194 | ||
51195 | 2023-02-17 Richard Biener <rguenther@suse.de> | |
51196 | ||
51197 | PR tree-optimization/108821 | |
51198 | * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not | |
51199 | move volatile accesses. | |
51200 | ||
51201 | 2023-02-17 Richard Biener <rguenther@suse.de> | |
51202 | ||
51203 | * tree-ssa.cc (ssa_undefined_value_p): Assert we are not | |
51204 | called on virtual operands. | |
51205 | * tree-ssa-sccvn.cc (vn_phi_lookup): Guard | |
51206 | ssa_undefined_value_p calls. | |
51207 | (vn_phi_insert): Likewise. | |
51208 | (set_ssa_val_to): Likewise. | |
51209 | (visit_phi): Avoid extra work with equivalences for | |
51210 | virtual operand PHIs. | |
51211 | ||
51212 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51213 | ||
51214 | * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New | |
51215 | class. | |
51216 | (class mask_nlogic): Ditto. | |
51217 | (class mask_notlogic): Ditto. | |
51218 | (class vmmv): Ditto. | |
51219 | (class vmclr): Ditto. | |
51220 | (class vmset): Ditto. | |
51221 | (class vmnot): Ditto. | |
51222 | (class vcpop): Ditto. | |
51223 | (class vfirst): Ditto. | |
51224 | (class mask_misc): Ditto. | |
51225 | (class viota): Ditto. | |
51226 | (class vid): Ditto. | |
51227 | (BASE): Ditto. | |
51228 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
51229 | * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto. | |
51230 | (vmnand): Ditto. | |
51231 | (vmandn): Ditto. | |
51232 | (vmxor): Ditto. | |
51233 | (vmor): Ditto. | |
51234 | (vmnor): Ditto. | |
51235 | (vmorn): Ditto. | |
51236 | (vmxnor): Ditto. | |
51237 | (vmmv): Ditto. | |
51238 | (vmclr): Ditto. | |
51239 | (vmset): Ditto. | |
51240 | (vmnot): Ditto. | |
51241 | (vcpop): Ditto. | |
51242 | (vfirst): Ditto. | |
51243 | (vmsbf): Ditto. | |
51244 | (vmsif): Ditto. | |
51245 | (vmsof): Ditto. | |
51246 | (viota): Ditto. | |
51247 | (vid): Ditto. | |
51248 | * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto. | |
51249 | (struct mask_alu_def): Ditto. | |
51250 | (SHAPE): Ditto. | |
51251 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
51252 | * config/riscv/riscv-vector-builtins.cc: Ditto. | |
51253 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug | |
51254 | for dest it scalar RVV intrinsics. | |
51255 | * config/riscv/vector-iterators.md (sof): New iterator. | |
51256 | * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern. | |
51257 | (@pred_<optab>not<mode>): New pattern. | |
51258 | (@pred_popcount<VB:mode><P:mode>): New pattern. | |
51259 | (@pred_ffs<VB:mode><P:mode>): New pattern. | |
51260 | (@pred_<misc_op><mode>): New pattern. | |
51261 | (@pred_iota<mode>): New pattern. | |
51262 | (@pred_series<mode>): New pattern. | |
51263 | ||
51264 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51265 | ||
51266 | * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename. | |
51267 | (vsbc): Ditto. | |
51268 | (vmerge): Ditto. | |
51269 | (vmv_v): Ditto. | |
51270 | * config/riscv/riscv-vector-builtins.cc: Ditto. | |
51271 | ||
51272 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51273 | kito-cheng <kito.cheng@sifive.com> | |
51274 | ||
51275 | * config/riscv/riscv-protos.h (sew64_scalar_helper): New function. | |
51276 | * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust. | |
51277 | (sew64_scalar_helper): New function. | |
51278 | * config/riscv/vector.md: Normalization. | |
51279 | ||
51280 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51281 | ||
51282 | * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange. | |
51283 | (vsm): Ditto. | |
51284 | (vsse): Ditto. | |
51285 | (vsoxei64): Ditto. | |
51286 | (vsub): Ditto. | |
51287 | (vand): Ditto. | |
51288 | (vor): Ditto. | |
51289 | (vxor): Ditto. | |
51290 | (vsll): Ditto. | |
51291 | (vsra): Ditto. | |
51292 | (vsrl): Ditto. | |
51293 | (vmin): Ditto. | |
51294 | (vmax): Ditto. | |
51295 | (vminu): Ditto. | |
51296 | (vmaxu): Ditto. | |
51297 | (vmul): Ditto. | |
51298 | (vmulh): Ditto. | |
51299 | (vmulhu): Ditto. | |
51300 | (vmulhsu): Ditto. | |
51301 | (vdiv): Ditto. | |
51302 | (vrem): Ditto. | |
51303 | (vdivu): Ditto. | |
51304 | (vremu): Ditto. | |
51305 | (vnot): Ditto. | |
51306 | (vsext): Ditto. | |
51307 | (vzext): Ditto. | |
51308 | (vwadd): Ditto. | |
51309 | (vwsub): Ditto. | |
51310 | (vwmul): Ditto. | |
51311 | (vwmulu): Ditto. | |
51312 | (vwmulsu): Ditto. | |
51313 | (vwaddu): Ditto. | |
51314 | (vwsubu): Ditto. | |
51315 | (vsbc): Ditto. | |
51316 | (vmsbc): Ditto. | |
51317 | (vnsra): Ditto. | |
51318 | (vmerge): Ditto. | |
51319 | (vmv_v): Ditto. | |
51320 | (vmsne): Ditto. | |
51321 | (vmslt): Ditto. | |
51322 | (vmsgt): Ditto. | |
51323 | (vmsle): Ditto. | |
51324 | (vmsge): Ditto. | |
51325 | (vmsltu): Ditto. | |
51326 | (vmsgtu): Ditto. | |
51327 | (vmsleu): Ditto. | |
51328 | (vmsgeu): Ditto. | |
51329 | (vnmsac): Ditto. | |
51330 | (vmadd): Ditto. | |
51331 | (vnmsub): Ditto. | |
51332 | (vwmacc): Ditto. | |
51333 | (vsadd): Ditto. | |
51334 | (vssub): Ditto. | |
51335 | (vssubu): Ditto. | |
51336 | (vaadd): Ditto. | |
51337 | (vasub): Ditto. | |
51338 | (vasubu): Ditto. | |
51339 | (vsmul): Ditto. | |
51340 | (vssra): Ditto. | |
51341 | (vssrl): Ditto. | |
51342 | (vnclip): Ditto. | |
51343 | ||
51344 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51345 | ||
51346 | * config/riscv/vector.md (@pred_<optab><mode>): Rearrange. | |
51347 | (@pred_<optab><mode>_scalar): Ditto. | |
51348 | (*pred_<optab><mode>_scalar): Ditto. | |
51349 | (*pred_<optab><mode>_extended_scalar): Ditto. | |
51350 | ||
51351 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51352 | ||
51353 | * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'. | |
51354 | (init_builtins): Ditto. | |
51355 | (mangle_builtin_type): Ditto. | |
51356 | (verify_type_context): Ditto. | |
51357 | (handle_pragma_vector): Ditto. | |
51358 | (builtin_decl): Ditto. | |
51359 | (expand_builtin): Ditto. | |
51360 | (const_vec_all_same_in_range_p): Ditto. | |
51361 | (legitimize_move): Ditto. | |
51362 | (emit_vlmax_op): Ditto. | |
51363 | (emit_nonvlmax_op): Ditto. | |
51364 | (get_vlmul): Ditto. | |
51365 | (get_ratio): Ditto. | |
51366 | (get_ta): Ditto. | |
51367 | (get_ma): Ditto. | |
51368 | (get_avl_type): Ditto. | |
51369 | (calculate_ratio): Ditto. | |
51370 | (enum vlmul_type): Ditto. | |
51371 | (simm5_p): Ditto. | |
51372 | (neg_simm5_p): Ditto. | |
51373 | (has_vi_variant_p): Ditto. | |
51374 | ||
51375 | 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51376 | ||
51377 | * config/riscv/riscv-protos.h (simm32_p): Remove. | |
51378 | * config/riscv/riscv-v.cc (simm32_p): Ditto. | |
51379 | * config/riscv/vector.md: Use immediate_operand | |
51380 | instead of riscv_vector::simm32_p. | |
51381 | ||
51382 | 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com> | |
51383 | ||
51384 | * doc/invoke.texi (Optimize Options): Reword the explanation | |
51385 | getting minimal, maximal and default values of a parameter. | |
51386 | ||
51387 | 2023-02-16 Patrick Palka <ppalka@redhat.com> | |
51388 | ||
51389 | * addresses.h: Mechanically drop 'static' from 'static inline' | |
51390 | functions via s/^static inline/inline/g. | |
51391 | * asan.h: Likewise. | |
51392 | * attribs.h: Likewise. | |
51393 | * basic-block.h: Likewise. | |
51394 | * bitmap.h: Likewise. | |
51395 | * cfghooks.h: Likewise. | |
51396 | * cfgloop.h: Likewise. | |
51397 | * cgraph.h: Likewise. | |
51398 | * cselib.h: Likewise. | |
51399 | * data-streamer.h: Likewise. | |
51400 | * debug.h: Likewise. | |
51401 | * df.h: Likewise. | |
51402 | * diagnostic.h: Likewise. | |
51403 | * dominance.h: Likewise. | |
51404 | * dumpfile.h: Likewise. | |
51405 | * emit-rtl.h: Likewise. | |
51406 | * except.h: Likewise. | |
51407 | * expmed.h: Likewise. | |
51408 | * expr.h: Likewise. | |
51409 | * fixed-value.h: Likewise. | |
51410 | * gengtype.h: Likewise. | |
51411 | * gimple-expr.h: Likewise. | |
51412 | * gimple-iterator.h: Likewise. | |
51413 | * gimple-predict.h: Likewise. | |
51414 | * gimple-range-fold.h: Likewise. | |
51415 | * gimple-ssa.h: Likewise. | |
51416 | * gimple.h: Likewise. | |
51417 | * graphite.h: Likewise. | |
51418 | * hard-reg-set.h: Likewise. | |
51419 | * hash-map.h: Likewise. | |
51420 | * hash-set.h: Likewise. | |
51421 | * hash-table.h: Likewise. | |
51422 | * hwint.h: Likewise. | |
51423 | * input.h: Likewise. | |
51424 | * insn-addr.h: Likewise. | |
51425 | * internal-fn.h: Likewise. | |
51426 | * ipa-fnsummary.h: Likewise. | |
51427 | * ipa-icf-gimple.h: Likewise. | |
51428 | * ipa-inline.h: Likewise. | |
51429 | * ipa-modref.h: Likewise. | |
51430 | * ipa-prop.h: Likewise. | |
51431 | * ira-int.h: Likewise. | |
51432 | * ira.h: Likewise. | |
51433 | * lra-int.h: Likewise. | |
51434 | * lra.h: Likewise. | |
51435 | * lto-streamer.h: Likewise. | |
51436 | * memmodel.h: Likewise. | |
51437 | * omp-general.h: Likewise. | |
51438 | * optabs-query.h: Likewise. | |
51439 | * optabs.h: Likewise. | |
51440 | * plugin.h: Likewise. | |
51441 | * pretty-print.h: Likewise. | |
51442 | * range.h: Likewise. | |
51443 | * read-md.h: Likewise. | |
51444 | * recog.h: Likewise. | |
51445 | * regs.h: Likewise. | |
51446 | * rtl-iter.h: Likewise. | |
51447 | * rtl.h: Likewise. | |
51448 | * sbitmap.h: Likewise. | |
51449 | * sched-int.h: Likewise. | |
51450 | * sel-sched-ir.h: Likewise. | |
51451 | * sese.h: Likewise. | |
51452 | * sparseset.h: Likewise. | |
51453 | * ssa-iterators.h: Likewise. | |
51454 | * system.h: Likewise. | |
51455 | * target-globals.h: Likewise. | |
51456 | * target.h: Likewise. | |
51457 | * timevar.h: Likewise. | |
51458 | * tree-chrec.h: Likewise. | |
51459 | * tree-data-ref.h: Likewise. | |
51460 | * tree-iterator.h: Likewise. | |
51461 | * tree-outof-ssa.h: Likewise. | |
51462 | * tree-phinodes.h: Likewise. | |
51463 | * tree-scalar-evolution.h: Likewise. | |
51464 | * tree-sra.h: Likewise. | |
51465 | * tree-ssa-alias.h: Likewise. | |
51466 | * tree-ssa-live.h: Likewise. | |
51467 | * tree-ssa-loop-manip.h: Likewise. | |
51468 | * tree-ssa-loop.h: Likewise. | |
51469 | * tree-ssa-operands.h: Likewise. | |
51470 | * tree-ssa-propagate.h: Likewise. | |
51471 | * tree-ssa-sccvn.h: Likewise. | |
51472 | * tree-ssa.h: Likewise. | |
51473 | * tree-ssanames.h: Likewise. | |
51474 | * tree-streamer.h: Likewise. | |
51475 | * tree-switch-conversion.h: Likewise. | |
51476 | * tree-vectorizer.h: Likewise. | |
51477 | * tree.h: Likewise. | |
51478 | * wide-int.h: Likewise. | |
51479 | ||
51480 | 2023-02-16 Jakub Jelinek <jakub@redhat.com> | |
51481 | ||
51482 | PR tree-optimization/108657 | |
51483 | * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt | |
51484 | exists and is not a SSA_NAME, call ao_ref_init even if the stmt | |
51485 | is a call to internal or builtin function. | |
51486 | ||
51487 | 2023-02-16 Jonathan Wakely <jwakely@redhat.com> | |
51488 | ||
51489 | * doc/invoke.texi (C++ Dialect Options): Suggest adding a | |
51490 | using-declaration to unhide functions. | |
51491 | ||
51492 | 2023-02-16 Jakub Jelinek <jakub@redhat.com> | |
51493 | ||
51494 | PR tree-optimization/108783 | |
51495 | * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode | |
51496 | is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set | |
51497 | t to curr->op. Otherwise, punt if either newop1 or newop2 are | |
51498 | SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs. | |
51499 | ||
51500 | 2023-02-16 Richard Biener <rguenther@suse.de> | |
51501 | ||
51502 | PR tree-optimization/108791 | |
51503 | * tree-ssa-forwprop.cc (optimize_vector_load): Build | |
51504 | the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful | |
51505 | type. | |
51506 | ||
51507 | 2023-02-15 Eric Botcazou <ebotcazou@adacore.com> | |
51508 | ||
51509 | PR target/90458 | |
51510 | * config/i386/i386.cc (ix86_compute_frame_layout): Disable the | |
51511 | effects of -fstack-clash-protection for TARGET_STACK_PROBE. | |
51512 | (ix86_expand_prologue): Likewise. | |
51513 | ||
51514 | 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de> | |
51515 | ||
51516 | * config/bpf/bpf.cc (bpf_option_override): Fix doubled space. | |
51517 | ||
51518 | 2023-02-15 Uroš Bizjak <ubizjak@gmail.com> | |
51519 | ||
51520 | * config/i386/i386.md (*cmpqi_ext<mode>_1): Use | |
51521 | int248_register_operand predicate in zero_extract sub-RTX. | |
51522 | (*cmpqi_ext<mode>_2): Ditto. | |
51523 | (*cmpqi_ext<mode>_3): Ditto. | |
51524 | (*cmpqi_ext<mode>_4): Ditto. | |
51525 | (*extzvqi_mem_rex64): Ditto. | |
51526 | (*extzvqi): Ditto. | |
51527 | (*insvqi_1_mem_rex64): Ditto. | |
51528 | (@insv<mode>_1): Ditto. | |
51529 | (*insvqi_1): Ditto. | |
51530 | (*insvqi_2): Ditto. | |
51531 | (*insvqi_3): Ditto. | |
51532 | (*extendqi<SWI24:mode>_ext_1): Ditto. | |
51533 | (*addqi_ext<mode>_1): Ditto. | |
51534 | (*addqi_ext<mode>_2): Ditto. | |
51535 | (*subqi_ext<mode>_2): Ditto. | |
51536 | (*testqi_ext<mode>_1): Ditto. | |
51537 | (*testqi_ext<mode>_2): Ditto. | |
51538 | (*andqi_ext<mode>_1): Ditto. | |
51539 | (*andqi_ext<mode>_1_cc): Ditto. | |
51540 | (*andqi_ext<mode>_2): Ditto. | |
51541 | (*<any_or:code>qi_ext<mode>_1): Ditto. | |
51542 | (*<any_or:code>qi_ext<mode>_2): Ditto. | |
51543 | (*xorqi_ext<mode>_1_cc): Ditto. | |
51544 | (*negqi_ext<mode>_2): Ditto. | |
51545 | (*ashlqi_ext<mode>_2): Ditto. | |
51546 | (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto. | |
51547 | ||
51548 | 2023-02-15 Uroš Bizjak <ubizjak@gmail.com> | |
51549 | ||
51550 | * config/i386/predicates.md (int248_register_operand): | |
51551 | Rename from extr_register_operand. | |
51552 | * config/i386/i386.md (*extv<mode>): Update for renamed predicate. | |
51553 | (*extzx<mode>): Ditto. | |
51554 | (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate. | |
51555 | (*ashl<mode>3_mask): Ditto. | |
51556 | (*<any_shiftrt:insn><mode>3_mask): Ditto. | |
51557 | (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto. | |
51558 | (*<any_rotate:insn><mode>3_mask): Ditto. | |
51559 | (*<btsc><mode>_mask): Ditto. | |
51560 | (*btr<mode>_mask): Ditto. | |
51561 | (*jcc_bt<mode>_mask_1): Ditto. | |
51562 | ||
51563 | 2023-02-15 Richard Biener <rguenther@suse.de> | |
51564 | ||
51565 | PR middle-end/26854 | |
51566 | * df-core.cc (df_worklist_propagate_forward): Put later | |
51567 | blocks on worklist and only earlier blocks on pending. | |
51568 | (df_worklist_propagate_backward): Likewise. | |
51569 | (df_worklist_dataflow_doublequeue): Change the iteration | |
51570 | to process new blocks in the same iteration if that | |
51571 | maintains the iteration order. | |
51572 | ||
51573 | 2023-02-15 Marek Polacek <polacek@redhat.com> | |
51574 | ||
51575 | PR middle-end/106080 | |
51576 | * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p | |
51577 | instead. | |
51578 | ||
51579 | 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51580 | ||
51581 | * config/riscv/predicates.md: Refine codes. | |
51582 | * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro. | |
51583 | * config/riscv/riscv-v.cc: Refine codes. | |
51584 | * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New | |
51585 | enum. | |
51586 | (class imac): New class. | |
51587 | (enum widen_ternop_type): New enum. | |
51588 | (class iwmac): New class. | |
51589 | (BASE): New class. | |
51590 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
51591 | * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto. | |
51592 | (vnmsac): Ditto. | |
51593 | (vmadd): Ditto. | |
51594 | (vnmsub): Ditto. | |
51595 | (vwmacc): Ditto. | |
51596 | (vwmaccu): Ditto. | |
51597 | (vwmaccsu): Ditto. | |
51598 | (vwmaccus): Ditto. | |
51599 | * config/riscv/riscv-vector-builtins.cc | |
51600 | (function_builder::apply_predication): Adjust for multiply-add support. | |
51601 | (function_expander::add_vundef_operand): Refine codes. | |
51602 | (function_expander::use_ternop_insn): New function. | |
51603 | (function_expander::use_widen_ternop_insn): Ditto. | |
51604 | * config/riscv/riscv-vector-builtins.h: New function. | |
51605 | * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern. | |
51606 | (pred_mul_<optab><mode>_undef_merge): Ditto. | |
51607 | (*pred_<madd_nmsub><mode>): Ditto. | |
51608 | (*pred_<macc_nmsac><mode>): Ditto. | |
51609 | (*pred_mul_<optab><mode>): Ditto. | |
51610 | (@pred_mul_<optab><mode>_scalar): Ditto. | |
51611 | (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto. | |
51612 | (*pred_<madd_nmsub><mode>_scalar): Ditto. | |
51613 | (*pred_<macc_nmsac><mode>_scalar): Ditto. | |
51614 | (*pred_mul_<optab><mode>_scalar): Ditto. | |
51615 | (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto. | |
51616 | (*pred_<madd_nmsub><mode>_extended_scalar): Ditto. | |
51617 | (*pred_<macc_nmsac><mode>_extended_scalar): Ditto. | |
51618 | (*pred_mul_<optab><mode>_extended_scalar): Ditto. | |
51619 | (@pred_widen_mul_plus<su><mode>): Ditto. | |
51620 | (@pred_widen_mul_plus<su><mode>_scalar): Ditto. | |
51621 | (@pred_widen_mul_plussu<mode>): Ditto. | |
51622 | (@pred_widen_mul_plussu<mode>_scalar): Ditto. | |
51623 | (@pred_widen_mul_plusus<mode>_scalar): Ditto. | |
51624 | ||
51625 | 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51626 | ||
51627 | * config/riscv/predicates.md (vector_mask_operand): Refine the codes. | |
51628 | (vector_all_trues_mask_operand): New predicate. | |
51629 | (vector_undef_operand): New predicate. | |
51630 | (ltge_operator): New predicate. | |
51631 | (comparison_except_ltge_operator): New predicate. | |
51632 | (comparison_except_eqge_operator): New predicate. | |
51633 | (ge_operator): New predicate. | |
51634 | * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support. | |
51635 | * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class. | |
51636 | (BASE): Ditto. | |
51637 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
51638 | * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto. | |
51639 | (vmsne): Ditto. | |
51640 | (vmslt): Ditto. | |
51641 | (vmsgt): Ditto. | |
51642 | (vmsle): Ditto. | |
51643 | (vmsge): Ditto. | |
51644 | (vmsltu): Ditto. | |
51645 | (vmsgtu): Ditto. | |
51646 | (vmsleu): Ditto. | |
51647 | (vmsgeu): Ditto. | |
51648 | * config/riscv/riscv-vector-builtins-shapes.cc | |
51649 | (struct return_mask_def): Adjust for compare support. | |
51650 | * config/riscv/riscv-vector-builtins.cc | |
51651 | (function_expander::use_compare_insn): New function. | |
51652 | * config/riscv/riscv-vector-builtins.h | |
51653 | (function_expander::add_integer_operand): Ditto. | |
51654 | * config/riscv/riscv.cc (riscv_print_operand): Add compare support. | |
51655 | * config/riscv/riscv.md: Add vector min/max attributes. | |
51656 | * config/riscv/vector-iterators.md (xnor): New iterator. | |
51657 | * config/riscv/vector.md (@pred_cmp<mode>): New pattern. | |
51658 | (*pred_cmp<mode>): Ditto. | |
51659 | (*pred_cmp<mode>_narrow): Ditto. | |
51660 | (@pred_ltge<mode>): Ditto. | |
51661 | (*pred_ltge<mode>): Ditto. | |
51662 | (*pred_ltge<mode>_narrow): Ditto. | |
51663 | (@pred_cmp<mode>_scalar): Ditto. | |
51664 | (*pred_cmp<mode>_scalar): Ditto. | |
51665 | (*pred_cmp<mode>_scalar_narrow): Ditto. | |
51666 | (@pred_eqne<mode>_scalar): Ditto. | |
51667 | (*pred_eqne<mode>_scalar): Ditto. | |
51668 | (*pred_eqne<mode>_scalar_narrow): Ditto. | |
51669 | (*pred_cmp<mode>_extended_scalar): Ditto. | |
51670 | (*pred_cmp<mode>_extended_scalar_narrow): Ditto. | |
51671 | (*pred_eqne<mode>_extended_scalar): Ditto. | |
51672 | (*pred_eqne<mode>_extended_scalar_narrow): Ditto. | |
51673 | (@pred_ge<mode>_scalar): Ditto. | |
51674 | (@pred_<optab><mode>): Ditto. | |
51675 | (@pred_n<optab><mode>): Ditto. | |
51676 | (@pred_<optab>n<mode>): Ditto. | |
51677 | (@pred_not<mode>): Ditto. | |
51678 | ||
51679 | 2023-02-15 Martin Jambor <mjambor@suse.cz> | |
51680 | ||
51681 | PR ipa/108679 | |
51682 | * ipa-sra.cc (push_param_adjustments_for_index): Do not omit | |
51683 | creation of non-scalar replacements even if IPA-CP knows their | |
51684 | contents. | |
51685 | ||
51686 | 2023-02-15 Jakub Jelinek <jakub@redhat.com> | |
51687 | ||
51688 | PR target/108787 | |
51689 | PR target/103109 | |
51690 | * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only | |
51691 | expander, change operand 3 to be TImode, emit maddlddi4 and | |
51692 | umadddi4_highpart{,_le} with its low half and finally add the high | |
51693 | half to the result. | |
51694 | ||
51695 | 2023-02-15 Martin Liska <mliska@suse.cz> | |
51696 | ||
51697 | * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix. | |
51698 | ||
51699 | 2023-02-15 Richard Biener <rguenther@suse.de> | |
51700 | ||
51701 | * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap | |
51702 | for with_poison and alias worklist to it. | |
51703 | (sanitize_asan_mark_poison): Likewise. | |
51704 | ||
51705 | 2023-02-15 Richard Biener <rguenther@suse.de> | |
51706 | ||
51707 | PR target/108738 | |
51708 | * config/i386/i386-features.cc (scalar_chain::add_to_queue): | |
51709 | Combine bitmap test and set. | |
51710 | (scalar_chain::add_insn): Likewise. | |
51711 | (scalar_chain::analyze_register_chain): Remove redundant | |
51712 | attempt to add to queue and instead strengthen assert. | |
51713 | Sink common attempts to mark the def dual-mode. | |
51714 | (scalar_chain::add_to_queue): Remove redundant insn bitmap | |
51715 | check. | |
51716 | ||
51717 | 2023-02-15 Richard Biener <rguenther@suse.de> | |
51718 | ||
51719 | PR target/108738 | |
51720 | * config/i386/i386-features.cc (convert_scalars_to_vector): | |
51721 | Switch candidates bitmaps to tree view before building the chains. | |
51722 | ||
51723 | 2023-02-15 Hans-Peter Nilsson <hp@axis.com> | |
51724 | ||
51725 | * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn | |
51726 | "failure trying to reload" call. | |
51727 | ||
51728 | 2023-02-15 Hans-Peter Nilsson <hp@axis.com> | |
51729 | ||
51730 | * gdbinit.in (phrs): New command. | |
51731 | * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function. | |
51732 | * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set. | |
51733 | ||
51734 | 2023-02-14 David Faust <david.faust@oracle.com> | |
51735 | ||
51736 | PR target/108790 | |
51737 | * config/bpf/constraints.md (q): New memory constraint. | |
51738 | * config/bpf/bpf.md (zero_extendhidi2): Use it here. | |
51739 | (zero_extendqidi2): Likewise. | |
51740 | (zero_extendsidi2): Likewise. | |
51741 | (*mov<MM:mode>): Likewise. | |
51742 | ||
51743 | 2023-02-14 Andrew Pinski <apinski@marvell.com> | |
51744 | ||
51745 | PR tree-optimization/108355 | |
51746 | PR tree-optimization/96921 | |
51747 | * match.pd: Add pattern for "1 - bool_val". | |
51748 | ||
51749 | 2023-02-14 Richard Biener <rguenther@suse.de> | |
51750 | ||
51751 | * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping | |
51752 | basic block index hashing on the availability of ->cclhs. | |
51753 | (vn_phi_eq): Avoid re-doing sanity checks for CSE but | |
51754 | rely on ->cclhs availability. | |
51755 | (vn_phi_lookup): Set ->cclhs only when we are eventually | |
51756 | going to CSE the PHI. | |
51757 | (vn_phi_insert): Likewise. | |
51758 | ||
51759 | 2023-02-14 Eric Botcazou <ebotcazou@adacore.com> | |
51760 | ||
51761 | * gimplify.cc (gimplify_save_expr): Add missing guard. | |
51762 | ||
51763 | 2023-02-14 Richard Biener <rguenther@suse.de> | |
51764 | ||
51765 | PR tree-optimization/108782 | |
51766 | * tree-vect-loop.cc (vect_phi_first_order_recurrence_p): | |
51767 | Make sure we're not vectorizing an inner loop. | |
51768 | ||
51769 | 2023-02-14 Jakub Jelinek <jakub@redhat.com> | |
51770 | ||
51771 | PR sanitizer/108777 | |
51772 | * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param. | |
51773 | * asan.h (asan_memfn_rtl): Declare. | |
51774 | * asan.cc (asan_memfn_rtls): New variable. | |
51775 | (asan_memfn_rtl): New function. | |
51776 | * builtins.cc (expand_builtin): If | |
51777 | param_asan_kernel_mem_intrinsic_prefix and function is | |
51778 | kernel-{,hw}address sanitized, emit calls to | |
51779 | __{,hw}asan_{memcpy,memmove,memset} rather than | |
51780 | {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS) | |
51781 | instead of flag_sanitize & SANITIZE_ADDRESS to check if | |
51782 | asan_intercepted_p functions shouldn't be expanded inline. | |
51783 | ||
51784 | 2023-02-14 Richard Sandiford <richard.sandiford@arm.com> | |
51785 | ||
51786 | PR tree-optimization/96373 | |
51787 | * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping | |
51788 | operations on the loop mask. Reject partial vectors if this isn't | |
51789 | possible. | |
51790 | ||
51791 | 2023-02-13 Richard Sandiford <richard.sandiford@arm.com> | |
51792 | ||
51793 | PR rtl-optimization/108681 | |
51794 | * lra-spills.cc (lra_final_code_change): Extend subreg replacement | |
51795 | code to handle bare uses and clobbers. | |
51796 | ||
51797 | 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com> | |
51798 | ||
51799 | * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv | |
51800 | caller_save_p flag when clearing defined_p flag. | |
51801 | (setup_reg_equiv): Ditto. | |
51802 | * lra-constraints.cc (lra_constraints): Ditto. | |
51803 | ||
51804 | 2023-02-13 Uroš Bizjak <ubizjak@gmail.com> | |
51805 | ||
51806 | PR target/108516 | |
51807 | * config/i386/predicates.md (extr_register_operand): | |
51808 | New special predicate. | |
51809 | * config/i386/i386.md (*extv<mode>): Use extr_register_operand | |
51810 | as operand 1 predicate. | |
51811 | (*exzv<mode>): Ditto. | |
51812 | (*extendqi<SWI24:mode>_ext_1): New insn pattern. | |
51813 | ||
51814 | 2023-02-13 Richard Biener <rguenther@suse.de> | |
51815 | ||
51816 | PR tree-optimization/28614 | |
51817 | * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid | |
51818 | walking all edges in most cases. | |
51819 | (vn_nary_op_insert_pieces_predicated): Avoid repeated | |
51820 | calls to can_track_predicate_on_edge unless checking is | |
51821 | enabled. | |
51822 | (process_bb): Instead call it once here for each edge | |
51823 | we register possibly multiple predicates on. | |
51824 | ||
51825 | 2023-02-13 Richard Biener <rguenther@suse.de> | |
51826 | ||
51827 | PR tree-optimization/108691 | |
51828 | * tree-cfg.cc (notice_special_calls): When the CFG is built | |
51829 | honor gimple_call_ctrl_altering_p. | |
51830 | * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp | |
51831 | temporarily if the call is not control-altering. | |
51832 | * calls.cc (emit_call_1): Do not add REG_SETJMP if | |
51833 | cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp. | |
51834 | ||
51835 | 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
51836 | ||
51837 | PR target/108102 | |
51838 | * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove. | |
51839 | (struct s390_sched_state): Initialise to zero. | |
51840 | (s390_sched_variable_issue): For better debuggability also emit | |
51841 | the current side. | |
51842 | (s390_sched_init): Unconditionally reset scheduler state. | |
51843 | ||
51844 | 2023-02-13 Richard Sandiford <richard.sandiford@arm.com> | |
51845 | ||
51846 | * ifcvt.h (noce_if_info::cond_inverted): New field. | |
51847 | * ifcvt.cc (cond_move_convert_if_block): Swap the then and else | |
51848 | values when cond_inverted is true. | |
51849 | (noce_find_if_block): Allow the condition to be inverted when | |
51850 | handling conditional moves. | |
51851 | ||
51852 | 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
51853 | ||
51854 | * config/s390/predicates.md (execute_operation): Use | |
51855 | constrain_operands instead of extract_constrain_insn in order to | |
51856 | determine wheter there exists a valid alternative. | |
51857 | ||
51858 | 2023-02-13 Claudiu Zissulescu <claziss@gmail.com> | |
51859 | ||
51860 | * common/config/arc/arc-common.cc (arc_option_optimization_table): | |
51861 | Remove millicode from list. | |
51862 | ||
51863 | 2023-02-13 Martin Liska <mliska@suse.cz> | |
51864 | ||
51865 | * doc/invoke.texi: Document ira-simple-lra-insn-threshold. | |
51866 | ||
51867 | 2023-02-13 Richard Biener <rguenther@suse.de> | |
51868 | ||
51869 | PR tree-optimization/106722 | |
51870 | * tree-ssa-dce.cc (mark_last_stmt_necessary): Return | |
51871 | whether we marked a stmt. | |
51872 | (mark_control_dependent_edges_necessary): When | |
51873 | mark_last_stmt_necessary didn't mark any stmt make sure | |
51874 | to mark its control dependent edges. | |
51875 | (propagate_necessity): Likewise. | |
51876 | ||
51877 | 2023-02-13 Kito Cheng <kito.cheng@sifive.com> | |
51878 | ||
51879 | * config/riscv/riscv.h (RISCV_DWARF_VLENB): New. | |
51880 | (DWARF_FRAME_REGISTERS): New. | |
51881 | (DWARF_REG_TO_UNWIND_COLUMN): New. | |
51882 | ||
51883 | 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com> | |
51884 | ||
51885 | * doc/sourcebuild.texi: Remove (broken) direct reference to | |
51886 | "The GNU configure and build system". | |
51887 | ||
51888 | 2023-02-12 Jin Ma <jinma@linux.alibaba.com> | |
51889 | ||
51890 | * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change | |
51891 | gen_add3_insn to gen_rtx_SET. | |
51892 | (riscv_adjust_libcall_cfi_epilogue): Likewise. | |
51893 | ||
51894 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51895 | ||
51896 | * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class. | |
51897 | (class vnclip): Ditto. | |
51898 | (BASE): Ditto. | |
51899 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
51900 | * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto. | |
51901 | (vasub): Ditto. | |
51902 | (vaaddu): Ditto. | |
51903 | (vasubu): Ditto. | |
51904 | (vsmul): Ditto. | |
51905 | (vssra): Ditto. | |
51906 | (vssrl): Ditto. | |
51907 | (vnclipu): Ditto. | |
51908 | (vnclip): Ditto. | |
51909 | * config/riscv/vector-iterators.md (su): Add instruction. | |
51910 | (aadd): Ditto. | |
51911 | (vaalu): Ditto. | |
51912 | * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern. | |
51913 | (@pred_<sat_op><mode>_scalar): Ditto. | |
51914 | (*pred_<sat_op><mode>_scalar): Ditto. | |
51915 | (*pred_<sat_op><mode>_extended_scalar): Ditto. | |
51916 | (@pred_narrow_clip<v_su><mode>): Ditto. | |
51917 | (@pred_narrow_clip<v_su><mode>_scalar): Ditto. | |
51918 | ||
51919 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51920 | ||
51921 | * config/riscv/constraints.md (Wbr): Remove unused constraint. | |
51922 | * config/riscv/predicates.md: Fix move operand predicate. | |
51923 | * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class. | |
51924 | (class vncvt_x): Ditto. | |
51925 | (class vmerge): Ditto. | |
51926 | (class vmv_v): Ditto. | |
51927 | (BASE): Ditto. | |
51928 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
51929 | * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto. | |
51930 | (vsrl): Ditto. | |
51931 | (vnsrl): Ditto. | |
51932 | (vnsra): Ditto. | |
51933 | (vncvt_x): Ditto. | |
51934 | (vmerge): Ditto. | |
51935 | (vmv_v): Ditto. | |
51936 | * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto. | |
51937 | (struct move_def): Ditto. | |
51938 | (SHAPE): Ditto. | |
51939 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
51940 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable. | |
51941 | (DEF_RVV_WEXTU_OPS): Ditto | |
51942 | * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix. | |
51943 | (v_v): Ditto. | |
51944 | (v_x): Ditto. | |
51945 | (x_w): Ditto. | |
51946 | (x): Ditto. | |
51947 | * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule. | |
51948 | * config/riscv/vector-iterators.md (nmsac):New iterator. | |
51949 | (nmsub): New iterator. | |
51950 | * config/riscv/vector.md (@pred_merge<mode>): New pattern. | |
51951 | (@pred_merge<mode>_scalar): New pattern. | |
51952 | (*pred_merge<mode>_scalar): New pattern. | |
51953 | (*pred_merge<mode>_extended_scalar): New pattern. | |
51954 | (@pred_narrow_<optab><mode>): New pattern. | |
51955 | (@pred_narrow_<optab><mode>_scalar): New pattern. | |
51956 | (@pred_trunc<mode>): New pattern. | |
51957 | ||
51958 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51959 | ||
51960 | * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class. | |
51961 | (class vmsbc): Ditto. | |
51962 | (BASE): Define new class. | |
51963 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
51964 | * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define. | |
51965 | (vmsbc): Ditto. | |
51966 | * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): | |
51967 | New class. | |
51968 | (SHAPE): Ditto. | |
51969 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
51970 | * config/riscv/riscv-vector-builtins.cc | |
51971 | (function_expander::use_exact_insn): Adjust for new support | |
51972 | * config/riscv/riscv-vector-builtins.h | |
51973 | (function_base::has_merge_operand_p): New function. | |
51974 | * config/riscv/vector-iterators.md: New iterator. | |
51975 | * config/riscv/vector.md (@pred_madc<mode>): New pattern. | |
51976 | (@pred_msbc<mode>): Ditto. | |
51977 | (@pred_madc<mode>_scalar): Ditto. | |
51978 | (@pred_msbc<mode>_scalar): Ditto. | |
51979 | (*pred_madc<mode>_scalar): Ditto. | |
51980 | (*pred_madc<mode>_extended_scalar): Ditto. | |
51981 | (*pred_msbc<mode>_scalar): Ditto. | |
51982 | (*pred_msbc<mode>_extended_scalar): Ditto. | |
51983 | (@pred_madc<mode>_overflow): Ditto. | |
51984 | (@pred_msbc<mode>_overflow): Ditto. | |
51985 | (@pred_madc<mode>_overflow_scalar): Ditto. | |
51986 | (@pred_msbc<mode>_overflow_scalar): Ditto. | |
51987 | (*pred_madc<mode>_overflow_scalar): Ditto. | |
51988 | (*pred_madc<mode>_overflow_extended_scalar): Ditto. | |
51989 | (*pred_msbc<mode>_overflow_scalar): Ditto. | |
51990 | (*pred_msbc<mode>_overflow_extended_scalar): Ditto. | |
51991 | ||
51992 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
51993 | ||
51994 | * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support. | |
51995 | * config/riscv/riscv-v.cc (simm32_p): Ditto. | |
51996 | * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class. | |
51997 | (class vsbc): Ditto. | |
51998 | (BASE): Ditto. | |
51999 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
52000 | * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto. | |
52001 | (vsbc): Ditto. | |
52002 | * config/riscv/riscv-vector-builtins-shapes.cc | |
52003 | (struct no_mask_policy_def): Ditto. | |
52004 | (SHAPE): Ditto. | |
52005 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
52006 | * config/riscv/riscv-vector-builtins.cc | |
52007 | (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support. | |
52008 | (rvv_arg_type_info::get_tree_type): Ditto. | |
52009 | (function_expander::use_exact_insn): Ditto. | |
52010 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto. | |
52011 | (function_base::use_mask_predication_p): New function. | |
52012 | * config/riscv/vector-iterators.md: New iterator. | |
52013 | * config/riscv/vector.md (@pred_adc<mode>): New pattern. | |
52014 | (@pred_sbc<mode>): Ditto. | |
52015 | (@pred_adc<mode>_scalar): Ditto. | |
52016 | (@pred_sbc<mode>_scalar): Ditto. | |
52017 | (*pred_adc<mode>_scalar): Ditto. | |
52018 | (*pred_adc<mode>_extended_scalar): Ditto. | |
52019 | (*pred_sbc<mode>_scalar): Ditto. | |
52020 | (*pred_sbc<mode>_extended_scalar): Ditto. | |
52021 | ||
52022 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52023 | ||
52024 | * config/riscv/vector.md: use "zero" reg. | |
52025 | ||
52026 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52027 | ||
52028 | * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New | |
52029 | class. | |
52030 | (class vwmulsu): Ditto. | |
52031 | (class vwcvt): Ditto. | |
52032 | (BASE): Add integer widening support. | |
52033 | * config/riscv/riscv-vector-builtins-bases.h: Ditto | |
52034 | * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class. | |
52035 | (vwsub): New class. | |
52036 | (vwmul): New class. | |
52037 | (vwmulu): New class. | |
52038 | (vwmulsu): New class. | |
52039 | (vwaddu): New class. | |
52040 | (vwsubu): New class. | |
52041 | (vwcvt_x): New class. | |
52042 | (vwcvtu_x): New class. | |
52043 | * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New | |
52044 | class. | |
52045 | (struct widen_alu_def): New class. | |
52046 | (SHAPE): New class. | |
52047 | * config/riscv/riscv-vector-builtins-shapes.h: New class. | |
52048 | * config/riscv/riscv-vector-builtins.cc | |
52049 | (rvv_arg_type_info::get_base_vector_type): Add integer widening support. | |
52050 | (rvv_arg_type_info::get_tree_type): Ditto. | |
52051 | * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v" | |
52052 | (x_v): Ditto. | |
52053 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer | |
52054 | widening support. | |
52055 | * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug. | |
52056 | * config/riscv/riscv.h (X0_REGNUM): New constant. | |
52057 | * config/riscv/vector-iterators.md: New iterators. | |
52058 | * config/riscv/vector.md | |
52059 | (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New | |
52060 | pattern. | |
52061 | (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar): | |
52062 | Ditto. | |
52063 | (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto. | |
52064 | (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar): | |
52065 | Ditto. | |
52066 | (@pred_widen_mulsu<mode>): Ditto. | |
52067 | (@pred_widen_mulsu<mode>_scalar): Ditto. | |
52068 | (@pred_<optab><mode>): Ditto. | |
52069 | ||
52070 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52071 | kito-cheng <kito.cheng@sifive.com> | |
52072 | ||
52073 | * common/config/riscv/riscv-common.cc: Add flag for 'V' extension. | |
52074 | * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class. | |
52075 | (BASE): Ditto. | |
52076 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
52077 | * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh | |
52078 | API support. | |
52079 | (vmulhu): Ditto. | |
52080 | (vmulhsu): Ditto. | |
52081 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS): | |
52082 | New macro. | |
52083 | (DEF_RVV_FULL_V_U_OPS): Ditto. | |
52084 | (vint8mf8_t): Ditto. | |
52085 | (vint8mf4_t): Ditto. | |
52086 | (vint8mf2_t): Ditto. | |
52087 | (vint8m1_t): Ditto. | |
52088 | (vint8m2_t): Ditto. | |
52089 | (vint8m4_t): Ditto. | |
52090 | (vint8m8_t): Ditto. | |
52091 | (vint16mf4_t): Ditto. | |
52092 | (vint16mf2_t): Ditto. | |
52093 | (vint16m1_t): Ditto. | |
52094 | (vint16m2_t): Ditto. | |
52095 | (vint16m4_t): Ditto. | |
52096 | (vint16m8_t): Ditto. | |
52097 | (vint32mf2_t): Ditto. | |
52098 | (vint32m1_t): Ditto. | |
52099 | (vint32m2_t): Ditto. | |
52100 | (vint32m4_t): Ditto. | |
52101 | (vint32m8_t): Ditto. | |
52102 | (vint64m1_t): Ditto. | |
52103 | (vint64m2_t): Ditto. | |
52104 | (vint64m4_t): Ditto. | |
52105 | (vint64m8_t): Ditto. | |
52106 | (vuint8mf8_t): Ditto. | |
52107 | (vuint8mf4_t): Ditto. | |
52108 | (vuint8mf2_t): Ditto. | |
52109 | (vuint8m1_t): Ditto. | |
52110 | (vuint8m2_t): Ditto. | |
52111 | (vuint8m4_t): Ditto. | |
52112 | (vuint8m8_t): Ditto. | |
52113 | (vuint16mf4_t): Ditto. | |
52114 | (vuint16mf2_t): Ditto. | |
52115 | (vuint16m1_t): Ditto. | |
52116 | (vuint16m2_t): Ditto. | |
52117 | (vuint16m4_t): Ditto. | |
52118 | (vuint16m8_t): Ditto. | |
52119 | (vuint32mf2_t): Ditto. | |
52120 | (vuint32m1_t): Ditto. | |
52121 | (vuint32m2_t): Ditto. | |
52122 | (vuint32m4_t): Ditto. | |
52123 | (vuint32m8_t): Ditto. | |
52124 | (vuint64m1_t): Ditto. | |
52125 | (vuint64m2_t): Ditto. | |
52126 | (vuint64m4_t): Ditto. | |
52127 | (vuint64m8_t): Ditto. | |
52128 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto. | |
52129 | (DEF_RVV_FULL_V_U_OPS): Ditto. | |
52130 | (check_required_extensions): Add vmulh support. | |
52131 | (rvv_arg_type_info::get_tree_type): Ditto. | |
52132 | * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto. | |
52133 | (enum rvv_base_type): Ditto. | |
52134 | * config/riscv/riscv.opt: Add 'V' extension flag. | |
52135 | * config/riscv/vector-iterators.md (su): New iterator. | |
52136 | * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern. | |
52137 | (@pred_mulh<v_su><mode>_scalar): Ditto. | |
52138 | (*pred_mulh<v_su><mode>_scalar): Ditto. | |
52139 | (*pred_mulh<v_su><mode>_extended_scalar): Ditto. | |
52140 | ||
52141 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52142 | ||
52143 | * config/riscv/iterators.md: Add sign_extend/zero_extend. | |
52144 | * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class. | |
52145 | (BASE): Ditto. | |
52146 | * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support. | |
52147 | * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro | |
52148 | define. | |
52149 | (vzext): Ditto. | |
52150 | * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust | |
52151 | for vsext/vzext support. | |
52152 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New | |
52153 | macro define. | |
52154 | (DEF_RVV_QEXTI_OPS): Ditto. | |
52155 | (DEF_RVV_OEXTI_OPS): Ditto. | |
52156 | (DEF_RVV_WEXTU_OPS): Ditto. | |
52157 | (DEF_RVV_QEXTU_OPS): Ditto. | |
52158 | (DEF_RVV_OEXTU_OPS): Ditto. | |
52159 | (vint16mf4_t): Ditto. | |
52160 | (vint16mf2_t): Ditto. | |
52161 | (vint16m1_t): Ditto. | |
52162 | (vint16m2_t): Ditto. | |
52163 | (vint16m4_t): Ditto. | |
52164 | (vint16m8_t): Ditto. | |
52165 | (vint32mf2_t): Ditto. | |
52166 | (vint32m1_t): Ditto. | |
52167 | (vint32m2_t): Ditto. | |
52168 | (vint32m4_t): Ditto. | |
52169 | (vint32m8_t): Ditto. | |
52170 | (vint64m1_t): Ditto. | |
52171 | (vint64m2_t): Ditto. | |
52172 | (vint64m4_t): Ditto. | |
52173 | (vint64m8_t): Ditto. | |
52174 | (vuint16mf4_t): Ditto. | |
52175 | (vuint16mf2_t): Ditto. | |
52176 | (vuint16m1_t): Ditto. | |
52177 | (vuint16m2_t): Ditto. | |
52178 | (vuint16m4_t): Ditto. | |
52179 | (vuint16m8_t): Ditto. | |
52180 | (vuint32mf2_t): Ditto. | |
52181 | (vuint32m1_t): Ditto. | |
52182 | (vuint32m2_t): Ditto. | |
52183 | (vuint32m4_t): Ditto. | |
52184 | (vuint32m8_t): Ditto. | |
52185 | (vuint64m1_t): Ditto. | |
52186 | (vuint64m2_t): Ditto. | |
52187 | (vuint64m4_t): Ditto. | |
52188 | (vuint64m8_t): Ditto. | |
52189 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto. | |
52190 | (DEF_RVV_QEXTI_OPS): Ditto. | |
52191 | (DEF_RVV_OEXTI_OPS): Ditto. | |
52192 | (DEF_RVV_WEXTU_OPS): Ditto. | |
52193 | (DEF_RVV_QEXTU_OPS): Ditto. | |
52194 | (DEF_RVV_OEXTU_OPS): Ditto. | |
52195 | (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend | |
52196 | support. | |
52197 | (rvv_arg_type_info::get_tree_type): Ditto. | |
52198 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto. | |
52199 | * config/riscv/vector-iterators.md (z): New attribute. | |
52200 | * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern. | |
52201 | (@pred_<optab><mode>_vf4): Ditto. | |
52202 | (@pred_<optab><mode>_vf8): Ditto. | |
52203 | ||
52204 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52205 | ||
52206 | * config/riscv/iterators.md: Add saturating Addition && Subtraction. | |
52207 | * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto. | |
52208 | * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto. | |
52209 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
52210 | * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def. | |
52211 | (vssub): Ditto. | |
52212 | (vsaddu): Ditto. | |
52213 | (vssubu): Ditto. | |
52214 | * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating | |
52215 | support. | |
52216 | (sll.vv): Ditto. | |
52217 | (%3,%v4): Ditto. | |
52218 | (%3,%4): Ditto. | |
52219 | * config/riscv/vector.md (@pred_<optab><mode>): New pattern. | |
52220 | (@pred_<optab><mode>_scalar): New pattern. | |
52221 | (*pred_<optab><mode>_scalar): New pattern. | |
52222 | (*pred_<optab><mode>_extended_scalar): New pattern. | |
52223 | ||
52224 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52225 | ||
52226 | * config/riscv/iterators.md: Add neg and not. | |
52227 | * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class. | |
52228 | (BASE): Ditto. | |
52229 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
52230 | * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop | |
52231 | into alu. | |
52232 | (vsub): Ditto. | |
52233 | (vand): Ditto. | |
52234 | (vor): Ditto. | |
52235 | (vxor): Ditto. | |
52236 | (vsll): Ditto. | |
52237 | (vsra): Ditto. | |
52238 | (vsrl): Ditto. | |
52239 | (vmin): Ditto. | |
52240 | (vmax): Ditto. | |
52241 | (vminu): Ditto. | |
52242 | (vmaxu): Ditto. | |
52243 | (vmul): Ditto. | |
52244 | (vdiv): Ditto. | |
52245 | (vrem): Ditto. | |
52246 | (vdivu): Ditto. | |
52247 | (vremu): Ditto. | |
52248 | (vrsub): Ditto. | |
52249 | (vneg): Ditto. | |
52250 | (vnot): Ditto. | |
52251 | * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto. | |
52252 | (struct alu_def): Ditto. | |
52253 | (SHAPE): Ditto. | |
52254 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
52255 | * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++. | |
52256 | * config/riscv/vector-iterators.md: New iterator. | |
52257 | * config/riscv/vector.md (@pred_<optab><mode>): New pattern | |
52258 | ||
52259 | 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52260 | ||
52261 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block. | |
52262 | ||
52263 | 2023-02-11 Jakub Jelinek <jakub@redhat.com> | |
52264 | ||
52265 | PR ipa/108605 | |
52266 | * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if | |
52267 | item->offset bit position is too large to be representable as | |
52268 | unsigned int byte position. | |
52269 | ||
52270 | 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com> | |
52271 | ||
52272 | * doc/extend.texi (Other Builtins): Adjust link to WG14 N965. | |
52273 | ||
52274 | 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com> | |
52275 | ||
52276 | * ira.cc (update_equiv_regs): Set up ira_reg_equiv for | |
52277 | valid_combine only when ira_use_lra_p is true. | |
52278 | ||
52279 | 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com> | |
52280 | ||
52281 | * params.opt (ira-simple-lra-insn-threshold): Add new param. | |
52282 | * ira.cc (ira): Use the param to switch on simple LRA. | |
52283 | ||
52284 | 2023-02-10 Andrew MacLeod <amacleod@redhat.com> | |
52285 | ||
52286 | PR tree-optimization/108687 | |
52287 | * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert | |
52288 | back to RFD_NONE mode for calculations. | |
52289 | (ranger_cache::propagate_cache): Call the internal edge range API | |
52290 | with RFD_READ_ONLY instead of changing the external routine. | |
52291 | ||
52292 | 2023-02-10 Andrew MacLeod <amacleod@redhat.com> | |
52293 | ||
52294 | PR tree-optimization/108520 | |
52295 | * gimple-range-infer.cc (check_assume_func): Invoke | |
52296 | gimple_range_global directly instead using global_range_query. | |
52297 | * value-query.cc (get_range_global): Add function context and | |
52298 | avoid calling nonnull_arg_p if not cfun. | |
52299 | (gimple_range_global): Add function context pointer. | |
52300 | * value-query.h (imple_range_global): Add function context. | |
52301 | ||
52302 | 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52303 | ||
52304 | * config/riscv/constraints.md (Wdm): Adjust constraint. | |
52305 | (Wbr): New constraint. | |
52306 | * config/riscv/predicates.md (reg_or_int_operand): New predicate. | |
52307 | * config/riscv/riscv-protos.h (emit_pred_op): Remove function. | |
52308 | (emit_vlmax_op): New function. | |
52309 | (emit_nonvlmax_op): Ditto. | |
52310 | (simm32_p): Ditto. | |
52311 | (neg_simm5_p): Ditto. | |
52312 | (has_vi_variant_p): Ditto. | |
52313 | * config/riscv/riscv-v.cc (emit_pred_op): Adjust function. | |
52314 | (emit_vlmax_op): New function. | |
52315 | (emit_nonvlmax_op): Ditto. | |
52316 | (expand_const_vector): Adjust function. | |
52317 | (legitimize_move): Ditto. | |
52318 | (simm32_p): New function. | |
52319 | (simm5_p): Ditto. | |
52320 | (neg_simm5_p): Ditto. | |
52321 | (has_vi_variant_p): Ditto. | |
52322 | * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class. | |
52323 | (BASE): Ditto. | |
52324 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
52325 | * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove | |
52326 | unsigned cases. | |
52327 | (vmax): Ditto. | |
52328 | (vminu): Remove signed cases. | |
52329 | (vmaxu): Ditto. | |
52330 | (vdiv): Remove unsigned cases. | |
52331 | (vrem): Ditto. | |
52332 | (vdivu): Remove signed cases. | |
52333 | (vremu): Ditto. | |
52334 | (vadd): Adjust. | |
52335 | (vsub): Ditto. | |
52336 | (vrsub): New class. | |
52337 | (vand): Adjust. | |
52338 | (vor): Ditto. | |
52339 | (vxor): Ditto. | |
52340 | (vmul): Ditto. | |
52341 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro. | |
52342 | * config/riscv/riscv.h: change VL/VTYPE as fixed reg. | |
52343 | * config/riscv/vector-iterators.md: New iterators. | |
52344 | * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx | |
52345 | support. | |
52346 | (@pred_<optab><mode>_scalar): New pattern. | |
52347 | (@pred_sub<mode>_reverse_scalar): Ditto. | |
52348 | (*pred_<optab><mode>_scalar): Ditto. | |
52349 | (*pred_<optab><mode>_extended_scalar): Ditto. | |
52350 | (*pred_sub<mode>_reverse_scalar): Ditto. | |
52351 | (*pred_sub<mode>_extended_reverse_scalar): Ditto. | |
52352 | ||
52353 | 2023-02-10 Richard Biener <rguenther@suse.de> | |
52354 | ||
52355 | PR tree-optimization/108724 | |
52356 | * tree-vect-stmts.cc (vectorizable_operation): Avoid | |
52357 | using word_mode vectors when vector lowering will | |
52358 | decompose them to elementwise operations. | |
52359 | ||
52360 | 2023-02-10 Jakub Jelinek <jakub@redhat.com> | |
52361 | ||
52362 | Revert: | |
52363 | 2023-02-09 Martin Liska <mliska@suse.cz> | |
52364 | ||
52365 | PR target/100758 | |
52366 | * doc/extend.texi: Document that the function | |
52367 | does not work correctly for old VIA processors. | |
52368 | ||
52369 | 2023-02-10 Andrew Pinski <apinski@marvell.com> | |
52370 | Andrew Macleod <amacleod@redhat.com> | |
52371 | ||
52372 | PR tree-optimization/108684 | |
52373 | * tree-ssa-dce.cc (simple_dce_from_worklist): | |
52374 | Check all ssa names and not just non-vdef ones | |
52375 | before accepting the inline-asm. | |
52376 | Call unlink_stmt_vdef on the statement before | |
52377 | removing it. | |
52378 | ||
52379 | 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com> | |
52380 | ||
52381 | * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p. | |
52382 | * ira.cc (validate_equiv_mem): Check memref address variance. | |
52383 | (no_equiv): Clear caller_save_p flag. | |
52384 | (update_equiv_regs): Define caller save equivalence for | |
52385 | valid_combine. | |
52386 | (setup_reg_equiv): Clear defined_p flag for caller save equivalence. | |
52387 | * lra-constraints.cc (lra_copy_reg_equiv): Add new arg | |
52388 | call_save_p. Use caller save equivalence depending on the arg. | |
52389 | (split_reg): Adjust the call. | |
52390 | ||
52391 | 2023-02-09 Jakub Jelinek <jakub@redhat.com> | |
52392 | ||
52393 | PR target/100758 | |
52394 | * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes. | |
52395 | (cpu_indicator_init): Call get_available_features for all CPUs with | |
52396 | max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting | |
52397 | fixes. | |
52398 | ||
52399 | 2023-02-09 Jakub Jelinek <jakub@redhat.com> | |
52400 | ||
52401 | PR tree-optimization/108688 | |
52402 | * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF | |
52403 | of BIT_INSERT_EXPR extracting exactly all inserted bits even | |
52404 | when without mode precision. Formatting fixes. | |
52405 | ||
52406 | 2023-02-09 Andrew Pinski <apinski@marvell.com> | |
52407 | ||
52408 | PR tree-optimization/108688 | |
52409 | * match.pd (bit_field_ref [bit_insert]): Avoid generating | |
52410 | BIT_FIELD_REFs of non-mode-precision integral operands. | |
52411 | ||
52412 | 2023-02-09 Martin Liska <mliska@suse.cz> | |
52413 | ||
52414 | PR target/100758 | |
52415 | * doc/extend.texi: Document that the function | |
52416 | does not work correctly for old VIA processors. | |
52417 | ||
52418 | 2023-02-09 Andreas Schwab <schwab@suse.de> | |
52419 | ||
52420 | * lto-wrapper.cc (merge_and_complain): Handle | |
52421 | -funwind-tables and -fasynchronous-unwind-tables. | |
52422 | (append_compiler_options): Likewise. | |
52423 | ||
52424 | 2023-02-09 Richard Biener <rguenther@suse.de> | |
52425 | ||
52426 | PR tree-optimization/26854 | |
52427 | * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree | |
52428 | view around insert_updated_phi_nodes_for. | |
52429 | * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap | |
52430 | in tree view. | |
52431 | (walk_aliased_vdefs_1): Likewise. | |
52432 | ||
52433 | 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com> | |
52434 | ||
52435 | * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org. | |
52436 | ||
52437 | 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
52438 | ||
52439 | PR target/108505 | |
52440 | * config.gcc (tm_mlib_file): Define new variable. | |
52441 | ||
52442 | 2023-02-08 Jakub Jelinek <jakub@redhat.com> | |
52443 | ||
52444 | PR tree-optimization/108692 | |
52445 | * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is | |
52446 | widened_code which is different from code, don't call | |
52447 | vect_look_through_possible_promotion but instead just check op is | |
52448 | SSA_NAME with integral type for which vect_is_simple_use is true | |
52449 | and call set_op on this_unprom. | |
52450 | ||
52451 | 2023-02-08 Andrea Corallo <andrea.corallo@arm.com> | |
52452 | ||
52453 | * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove | |
52454 | declaration. | |
52455 | * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove | |
52456 | definition. | |
52457 | * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename | |
52458 | to 'aarch_ra_sign_key'. | |
52459 | * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove | |
52460 | declaration. | |
52461 | * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise. | |
52462 | * config/arm/arm.cc (enum aarch_key_type): Remove definition. | |
52463 | * config/arm/arm.opt: Define. | |
52464 | ||
52465 | 2023-02-08 Richard Sandiford <richard.sandiford@arm.com> | |
52466 | ||
52467 | PR tree-optimization/108316 | |
52468 | * tree-vect-stmts.cc (get_load_store_type): When using | |
52469 | internal functions for gather/scatter, make sure that the type | |
52470 | of the offset argument is consistent with the offset vector type. | |
52471 | ||
52472 | 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com> | |
52473 | ||
52474 | Revert: | |
52475 | 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com> | |
52476 | ||
52477 | * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p. | |
52478 | * ira.cc (validate_equiv_mem): Check memref address variance. | |
52479 | (update_equiv_regs): Define caller save equivalence for | |
52480 | valid_combine. | |
52481 | (setup_reg_equiv): Clear defined_p flag for caller save equivalence. | |
52482 | * lra-constraints.cc (lra_copy_reg_equiv): Add new arg | |
52483 | call_save_p. Use caller save equivalence depending on the arg. | |
52484 | (split_reg): Adjust the call. | |
52485 | ||
52486 | 2023-02-08 Jakub Jelinek <jakub@redhat.com> | |
52487 | ||
52488 | * tree.def (SAD_EXPR): Remove outdated comment about missing | |
52489 | WIDEN_MINUS_EXPR. | |
52490 | ||
52491 | 2023-02-07 Marek Polacek <polacek@redhat.com> | |
52492 | ||
52493 | * doc/invoke.texi: Update -fchar8_t documentation. | |
52494 | ||
52495 | 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com> | |
52496 | ||
52497 | * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p. | |
52498 | * ira.cc (validate_equiv_mem): Check memref address variance. | |
52499 | (update_equiv_regs): Define caller save equivalence for | |
52500 | valid_combine. | |
52501 | (setup_reg_equiv): Clear defined_p flag for caller save equivalence. | |
52502 | * lra-constraints.cc (lra_copy_reg_equiv): Add new arg | |
52503 | call_save_p. Use caller save equivalence depending on the arg. | |
52504 | (split_reg): Adjust the call. | |
52505 | ||
52506 | 2023-02-07 Richard Biener <rguenther@suse.de> | |
52507 | ||
52508 | PR tree-optimization/26854 | |
52509 | * gimple-fold.cc (has_use_on_stmt): Look at stmt operands | |
52510 | instead of immediate uses. | |
52511 | ||
52512 | 2023-02-07 Jakub Jelinek <jakub@redhat.com> | |
52513 | ||
52514 | PR tree-optimization/106923 | |
52515 | * ipa-split.cc (execute_split_functions): Don't split returns_twice | |
52516 | functions. | |
52517 | ||
52518 | 2023-02-07 Jakub Jelinek <jakub@redhat.com> | |
52519 | ||
52520 | PR tree-optimization/106433 | |
52521 | * cgraph.cc (set_const_flag_1): Recurse on simd clones too. | |
52522 | (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too. | |
52523 | ||
52524 | 2023-02-07 Jan Hubicka <jh@suse.cz> | |
52525 | ||
52526 | * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off | |
52527 | for znver4. | |
52528 | ||
52529 | 2023-02-06 Andrew Stubbs <ams@codesourcery.com> | |
52530 | ||
52531 | * config/gcn/mkoffload.cc (gcn_stack_size): New global variable. | |
52532 | (process_asm): Create a constructor for GCN_STACK_SIZE. | |
52533 | (main): Parse the -mstack-size option. | |
52534 | ||
52535 | 2023-02-06 Alex Coplan <alex.coplan@arm.com> | |
52536 | ||
52537 | PR target/104921 | |
52538 | * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf): | |
52539 | Use correct constraint for operand 3. | |
52540 | ||
52541 | 2023-02-06 Martin Jambor <mjambor@suse.cz> | |
52542 | ||
52543 | * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump. | |
52544 | ||
52545 | 2023-02-06 Xi Ruoyao <xry111@xry111.site> | |
52546 | ||
52547 | * config/loongarch/loongarch.md (bytepick_w_ashift_amount): | |
52548 | New define_int_iterator. | |
52549 | (bytepick_d_ashift_amount): Likewise. | |
52550 | (bytepick_imm): New define_int_attr. | |
52551 | (bytepick_w_lshiftrt_amount): Likewise. | |
52552 | (bytepick_d_lshiftrt_amount): Likewise. | |
52553 | (bytepick_w_<bytepick_imm>): New define_insn template. | |
52554 | (bytepick_w_<bytepick_imm>_extend): Likewise. | |
52555 | (bytepick_d_<bytepick_imm>): Likewise. | |
52556 | (bytepick_w): Remove unused define_insn. | |
52557 | (bytepick_d): Likewise. | |
52558 | (UNSPEC_BYTEPICK_W): Remove unused unspec. | |
52559 | (UNSPEC_BYTEPICK_D): Likewise. | |
52560 | * config/loongarch/predicates.md (const_0_to_3_operand): | |
52561 | Remove unused define_predicate. | |
52562 | (const_0_to_7_operand): Likewise. | |
52563 | ||
52564 | 2023-02-06 Jakub Jelinek <jakub@redhat.com> | |
52565 | ||
52566 | PR tree-optimization/108655 | |
52567 | * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps | |
52568 | or -fsanitize=unreachable -fsanitize-trap=unreachable return | |
52569 | BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP. | |
52570 | ||
52571 | 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com> | |
52572 | ||
52573 | * doc/install.texi (Specific): Remove PW32. | |
52574 | ||
52575 | 2023-02-03 Jakub Jelinek <jakub@redhat.com> | |
52576 | ||
52577 | PR tree-optimization/108647 | |
52578 | * range-op.cc (operator_equal::op1_range, | |
52579 | operator_not_equal::op1_range): Don't test op2 bound | |
52580 | equality if op2.undefined_p (), instead set_varying. | |
52581 | (operator_lt::op1_range, operator_le::op1_range, | |
52582 | operator_gt::op1_range, operator_ge::op1_range): Return false if | |
52583 | op2.undefined_p (). | |
52584 | (operator_lt::op2_range, operator_le::op2_range, | |
52585 | operator_gt::op2_range, operator_ge::op2_range): Return false if | |
52586 | op1.undefined_p (). | |
52587 | ||
52588 | 2023-02-03 Aldy Hernandez <aldyh@redhat.com> | |
52589 | ||
52590 | PR tree-optimization/108639 | |
52591 | * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as | |
52592 | widest_int. | |
52593 | (irange::operator==): Same. | |
52594 | ||
52595 | 2023-02-03 Aldy Hernandez <aldyh@redhat.com> | |
52596 | ||
52597 | PR tree-optimization/108647 | |
52598 | * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges. | |
52599 | (foperator_lt::op2_range): Same. | |
52600 | (foperator_le::op1_range): Same. | |
52601 | (foperator_le::op2_range): Same. | |
52602 | (foperator_gt::op1_range): Same. | |
52603 | (foperator_gt::op2_range): Same. | |
52604 | (foperator_ge::op1_range): Same. | |
52605 | (foperator_ge::op2_range): Same. | |
52606 | (foperator_unordered_lt::op1_range): Same. | |
52607 | (foperator_unordered_lt::op2_range): Same. | |
52608 | (foperator_unordered_le::op1_range): Same. | |
52609 | (foperator_unordered_le::op2_range): Same. | |
52610 | (foperator_unordered_gt::op1_range): Same. | |
52611 | (foperator_unordered_gt::op2_range): Same. | |
52612 | (foperator_unordered_ge::op1_range): Same. | |
52613 | (foperator_unordered_ge::op2_range): Same. | |
52614 | ||
52615 | 2023-02-03 Andrew MacLeod <amacleod@redhat.com> | |
52616 | ||
52617 | PR tree-optimization/107570 | |
52618 | * tree-vrp.cc (remove_and_update_globals): Reset SCEV. | |
52619 | ||
52620 | 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com> | |
52621 | ||
52622 | * doc/gm2.texi (Internals): Remove from menu. | |
52623 | (Using): Comment out ifnohtml conditional. | |
52624 | (Documentation): Use gcc url. | |
52625 | (License): Node simplified. | |
52626 | (Copying): New node. Include gpl_v3_without_node. | |
52627 | (Contributing): Node simplified. | |
52628 | (Internals): Commented out. | |
52629 | (Libraries): Node simplified. | |
52630 | (Indices): Ditto. | |
52631 | (Contents): Ditto. | |
52632 | (Functions): Ditto. | |
52633 | ||
52634 | 2023-02-03 Christophe Lyon <christophe.lyon@arm.com> | |
52635 | ||
52636 | * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length | |
52637 | attribute. | |
52638 | (mve_vqshluq_m_n_s<mode>): Likewise. | |
52639 | (mve_vshlq_m_<supf><mode>): Likewise. | |
52640 | (mve_vsriq_m_n_<supf><mode>): Likewise. | |
52641 | (mve_vsubq_m_<supf><mode>): Likewise. | |
52642 | ||
52643 | 2023-02-03 Martin Jambor <mjambor@suse.cz> | |
52644 | ||
52645 | PR ipa/108384 | |
52646 | * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check | |
52647 | when comparing to an IPA-CP value. | |
52648 | (dump_list_of_param_indices): New function. | |
52649 | (adjust_parameter_descriptions): Check for mismatching IPA-CP values. | |
52650 | Dump removed candidates using dump_list_of_param_indices. | |
52651 | * ipa-param-manipulation.cc | |
52652 | (ipa_param_body_adjustments::modify_expression): Add assert checking | |
52653 | sizes of a VIEW_CONVERT_EXPR will match. | |
52654 | (ipa_param_body_adjustments::modify_assignment): Likewise. | |
52655 | ||
52656 | 2023-02-03 Monk Chiang <monk.chiang@sifive.com> | |
52657 | ||
52658 | * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class. | |
52659 | * config/riscv/riscv.cc: Ditto. | |
52660 | ||
52661 | 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52662 | ||
52663 | * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug. | |
52664 | (sll.vv): Ditto. | |
52665 | (%3,%4): Ditto. | |
52666 | (%3,%v4): Ditto. | |
52667 | * config/riscv/vector.md: Ditto. | |
52668 | ||
52669 | 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52670 | ||
52671 | * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate. | |
52672 | * config/riscv/riscv-vector-builtins-bases.cc: New class. | |
52673 | * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto. | |
52674 | (vsra): Ditto. | |
52675 | (vsrl): Ditto. | |
52676 | * config/riscv/riscv-vector-builtins.cc: Ditto. | |
52677 | * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern. | |
52678 | ||
52679 | 2023-02-02 Iain Sandoe <iain@sandoe.co.uk> | |
52680 | ||
52681 | * toplev.cc (toplev::main): Only print the version information header | |
52682 | from toplevel main(). | |
52683 | ||
52684 | 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com> | |
52685 | ||
52686 | * config/gcn/gcn-valu.md (cond_<expander><mode>): Add | |
52687 | cond_{ashl|ashr|lshr} | |
52688 | ||
52689 | 2023-02-02 Richard Sandiford <richard.sandiford@arm.com> | |
52690 | ||
52691 | PR rtl-optimization/108086 | |
52692 | * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int. | |
52693 | Adjust size-related commentary accordingly. | |
52694 | ||
52695 | 2023-02-02 Richard Sandiford <richard.sandiford@arm.com> | |
52696 | ||
52697 | PR rtl-optimization/108508 | |
52698 | * rtl-ssa/accesses.cc (function_info::split_clobber_group): When | |
52699 | the splay tree search gives the first clobber in the second group, | |
52700 | make sure that the root of the first clobber group is updated | |
52701 | correctly. Enter the new clobber group into the definition splay | |
52702 | tree. | |
52703 | ||
52704 | 2023-02-02 Jin Ma <jinma@linux.alibaba.com> | |
52705 | ||
52706 | * common/config/riscv/riscv-common.cc (riscv_compute_multilib): | |
52707 | Fix finding best match score. | |
52708 | ||
52709 | 2023-02-02 Jakub Jelinek <jakub@redhat.com> | |
52710 | ||
52711 | PR debug/106746 | |
52712 | PR rtl-optimization/108463 | |
52713 | PR target/108484 | |
52714 | * cselib.cc (cselib_current_insn): Move declaration earlier. | |
52715 | (cselib_hasher::equal): For debug only locs, temporarily override | |
52716 | cselib_current_insn to their l->setting_insn for the | |
52717 | rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't | |
52718 | promote some debug locs. | |
52719 | * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs | |
52720 | when using cselib call cselib_lookup_from_insn on the address but | |
52721 | don't substitute it. | |
52722 | ||
52723 | 2023-02-02 Richard Biener <rguenther@suse.de> | |
52724 | ||
52725 | PR middle-end/108625 | |
52726 | * genmatch.cc (expr::gen_transform): Also disallow resimplification | |
52727 | from pushing to lseq with force_leaf. | |
52728 | (dt_simplify::gen_1): Likewise. | |
52729 | ||
52730 | 2023-02-02 Andrew Stubbs <ams@codesourcery.com> | |
52731 | ||
52732 | * config/gcn/gcn-run.cc: Include libgomp-gcn.h. | |
52733 | (struct kernargs): Replace the common content with kernargs_abi. | |
52734 | (struct heap): Delete. | |
52735 | (main): Read GCN_STACK_SIZE envvar. | |
52736 | Allocate space for the device stacks. | |
52737 | Write the new kernargs fields. | |
52738 | * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt. | |
52739 | (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and | |
52740 | PRIVATE_SEGMENT_WAVE_OFFSET_ARG. | |
52741 | (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content. | |
52742 | (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top. | |
52743 | Set up the stacks from the values in the kernargs, not private. | |
52744 | (gcn_expand_builtin_1): Match the stack configuration in the prologue. | |
52745 | (gcn_hsa_declare_function_name): Turn off the private segment. | |
52746 | (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed. | |
52747 | * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register. | |
52748 | * config/gcn/gcn.opt (mstack-size): Change the description. | |
52749 | ||
52750 | 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
52751 | ||
52752 | PR target/108443 | |
52753 | * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI. | |
52754 | * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for | |
52755 | addressing MVE predicate modes. | |
52756 | (mve_bool_vec_to_const): Change to represent correct MVE predicate | |
52757 | format. | |
52758 | (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking | |
52759 | modes. | |
52760 | (arm_vector_mode_supported_p): Likewise. | |
52761 | (arm_mode_to_pred_mode): Add V2QI. | |
52762 | * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New | |
52763 | qualifier. | |
52764 | (UNOP_PRED_PRED_QUALIFIERS): New qualifier | |
52765 | (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier. | |
52766 | (v2qi_UP): New macro. | |
52767 | (v4bi_UP): New macro. | |
52768 | (v8bi_UP): New macro. | |
52769 | (v16bi_UP): New macro. | |
52770 | (arm_expand_builtin_args): Make it able to expand the new predicate | |
52771 | modes. | |
52772 | * config/arm/arm-modes.def (V2QI): New mode. | |
52773 | * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t | |
52774 | Pred4x4_t): Remove unused predicate builtin types. | |
52775 | * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q, | |
52776 | __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m, | |
52777 | __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes. | |
52778 | * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q, | |
52779 | vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise. | |
52780 | * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead | |
52781 | of MODE_VECTOR_BOOL. | |
52782 | * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI | |
52783 | (MVE_VPRED): Likewise. | |
52784 | (MVE_vpred): Add V2QI and map upper case predicate modes to lower case. | |
52785 | (MVE_vctp): New mode attribute. | |
52786 | (mode1): Remove. | |
52787 | (VCTPQ): Remove. | |
52788 | (VCTPQ_M): Remove. | |
52789 | * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this... | |
52790 | (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode | |
52791 | attributes. | |
52792 | (mve_vpnothi): Rename this... | |
52793 | (mve_vpnotv16bi): ... to this. | |
52794 | (mve_vctp<mode1>q_mhi): Rename this... | |
52795 | (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this. | |
52796 | (mve_vldrdq_gather_base_z_<supf>v2di, | |
52797 | mve_vldrdq_gather_offset_z_<supf>v2di, | |
52798 | mve_vldrdq_gather_shifted_offset_z_<supf>v2di, | |
52799 | mve_vstrdq_scatter_base_p_<supf>v2di, | |
52800 | mve_vstrdq_scatter_offset_p_<supf>v2di, | |
52801 | mve_vstrdq_scatter_offset_p_<supf>v2di_insn, | |
52802 | mve_vstrdq_scatter_shifted_offset_p_<supf>v2di, | |
52803 | mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn, | |
52804 | mve_vstrdq_scatter_base_wb_p_<supf>v2di, | |
52805 | mve_vldrdq_gather_base_wb_z_<supf>v2di, | |
52806 | mve_vldrdq_gather_base_nowb_z_<supf>v2di, | |
52807 | mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for | |
52808 | predicates. | |
52809 | * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace | |
52810 | these... | |
52811 | (VCTP): ... with this. | |
52812 | (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these... | |
52813 | (VCTP_M): ... with this. | |
52814 | * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use | |
52815 | VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class. | |
52816 | ||
52817 | 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
52818 | ||
52819 | PR target/107674 | |
52820 | * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO. | |
52821 | (arm_modes_tieable_p): Make MVE predicate modes tieable. | |
52822 | * config/arm/arm.h (VALID_MVE_PRED_MODE): New define. | |
52823 | * simplify-rtx.cc (simplify_context::simplify_subreg): Teach | |
52824 | simplify_subreg to simplify subregs where the outermode is not scalar. | |
52825 | ||
52826 | 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
52827 | ||
52828 | PR target/107674 | |
52829 | * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use | |
52830 | new qualifiers parameter and use unsigned short type for MVE predicate. | |
52831 | (arm_init_builtin): Call arm_simd_builtin_type with qualifiers | |
52832 | parameter. | |
52833 | (arm_init_crypto_builtins): Likewise. | |
52834 | ||
52835 | 2023-02-02 Jakub Jelinek <jakub@redhat.com> | |
52836 | ||
52837 | PR ipa/107300 | |
52838 | * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin. | |
52839 | * internal-fn.def (TRAP): Remove. | |
52840 | * internal-fn.cc (expand_TRAP): Remove. | |
52841 | * tree.cc (build_common_builtin_nodes): Define | |
52842 | BUILT_IN_UNREACHABLE_TRAP if not yet defined. | |
52843 | (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP | |
52844 | instead of BUILT_IN_TRAP. | |
52845 | * gimple.cc (gimple_build_builtin_unreachable): Remove | |
52846 | emitting internal function for BUILT_IN_TRAP. | |
52847 | * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP. | |
52848 | * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle | |
52849 | BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP. | |
52850 | * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle | |
52851 | BUILT_IN_UNREACHABLE_TRAP. | |
52852 | * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise. | |
52853 | * tree-cfg.cc (verify_gimple_call, | |
52854 | pass_warn_function_return::execute): Likewise. | |
52855 | * attribs.cc (decl_attributes): Don't report exclusions on | |
52856 | BUILT_IN_UNREACHABLE_TRAP either. | |
52857 | ||
52858 | 2023-02-02 liuhongt <hongtao.liu@intel.com> | |
52859 | ||
52860 | PR tree-optimization/108601 | |
52861 | * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed. | |
52862 | * tree-vect-loop.cc | |
52863 | (vectorizable_nonlinear_induction): Remove | |
52864 | vect_can_peel_nonlinear_iv_p. | |
52865 | (vect_can_peel_nonlinear_iv_p): Don't peel | |
52866 | nonlinear iv(mult or shift) for epilog when vf is not | |
52867 | constant and moved the defination to .. | |
52868 | * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): | |
52869 | .. Here. | |
52870 | ||
52871 | 2023-02-02 Jakub Jelinek <jakub@redhat.com> | |
52872 | ||
52873 | PR middle-end/108435 | |
52874 | * tree-nested.cc (convert_nonlocal_omp_clauses) | |
52875 | <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq | |
52876 | is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND | |
52877 | before calling declare_vars. | |
52878 | (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge | |
52879 | with the OMP_CLAUSE_LASTPRIVATE handling except for whether | |
52880 | seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause) | |
52881 | or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause). | |
52882 | ||
52883 | 2023-02-01 Tamar Christina <tamar.christina@arm.com> | |
52884 | ||
52885 | * common/config/aarch64/aarch64-common.cc | |
52886 | (struct aarch64_option_extension): Add native_detect and document struct | |
52887 | a bit more. | |
52888 | (all_extensions): Set new field native_detect. | |
52889 | * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete | |
52890 | unused struct. | |
52891 | ||
52892 | 2023-02-01 Martin Liska <mliska@suse.cz> | |
52893 | ||
52894 | * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned | |
52895 | value if set. | |
52896 | ||
52897 | 2023-02-01 Andrew MacLeod <amacleod@redhat.com> | |
52898 | ||
52899 | PR tree-optimization/108356 | |
52900 | * gimple-range-cache.cc (ranger_cache::range_on_edge): Always | |
52901 | do a search of the DOM tree for a range. | |
52902 | ||
52903 | 2023-02-01 Martin Liska <mliska@suse.cz> | |
52904 | ||
52905 | PR ipa/108509 | |
52906 | * cgraphunit.cc (walk_polymorphic_call_targets): Insert | |
52907 | ony non-null values. | |
52908 | * ipa.cc (walk_polymorphic_call_targets): Likewise. | |
52909 | ||
52910 | 2023-02-01 Martin Liska <mliska@suse.cz> | |
52911 | ||
52912 | PR driver/108572 | |
52913 | * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for | |
52914 | -gz=zstd. | |
52915 | ||
52916 | 2023-02-01 Jakub Jelinek <jakub@redhat.com> | |
52917 | ||
52918 | PR debug/108573 | |
52919 | * ree.cc (combine_reaching_defs): Don't return false for paradoxical | |
52920 | subregs in DEBUG_INSNs. | |
52921 | ||
52922 | 2023-02-01 Richard Sandiford <richard.sandiford@arm.com> | |
52923 | ||
52924 | * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC. | |
52925 | ||
52926 | 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com> | |
52927 | ||
52928 | * config/s390/s390.cc (s390_restore_gpr_p): New function. | |
52929 | (s390_preserve_gpr_arg_in_range_p): New function. | |
52930 | (s390_preserve_gpr_arg_p): New function. | |
52931 | (s390_preserve_fpr_arg_p): New function. | |
52932 | (s390_register_info_stdarg_fpr): Rename to ... | |
52933 | (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling. | |
52934 | (s390_register_info_stdarg_gpr): Rename to ... | |
52935 | (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling. | |
52936 | (s390_register_info): Use the renamed functions above. | |
52937 | (s390_optimize_register_info): Likewise. | |
52938 | (save_fpr): Generate CFI for -mpreserve-args. | |
52939 | (save_gprs): Generate CFI for -mpreserve-args. Drop return value. | |
52940 | (s390_emit_prologue): Adjust to changed calling convention of save_gprs. | |
52941 | (s390_optimize_prologue): Likewise. | |
52942 | * config/s390/s390.opt: New option -mpreserve-args | |
52943 | ||
52944 | 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com> | |
52945 | ||
52946 | * config/s390/s390.cc (save_gprs): Use gen_frame_mem. | |
52947 | (restore_gprs): Likewise. | |
52948 | (s390_emit_stack_tie): Make the stack_tie to be dependent on the | |
52949 | frame pointer if a frame-pointer is used. | |
52950 | (s390_emit_prologue): Emit stack_tie when frame-pointer is needed. | |
52951 | * config/s390/s390.md (stack_tie): Add a register operand and | |
52952 | rename to ... | |
52953 | (@stack_tie<mode>): ... this. | |
52954 | ||
52955 | 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com> | |
52956 | ||
52957 | * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add | |
52958 | EMIT_CFI parameter. | |
52959 | (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE. | |
52960 | * reg-notes.def (REG_CFA_NOTE): New reg note definition. | |
52961 | ||
52962 | 2023-02-01 Richard Biener <rguenther@suse.de> | |
52963 | ||
52964 | PR middle-end/108500 | |
52965 | * dominance.cc (assign_dfs_numbers): Replace recursive DFS | |
52966 | with tree traversal algorithm. | |
52967 | ||
52968 | 2023-02-01 Jason Merrill <jason@redhat.com> | |
52969 | ||
52970 | * doc/invoke.texi: Document -Wno-changes-meaning. | |
52971 | ||
52972 | 2023-02-01 David Malcolm <dmalcolm@redhat.com> | |
52973 | ||
52974 | * doc/invoke.texi (Static Analyzer Options): Add notes about | |
52975 | limitations of -fanalyzer. | |
52976 | ||
52977 | 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
52978 | ||
52979 | * config/riscv/constraints.md (vj): New. | |
52980 | (vk): Ditto | |
52981 | * config/riscv/iterators.md: Add more opcode. | |
52982 | * config/riscv/predicates.md (vector_arith_operand): New. | |
52983 | (vector_neg_arith_operand): New. | |
52984 | (vector_shift_operand): New. | |
52985 | * config/riscv/riscv-vector-builtins-bases.cc (class binop): New. | |
52986 | * config/riscv/riscv-vector-builtins-bases.h: (vadd): New. | |
52987 | (vsub): Ditto. | |
52988 | (vand): Ditto. | |
52989 | (vor): Ditto. | |
52990 | (vxor): Ditto. | |
52991 | (vsll): Ditto. | |
52992 | (vsra): Ditto. | |
52993 | (vsrl): Ditto. | |
52994 | (vmin): Ditto. | |
52995 | (vmax): Ditto. | |
52996 | (vminu): Ditto. | |
52997 | (vmaxu): Ditto. | |
52998 | (vmul): Ditto. | |
52999 | (vdiv): Ditto. | |
53000 | (vrem): Ditto. | |
53001 | (vdivu): Ditto. | |
53002 | (vremu): Ditto. | |
53003 | * config/riscv/riscv-vector-builtins-functions.def (vadd): New. | |
53004 | (vsub): Ditto. | |
53005 | (vand): Ditto. | |
53006 | (vor): Ditto. | |
53007 | (vxor): Ditto. | |
53008 | (vsll): Ditto. | |
53009 | (vsra): Ditto. | |
53010 | (vsrl): Ditto. | |
53011 | (vmin): Ditto. | |
53012 | (vmax): Ditto. | |
53013 | (vminu): Ditto. | |
53014 | (vmaxu): Ditto. | |
53015 | (vmul): Ditto. | |
53016 | (vdiv): Ditto. | |
53017 | (vrem): Ditto. | |
53018 | (vdivu): Ditto. | |
53019 | (vremu): Ditto. | |
53020 | * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New. | |
53021 | * config/riscv/riscv-vector-builtins-shapes.h (binop): New. | |
53022 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New. | |
53023 | (DEF_RVV_U_OPS): New. | |
53024 | (rvv_arg_type_info::get_base_vector_type): Handle | |
53025 | RVV_BASE_shift_vector. | |
53026 | (rvv_arg_type_info::get_tree_type): Ditto. | |
53027 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add | |
53028 | RVV_BASE_shift_vector. | |
53029 | * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'. | |
53030 | * config/riscv/vector-iterators.md: Handle more opcode. | |
53031 | * config/riscv/vector.md (@pred_<optab><mode>): New. | |
53032 | ||
53033 | 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
53034 | ||
53035 | PR target/108589 | |
53036 | * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check | |
53037 | REG_P on SET_DEST. | |
53038 | ||
53039 | 2023-01-31 Richard Sandiford <richard.sandiford@arm.com> | |
53040 | ||
53041 | PR tree-optimization/108608 | |
53042 | * tree-vect-loop.cc (vect_transform_reduction): Handle single | |
53043 | def-use cycles that involve function calls rather than tree codes. | |
53044 | ||
53045 | 2023-01-31 Andrew MacLeod <amacleod@redhat.com> | |
53046 | ||
53047 | PR tree-optimization/108385 | |
53048 | * gimple-range-gori.cc (gori_compute::compute_operand_range): | |
53049 | Allow VARYING computations to continue if there is a relation. | |
53050 | * range-op.cc (pointer_plus_operator::op2_range): New. | |
53051 | ||
53052 | 2023-01-31 Andrew MacLeod <amacleod@redhat.com> | |
53053 | ||
53054 | PR tree-optimization/108359 | |
53055 | * range-op.cc (range_operator::wi_fold_in_parts_equiv): New. | |
53056 | (range_operator::fold_range): If op1 is equivalent to op2 then | |
53057 | invoke new fold_in_parts_equiv to operate on sub-components. | |
53058 | * range-op.h (wi_fold_in_parts_equiv): New prototype. | |
53059 | ||
53060 | 2023-01-31 Andrew MacLeod <amacleod@redhat.com> | |
53061 | ||
53062 | * gimple-range-gori.cc (gori_compute::compute_operand_range): Do | |
53063 | not abort calculations if there is a valid relation available. | |
53064 | (gori_compute::refine_using_relation): Pass correct relation trio. | |
53065 | (gori_compute::compute_operand1_range): Create trio and use it. | |
53066 | (gori_compute::compute_operand2_range): Ditto. | |
53067 | * range-op.cc (operator_plus::op1_range): Use correct trio member. | |
53068 | (operator_minus::op1_range): Use correct trio member. | |
53069 | * value-relation.cc (value_relation::create_trio): New. | |
53070 | * value-relation.h (value_relation::create_trio): New prototype. | |
53071 | ||
53072 | 2023-01-31 Jakub Jelinek <jakub@redhat.com> | |
53073 | ||
53074 | PR target/108599 | |
53075 | * config/i386/i386-expand.cc | |
53076 | (ix86_convert_const_wide_int_to_broadcast): Return nullptr if | |
53077 | CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't | |
53078 | equal to bitsize of mode. | |
53079 | ||
53080 | 2023-01-31 Jakub Jelinek <jakub@redhat.com> | |
53081 | ||
53082 | PR rtl-optimization/108596 | |
53083 | * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb | |
53084 | ends with asm goto and has a crossing fallthrough edge to the same bb | |
53085 | that contains at least one of its labels by restoring EDGE_CROSSING | |
53086 | flag even on possible edge from cur_bb to new_bb successor. | |
53087 | ||
53088 | 2023-01-31 Jakub Jelinek <jakub@redhat.com> | |
53089 | ||
53090 | PR c++/105593 | |
53091 | * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd, | |
53092 | _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps, | |
53093 | _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use | |
53094 | _mm512_undefined_pd () or _mm512_undefined_ps () instead of using | |
53095 | uninitialized automatic variable __W. | |
53096 | ||
53097 | 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com> | |
53098 | ||
53099 | * doc/include/fdl.texi: Change fsf.org to www.fsf.org. | |
53100 | ||
53101 | 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53102 | ||
53103 | * config/riscv/riscv-protos.h (get_vector_mode): New function. | |
53104 | * config/riscv/riscv-v.cc (get_vector_mode): Ditto. | |
53105 | * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum. | |
53106 | (class loadstore): Adjust for indexed loads/stores support. | |
53107 | (BASE): Ditto. | |
53108 | * config/riscv/riscv-vector-builtins-bases.h: New function declare. | |
53109 | * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto. | |
53110 | (vluxei16): Ditto. | |
53111 | (vluxei32): Ditto. | |
53112 | (vluxei64): Ditto. | |
53113 | (vloxei8): Ditto. | |
53114 | (vloxei16): Ditto. | |
53115 | (vloxei32): Ditto. | |
53116 | (vloxei64): Ditto. | |
53117 | (vsuxei8): Ditto. | |
53118 | (vsuxei16): Ditto. | |
53119 | (vsuxei32): Ditto. | |
53120 | (vsuxei64): Ditto. | |
53121 | (vsoxei8): Ditto. | |
53122 | (vsoxei16): Ditto. | |
53123 | (vsoxei32): Ditto. | |
53124 | (vsoxei64): Ditto. | |
53125 | * config/riscv/riscv-vector-builtins-shapes.cc | |
53126 | (struct indexed_loadstore_def): New class. | |
53127 | (SHAPE): Ditto. | |
53128 | * config/riscv/riscv-vector-builtins-shapes.h: Ditto. | |
53129 | * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust | |
53130 | for indexed loads/stores support. | |
53131 | (check_required_extensions): Ditto. | |
53132 | (rvv_arg_type_info::get_base_vector_type): New function. | |
53133 | (rvv_arg_type_info::get_tree_type): Ditto. | |
53134 | (function_builder::add_unique_function): Adjust for indexed loads/stores | |
53135 | support. | |
53136 | (function_expander::use_exact_insn): New function. | |
53137 | * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for | |
53138 | indexed loads/stores support. | |
53139 | (struct rvv_arg_type_info): Ditto. | |
53140 | (function_expander::index_mode): New function. | |
53141 | (function_base::apply_tail_policy_p): Ditto. | |
53142 | (function_base::apply_mask_policy_p): Ditto. | |
53143 | * config/riscv/vector-iterators.md (unspec): New unspec. | |
53144 | * config/riscv/vector.md (unspec): Ditto. | |
53145 | (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New | |
53146 | pattern. | |
53147 | (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto. | |
53148 | (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto. | |
53149 | (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto. | |
53150 | (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto. | |
53151 | (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto. | |
53152 | (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto. | |
53153 | (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto. | |
53154 | (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto. | |
53155 | (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto. | |
53156 | (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
53157 | (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto. | |
53158 | (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
53159 | (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto. | |
53160 | ||
53161 | 2023-01-30 Flavio Cruz <flaviocruz@gmail.com> | |
53162 | ||
53163 | * config.gcc: Recognize x86_64-*-gnu* targets and include | |
53164 | i386/gnu64.h. | |
53165 | * config/i386/gnu64.h: Define configuration for new target | |
53166 | including ld.so location. | |
53167 | ||
53168 | 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
53169 | ||
53170 | * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update | |
53171 | ampere1a to include SM4. | |
53172 | ||
53173 | 2023-01-30 Andrew Pinski <apinski@marvell.com> | |
53174 | ||
53175 | PR tree-optimization/108582 | |
53176 | * tree-ssa-phiopt.cc (match_simplify_replacement): Add check | |
53177 | for middlebb to have no phi nodes. | |
53178 | ||
53179 | 2023-01-30 Richard Biener <rguenther@suse.de> | |
53180 | ||
53181 | PR tree-optimization/108574 | |
53182 | * tree-ssa-sccvn.cc (visit_phi): Instead of swapping | |
53183 | sameval and def, ignore the equivalence if there's the | |
53184 | danger of oscillating between two values. | |
53185 | ||
53186 | 2023-01-30 Andreas Schwab <schwab@suse.de> | |
53187 | ||
53188 | * common/config/riscv/riscv-common.cc | |
53189 | (riscv_option_optimization_table) | |
53190 | [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable | |
53191 | -fasynchronous-unwind-tables and -funwind-tables. | |
53192 | * config.gcc (riscv*-*-linux*): Define | |
53193 | TARGET_DEFAULT_ASYNC_UNWIND_TABLES. | |
53194 | ||
53195 | 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com> | |
53196 | ||
53197 | * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the | |
53198 | value of includedir. | |
53199 | ||
53200 | 2023-01-30 Richard Biener <rguenther@suse.de> | |
53201 | ||
53202 | PR ipa/108511 | |
53203 | * cgraph.cc (possibly_call_in_translation_unit_p): Relax | |
53204 | assert. | |
53205 | ||
53206 | 2023-01-30 liuhongt <hongtao.liu@intel.com> | |
53207 | ||
53208 | * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16. | |
53209 | * doc/invoke.texi: Ditto. | |
53210 | ||
53211 | 2023-01-29 Jan Hubicka <hubicka@ucw.cz> | |
53212 | ||
53213 | * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h | |
53214 | (stmt_may_terminate_function_p): If assuming return or EH | |
53215 | volatile asm is safe. | |
53216 | (find_always_executed_bbs): Fix handling of terminating BBS and | |
53217 | infinite loops; add debug output. | |
53218 | * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output | |
53219 | ||
53220 | 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu> | |
53221 | ||
53222 | * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an | |
53223 | off-by-one in checking the permissible shift-amount. | |
53224 | ||
53225 | 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com> | |
53226 | ||
53227 | * doc/extend.texi (Named Address Spaces): Update link to the | |
53228 | AVR-Libc manual. | |
53229 | ||
53230 | 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com> | |
53231 | ||
53232 | * doc/standards.texi (Standards): Fix markup. | |
53233 | ||
53234 | 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com> | |
53235 | ||
53236 | * doc/standards.texi (Standards): Update link to Objective-C book. | |
53237 | ||
53238 | 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com> | |
53239 | ||
53240 | * doc/invoke.texi (Instrumentation Options): Update reference to | |
53241 | AddressSanitizer. | |
53242 | ||
53243 | 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com> | |
53244 | ||
53245 | * doc/standards.texi: Update Go1 link. | |
53246 | ||
53247 | 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53248 | ||
53249 | * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate. | |
53250 | * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): | |
53251 | Support vlse/vsse. | |
53252 | (BASE): Ditto. | |
53253 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
53254 | * config/riscv/riscv-vector-builtins-functions.def (vlse): New class. | |
53255 | (vsse): New class. | |
53256 | * config/riscv/riscv-vector-builtins.cc | |
53257 | (function_expander::use_contiguous_load_insn): Support vlse/vsse. | |
53258 | * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern. | |
53259 | (@pred_strided_store<mode>): Ditto. | |
53260 | ||
53261 | 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53262 | ||
53263 | * config/riscv/vector.md (tail_policy_op_idx): Remove. | |
53264 | (mask_policy_op_idx): Remove. | |
53265 | (avl_type_op_idx): Remove. | |
53266 | ||
53267 | 2023-01-27 Richard Sandiford <richard.sandiford@arm.com> | |
53268 | ||
53269 | PR tree-optimization/96373 | |
53270 | * tree.h (sign_mask_for): Declare. | |
53271 | * tree.cc (sign_mask_for): New function. | |
53272 | (signed_or_unsigned_type_for): For vector types, try to use the | |
53273 | related_int_vector_mode. | |
53274 | * genmatch.cc (commutative_op): Handle conditional internal functions. | |
53275 | * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and. | |
53276 | ||
53277 | 2023-01-27 Richard Sandiford <richard.sandiford@arm.com> | |
53278 | ||
53279 | * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost): | |
53280 | Use the likely minimum VF when bounding the denominators to | |
53281 | the estimated number of iterations. | |
53282 | ||
53283 | 2023-01-27 Richard Biener <rguenther@suse.de> | |
53284 | ||
53285 | PR target/55522 | |
53286 | * doc/invoke.texi (-shared): Clarify effect on -ffast-math | |
53287 | and -Ofast FP environment side-effects. | |
53288 | ||
53289 | 2023-01-27 Richard Biener <rguenther@suse.de> | |
53290 | ||
53291 | PR target/55522 | |
53292 | * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC): | |
53293 | Don't add crtfastmath.o for -shared. | |
53294 | ||
53295 | 2023-01-27 Richard Biener <rguenther@suse.de> | |
53296 | ||
53297 | PR target/55522 | |
53298 | * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o | |
53299 | for -shared. | |
53300 | ||
53301 | 2023-01-27 Richard Biener <rguenther@suse.de> | |
53302 | ||
53303 | PR target/55522 | |
53304 | * config/alpha/linux.h (ENDFILE_SPEC): Don't add | |
53305 | crtfastmath.o for -shared. | |
53306 | ||
53307 | 2023-01-27 Andrew MacLeod <amacleod@redhat.com> | |
53308 | ||
53309 | PR tree-optimization/108306 | |
53310 | * range-op.cc (operator_lshift::fold_range): Return [0, 0] not | |
53311 | varying for shifts that are always out of void range. | |
53312 | (operator_rshift::fold_range): Return [0, 0] not | |
53313 | varying for shifts that are always out of void range. | |
53314 | ||
53315 | 2023-01-27 Andrew MacLeod <amacleod@redhat.com> | |
53316 | ||
53317 | PR tree-optimization/108447 | |
53318 | * gimple-range-fold.cc (old_using_range::relation_fold_and_or): | |
53319 | Do not attempt to fold HONOR_NAN types. | |
53320 | ||
53321 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53322 | ||
53323 | * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): | |
53324 | Remove _m suffix for "vop_m" C++ overloaded API name. | |
53325 | ||
53326 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53327 | ||
53328 | * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support. | |
53329 | * config/riscv/riscv-vector-builtins-bases.h: Ditto. | |
53330 | * config/riscv/riscv-vector-builtins-functions.def (vlm): New define. | |
53331 | (vsm): Ditto. | |
53332 | * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support. | |
53333 | * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto. | |
53334 | (vbool64_t): Ditto. | |
53335 | (vbool32_t): Ditto. | |
53336 | (vbool16_t): Ditto. | |
53337 | (vbool8_t): Ditto. | |
53338 | (vbool4_t): Ditto. | |
53339 | (vbool2_t): Ditto. | |
53340 | (vbool1_t): Ditto. | |
53341 | * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto. | |
53342 | (rvv_arg_type_info::get_tree_type): Ditto. | |
53343 | (function_expander::use_contiguous_load_insn): Ditto. | |
53344 | * config/riscv/vector.md (@pred_store<mode>): Ditto. | |
53345 | ||
53346 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53347 | ||
53348 | * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE. | |
53349 | (vsetvl_discard_result_insn_p): New function. | |
53350 | (reg_killed_by_bb_p): rename to find_reg_killed_by. | |
53351 | (find_reg_killed_by): New name. | |
53352 | (get_vl): allow it to be called by more functions. | |
53353 | (has_vsetvl_killed_avl_p): Add condition. | |
53354 | (get_avl): allow it to be called by more functions. | |
53355 | (insn_should_be_added_p): New function. | |
53356 | (get_all_nonphi_defs): Refine function. | |
53357 | (get_all_sets): Ditto. | |
53358 | (get_same_bb_set): New function. | |
53359 | (any_insn_in_bb_p): Ditto. | |
53360 | (any_set_in_bb_p): Ditto. | |
53361 | (get_vl_vtype_info): Add VLMAX forward optimization. | |
53362 | (source_equal_p): Fix issues. | |
53363 | (extract_single_source): Refine. | |
53364 | (avl_info::multiple_source_equal_p): New function. | |
53365 | (avl_info::operator==): Adjust for final version. | |
53366 | (vl_vtype_info::operator==): Ditto. | |
53367 | (vl_vtype_info::same_avl_p): Ditto. | |
53368 | (vector_insn_info::parse_insn): Ditto. | |
53369 | (vector_insn_info::available_p): New function. | |
53370 | (vector_insn_info::merge): Adjust for final version. | |
53371 | (vector_insn_info::dump): Add hard_empty. | |
53372 | (pass_vsetvl::hard_empty_block_p): New function. | |
53373 | (pass_vsetvl::backward_demand_fusion): Adjust for final version. | |
53374 | (pass_vsetvl::forward_demand_fusion): Ditto. | |
53375 | (pass_vsetvl::demand_fusion): Ditto. | |
53376 | (pass_vsetvl::cleanup_illegal_dirty_blocks): New function. | |
53377 | (pass_vsetvl::compute_local_properties): Adjust for final version. | |
53378 | (pass_vsetvl::can_refine_vsetvl_p): Ditto. | |
53379 | (pass_vsetvl::refine_vsetvls): Ditto. | |
53380 | (pass_vsetvl::commit_vsetvls): Ditto. | |
53381 | (pass_vsetvl::propagate_avl): New function. | |
53382 | (pass_vsetvl::lazy_vsetvl): Adjust for new version. | |
53383 | * config/riscv/riscv-vsetvl.h (enum def_type): New enum. | |
53384 | ||
53385 | 2023-01-27 Jakub Jelinek <jakub@redhat.com> | |
53386 | ||
53387 | PR other/108560 | |
53388 | * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len | |
53389 | from size_t to int. | |
53390 | ||
53391 | 2023-01-27 Jakub Jelinek <jakub@redhat.com> | |
53392 | ||
53393 | PR ipa/106061 | |
53394 | * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow | |
53395 | redirection of calls to __builtin_trap in addition to redirection | |
53396 | to __builtin_unreachable. | |
53397 | ||
53398 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53399 | ||
53400 | * config/riscv/riscv-vsetvl.cc (before_p): Fix bug. | |
53401 | ||
53402 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53403 | ||
53404 | * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args. | |
53405 | (emit_vsetvl_insn): Ditto. | |
53406 | ||
53407 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53408 | ||
53409 | * config/riscv/vector.md: Fix constraints. | |
53410 | ||
53411 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53412 | ||
53413 | * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates. | |
53414 | ||
53415 | 2023-01-27 Patrick Palka <ppalka@redhat.com> | |
53416 | Jakub Jelinek <jakub@redhat.com> | |
53417 | ||
53418 | * tree-core.h (tree_code_type, tree_code_length): For | |
53419 | C++17 and later, add inline keyword, otherwise don't define | |
53420 | the arrays, but declare extern arrays. | |
53421 | * tree.cc (tree_code_type, tree_code_length): Define these | |
53422 | arrays for C++14 and older. | |
53423 | ||
53424 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53425 | ||
53426 | * config/riscv/riscv-vsetvl.h: Change it into public. | |
53427 | ||
53428 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53429 | ||
53430 | * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL | |
53431 | pass. | |
53432 | ||
53433 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53434 | ||
53435 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns. | |
53436 | ||
53437 | 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53438 | ||
53439 | * config/riscv/vector.md: Fix incorrect attributes. | |
53440 | ||
53441 | 2023-01-27 Richard Biener <rguenther@suse.de> | |
53442 | ||
53443 | PR target/55522 | |
53444 | * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC): | |
53445 | Don't add crtfastmath.o for -shared. | |
53446 | ||
53447 | 2023-01-27 Alexandre Oliva <oliva@gnu.org> | |
53448 | ||
53449 | * doc/options.texi (option, RejectNegative): Mention that | |
53450 | -g-started options are also implicitly negatable. | |
53451 | ||
53452 | 2023-01-26 Kito Cheng <kito.cheng@sifive.com> | |
53453 | ||
53454 | * config/riscv/riscv-vector-builtins.cc (register_builtin_types): | |
53455 | Use get_typenode_from_name to get fixed-width integer type | |
53456 | nodes. | |
53457 | * config/riscv/riscv-vector-builtins.def: Update define with | |
53458 | fixed-width integer type nodes. | |
53459 | ||
53460 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53461 | ||
53462 | * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it. | |
53463 | (real_insn_and_same_bb_p): New function. | |
53464 | (same_bb_and_after_or_equal_p): Remove it. | |
53465 | (before_p): New function. | |
53466 | (reg_killed_by_bb_p): Ditto. | |
53467 | (has_vsetvl_killed_avl_p): Ditto. | |
53468 | (get_vl): Move location so that we can call it. | |
53469 | (anticipatable_occurrence_p): Fix issue of AVL=REG support. | |
53470 | (available_occurrence_p): Ditto. | |
53471 | (dominate_probability_p): Remove it. | |
53472 | (can_backward_propagate_p): Remove it. | |
53473 | (get_all_nonphi_defs): New function. | |
53474 | (get_all_predecessors): Ditto. | |
53475 | (any_insn_in_bb_p): Ditto. | |
53476 | (insert_vsetvl): Adjust AVL REG. | |
53477 | (source_equal_p): New function. | |
53478 | (extract_single_source): Ditto. | |
53479 | (avl_info::single_source_equal_p): Ditto. | |
53480 | (avl_info::operator==): Adjust for AVL=REG. | |
53481 | (vl_vtype_info::same_avl_p): Ditto. | |
53482 | (vector_insn_info::set_demand_info): Remove it. | |
53483 | (vector_insn_info::compatible_p): Adjust for AVL=REG. | |
53484 | (vector_insn_info::compatible_avl_p): New function. | |
53485 | (vector_insn_info::merge): Adjust AVL=REG. | |
53486 | (vector_insn_info::dump): Ditto. | |
53487 | (pass_vsetvl::merge_successors): Remove it. | |
53488 | (enum fusion_type): New enum. | |
53489 | (pass_vsetvl::get_backward_fusion_type): New function. | |
53490 | (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG. | |
53491 | (pass_vsetvl::forward_demand_fusion): Ditto. | |
53492 | (pass_vsetvl::demand_fusion): Ditto. | |
53493 | (pass_vsetvl::prune_expressions): Ditto. | |
53494 | (pass_vsetvl::compute_local_properties): Ditto. | |
53495 | (pass_vsetvl::cleanup_vsetvls): Ditto. | |
53496 | (pass_vsetvl::commit_vsetvls): Ditto. | |
53497 | (pass_vsetvl::init): Ditto. | |
53498 | * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum. | |
53499 | (enum merge_type): New enum. | |
53500 | ||
53501 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53502 | ||
53503 | * config/riscv/riscv-vsetvl.cc | |
53504 | (vector_infos_manager::vector_infos_manager): Add probability. | |
53505 | (vector_infos_manager::dump): Ditto. | |
53506 | (pass_vsetvl::compute_probabilities): Ditto. | |
53507 | * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto. | |
53508 | ||
53509 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53510 | ||
53511 | * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat. | |
53512 | (vector_insn_info::merge): Ditto. | |
53513 | (vector_insn_info::dump): Ditto. | |
53514 | (pass_vsetvl::merge_successors): Ditto. | |
53515 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
53516 | (pass_vsetvl::forward_demand_fusion): Ditto. | |
53517 | (pass_vsetvl::commit_vsetvls): Ditto. | |
53518 | * config/riscv/riscv-vsetvl.h: Ditto. | |
53519 | ||
53520 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53521 | ||
53522 | * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to | |
53523 | rinsn. | |
53524 | ||
53525 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53526 | ||
53527 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes. | |
53528 | ||
53529 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53530 | ||
53531 | * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion): | |
53532 | Add pre-check for redundant flow. | |
53533 | ||
53534 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53535 | ||
53536 | * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function. | |
53537 | (vector_infos_manager::free_bitmap_vectors): Ditto. | |
53538 | (pass_vsetvl::pre_vsetvl): Adjust codes. | |
53539 | * config/riscv/riscv-vsetvl.h: New function declaration. | |
53540 | ||
53541 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53542 | ||
53543 | * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb. | |
53544 | (vector_insn_info::set_demand_info): New function. | |
53545 | (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3. | |
53546 | (pass_vsetvl::merge_successors): Ditto. | |
53547 | (pass_vsetvl::compute_global_backward_infos): Ditto. | |
53548 | (pass_vsetvl::backward_demand_fusion): Ditto. | |
53549 | (pass_vsetvl::forward_demand_fusion): Ditto. | |
53550 | (pass_vsetvl::demand_fusion): New function. | |
53551 | (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3. | |
53552 | * config/riscv/riscv-vsetvl.h: New function declaration. | |
53553 | ||
53554 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53555 | ||
53556 | * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition. | |
53557 | ||
53558 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53559 | ||
53560 | * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function. | |
53561 | (pass_vsetvl::compute_global_backward_infos): Simplify codes. | |
53562 | ||
53563 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53564 | ||
53565 | * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function. | |
53566 | (backward_propagate_worthwhile_p): Fix non-worthwhile. | |
53567 | ||
53568 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53569 | ||
53570 | * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change. | |
53571 | ||
53572 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53573 | ||
53574 | * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function. | |
53575 | (pass_vsetvl::can_refine_vsetvl_p): Add AVL check. | |
53576 | (pass_vsetvl::commit_vsetvls): Ditto. | |
53577 | * config/riscv/riscv-vsetvl.h: New function declaration. | |
53578 | ||
53579 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53580 | ||
53581 | * config/riscv/vector.md: | |
53582 | ||
53583 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53584 | ||
53585 | * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use | |
53586 | pred_store for vse. | |
53587 | * config/riscv/riscv-vector-builtins.cc | |
53588 | (function_expander::add_mem_operand): Refine function. | |
53589 | (function_expander::use_contiguous_load_insn): Adjust new | |
53590 | implementation. | |
53591 | (function_expander::use_contiguous_store_insn): Ditto. | |
53592 | * config/riscv/riscv-vector-builtins.h: Refine function. | |
53593 | * config/riscv/vector.md (@pred_store<mode>): New pattern. | |
53594 | ||
53595 | 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | |
53596 | ||
53597 | * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer. | |
53598 | ||
53599 | 2023-01-26 Marek Polacek <polacek@redhat.com> | |
53600 | ||
53601 | PR middle-end/108543 | |
53602 | * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS | |
53603 | if it was previously set. | |
53604 | ||
53605 | 2023-01-26 Jakub Jelinek <jakub@redhat.com> | |
53606 | ||
53607 | PR tree-optimization/108540 | |
53608 | * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2 | |
53609 | are singletons, use range_true even if op1 != op2 | |
53610 | when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly, | |
53611 | even if intersection of the ranges is empty and one has | |
53612 | zero low bound and another zero high bound, use range_true_and_false | |
53613 | rather than range_false. | |
53614 | (foperator_not_equal::fold_range): If both op1 and op2 | |
53615 | are singletons, use range_false even if op1 != op2 | |
53616 | when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly, | |
53617 | even if intersection of the ranges is empty and one has | |
53618 | zero low bound and another zero high bound, use range_true_and_false | |
53619 | rather than range_true. | |
53620 | ||
53621 | 2023-01-26 Jakub Jelinek <jakub@redhat.com> | |
53622 | ||
53623 | * value-relation.cc (kind_string): Add const. | |
53624 | (rr_negate_table, rr_swap_table, rr_intersect_table, | |
53625 | rr_union_table, rr_transitive_table): Add static const, change | |
53626 | element type from relation_kind to unsigned char. | |
53627 | (relation_negate, relation_swap, relation_intersect, relation_union, | |
53628 | relation_transitive): Cast rr_*_table element to relation_kind. | |
53629 | (relation_to_code): Add static const. | |
53630 | (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX. | |
53631 | ||
53632 | 2023-01-26 Richard Biener <rguenther@suse.de> | |
53633 | ||
53634 | PR tree-optimization/108547 | |
53635 | * gimple-predicate-analysis.cc (value_sat_pred_p): | |
53636 | Use widest_int. | |
53637 | ||
53638 | 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org> | |
53639 | ||
53640 | PR tree-optimization/108522 | |
53641 | * tree-object-size.cc (compute_object_offset): Make EXPR | |
53642 | argument non-const. Call component_ref_field_offset. | |
53643 | ||
53644 | 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> | |
53645 | ||
53646 | * config/aarch64/aarch64-option-extensions.def (cssc): Specify | |
53647 | FEATURE_STRING field. | |
53648 | ||
53649 | 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com> | |
53650 | ||
53651 | * doc/sourcebuild.texi: Refer to projects as GCC and GDB. | |
53652 | ||
53653 | 2023-01-25 Iain Sandoe <iain@sandoe.co.uk> | |
53654 | ||
53655 | PR modula2/102343 | |
53656 | PR modula2/108182 | |
53657 | * gcc.cc: Provide default specs for Modula-2 so that when the | |
53658 | language is not built-in better diagnostics are emitted for | |
53659 | attempts to use .mod or .m2i file extensions. | |
53660 | ||
53661 | 2023-01-25 Andrea Corallo <andrea.corallo@arm.com> | |
53662 | ||
53663 | * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing. | |
53664 | ||
53665 | 2023-01-25 Andrea Corallo <andrea.corallo@arm.com> | |
53666 | ||
53667 | * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing. | |
53668 | ||
53669 | 2023-01-25 Andrea Corallo <andrea.corallo@arm.com> | |
53670 | ||
53671 | * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>): | |
53672 | Fix spacing. | |
53673 | ||
53674 | 2023-01-25 Andrea Corallo <andrea.corallo@arm.com> | |
53675 | ||
53676 | * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing. | |
53677 | ||
53678 | 2023-01-25 Andrea Corallo <andrea.corallo@arm.com> | |
53679 | ||
53680 | * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing. | |
53681 | ||
53682 | 2023-01-25 Richard Biener <rguenther@suse.de> | |
53683 | ||
53684 | PR tree-optimization/108523 | |
53685 | * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive | |
53686 | backedge value for the result when using predication to | |
53687 | prove equivalence. | |
53688 | ||
53689 | 2023-01-25 Richard Biener <rguenther@suse.de> | |
53690 | ||
53691 | * doc/lto.texi (Command line options): Reword and update reference | |
53692 | to removed lto_read_all_file_options. | |
53693 | ||
53694 | 2023-01-25 Richard Sandiford <richard.sandiford@arm.com> | |
53695 | ||
53696 | * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC | |
53697 | tests. | |
53698 | ||
53699 | 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com> | |
53700 | ||
53701 | * doc/contrib.texi: Add Jose E. Marchesi. | |
53702 | ||
53703 | 2023-01-25 Jakub Jelinek <jakub@redhat.com> | |
53704 | ||
53705 | PR tree-optimization/108498 | |
53706 | * gimple-ssa-store-merging.cc (class store_operand_info): | |
53707 | End coment with full stop rather than comma. | |
53708 | (split_group): Likewise. | |
53709 | (merged_store_group::apply_stores): Clear string_concatenation if | |
53710 | start or end aren't on a byte boundary. | |
53711 | ||
53712 | 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org> | |
53713 | Jakub Jelinek <jakub@redhat.com> | |
53714 | ||
53715 | PR tree-optimization/108522 | |
53716 | * tree-object-size.cc (compute_object_offset): Use | |
53717 | TREE_OPERAND(ref, 2) for COMPONENT_REF when available. | |
53718 | ||
53719 | 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
53720 | ||
53721 | * config/xtensa/xtensa.md: | |
53722 | Fix exit from loops detecting references before overwriting in the | |
53723 | split pattern. | |
53724 | ||
53725 | 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com> | |
53726 | ||
53727 | * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always | |
53728 | do elimination but only for hard register. | |
53729 | (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust | |
53730 | calls of get_hard_regno. | |
53731 | ||
53732 | 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | |
53733 | ||
53734 | * config/s390/s390-d.cc (s390_d_target_versions): Fix detection | |
53735 | of CPU version. | |
53736 | ||
53737 | 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com> | |
53738 | ||
53739 | PR target/108177 | |
53740 | * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf, | |
53741 | mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand | |
53742 | as input operand. | |
53743 | ||
53744 | 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
53745 | ||
53746 | * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB | |
53747 | and only include 'csky/t-csky-linux' when enable multilib. | |
53748 | * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't | |
53749 | define it when disable multilib. | |
53750 | ||
53751 | 2023-01-24 Richard Biener <rguenther@suse.de> | |
53752 | ||
53753 | PR tree-optimization/108500 | |
53754 | * dominance.h (calculate_dominance_info): Add parameter | |
53755 | to indicate fast-query compute, defaulted to true. | |
53756 | * dominance.cc (calculate_dominance_info): Honor | |
53757 | fast-query compute parameter. | |
53758 | * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do | |
53759 | not compute the dominator fast-query DFS numbers. | |
53760 | ||
53761 | 2023-01-24 Eric Biggers <ebiggers@google.com> | |
53762 | ||
53763 | PR bootstrap/90543 | |
53764 | * optc-save-gen.awk: Fix copy-and-paste error. | |
53765 | ||
53766 | 2023-01-24 Jakub Jelinek <jakub@redhat.com> | |
53767 | ||
53768 | PR c++/108474 | |
53769 | * cgraphbuild.cc: Include gimplify.h. | |
53770 | (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with | |
53771 | their corresponding DECL_VALUE_EXPR expressions after unsharing. | |
53772 | ||
53773 | 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
53774 | ||
53775 | PR target/108505 | |
53776 | * config.gcc (tm_file): Move the variable out of loop. | |
53777 | ||
53778 | 2023-01-24 Lulu Cheng <chenglulu@loongson.cn> | |
53779 | Yang Yujie <yangyujie@loongson.cn> | |
53780 | ||
53781 | PR target/107731 | |
53782 | * config/loongarch/loongarch.cc (loongarch_classify_address): | |
53783 | Add precessint for CONST_INT. | |
53784 | (loongarch_print_operand_reloc): Operand modifier 'c' is supported. | |
53785 | (loongarch_print_operand): Increase the processing of '%c'. | |
53786 | * doc/extend.texi: Adds documents for LoongArch operand modifiers. | |
53787 | And port the public operand modifiers information to this document. | |
53788 | ||
53789 | 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
53790 | ||
53791 | * doc/invoke.texi (-mbranch-protection): Update documentation. | |
53792 | ||
53793 | 2023-01-23 Richard Biener <rguenther@suse.de> | |
53794 | ||
53795 | PR target/55522 | |
53796 | * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o | |
53797 | for -shared. | |
53798 | * config/sparc/linux.h (ENDFILE_SPEC): Likewise. | |
53799 | * config/sparc/linux64.h (ENDFILE_SPEC): Likewise. | |
53800 | * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise. | |
53801 | * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise. | |
53802 | ||
53803 | 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
53804 | ||
53805 | * config/arm/aout.h (ra_auth_code): Add entry in enum. | |
53806 | * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register | |
53807 | to dwarf frame expression. | |
53808 | (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register. | |
53809 | (arm_expand_prologue): Update frame related information and reg notes | |
53810 | for pac/pacbit insn. | |
53811 | (arm_regno_class): Check for pac pseudo reigster. | |
53812 | (arm_dbx_register_number): Assign ra_auth_code register number in dwarf. | |
53813 | (arm_init_machine_status): Set pacspval_needed to zero. | |
53814 | (arm_debugger_regno): Check for PAC register. | |
53815 | (arm_unwind_emit_sequence): Print .save directive with ra_auth_code | |
53816 | register. | |
53817 | (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case. | |
53818 | (arm_unwind_emit): Update REG_CFA_REGISTER case._ | |
53819 | * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify. | |
53820 | (DWARF_PAC_REGNUM): Define. | |
53821 | (IS_PAC_REGNUM): Likewise. | |
53822 | (enum reg_class): Add PAC_REG entry. | |
53823 | (machine_function): Add pacbti_needed state to structure. | |
53824 | * config/arm/arm.md (RA_AUTH_CODE): Define. | |
53825 | ||
53826 | 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
53827 | ||
53828 | * config.gcc ($tm_file): Update variable. | |
53829 | * config/arm/arm-mlib.h: Create new header file. | |
53830 | * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection | |
53831 | multilib arch directory. | |
53832 | (MULTILIB_REUSE): Add multilib reuse rules. | |
53833 | (MULTILIB_MATCHES): Add multilib match rules. | |
53834 | ||
53835 | 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
53836 | ||
53837 | * config/arm/arm-cpus.in (cortex-m85): Define new CPU. | |
53838 | * config/arm/arm-tables.opt: Regenerate. | |
53839 | * config/arm/arm-tune.md: Likewise. | |
53840 | * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85. | |
53841 | * (-mfix-cmse-cve-2021-35465): Likewise. | |
53842 | ||
53843 | 2023-01-23 Richard Biener <rguenther@suse.de> | |
53844 | ||
53845 | PR tree-optimization/108482 | |
53846 | * tree-vect-generic.cc (expand_vector_operations): Fold remaining | |
53847 | .LOOP_DIST_ALIAS calls. | |
53848 | ||
53849 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53850 | ||
53851 | * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object. | |
53852 | * config/arm/arm-protos.h: Update. | |
53853 | * config/arm/aarch-common-protos.h: Declare | |
53854 | 'aarch_bti_arch_check'. | |
53855 | * config/arm/arm.cc (aarch_bti_enabled) Update. | |
53856 | (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c) | |
53857 | (aarch_gen_bti_j, aarch_bti_arch_check): New functions. | |
53858 | * config/arm/arm.md (bti_nop): New insn. | |
53859 | * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'. | |
53860 | (aarch-bti-insert.o): New target. | |
53861 | * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec. | |
53862 | * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch | |
53863 | compatibility. | |
53864 | (gate): Make use of 'aarch_bti_arch_check'. | |
53865 | * config/arm/arm-passes.def: New file. | |
53866 | * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function. | |
53867 | ||
53868 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53869 | ||
53870 | * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into | |
53871 | 'aarch-bti-insert.o'. | |
53872 | * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled' | |
53873 | proto. | |
53874 | * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename. | |
53875 | (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions. | |
53876 | (aarch64_output_mi_thunk) | |
53877 | (aarch64_print_patchable_function_entry) | |
53878 | (aarch64_file_end_indicate_exec_stack): Update renamed function | |
53879 | calls to renamed functions. | |
53880 | * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise. | |
53881 | * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update | |
53882 | target. | |
53883 | * config/aarch64/aarch64-bti-insert.cc: Delete. | |
53884 | * config/arm/aarch-bti-insert.cc: New file including and | |
53885 | generalizing code from aarch64-bti-insert.cc. | |
53886 | * config/arm/aarch-common-protos.h: Update. | |
53887 | ||
53888 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53889 | ||
53890 | * config/arm/arm.h (arm_arch8m_main): Declare it. | |
53891 | * config/arm/arm-protos.h (arm_current_function_pac_enabled_p): | |
53892 | Declare it. | |
53893 | * config/arm/arm.cc (arm_arch8m_main): Define it. | |
53894 | (arm_option_reconfigure_globals): Set arm_arch8m_main. | |
53895 | (arm_compute_frame_layout, arm_expand_prologue) | |
53896 | (thumb2_expand_return, arm_expand_epilogue) | |
53897 | (arm_conditional_register_usage): Update for pac codegen. | |
53898 | (arm_current_function_pac_enabled_p): New function. | |
53899 | (aarch_bti_enabled) New function. | |
53900 | (use_return_insn): Return zero when pac is enabled. | |
53901 | * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp): | |
53902 | Add new patterns. | |
53903 | * config/arm/unspecs.md (UNSPEC_PAC_NOP) | |
53904 | (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs. | |
53905 | ||
53906 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53907 | ||
53908 | * config/arm/t-rmprofile: Add multilib rules for march +pacbti and | |
53909 | mbranch-protection. | |
53910 | ||
53911 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53912 | Tejas Belagod <tbelagod@arm.com> | |
53913 | ||
53914 | * config/arm/arm.cc (arm_file_start): Emit EABI attributes for | |
53915 | Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use. | |
53916 | ||
53917 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53918 | Tejas Belagod <tbelagod@arm.com> | |
53919 | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
53920 | ||
53921 | * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce | |
53922 | new pseudo register class _UVRSC_PAC. | |
53923 | ||
53924 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53925 | Tejas Belagod <tbelagod@arm.com> | |
53926 | ||
53927 | * config/arm/arm-c.cc (arm_cpu_builtins): Define | |
53928 | __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT, | |
53929 | __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI. | |
53930 | ||
53931 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53932 | Tejas Belagod <tbelagod@arm.com> | |
53933 | ||
53934 | * doc/sourcebuild.texi: Document arm_pacbti_hw. | |
53935 | ||
53936 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53937 | Tejas Belagod <tbelagod@arm.com> | |
53938 | Richard Earnshaw <Richard.Earnshaw@arm.com> | |
53939 | ||
53940 | * config/arm/arm.cc (arm_configure_build_target): Parse and validate | |
53941 | -mbranch-protection option and initialize appropriate data structures. | |
53942 | * config/arm/arm.opt (-mbranch-protection): New option. | |
53943 | * doc/invoke.texi (Arm Options): Document it. | |
53944 | ||
53945 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53946 | Tejas Belagod <tbelagod@arm.com> | |
53947 | ||
53948 | * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro. | |
53949 | * config/arm/arm-cpus.in (pacbti): New feature. | |
53950 | * doc/invoke.texi (Arm Options): Document it. | |
53951 | ||
53952 | 2023-01-23 Andrea Corallo <andrea.corallo@arm.com> | |
53953 | Tejas Belagod <tbelagod@arm.com> | |
53954 | ||
53955 | * common/config/aarch64/aarch64-common.cc: Include aarch-common.h. | |
53956 | (all_architectures): Fix comment. | |
53957 | (aarch64_parse_extension): Rename return type, enum value names. | |
53958 | * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename | |
53959 | factored out aarch_ra_sign_scope and aarch_ra_sign_key variables. | |
53960 | Also rename corresponding enum values. | |
53961 | * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor | |
53962 | out aarch64_function_type and move it to common code as | |
53963 | aarch_function_type in aarch-common.h. | |
53964 | * config/aarch64/aarch64-protos.h: Include common types header, | |
53965 | move out types aarch64_parse_opt_result and aarch64_key_type to | |
53966 | aarch-common.h | |
53967 | * config/aarch64/aarch64.cc: Move mbranch-protection parsing types | |
53968 | and functions out into aarch-common.h and aarch-common.cc. Fix up | |
53969 | all the name changes resulting from the move. | |
53970 | * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change | |
53971 | and enum value. | |
53972 | * config/aarch64/aarch64.opt: Include aarch-common.h to import | |
53973 | type move. Fix up name changes from factoring out common code and | |
53974 | data. | |
53975 | * config/arm/aarch-common-protos.h: Export factored out routines to both | |
53976 | backends. | |
53977 | * config/arm/aarch-common.cc: Include newly factored out types. | |
53978 | Move all mbranch-protection code and data structures from | |
53979 | aarch64.cc. | |
53980 | * config/arm/aarch-common.h: New header that declares types shared | |
53981 | between aarch32 and aarch64 backends. | |
53982 | * config/arm/arm-protos.h: Declare types and variables that are | |
53983 | made common to aarch64 and aarch32 backends - aarch_ra_sign_key, | |
53984 | aarch_ra_sign_scope and aarch_enable_bti. | |
53985 | * config/arm/arm.opt (config/arm/aarch-common.h): Include header. | |
53986 | (aarch_ra_sign_scope, aarch_enable_bti): Declare variable. | |
53987 | * config/arm/arm.cc: Add missing includes. | |
53988 | ||
53989 | 2023-01-23 Tobias Burnus <tobias@codesourcery.com> | |
53990 | ||
53991 | * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0. | |
53992 | ||
53993 | 2023-01-23 Richard Biener <rguenther@suse.de> | |
53994 | ||
53995 | PR tree-optimization/108449 | |
53996 | * cgraphunit.cc (check_global_declaration): Do not turn | |
53997 | undefined statics into externs. | |
53998 | ||
53999 | 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu> | |
54000 | ||
54001 | * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI | |
54002 | and HI input modes. | |
54003 | * config/pru/pru.md (clz): Fix generated code for QI and HI | |
54004 | input modes. | |
54005 | ||
54006 | 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com> | |
54007 | ||
54008 | * config/v850/v850.cc (v850_select_section): Put const volatile | |
54009 | objects into read-only sections. | |
54010 | ||
54011 | 2023-01-20 Tejas Belagod <tejas.belagod@arm.com> | |
54012 | ||
54013 | * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8, | |
54014 | vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes". | |
54015 | (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2". | |
54016 | ||
54017 | 2023-01-20 Jakub Jelinek <jakub@redhat.com> | |
54018 | ||
54019 | PR tree-optimization/108457 | |
54020 | * tree-ssa-loop-niter.cc (build_cltz_expr): Use | |
54021 | SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO | |
54022 | argument instead of a temporary. Formatting fixes. | |
54023 | ||
54024 | 2023-01-19 Jakub Jelinek <jakub@redhat.com> | |
54025 | ||
54026 | PR tree-optimization/108447 | |
54027 | * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order. | |
54028 | (relation_tests): Add self-tests for relation_{intersect,union} | |
54029 | commutativity. | |
54030 | * selftest.h (relation_tests): Declare. | |
54031 | * function-tests.cc (test_ranges): Call it. | |
54032 | ||
54033 | 2023-01-19 H.J. Lu <hjl.tools@gmail.com> | |
54034 | ||
54035 | PR target/108436 | |
54036 | * config/i386/i386-expand.cc (ix86_expand_builtin): Check | |
54037 | invalid third argument to __builtin_ia32_prefetch. | |
54038 | ||
54039 | 2023-01-19 Jakub Jelinek <jakub@redhat.com> | |
54040 | ||
54041 | PR middle-end/108459 | |
54042 | * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather | |
54043 | than fold_unary for NEGATE_EXPR. | |
54044 | ||
54045 | 2023-01-19 Christophe Lyon <christophe.lyon@arm.com> | |
54046 | ||
54047 | PR target/108411 | |
54048 | * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve | |
54049 | comment. Move assert about alignment a bit later. | |
54050 | ||
54051 | 2023-01-19 Jakub Jelinek <jakub@redhat.com> | |
54052 | ||
54053 | PR tree-optimization/108440 | |
54054 | * tree-ssa-forwprop.cc: Include gimple-range.h. | |
54055 | (simplify_rotate): For the forms with T2 wider than T and shift counts of | |
54056 | Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal | |
54057 | to B. For the forms with T2 wider than T and shift counts of | |
54058 | Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if | |
54059 | range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee | |
54060 | Y < B, also add & (B - 1) masking for the rotate count. Use lazily created | |
54061 | pass specific ranger instead of get_global_range_query. | |
54062 | (pass_forwprop::execute): Disable that ranger at the end of pass if it has | |
54063 | been created. | |
54064 | ||
54065 | 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
54066 | ||
54067 | * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use | |
54068 | exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating | |
54069 | the pattern. | |
54070 | (aarch64_simd_vec_copy_lane<mode>): Likewise. | |
54071 | (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise. | |
54072 | ||
54073 | 2023-01-19 Alexandre Oliva <oliva@adacore.com> | |
54074 | ||
54075 | PR debug/106746 | |
54076 | * sched-deps.cc (sched_analyze_2): Skip cselib address lookup | |
54077 | within debug insns. | |
54078 | ||
54079 | 2023-01-18 Martin Jambor <mjambor@suse.cz> | |
54080 | ||
54081 | PR ipa/107944 | |
54082 | * cgraph.cc (cgraph_node::remove): Check whether nodes up the | |
54083 | lcone_of chain also do not need the body. | |
54084 | ||
54085 | 2023-01-18 Richard Biener <rguenther@suse.de> | |
54086 | ||
54087 | Revert: | |
54088 | 2022-12-16 Richard Biener <rguenther@suse.de> | |
54089 | ||
54090 | PR middle-end/108086 | |
54091 | * tree-inline.cc (remap_ssa_name): Do not unshare the | |
54092 | result from the decl_map. | |
54093 | ||
54094 | 2023-01-18 Murray Steele <murray.steele@arm.com> | |
54095 | ||
54096 | PR target/108442 | |
54097 | * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic | |
54098 | function. | |
54099 | (__arm_vst1q_p_s8): Likewise. | |
54100 | (__arm_vld1q_z_u8): Likewise. | |
54101 | (__arm_vld1q_z_s8): Likewise. | |
54102 | (__arm_vst1q_p_u16): Likewise. | |
54103 | (__arm_vst1q_p_s16): Likewise. | |
54104 | (__arm_vld1q_z_u16): Likewise. | |
54105 | (__arm_vld1q_z_s16): Likewise. | |
54106 | (__arm_vst1q_p_u32): Likewise. | |
54107 | (__arm_vst1q_p_s32): Likewise. | |
54108 | (__arm_vld1q_z_u32): Likewise. | |
54109 | (__arm_vld1q_z_s32): Likewise. | |
54110 | (__arm_vld1q_z_f16): Likewise. | |
54111 | (__arm_vst1q_p_f16): Likewise. | |
54112 | (__arm_vld1q_z_f32): Likewise. | |
54113 | (__arm_vst1q_p_f32): Likewise. | |
54114 | ||
54115 | 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54116 | ||
54117 | * config/xtensa/xtensa.md (xorsi3_internal): | |
54118 | Rename from the original of "xorsi3". | |
54119 | (xorsi3): New expansion pattern that emits addition rather than | |
54120 | bitwise-XOR when the second source is a constant of -2147483648 | |
54121 | if TARGET_DENSITY. | |
54122 | ||
54123 | 2023-01-18 Kewen Lin <linkw@linux.ibm.com> | |
54124 | Andrew Pinski <apinski@marvell.com> | |
54125 | ||
54126 | PR target/108396 | |
54127 | * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo | |
54128 | vec_vsubcuqP with vec_vsubcuq. | |
54129 | ||
54130 | 2023-01-18 Kewen Lin <linkw@linux.ibm.com> | |
54131 | ||
54132 | PR target/108348 | |
54133 | * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the | |
54134 | support for invalid uses of MMA opaque type in function arguments. | |
54135 | ||
54136 | 2023-01-18 liuhongt <hongtao.liu@intel.com> | |
54137 | ||
54138 | PR target/55522 | |
54139 | * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o | |
54140 | whenever -mdaz-ftz is specified. Don't link crtfastmath.o when | |
54141 | -share or -mno-daz-ftz is specified. | |
54142 | * config/i386/darwin.h (ENDFILE_SPEC): Ditto. | |
54143 | * config/i386/mingw32.h (ENDFILE_SPEC): Ditto. | |
54144 | ||
54145 | 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com> | |
54146 | ||
54147 | * config/bpf/bpf.cc (bpf_option_override): Disable | |
54148 | -fstack-protector. | |
54149 | ||
54150 | 2023-01-17 Jakub Jelinek <jakub@redhat.com> | |
54151 | ||
54152 | PR tree-optimization/106523 | |
54153 | * tree-ssa-forwprop.cc (simplify_rotate): For the | |
54154 | patterns with (-Y) & (B - 1) in one operand's shift | |
54155 | count and Y in another, if T2 has wider precision than T, | |
54156 | punt if Y could have a value in [B, B2 - 1] range. | |
54157 | ||
54158 | 2023-01-16 H.J. Lu <hjl.tools@gmail.com> | |
54159 | ||
54160 | PR target/105980 | |
54161 | * config/i386/i386.cc (x86_output_mi_thunk): Disable | |
54162 | -mforce-indirect-call for PIC in 32-bit mode. | |
54163 | ||
54164 | 2023-01-16 Jan Hubicka <hubicka@ucw.cz> | |
54165 | ||
54166 | PR ipa/106077 | |
54167 | * ipa-modref.cc (modref_access_analysis::analyze): Use | |
54168 | find_always_executed_bbs. | |
54169 | * ipa-sra.cc (process_scan_results): Likewise. | |
54170 | * ipa-utils.cc (stmt_may_terminate_function_p): New function. | |
54171 | (find_always_executed_bbs): New function. | |
54172 | * ipa-utils.h (stmt_may_terminate_function_p): Declare. | |
54173 | (find_always_executed_bbs): Declare. | |
54174 | ||
54175 | 2023-01-16 Jan Hubicka <jh@suse.cz> | |
54176 | ||
54177 | * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter | |
54178 | by TARGET_USE_SCATTER. | |
54179 | * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS, | |
54180 | TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros. | |
54181 | * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS, | |
54182 | TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes. | |
54183 | (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable | |
54184 | for znver4. (X86_TUNE_USE_GATHER): Disable for zen4. | |
54185 | ||
54186 | 2023-01-16 Richard Biener <rguenther@suse.de> | |
54187 | ||
54188 | PR target/55522 | |
54189 | * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared. | |
54190 | ||
54191 | 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com> | |
54192 | ||
54193 | PR target/96795 | |
54194 | PR target/107515 | |
54195 | * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types. | |
54196 | (__ARM_mve_coerce3): Likewise. | |
54197 | ||
54198 | 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
54199 | ||
54200 | * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support. | |
54201 | ||
54202 | 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
54203 | ||
54204 | * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New. | |
54205 | (number_of_iterations_bitcount): Add call to the above. | |
54206 | (number_of_iterations_exit_assumptions): Add EQ_EXPR case for | |
54207 | c[lt]z idiom recognition. | |
54208 | ||
54209 | 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
54210 | ||
54211 | * doc/sourcebuild.texi: Add missing target attributes. | |
54212 | ||
54213 | 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com> | |
54214 | ||
54215 | PR tree-optimization/94793 | |
54216 | * tree-scalar-evolution.cc (expression_expensive_p): Add checks | |
54217 | for c[lt]z optabs. | |
54218 | * tree-ssa-loop-niter.cc (build_cltz_expr): New. | |
54219 | (number_of_iterations_cltz_complement): New. | |
54220 | (number_of_iterations_bitcount): Add call to the above. | |
54221 | ||
54222 | 2023-01-16 Jonathan Wakely <jwakely@redhat.com> | |
54223 | ||
54224 | * doc/extend.texi (Common Function Attributes): Fix grammar. | |
54225 | ||
54226 | 2023-01-16 Jakub Jelinek <jakub@redhat.com> | |
54227 | ||
54228 | PR other/108413 | |
54229 | * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C). | |
54230 | * config/riscv/riscv-vsetvl.cc: Likewise. | |
54231 | ||
54232 | 2023-01-16 Jakub Jelinek <jakub@redhat.com> | |
54233 | ||
54234 | PR c++/105593 | |
54235 | * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily | |
54236 | disable -Winit-self using pragma GCC diagnostic ignored. | |
54237 | * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128): | |
54238 | Likewise. | |
54239 | * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps, | |
54240 | _mm256_undefined_si256): Likewise. | |
54241 | * config/i386/avx512fintrin.h (_mm512_undefined_pd, | |
54242 | _mm512_undefined_ps, _mm512_undefined_epi32): Likewise. | |
54243 | * config/i386/avx512fp16intrin.h (_mm_undefined_ph, | |
54244 | _mm256_undefined_ph, _mm512_undefined_ph): Likewise. | |
54245 | ||
54246 | 2023-01-16 Kewen Lin <linkw@linux.ibm.com> | |
54247 | ||
54248 | PR target/108272 | |
54249 | * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the | |
54250 | support for invalid uses in inline asm, factor out the checking and | |
54251 | erroring to lambda function check_and_error_invalid_use. | |
54252 | ||
54253 | 2023-01-15 Aldy Hernandez <aldyh@redhat.com> | |
54254 | ||
54255 | PR tree-optimization/107608 | |
54256 | * range-op-float.cc (range_operator_float::fold_range): Avoid | |
54257 | folding into INF when flag_trapping_math. | |
54258 | * value-range.h (frange::known_isinf): Return false for possible NANs. | |
54259 | ||
54260 | 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
54261 | ||
54262 | * config.gcc (csky-*-*): Support --with-float=softfp. | |
54263 | ||
54264 | 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54265 | ||
54266 | * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc): | |
54267 | Rename to xtensa_adjust_reg_alloc_order. | |
54268 | * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order): | |
54269 | Ditto. And also remove code to reorder register numbers for | |
54270 | leaf functions, rename the tables, and adjust the allocation | |
54271 | order for the call0 ABI to use register A0 more. | |
54272 | (xtensa_leaf_regs): Remove. | |
54273 | * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics. | |
54274 | (order_regs_for_local_alloc): Rename as the above. | |
54275 | (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove. | |
54276 | ||
54277 | 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | |
54278 | ||
54279 | * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le): | |
54280 | Change to define_insn_and_split to fold ldr+dup to ld1rq. | |
54281 | * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New. | |
54282 | ||
54283 | 2023-01-14 Alexandre Oliva <oliva@adacore.com> | |
54284 | ||
54285 | * hash-table.h (is_deleted): Precheck !is_empty. | |
54286 | (mark_deleted): Postcheck !is_empty. | |
54287 | (copy constructor): Test is_empty before is_deleted. | |
54288 | ||
54289 | 2023-01-14 Alexandre Oliva <oliva@adacore.com> | |
54290 | ||
54291 | PR target/40457 | |
54292 | * config/arm/arm.md (movmisaligndi): Prefer aligned SImode | |
54293 | moves. | |
54294 | ||
54295 | 2023-01-13 Eric Botcazou <ebotcazou@adacore.com> | |
54296 | ||
54297 | PR rtl-optimization/108274 | |
54298 | * function.cc (thread_prologue_and_epilogue_insns): Also update the | |
54299 | DF information for calls in a few more cases. | |
54300 | ||
54301 | 2023-01-13 John David Anglin <danglin@gcc.gnu.org> | |
54302 | ||
54303 | * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define. | |
54304 | * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE | |
54305 | define. | |
54306 | * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls. | |
54307 | (MAX_SYNC_LIBFUNC_SIZE): Define. | |
54308 | (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is | |
54309 | enabled. | |
54310 | * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1 | |
54311 | libcall when sync libcalls are disabled. | |
54312 | (atomic_storehi, atomic_storesi, atomic_storedi): Likewise. | |
54313 | (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls | |
54314 | are disabled on 32-bit target. | |
54315 | * config/pa/pa.opt (matomic-libcalls): New option. | |
54316 | * doc/invoke.texi (HPPA Options): Update. | |
54317 | ||
54318 | 2023-01-13 Alexander Monakov <amonakov@ispras.ru> | |
54319 | ||
54320 | PR rtl-optimization/108117 | |
54321 | PR rtl-optimization/108132 | |
54322 | * sched-deps.cc (deps_analyze_insn): Do not schedule across | |
54323 | calls before reload. | |
54324 | ||
54325 | 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com> | |
54326 | ||
54327 | * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde | |
54328 | options for -mlibarch. | |
54329 | * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options. | |
54330 | * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU. | |
54331 | ||
54332 | 2023-01-13 Qing Zhao <qing.zhao@oracle.com> | |
54333 | ||
54334 | * attribs.cc (strict_flex_array_level_of): Move this function to ... | |
54335 | * attribs.h (strict_flex_array_level_of): Remove the declaration. | |
54336 | * gimple-array-bounds.cc (array_bounds_checker::check_array_ref): | |
54337 | replace the referece to strict_flex_array_level_of with | |
54338 | DECL_NOT_FLEXARRAY. | |
54339 | * tree.cc (component_ref_size): Likewise. | |
54340 | ||
54341 | 2023-01-13 Richard Biener <rguenther@suse.de> | |
54342 | ||
54343 | PR target/55522 | |
54344 | * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add | |
54345 | crtfastmath.o for -shared. | |
54346 | * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise. | |
54347 | ||
54348 | 2023-01-13 Richard Biener <rguenther@suse.de> | |
54349 | ||
54350 | PR target/55522 | |
54351 | * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add | |
54352 | crtfastmath.o for -shared. | |
54353 | * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC): | |
54354 | Likewise. | |
54355 | * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC): | |
54356 | Likewise. | |
54357 | ||
54358 | 2023-01-13 Richard Sandiford <richard.sandiford@arm.com> | |
54359 | ||
54360 | * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New | |
54361 | function. | |
54362 | (TARGET_DWARF_FRAME_REG_MODE): Define. | |
54363 | ||
54364 | 2023-01-13 Richard Biener <rguenther@suse.de> | |
54365 | ||
54366 | PR target/107209 | |
54367 | * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't | |
54368 | update EH info on the fly. | |
54369 | ||
54370 | 2023-01-13 Richard Biener <rguenther@suse.de> | |
54371 | ||
54372 | PR tree-optimization/108387 | |
54373 | * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME | |
54374 | value before inserting expression into the tables. | |
54375 | ||
54376 | 2023-01-12 Andrew Pinski <apinski@marvell.com> | |
54377 | Roger Sayle <roger@nextmovesoftware.com> | |
54378 | ||
54379 | PR tree-optimization/92342 | |
54380 | * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0): | |
54381 | Use tcc_comparison and :c for the multiply. | |
54382 | (b & -(a CMP c) -> (a CMP c)?b:0): New pattern. | |
54383 | ||
54384 | 2023-01-12 Christophe Lyon <christophe.lyon@arm.com> | |
54385 | Richard Sandiford <richard.sandiford@arm.com> | |
54386 | ||
54387 | PR target/105549 | |
54388 | * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): | |
54389 | Check DECL_PACKED for bitfield. | |
54390 | (aarch64_layout_arg): Warn when parameter passing ABI changes. | |
54391 | (aarch64_function_arg_boundary): Do not warn here. | |
54392 | (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI | |
54393 | changes. | |
54394 | ||
54395 | 2023-01-12 Christophe Lyon <christophe.lyon@arm.com> | |
54396 | Richard Sandiford <richard.sandiford@arm.com> | |
54397 | ||
54398 | * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix | |
54399 | comment. | |
54400 | (aarch64_layout_arg): Factorize warning conditions. | |
54401 | (aarch64_function_arg_boundary): Fix typo. | |
54402 | * function.cc (currently_expanding_function_start): New variable. | |
54403 | (expand_function_start): Handle | |
54404 | currently_expanding_function_start. | |
54405 | * function.h (currently_expanding_function_start): Declare. | |
54406 | ||
54407 | 2023-01-12 Richard Biener <rguenther@suse.de> | |
54408 | ||
54409 | PR tree-optimization/99412 | |
54410 | * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove. | |
54411 | (swap_ops_for_binary_stmt): Remove reduction handling. | |
54412 | (rewrite_expr_tree_parallel): Adjust. | |
54413 | (reassociate_bb): Likewise. | |
54414 | * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR. | |
54415 | ||
54416 | 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54417 | ||
54418 | * config/xtensa/xtensa.md (ctzsi2, ffssi2): | |
54419 | Rearrange the emitting codes. | |
54420 | ||
54421 | 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54422 | ||
54423 | * config/xtensa/xtensa.md (*btrue): | |
54424 | Correct value of the attribute "length" that depends on | |
54425 | TARGET_DENSITY and operands, and add '?' character to the register | |
54426 | constraint of the compared operand. | |
54427 | ||
54428 | 2023-01-12 Alexandre Oliva <oliva@adacore.com> | |
54429 | ||
54430 | * hash-table.h (expand): Check elements and deleted counts. | |
54431 | (verify): Likewise. | |
54432 | ||
54433 | 2023-01-11 Roger Sayle <roger@nextmovesoftware.com> | |
54434 | ||
54435 | PR tree-optimization/71343 | |
54436 | * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make | |
54437 | the value number of the expression X << C the same as the value | |
54438 | number for the multiplication X * (1<<C). | |
54439 | ||
54440 | 2023-01-11 David Faust <david.faust@oracle.com> | |
54441 | ||
54442 | PR target/108293 | |
54443 | * config/bpf/bpf.cc (bpf_print_operand): Correct handling for | |
54444 | floating point modes. | |
54445 | ||
54446 | 2023-01-11 Eric Botcazou <ebotcazou@adacore.com> | |
54447 | ||
54448 | PR tree-optimization/108199 | |
54449 | * tree-sra.cc (sra_modify_expr): Deal with reverse storage order | |
54450 | for bit-field references. | |
54451 | ||
54452 | 2023-01-11 Kewen Lin <linkw@linux.ibm.com> | |
54453 | ||
54454 | * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make | |
54455 | OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting. | |
54456 | * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove | |
54457 | OPTION_MASK_P10_FUSION. | |
54458 | ||
54459 | 2023-01-11 Richard Biener <rguenther@suse.de> | |
54460 | ||
54461 | PR tree-optimization/107767 | |
54462 | * tree-cfgcleanup.cc (phi_alternatives_equal): Export. | |
54463 | * tree-cfgcleanup.h (phi_alternatives_equal): Declare. | |
54464 | * tree-switch-conversion.cc (switch_conversion::collect): | |
54465 | Count unique non-default targets accounting for later | |
54466 | merging opportunities. | |
54467 | ||
54468 | 2023-01-11 Martin Liska <mliska@suse.cz> | |
54469 | ||
54470 | PR middle-end/107976 | |
54471 | * params.opt: Limit JT params. | |
54472 | * stmt.cc (emit_case_dispatch_table): Use auto_vec. | |
54473 | ||
54474 | 2023-01-11 Richard Biener <rguenther@suse.de> | |
54475 | ||
54476 | PR tree-optimization/108352 | |
54477 | * tree-ssa-threadbackward.cc | |
54478 | (back_threader_profitability::profitable_path_p): Adjust | |
54479 | heuristic that allows non-multi-way branch threads creating | |
54480 | irreducible loops. | |
54481 | * doc/invoke.texi (--param fsm-scale-path-blocks): Remove. | |
54482 | (--param fsm-scale-path-stmts): Adjust. | |
54483 | * params.opt (--param=fsm-scale-path-blocks=): Remove. | |
54484 | (-param=fsm-scale-path-stmts=): Adjust description. | |
54485 | ||
54486 | 2023-01-11 Richard Biener <rguenther@suse.de> | |
54487 | ||
54488 | PR tree-optimization/108353 | |
54489 | * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back): | |
54490 | Remove. | |
54491 | (add_ssa_edge): Simplify. | |
54492 | (add_control_edge): Likewise. | |
54493 | (ssa_prop_init): Likewise. | |
54494 | (ssa_prop_fini): Likewise. | |
54495 | (ssa_propagation_engine::ssa_propagate): Likewise. | |
54496 | ||
54497 | 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com> | |
54498 | ||
54499 | * config/s390/s390.md (*not<mode>): New pattern. | |
54500 | ||
54501 | 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54502 | ||
54503 | * config/xtensa/xtensa.cc (xtensa_insn_cost): | |
54504 | Let insn cost for size be obtained by applying COSTS_N_INSNS() | |
54505 | to instruction length and then dividing by 3. | |
54506 | ||
54507 | 2023-01-10 Richard Biener <rguenther@suse.de> | |
54508 | ||
54509 | PR tree-optimization/106293 | |
54510 | * tree-ssa-dse.cc (dse_classify_store): Use a worklist to | |
54511 | process degenerate PHI defs. | |
54512 | ||
54513 | 2023-01-10 Roger Sayle <roger@nextmovesoftware.com> | |
54514 | ||
54515 | PR rtl-optimization/106421 | |
54516 | * cprop.cc (bypass_block): Check that DEST is local to this | |
54517 | function (non-NULL) before calling find_edge. | |
54518 | ||
54519 | 2023-01-10 Martin Jambor <mjambor@suse.cz> | |
54520 | ||
54521 | PR ipa/108110 | |
54522 | * ipa-param-manipulation.h (ipa_param_body_adjustments): New members | |
54523 | sort_replacements, lookup_first_base_replacement and | |
54524 | m_sorted_replacements_p. | |
54525 | * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM. | |
54526 | (ipa_param_body_adjustments::register_replacement): Set | |
54527 | m_sorted_replacements_p to false. | |
54528 | (compare_param_body_replacement): New function. | |
54529 | (ipa_param_body_adjustments::sort_replacements): Likewise. | |
54530 | (ipa_param_body_adjustments::common_initialization): Call | |
54531 | sort_replacements. | |
54532 | (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize | |
54533 | m_sorted_replacements_p. | |
54534 | (ipa_param_body_adjustments::lookup_replacement_1): Rework to use | |
54535 | std::lower_bound. | |
54536 | (ipa_param_body_adjustments::lookup_first_base_replacement): New | |
54537 | function. | |
54538 | (ipa_param_body_adjustments::modify_call_stmt): Use | |
54539 | lookup_first_base_replacement. | |
54540 | * omp-simd-clone.cc (ipa_simd_modify_function_body): Call | |
54541 | adjustments->sort_replacements. | |
54542 | ||
54543 | 2023-01-10 Richard Biener <rguenther@suse.de> | |
54544 | ||
54545 | PR tree-optimization/108314 | |
54546 | * tree-vect-stmts.cc (vectorizable_condition): Do not | |
54547 | perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION. | |
54548 | ||
54549 | 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
54550 | ||
54551 | * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New. | |
54552 | ||
54553 | 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
54554 | ||
54555 | * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option. | |
54556 | ||
54557 | 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
54558 | ||
54559 | * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin | |
54560 | defines for soft float abi. | |
54561 | ||
54562 | 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
54563 | ||
54564 | * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1). | |
54565 | (smart_bclri): Likewise. | |
54566 | (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2). | |
54567 | (fast_bclri): Likewise. | |
54568 | (fast_cmpnesi_i): Likewise. | |
54569 | (*fast_cmpltsi_i): Likewise. | |
54570 | (*fast_cmpgeusi_i): Likewise. | |
54571 | ||
54572 | 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com> | |
54573 | ||
54574 | * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test | |
54575 | flag_fp_int_builtin_inexact || !flag_trapping_math. | |
54576 | (<frm_pattern><mode>2): Likewise. | |
54577 | ||
54578 | 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com> | |
54579 | ||
54580 | * config/s390/s390.cc (s390_register_info): Check call_used_regs | |
54581 | instead of hard-coding the register numbers for call saved | |
54582 | registers. | |
54583 | (s390_optimize_register_info): Likewise. | |
54584 | ||
54585 | 2023-01-09 Eric Botcazou <ebotcazou@adacore.com> | |
54586 | ||
54587 | * doc/gm2.texi (Overview): Fix @node markers. | |
54588 | (Using): Likewise. Remove subsections that were moved to Overview | |
54589 | from the menu and move others around. | |
54590 | ||
54591 | 2023-01-09 Richard Biener <rguenther@suse.de> | |
54592 | ||
54593 | PR middle-end/108209 | |
54594 | * genmatch.cc (commutative_op): Fix return value for | |
54595 | user-id with non-commutative first replacement. | |
54596 | ||
54597 | 2023-01-09 Jakub Jelinek <jakub@redhat.com> | |
54598 | ||
54599 | PR target/107453 | |
54600 | * calls.cc (expand_call): For calls with | |
54601 | TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args. | |
54602 | Formatting fix. | |
54603 | ||
54604 | 2023-01-09 Richard Biener <rguenther@suse.de> | |
54605 | ||
54606 | PR middle-end/69482 | |
54607 | * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile | |
54608 | qualified accesses also force objects to memory. | |
54609 | ||
54610 | 2023-01-09 Martin Liska <mliska@suse.cz> | |
54611 | ||
54612 | PR lto/108330 | |
54613 | * lto-cgraph.cc (compute_ltrans_boundary): Do not insert | |
54614 | NULL (deleleted value) to a hash_set. | |
54615 | ||
54616 | 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54617 | ||
54618 | * config/xtensa/xtensa.md (*splice_bits): | |
54619 | New insn_and_split pattern. | |
54620 | ||
54621 | 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | |
54622 | ||
54623 | * config/xtensa/xtensa.cc | |
54624 | (xtensa_split_imm_two_addends, xtensa_emit_add_imm): | |
54625 | New helper functions. | |
54626 | (xtensa_set_return_address, xtensa_output_mi_thunk): | |
54627 | Change to use the helper function. | |
54628 | (xtensa_emit_adjust_stack_ptr): Ditto. | |
54629 | And also change to try reusing the content of scratch register | |
54630 | A9 if the register is not modified in the function body. | |
54631 | ||
54632 | 2023-01-07 LIU Hao <lh_mouse@126.com> | |
54633 | ||
54634 | PR middle-end/108300 | |
54635 | * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN` | |
54636 | before <windows.h>. | |
54637 | * diagnostic-color.cc: Likewise. | |
54638 | * plugin.cc: Likewise. | |
54639 | * prefix.cc: Likewise. | |
54640 | ||
54641 | 2023-01-06 Joseph Myers <joseph@codesourcery.com> | |
54642 | ||
54643 | * doc/extend.texi (__builtin_tgmath): Do not restate standard rule | |
54644 | for handling real integer types. | |
54645 | ||
54646 | 2023-01-06 Tamar Christina <tamar.christina@arm.com> | |
54647 | ||
54648 | Revert: | |
54649 | 2022-12-12 Tamar Christina <tamar.christina@arm.com> | |
54650 | ||
54651 | * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New. | |
54652 | (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>, | |
54653 | aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>, | |
54654 | @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>, | |
54655 | reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>, | |
54656 | aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>, | |
54657 | vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF. | |
54658 | (aarch64_simd_dupv2hf): New. | |
54659 | * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): | |
54660 | Add E_V2HFmode. | |
54661 | * config/aarch64/iterators.md (VHSDF_P): New. | |
54662 | (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL, | |
54663 | Vel, q, vp): Add V2HF. | |
54664 | * config/arm/types.md (neon_fp_reduc_add_h): New. | |
54665 | ||
54666 | 2023-01-06 Martin Liska <mliska@suse.cz> | |
54667 | ||
54668 | PR middle-end/107966 | |
54669 | * doc/options.texi: Fix Var documentation in internal manual. | |
54670 | ||
54671 | 2023-01-05 Roger Sayle <roger@nextmovesoftware.com> | |
54672 | ||
54673 | Revert: | |
54674 | 2023-01-03 Roger Sayle <roger@nextmovesoftware.com> | |
54675 | ||
54676 | * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite | |
54677 | RTL expansion to allow condition (mask) to be shared/reused, | |
54678 | by avoiding overwriting pseudos and adding REG_EQUAL notes. | |
54679 | ||
54680 | 2023-01-05 Iain Sandoe <iain@sandoe.co.uk> | |
54681 | ||
54682 | * common.opt: Add -static-libgm2. | |
54683 | * config/darwin.h (LINK_SPEC): Handle static-libgm2. | |
54684 | * doc/gm2.texi: Document static-libgm2. | |
54685 | * gcc.cc (driver_handle_option): Allow static-libgm2. | |
54686 | ||
54687 | 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com> | |
54688 | ||
54689 | * common/config/i386/i386-common.cc (processor_alias_table): | |
54690 | Use CPU_ZNVER4 for znver4. | |
54691 | * config/i386/i386.md: Add znver4.md. | |
54692 | * config/i386/znver4.md: New. | |
54693 | ||
54694 | 2023-01-04 Jakub Jelinek <jakub@redhat.com> | |
54695 | ||
54696 | PR tree-optimization/108253 | |
54697 | * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer | |
54698 | types. | |
54699 | ||
54700 | 2023-01-04 Jakub Jelinek <jakub@redhat.com> | |
54701 | ||
54702 | PR middle-end/108237 | |
54703 | * generic-match-head.cc: Include tree-pass.h. | |
54704 | (canonicalize_math_p, optimize_vectors_before_lowering_p): Define | |
54705 | to false if cfun and cfun->curr_properties has PROP_gimple_opt_math | |
54706 | resp. PROP_gimple_lvec property set. | |
54707 | ||
54708 | 2023-01-04 Jakub Jelinek <jakub@redhat.com> | |
54709 | ||
54710 | PR sanitizer/108256 | |
54711 | * convert.cc (do_narrow): Punt for MULT_EXPR if original | |
54712 | type doesn't wrap around and -fsanitize=signed-integer-overflow | |
54713 | is on. | |
54714 | * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise. | |
54715 | ||
54716 | 2023-01-04 Hu, Lin1 <lin1.hu@intel.com> | |
54717 | ||
54718 | * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids. | |
54719 | * common/config/i386/i386-common.cc: Add Emeraldrapids. | |
54720 | ||
54721 | 2023-01-04 Hu, Lin1 <lin1.hu@intel.com> | |
54722 | ||
54723 | * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5 | |
54724 | for meteorlake. | |
54725 | ||
54726 | 2023-01-03 Sandra Loosemore <sandra@codesourcery.com> | |
54727 | ||
54728 | * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify | |
54729 | default constructor to initialize it. | |
54730 | * cgraphunit.cc (expand_all_functions): Save gc_candidate functions | |
54731 | for last and iterate to handle recursive calls. Delete leftover | |
54732 | candidates at the end. | |
54733 | * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit | |
54734 | on local clones. | |
54735 | * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear | |
54736 | gc_candidate bit when a clone is used. | |
54737 | ||
54738 | 2023-01-03 Florian Weimer <fweimer@redhat.com> | |
54739 | ||
54740 | Revert: | |
54741 | 2023-01-02 Florian Weimer <fweimer@redhat.com> | |
54742 | ||
54743 | * dwarf2cfi.cc (init_return_column_size): Remove. | |
54744 | (init_one_dwarf_reg_size): Adjust. | |
54745 | (generate_dwarf_reg_sizes): New function. Extracted | |
54746 | from expand_builtin_init_dwarf_reg_sizes. | |
54747 | (expand_builtin_init_dwarf_reg_sizes): Call | |
54748 | generate_dwarf_reg_sizes. | |
54749 | * target.def (init_dwarf_reg_sizes_extra): Adjust | |
54750 | hook signature. | |
54751 | * config/msp430/msp430.cc | |
54752 | (msp430_init_dwarf_reg_sizes_extra): Adjust. | |
54753 | * config/rs6000/rs6000.cc | |
54754 | (rs6000_init_dwarf_reg_sizes_extra): Likewise. | |
54755 | * doc/tm.texi: Update. | |
54756 | ||
54757 | 2023-01-03 Florian Weimer <fweimer@redhat.com> | |
54758 | ||
54759 | Revert: | |
54760 | 2023-01-02 Florian Weimer <fweimer@redhat.com> | |
54761 | ||
54762 | * debug.h (dwarf_reg_sizes_constant): Declare. | |
54763 | * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function. | |
54764 | ||
54765 | 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org> | |
54766 | ||
54767 | PR tree-optimization/105043 | |
54768 | * doc/extend.texi (Object Size Checking): Split out into two | |
54769 | subsections and mention _FORTIFY_SOURCE. | |
54770 | ||
54771 | 2023-01-03 Roger Sayle <roger@nextmovesoftware.com> | |
54772 | ||
54773 | * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite | |
54774 | RTL expansion to allow condition (mask) to be shared/reused, | |
54775 | by avoiding overwriting pseudos and adding REG_EQUAL notes. | |
54776 | ||
54777 | 2023-01-03 Roger Sayle <roger@nextmovesoftware.com> | |
54778 | ||
54779 | PR target/108229 | |
54780 | * config/i386/i386-features.cc | |
54781 | (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider | |
54782 | the gain/cost of converting a MEM operand. | |
54783 | ||
54784 | 2023-01-03 Jakub Jelinek <jakub@redhat.com> | |
54785 | ||
54786 | PR middle-end/108264 | |
54787 | * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets | |
54788 | from source which doesn't have scalar integral mode first convert | |
54789 | it to outer_mode. | |
54790 | ||
54791 | 2023-01-03 Jakub Jelinek <jakub@redhat.com> | |
54792 | ||
54793 | PR rtl-optimization/108263 | |
54794 | * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect | |
54795 | asm goto to EXIT. | |
54796 | ||
54797 | 2023-01-02 Alexander Monakov <amonakov@ispras.ru> | |
54798 | ||
54799 | PR target/87832 | |
54800 | * config/i386/lujiazui.md (lujiazui_div): New automaton. | |
54801 | (lua_div): New unit. | |
54802 | (lua_idiv_qi): Correct unit in the reservation. | |
54803 | (lua_idiv_qi_load): Ditto. | |
54804 | (lua_idiv_hi): Ditto. | |
54805 | (lua_idiv_hi_load): Ditto. | |
54806 | (lua_idiv_si): Ditto. | |
54807 | (lua_idiv_si_load): Ditto. | |
54808 | (lua_idiv_di): Ditto. | |
54809 | (lua_idiv_di_load): Ditto. | |
54810 | (lua_fdiv_SF): Ditto. | |
54811 | (lua_fdiv_SF_load): Ditto. | |
54812 | (lua_fdiv_DF): Ditto. | |
54813 | (lua_fdiv_DF_load): Ditto. | |
54814 | (lua_fdiv_XF): Ditto. | |
54815 | (lua_fdiv_XF_load): Ditto. | |
54816 | (lua_ssediv_SF): Ditto. | |
54817 | (lua_ssediv_load_SF): Ditto. | |
54818 | (lua_ssediv_V4SF): Ditto. | |
54819 | (lua_ssediv_load_V4SF): Ditto. | |
54820 | (lua_ssediv_V8SF): Ditto. | |
54821 | (lua_ssediv_load_V8SF): Ditto. | |
54822 | (lua_ssediv_SD): Ditto. | |
54823 | (lua_ssediv_load_SD): Ditto. | |
54824 | (lua_ssediv_V2DF): Ditto. | |
54825 | (lua_ssediv_load_V2DF): Ditto. | |
54826 | (lua_ssediv_V4DF): Ditto. | |
54827 | (lua_ssediv_load_V4DF): Ditto. | |
54828 | ||
54829 | 2023-01-02 Florian Weimer <fweimer@redhat.com> | |
54830 | ||
54831 | * debug.h (dwarf_reg_sizes_constant): Declare. | |
54832 | * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function. | |
54833 | ||
54834 | 2023-01-02 Florian Weimer <fweimer@redhat.com> | |
54835 | ||
54836 | * dwarf2cfi.cc (init_return_column_size): Remove. | |
54837 | (init_one_dwarf_reg_size): Adjust. | |
54838 | (generate_dwarf_reg_sizes): New function. Extracted | |
54839 | from expand_builtin_init_dwarf_reg_sizes. | |
54840 | (expand_builtin_init_dwarf_reg_sizes): Call | |
54841 | generate_dwarf_reg_sizes. | |
54842 | * target.def (init_dwarf_reg_sizes_extra): Adjust | |
54843 | hook signature. | |
54844 | * config/msp430/msp430.cc | |
54845 | (msp430_init_dwarf_reg_sizes_extra): Adjust. | |
54846 | * config/rs6000/rs6000.cc | |
54847 | (rs6000_init_dwarf_reg_sizes_extra): Likewise. | |
54848 | * doc/tm.texi: Update. | |
54849 | ||
54850 | 2023-01-02 Jakub Jelinek <jakub@redhat.com> | |
54851 | ||
54852 | * gcc.cc (process_command): Update copyright notice dates. | |
54853 | * gcov-dump.cc (print_version): Ditto. | |
54854 | * gcov.cc (print_version): Ditto. | |
54855 | * gcov-tool.cc (print_version): Ditto. | |
54856 | * gengtype.cc (create_file): Ditto. | |
54857 | * doc/cpp.texi: Bump @copying's copyright year. | |
54858 | * doc/cppinternals.texi: Ditto. | |
54859 | * doc/gcc.texi: Ditto. | |
54860 | * doc/gccint.texi: Ditto. | |
54861 | * doc/gcov.texi: Ditto. | |
54862 | * doc/install.texi: Ditto. | |
54863 | * doc/invoke.texi: Ditto. | |
54864 | ||
54865 | 2023-01-01 Roger Sayle <roger@nextmovesoftware.com> | |
54866 | Uroš Bizjak <ubizjak@gmail.com> | |
54867 | ||
54868 | * config/i386/i386.md (extendditi2): New define_insn. | |
54869 | (define_split): Use DWIH mode iterator to treat new extendditi2 | |
54870 | identically to existing extendsidi2_1. | |
54871 | (define_peephole2): Likewise. | |
54872 | (define_peephole2): Likewise. | |
54873 | (define_Split): Likewise. | |
54874 | ||
54875 | \f | |
54876 | Copyright (C) 2023 Free Software Foundation, Inc. | |
54877 | ||
54878 | Copying and distribution of this file, with or without modification, | |
54879 | are permitted in any medium without royalty provided the copyright | |
54880 | notice and this notice are preserved. |