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9ae8ffe7 1/* Alias analysis for GNU C
3d994c6b 2 Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
9ae8ffe7
JL
3 Contributed by John Carr (jfc@mit.edu).
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#include "config.h"
670ee920 23#include "system.h"
9ae8ffe7 24#include "rtl.h"
7790df19 25#include "tree.h"
6baf1cc8 26#include "tm_p.h"
49ad7cfa 27#include "function.h"
ac606739 28#include "insn-flags.h"
9ae8ffe7
JL
29#include "expr.h"
30#include "regs.h"
31#include "hard-reg-set.h"
32#include "flags.h"
264fac34 33#include "output.h"
2e107e9e 34#include "toplev.h"
eab5c70a 35#include "cselib.h"
3932261a 36#include "splay-tree.h"
ac606739 37#include "ggc.h"
3932261a
MM
38
39/* The alias sets assigned to MEMs assist the back-end in determining
40 which MEMs can alias which other MEMs. In general, two MEMs in
ac3d9668
RK
41 different alias sets cannot alias each other, with one important
42 exception. Consider something like:
3932261a
MM
43
44 struct S {int i; double d; };
45
46 a store to an `S' can alias something of either type `int' or type
47 `double'. (However, a store to an `int' cannot alias a `double'
48 and vice versa.) We indicate this via a tree structure that looks
49 like:
50 struct S
51 / \
52 / \
53 |/_ _\|
54 int double
55
ac3d9668
RK
56 (The arrows are directed and point downwards.)
57 In this situation we say the alias set for `struct S' is the
58 `superset' and that those for `int' and `double' are `subsets'.
59
3bdf5ad1
RK
60 To see whether two alias sets can point to the same memory, we must
61 see if either alias set is a subset of the other. We need not trace
62 past immediate decendents, however, since we propagate all
63 grandchildren up one level.
3932261a
MM
64
65 Alias set zero is implicitly a superset of all other alias sets.
66 However, this is no actual entry for alias set zero. It is an
67 error to attempt to explicitly construct a subset of zero. */
68
d4b60170
RK
69typedef struct alias_set_entry
70{
3932261a 71 /* The alias set number, as stored in MEM_ALIAS_SET. */
3bdf5ad1 72 HOST_WIDE_INT alias_set;
3932261a
MM
73
74 /* The children of the alias set. These are not just the immediate
ac3d9668 75 children, but, in fact, all decendents. So, if we have:
3932261a
MM
76
77 struct T { struct S s; float f; }
78
79 continuing our example above, the children here will be all of
80 `int', `double', `float', and `struct S'. */
81 splay_tree children;
d4b60170 82} *alias_set_entry;
9ae8ffe7 83
3bdf5ad1
RK
84/* The language-specific function for alias analysis. If NULL, the
85 language does not do any special alias analysis. */
86HOST_WIDE_INT (*lang_get_alias_set) PARAMS ((tree));
87
3d994c6b
KG
88static int rtx_equal_for_memref_p PARAMS ((rtx, rtx));
89static rtx find_symbolic_term PARAMS ((rtx));
eab5c70a 90static rtx get_addr PARAMS ((rtx));
3d994c6b
KG
91static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx,
92 HOST_WIDE_INT));
93static void record_set PARAMS ((rtx, rtx, void *));
94static rtx find_base_term PARAMS ((rtx));
95static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode,
96 enum machine_mode));
97static rtx find_base_value PARAMS ((rtx));
98static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx));
99static int insert_subset_children PARAMS ((splay_tree_node, void*));
3bdf5ad1
RK
100static tree find_base_decl PARAMS ((tree));
101static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT));
eab5c70a 102static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx,
3bdf5ad1 103 int (*) (rtx)));
3d994c6b
KG
104static int aliases_everything_p PARAMS ((rtx));
105static int write_dependence_p PARAMS ((rtx, rtx, int));
106static int nonlocal_reference_p PARAMS ((rtx));
9ae8ffe7
JL
107
108/* Set up all info needed to perform alias analysis on memory references. */
109
d4b60170 110/* Returns the size in bytes of the mode of X. */
9ae8ffe7
JL
111#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
112
41472af8 113/* Returns nonzero if MEM1 and MEM2 do not alias because they are in
264fac34
MM
114 different alias sets. We ignore alias sets in functions making use
115 of variable arguments because the va_arg macros on some systems are
116 not legal ANSI C. */
117#define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
3932261a 118 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
41472af8 119
ea64ef27 120/* Cap the number of passes we make over the insns propagating alias
ac3d9668 121 information through set chains. 10 is a completely arbitrary choice. */
ea64ef27
JL
122#define MAX_ALIAS_LOOP_PASSES 10
123
9ae8ffe7
JL
124/* reg_base_value[N] gives an address to which register N is related.
125 If all sets after the first add or subtract to the current value
126 or otherwise modify it so it does not point to a different top level
127 object, reg_base_value[N] is equal to the address part of the source
2a2c8203
JC
128 of the first set.
129
130 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
131 expressions represent certain special values: function arguments and
b3b5ad95
JL
132 the stack, frame, and argument pointers.
133
134 The contents of an ADDRESS is not normally used, the mode of the
135 ADDRESS determines whether the ADDRESS is a function argument or some
136 other special value. Pointer equality, not rtx_equal_p, determines whether
137 two ADDRESS expressions refer to the same base address.
138
139 The only use of the contents of an ADDRESS is for determining if the
140 current function performs nonlocal memory memory references for the
141 purposes of marking the function as a constant function. */
2a2c8203 142
ac606739
GS
143static rtx *reg_base_value;
144static rtx *new_reg_base_value;
d4b60170
RK
145static unsigned int reg_base_value_size; /* size of reg_base_value array */
146
9ae8ffe7 147#define REG_BASE_VALUE(X) \
3bdf5ad1 148 (REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0)
9ae8ffe7 149
de12be17
JC
150/* Vector of known invariant relationships between registers. Set in
151 loop unrolling. Indexed by register number, if nonzero the value
152 is an expression describing this register in terms of another.
153
154 The length of this array is REG_BASE_VALUE_SIZE.
155
156 Because this array contains only pseudo registers it has no effect
157 after reload. */
158static rtx *alias_invariant;
159
c13e8210
MM
160/* Vector indexed by N giving the initial (unchanging) value known for
161 pseudo-register N. This array is initialized in
162 init_alias_analysis, and does not change until end_alias_analysis
163 is called. */
9ae8ffe7
JL
164rtx *reg_known_value;
165
166/* Indicates number of valid entries in reg_known_value. */
770ae6cc 167static unsigned int reg_known_value_size;
9ae8ffe7
JL
168
169/* Vector recording for each reg_known_value whether it is due to a
170 REG_EQUIV note. Future passes (viz., reload) may replace the
171 pseudo with the equivalent expression and so we account for the
ac3d9668
RK
172 dependences that would be introduced if that happens.
173
174 The REG_EQUIV notes created in assign_parms may mention the arg
175 pointer, and there are explicit insns in the RTL that modify the
176 arg pointer. Thus we must ensure that such insns don't get
177 scheduled across each other because that would invalidate the
178 REG_EQUIV notes. One could argue that the REG_EQUIV notes are
179 wrong, but solving the problem in the scheduler will likely give
180 better code, so we do it here. */
9ae8ffe7
JL
181char *reg_known_equiv_p;
182
2a2c8203
JC
183/* True when scanning insns from the start of the rtl to the
184 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7
JL
185static int copying_arguments;
186
3932261a 187/* The splay-tree used to store the various alias set entries. */
3932261a 188static splay_tree alias_sets;
ac3d9668 189\f
3932261a
MM
190/* Returns a pointer to the alias set entry for ALIAS_SET, if there is
191 such an entry, or NULL otherwise. */
192
193static alias_set_entry
194get_alias_set_entry (alias_set)
3bdf5ad1 195 HOST_WIDE_INT alias_set;
3932261a 196{
d4b60170
RK
197 splay_tree_node sn
198 = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
3932261a 199
d4b60170 200 return sn != 0 ? ((alias_set_entry) sn->value) : 0;
3932261a
MM
201}
202
ac3d9668
RK
203/* Returns nonzero if the alias sets for MEM1 and MEM2 are such that
204 the two MEMs cannot alias each other. */
3932261a
MM
205
206static int
207mems_in_disjoint_alias_sets_p (mem1, mem2)
208 rtx mem1;
209 rtx mem2;
210{
211 alias_set_entry ase;
212
213#ifdef ENABLE_CHECKING
214/* Perform a basic sanity check. Namely, that there are no alias sets
215 if we're not using strict aliasing. This helps to catch bugs
216 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
217 where a MEM is allocated in some way other than by the use of
218 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
219 use alias sets to indicate that spilled registers cannot alias each
220 other, we might need to remove this check. */
d4b60170
RK
221 if (! flag_strict_aliasing
222 && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0))
3932261a
MM
223 abort ();
224#endif
225
226 /* The code used in varargs macros are often not conforming ANSI C,
227 which can trick the compiler into making incorrect aliasing
228 assumptions in these functions. So, we don't use alias sets in
229 such a function. FIXME: This should be moved into the front-end;
230 it is a language-dependent notion, and there's no reason not to
231 still use these checks to handle globals. */
232 if (current_function_stdarg || current_function_varargs)
233 return 0;
234
d4b60170
RK
235 /* If have no alias set information for one of the MEMs, we have to assume
236 it can alias anything. */
237 if (MEM_ALIAS_SET (mem1) == 0 || MEM_ALIAS_SET (mem2) == 0)
3932261a
MM
238 return 0;
239
d4b60170 240 /* If the two alias sets are the same, they may alias. */
3932261a 241 if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2))
3932261a
MM
242 return 0;
243
3bdf5ad1 244 /* See if the first alias set is a subset of the second. */
3932261a 245 ase = get_alias_set_entry (MEM_ALIAS_SET (mem1));
d4b60170
RK
246 if (ase != 0 && splay_tree_lookup (ase->children,
247 (splay_tree_key) MEM_ALIAS_SET (mem2)))
3932261a
MM
248 return 0;
249
250 /* Now do the same, but with the alias sets reversed. */
251 ase = get_alias_set_entry (MEM_ALIAS_SET (mem2));
d4b60170
RK
252 if (ase != 0 && splay_tree_lookup (ase->children,
253 (splay_tree_key) MEM_ALIAS_SET (mem1)))
3932261a
MM
254 return 0;
255
256 /* The two MEMs are in distinct alias sets, and neither one is the
257 child of the other. Therefore, they cannot alias. */
258 return 1;
259}
260
261/* Insert the NODE into the splay tree given by DATA. Used by
262 record_alias_subset via splay_tree_foreach. */
263
264static int
265insert_subset_children (node, data)
266 splay_tree_node node;
267 void *data;
268{
d4b60170 269 splay_tree_insert ((splay_tree) data, node->key, node->value);
3932261a
MM
270
271 return 0;
272}
3bdf5ad1
RK
273\f
274/* T is an expression with pointer type. Find the DECL on which this
275 expression is based. (For example, in `a[i]' this would be `a'.)
276 If there is no such DECL, or a unique decl cannot be determined,
277 NULL_TREE is retured. */
278
279static tree
280find_base_decl (t)
281 tree t;
282{
283 tree d0, d1, d2;
284
285 if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t)))
286 return 0;
287
288 /* If this is a declaration, return it. */
289 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd')
290 return t;
291
292 /* Handle general expressions. It would be nice to deal with
293 COMPONENT_REFs here. If we could tell that `a' and `b' were the
294 same, then `a->f' and `b->f' are also the same. */
295 switch (TREE_CODE_CLASS (TREE_CODE (t)))
296 {
297 case '1':
298 return find_base_decl (TREE_OPERAND (t, 0));
299
300 case '2':
301 /* Return 0 if found in neither or both are the same. */
302 d0 = find_base_decl (TREE_OPERAND (t, 0));
303 d1 = find_base_decl (TREE_OPERAND (t, 1));
304 if (d0 == d1)
305 return d0;
306 else if (d0 == 0)
307 return d1;
308 else if (d1 == 0)
309 return d0;
310 else
311 return 0;
312
313 case '3':
314 d0 = find_base_decl (TREE_OPERAND (t, 0));
315 d1 = find_base_decl (TREE_OPERAND (t, 1));
316 d0 = find_base_decl (TREE_OPERAND (t, 0));
317 d2 = find_base_decl (TREE_OPERAND (t, 2));
318
319 /* Set any nonzero values from the last, then from the first. */
320 if (d1 == 0) d1 = d2;
321 if (d0 == 0) d0 = d1;
322 if (d1 == 0) d1 = d0;
323 if (d2 == 0) d2 = d1;
324
325 /* At this point all are nonzero or all are zero. If all three are the
326 same, return it. Otherwise, return zero. */
327 return (d0 == d1 && d1 == d2) ? d0 : 0;
328
329 default:
330 return 0;
331 }
332}
333
334/* Return the alias set for T, which may be either a type or an
335 expression. Call language-specific routine for help, if needed. */
336
337HOST_WIDE_INT
338get_alias_set (t)
339 tree t;
340{
341 HOST_WIDE_INT set;
342 HOST_WIDE_INT bitsize, bitpos;
343 tree offset;
344 enum machine_mode mode;
345 int volatilep, unsignedp;
346 unsigned int alignment;
347
348 /* If we're not doing any alias analysis, just assume everything
349 aliases everything else. Also return 0 if this or its type is
350 an error. */
351 if (! flag_strict_aliasing || t == error_mark_node
352 || (! TYPE_P (t)
353 && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node)))
354 return 0;
355
356 /* We can be passed either an expression or a type. This and the
357 language-specific routine may make mutually-recursive calls to
358 each other to figure out what to do. At each juncture, we see if
359 this is a tree that the language may need to handle specially.
360 But first remove nops since we care only about the actual object. */
361 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
362 || TREE_CODE (t) == NON_LVALUE_EXPR)
363 t = TREE_OPERAND (t, 0);
364
365 /* Now give the language a chance to do something. */
366 if (lang_get_alias_set != 0
367 && (set = (*lang_get_alias_set) (t)) != -1)
368 return set;
369
370 /* If this is a reference, go inside it and use the underlying object. */
371 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'r')
372 t = get_inner_reference (t, &bitsize, &bitpos, &offset, &mode,
373 &unsignedp, &volatilep, &alignment);
374
375 if (TREE_CODE (t) == INDIRECT_REF)
376 {
377 /* Check for accesses through restrict-qualified pointers. */
378 tree decl = find_base_decl (TREE_OPERAND (t, 0));
379
380 if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl))
381 /* We use the alias set indicated in the declaration. */
382 return DECL_POINTER_ALIAS_SET (decl);
383
384 /* If we have an INDIRECT_REF via a void pointer, we don't know anything
385 about what that might alias. */
386 if (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE)
387 return 0;
388 }
389
390 /* Give the language another chance to do something special. */
391 if (lang_get_alias_set != 0
392 && (set = (*lang_get_alias_set) (t)) != -1)
393 return set;
394
395 /* Now we are done with expressions, so get the type if this isn't
396 a type. */
397 if (! TYPE_P (t))
398 t = TREE_TYPE (t);
399
400 /* Variant qualifiers don't affect the alias set, so get the main
401 variant. If this is a type with a known alias set, return it. */
402 t = TYPE_MAIN_VARIANT (t);
403 if (TYPE_P (t) && TYPE_ALIAS_SET_KNOWN_P (t))
404 return TYPE_ALIAS_SET (t);
405
406 /* See if the language has special handling for this type. */
407 if (lang_get_alias_set != 0
408 && (set = (*lang_get_alias_set) (t)) != -1)
409 ;
410 /* There are no objects of FUNCTION_TYPE, so there's no point in
411 using up an alias set for them. (There are, of course, pointers
412 and references to functions, but that's different.) */
413 else if (TREE_CODE (t) == FUNCTION_TYPE)
414 set = 0;
415 else
416 /* Otherwise make a new alias set for this type. */
417 set = new_alias_set ();
418
419 TYPE_ALIAS_SET (t) = set;
420 return set;
421}
422
423/* Return a brand-new alias set. */
424
425HOST_WIDE_INT
426new_alias_set ()
427{
428 static HOST_WIDE_INT last_alias_set;
429
430 if (flag_strict_aliasing)
431 return ++last_alias_set;
432 else
433 return 0;
434}
3932261a
MM
435
436/* Indicate that things in SUBSET can alias things in SUPERSET, but
437 not vice versa. For example, in C, a store to an `int' can alias a
438 structure containing an `int', but not vice versa. Here, the
439 structure would be the SUPERSET and `int' the SUBSET. This
a0c33338 440 function should be called only once per SUPERSET/SUBSET pair.
3932261a
MM
441
442 It is illegal for SUPERSET to be zero; everything is implicitly a
443 subset of alias set zero. */
444
445void
446record_alias_subset (superset, subset)
3bdf5ad1
RK
447 HOST_WIDE_INT superset;
448 HOST_WIDE_INT subset;
3932261a
MM
449{
450 alias_set_entry superset_entry;
451 alias_set_entry subset_entry;
452
453 if (superset == 0)
454 abort ();
455
456 superset_entry = get_alias_set_entry (superset);
d4b60170 457 if (superset_entry == 0)
3932261a
MM
458 {
459 /* Create an entry for the SUPERSET, so that we have a place to
460 attach the SUBSET. */
d4b60170
RK
461 superset_entry
462 = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
3932261a
MM
463 superset_entry->alias_set = superset;
464 superset_entry->children
30f72379 465 = splay_tree_new (splay_tree_compare_ints, 0, 0);
d4b60170 466 splay_tree_insert (alias_sets, (splay_tree_key) superset,
3932261a
MM
467 (splay_tree_value) superset_entry);
468
469 }
470
471 subset_entry = get_alias_set_entry (subset);
d4b60170
RK
472
473 /* If there is an entry for the subset, enter all of its children
474 (if they are not already present) as children of the SUPERSET. */
3932261a 475 if (subset_entry)
3932261a 476 splay_tree_foreach (subset_entry->children,
973838fd 477 insert_subset_children,
3932261a
MM
478 superset_entry->children);
479
480 /* Enter the SUBSET itself as a child of the SUPERSET. */
481 splay_tree_insert (superset_entry->children,
d4b60170 482 (splay_tree_key) subset, 0);
3932261a
MM
483}
484
a0c33338
RK
485/* Record that component types of TYPE, if any, are part of that type for
486 aliasing purposes. For record types, we only record component types
487 for fields that are marked addressable. For array types, we always
488 record the component types, so the front end should not call this
489 function if the individual component aren't addressable. */
490
491void
492record_component_aliases (type)
493 tree type;
494{
3bdf5ad1
RK
495 HOST_WIDE_INT superset = get_alias_set (type);
496 HOST_WIDE_INT subset;
a0c33338
RK
497 tree field;
498
499 if (superset == 0)
500 return;
501
502 switch (TREE_CODE (type))
503 {
504 case ARRAY_TYPE:
a0c33338
RK
505 subset = get_alias_set (TREE_TYPE (type));
506 if (subset != 0)
507 record_alias_subset (superset, subset);
508 break;
509
510 case RECORD_TYPE:
511 case UNION_TYPE:
512 case QUAL_UNION_TYPE:
513 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
514 {
515 subset = get_alias_set (TREE_TYPE (field));
516 if (TREE_ADDRESSABLE (field) && subset != 0 && subset != superset)
517 record_alias_subset (superset, subset);
518 }
519 break;
520
521 default:
522 break;
523 }
524}
525
3bdf5ad1
RK
526/* Allocate an alias set for use in storing and reading from the varargs
527 spill area. */
528
529HOST_WIDE_INT
530get_varargs_alias_set ()
531{
532 static HOST_WIDE_INT set = -1;
533
534 if (set == -1)
535 set = new_alias_set ();
536
537 return set;
538}
539
540/* Likewise, but used for the fixed portions of the frame, e.g., register
541 save areas. */
542
543HOST_WIDE_INT
544get_frame_alias_set ()
545{
546 static HOST_WIDE_INT set = -1;
547
548 if (set == -1)
549 set = new_alias_set ();
550
551 return set;
552}
553
2a2c8203
JC
554/* Inside SRC, the source of a SET, find a base address. */
555
9ae8ffe7
JL
556static rtx
557find_base_value (src)
558 register rtx src;
559{
560 switch (GET_CODE (src))
561 {
562 case SYMBOL_REF:
563 case LABEL_REF:
564 return src;
565
566 case REG:
d4b60170 567 /* At the start of a function, argument registers have known base
2a2c8203
JC
568 values which may be lost later. Returning an ADDRESS
569 expression here allows optimization based on argument values
570 even when the argument registers are used for other purposes. */
571 if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments)
ec907dd8 572 return new_reg_base_value[REGNO (src)];
73774bc7 573
eaf407a5
JL
574 /* If a pseudo has a known base value, return it. Do not do this
575 for hard regs since it can result in a circular dependency
576 chain for registers which have values at function entry.
577
578 The test above is not sufficient because the scheduler may move
579 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
580 if (REGNO (src) >= FIRST_PSEUDO_REGISTER
e51712db 581 && (unsigned) REGNO (src) < reg_base_value_size
eaf407a5 582 && reg_base_value[REGNO (src)])
73774bc7
JL
583 return reg_base_value[REGNO (src)];
584
9ae8ffe7
JL
585 return src;
586
587 case MEM:
588 /* Check for an argument passed in memory. Only record in the
589 copying-arguments block; it is too hard to track changes
590 otherwise. */
591 if (copying_arguments
592 && (XEXP (src, 0) == arg_pointer_rtx
593 || (GET_CODE (XEXP (src, 0)) == PLUS
594 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
38a448ca 595 return gen_rtx_ADDRESS (VOIDmode, src);
9ae8ffe7
JL
596 return 0;
597
598 case CONST:
599 src = XEXP (src, 0);
600 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
601 break;
d4b60170
RK
602
603 /* ... fall through ... */
2a2c8203 604
9ae8ffe7
JL
605 case PLUS:
606 case MINUS:
2a2c8203 607 {
ec907dd8
JL
608 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
609
610 /* If either operand is a REG, then see if we already have
611 a known value for it. */
612 if (GET_CODE (src_0) == REG)
613 {
614 temp = find_base_value (src_0);
d4b60170 615 if (temp != 0)
ec907dd8
JL
616 src_0 = temp;
617 }
618
619 if (GET_CODE (src_1) == REG)
620 {
621 temp = find_base_value (src_1);
d4b60170 622 if (temp!= 0)
ec907dd8
JL
623 src_1 = temp;
624 }
2a2c8203 625
d4b60170 626 /* Guess which operand is the base address:
ec907dd8
JL
627 If either operand is a symbol, then it is the base. If
628 either operand is a CONST_INT, then the other is the base. */
d4b60170 629 if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0))
2a2c8203 630 return find_base_value (src_0);
d4b60170 631 else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1))
ec907dd8
JL
632 return find_base_value (src_1);
633
d4b60170 634 /* This might not be necessary anymore:
ec907dd8
JL
635 If either operand is a REG that is a known pointer, then it
636 is the base. */
d4b60170 637 else if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
2a2c8203 638 return find_base_value (src_0);
d4b60170 639 else if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
2a2c8203
JC
640 return find_base_value (src_1);
641
9ae8ffe7 642 return 0;
2a2c8203
JC
643 }
644
645 case LO_SUM:
646 /* The standard form is (lo_sum reg sym) so look only at the
647 second operand. */
648 return find_base_value (XEXP (src, 1));
9ae8ffe7
JL
649
650 case AND:
651 /* If the second operand is constant set the base
652 address to the first operand. */
2a2c8203
JC
653 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
654 return find_base_value (XEXP (src, 0));
9ae8ffe7
JL
655 return 0;
656
de12be17
JC
657 case ZERO_EXTEND:
658 case SIGN_EXTEND: /* used for NT/Alpha pointers */
9ae8ffe7 659 case HIGH:
2a2c8203 660 return find_base_value (XEXP (src, 0));
1d300e19
KG
661
662 default:
663 break;
9ae8ffe7
JL
664 }
665
666 return 0;
667}
668
669/* Called from init_alias_analysis indirectly through note_stores. */
670
d4b60170 671/* While scanning insns to find base values, reg_seen[N] is nonzero if
9ae8ffe7
JL
672 register N has been set in this function. */
673static char *reg_seen;
674
13309a5f
JC
675/* Addresses which are known not to alias anything else are identified
676 by a unique integer. */
ec907dd8
JL
677static int unique_id;
678
2a2c8203 679static void
84832317 680record_set (dest, set, data)
9ae8ffe7 681 rtx dest, set;
84832317 682 void *data ATTRIBUTE_UNUSED;
9ae8ffe7 683{
ac606739 684 register unsigned regno;
9ae8ffe7
JL
685 rtx src;
686
687 if (GET_CODE (dest) != REG)
688 return;
689
690 regno = REGNO (dest);
691
ac606739
GS
692 if (regno >= reg_base_value_size)
693 abort ();
694
9ae8ffe7
JL
695 if (set)
696 {
697 /* A CLOBBER wipes out any old value but does not prevent a previously
698 unset register from acquiring a base address (i.e. reg_seen is not
699 set). */
700 if (GET_CODE (set) == CLOBBER)
701 {
ec907dd8 702 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
703 return;
704 }
705 src = SET_SRC (set);
706 }
707 else
708 {
9ae8ffe7
JL
709 if (reg_seen[regno])
710 {
ec907dd8 711 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
712 return;
713 }
714 reg_seen[regno] = 1;
38a448ca
RH
715 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
716 GEN_INT (unique_id++));
9ae8ffe7
JL
717 return;
718 }
719
720 /* This is not the first set. If the new value is not related to the
721 old value, forget the base value. Note that the following code is
722 not detected:
723 extern int x, y; int *p = &x; p += (&y-&x);
724 ANSI C does not allow computing the difference of addresses
725 of distinct top level objects. */
ec907dd8 726 if (new_reg_base_value[regno])
9ae8ffe7
JL
727 switch (GET_CODE (src))
728 {
2a2c8203 729 case LO_SUM:
9ae8ffe7
JL
730 case PLUS:
731 case MINUS:
732 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 733 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
734 break;
735 case AND:
736 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 737 new_reg_base_value[regno] = 0;
9ae8ffe7 738 break;
9ae8ffe7 739 default:
ec907dd8 740 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
741 break;
742 }
743 /* If this is the first set of a register, record the value. */
744 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
ec907dd8
JL
745 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
746 new_reg_base_value[regno] = find_base_value (src);
9ae8ffe7
JL
747
748 reg_seen[regno] = 1;
749}
750
ac3d9668
RK
751/* Called from loop optimization when a new pseudo-register is
752 created. It indicates that REGNO is being set to VAL. f INVARIANT
753 is true then this value also describes an invariant relationship
754 which can be used to deduce that two registers with unknown values
755 are different. */
d4b60170 756
9ae8ffe7 757void
de12be17 758record_base_value (regno, val, invariant)
ac3d9668 759 unsigned int regno;
9ae8ffe7 760 rtx val;
de12be17 761 int invariant;
9ae8ffe7 762{
ac3d9668 763 if (regno >= reg_base_value_size)
9ae8ffe7 764 return;
de12be17 765
de12be17
JC
766 if (invariant && alias_invariant)
767 alias_invariant[regno] = val;
768
9ae8ffe7
JL
769 if (GET_CODE (val) == REG)
770 {
ac3d9668 771 if (REGNO (val) < reg_base_value_size)
d4b60170
RK
772 reg_base_value[regno] = reg_base_value[REGNO (val)];
773
9ae8ffe7
JL
774 return;
775 }
d4b60170 776
9ae8ffe7
JL
777 reg_base_value[regno] = find_base_value (val);
778}
779
db048faf
MM
780/* Returns a canonical version of X, from the point of view alias
781 analysis. (For example, if X is a MEM whose address is a register,
782 and the register has a known value (say a SYMBOL_REF), then a MEM
783 whose address is the SYMBOL_REF is returned.) */
784
785rtx
9ae8ffe7
JL
786canon_rtx (x)
787 rtx x;
788{
789 /* Recursively look for equivalences. */
790 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
791 && REGNO (x) < reg_known_value_size)
792 return reg_known_value[REGNO (x)] == x
793 ? x : canon_rtx (reg_known_value[REGNO (x)]);
794 else if (GET_CODE (x) == PLUS)
795 {
796 rtx x0 = canon_rtx (XEXP (x, 0));
797 rtx x1 = canon_rtx (XEXP (x, 1));
798
799 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
800 {
801 /* We can tolerate LO_SUMs being offset here; these
802 rtl are used for nothing other than comparisons. */
803 if (GET_CODE (x0) == CONST_INT)
804 return plus_constant_for_output (x1, INTVAL (x0));
805 else if (GET_CODE (x1) == CONST_INT)
806 return plus_constant_for_output (x0, INTVAL (x1));
38a448ca 807 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
9ae8ffe7
JL
808 }
809 }
d4b60170 810
9ae8ffe7
JL
811 /* This gives us much better alias analysis when called from
812 the loop optimizer. Note we want to leave the original
813 MEM alone, but need to return the canonicalized MEM with
814 all the flags with their original values. */
815 else if (GET_CODE (x) == MEM)
816 {
817 rtx addr = canon_rtx (XEXP (x, 0));
d4b60170 818
9ae8ffe7
JL
819 if (addr != XEXP (x, 0))
820 {
38a448ca 821 rtx new = gen_rtx_MEM (GET_MODE (x), addr);
d4b60170 822
c6df88cb 823 MEM_COPY_ATTRIBUTES (new, x);
9ae8ffe7
JL
824 x = new;
825 }
826 }
827 return x;
828}
829
830/* Return 1 if X and Y are identical-looking rtx's.
831
832 We use the data in reg_known_value above to see if two registers with
833 different numbers are, in fact, equivalent. */
834
835static int
836rtx_equal_for_memref_p (x, y)
837 rtx x, y;
838{
839 register int i;
840 register int j;
841 register enum rtx_code code;
6f7d635c 842 register const char *fmt;
9ae8ffe7
JL
843
844 if (x == 0 && y == 0)
845 return 1;
846 if (x == 0 || y == 0)
847 return 0;
d4b60170 848
9ae8ffe7
JL
849 x = canon_rtx (x);
850 y = canon_rtx (y);
851
852 if (x == y)
853 return 1;
854
855 code = GET_CODE (x);
856 /* Rtx's of different codes cannot be equal. */
857 if (code != GET_CODE (y))
858 return 0;
859
860 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
861 (REG:SI x) and (REG:HI x) are NOT equivalent. */
862
863 if (GET_MODE (x) != GET_MODE (y))
864 return 0;
865
db048faf
MM
866 /* Some RTL can be compared without a recursive examination. */
867 switch (code)
868 {
869 case REG:
870 return REGNO (x) == REGNO (y);
871
872 case LABEL_REF:
873 return XEXP (x, 0) == XEXP (y, 0);
874
875 case SYMBOL_REF:
876 return XSTR (x, 0) == XSTR (y, 0);
877
878 case CONST_INT:
879 case CONST_DOUBLE:
880 /* There's no need to compare the contents of CONST_DOUBLEs or
881 CONST_INTs because pointer equality is a good enough
882 comparison for these nodes. */
883 return 0;
884
885 case ADDRESSOF:
886 return (REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0))
887 && XINT (x, 1) == XINT (y, 1));
888
889 default:
890 break;
891 }
9ae8ffe7
JL
892
893 /* For commutative operations, the RTX match if the operand match in any
894 order. Also handle the simple binary and unary cases without a loop. */
895 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
896 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
897 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
898 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
899 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
900 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
901 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
902 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
903 else if (GET_RTX_CLASS (code) == '1')
904 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
905
906 /* Compare the elements. If any pair of corresponding elements
de12be17
JC
907 fail to match, return 0 for the whole things.
908
909 Limit cases to types which actually appear in addresses. */
9ae8ffe7
JL
910
911 fmt = GET_RTX_FORMAT (code);
912 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
913 {
914 switch (fmt[i])
915 {
9ae8ffe7
JL
916 case 'i':
917 if (XINT (x, i) != XINT (y, i))
918 return 0;
919 break;
920
9ae8ffe7
JL
921 case 'E':
922 /* Two vectors must have the same length. */
923 if (XVECLEN (x, i) != XVECLEN (y, i))
924 return 0;
925
926 /* And the corresponding elements must match. */
927 for (j = 0; j < XVECLEN (x, i); j++)
d4b60170
RK
928 if (rtx_equal_for_memref_p (XVECEXP (x, i, j),
929 XVECEXP (y, i, j)) == 0)
9ae8ffe7
JL
930 return 0;
931 break;
932
933 case 'e':
934 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
935 return 0;
936 break;
937
aee21ba9
JL
938 /* This can happen for an asm which clobbers memory. */
939 case '0':
940 break;
941
9ae8ffe7
JL
942 /* It is believed that rtx's at this level will never
943 contain anything but integers and other rtx's,
944 except for within LABEL_REFs and SYMBOL_REFs. */
945 default:
946 abort ();
947 }
948 }
949 return 1;
950}
951
952/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
953 X and return it, or return 0 if none found. */
954
955static rtx
956find_symbolic_term (x)
957 rtx x;
958{
959 register int i;
960 register enum rtx_code code;
6f7d635c 961 register const char *fmt;
9ae8ffe7
JL
962
963 code = GET_CODE (x);
964 if (code == SYMBOL_REF || code == LABEL_REF)
965 return x;
966 if (GET_RTX_CLASS (code) == 'o')
967 return 0;
968
969 fmt = GET_RTX_FORMAT (code);
970 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
971 {
972 rtx t;
973
974 if (fmt[i] == 'e')
975 {
976 t = find_symbolic_term (XEXP (x, i));
977 if (t != 0)
978 return t;
979 }
980 else if (fmt[i] == 'E')
981 break;
982 }
983 return 0;
984}
985
986static rtx
987find_base_term (x)
988 register rtx x;
989{
eab5c70a
BS
990 cselib_val *val;
991 struct elt_loc_list *l;
992
9ae8ffe7
JL
993 switch (GET_CODE (x))
994 {
995 case REG:
996 return REG_BASE_VALUE (x);
997
de12be17
JC
998 case ZERO_EXTEND:
999 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
9ae8ffe7 1000 case HIGH:
6d849a2a
JL
1001 case PRE_INC:
1002 case PRE_DEC:
1003 case POST_INC:
1004 case POST_DEC:
1005 return find_base_term (XEXP (x, 0));
1006
eab5c70a
BS
1007 case VALUE:
1008 val = CSELIB_VAL_PTR (x);
1009 for (l = val->locs; l; l = l->next)
1010 if ((x = find_base_term (l->loc)) != 0)
1011 return x;
1012 return 0;
1013
9ae8ffe7
JL
1014 case CONST:
1015 x = XEXP (x, 0);
1016 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
1017 return 0;
1018 /* fall through */
1019 case LO_SUM:
1020 case PLUS:
1021 case MINUS:
1022 {
3c567fae
JL
1023 rtx tmp1 = XEXP (x, 0);
1024 rtx tmp2 = XEXP (x, 1);
1025
1026 /* This is a litle bit tricky since we have to determine which of
1027 the two operands represents the real base address. Otherwise this
1028 routine may return the index register instead of the base register.
1029
1030 That may cause us to believe no aliasing was possible, when in
1031 fact aliasing is possible.
1032
1033 We use a few simple tests to guess the base register. Additional
1034 tests can certainly be added. For example, if one of the operands
1035 is a shift or multiply, then it must be the index register and the
1036 other operand is the base register. */
1037
1038 /* If either operand is known to be a pointer, then use it
1039 to determine the base term. */
1040 if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1)))
1041 return find_base_term (tmp1);
1042
1043 if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2)))
1044 return find_base_term (tmp2);
1045
1046 /* Neither operand was known to be a pointer. Go ahead and find the
1047 base term for both operands. */
1048 tmp1 = find_base_term (tmp1);
1049 tmp2 = find_base_term (tmp2);
1050
1051 /* If either base term is named object or a special address
1052 (like an argument or stack reference), then use it for the
1053 base term. */
d4b60170 1054 if (tmp1 != 0
3c567fae
JL
1055 && (GET_CODE (tmp1) == SYMBOL_REF
1056 || GET_CODE (tmp1) == LABEL_REF
1057 || (GET_CODE (tmp1) == ADDRESS
1058 && GET_MODE (tmp1) != VOIDmode)))
1059 return tmp1;
1060
d4b60170 1061 if (tmp2 != 0
3c567fae
JL
1062 && (GET_CODE (tmp2) == SYMBOL_REF
1063 || GET_CODE (tmp2) == LABEL_REF
1064 || (GET_CODE (tmp2) == ADDRESS
1065 && GET_MODE (tmp2) != VOIDmode)))
1066 return tmp2;
1067
1068 /* We could not determine which of the two operands was the
1069 base register and which was the index. So we can determine
1070 nothing from the base alias check. */
1071 return 0;
9ae8ffe7
JL
1072 }
1073
1074 case AND:
1075 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
1076 return REG_BASE_VALUE (XEXP (x, 0));
1077 return 0;
1078
1079 case SYMBOL_REF:
1080 case LABEL_REF:
1081 return x;
1082
1083 default:
1084 return 0;
1085 }
1086}
1087
1088/* Return 0 if the addresses X and Y are known to point to different
1089 objects, 1 if they might be pointers to the same object. */
1090
1091static int
56ee9281 1092base_alias_check (x, y, x_mode, y_mode)
9ae8ffe7 1093 rtx x, y;
56ee9281 1094 enum machine_mode x_mode, y_mode;
9ae8ffe7
JL
1095{
1096 rtx x_base = find_base_term (x);
1097 rtx y_base = find_base_term (y);
1098
1c72c7f6
JC
1099 /* If the address itself has no known base see if a known equivalent
1100 value has one. If either address still has no known base, nothing
1101 is known about aliasing. */
1102 if (x_base == 0)
1103 {
1104 rtx x_c;
d4b60170 1105
1c72c7f6
JC
1106 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
1107 return 1;
d4b60170 1108
1c72c7f6
JC
1109 x_base = find_base_term (x_c);
1110 if (x_base == 0)
1111 return 1;
1112 }
9ae8ffe7 1113
1c72c7f6
JC
1114 if (y_base == 0)
1115 {
1116 rtx y_c;
1117 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
1118 return 1;
d4b60170 1119
1c72c7f6
JC
1120 y_base = find_base_term (y_c);
1121 if (y_base == 0)
1122 return 1;
1123 }
1124
1125 /* If the base addresses are equal nothing is known about aliasing. */
1126 if (rtx_equal_p (x_base, y_base))
9ae8ffe7
JL
1127 return 1;
1128
56ee9281
RH
1129 /* The base addresses of the read and write are different expressions.
1130 If they are both symbols and they are not accessed via AND, there is
1131 no conflict. We can bring knowledge of object alignment into play
1132 here. For example, on alpha, "char a, b;" can alias one another,
1133 though "char a; long b;" cannot. */
9ae8ffe7 1134 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f 1135 {
56ee9281
RH
1136 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
1137 return 1;
1138 if (GET_CODE (x) == AND
1139 && (GET_CODE (XEXP (x, 1)) != CONST_INT
1140 || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
1141 return 1;
1142 if (GET_CODE (y) == AND
1143 && (GET_CODE (XEXP (y, 1)) != CONST_INT
1144 || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
1145 return 1;
b2972551
JL
1146 /* Differing symbols never alias. */
1147 return 0;
c02f035f 1148 }
9ae8ffe7
JL
1149
1150 /* If one address is a stack reference there can be no alias:
1151 stack references using different base registers do not alias,
1152 a stack reference can not alias a parameter, and a stack reference
1153 can not alias a global. */
1154 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
1155 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
1156 return 0;
1157
1158 if (! flag_argument_noalias)
1159 return 1;
1160
1161 if (flag_argument_noalias > 1)
1162 return 0;
1163
1164 /* Weak noalias assertion (arguments are distinct, but may match globals). */
1165 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
1166}
1167
eab5c70a
BS
1168/* Convert the address X into something we can use. This is done by returning
1169 it unchanged unless it is a value; in the latter case we call cselib to get
1170 a more useful rtx. */
3bdf5ad1 1171
eab5c70a
BS
1172static rtx
1173get_addr (x)
1174 rtx x;
1175{
1176 cselib_val *v;
1177 struct elt_loc_list *l;
1178
1179 if (GET_CODE (x) != VALUE)
1180 return x;
1181 v = CSELIB_VAL_PTR (x);
1182 for (l = v->locs; l; l = l->next)
1183 if (CONSTANT_P (l->loc))
1184 return l->loc;
1185 for (l = v->locs; l; l = l->next)
1186 if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM)
1187 return l->loc;
1188 if (v->locs)
1189 return v->locs->loc;
1190 return x;
1191}
1192
39cec1ac
MH
1193/* Return the address of the (N_REFS + 1)th memory reference to ADDR
1194 where SIZE is the size in bytes of the memory reference. If ADDR
1195 is not modified by the memory reference then ADDR is returned. */
1196
1197rtx
1198addr_side_effect_eval (addr, size, n_refs)
1199 rtx addr;
1200 int size;
1201 int n_refs;
1202{
1203 int offset = 0;
1204
1205 switch (GET_CODE (addr))
1206 {
1207 case PRE_INC:
1208 offset = (n_refs + 1) * size;
1209 break;
1210 case PRE_DEC:
1211 offset = -(n_refs + 1) * size;
1212 break;
1213 case POST_INC:
1214 offset = n_refs * size;
1215 break;
1216 case POST_DEC:
1217 offset = -n_refs * size;
1218 break;
1219
1220 default:
1221 return addr;
1222 }
1223
1224 if (offset)
1225 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
1226 else
1227 addr = XEXP (addr, 0);
1228
1229 return addr;
1230}
1231
9ae8ffe7
JL
1232/* Return nonzero if X and Y (memory addresses) could reference the
1233 same location in memory. C is an offset accumulator. When
1234 C is nonzero, we are testing aliases between X and Y + C.
1235 XSIZE is the size in bytes of the X reference,
1236 similarly YSIZE is the size in bytes for Y.
1237
1238 If XSIZE or YSIZE is zero, we do not know the amount of memory being
1239 referenced (the reference was BLKmode), so make the most pessimistic
1240 assumptions.
1241
c02f035f
RH
1242 If XSIZE or YSIZE is negative, we may access memory outside the object
1243 being referenced as a side effect. This can happen when using AND to
1244 align memory references, as is done on the Alpha.
1245
9ae8ffe7 1246 Nice to notice that varying addresses cannot conflict with fp if no
0211b6ab 1247 local variables had their addresses taken, but that's too hard now. */
9ae8ffe7 1248
9ae8ffe7
JL
1249static int
1250memrefs_conflict_p (xsize, x, ysize, y, c)
1251 register rtx x, y;
1252 int xsize, ysize;
1253 HOST_WIDE_INT c;
1254{
eab5c70a
BS
1255 if (GET_CODE (x) == VALUE)
1256 x = get_addr (x);
1257 if (GET_CODE (y) == VALUE)
1258 y = get_addr (y);
9ae8ffe7
JL
1259 if (GET_CODE (x) == HIGH)
1260 x = XEXP (x, 0);
1261 else if (GET_CODE (x) == LO_SUM)
1262 x = XEXP (x, 1);
1263 else
39cec1ac 1264 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
9ae8ffe7
JL
1265 if (GET_CODE (y) == HIGH)
1266 y = XEXP (y, 0);
1267 else if (GET_CODE (y) == LO_SUM)
1268 y = XEXP (y, 1);
1269 else
39cec1ac 1270 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
9ae8ffe7
JL
1271
1272 if (rtx_equal_for_memref_p (x, y))
1273 {
c02f035f 1274 if (xsize <= 0 || ysize <= 0)
9ae8ffe7
JL
1275 return 1;
1276 if (c >= 0 && xsize > c)
1277 return 1;
1278 if (c < 0 && ysize+c > 0)
1279 return 1;
1280 return 0;
1281 }
1282
6e73e666
JC
1283 /* This code used to check for conflicts involving stack references and
1284 globals but the base address alias code now handles these cases. */
9ae8ffe7
JL
1285
1286 if (GET_CODE (x) == PLUS)
1287 {
1288 /* The fact that X is canonicalized means that this
1289 PLUS rtx is canonicalized. */
1290 rtx x0 = XEXP (x, 0);
1291 rtx x1 = XEXP (x, 1);
1292
1293 if (GET_CODE (y) == PLUS)
1294 {
1295 /* The fact that Y is canonicalized means that this
1296 PLUS rtx is canonicalized. */
1297 rtx y0 = XEXP (y, 0);
1298 rtx y1 = XEXP (y, 1);
1299
1300 if (rtx_equal_for_memref_p (x1, y1))
1301 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1302 if (rtx_equal_for_memref_p (x0, y0))
1303 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
1304 if (GET_CODE (x1) == CONST_INT)
63be02db
JM
1305 {
1306 if (GET_CODE (y1) == CONST_INT)
1307 return memrefs_conflict_p (xsize, x0, ysize, y0,
1308 c - INTVAL (x1) + INTVAL (y1));
1309 else
1310 return memrefs_conflict_p (xsize, x0, ysize, y,
1311 c - INTVAL (x1));
1312 }
9ae8ffe7
JL
1313 else if (GET_CODE (y1) == CONST_INT)
1314 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1315
6e73e666 1316 return 1;
9ae8ffe7
JL
1317 }
1318 else if (GET_CODE (x1) == CONST_INT)
1319 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
1320 }
1321 else if (GET_CODE (y) == PLUS)
1322 {
1323 /* The fact that Y is canonicalized means that this
1324 PLUS rtx is canonicalized. */
1325 rtx y0 = XEXP (y, 0);
1326 rtx y1 = XEXP (y, 1);
1327
1328 if (GET_CODE (y1) == CONST_INT)
1329 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1330 else
1331 return 1;
1332 }
1333
1334 if (GET_CODE (x) == GET_CODE (y))
1335 switch (GET_CODE (x))
1336 {
1337 case MULT:
1338 {
1339 /* Handle cases where we expect the second operands to be the
1340 same, and check only whether the first operand would conflict
1341 or not. */
1342 rtx x0, y0;
1343 rtx x1 = canon_rtx (XEXP (x, 1));
1344 rtx y1 = canon_rtx (XEXP (y, 1));
1345 if (! rtx_equal_for_memref_p (x1, y1))
1346 return 1;
1347 x0 = canon_rtx (XEXP (x, 0));
1348 y0 = canon_rtx (XEXP (y, 0));
1349 if (rtx_equal_for_memref_p (x0, y0))
1350 return (xsize == 0 || ysize == 0
1351 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1352
1353 /* Can't properly adjust our sizes. */
1354 if (GET_CODE (x1) != CONST_INT)
1355 return 1;
1356 xsize /= INTVAL (x1);
1357 ysize /= INTVAL (x1);
1358 c /= INTVAL (x1);
1359 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1360 }
1d300e19 1361
de12be17
JC
1362 case REG:
1363 /* Are these registers known not to be equal? */
1364 if (alias_invariant)
1365 {
e51712db 1366 unsigned int r_x = REGNO (x), r_y = REGNO (y);
de12be17
JC
1367 rtx i_x, i_y; /* invariant relationships of X and Y */
1368
1369 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1370 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1371
1372 if (i_x == 0 && i_y == 0)
1373 break;
1374
1375 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1376 ysize, i_y ? i_y : y, c))
1377 return 0;
1378 }
1379 break;
1380
1d300e19
KG
1381 default:
1382 break;
9ae8ffe7
JL
1383 }
1384
1385 /* Treat an access through an AND (e.g. a subword access on an Alpha)
56ee9281
RH
1386 as an access with indeterminate size. Assume that references
1387 besides AND are aligned, so if the size of the other reference is
1388 at least as large as the alignment, assume no other overlap. */
9ae8ffe7 1389 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
56ee9281 1390 {
02e3377d 1391 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
56ee9281
RH
1392 xsize = -1;
1393 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1394 }
9ae8ffe7 1395 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f 1396 {
56ee9281 1397 /* ??? If we are indexing far enough into the array/structure, we
c02f035f
RH
1398 may yet be able to determine that we can not overlap. But we
1399 also need to that we are far enough from the end not to overlap
56ee9281 1400 a following reference, so we do nothing with that for now. */
02e3377d 1401 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
56ee9281
RH
1402 ysize = -1;
1403 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
c02f035f 1404 }
9ae8ffe7
JL
1405
1406 if (CONSTANT_P (x))
1407 {
1408 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1409 {
1410 c += (INTVAL (y) - INTVAL (x));
c02f035f 1411 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
1412 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1413 }
1414
1415 if (GET_CODE (x) == CONST)
1416 {
1417 if (GET_CODE (y) == CONST)
1418 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1419 ysize, canon_rtx (XEXP (y, 0)), c);
1420 else
1421 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1422 ysize, y, c);
1423 }
1424 if (GET_CODE (y) == CONST)
1425 return memrefs_conflict_p (xsize, x, ysize,
1426 canon_rtx (XEXP (y, 0)), c);
1427
1428 if (CONSTANT_P (y))
c02f035f
RH
1429 return (xsize < 0 || ysize < 0
1430 || (rtx_equal_for_memref_p (x, y)
1431 && (xsize == 0 || ysize == 0
1432 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
1433
1434 return 1;
1435 }
1436 return 1;
1437}
1438
1439/* Functions to compute memory dependencies.
1440
1441 Since we process the insns in execution order, we can build tables
1442 to keep track of what registers are fixed (and not aliased), what registers
1443 are varying in known ways, and what registers are varying in unknown
1444 ways.
1445
1446 If both memory references are volatile, then there must always be a
1447 dependence between the two references, since their order can not be
1448 changed. A volatile and non-volatile reference can be interchanged
1449 though.
1450
dc1618bc
RK
1451 A MEM_IN_STRUCT reference at a non-AND varying address can never
1452 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We
1453 also must allow AND addresses, because they may generate accesses
1454 outside the object being referenced. This is used to generate
1455 aligned addresses from unaligned addresses, for instance, the alpha
1456 storeqi_unaligned pattern. */
9ae8ffe7
JL
1457
1458/* Read dependence: X is read after read in MEM takes place. There can
1459 only be a dependence here if both reads are volatile. */
1460
1461int
1462read_dependence (mem, x)
1463 rtx mem;
1464 rtx x;
1465{
1466 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1467}
1468
c6df88cb
MM
1469/* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1470 MEM2 is a reference to a structure at a varying address, or returns
1471 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1472 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1473 to decide whether or not an address may vary; it should return
eab5c70a
BS
1474 nonzero whenever variation is possible.
1475 MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */
1476
2c72b78f 1477static rtx
eab5c70a
BS
1478fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p)
1479 rtx mem1, mem2;
1480 rtx mem1_addr, mem2_addr;
3d994c6b 1481 int (*varies_p) PARAMS ((rtx));
eab5c70a 1482{
c6df88cb
MM
1483 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
1484 && !varies_p (mem1_addr) && varies_p (mem2_addr))
1485 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1486 varying address. */
1487 return mem1;
1488
1489 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
1490 && varies_p (mem1_addr) && !varies_p (mem2_addr))
1491 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1492 varying address. */
1493 return mem2;
1494
1495 return NULL_RTX;
1496}
1497
1498/* Returns nonzero if something about the mode or address format MEM1
1499 indicates that it might well alias *anything*. */
1500
2c72b78f 1501static int
c6df88cb
MM
1502aliases_everything_p (mem)
1503 rtx mem;
1504{
c6df88cb
MM
1505 if (GET_CODE (XEXP (mem, 0)) == AND)
1506 /* If the address is an AND, its very hard to know at what it is
1507 actually pointing. */
1508 return 1;
1509
1510 return 0;
1511}
1512
9ae8ffe7
JL
1513/* True dependence: X is read after store in MEM takes place. */
1514
1515int
1516true_dependence (mem, mem_mode, x, varies)
1517 rtx mem;
1518 enum machine_mode mem_mode;
1519 rtx x;
3d994c6b 1520 int (*varies) PARAMS ((rtx));
9ae8ffe7 1521{
6e73e666 1522 register rtx x_addr, mem_addr;
9ae8ffe7
JL
1523
1524 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1525 return 1;
1526
41472af8
MM
1527 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1528 return 0;
1529
9ae8ffe7
JL
1530 /* If X is an unchanging read, then it can't possibly conflict with any
1531 non-unchanging store. It may conflict with an unchanging write though,
1532 because there may be a single store to this address to initialize it.
1533 Just fall through to the code below to resolve the case where we have
1534 both an unchanging read and an unchanging write. This won't handle all
1535 cases optimally, but the possible performance loss should be
1536 negligible. */
1537 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
1538 return 0;
1539
56ee9281
RH
1540 if (mem_mode == VOIDmode)
1541 mem_mode = GET_MODE (mem);
1542
eab5c70a
BS
1543 x_addr = get_addr (XEXP (x, 0));
1544 mem_addr = get_addr (XEXP (mem, 0));
1545
1546 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1c72c7f6
JC
1547 return 0;
1548
eab5c70a
BS
1549 x_addr = canon_rtx (x_addr);
1550 mem_addr = canon_rtx (mem_addr);
6e73e666 1551
0211b6ab
JW
1552 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1553 SIZE_FOR_MODE (x), x_addr, 0))
1554 return 0;
1555
c6df88cb 1556 if (aliases_everything_p (x))
0211b6ab
JW
1557 return 1;
1558
c6df88cb
MM
1559 /* We cannot use aliases_everyting_p to test MEM, since we must look
1560 at MEM_MODE, rather than GET_MODE (MEM). */
1561 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
1562 return 1;
0211b6ab 1563
c6df88cb
MM
1564 /* In true_dependence we also allow BLKmode to alias anything. Why
1565 don't we do this in anti_dependence and output_dependence? */
1566 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1567 return 1;
0211b6ab 1568
eab5c70a
BS
1569 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1570 varies);
9ae8ffe7
JL
1571}
1572
c6df88cb
MM
1573/* Returns non-zero if a write to X might alias a previous read from
1574 (or, if WRITEP is non-zero, a write to) MEM. */
9ae8ffe7 1575
2c72b78f 1576static int
c6df88cb 1577write_dependence_p (mem, x, writep)
9ae8ffe7
JL
1578 rtx mem;
1579 rtx x;
c6df88cb 1580 int writep;
9ae8ffe7 1581{
6e73e666 1582 rtx x_addr, mem_addr;
c6df88cb 1583 rtx fixed_scalar;
6e73e666 1584
9ae8ffe7
JL
1585 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1586 return 1;
1587
eab5c70a
BS
1588 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1589 return 0;
1590
9ae8ffe7
JL
1591 /* If MEM is an unchanging read, then it can't possibly conflict with
1592 the store to X, because there is at most one store to MEM, and it must
1593 have occurred somewhere before MEM. */
c6df88cb 1594 if (!writep && RTX_UNCHANGING_P (mem))
9ae8ffe7
JL
1595 return 0;
1596
eab5c70a
BS
1597 x_addr = get_addr (XEXP (x, 0));
1598 mem_addr = get_addr (XEXP (mem, 0));
1c72c7f6 1599
eab5c70a
BS
1600 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
1601 GET_MODE (mem)))
41472af8
MM
1602 return 0;
1603
eab5c70a
BS
1604 x_addr = canon_rtx (x_addr);
1605 mem_addr = canon_rtx (mem_addr);
6e73e666 1606
c6df88cb
MM
1607 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1608 SIZE_FOR_MODE (x), x_addr, 0))
1609 return 0;
1610
1611 fixed_scalar
eab5c70a
BS
1612 = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1613 rtx_addr_varies_p);
1614
c6df88cb
MM
1615 return (!(fixed_scalar == mem && !aliases_everything_p (x))
1616 && !(fixed_scalar == x && !aliases_everything_p (mem)));
1617}
1618
1619/* Anti dependence: X is written after read in MEM takes place. */
1620
1621int
1622anti_dependence (mem, x)
1623 rtx mem;
1624 rtx x;
1625{
1626 return write_dependence_p (mem, x, /*writep=*/0);
9ae8ffe7
JL
1627}
1628
1629/* Output dependence: X is written after store in MEM takes place. */
1630
1631int
1632output_dependence (mem, x)
1633 register rtx mem;
1634 register rtx x;
1635{
c6df88cb 1636 return write_dependence_p (mem, x, /*writep=*/1);
9ae8ffe7
JL
1637}
1638
7790df19
JW
1639/* Returns non-zero if X might refer to something which is not
1640 local to the function and is not constant. */
1641
1642static int
1643nonlocal_reference_p (x)
1644 rtx x;
1645{
1646 rtx base;
1647 register RTX_CODE code;
1648 int regno;
1649
1650 code = GET_CODE (x);
1651
1652 if (GET_RTX_CLASS (code) == 'i')
1653 {
2a8f6b90
JH
1654 /* Constant functions can be constant if they don't use
1655 scratch memory used to mark function w/o side effects. */
7790df19 1656 if (code == CALL_INSN && CONST_CALL_P (x))
2a8f6b90
JH
1657 {
1658 x = CALL_INSN_FUNCTION_USAGE (x);
f8cd4126
RK
1659 if (x == 0)
1660 return 0;
2a8f6b90
JH
1661 }
1662 else
1663 x = PATTERN (x);
7790df19
JW
1664 code = GET_CODE (x);
1665 }
1666
1667 switch (code)
1668 {
1669 case SUBREG:
1670 if (GET_CODE (SUBREG_REG (x)) == REG)
1671 {
1672 /* Global registers are not local. */
1673 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
1674 && global_regs[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)])
1675 return 1;
1676 return 0;
1677 }
1678 break;
1679
1680 case REG:
1681 regno = REGNO (x);
1682 /* Global registers are not local. */
1683 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1684 return 1;
1685 return 0;
1686
1687 case SCRATCH:
1688 case PC:
1689 case CC0:
1690 case CONST_INT:
1691 case CONST_DOUBLE:
1692 case CONST:
1693 case LABEL_REF:
1694 return 0;
1695
1696 case SYMBOL_REF:
1697 /* Constants in the function's constants pool are constant. */
1698 if (CONSTANT_POOL_ADDRESS_P (x))
1699 return 0;
1700 return 1;
1701
1702 case CALL:
1703 /* Recursion introduces no additional considerations. */
1704 if (GET_CODE (XEXP (x, 0)) == MEM
1705 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1706 && strcmp(XSTR (XEXP (XEXP (x, 0), 0), 0),
1707 IDENTIFIER_POINTER (
1708 DECL_ASSEMBLER_NAME (current_function_decl))) == 0)
1709 return 0;
1710 return 1;
1711
1712 case MEM:
1713 /* Be overly conservative and consider any volatile memory
1714 reference as not local. */
1715 if (MEM_VOLATILE_P (x))
1716 return 1;
1717 base = find_base_term (XEXP (x, 0));
1718 if (base)
1719 {
b3b5ad95
JL
1720 /* A Pmode ADDRESS could be a reference via the structure value
1721 address or static chain. Such memory references are nonlocal.
1722
1723 Thus, we have to examine the contents of the ADDRESS to find
1724 out if this is a local reference or not. */
1725 if (GET_CODE (base) == ADDRESS
1726 && GET_MODE (base) == Pmode
1727 && (XEXP (base, 0) == stack_pointer_rtx
1728 || XEXP (base, 0) == arg_pointer_rtx
1729#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1730 || XEXP (base, 0) == hard_frame_pointer_rtx
1731#endif
1732 || XEXP (base, 0) == frame_pointer_rtx))
7790df19
JW
1733 return 0;
1734 /* Constants in the function's constant pool are constant. */
1735 if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
1736 return 0;
1737 }
1738 return 1;
1739
1740 case ASM_INPUT:
1741 case ASM_OPERANDS:
1742 return 1;
1743
1744 default:
1745 break;
1746 }
1747
1748 /* Recursively scan the operands of this expression. */
1749
1750 {
499b1098 1751 register const char *fmt = GET_RTX_FORMAT (code);
7790df19
JW
1752 register int i;
1753
1754 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1755 {
2a8f6b90 1756 if (fmt[i] == 'e' && XEXP (x, i))
7790df19
JW
1757 {
1758 if (nonlocal_reference_p (XEXP (x, i)))
1759 return 1;
1760 }
d4757e6a 1761 else if (fmt[i] == 'E')
7790df19
JW
1762 {
1763 register int j;
1764 for (j = 0; j < XVECLEN (x, i); j++)
1765 if (nonlocal_reference_p (XVECEXP (x, i, j)))
1766 return 1;
1767 }
1768 }
1769 }
1770
1771 return 0;
1772}
1773
1774/* Mark the function if it is constant. */
1775
1776void
1777mark_constant_function ()
1778{
1779 rtx insn;
1780
1781 if (TREE_PUBLIC (current_function_decl)
1782 || TREE_READONLY (current_function_decl)
1783 || TREE_THIS_VOLATILE (current_function_decl)
1784 || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode)
1785 return;
1786
1787 /* Determine if this is a constant function. */
1788
1789 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1790 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1791 && nonlocal_reference_p (insn))
1792 return;
1793
1794 /* Mark the function. */
1795
1796 TREE_READONLY (current_function_decl) = 1;
1797}
1798
6e73e666
JC
1799
1800static HARD_REG_SET argument_registers;
1801
1802void
1803init_alias_once ()
1804{
1805 register int i;
1806
1807#ifndef OUTGOING_REGNO
1808#define OUTGOING_REGNO(N) N
1809#endif
1810 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1811 /* Check whether this register can hold an incoming pointer
1812 argument. FUNCTION_ARG_REGNO_P tests outgoing register
1813 numbers, so translate if necessary due to register windows. */
1814 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
1815 && HARD_REGNO_MODE_OK (i, Pmode))
1816 SET_HARD_REG_BIT (argument_registers, i);
3932261a 1817
30f72379 1818 alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
6e73e666
JC
1819}
1820
c13e8210
MM
1821/* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
1822 array. */
1823
9ae8ffe7
JL
1824void
1825init_alias_analysis ()
1826{
1827 int maxreg = max_reg_num ();
ea64ef27 1828 int changed, pass;
9ae8ffe7 1829 register int i;
e51712db 1830 register unsigned int ui;
9ae8ffe7 1831 register rtx insn;
9ae8ffe7
JL
1832
1833 reg_known_value_size = maxreg;
1834
e05e2395
MM
1835 reg_known_value
1836 = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx))
1837 - FIRST_PSEUDO_REGISTER;
1838 reg_known_equiv_p
1839 = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char))
9ae8ffe7 1840 - FIRST_PSEUDO_REGISTER;
9ae8ffe7 1841
6e73e666
JC
1842 /* Overallocate reg_base_value to allow some growth during loop
1843 optimization. Loop unrolling can create a large number of
1844 registers. */
1845 reg_base_value_size = maxreg * 2;
ac606739
GS
1846 reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx));
1847 if (ggc_p)
1848 ggc_add_rtx_root (reg_base_value, reg_base_value_size);
1849
e05e2395
MM
1850 new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx));
1851 reg_seen = (char *) xmalloc (reg_base_value_size);
de12be17
JC
1852 if (! reload_completed && flag_unroll_loops)
1853 {
ac606739 1854 /* ??? Why are we realloc'ing if we're just going to zero it? */
de12be17
JC
1855 alias_invariant = (rtx *)xrealloc (alias_invariant,
1856 reg_base_value_size * sizeof (rtx));
1857 bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx));
1858 }
1859
ec907dd8
JL
1860
1861 /* The basic idea is that each pass through this loop will use the
1862 "constant" information from the previous pass to propagate alias
1863 information through another level of assignments.
1864
1865 This could get expensive if the assignment chains are long. Maybe
1866 we should throttle the number of iterations, possibly based on
6e73e666 1867 the optimization level or flag_expensive_optimizations.
ec907dd8
JL
1868
1869 We could propagate more information in the first pass by making use
1870 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
1871 for a pseudo is "constant".
1872
1873 A program with an uninitialized variable can cause an infinite loop
1874 here. Instead of doing a full dataflow analysis to detect such problems
1875 we just cap the number of iterations for the loop.
1876
1877 The state of the arrays for the set chain in question does not matter
1878 since the program has undefined behavior. */
6e73e666 1879
ea64ef27 1880 pass = 0;
6e73e666 1881 do
ec907dd8
JL
1882 {
1883 /* Assume nothing will change this iteration of the loop. */
1884 changed = 0;
1885
ec907dd8
JL
1886 /* We want to assign the same IDs each iteration of this loop, so
1887 start counting from zero each iteration of the loop. */
1888 unique_id = 0;
1889
1890 /* We're at the start of the funtion each iteration through the
1891 loop, so we're copying arguments. */
1892 copying_arguments = 1;
9ae8ffe7 1893
6e73e666
JC
1894 /* Wipe the potential alias information clean for this pass. */
1895 bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx));
8072f69c 1896
6e73e666
JC
1897 /* Wipe the reg_seen array clean. */
1898 bzero ((char *) reg_seen, reg_base_value_size);
9ae8ffe7 1899
6e73e666
JC
1900 /* Mark all hard registers which may contain an address.
1901 The stack, frame and argument pointers may contain an address.
1902 An argument register which can hold a Pmode value may contain
1903 an address even if it is not in BASE_REGS.
8072f69c 1904
6e73e666
JC
1905 The address expression is VOIDmode for an argument and
1906 Pmode for other registers. */
1907
1908 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1909 if (TEST_HARD_REG_BIT (argument_registers, i))
38a448ca
RH
1910 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
1911 gen_rtx_REG (Pmode, i));
6e73e666
JC
1912
1913 new_reg_base_value[STACK_POINTER_REGNUM]
38a448ca 1914 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
6e73e666 1915 new_reg_base_value[ARG_POINTER_REGNUM]
38a448ca 1916 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
6e73e666 1917 new_reg_base_value[FRAME_POINTER_REGNUM]
38a448ca 1918 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2a2c8203 1919#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6e73e666 1920 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
38a448ca 1921 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2a2c8203 1922#endif
6e73e666
JC
1923 if (struct_value_incoming_rtx
1924 && GET_CODE (struct_value_incoming_rtx) == REG)
1925 new_reg_base_value[REGNO (struct_value_incoming_rtx)]
38a448ca 1926 = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx);
6e73e666
JC
1927
1928 if (static_chain_rtx
1929 && GET_CODE (static_chain_rtx) == REG)
1930 new_reg_base_value[REGNO (static_chain_rtx)]
38a448ca 1931 = gen_rtx_ADDRESS (Pmode, static_chain_rtx);
ec907dd8
JL
1932
1933 /* Walk the insns adding values to the new_reg_base_value array. */
1934 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 1935 {
6e73e666 1936 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
ec907dd8 1937 {
6e73e666 1938 rtx note, set;
efc9bd41
RK
1939
1940#if defined (HAVE_prologue) || defined (HAVE_epilogue)
1941 if (prologue_epilogue_contains (insn))
1942 continue;
1943#endif
1944
ec907dd8
JL
1945 /* If this insn has a noalias note, process it, Otherwise,
1946 scan for sets. A simple set will have no side effects
1947 which could change the base value of any other register. */
6e73e666 1948
ec907dd8 1949 if (GET_CODE (PATTERN (insn)) == SET
efc9bd41
RK
1950 && REG_NOTES (insn) != 0
1951 && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
84832317 1952 record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
ec907dd8 1953 else
84832317 1954 note_stores (PATTERN (insn), record_set, NULL);
6e73e666
JC
1955
1956 set = single_set (insn);
1957
1958 if (set != 0
1959 && GET_CODE (SET_DEST (set)) == REG
1960 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
efc9bd41 1961 && REG_NOTES (insn) != 0
6e73e666
JC
1962 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1963 && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
1964 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
6ba14f92
R
1965 && GET_CODE (XEXP (note, 0)) != EXPR_LIST
1966 && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0)))
6e73e666
JC
1967 {
1968 int regno = REGNO (SET_DEST (set));
1969 reg_known_value[regno] = XEXP (note, 0);
1970 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
1971 }
ec907dd8
JL
1972 }
1973 else if (GET_CODE (insn) == NOTE
1974 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
1975 copying_arguments = 0;
6e73e666 1976 }
ec907dd8 1977
6e73e666 1978 /* Now propagate values from new_reg_base_value to reg_base_value. */
e51712db 1979 for (ui = 0; ui < reg_base_value_size; ui++)
6e73e666 1980 {
e51712db
KG
1981 if (new_reg_base_value[ui]
1982 && new_reg_base_value[ui] != reg_base_value[ui]
1983 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
ec907dd8 1984 {
e51712db 1985 reg_base_value[ui] = new_reg_base_value[ui];
6e73e666 1986 changed = 1;
ec907dd8 1987 }
9ae8ffe7 1988 }
9ae8ffe7 1989 }
6e73e666 1990 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7
JL
1991
1992 /* Fill in the remaining entries. */
1993 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
1994 if (reg_known_value[i] == 0)
1995 reg_known_value[i] = regno_reg_rtx[i];
1996
9ae8ffe7
JL
1997 /* Simplify the reg_base_value array so that no register refers to
1998 another register, except to special registers indirectly through
1999 ADDRESS expressions.
2000
2001 In theory this loop can take as long as O(registers^2), but unless
2002 there are very long dependency chains it will run in close to linear
ea64ef27
JL
2003 time.
2004
2005 This loop may not be needed any longer now that the main loop does
2006 a better job at propagating alias information. */
2007 pass = 0;
9ae8ffe7
JL
2008 do
2009 {
2010 changed = 0;
ea64ef27 2011 pass++;
e51712db 2012 for (ui = 0; ui < reg_base_value_size; ui++)
9ae8ffe7 2013 {
e51712db 2014 rtx base = reg_base_value[ui];
9ae8ffe7
JL
2015 if (base && GET_CODE (base) == REG)
2016 {
e51712db
KG
2017 unsigned int base_regno = REGNO (base);
2018 if (base_regno == ui) /* register set from itself */
2019 reg_base_value[ui] = 0;
9ae8ffe7 2020 else
e51712db 2021 reg_base_value[ui] = reg_base_value[base_regno];
9ae8ffe7
JL
2022 changed = 1;
2023 }
2024 }
2025 }
ea64ef27 2026 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 2027
e05e2395
MM
2028 /* Clean up. */
2029 free (new_reg_base_value);
ec907dd8 2030 new_reg_base_value = 0;
e05e2395 2031 free (reg_seen);
9ae8ffe7
JL
2032 reg_seen = 0;
2033}
2034
2035void
2036end_alias_analysis ()
2037{
e05e2395 2038 free (reg_known_value + FIRST_PSEUDO_REGISTER);
9ae8ffe7 2039 reg_known_value = 0;
ac606739 2040 reg_known_value_size = 0;
e05e2395
MM
2041 free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER);
2042 reg_known_equiv_p = 0;
ac606739
GS
2043 if (reg_base_value)
2044 {
2045 if (ggc_p)
2046 ggc_del_root (reg_base_value);
2047 free (reg_base_value);
2048 reg_base_value = 0;
2049 }
9ae8ffe7 2050 reg_base_value_size = 0;
de12be17
JC
2051 if (alias_invariant)
2052 {
ac606739 2053 free (alias_invariant);
de12be17
JC
2054 alias_invariant = 0;
2055 }
9ae8ffe7 2056}