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9ae8ffe7 1/* Alias analysis for GNU C
41af4023 2 Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
9ae8ffe7
JL
3 Contributed by John Carr (jfc@mit.edu).
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#include "config.h"
670ee920 23#include "system.h"
9ae8ffe7
JL
24#include "rtl.h"
25#include "expr.h"
26#include "regs.h"
27#include "hard-reg-set.h"
28#include "flags.h"
264fac34 29#include "output.h"
2e107e9e 30#include "toplev.h"
3932261a
MM
31#include "splay-tree.h"
32
33/* The alias sets assigned to MEMs assist the back-end in determining
34 which MEMs can alias which other MEMs. In general, two MEMs in
35 different alias sets to not alias each other. There is one
36 exception, however. Consider something like:
37
38 struct S {int i; double d; };
39
40 a store to an `S' can alias something of either type `int' or type
41 `double'. (However, a store to an `int' cannot alias a `double'
42 and vice versa.) We indicate this via a tree structure that looks
43 like:
44 struct S
45 / \
46 / \
47 |/_ _\|
48 int double
49
50 (The arrows are directed and point downwards.) If, when comparing
51 two alias sets, we can hold one set fixed, and trace the other set
52 downwards, and at some point find the first set, the two MEMs can
53 alias one another. In this situation we say the alias set for
54 `struct S' is the `superset' and that those for `int' and `double'
55 are `subsets'.
56
57 Alias set zero is implicitly a superset of all other alias sets.
58 However, this is no actual entry for alias set zero. It is an
59 error to attempt to explicitly construct a subset of zero. */
60
61typedef struct alias_set_entry {
62 /* The alias set number, as stored in MEM_ALIAS_SET. */
63 int alias_set;
64
65 /* The children of the alias set. These are not just the immediate
66 children, but, in fact, all children. So, if we have:
67
68 struct T { struct S s; float f; }
69
70 continuing our example above, the children here will be all of
71 `int', `double', `float', and `struct S'. */
72 splay_tree children;
73}* alias_set_entry;
9ae8ffe7
JL
74
75static rtx canon_rtx PROTO((rtx));
76static int rtx_equal_for_memref_p PROTO((rtx, rtx));
77static rtx find_symbolic_term PROTO((rtx));
78static int memrefs_conflict_p PROTO((int, rtx, int, rtx,
79 HOST_WIDE_INT));
70fec650
JL
80static void record_set PROTO((rtx, rtx));
81static rtx find_base_term PROTO((rtx));
56ee9281
RH
82static int base_alias_check PROTO((rtx, rtx, enum machine_mode,
83 enum machine_mode));
960b4ee6 84static rtx find_base_value PROTO((rtx));
3932261a
MM
85static int mems_in_disjoint_alias_sets_p PROTO((rtx, rtx));
86static int alias_set_compare PROTO((splay_tree_key,
87 splay_tree_key));
88static int insert_subset_children PROTO((splay_tree_node,
89 void*));
90static alias_set_entry get_alias_set_entry PROTO((int));
c6df88cb
MM
91static rtx fixed_scalar_and_varying_struct_p PROTO((rtx, rtx, int (*)(rtx)));
92static int aliases_everything_p PROTO((rtx));
93static int write_dependence_p PROTO((rtx, rtx, int));
9ae8ffe7
JL
94
95/* Set up all info needed to perform alias analysis on memory references. */
96
97#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
98
41472af8 99/* Returns nonzero if MEM1 and MEM2 do not alias because they are in
264fac34
MM
100 different alias sets. We ignore alias sets in functions making use
101 of variable arguments because the va_arg macros on some systems are
102 not legal ANSI C. */
103#define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
3932261a 104 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
41472af8 105
ea64ef27
JL
106/* Cap the number of passes we make over the insns propagating alias
107 information through set chains.
108
109 10 is a completely arbitrary choice. */
110#define MAX_ALIAS_LOOP_PASSES 10
111
9ae8ffe7
JL
112/* reg_base_value[N] gives an address to which register N is related.
113 If all sets after the first add or subtract to the current value
114 or otherwise modify it so it does not point to a different top level
115 object, reg_base_value[N] is equal to the address part of the source
2a2c8203
JC
116 of the first set.
117
118 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
119 expressions represent certain special values: function arguments and
120 the stack, frame, and argument pointers. The contents of an address
121 expression are not used (but they are descriptive for debugging);
122 only the address and mode matter. Pointer equality, not rtx_equal_p,
123 determines whether two ADDRESS expressions refer to the same base
124 address. The mode determines whether it is a function argument or
125 other special value. */
126
9ae8ffe7 127rtx *reg_base_value;
ec907dd8 128rtx *new_reg_base_value;
9ae8ffe7
JL
129unsigned int reg_base_value_size; /* size of reg_base_value array */
130#define REG_BASE_VALUE(X) \
e51712db 131 ((unsigned) REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0)
9ae8ffe7 132
de12be17
JC
133/* Vector of known invariant relationships between registers. Set in
134 loop unrolling. Indexed by register number, if nonzero the value
135 is an expression describing this register in terms of another.
136
137 The length of this array is REG_BASE_VALUE_SIZE.
138
139 Because this array contains only pseudo registers it has no effect
140 after reload. */
141static rtx *alias_invariant;
142
9ae8ffe7
JL
143/* Vector indexed by N giving the initial (unchanging) value known
144 for pseudo-register N. */
145rtx *reg_known_value;
146
147/* Indicates number of valid entries in reg_known_value. */
148static int reg_known_value_size;
149
150/* Vector recording for each reg_known_value whether it is due to a
151 REG_EQUIV note. Future passes (viz., reload) may replace the
152 pseudo with the equivalent expression and so we account for the
153 dependences that would be introduced if that happens. */
154/* ??? This is a problem only on the Convex. The REG_EQUIV notes created in
155 assign_parms mention the arg pointer, and there are explicit insns in the
156 RTL that modify the arg pointer. Thus we must ensure that such insns don't
157 get scheduled across each other because that would invalidate the REG_EQUIV
158 notes. One could argue that the REG_EQUIV notes are wrong, but solving
159 the problem in the scheduler will likely give better code, so we do it
160 here. */
161char *reg_known_equiv_p;
162
2a2c8203
JC
163/* True when scanning insns from the start of the rtl to the
164 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7 165
9ae8ffe7
JL
166static int copying_arguments;
167
3932261a
MM
168/* The splay-tree used to store the various alias set entries. */
169
170static splay_tree alias_sets;
171
172/* Returns -1, 0, 1 according to whether SET1 is less than, equal to,
173 or greater than SET2. */
174
175static int
176alias_set_compare (set1, set2)
177 splay_tree_key set1;
178 splay_tree_key set2;
179{
180 int s1 = (int) set1;
181 int s2 = (int) set2;
182
183 if (s1 < s2)
184 return -1;
185 else if (s1 > s2)
186 return 1;
187 else
188 return 0;
189}
190
191/* Returns a pointer to the alias set entry for ALIAS_SET, if there is
192 such an entry, or NULL otherwise. */
193
194static alias_set_entry
195get_alias_set_entry (alias_set)
196 int alias_set;
197{
198 splay_tree_node sn =
199 splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
200
201 return sn ? ((alias_set_entry) sn->value) : ((alias_set_entry) 0);
202}
203
204/* Returns nonzero value if the alias sets for MEM1 and MEM2 are such
205 that the two MEMs cannot alias each other. */
206
207static int
208mems_in_disjoint_alias_sets_p (mem1, mem2)
209 rtx mem1;
210 rtx mem2;
211{
212 alias_set_entry ase;
213
214#ifdef ENABLE_CHECKING
215/* Perform a basic sanity check. Namely, that there are no alias sets
216 if we're not using strict aliasing. This helps to catch bugs
217 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
218 where a MEM is allocated in some way other than by the use of
219 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
220 use alias sets to indicate that spilled registers cannot alias each
221 other, we might need to remove this check. */
222 if (!flag_strict_aliasing &&
223 (MEM_ALIAS_SET (mem1) || MEM_ALIAS_SET (mem2)))
224 abort ();
225#endif
226
227 /* The code used in varargs macros are often not conforming ANSI C,
228 which can trick the compiler into making incorrect aliasing
229 assumptions in these functions. So, we don't use alias sets in
230 such a function. FIXME: This should be moved into the front-end;
231 it is a language-dependent notion, and there's no reason not to
232 still use these checks to handle globals. */
233 if (current_function_stdarg || current_function_varargs)
234 return 0;
235
236 if (!MEM_ALIAS_SET (mem1) || !MEM_ALIAS_SET (mem2))
237 /* We have no alias set information for one of the MEMs, so we
238 have to assume it can alias anything. */
239 return 0;
240
241 if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2))
242 /* The two alias sets are the same, so they may alias. */
243 return 0;
244
245 /* Iterate through each of the children of the first alias set,
246 comparing it with the second alias set. */
247 ase = get_alias_set_entry (MEM_ALIAS_SET (mem1));
248 if (ase && splay_tree_lookup (ase->children,
249 (splay_tree_key) MEM_ALIAS_SET (mem2)))
250 return 0;
251
252 /* Now do the same, but with the alias sets reversed. */
253 ase = get_alias_set_entry (MEM_ALIAS_SET (mem2));
254 if (ase && splay_tree_lookup (ase->children,
255 (splay_tree_key) MEM_ALIAS_SET (mem1)))
256 return 0;
257
258 /* The two MEMs are in distinct alias sets, and neither one is the
259 child of the other. Therefore, they cannot alias. */
260 return 1;
261}
262
263/* Insert the NODE into the splay tree given by DATA. Used by
264 record_alias_subset via splay_tree_foreach. */
265
266static int
267insert_subset_children (node, data)
268 splay_tree_node node;
269 void *data;
270{
271 splay_tree_insert ((splay_tree) data,
272 node->key,
273 node->value);
274
275 return 0;
276}
277
278/* Indicate that things in SUBSET can alias things in SUPERSET, but
279 not vice versa. For example, in C, a store to an `int' can alias a
280 structure containing an `int', but not vice versa. Here, the
281 structure would be the SUPERSET and `int' the SUBSET. This
282 function should be called only once per SUPERSET/SUBSET pair. At
283 present any given alias set may only be a subset of one superset.
284
285 It is illegal for SUPERSET to be zero; everything is implicitly a
286 subset of alias set zero. */
287
288void
289record_alias_subset (superset, subset)
290 int superset;
291 int subset;
292{
293 alias_set_entry superset_entry;
294 alias_set_entry subset_entry;
295
296 if (superset == 0)
297 abort ();
298
299 superset_entry = get_alias_set_entry (superset);
300 if (!superset_entry)
301 {
302 /* Create an entry for the SUPERSET, so that we have a place to
303 attach the SUBSET. */
304 superset_entry =
305 (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
306 superset_entry->alias_set = superset;
307 superset_entry->children
973838fd 308 = splay_tree_new (alias_set_compare, 0, 0);
3932261a
MM
309 splay_tree_insert (alias_sets,
310 (splay_tree_key) superset,
311 (splay_tree_value) superset_entry);
312
313 }
314
315 subset_entry = get_alias_set_entry (subset);
316 if (subset_entry)
317 /* There is an entry for the subset. Enter all of its children
318 (if they are not already present) as children of the SUPERSET. */
319 splay_tree_foreach (subset_entry->children,
973838fd 320 insert_subset_children,
3932261a
MM
321 superset_entry->children);
322
323 /* Enter the SUBSET itself as a child of the SUPERSET. */
324 splay_tree_insert (superset_entry->children,
325 (splay_tree_key) subset,
326 /*value=*/0);
327}
328
2a2c8203
JC
329/* Inside SRC, the source of a SET, find a base address. */
330
9ae8ffe7
JL
331static rtx
332find_base_value (src)
333 register rtx src;
334{
335 switch (GET_CODE (src))
336 {
337 case SYMBOL_REF:
338 case LABEL_REF:
339 return src;
340
341 case REG:
2a2c8203
JC
342 /* At the start of a function argument registers have known base
343 values which may be lost later. Returning an ADDRESS
344 expression here allows optimization based on argument values
345 even when the argument registers are used for other purposes. */
346 if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments)
ec907dd8 347 return new_reg_base_value[REGNO (src)];
73774bc7 348
eaf407a5
JL
349 /* If a pseudo has a known base value, return it. Do not do this
350 for hard regs since it can result in a circular dependency
351 chain for registers which have values at function entry.
352
353 The test above is not sufficient because the scheduler may move
354 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
355 if (REGNO (src) >= FIRST_PSEUDO_REGISTER
e51712db 356 && (unsigned) REGNO (src) < reg_base_value_size
eaf407a5 357 && reg_base_value[REGNO (src)])
73774bc7
JL
358 return reg_base_value[REGNO (src)];
359
9ae8ffe7
JL
360 return src;
361
362 case MEM:
363 /* Check for an argument passed in memory. Only record in the
364 copying-arguments block; it is too hard to track changes
365 otherwise. */
366 if (copying_arguments
367 && (XEXP (src, 0) == arg_pointer_rtx
368 || (GET_CODE (XEXP (src, 0)) == PLUS
369 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
38a448ca 370 return gen_rtx_ADDRESS (VOIDmode, src);
9ae8ffe7
JL
371 return 0;
372
373 case CONST:
374 src = XEXP (src, 0);
375 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
376 break;
377 /* fall through */
2a2c8203 378
9ae8ffe7
JL
379 case PLUS:
380 case MINUS:
2a2c8203 381 {
ec907dd8
JL
382 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
383
384 /* If either operand is a REG, then see if we already have
385 a known value for it. */
386 if (GET_CODE (src_0) == REG)
387 {
388 temp = find_base_value (src_0);
389 if (temp)
390 src_0 = temp;
391 }
392
393 if (GET_CODE (src_1) == REG)
394 {
395 temp = find_base_value (src_1);
396 if (temp)
397 src_1 = temp;
398 }
2a2c8203
JC
399
400 /* Guess which operand is the base address.
401
ec907dd8
JL
402 If either operand is a symbol, then it is the base. If
403 either operand is a CONST_INT, then the other is the base. */
2a2c8203
JC
404
405 if (GET_CODE (src_1) == CONST_INT
406 || GET_CODE (src_0) == SYMBOL_REF
407 || GET_CODE (src_0) == LABEL_REF
408 || GET_CODE (src_0) == CONST)
409 return find_base_value (src_0);
410
ec907dd8
JL
411 if (GET_CODE (src_0) == CONST_INT
412 || GET_CODE (src_1) == SYMBOL_REF
413 || GET_CODE (src_1) == LABEL_REF
414 || GET_CODE (src_1) == CONST)
415 return find_base_value (src_1);
416
417 /* This might not be necessary anymore.
418
419 If either operand is a REG that is a known pointer, then it
420 is the base. */
2a2c8203
JC
421 if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
422 return find_base_value (src_0);
423
424 if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
425 return find_base_value (src_1);
426
9ae8ffe7 427 return 0;
2a2c8203
JC
428 }
429
430 case LO_SUM:
431 /* The standard form is (lo_sum reg sym) so look only at the
432 second operand. */
433 return find_base_value (XEXP (src, 1));
9ae8ffe7
JL
434
435 case AND:
436 /* If the second operand is constant set the base
437 address to the first operand. */
2a2c8203
JC
438 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
439 return find_base_value (XEXP (src, 0));
9ae8ffe7
JL
440 return 0;
441
de12be17
JC
442 case ZERO_EXTEND:
443 case SIGN_EXTEND: /* used for NT/Alpha pointers */
9ae8ffe7 444 case HIGH:
2a2c8203 445 return find_base_value (XEXP (src, 0));
1d300e19
KG
446
447 default:
448 break;
9ae8ffe7
JL
449 }
450
451 return 0;
452}
453
454/* Called from init_alias_analysis indirectly through note_stores. */
455
456/* while scanning insns to find base values, reg_seen[N] is nonzero if
457 register N has been set in this function. */
458static char *reg_seen;
459
13309a5f
JC
460/* Addresses which are known not to alias anything else are identified
461 by a unique integer. */
ec907dd8
JL
462static int unique_id;
463
2a2c8203
JC
464static void
465record_set (dest, set)
9ae8ffe7
JL
466 rtx dest, set;
467{
468 register int regno;
469 rtx src;
470
471 if (GET_CODE (dest) != REG)
472 return;
473
474 regno = REGNO (dest);
475
476 if (set)
477 {
478 /* A CLOBBER wipes out any old value but does not prevent a previously
479 unset register from acquiring a base address (i.e. reg_seen is not
480 set). */
481 if (GET_CODE (set) == CLOBBER)
482 {
ec907dd8 483 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
484 return;
485 }
486 src = SET_SRC (set);
487 }
488 else
489 {
9ae8ffe7
JL
490 if (reg_seen[regno])
491 {
ec907dd8 492 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
493 return;
494 }
495 reg_seen[regno] = 1;
38a448ca
RH
496 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
497 GEN_INT (unique_id++));
9ae8ffe7
JL
498 return;
499 }
500
501 /* This is not the first set. If the new value is not related to the
502 old value, forget the base value. Note that the following code is
503 not detected:
504 extern int x, y; int *p = &x; p += (&y-&x);
505 ANSI C does not allow computing the difference of addresses
506 of distinct top level objects. */
ec907dd8 507 if (new_reg_base_value[regno])
9ae8ffe7
JL
508 switch (GET_CODE (src))
509 {
2a2c8203 510 case LO_SUM:
9ae8ffe7
JL
511 case PLUS:
512 case MINUS:
513 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 514 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
515 break;
516 case AND:
517 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 518 new_reg_base_value[regno] = 0;
9ae8ffe7 519 break;
9ae8ffe7 520 default:
ec907dd8 521 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
522 break;
523 }
524 /* If this is the first set of a register, record the value. */
525 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
ec907dd8
JL
526 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
527 new_reg_base_value[regno] = find_base_value (src);
9ae8ffe7
JL
528
529 reg_seen[regno] = 1;
530}
531
532/* Called from loop optimization when a new pseudo-register is created. */
533void
de12be17 534record_base_value (regno, val, invariant)
9ae8ffe7
JL
535 int regno;
536 rtx val;
de12be17 537 int invariant;
9ae8ffe7 538{
e51712db 539 if ((unsigned) regno >= reg_base_value_size)
9ae8ffe7 540 return;
de12be17
JC
541
542 /* If INVARIANT is true then this value also describes an invariant
543 relationship which can be used to deduce that two registers with
544 unknown values are different. */
545 if (invariant && alias_invariant)
546 alias_invariant[regno] = val;
547
9ae8ffe7
JL
548 if (GET_CODE (val) == REG)
549 {
e51712db 550 if ((unsigned) REGNO (val) < reg_base_value_size)
de12be17
JC
551 {
552 reg_base_value[regno] = reg_base_value[REGNO (val)];
553 }
9ae8ffe7
JL
554 return;
555 }
556 reg_base_value[regno] = find_base_value (val);
557}
558
559static rtx
560canon_rtx (x)
561 rtx x;
562{
563 /* Recursively look for equivalences. */
564 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
565 && REGNO (x) < reg_known_value_size)
566 return reg_known_value[REGNO (x)] == x
567 ? x : canon_rtx (reg_known_value[REGNO (x)]);
568 else if (GET_CODE (x) == PLUS)
569 {
570 rtx x0 = canon_rtx (XEXP (x, 0));
571 rtx x1 = canon_rtx (XEXP (x, 1));
572
573 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
574 {
575 /* We can tolerate LO_SUMs being offset here; these
576 rtl are used for nothing other than comparisons. */
577 if (GET_CODE (x0) == CONST_INT)
578 return plus_constant_for_output (x1, INTVAL (x0));
579 else if (GET_CODE (x1) == CONST_INT)
580 return plus_constant_for_output (x0, INTVAL (x1));
38a448ca 581 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
9ae8ffe7
JL
582 }
583 }
584 /* This gives us much better alias analysis when called from
585 the loop optimizer. Note we want to leave the original
586 MEM alone, but need to return the canonicalized MEM with
587 all the flags with their original values. */
588 else if (GET_CODE (x) == MEM)
589 {
590 rtx addr = canon_rtx (XEXP (x, 0));
591 if (addr != XEXP (x, 0))
592 {
38a448ca 593 rtx new = gen_rtx_MEM (GET_MODE (x), addr);
9ae8ffe7 594 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
c6df88cb 595 MEM_COPY_ATTRIBUTES (new, x);
41472af8 596 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (x);
9ae8ffe7
JL
597 x = new;
598 }
599 }
600 return x;
601}
602
603/* Return 1 if X and Y are identical-looking rtx's.
604
605 We use the data in reg_known_value above to see if two registers with
606 different numbers are, in fact, equivalent. */
607
608static int
609rtx_equal_for_memref_p (x, y)
610 rtx x, y;
611{
612 register int i;
613 register int j;
614 register enum rtx_code code;
615 register char *fmt;
616
617 if (x == 0 && y == 0)
618 return 1;
619 if (x == 0 || y == 0)
620 return 0;
621 x = canon_rtx (x);
622 y = canon_rtx (y);
623
624 if (x == y)
625 return 1;
626
627 code = GET_CODE (x);
628 /* Rtx's of different codes cannot be equal. */
629 if (code != GET_CODE (y))
630 return 0;
631
632 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
633 (REG:SI x) and (REG:HI x) are NOT equivalent. */
634
635 if (GET_MODE (x) != GET_MODE (y))
636 return 0;
637
638 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */
639
640 if (code == REG)
641 return REGNO (x) == REGNO (y);
642 if (code == LABEL_REF)
643 return XEXP (x, 0) == XEXP (y, 0);
644 if (code == SYMBOL_REF)
645 return XSTR (x, 0) == XSTR (y, 0);
de12be17
JC
646 if (code == CONST_INT)
647 return INTVAL (x) == INTVAL (y);
648 if (code == ADDRESSOF)
649 return REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) && XINT (x, 1) == XINT (y, 1);
9ae8ffe7
JL
650
651 /* For commutative operations, the RTX match if the operand match in any
652 order. Also handle the simple binary and unary cases without a loop. */
653 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
654 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
655 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
656 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
657 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
658 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
659 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
660 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
661 else if (GET_RTX_CLASS (code) == '1')
662 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
663
664 /* Compare the elements. If any pair of corresponding elements
de12be17
JC
665 fail to match, return 0 for the whole things.
666
667 Limit cases to types which actually appear in addresses. */
9ae8ffe7
JL
668
669 fmt = GET_RTX_FORMAT (code);
670 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
671 {
672 switch (fmt[i])
673 {
9ae8ffe7
JL
674 case 'i':
675 if (XINT (x, i) != XINT (y, i))
676 return 0;
677 break;
678
9ae8ffe7
JL
679 case 'E':
680 /* Two vectors must have the same length. */
681 if (XVECLEN (x, i) != XVECLEN (y, i))
682 return 0;
683
684 /* And the corresponding elements must match. */
685 for (j = 0; j < XVECLEN (x, i); j++)
686 if (rtx_equal_for_memref_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
687 return 0;
688 break;
689
690 case 'e':
691 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
692 return 0;
693 break;
694
aee21ba9
JL
695 /* This can happen for an asm which clobbers memory. */
696 case '0':
697 break;
698
9ae8ffe7
JL
699 /* It is believed that rtx's at this level will never
700 contain anything but integers and other rtx's,
701 except for within LABEL_REFs and SYMBOL_REFs. */
702 default:
703 abort ();
704 }
705 }
706 return 1;
707}
708
709/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
710 X and return it, or return 0 if none found. */
711
712static rtx
713find_symbolic_term (x)
714 rtx x;
715{
716 register int i;
717 register enum rtx_code code;
718 register char *fmt;
719
720 code = GET_CODE (x);
721 if (code == SYMBOL_REF || code == LABEL_REF)
722 return x;
723 if (GET_RTX_CLASS (code) == 'o')
724 return 0;
725
726 fmt = GET_RTX_FORMAT (code);
727 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
728 {
729 rtx t;
730
731 if (fmt[i] == 'e')
732 {
733 t = find_symbolic_term (XEXP (x, i));
734 if (t != 0)
735 return t;
736 }
737 else if (fmt[i] == 'E')
738 break;
739 }
740 return 0;
741}
742
743static rtx
744find_base_term (x)
745 register rtx x;
746{
747 switch (GET_CODE (x))
748 {
749 case REG:
750 return REG_BASE_VALUE (x);
751
de12be17
JC
752 case ZERO_EXTEND:
753 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
9ae8ffe7 754 case HIGH:
6d849a2a
JL
755 case PRE_INC:
756 case PRE_DEC:
757 case POST_INC:
758 case POST_DEC:
759 return find_base_term (XEXP (x, 0));
760
9ae8ffe7
JL
761 case CONST:
762 x = XEXP (x, 0);
763 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
764 return 0;
765 /* fall through */
766 case LO_SUM:
767 case PLUS:
768 case MINUS:
769 {
770 rtx tmp = find_base_term (XEXP (x, 0));
771 if (tmp)
772 return tmp;
773 return find_base_term (XEXP (x, 1));
774 }
775
776 case AND:
777 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
778 return REG_BASE_VALUE (XEXP (x, 0));
779 return 0;
780
781 case SYMBOL_REF:
782 case LABEL_REF:
783 return x;
784
785 default:
786 return 0;
787 }
788}
789
790/* Return 0 if the addresses X and Y are known to point to different
791 objects, 1 if they might be pointers to the same object. */
792
793static int
56ee9281 794base_alias_check (x, y, x_mode, y_mode)
9ae8ffe7 795 rtx x, y;
56ee9281 796 enum machine_mode x_mode, y_mode;
9ae8ffe7
JL
797{
798 rtx x_base = find_base_term (x);
799 rtx y_base = find_base_term (y);
800
1c72c7f6
JC
801 /* If the address itself has no known base see if a known equivalent
802 value has one. If either address still has no known base, nothing
803 is known about aliasing. */
804 if (x_base == 0)
805 {
806 rtx x_c;
807 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
808 return 1;
809 x_base = find_base_term (x_c);
810 if (x_base == 0)
811 return 1;
812 }
9ae8ffe7 813
1c72c7f6
JC
814 if (y_base == 0)
815 {
816 rtx y_c;
817 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
818 return 1;
819 y_base = find_base_term (y_c);
820 if (y_base == 0)
821 return 1;
822 }
823
824 /* If the base addresses are equal nothing is known about aliasing. */
825 if (rtx_equal_p (x_base, y_base))
9ae8ffe7
JL
826 return 1;
827
56ee9281
RH
828 /* The base addresses of the read and write are different expressions.
829 If they are both symbols and they are not accessed via AND, there is
830 no conflict. We can bring knowledge of object alignment into play
831 here. For example, on alpha, "char a, b;" can alias one another,
832 though "char a; long b;" cannot. */
9ae8ffe7 833 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f 834 {
56ee9281
RH
835 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
836 return 1;
837 if (GET_CODE (x) == AND
838 && (GET_CODE (XEXP (x, 1)) != CONST_INT
839 || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
840 return 1;
841 if (GET_CODE (y) == AND
842 && (GET_CODE (XEXP (y, 1)) != CONST_INT
843 || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
844 return 1;
b2972551
JL
845 /* Differing symbols never alias. */
846 return 0;
c02f035f 847 }
9ae8ffe7
JL
848
849 /* If one address is a stack reference there can be no alias:
850 stack references using different base registers do not alias,
851 a stack reference can not alias a parameter, and a stack reference
852 can not alias a global. */
853 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
854 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
855 return 0;
856
857 if (! flag_argument_noalias)
858 return 1;
859
860 if (flag_argument_noalias > 1)
861 return 0;
862
863 /* Weak noalias assertion (arguments are distinct, but may match globals). */
864 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
865}
866
39cec1ac
MH
867/* Return the address of the (N_REFS + 1)th memory reference to ADDR
868 where SIZE is the size in bytes of the memory reference. If ADDR
869 is not modified by the memory reference then ADDR is returned. */
870
871rtx
872addr_side_effect_eval (addr, size, n_refs)
873 rtx addr;
874 int size;
875 int n_refs;
876{
877 int offset = 0;
878
879 switch (GET_CODE (addr))
880 {
881 case PRE_INC:
882 offset = (n_refs + 1) * size;
883 break;
884 case PRE_DEC:
885 offset = -(n_refs + 1) * size;
886 break;
887 case POST_INC:
888 offset = n_refs * size;
889 break;
890 case POST_DEC:
891 offset = -n_refs * size;
892 break;
893
894 default:
895 return addr;
896 }
897
898 if (offset)
899 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
900 else
901 addr = XEXP (addr, 0);
902
903 return addr;
904}
905
9ae8ffe7
JL
906/* Return nonzero if X and Y (memory addresses) could reference the
907 same location in memory. C is an offset accumulator. When
908 C is nonzero, we are testing aliases between X and Y + C.
909 XSIZE is the size in bytes of the X reference,
910 similarly YSIZE is the size in bytes for Y.
911
912 If XSIZE or YSIZE is zero, we do not know the amount of memory being
913 referenced (the reference was BLKmode), so make the most pessimistic
914 assumptions.
915
c02f035f
RH
916 If XSIZE or YSIZE is negative, we may access memory outside the object
917 being referenced as a side effect. This can happen when using AND to
918 align memory references, as is done on the Alpha.
919
9ae8ffe7 920 Nice to notice that varying addresses cannot conflict with fp if no
0211b6ab 921 local variables had their addresses taken, but that's too hard now. */
9ae8ffe7
JL
922
923
924static int
925memrefs_conflict_p (xsize, x, ysize, y, c)
926 register rtx x, y;
927 int xsize, ysize;
928 HOST_WIDE_INT c;
929{
930 if (GET_CODE (x) == HIGH)
931 x = XEXP (x, 0);
932 else if (GET_CODE (x) == LO_SUM)
933 x = XEXP (x, 1);
934 else
39cec1ac 935 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
9ae8ffe7
JL
936 if (GET_CODE (y) == HIGH)
937 y = XEXP (y, 0);
938 else if (GET_CODE (y) == LO_SUM)
939 y = XEXP (y, 1);
940 else
39cec1ac 941 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
9ae8ffe7
JL
942
943 if (rtx_equal_for_memref_p (x, y))
944 {
c02f035f 945 if (xsize <= 0 || ysize <= 0)
9ae8ffe7
JL
946 return 1;
947 if (c >= 0 && xsize > c)
948 return 1;
949 if (c < 0 && ysize+c > 0)
950 return 1;
951 return 0;
952 }
953
6e73e666
JC
954 /* This code used to check for conflicts involving stack references and
955 globals but the base address alias code now handles these cases. */
9ae8ffe7
JL
956
957 if (GET_CODE (x) == PLUS)
958 {
959 /* The fact that X is canonicalized means that this
960 PLUS rtx is canonicalized. */
961 rtx x0 = XEXP (x, 0);
962 rtx x1 = XEXP (x, 1);
963
964 if (GET_CODE (y) == PLUS)
965 {
966 /* The fact that Y is canonicalized means that this
967 PLUS rtx is canonicalized. */
968 rtx y0 = XEXP (y, 0);
969 rtx y1 = XEXP (y, 1);
970
971 if (rtx_equal_for_memref_p (x1, y1))
972 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
973 if (rtx_equal_for_memref_p (x0, y0))
974 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
975 if (GET_CODE (x1) == CONST_INT)
63be02db
JM
976 {
977 if (GET_CODE (y1) == CONST_INT)
978 return memrefs_conflict_p (xsize, x0, ysize, y0,
979 c - INTVAL (x1) + INTVAL (y1));
980 else
981 return memrefs_conflict_p (xsize, x0, ysize, y,
982 c - INTVAL (x1));
983 }
9ae8ffe7
JL
984 else if (GET_CODE (y1) == CONST_INT)
985 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
986
6e73e666 987 return 1;
9ae8ffe7
JL
988 }
989 else if (GET_CODE (x1) == CONST_INT)
990 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
991 }
992 else if (GET_CODE (y) == PLUS)
993 {
994 /* The fact that Y is canonicalized means that this
995 PLUS rtx is canonicalized. */
996 rtx y0 = XEXP (y, 0);
997 rtx y1 = XEXP (y, 1);
998
999 if (GET_CODE (y1) == CONST_INT)
1000 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1001 else
1002 return 1;
1003 }
1004
1005 if (GET_CODE (x) == GET_CODE (y))
1006 switch (GET_CODE (x))
1007 {
1008 case MULT:
1009 {
1010 /* Handle cases where we expect the second operands to be the
1011 same, and check only whether the first operand would conflict
1012 or not. */
1013 rtx x0, y0;
1014 rtx x1 = canon_rtx (XEXP (x, 1));
1015 rtx y1 = canon_rtx (XEXP (y, 1));
1016 if (! rtx_equal_for_memref_p (x1, y1))
1017 return 1;
1018 x0 = canon_rtx (XEXP (x, 0));
1019 y0 = canon_rtx (XEXP (y, 0));
1020 if (rtx_equal_for_memref_p (x0, y0))
1021 return (xsize == 0 || ysize == 0
1022 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1023
1024 /* Can't properly adjust our sizes. */
1025 if (GET_CODE (x1) != CONST_INT)
1026 return 1;
1027 xsize /= INTVAL (x1);
1028 ysize /= INTVAL (x1);
1029 c /= INTVAL (x1);
1030 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1031 }
1d300e19 1032
de12be17
JC
1033 case REG:
1034 /* Are these registers known not to be equal? */
1035 if (alias_invariant)
1036 {
e51712db 1037 unsigned int r_x = REGNO (x), r_y = REGNO (y);
de12be17
JC
1038 rtx i_x, i_y; /* invariant relationships of X and Y */
1039
1040 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1041 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1042
1043 if (i_x == 0 && i_y == 0)
1044 break;
1045
1046 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1047 ysize, i_y ? i_y : y, c))
1048 return 0;
1049 }
1050 break;
1051
1d300e19
KG
1052 default:
1053 break;
9ae8ffe7
JL
1054 }
1055
1056 /* Treat an access through an AND (e.g. a subword access on an Alpha)
56ee9281
RH
1057 as an access with indeterminate size. Assume that references
1058 besides AND are aligned, so if the size of the other reference is
1059 at least as large as the alignment, assume no other overlap. */
9ae8ffe7 1060 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
56ee9281 1061 {
02e3377d 1062 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
56ee9281
RH
1063 xsize = -1;
1064 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1065 }
9ae8ffe7 1066 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f 1067 {
56ee9281 1068 /* ??? If we are indexing far enough into the array/structure, we
c02f035f
RH
1069 may yet be able to determine that we can not overlap. But we
1070 also need to that we are far enough from the end not to overlap
56ee9281 1071 a following reference, so we do nothing with that for now. */
02e3377d 1072 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
56ee9281
RH
1073 ysize = -1;
1074 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
c02f035f 1075 }
9ae8ffe7
JL
1076
1077 if (CONSTANT_P (x))
1078 {
1079 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1080 {
1081 c += (INTVAL (y) - INTVAL (x));
c02f035f 1082 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
1083 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1084 }
1085
1086 if (GET_CODE (x) == CONST)
1087 {
1088 if (GET_CODE (y) == CONST)
1089 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1090 ysize, canon_rtx (XEXP (y, 0)), c);
1091 else
1092 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1093 ysize, y, c);
1094 }
1095 if (GET_CODE (y) == CONST)
1096 return memrefs_conflict_p (xsize, x, ysize,
1097 canon_rtx (XEXP (y, 0)), c);
1098
1099 if (CONSTANT_P (y))
c02f035f
RH
1100 return (xsize < 0 || ysize < 0
1101 || (rtx_equal_for_memref_p (x, y)
1102 && (xsize == 0 || ysize == 0
1103 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
1104
1105 return 1;
1106 }
1107 return 1;
1108}
1109
1110/* Functions to compute memory dependencies.
1111
1112 Since we process the insns in execution order, we can build tables
1113 to keep track of what registers are fixed (and not aliased), what registers
1114 are varying in known ways, and what registers are varying in unknown
1115 ways.
1116
1117 If both memory references are volatile, then there must always be a
1118 dependence between the two references, since their order can not be
1119 changed. A volatile and non-volatile reference can be interchanged
1120 though.
1121
fa8b6024 1122 A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never
9ae8ffe7
JL
1123 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must
1124 allow QImode aliasing because the ANSI C standard allows character
1125 pointers to alias anything. We are assuming that characters are
fa8b6024
JW
1126 always QImode here. We also must allow AND addresses, because they may
1127 generate accesses outside the object being referenced. This is used to
1128 generate aligned addresses from unaligned addresses, for instance, the
1129 alpha storeqi_unaligned pattern. */
9ae8ffe7
JL
1130
1131/* Read dependence: X is read after read in MEM takes place. There can
1132 only be a dependence here if both reads are volatile. */
1133
1134int
1135read_dependence (mem, x)
1136 rtx mem;
1137 rtx x;
1138{
1139 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1140}
1141
c6df88cb
MM
1142/* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1143 MEM2 is a reference to a structure at a varying address, or returns
1144 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1145 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1146 to decide whether or not an address may vary; it should return
1147 nozero whenever variation is possible. */
1148
1149rtx
1150fixed_scalar_and_varying_struct_p (mem1, mem2, varies_p)
1151 rtx mem1;
1152 rtx mem2;
1153 int (*varies_p) PROTO((rtx));
1154{
1155 rtx mem1_addr = XEXP (mem1, 0);
1156 rtx mem2_addr = XEXP (mem2, 0);
1157
1158 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
1159 && !varies_p (mem1_addr) && varies_p (mem2_addr))
1160 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1161 varying address. */
1162 return mem1;
1163
1164 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
1165 && varies_p (mem1_addr) && !varies_p (mem2_addr))
1166 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1167 varying address. */
1168 return mem2;
1169
1170 return NULL_RTX;
1171}
1172
1173/* Returns nonzero if something about the mode or address format MEM1
1174 indicates that it might well alias *anything*. */
1175
1176int
1177aliases_everything_p (mem)
1178 rtx mem;
1179{
1180 if (GET_MODE (mem) == QImode)
1181 /* ANSI C says that a `char*' can point to anything. */
1182 return 1;
1183
1184 if (GET_CODE (XEXP (mem, 0)) == AND)
1185 /* If the address is an AND, its very hard to know at what it is
1186 actually pointing. */
1187 return 1;
1188
1189 return 0;
1190}
1191
9ae8ffe7
JL
1192/* True dependence: X is read after store in MEM takes place. */
1193
1194int
1195true_dependence (mem, mem_mode, x, varies)
1196 rtx mem;
1197 enum machine_mode mem_mode;
1198 rtx x;
960b4ee6 1199 int (*varies) PROTO((rtx));
9ae8ffe7 1200{
6e73e666 1201 register rtx x_addr, mem_addr;
9ae8ffe7
JL
1202
1203 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1204 return 1;
1205
41472af8
MM
1206 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1207 return 0;
1208
9ae8ffe7
JL
1209 /* If X is an unchanging read, then it can't possibly conflict with any
1210 non-unchanging store. It may conflict with an unchanging write though,
1211 because there may be a single store to this address to initialize it.
1212 Just fall through to the code below to resolve the case where we have
1213 both an unchanging read and an unchanging write. This won't handle all
1214 cases optimally, but the possible performance loss should be
1215 negligible. */
1216 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
1217 return 0;
1218
56ee9281
RH
1219 if (mem_mode == VOIDmode)
1220 mem_mode = GET_MODE (mem);
1221
1222 if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), mem_mode))
1c72c7f6
JC
1223 return 0;
1224
6e73e666
JC
1225 x_addr = canon_rtx (XEXP (x, 0));
1226 mem_addr = canon_rtx (XEXP (mem, 0));
1227
0211b6ab
JW
1228 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1229 SIZE_FOR_MODE (x), x_addr, 0))
1230 return 0;
1231
c6df88cb 1232 if (aliases_everything_p (x))
0211b6ab
JW
1233 return 1;
1234
c6df88cb
MM
1235 /* We cannot use aliases_everyting_p to test MEM, since we must look
1236 at MEM_MODE, rather than GET_MODE (MEM). */
1237 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
1238 return 1;
0211b6ab 1239
c6df88cb
MM
1240 /* In true_dependence we also allow BLKmode to alias anything. Why
1241 don't we do this in anti_dependence and output_dependence? */
1242 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1243 return 1;
0211b6ab 1244
c6df88cb 1245 return !fixed_scalar_and_varying_struct_p (mem, x, varies);
9ae8ffe7
JL
1246}
1247
c6df88cb
MM
1248/* Returns non-zero if a write to X might alias a previous read from
1249 (or, if WRITEP is non-zero, a write to) MEM. */
9ae8ffe7
JL
1250
1251int
c6df88cb 1252write_dependence_p (mem, x, writep)
9ae8ffe7
JL
1253 rtx mem;
1254 rtx x;
c6df88cb 1255 int writep;
9ae8ffe7 1256{
6e73e666 1257 rtx x_addr, mem_addr;
c6df88cb 1258 rtx fixed_scalar;
6e73e666 1259
9ae8ffe7
JL
1260 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1261 return 1;
1262
9ae8ffe7
JL
1263 /* If MEM is an unchanging read, then it can't possibly conflict with
1264 the store to X, because there is at most one store to MEM, and it must
1265 have occurred somewhere before MEM. */
c6df88cb 1266 if (!writep && RTX_UNCHANGING_P (mem))
9ae8ffe7
JL
1267 return 0;
1268
56ee9281
RH
1269 if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x),
1270 GET_MODE (mem)))
1c72c7f6
JC
1271 return 0;
1272
1273 x = canon_rtx (x);
1274 mem = canon_rtx (mem);
1275
41472af8
MM
1276 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1277 return 0;
1278
6e73e666
JC
1279 x_addr = XEXP (x, 0);
1280 mem_addr = XEXP (mem, 0);
1281
c6df88cb
MM
1282 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1283 SIZE_FOR_MODE (x), x_addr, 0))
1284 return 0;
1285
1286 fixed_scalar
1287 = fixed_scalar_and_varying_struct_p (mem, x, rtx_addr_varies_p);
1288
1289 return (!(fixed_scalar == mem && !aliases_everything_p (x))
1290 && !(fixed_scalar == x && !aliases_everything_p (mem)));
1291}
1292
1293/* Anti dependence: X is written after read in MEM takes place. */
1294
1295int
1296anti_dependence (mem, x)
1297 rtx mem;
1298 rtx x;
1299{
1300 return write_dependence_p (mem, x, /*writep=*/0);
9ae8ffe7
JL
1301}
1302
1303/* Output dependence: X is written after store in MEM takes place. */
1304
1305int
1306output_dependence (mem, x)
1307 register rtx mem;
1308 register rtx x;
1309{
c6df88cb 1310 return write_dependence_p (mem, x, /*writep=*/1);
9ae8ffe7
JL
1311}
1312
6e73e666
JC
1313
1314static HARD_REG_SET argument_registers;
1315
1316void
1317init_alias_once ()
1318{
1319 register int i;
1320
1321#ifndef OUTGOING_REGNO
1322#define OUTGOING_REGNO(N) N
1323#endif
1324 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1325 /* Check whether this register can hold an incoming pointer
1326 argument. FUNCTION_ARG_REGNO_P tests outgoing register
1327 numbers, so translate if necessary due to register windows. */
1328 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
1329 && HARD_REGNO_MODE_OK (i, Pmode))
1330 SET_HARD_REG_BIT (argument_registers, i);
3932261a 1331
973838fd 1332 alias_sets = splay_tree_new (alias_set_compare, 0, 0);
6e73e666
JC
1333}
1334
9ae8ffe7
JL
1335void
1336init_alias_analysis ()
1337{
1338 int maxreg = max_reg_num ();
ea64ef27 1339 int changed, pass;
9ae8ffe7 1340 register int i;
e51712db 1341 register unsigned int ui;
9ae8ffe7 1342 register rtx insn;
9ae8ffe7
JL
1343
1344 reg_known_value_size = maxreg;
1345
1346 reg_known_value
1347 = (rtx *) oballoc ((maxreg - FIRST_PSEUDO_REGISTER) * sizeof (rtx))
1348 - FIRST_PSEUDO_REGISTER;
1349 reg_known_equiv_p =
1350 oballoc (maxreg - FIRST_PSEUDO_REGISTER) - FIRST_PSEUDO_REGISTER;
1351 bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER),
1352 (maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx));
1353 bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER,
1354 (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char));
1355
6e73e666
JC
1356 /* Overallocate reg_base_value to allow some growth during loop
1357 optimization. Loop unrolling can create a large number of
1358 registers. */
1359 reg_base_value_size = maxreg * 2;
1360 reg_base_value = (rtx *)oballoc (reg_base_value_size * sizeof (rtx));
1361 new_reg_base_value = (rtx *)alloca (reg_base_value_size * sizeof (rtx));
1362 reg_seen = (char *)alloca (reg_base_value_size);
1363 bzero ((char *) reg_base_value, reg_base_value_size * sizeof (rtx));
de12be17
JC
1364 if (! reload_completed && flag_unroll_loops)
1365 {
1366 alias_invariant = (rtx *)xrealloc (alias_invariant,
1367 reg_base_value_size * sizeof (rtx));
1368 bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx));
1369 }
1370
ec907dd8
JL
1371
1372 /* The basic idea is that each pass through this loop will use the
1373 "constant" information from the previous pass to propagate alias
1374 information through another level of assignments.
1375
1376 This could get expensive if the assignment chains are long. Maybe
1377 we should throttle the number of iterations, possibly based on
6e73e666 1378 the optimization level or flag_expensive_optimizations.
ec907dd8
JL
1379
1380 We could propagate more information in the first pass by making use
1381 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
1382 for a pseudo is "constant".
1383
1384 A program with an uninitialized variable can cause an infinite loop
1385 here. Instead of doing a full dataflow analysis to detect such problems
1386 we just cap the number of iterations for the loop.
1387
1388 The state of the arrays for the set chain in question does not matter
1389 since the program has undefined behavior. */
6e73e666 1390
ea64ef27 1391 pass = 0;
6e73e666 1392 do
ec907dd8
JL
1393 {
1394 /* Assume nothing will change this iteration of the loop. */
1395 changed = 0;
1396
ec907dd8
JL
1397 /* We want to assign the same IDs each iteration of this loop, so
1398 start counting from zero each iteration of the loop. */
1399 unique_id = 0;
1400
1401 /* We're at the start of the funtion each iteration through the
1402 loop, so we're copying arguments. */
1403 copying_arguments = 1;
9ae8ffe7 1404
6e73e666
JC
1405 /* Wipe the potential alias information clean for this pass. */
1406 bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx));
8072f69c 1407
6e73e666
JC
1408 /* Wipe the reg_seen array clean. */
1409 bzero ((char *) reg_seen, reg_base_value_size);
9ae8ffe7 1410
6e73e666
JC
1411 /* Mark all hard registers which may contain an address.
1412 The stack, frame and argument pointers may contain an address.
1413 An argument register which can hold a Pmode value may contain
1414 an address even if it is not in BASE_REGS.
8072f69c 1415
6e73e666
JC
1416 The address expression is VOIDmode for an argument and
1417 Pmode for other registers. */
1418
1419 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1420 if (TEST_HARD_REG_BIT (argument_registers, i))
38a448ca
RH
1421 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
1422 gen_rtx_REG (Pmode, i));
6e73e666
JC
1423
1424 new_reg_base_value[STACK_POINTER_REGNUM]
38a448ca 1425 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
6e73e666 1426 new_reg_base_value[ARG_POINTER_REGNUM]
38a448ca 1427 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
6e73e666 1428 new_reg_base_value[FRAME_POINTER_REGNUM]
38a448ca 1429 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2a2c8203 1430#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6e73e666 1431 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
38a448ca 1432 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2a2c8203 1433#endif
6e73e666
JC
1434 if (struct_value_incoming_rtx
1435 && GET_CODE (struct_value_incoming_rtx) == REG)
1436 new_reg_base_value[REGNO (struct_value_incoming_rtx)]
38a448ca 1437 = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx);
6e73e666
JC
1438
1439 if (static_chain_rtx
1440 && GET_CODE (static_chain_rtx) == REG)
1441 new_reg_base_value[REGNO (static_chain_rtx)]
38a448ca 1442 = gen_rtx_ADDRESS (Pmode, static_chain_rtx);
ec907dd8
JL
1443
1444 /* Walk the insns adding values to the new_reg_base_value array. */
1445 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 1446 {
6e73e666 1447 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
ec907dd8 1448 {
6e73e666 1449 rtx note, set;
ec907dd8
JL
1450 /* If this insn has a noalias note, process it, Otherwise,
1451 scan for sets. A simple set will have no side effects
1452 which could change the base value of any other register. */
6e73e666 1453
ec907dd8 1454 if (GET_CODE (PATTERN (insn)) == SET
6e73e666 1455 && (find_reg_note (insn, REG_NOALIAS, NULL_RTX)))
9f8f10de 1456 record_set (SET_DEST (PATTERN (insn)), NULL_RTX);
ec907dd8
JL
1457 else
1458 note_stores (PATTERN (insn), record_set);
6e73e666
JC
1459
1460 set = single_set (insn);
1461
1462 if (set != 0
1463 && GET_CODE (SET_DEST (set)) == REG
1464 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
1465 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1466 && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
1467 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
1468 && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1469 {
1470 int regno = REGNO (SET_DEST (set));
1471 reg_known_value[regno] = XEXP (note, 0);
1472 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
1473 }
ec907dd8
JL
1474 }
1475 else if (GET_CODE (insn) == NOTE
1476 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
1477 copying_arguments = 0;
6e73e666 1478 }
ec907dd8 1479
6e73e666 1480 /* Now propagate values from new_reg_base_value to reg_base_value. */
e51712db 1481 for (ui = 0; ui < reg_base_value_size; ui++)
6e73e666 1482 {
e51712db
KG
1483 if (new_reg_base_value[ui]
1484 && new_reg_base_value[ui] != reg_base_value[ui]
1485 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
ec907dd8 1486 {
e51712db 1487 reg_base_value[ui] = new_reg_base_value[ui];
6e73e666 1488 changed = 1;
ec907dd8 1489 }
9ae8ffe7 1490 }
9ae8ffe7 1491 }
6e73e666 1492 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7
JL
1493
1494 /* Fill in the remaining entries. */
1495 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
1496 if (reg_known_value[i] == 0)
1497 reg_known_value[i] = regno_reg_rtx[i];
1498
9ae8ffe7
JL
1499 /* Simplify the reg_base_value array so that no register refers to
1500 another register, except to special registers indirectly through
1501 ADDRESS expressions.
1502
1503 In theory this loop can take as long as O(registers^2), but unless
1504 there are very long dependency chains it will run in close to linear
ea64ef27
JL
1505 time.
1506
1507 This loop may not be needed any longer now that the main loop does
1508 a better job at propagating alias information. */
1509 pass = 0;
9ae8ffe7
JL
1510 do
1511 {
1512 changed = 0;
ea64ef27 1513 pass++;
e51712db 1514 for (ui = 0; ui < reg_base_value_size; ui++)
9ae8ffe7 1515 {
e51712db 1516 rtx base = reg_base_value[ui];
9ae8ffe7
JL
1517 if (base && GET_CODE (base) == REG)
1518 {
e51712db
KG
1519 unsigned int base_regno = REGNO (base);
1520 if (base_regno == ui) /* register set from itself */
1521 reg_base_value[ui] = 0;
9ae8ffe7 1522 else
e51712db 1523 reg_base_value[ui] = reg_base_value[base_regno];
9ae8ffe7
JL
1524 changed = 1;
1525 }
1526 }
1527 }
ea64ef27 1528 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 1529
ec907dd8 1530 new_reg_base_value = 0;
9ae8ffe7
JL
1531 reg_seen = 0;
1532}
1533
1534void
1535end_alias_analysis ()
1536{
1537 reg_known_value = 0;
1538 reg_base_value = 0;
1539 reg_base_value_size = 0;
de12be17
JC
1540 if (alias_invariant)
1541 {
1542 free ((char *)alias_invariant);
1543 alias_invariant = 0;
1544 }
9ae8ffe7 1545}