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1/* Alias analysis for GNU C
2 Copyright (C) 1997 Free Software Foundation, Inc.
3 Contributed by John Carr (jfc@mit.edu).
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#include "config.h"
23#include "rtl.h"
24#include "expr.h"
25#include "regs.h"
26#include "hard-reg-set.h"
27#include "flags.h"
28
29static rtx canon_rtx PROTO((rtx));
30static int rtx_equal_for_memref_p PROTO((rtx, rtx));
31static rtx find_symbolic_term PROTO((rtx));
32static int memrefs_conflict_p PROTO((int, rtx, int, rtx,
33 HOST_WIDE_INT));
34
35/* Set up all info needed to perform alias analysis on memory references. */
36
37#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
38
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39/* Cap the number of passes we make over the insns propagating alias
40 information through set chains.
41
42 10 is a completely arbitrary choice. */
43#define MAX_ALIAS_LOOP_PASSES 10
44
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45/* reg_base_value[N] gives an address to which register N is related.
46 If all sets after the first add or subtract to the current value
47 or otherwise modify it so it does not point to a different top level
48 object, reg_base_value[N] is equal to the address part of the source
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49 of the first set.
50
51 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
52 expressions represent certain special values: function arguments and
53 the stack, frame, and argument pointers. The contents of an address
54 expression are not used (but they are descriptive for debugging);
55 only the address and mode matter. Pointer equality, not rtx_equal_p,
56 determines whether two ADDRESS expressions refer to the same base
57 address. The mode determines whether it is a function argument or
58 other special value. */
59
9ae8ffe7 60rtx *reg_base_value;
ec907dd8 61rtx *new_reg_base_value;
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62unsigned int reg_base_value_size; /* size of reg_base_value array */
63#define REG_BASE_VALUE(X) \
64 (REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0)
65
66/* Vector indexed by N giving the initial (unchanging) value known
67 for pseudo-register N. */
68rtx *reg_known_value;
69
70/* Indicates number of valid entries in reg_known_value. */
71static int reg_known_value_size;
72
73/* Vector recording for each reg_known_value whether it is due to a
74 REG_EQUIV note. Future passes (viz., reload) may replace the
75 pseudo with the equivalent expression and so we account for the
76 dependences that would be introduced if that happens. */
77/* ??? This is a problem only on the Convex. The REG_EQUIV notes created in
78 assign_parms mention the arg pointer, and there are explicit insns in the
79 RTL that modify the arg pointer. Thus we must ensure that such insns don't
80 get scheduled across each other because that would invalidate the REG_EQUIV
81 notes. One could argue that the REG_EQUIV notes are wrong, but solving
82 the problem in the scheduler will likely give better code, so we do it
83 here. */
84char *reg_known_equiv_p;
85
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86/* True when scanning insns from the start of the rtl to the
87 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7 88
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89static int copying_arguments;
90
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91/* Inside SRC, the source of a SET, find a base address. */
92
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93static rtx
94find_base_value (src)
95 register rtx src;
96{
97 switch (GET_CODE (src))
98 {
99 case SYMBOL_REF:
100 case LABEL_REF:
101 return src;
102
103 case REG:
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104 /* At the start of a function argument registers have known base
105 values which may be lost later. Returning an ADDRESS
106 expression here allows optimization based on argument values
107 even when the argument registers are used for other purposes. */
108 if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments)
ec907dd8 109 return new_reg_base_value[REGNO (src)];
73774bc7 110
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111 /* If a pseudo has a known base value, return it. Do not do this
112 for hard regs since it can result in a circular dependency
113 chain for registers which have values at function entry.
114
115 The test above is not sufficient because the scheduler may move
116 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
117 if (REGNO (src) >= FIRST_PSEUDO_REGISTER
118 && reg_base_value[REGNO (src)])
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119 return reg_base_value[REGNO (src)];
120
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121 return src;
122
123 case MEM:
124 /* Check for an argument passed in memory. Only record in the
125 copying-arguments block; it is too hard to track changes
126 otherwise. */
127 if (copying_arguments
128 && (XEXP (src, 0) == arg_pointer_rtx
129 || (GET_CODE (XEXP (src, 0)) == PLUS
130 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
131 return gen_rtx (ADDRESS, VOIDmode, src);
132 return 0;
133
134 case CONST:
135 src = XEXP (src, 0);
136 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
137 break;
138 /* fall through */
2a2c8203 139
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140 case PLUS:
141 case MINUS:
2a2c8203 142 {
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143 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
144
145 /* If either operand is a REG, then see if we already have
146 a known value for it. */
147 if (GET_CODE (src_0) == REG)
148 {
149 temp = find_base_value (src_0);
150 if (temp)
151 src_0 = temp;
152 }
153
154 if (GET_CODE (src_1) == REG)
155 {
156 temp = find_base_value (src_1);
157 if (temp)
158 src_1 = temp;
159 }
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160
161 /* Guess which operand is the base address.
162
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163 If either operand is a symbol, then it is the base. If
164 either operand is a CONST_INT, then the other is the base. */
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165
166 if (GET_CODE (src_1) == CONST_INT
167 || GET_CODE (src_0) == SYMBOL_REF
168 || GET_CODE (src_0) == LABEL_REF
169 || GET_CODE (src_0) == CONST)
170 return find_base_value (src_0);
171
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172 if (GET_CODE (src_0) == CONST_INT
173 || GET_CODE (src_1) == SYMBOL_REF
174 || GET_CODE (src_1) == LABEL_REF
175 || GET_CODE (src_1) == CONST)
176 return find_base_value (src_1);
177
178 /* This might not be necessary anymore.
179
180 If either operand is a REG that is a known pointer, then it
181 is the base. */
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182 if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
183 return find_base_value (src_0);
184
185 if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
186 return find_base_value (src_1);
187
9ae8ffe7 188 return 0;
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189 }
190
191 case LO_SUM:
192 /* The standard form is (lo_sum reg sym) so look only at the
193 second operand. */
194 return find_base_value (XEXP (src, 1));
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195
196 case AND:
197 /* If the second operand is constant set the base
198 address to the first operand. */
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199 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
200 return find_base_value (XEXP (src, 0));
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201 return 0;
202
203 case HIGH:
2a2c8203 204 return find_base_value (XEXP (src, 0));
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205 }
206
207 return 0;
208}
209
210/* Called from init_alias_analysis indirectly through note_stores. */
211
212/* while scanning insns to find base values, reg_seen[N] is nonzero if
213 register N has been set in this function. */
214static char *reg_seen;
215
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216/* */
217static int unique_id;
218
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219static void
220record_set (dest, set)
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221 rtx dest, set;
222{
223 register int regno;
224 rtx src;
225
226 if (GET_CODE (dest) != REG)
227 return;
228
229 regno = REGNO (dest);
230
231 if (set)
232 {
233 /* A CLOBBER wipes out any old value but does not prevent a previously
234 unset register from acquiring a base address (i.e. reg_seen is not
235 set). */
236 if (GET_CODE (set) == CLOBBER)
237 {
ec907dd8 238 new_reg_base_value[regno] = 0;
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239 return;
240 }
241 src = SET_SRC (set);
242 }
243 else
244 {
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245 if (reg_seen[regno])
246 {
ec907dd8 247 new_reg_base_value[regno] = 0;
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248 return;
249 }
250 reg_seen[regno] = 1;
ec907dd8 251 new_reg_base_value[regno] = gen_rtx (ADDRESS, Pmode,
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252 GEN_INT (unique_id++));
253 return;
254 }
255
256 /* This is not the first set. If the new value is not related to the
257 old value, forget the base value. Note that the following code is
258 not detected:
259 extern int x, y; int *p = &x; p += (&y-&x);
260 ANSI C does not allow computing the difference of addresses
261 of distinct top level objects. */
ec907dd8 262 if (new_reg_base_value[regno])
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263 switch (GET_CODE (src))
264 {
2a2c8203 265 case LO_SUM:
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266 case PLUS:
267 case MINUS:
268 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 269 new_reg_base_value[regno] = 0;
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270 break;
271 case AND:
272 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 273 new_reg_base_value[regno] = 0;
9ae8ffe7 274 break;
9ae8ffe7 275 default:
ec907dd8 276 new_reg_base_value[regno] = 0;
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277 break;
278 }
279 /* If this is the first set of a register, record the value. */
280 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
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281 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
282 new_reg_base_value[regno] = find_base_value (src);
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283
284 reg_seen[regno] = 1;
285}
286
287/* Called from loop optimization when a new pseudo-register is created. */
288void
289record_base_value (regno, val)
290 int regno;
291 rtx val;
292{
293 if (!flag_alias_check || regno >= reg_base_value_size)
294 return;
295 if (GET_CODE (val) == REG)
296 {
297 if (REGNO (val) < reg_base_value_size)
298 reg_base_value[regno] = reg_base_value[REGNO (val)];
299 return;
300 }
301 reg_base_value[regno] = find_base_value (val);
302}
303
304static rtx
305canon_rtx (x)
306 rtx x;
307{
308 /* Recursively look for equivalences. */
309 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
310 && REGNO (x) < reg_known_value_size)
311 return reg_known_value[REGNO (x)] == x
312 ? x : canon_rtx (reg_known_value[REGNO (x)]);
313 else if (GET_CODE (x) == PLUS)
314 {
315 rtx x0 = canon_rtx (XEXP (x, 0));
316 rtx x1 = canon_rtx (XEXP (x, 1));
317
318 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
319 {
320 /* We can tolerate LO_SUMs being offset here; these
321 rtl are used for nothing other than comparisons. */
322 if (GET_CODE (x0) == CONST_INT)
323 return plus_constant_for_output (x1, INTVAL (x0));
324 else if (GET_CODE (x1) == CONST_INT)
325 return plus_constant_for_output (x0, INTVAL (x1));
326 return gen_rtx (PLUS, GET_MODE (x), x0, x1);
327 }
328 }
329 /* This gives us much better alias analysis when called from
330 the loop optimizer. Note we want to leave the original
331 MEM alone, but need to return the canonicalized MEM with
332 all the flags with their original values. */
333 else if (GET_CODE (x) == MEM)
334 {
335 rtx addr = canon_rtx (XEXP (x, 0));
336 if (addr != XEXP (x, 0))
337 {
338 rtx new = gen_rtx (MEM, GET_MODE (x), addr);
339 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
340 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
341 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
342 x = new;
343 }
344 }
345 return x;
346}
347
348/* Return 1 if X and Y are identical-looking rtx's.
349
350 We use the data in reg_known_value above to see if two registers with
351 different numbers are, in fact, equivalent. */
352
353static int
354rtx_equal_for_memref_p (x, y)
355 rtx x, y;
356{
357 register int i;
358 register int j;
359 register enum rtx_code code;
360 register char *fmt;
361
362 if (x == 0 && y == 0)
363 return 1;
364 if (x == 0 || y == 0)
365 return 0;
366 x = canon_rtx (x);
367 y = canon_rtx (y);
368
369 if (x == y)
370 return 1;
371
372 code = GET_CODE (x);
373 /* Rtx's of different codes cannot be equal. */
374 if (code != GET_CODE (y))
375 return 0;
376
377 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
378 (REG:SI x) and (REG:HI x) are NOT equivalent. */
379
380 if (GET_MODE (x) != GET_MODE (y))
381 return 0;
382
383 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */
384
385 if (code == REG)
386 return REGNO (x) == REGNO (y);
387 if (code == LABEL_REF)
388 return XEXP (x, 0) == XEXP (y, 0);
389 if (code == SYMBOL_REF)
390 return XSTR (x, 0) == XSTR (y, 0);
391
392 /* For commutative operations, the RTX match if the operand match in any
393 order. Also handle the simple binary and unary cases without a loop. */
394 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
395 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
396 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
397 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
398 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
399 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
400 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
401 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
402 else if (GET_RTX_CLASS (code) == '1')
403 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
404
405 /* Compare the elements. If any pair of corresponding elements
406 fail to match, return 0 for the whole things. */
407
408 fmt = GET_RTX_FORMAT (code);
409 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
410 {
411 switch (fmt[i])
412 {
413 case 'w':
414 if (XWINT (x, i) != XWINT (y, i))
415 return 0;
416 break;
417
418 case 'n':
419 case 'i':
420 if (XINT (x, i) != XINT (y, i))
421 return 0;
422 break;
423
424 case 'V':
425 case 'E':
426 /* Two vectors must have the same length. */
427 if (XVECLEN (x, i) != XVECLEN (y, i))
428 return 0;
429
430 /* And the corresponding elements must match. */
431 for (j = 0; j < XVECLEN (x, i); j++)
432 if (rtx_equal_for_memref_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
433 return 0;
434 break;
435
436 case 'e':
437 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
438 return 0;
439 break;
440
441 case 'S':
442 case 's':
443 if (strcmp (XSTR (x, i), XSTR (y, i)))
444 return 0;
445 break;
446
447 case 'u':
448 /* These are just backpointers, so they don't matter. */
449 break;
450
451 case '0':
452 break;
453
454 /* It is believed that rtx's at this level will never
455 contain anything but integers and other rtx's,
456 except for within LABEL_REFs and SYMBOL_REFs. */
457 default:
458 abort ();
459 }
460 }
461 return 1;
462}
463
464/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
465 X and return it, or return 0 if none found. */
466
467static rtx
468find_symbolic_term (x)
469 rtx x;
470{
471 register int i;
472 register enum rtx_code code;
473 register char *fmt;
474
475 code = GET_CODE (x);
476 if (code == SYMBOL_REF || code == LABEL_REF)
477 return x;
478 if (GET_RTX_CLASS (code) == 'o')
479 return 0;
480
481 fmt = GET_RTX_FORMAT (code);
482 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
483 {
484 rtx t;
485
486 if (fmt[i] == 'e')
487 {
488 t = find_symbolic_term (XEXP (x, i));
489 if (t != 0)
490 return t;
491 }
492 else if (fmt[i] == 'E')
493 break;
494 }
495 return 0;
496}
497
498static rtx
499find_base_term (x)
500 register rtx x;
501{
502 switch (GET_CODE (x))
503 {
504 case REG:
505 return REG_BASE_VALUE (x);
506
507 case HIGH:
508 return find_base_term (XEXP (x, 0));
509
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510 case PRE_INC:
511 case PRE_DEC:
512 case POST_INC:
513 case POST_DEC:
514 return find_base_term (XEXP (x, 0));
515
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516 case CONST:
517 x = XEXP (x, 0);
518 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
519 return 0;
520 /* fall through */
521 case LO_SUM:
522 case PLUS:
523 case MINUS:
524 {
525 rtx tmp = find_base_term (XEXP (x, 0));
526 if (tmp)
527 return tmp;
528 return find_base_term (XEXP (x, 1));
529 }
530
531 case AND:
532 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
533 return REG_BASE_VALUE (XEXP (x, 0));
534 return 0;
535
536 case SYMBOL_REF:
537 case LABEL_REF:
538 return x;
539
540 default:
541 return 0;
542 }
543}
544
545/* Return 0 if the addresses X and Y are known to point to different
546 objects, 1 if they might be pointers to the same object. */
547
548static int
549base_alias_check (x, y)
550 rtx x, y;
551{
552 rtx x_base = find_base_term (x);
553 rtx y_base = find_base_term (y);
554
555 /* If either base address is unknown or the base addresses are equal,
556 nothing is known about aliasing. */
557
558 if (x_base == 0 || y_base == 0 || rtx_equal_p (x_base, y_base))
559 return 1;
560
561 /* The base addresses of the read and write are different
c02f035f
RH
562 expressions. If they are both symbols and they are not accessed
563 via AND, there is no conflict. */
564 /* XXX: We can bring knowledge of object alignment and offset into
565 play here. For example, on alpha, "char a, b;" can alias one
566 another, though "char a; long b;" cannot. Similarly, offsets
567 into strutures may be brought into play. Given "char a, b[40];",
568 a and b[1] may overlap, but a and b[20] do not. */
9ae8ffe7 569 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f
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570 {
571 return GET_CODE (x) == AND || GET_CODE (y) == AND;
572 }
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573
574 /* If one address is a stack reference there can be no alias:
575 stack references using different base registers do not alias,
576 a stack reference can not alias a parameter, and a stack reference
577 can not alias a global. */
578 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
579 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
580 return 0;
581
582 if (! flag_argument_noalias)
583 return 1;
584
585 if (flag_argument_noalias > 1)
586 return 0;
587
588 /* Weak noalias assertion (arguments are distinct, but may match globals). */
589 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
590}
591
592/* Return nonzero if X and Y (memory addresses) could reference the
593 same location in memory. C is an offset accumulator. When
594 C is nonzero, we are testing aliases between X and Y + C.
595 XSIZE is the size in bytes of the X reference,
596 similarly YSIZE is the size in bytes for Y.
597
598 If XSIZE or YSIZE is zero, we do not know the amount of memory being
599 referenced (the reference was BLKmode), so make the most pessimistic
600 assumptions.
601
c02f035f
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602 If XSIZE or YSIZE is negative, we may access memory outside the object
603 being referenced as a side effect. This can happen when using AND to
604 align memory references, as is done on the Alpha.
605
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606 We recognize the following cases of non-conflicting memory:
607
608 (1) addresses involving the frame pointer cannot conflict
609 with addresses involving static variables.
610 (2) static variables with different addresses cannot conflict.
611
612 Nice to notice that varying addresses cannot conflict with fp if no
613 local variables had their addresses taken, but that's too hard now. */
614
615
616static int
617memrefs_conflict_p (xsize, x, ysize, y, c)
618 register rtx x, y;
619 int xsize, ysize;
620 HOST_WIDE_INT c;
621{
622 if (GET_CODE (x) == HIGH)
623 x = XEXP (x, 0);
624 else if (GET_CODE (x) == LO_SUM)
625 x = XEXP (x, 1);
626 else
627 x = canon_rtx (x);
628 if (GET_CODE (y) == HIGH)
629 y = XEXP (y, 0);
630 else if (GET_CODE (y) == LO_SUM)
631 y = XEXP (y, 1);
632 else
633 y = canon_rtx (y);
634
635 if (rtx_equal_for_memref_p (x, y))
636 {
c02f035f 637 if (xsize <= 0 || ysize <= 0)
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638 return 1;
639 if (c >= 0 && xsize > c)
640 return 1;
641 if (c < 0 && ysize+c > 0)
642 return 1;
643 return 0;
644 }
645
646 if (y == frame_pointer_rtx || y == hard_frame_pointer_rtx
96286722 647 || y == stack_pointer_rtx || y == arg_pointer_rtx)
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648 {
649 rtx t = y;
650 int tsize = ysize;
651 y = x; ysize = xsize;
652 x = t; xsize = tsize;
653 }
654
655 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
96286722 656 || x == stack_pointer_rtx || x == arg_pointer_rtx)
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JL
657 {
658 rtx y1;
659
660 if (CONSTANT_P (y))
661 return 0;
662
663 if (GET_CODE (y) == PLUS
664 && canon_rtx (XEXP (y, 0)) == x
665 && (y1 = canon_rtx (XEXP (y, 1)))
666 && GET_CODE (y1) == CONST_INT)
667 {
668 c += INTVAL (y1);
c02f035f 669 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
670 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
671 }
672
673 if (GET_CODE (y) == PLUS
674 && (y1 = canon_rtx (XEXP (y, 0)))
675 && CONSTANT_P (y1))
676 return 0;
677
678 return 1;
679 }
680
681 if (GET_CODE (x) == PLUS)
682 {
683 /* The fact that X is canonicalized means that this
684 PLUS rtx is canonicalized. */
685 rtx x0 = XEXP (x, 0);
686 rtx x1 = XEXP (x, 1);
687
688 if (GET_CODE (y) == PLUS)
689 {
690 /* The fact that Y is canonicalized means that this
691 PLUS rtx is canonicalized. */
692 rtx y0 = XEXP (y, 0);
693 rtx y1 = XEXP (y, 1);
694
695 if (rtx_equal_for_memref_p (x1, y1))
696 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
697 if (rtx_equal_for_memref_p (x0, y0))
698 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
699 if (GET_CODE (x1) == CONST_INT)
700 if (GET_CODE (y1) == CONST_INT)
701 return memrefs_conflict_p (xsize, x0, ysize, y0,
702 c - INTVAL (x1) + INTVAL (y1));
703 else
704 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
705 else if (GET_CODE (y1) == CONST_INT)
706 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
707
708 /* Handle case where we cannot understand iteration operators,
709 but we notice that the base addresses are distinct objects. */
710 /* ??? Is this still necessary? */
711 x = find_symbolic_term (x);
712 if (x == 0)
713 return 1;
714 y = find_symbolic_term (y);
715 if (y == 0)
716 return 1;
717 return rtx_equal_for_memref_p (x, y);
718 }
719 else if (GET_CODE (x1) == CONST_INT)
720 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
721 }
722 else if (GET_CODE (y) == PLUS)
723 {
724 /* The fact that Y is canonicalized means that this
725 PLUS rtx is canonicalized. */
726 rtx y0 = XEXP (y, 0);
727 rtx y1 = XEXP (y, 1);
728
729 if (GET_CODE (y1) == CONST_INT)
730 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
731 else
732 return 1;
733 }
734
735 if (GET_CODE (x) == GET_CODE (y))
736 switch (GET_CODE (x))
737 {
738 case MULT:
739 {
740 /* Handle cases where we expect the second operands to be the
741 same, and check only whether the first operand would conflict
742 or not. */
743 rtx x0, y0;
744 rtx x1 = canon_rtx (XEXP (x, 1));
745 rtx y1 = canon_rtx (XEXP (y, 1));
746 if (! rtx_equal_for_memref_p (x1, y1))
747 return 1;
748 x0 = canon_rtx (XEXP (x, 0));
749 y0 = canon_rtx (XEXP (y, 0));
750 if (rtx_equal_for_memref_p (x0, y0))
751 return (xsize == 0 || ysize == 0
752 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
753
754 /* Can't properly adjust our sizes. */
755 if (GET_CODE (x1) != CONST_INT)
756 return 1;
757 xsize /= INTVAL (x1);
758 ysize /= INTVAL (x1);
759 c /= INTVAL (x1);
760 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
761 }
762 }
763
764 /* Treat an access through an AND (e.g. a subword access on an Alpha)
765 as an access with indeterminate size. */
766 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
c02f035f 767 return memrefs_conflict_p (-1, XEXP (x, 0), ysize, y, c);
9ae8ffe7 768 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f
RH
769 {
770 /* XXX: If we are indexing far enough into the array/structure, we
771 may yet be able to determine that we can not overlap. But we
772 also need to that we are far enough from the end not to overlap
773 a following reference, so we do nothing for now. */
774 return memrefs_conflict_p (xsize, x, -1, XEXP (y, 0), c);
775 }
9ae8ffe7
JL
776
777 if (CONSTANT_P (x))
778 {
779 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
780 {
781 c += (INTVAL (y) - INTVAL (x));
c02f035f 782 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
783 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
784 }
785
786 if (GET_CODE (x) == CONST)
787 {
788 if (GET_CODE (y) == CONST)
789 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
790 ysize, canon_rtx (XEXP (y, 0)), c);
791 else
792 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
793 ysize, y, c);
794 }
795 if (GET_CODE (y) == CONST)
796 return memrefs_conflict_p (xsize, x, ysize,
797 canon_rtx (XEXP (y, 0)), c);
798
799 if (CONSTANT_P (y))
c02f035f
RH
800 return (xsize < 0 || ysize < 0
801 || (rtx_equal_for_memref_p (x, y)
802 && (xsize == 0 || ysize == 0
803 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
804
805 return 1;
806 }
807 return 1;
808}
809
810/* Functions to compute memory dependencies.
811
812 Since we process the insns in execution order, we can build tables
813 to keep track of what registers are fixed (and not aliased), what registers
814 are varying in known ways, and what registers are varying in unknown
815 ways.
816
817 If both memory references are volatile, then there must always be a
818 dependence between the two references, since their order can not be
819 changed. A volatile and non-volatile reference can be interchanged
820 though.
821
fa8b6024 822 A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never
9ae8ffe7
JL
823 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must
824 allow QImode aliasing because the ANSI C standard allows character
825 pointers to alias anything. We are assuming that characters are
fa8b6024
JW
826 always QImode here. We also must allow AND addresses, because they may
827 generate accesses outside the object being referenced. This is used to
828 generate aligned addresses from unaligned addresses, for instance, the
829 alpha storeqi_unaligned pattern. */
9ae8ffe7
JL
830
831/* Read dependence: X is read after read in MEM takes place. There can
832 only be a dependence here if both reads are volatile. */
833
834int
835read_dependence (mem, x)
836 rtx mem;
837 rtx x;
838{
839 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
840}
841
842/* True dependence: X is read after store in MEM takes place. */
843
844int
845true_dependence (mem, mem_mode, x, varies)
846 rtx mem;
847 enum machine_mode mem_mode;
848 rtx x;
849 int (*varies)();
850{
851 rtx x_addr, mem_addr;
852
853 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
854 return 1;
855
856 x_addr = XEXP (x, 0);
857 mem_addr = XEXP (mem, 0);
858
859 if (flag_alias_check && ! base_alias_check (x_addr, mem_addr))
860 return 0;
861
862 /* If X is an unchanging read, then it can't possibly conflict with any
863 non-unchanging store. It may conflict with an unchanging write though,
864 because there may be a single store to this address to initialize it.
865 Just fall through to the code below to resolve the case where we have
866 both an unchanging read and an unchanging write. This won't handle all
867 cases optimally, but the possible performance loss should be
868 negligible. */
869 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
870 return 0;
871
872 x_addr = canon_rtx (x_addr);
873 mem_addr = canon_rtx (mem_addr);
874 if (mem_mode == VOIDmode)
875 mem_mode = GET_MODE (mem);
876
edaa4ee0 877 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
6d849a2a 878 SIZE_FOR_MODE (x), x_addr, 0))
9ae8ffe7
JL
879 return 0;
880
881 /* If both references are struct references, or both are not, nothing
882 is known about aliasing.
883
884 If either reference is QImode or BLKmode, ANSI C permits aliasing.
885
886 If both addresses are constant, or both are not, nothing is known
887 about aliasing. */
888 if (MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (mem)
889 || mem_mode == QImode || mem_mode == BLKmode
57163df0 890 || GET_MODE (x) == QImode || GET_MODE (x) == BLKmode
fa8b6024 891 || GET_CODE (x_addr) == AND || GET_CODE (mem_addr) == AND
9ae8ffe7
JL
892 || varies (x_addr) == varies (mem_addr))
893 return 1;
894
895 /* One memory reference is to a constant address, one is not.
896 One is to a structure, the other is not.
897
898 If either memory reference is a variable structure the other is a
899 fixed scalar and there is no aliasing. */
900 if ((MEM_IN_STRUCT_P (mem) && varies (mem_addr))
27314274 901 || (MEM_IN_STRUCT_P (x) && varies (x_addr)))
9ae8ffe7
JL
902 return 0;
903
904 return 1;
905}
906
907/* Anti dependence: X is written after read in MEM takes place. */
908
909int
910anti_dependence (mem, x)
911 rtx mem;
912 rtx x;
913{
914 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
915 return 1;
916
917 if (flag_alias_check && ! base_alias_check (XEXP (x, 0), XEXP (mem, 0)))
918 return 0;
919
920 /* If MEM is an unchanging read, then it can't possibly conflict with
921 the store to X, because there is at most one store to MEM, and it must
922 have occurred somewhere before MEM. */
923 x = canon_rtx (x);
924 mem = canon_rtx (mem);
925 if (RTX_UNCHANGING_P (mem))
926 return 0;
927
928 return (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0),
929 SIZE_FOR_MODE (x), XEXP (x, 0), 0)
930 && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
931 && GET_MODE (mem) != QImode
fa8b6024 932 && GET_CODE (XEXP (mem, 0)) != AND
9ae8ffe7
JL
933 && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
934 && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
935 && GET_MODE (x) != QImode
fa8b6024 936 && GET_CODE (XEXP (x, 0)) != AND
9ae8ffe7
JL
937 && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem)));
938}
939
940/* Output dependence: X is written after store in MEM takes place. */
941
942int
943output_dependence (mem, x)
944 register rtx mem;
945 register rtx x;
946{
947 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
948 return 1;
949
950 if (flag_alias_check && !base_alias_check (XEXP (x, 0), XEXP (mem, 0)))
951 return 0;
952
953 x = canon_rtx (x);
954 mem = canon_rtx (mem);
955 return (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0),
956 SIZE_FOR_MODE (x), XEXP (x, 0), 0)
957 && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
958 && GET_MODE (mem) != QImode
fa8b6024 959 && GET_CODE (XEXP (mem, 0)) != AND
9ae8ffe7
JL
960 && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
961 && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
962 && GET_MODE (x) != QImode
fa8b6024 963 && GET_CODE (XEXP (x, 0)) != AND
9ae8ffe7
JL
964 && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem)));
965}
966
967void
968init_alias_analysis ()
969{
970 int maxreg = max_reg_num ();
ea64ef27 971 int changed, pass;
9ae8ffe7
JL
972 register int i;
973 register rtx insn;
974 rtx note;
975 rtx set;
976
977 reg_known_value_size = maxreg;
978
979 reg_known_value
980 = (rtx *) oballoc ((maxreg - FIRST_PSEUDO_REGISTER) * sizeof (rtx))
981 - FIRST_PSEUDO_REGISTER;
982 reg_known_equiv_p =
983 oballoc (maxreg - FIRST_PSEUDO_REGISTER) - FIRST_PSEUDO_REGISTER;
984 bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER),
985 (maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx));
986 bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER,
987 (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char));
988
989 if (flag_alias_check)
990 {
991 /* Overallocate reg_base_value to allow some growth during loop
992 optimization. Loop unrolling can create a large number of
993 registers. */
994 reg_base_value_size = maxreg * 2;
995 reg_base_value = (rtx *)oballoc (reg_base_value_size * sizeof (rtx));
ec907dd8 996 new_reg_base_value = (rtx *)alloca (reg_base_value_size * sizeof (rtx));
9ae8ffe7 997 reg_seen = (char *)alloca (reg_base_value_size);
52b7724b 998 bzero ((char *) reg_base_value, reg_base_value_size * sizeof (rtx));
ec907dd8
JL
999 }
1000
1001 /* The basic idea is that each pass through this loop will use the
1002 "constant" information from the previous pass to propagate alias
1003 information through another level of assignments.
1004
1005 This could get expensive if the assignment chains are long. Maybe
1006 we should throttle the number of iterations, possibly based on
1007 the optimization level.
1008
1009 We could propagate more information in the first pass by making use
1010 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
1011 for a pseudo is "constant".
1012
1013 A program with an uninitialized variable can cause an infinite loop
1014 here. Instead of doing a full dataflow analysis to detect such problems
1015 we just cap the number of iterations for the loop.
1016
1017 The state of the arrays for the set chain in question does not matter
1018 since the program has undefined behavior. */
ec907dd8 1019 changed = 1;
ea64ef27
JL
1020 pass = 0;
1021 while (changed && pass < MAX_ALIAS_LOOP_PASSES)
ec907dd8 1022 {
ea64ef27
JL
1023 /* Keep track of the pass number so we can break out of the loop. */
1024 pass++;
1025
ec907dd8
JL
1026 /* Assume nothing will change this iteration of the loop. */
1027 changed = 0;
1028
ec907dd8
JL
1029 /* We want to assign the same IDs each iteration of this loop, so
1030 start counting from zero each iteration of the loop. */
1031 unique_id = 0;
1032
1033 /* We're at the start of the funtion each iteration through the
1034 loop, so we're copying arguments. */
1035 copying_arguments = 1;
9ae8ffe7 1036
8072f69c
JL
1037 /* Only perform initialization of the arrays if we're actually
1038 performing alias analysis. */
1039 if (flag_alias_check)
1040 {
1041 /* Wipe the potential alias information clean for this pass. */
1042 bzero ((char *) new_reg_base_value,
1043 reg_base_value_size * sizeof (rtx));
1044
1045 /* Wipe the reg_seen array clean. */
1046 bzero ((char *) reg_seen, reg_base_value_size);
9ae8ffe7 1047
8072f69c
JL
1048 /* Mark all hard registers which may contain an address.
1049 The stack, frame and argument pointers may contain an address.
1050 An argument register which can hold a Pmode value may contain
1051 an address even if it is not in BASE_REGS.
1052
1053 The address expression is VOIDmode for an argument and
1054 Pmode for other registers. */
9ae8ffe7
JL
1055#ifndef OUTGOING_REGNO
1056#define OUTGOING_REGNO(N) N
1057#endif
8072f69c
JL
1058 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1059 /* Check whether this register can hold an incoming pointer
1060 argument. FUNCTION_ARG_REGNO_P tests outgoing register
1061 numbers, so translate if necessary due to register windows. */
1062 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
1063 && HARD_REGNO_MODE_OK (i, Pmode))
1064 new_reg_base_value[i] = gen_rtx (ADDRESS, VOIDmode,
1065 gen_rtx (REG, Pmode, i));
1066
1067 new_reg_base_value[STACK_POINTER_REGNUM]
1068 = gen_rtx (ADDRESS, Pmode, stack_pointer_rtx);
1069 new_reg_base_value[ARG_POINTER_REGNUM]
1070 = gen_rtx (ADDRESS, Pmode, arg_pointer_rtx);
1071 new_reg_base_value[FRAME_POINTER_REGNUM]
1072 = gen_rtx (ADDRESS, Pmode, frame_pointer_rtx);
2a2c8203 1073#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8072f69c
JL
1074 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
1075 = gen_rtx (ADDRESS, Pmode, hard_frame_pointer_rtx);
2a2c8203 1076#endif
8072f69c
JL
1077 if (struct_value_incoming_rtx
1078 && GET_CODE (struct_value_incoming_rtx) == REG)
1079 new_reg_base_value[REGNO (struct_value_incoming_rtx)]
1080 = gen_rtx (ADDRESS, Pmode, struct_value_incoming_rtx);
1081
1082 if (static_chain_rtx
1083 && GET_CODE (static_chain_rtx) == REG)
1084 new_reg_base_value[REGNO (static_chain_rtx)]
1085 = gen_rtx (ADDRESS, Pmode, static_chain_rtx);
1086 }
ec907dd8
JL
1087
1088 /* Walk the insns adding values to the new_reg_base_value array. */
1089 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 1090 {
ec907dd8
JL
1091 if (flag_alias_check && GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1092 {
1093 /* If this insn has a noalias note, process it, Otherwise,
1094 scan for sets. A simple set will have no side effects
1095 which could change the base value of any other register. */
1096 rtx noalias_note;
1097 if (GET_CODE (PATTERN (insn)) == SET
1098 && (noalias_note = find_reg_note (insn,
1099 REG_NOALIAS, NULL_RTX)))
1100 record_set (SET_DEST (PATTERN (insn)), 0);
1101 else
1102 note_stores (PATTERN (insn), record_set);
1103 }
1104 else if (GET_CODE (insn) == NOTE
1105 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
1106 copying_arguments = 0;
1107
1108 if ((set = single_set (insn)) != 0
1109 && GET_CODE (SET_DEST (set)) == REG
1110 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
1111 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1112 && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
1113 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
1114 && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1115 {
1116 int regno = REGNO (SET_DEST (set));
1117 reg_known_value[regno] = XEXP (note, 0);
1118 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
1119 }
9ae8ffe7 1120 }
ec907dd8
JL
1121
1122 /* Now propagate values from new_reg_base_value to reg_base_value. */
8072f69c
JL
1123 if (flag_alias_check)
1124 for (i = 0; i < reg_base_value_size; i++)
1125 {
1126 if (new_reg_base_value[i]
1127 && new_reg_base_value[i] != reg_base_value[i]
1128 && !rtx_equal_p (new_reg_base_value[i], reg_base_value[i]))
1129 {
1130 reg_base_value[i] = new_reg_base_value[i];
1131 changed = 1;
1132 }
1133 }
9ae8ffe7
JL
1134 }
1135
1136 /* Fill in the remaining entries. */
1137 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
1138 if (reg_known_value[i] == 0)
1139 reg_known_value[i] = regno_reg_rtx[i];
1140
1141 if (! flag_alias_check)
1142 return;
1143
1144 /* Simplify the reg_base_value array so that no register refers to
1145 another register, except to special registers indirectly through
1146 ADDRESS expressions.
1147
1148 In theory this loop can take as long as O(registers^2), but unless
1149 there are very long dependency chains it will run in close to linear
ea64ef27
JL
1150 time.
1151
1152 This loop may not be needed any longer now that the main loop does
1153 a better job at propagating alias information. */
1154 pass = 0;
9ae8ffe7
JL
1155 do
1156 {
1157 changed = 0;
ea64ef27 1158 pass++;
7557aa98 1159 for (i = 0; i < reg_base_value_size; i++)
9ae8ffe7
JL
1160 {
1161 rtx base = reg_base_value[i];
1162 if (base && GET_CODE (base) == REG)
1163 {
1164 int base_regno = REGNO (base);
1165 if (base_regno == i) /* register set from itself */
1166 reg_base_value[i] = 0;
1167 else
1168 reg_base_value[i] = reg_base_value[base_regno];
1169 changed = 1;
1170 }
1171 }
1172 }
ea64ef27 1173 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 1174
ec907dd8 1175 new_reg_base_value = 0;
9ae8ffe7
JL
1176 reg_seen = 0;
1177}
1178
1179void
1180end_alias_analysis ()
1181{
1182 reg_known_value = 0;
1183 reg_base_value = 0;
1184 reg_base_value_size = 0;
1185}