]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/caller-save.c
2008-08-26 Vladimir Makarov <vmakarov@redhat.com>
[thirdparty/gcc.git] / gcc / caller-save.c
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3b9d3628 1/* Save and restore call-clobbered registers which are live across a call.
8ef3d190 2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
47dd2e78 3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
3b9d3628 4
f12b58b3 5This file is part of GCC.
3b9d3628 6
f12b58b3 7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
8c4c00c1 9Software Foundation; either version 3, or (at your option) any later
f12b58b3 10version.
3b9d3628 11
f12b58b3 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
3b9d3628 16
17You should have received a copy of the GNU General Public License
8c4c00c1 18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
3b9d3628 20
21#include "config.h"
405711de 22#include "system.h"
805e22b2 23#include "coretypes.h"
24#include "tm.h"
3b9d3628 25#include "rtl.h"
42fe97ed 26#include "regs.h"
3b9d3628 27#include "insn-config.h"
28#include "flags.h"
3b9d3628 29#include "hard-reg-set.h"
30#include "recog.h"
31#include "basic-block.h"
32#include "reload.h"
0a893c29 33#include "function.h"
3b9d3628 34#include "expr.h"
ce1fd7fc 35#include "toplev.h"
6956b388 36#include "tm_p.h"
7a37d50b 37#include "addresses.h"
47dd2e78 38#include "output.h"
3072d30e 39#include "df.h"
d7be1dc6 40#include "ggc.h"
3b9d3628 41
47dd2e78 42/* Call used hard registers which can not be saved because there is no
43 insn for this. */
44HARD_REG_SET no_caller_save_reg_set;
45
b615c119 46#ifndef MAX_MOVE_MAX
47#define MAX_MOVE_MAX MOVE_MAX
48#endif
49
65748b1b 50#ifndef MIN_UNITS_PER_WORD
51#define MIN_UNITS_PER_WORD UNITS_PER_WORD
b615c119 52#endif
53
590ec786 54#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
55
379d2d5f 56/* Modes for each hard register that we can save. The smallest mode is wide
57 enough to save the entire contents of the register. When saving the
58 register because it is live we first try to save in multi-register modes.
59 If that is not possible the save is done one register at a time. */
3b9d3628 60
4c9e08a4 61static enum machine_mode
65748b1b 62 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
3b9d3628 63
64/* For each hard register, a place on the stack where it can be saved,
65 if needed. */
66
4c9e08a4 67static rtx
65748b1b 68 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
3b9d3628 69
47dd2e78 70/* The number of elements in the subsequent array. */
71static int save_slots_num;
72
73/* Allocated slots so far. */
74static rtx save_slots[FIRST_PSEUDO_REGISTER];
75
3b9d3628 76/* We will only make a register eligible for caller-save if it can be
77 saved in its widest mode with a simple SET insn as long as the memory
78 address is valid. We record the INSN_CODE is those insns here since
79 when we emit them, the addresses might not be valid, so they might not
80 be recognized. */
81
05d0dcea 82static int
d7be1dc6 83 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
4c9e08a4 84static int
d7be1dc6 85 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
3b9d3628 86
3b9d3628 87/* Set of hard regs currently residing in save area (during insn scan). */
88
89static HARD_REG_SET hard_regs_saved;
90
590ec786 91/* Number of registers currently in hard_regs_saved. */
379d2d5f 92
590ec786 93static int n_regs_saved;
379d2d5f 94
590ec786 95/* Computed by mark_referenced_regs, all regs referenced in a given
96 insn. */
97static HARD_REG_SET referenced_regs;
3b9d3628 98
590ec786 99
47dd2e78 100static int reg_save_code (int, enum machine_mode);
101static int reg_restore_code (int, enum machine_mode);
102
103struct saved_hard_reg;
104static void initiate_saved_hard_regs (void);
105static struct saved_hard_reg *new_saved_hard_reg (int, int);
106static void finish_saved_hard_regs (void);
107static int saved_hard_reg_compare_func (const void *, const void *);
108
81a410b1 109static void mark_set_regs (rtx, const_rtx, void *);
47dd2e78 110static void add_stored_regs (rtx, const_rtx, void *);
4c9e08a4 111static void mark_referenced_regs (rtx);
112static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
113 enum machine_mode *);
114static int insert_restore (struct insn_chain *, int, int, int,
115 enum machine_mode *);
116static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
117 rtx);
81a410b1 118static void add_stored_regs (rtx, const_rtx, void *);
47dd2e78 119
3b9d3628 120\f
47dd2e78 121
d7be1dc6 122static GTY(()) rtx savepat;
123static GTY(()) rtx restpat;
124static GTY(()) rtx test_reg;
125static GTY(()) rtx test_mem;
126static GTY(()) rtx saveinsn;
127static GTY(()) rtx restinsn;
128
129/* Return the INSN_CODE used to save register REG in mode MODE. */
130static int
131reg_save_code (int reg, enum machine_mode mode)
132{
133 bool ok;
134 if (cached_reg_save_code[reg][mode])
135 return cached_reg_save_code[reg][mode];
136 if (!HARD_REGNO_MODE_OK (reg, mode))
137 {
138 cached_reg_save_code[reg][mode] = -1;
0b3fe24b 139 cached_reg_restore_code[reg][mode] = -1;
d7be1dc6 140 return -1;
141 }
142
143 /* Update the register number and modes of the register
144 and memory operand. */
145 SET_REGNO (test_reg, reg);
146 PUT_MODE (test_reg, mode);
147 PUT_MODE (test_mem, mode);
148
149 /* Force re-recognition of the modified insns. */
150 INSN_CODE (saveinsn) = -1;
0b3fe24b 151 INSN_CODE (restinsn) = -1;
d7be1dc6 152
153 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
154 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
155
156 /* Now extract both insns and see if we can meet their
157 constraints. */
158 ok = (cached_reg_save_code[reg][mode] != -1
159 && cached_reg_restore_code[reg][mode] != -1);
160 if (ok)
161 {
162 extract_insn (saveinsn);
163 ok = constrain_operands (1);
164 extract_insn (restinsn);
165 ok &= constrain_operands (1);
166 }
167
168 if (! ok)
169 {
170 cached_reg_save_code[reg][mode] = -1;
171 cached_reg_restore_code[reg][mode] = -1;
172 }
173 gcc_assert (cached_reg_save_code[reg][mode]);
174 return cached_reg_save_code[reg][mode];
175}
176
177/* Return the INSN_CODE used to restore register REG in mode MODE. */
178static int
179reg_restore_code (int reg, enum machine_mode mode)
180{
181 if (cached_reg_restore_code[reg][mode])
182 return cached_reg_restore_code[reg][mode];
183 /* Populate our cache. */
184 reg_save_code (reg, mode);
185 return cached_reg_restore_code[reg][mode];
186}
187\f
3b9d3628 188/* Initialize for caller-save.
189
190 Look at all the hard registers that are used by a call and for which
191 regclass.c has not already excluded from being used across a call.
192
4c9e08a4 193 Ensure that we can find a mode to save the register and that there is a
3b9d3628 194 simple insn to save and restore the register. This latter check avoids
195 problems that would occur if we tried to save the MQ register of some
196 machines directly into memory. */
197
198void
4c9e08a4 199init_caller_save (void)
3b9d3628 200{
3b9d3628 201 rtx addr_reg;
202 int offset;
203 rtx address;
379d2d5f 204 int i, j;
3b9d3628 205
47dd2e78 206 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
3b9d3628 207 /* First find all the registers that we need to deal with and all
208 the modes that they can have. If we can't find a mode to use,
209 we can't have the register live over calls. */
210
211 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
212 {
213 if (call_used_regs[i] && ! call_fixed_regs[i])
214 {
590ec786 215 for (j = 1; j <= MOVE_MAX_WORDS; j++)
3b9d3628 216 {
301652e2 217 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
218 VOIDmode);
379d2d5f 219 if (regno_save_mode[i][j] == VOIDmode && j == 1)
220 {
221 call_fixed_regs[i] = 1;
222 SET_HARD_REG_BIT (call_fixed_reg_set, i);
223 }
3b9d3628 224 }
225 }
226 else
379d2d5f 227 regno_save_mode[i][1] = VOIDmode;
3b9d3628 228 }
229
230 /* The following code tries to approximate the conditions under which
231 we can easily save and restore a register without scratch registers or
232 other complexities. It will usually work, except under conditions where
233 the validity of an insn operand is dependent on the address offset.
234 No such cases are currently known.
235
236 We first find a typical offset from some BASE_REG_CLASS register.
237 This address is chosen by finding the first register in the class
238 and by finding the smallest power of two that is a valid offset from
239 that register in every mode we will use to save registers. */
240
241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2e6d14e8 242 if (TEST_HARD_REG_BIT
243 (reg_class_contents
47dd2e78 244 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))
3b9d3628 245 break;
246
231bd014 247 gcc_assert (i < FIRST_PSEUDO_REGISTER);
3b9d3628 248
941522d6 249 addr_reg = gen_rtx_REG (Pmode, i);
3b9d3628 250
251 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
252 {
941522d6 253 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
3b9d3628 254
255 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
379d2d5f 256 if (regno_save_mode[i][1] != VOIDmode
257 && ! strict_memory_address_p (regno_save_mode[i][1], address))
3b9d3628 258 break;
259
260 if (i == FIRST_PSEUDO_REGISTER)
261 break;
262 }
263
264 /* If we didn't find a valid address, we must use register indirect. */
265 if (offset == 0)
266 address = addr_reg;
267
268 /* Next we try to form an insn to save and restore the register. We
4c9e08a4 269 see if such an insn is recognized and meets its constraints.
0c7f5242 270
271 To avoid lots of unnecessary RTL allocation, we construct all the RTL
272 once, then modify the memory and register operands in-place. */
273
274 test_reg = gen_rtx_REG (VOIDmode, 0);
275 test_mem = gen_rtx_MEM (VOIDmode, address);
276 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
277 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
3b9d3628 278
3072d30e 279 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
280 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
55e5ddb4 281
301652e2 282 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
283 for (j = 1; j <= MOVE_MAX_WORDS; j++)
d7be1dc6 284 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
301652e2 285 {
286 regno_save_mode[i][j] = VOIDmode;
287 if (j == 1)
288 {
289 call_fixed_regs[i] = 1;
290 SET_HARD_REG_BIT (call_fixed_reg_set, i);
47dd2e78 291 if (call_used_regs[i])
292 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
301652e2 293 }
294 }
3b9d3628 295}
47dd2e78 296
3b9d3628 297\f
47dd2e78 298
3b9d3628 299/* Initialize save areas by showing that we haven't allocated any yet. */
300
301void
4c9e08a4 302init_save_areas (void)
3b9d3628 303{
379d2d5f 304 int i, j;
3b9d3628 305
306 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
590ec786 307 for (j = 1; j <= MOVE_MAX_WORDS; j++)
379d2d5f 308 regno_save_mem[i][j] = 0;
47dd2e78 309 save_slots_num = 0;
310
311}
312
313/* The structure represents a hard register which should be saved
314 through the call. It is used when the integrated register
315 allocator (IRA) is used and sharing save slots is on. */
316struct saved_hard_reg
317{
318 /* Order number starting with 0. */
319 int num;
320 /* The hard regno. */
321 int hard_regno;
322 /* Execution frequency of all calls through which given hard
323 register should be saved. */
324 int call_freq;
325 /* Stack slot reserved to save the hard register through calls. */
326 rtx slot;
327 /* True if it is first hard register in the chain of hard registers
328 sharing the same stack slot. */
329 int first_p;
330 /* Order number of the next hard register structure with the same
331 slot in the chain. -1 represents end of the chain. */
332 int next;
333};
334
335/* Map: hard register number to the corresponding structure. */
336static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
337
338/* The number of all structures representing hard registers should be
339 saved, in order words, the number of used elements in the following
340 array. */
341static int saved_regs_num;
342
343/* Pointers to all the structures. Index is the order number of the
344 corresponding structure. */
345static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
346
347/* First called function for work with saved hard registers. */
348static void
349initiate_saved_hard_regs (void)
350{
351 int i;
352
353 saved_regs_num = 0;
354 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
355 hard_reg_map[i] = NULL;
356}
357
358/* Allocate and return new saved hard register with given REGNO and
359 CALL_FREQ. */
360static struct saved_hard_reg *
361new_saved_hard_reg (int regno, int call_freq)
362{
363 struct saved_hard_reg *saved_reg;
364
365 saved_reg
366 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
367 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
368 saved_reg->num = saved_regs_num++;
369 saved_reg->hard_regno = regno;
370 saved_reg->call_freq = call_freq;
371 saved_reg->first_p = FALSE;
372 saved_reg->next = -1;
373 return saved_reg;
374}
375
376/* Free memory allocated for the saved hard registers. */
377static void
378finish_saved_hard_regs (void)
379{
380 int i;
381
382 for (i = 0; i < saved_regs_num; i++)
383 free (all_saved_regs[i]);
384}
385
386/* The function is used to sort the saved hard register structures
387 according their frequency. */
388static int
389saved_hard_reg_compare_func (const void *v1p, const void *v2p)
390{
391 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
392 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
393
394 if (flag_omit_frame_pointer)
395 {
396 if (p1->call_freq - p2->call_freq != 0)
397 return p1->call_freq - p2->call_freq;
398 }
399 else if (p2->call_freq - p1->call_freq != 0)
400 return p2->call_freq - p1->call_freq;
401
402 return p1->num - p2->num;
3b9d3628 403}
404
405/* Allocate save areas for any hard registers that might need saving.
406 We take a conservative approach here and look for call-clobbered hard
407 registers that are assigned to pseudos that cross calls. This may
408 overestimate slightly (especially if some of these registers are later
409 used as spill registers), but it should not be significant.
410
47dd2e78 411 For IRA we use priority coloring to decrease stack slots needed for
412 saving hard registers through calls. We build conflicts for them
413 to do coloring.
414
379d2d5f 415 Future work:
416
417 In the fallback case we should iterate backwards across all possible
4c9e08a4 418 modes for the save, choosing the largest available one instead of
379d2d5f 419 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
420
421 We do not try to use "move multiple" instructions that exist
4c9e08a4 422 on some machines (such as the 68k moveml). It could be a win to try
379d2d5f 423 and use them when possible. The hard part is doing it in a way that is
4c9e08a4 424 machine independent since they might be saving non-consecutive
379d2d5f 425 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
3b9d3628 426
e546118a 427void
4c9e08a4 428setup_save_areas (void)
3b9d3628 429{
379d2d5f 430 int i, j, k;
f7c44134 431 unsigned int r;
379d2d5f 432 HARD_REG_SET hard_regs_used;
379d2d5f 433
434 /* Allocate space in the save area for the largest multi-register
435 pseudos first, then work backwards to single register
436 pseudos. */
437
438 /* Find and record all call-used hard-registers in this function. */
439 CLEAR_HARD_REG_SET (hard_regs_used);
3b9d3628 440 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
394685a4 441 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
3b9d3628 442 {
f7c44134 443 unsigned int regno = reg_renumber[i];
4c9e08a4 444 unsigned int endregno
a2c6f0b7 445 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
f7c44134 446 for (r = regno; r < endregno; r++)
447 if (call_used_regs[r])
448 SET_HARD_REG_BIT (hard_regs_used, r);
379d2d5f 449 }
450
47dd2e78 451 if (flag_ira && optimize && flag_ira_share_save_slots)
452 {
453 rtx insn, slot;
454 struct insn_chain *chain, *next;
455 char *saved_reg_conflicts;
456 unsigned int regno;
457 int next_k, freq;
458 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;
459 int call_saved_regs_num;
460 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
461 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
462 reg_set_iterator rsi;
463 int best_slot_num;
464 int prev_save_slots_num;
465 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
466
467 initiate_saved_hard_regs ();
468 /* Create hard reg saved regs. */
469 for (chain = reload_insn_chain; chain != 0; chain = next)
470 {
471 insn = chain->insn;
472 next = chain->next;
473 if (GET_CODE (insn) != CALL_INSN
474 || find_reg_note (insn, REG_NORETURN, NULL))
475 continue;
476 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
477 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
478 &chain->live_throughout);
479 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
480
481 /* Record all registers set in this call insn. These don't
482 need to be saved. N.B. the call insn might set a subreg
483 of a multi-hard-reg pseudo; then the pseudo is considered
484 live during the call, but the subreg that is set
485 isn't. */
486 CLEAR_HARD_REG_SET (this_insn_sets);
487 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
488 /* Sibcalls are considered to set the return value. */
489 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
490 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
491
492 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
493 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
494 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
495 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
496 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
497 {
498 if (hard_reg_map[regno] != NULL)
499 hard_reg_map[regno]->call_freq += freq;
500 else
501 saved_reg = new_saved_hard_reg (regno, freq);
502 }
503 /* Look through all live pseudos, mark their hard registers. */
504 EXECUTE_IF_SET_IN_REG_SET
505 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
ebfce9d5 506 {
47dd2e78 507 int r = reg_renumber[regno];
508 int bound;
509
510 if (r < 0)
511 continue;
512
513 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
514 for (; r < bound; r++)
515 if (TEST_HARD_REG_BIT (used_regs, r))
516 {
517 if (hard_reg_map[r] != NULL)
518 hard_reg_map[r]->call_freq += freq;
519 else
520 saved_reg = new_saved_hard_reg (r, freq);
521 SET_HARD_REG_BIT (hard_regs_to_save, r);
522 }
ebfce9d5 523 }
47dd2e78 524 }
525 /* Find saved hard register conflicts. */
526 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
527 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
528 for (chain = reload_insn_chain; chain != 0; chain = next)
529 {
530 call_saved_regs_num = 0;
531 insn = chain->insn;
532 next = chain->next;
533 if (GET_CODE (insn) != CALL_INSN
534 || find_reg_note (insn, REG_NORETURN, NULL))
535 continue;
536 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
537 &chain->live_throughout);
538 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
539
540 /* Record all registers set in this call insn. These don't
541 need to be saved. N.B. the call insn might set a subreg
542 of a multi-hard-reg pseudo; then the pseudo is considered
543 live during the call, but the subreg that is set
544 isn't. */
545 CLEAR_HARD_REG_SET (this_insn_sets);
546 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
547 /* Sibcalls are considered to set the return value,
548 compare flow.c:propagate_one_insn. */
549 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
550 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
551
552 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
553 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
554 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
555 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
556 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
557 {
558 gcc_assert (hard_reg_map[regno] != NULL);
559 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
560 }
561 /* Look through all live pseudos, mark their hard registers. */
562 EXECUTE_IF_SET_IN_REG_SET
563 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
3b9d3628 564 {
47dd2e78 565 int r = reg_renumber[regno];
566 int bound;
567
568 if (r < 0)
569 continue;
570
571 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
572 for (; r < bound; r++)
573 if (TEST_HARD_REG_BIT (used_regs, r))
574 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
3b9d3628 575 }
47dd2e78 576 for (i = 0; i < call_saved_regs_num; i++)
577 {
578 saved_reg = call_saved_regs[i];
579 for (j = 0; j < call_saved_regs_num; j++)
580 if (i != j)
581 {
582 saved_reg2 = call_saved_regs[j];
583 saved_reg_conflicts[saved_reg->num * saved_regs_num
584 + saved_reg2->num]
585 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
586 + saved_reg->num]
587 = TRUE;
588 }
589 }
590 }
591 /* Sort saved hard regs. */
592 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
593 saved_hard_reg_compare_func);
594 /* Initiate slots available from the previous reload
595 iteration. */
596 prev_save_slots_num = save_slots_num;
597 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
598 save_slots_num = 0;
599 /* Allocate stack slots for the saved hard registers. */
600 for (i = 0; i < saved_regs_num; i++)
601 {
602 saved_reg = all_saved_regs[i];
603 regno = saved_reg->hard_regno;
604 for (j = 0; j < i; j++)
605 {
606 saved_reg2 = all_saved_regs[j];
607 if (! saved_reg2->first_p)
608 continue;
609 slot = saved_reg2->slot;
610 for (k = j; k >= 0; k = next_k)
611 {
612 saved_reg3 = all_saved_regs[k];
613 next_k = saved_reg3->next;
614 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
615 + saved_reg3->num])
616 break;
617 }
618 if (k < 0
619 && (GET_MODE_SIZE (regno_save_mode[regno][1])
620 <= GET_MODE_SIZE (regno_save_mode
621 [saved_reg2->hard_regno][1])))
622 {
623 saved_reg->slot
624 = adjust_address_nv
625 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
626 regno_save_mem[regno][1] = saved_reg->slot;
627 saved_reg->next = saved_reg2->next;
628 saved_reg2->next = i;
629 if (dump_file != NULL)
630 fprintf (dump_file, "%d uses slot of %d\n",
631 regno, saved_reg2->hard_regno);
632 break;
633 }
634 }
635 if (j == i)
636 {
637 saved_reg->first_p = TRUE;
638 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
639 {
640 slot = prev_save_slots[j];
641 if (slot == NULL_RTX)
642 continue;
643 if (GET_MODE_SIZE (regno_save_mode[regno][1])
644 <= GET_MODE_SIZE (GET_MODE (slot))
645 && best_slot_num < 0)
646 best_slot_num = j;
647 if (GET_MODE (slot) == regno_save_mode[regno][1])
648 break;
649 }
650 if (best_slot_num >= 0)
651 {
652 saved_reg->slot = prev_save_slots[best_slot_num];
653 saved_reg->slot
654 = adjust_address_nv
655 (saved_reg->slot,
656 regno_save_mode[saved_reg->hard_regno][1], 0);
657 if (dump_file != NULL)
658 fprintf (dump_file,
659 "%d uses a slot from prev iteration\n", regno);
660 prev_save_slots[best_slot_num] = NULL_RTX;
661 if (best_slot_num + 1 == prev_save_slots_num)
662 prev_save_slots_num--;
663 }
664 else
665 {
666 saved_reg->slot
667 = assign_stack_local_1
668 (regno_save_mode[regno][1],
669 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true);
670 if (dump_file != NULL)
671 fprintf (dump_file, "%d uses a new slot\n", regno);
672 }
673 regno_save_mem[regno][1] = saved_reg->slot;
674 save_slots[save_slots_num++] = saved_reg->slot;
675 }
676 }
677 free (saved_reg_conflicts);
678 finish_saved_hard_regs ();
679 }
680 else
681 {
682 /* Now run through all the call-used hard-registers and allocate
683 space for them in the caller-save area. Try to allocate space
684 in a manner which allows multi-register saves/restores to be done. */
685
686 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
687 for (j = MOVE_MAX_WORDS; j > 0; j--)
688 {
689 int do_save = 1;
690
691 /* If no mode exists for this size, try another. Also break out
692 if we have already saved this hard register. */
693 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
694 continue;
695
696 /* See if any register in this group has been saved. */
697 for (k = 0; k < j; k++)
698 if (regno_save_mem[i + k][1])
699 {
700 do_save = 0;
701 break;
702 }
703 if (! do_save)
704 continue;
705
706 for (k = 0; k < j; k++)
707 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
708 {
709 do_save = 0;
710 break;
711 }
712 if (! do_save)
713 continue;
714
715 /* We have found an acceptable mode to store in. Since
716 hard register is always saved in the widest mode
717 available, the mode may be wider than necessary, it is
718 OK to reduce the alignment of spill space. We will
719 verify that it is equal to or greater than required
720 when we restore and save the hard register in
721 insert_restore and insert_save. */
722 regno_save_mem[i][j]
723 = assign_stack_local_1 (regno_save_mode[i][j],
724 GET_MODE_SIZE (regno_save_mode[i][j]),
725 0, true);
726
727 /* Setup single word save area just in case... */
728 for (k = 0; k < j; k++)
729 /* This should not depend on WORDS_BIG_ENDIAN.
730 The order of words in regs is the same as in memory. */
731 regno_save_mem[i + k][1]
732 = adjust_address_nv (regno_save_mem[i][j],
733 regno_save_mode[i + k][1],
734 k * UNITS_PER_WORD);
735 }
736 }
f7c44134 737
738 /* Now loop again and set the alias set of any save areas we made to
739 the alias set used to represent frame objects. */
740 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
741 for (j = MOVE_MAX_WORDS; j > 0; j--)
742 if (regno_save_mem[i][j] != 0)
ab6ab77e 743 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
3b9d3628 744}
47dd2e78 745
3b9d3628 746\f
47dd2e78 747
e546118a 748/* Find the places where hard regs are live across calls and save them. */
f7c44134 749
3b9d3628 750void
4c9e08a4 751save_call_clobbered_regs (void)
3b9d3628 752{
590ec786 753 struct insn_chain *chain, *next;
301652e2 754 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
590ec786 755
d7e1f248 756 /* Computed in mark_set_regs, holds all registers set by the current
757 instruction. */
758 HARD_REG_SET this_insn_sets;
759
590ec786 760 CLEAR_HARD_REG_SET (hard_regs_saved);
761 n_regs_saved = 0;
3b9d3628 762
590ec786 763 for (chain = reload_insn_chain; chain != 0; chain = next)
3b9d3628 764 {
590ec786 765 rtx insn = chain->insn;
766 enum rtx_code code = GET_CODE (insn);
767
768 next = chain->next;
769
231bd014 770 gcc_assert (!chain->is_caller_save_insn);
590ec786 771
6720e96c 772 if (INSN_P (insn))
3b9d3628 773 {
590ec786 774 /* If some registers have been saved, see if INSN references
775 any of them. We must restore them before the insn if so. */
3b9d3628 776
590ec786 777 if (n_regs_saved)
3b9d3628 778 {
590ec786 779 int regno;
780
781 if (code == JUMP_INSN)
782 /* Restore all registers if this is a JUMP_INSN. */
783 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
c7279596 784 else
60d61663 785 {
590ec786 786 CLEAR_HARD_REG_SET (referenced_regs);
787 mark_referenced_regs (PATTERN (insn));
788 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
60d61663 789 }
3b9d3628 790
590ec786 791 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
792 if (TEST_HARD_REG_BIT (referenced_regs, regno))
301652e2 793 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
3b9d3628 794 }
795
35c2394d 796 if (code == CALL_INSN
797 && ! SIBLING_CALL_P (insn)
798 && ! find_reg_note (insn, REG_NORETURN, NULL))
590ec786 799 {
4f917ffe 800 unsigned regno;
590ec786 801 HARD_REG_SET hard_regs_to_save;
8c97cf13 802 reg_set_iterator rsi;
590ec786 803
804 /* Use the register life information in CHAIN to compute which
a570a59f 805 regs are live during the call. */
806 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
f62c22a7 807 &chain->live_throughout);
dd5b4b36 808 /* Save hard registers always in the widest mode available. */
301652e2 809 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
810 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
811 save_mode [regno] = regno_save_mode [regno][1];
812 else
813 save_mode [regno] = VOIDmode;
814
35a3065a 815 /* Look through all live pseudos, mark their hard registers
301652e2 816 and choose proper mode for saving. */
817 EXECUTE_IF_SET_IN_REG_SET
8c97cf13 818 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
819 {
820 int r = reg_renumber[regno];
821 int nregs;
822 enum machine_mode mode;
823
47dd2e78 824 if (r < 0)
825 continue;
8c97cf13 826 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
827 mode = HARD_REGNO_CALLER_SAVE_MODE
828 (r, nregs, PSEUDO_REGNO_MODE (regno));
829 if (GET_MODE_BITSIZE (mode)
830 > GET_MODE_BITSIZE (save_mode[r]))
831 save_mode[r] = mode;
832 while (nregs-- > 0)
833 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
834 }
590ec786 835
836 /* Record all registers set in this call insn. These don't need
a570a59f 837 to be saved. N.B. the call insn might set a subreg of a
838 multi-hard-reg pseudo; then the pseudo is considered live
839 during the call, but the subreg that is set isn't. */
590ec786 840 CLEAR_HARD_REG_SET (this_insn_sets);
d7e1f248 841 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
590ec786 842
843 /* Compute which hard regs must be saved before this call. */
844 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
845 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
846 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
847 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
848
590ec786 849 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
850 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
301652e2 851 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
590ec786 852
853 /* Must recompute n_regs_saved. */
854 n_regs_saved = 0;
855 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
856 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
857 n_regs_saved++;
858 }
859 }
3b9d3628 860
47dd2e78 861 if (chain->next == 0 || chain->next->block != chain->block)
590ec786 862 {
863 int regno;
864 /* At the end of the basic block, we must restore any registers that
865 remain saved. If the last insn in the block is a JUMP_INSN, put
866 the restore before the insn, otherwise, put it after the insn. */
867
868 if (n_regs_saved)
869 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
870 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
6d7dc5b9 871 regno += insert_restore (chain, JUMP_P (insn),
301652e2 872 regno, MOVE_MAX_WORDS, save_mode);
590ec786 873 }
4c9e08a4 874 }
3b9d3628 875}
876
d7e1f248 877/* Here from note_stores, or directly from save_call_clobbered_regs, when
878 an insn stores a value in a register.
590ec786 879 Set the proper bit or bits in this_insn_sets. All pseudos that have
3b9d3628 880 been assigned hard regs have had their register number changed already,
881 so we can ignore pseudos. */
3b9d3628 882static void
81a410b1 883mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
3b9d3628 884{
19cb6b50 885 int regno, endregno, i;
364c0c59 886 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
3b9d3628 887
888 if (GET_CODE (reg) == SUBREG)
889 {
701e46d0 890 rtx inner = SUBREG_REG (reg);
8ad4c111 891 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
701e46d0 892 return;
e9de4a6b 893 regno = subreg_regno (reg);
fe2ebfc8 894 endregno = regno + subreg_nregs (reg);
701e46d0 895 }
8ad4c111 896 else if (REG_P (reg)
701e46d0 897 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
fe2ebfc8 898 {
899 regno = REGNO (reg);
a2c6f0b7 900 endregno = END_HARD_REGNO (reg);
fe2ebfc8 901 }
701e46d0 902 else
3b9d3628 903 return;
904
3b9d3628 905 for (i = regno; i < endregno; i++)
d7e1f248 906 SET_HARD_REG_BIT (*this_insn_sets, i);
3b9d3628 907}
908
a570a59f 909/* Here from note_stores when an insn stores a value in a register.
910 Set the proper bit or bits in the passed regset. All pseudos that have
911 been assigned hard regs have had their register number changed already,
912 so we can ignore pseudos. */
913static void
81a410b1 914add_stored_regs (rtx reg, const_rtx setter, void *data)
a570a59f 915{
19cb6b50 916 int regno, endregno, i;
a570a59f 917 enum machine_mode mode = GET_MODE (reg);
701e46d0 918 int offset = 0;
a570a59f 919
920 if (GET_CODE (setter) == CLOBBER)
921 return;
922
8ef3d190 923 if (GET_CODE (reg) == SUBREG
924 && REG_P (SUBREG_REG (reg))
925 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
a570a59f 926 {
701e46d0 927 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
928 GET_MODE (SUBREG_REG (reg)),
929 SUBREG_BYTE (reg),
930 GET_MODE (reg));
8ef3d190 931 regno = REGNO (SUBREG_REG (reg)) + offset;
fe2ebfc8 932 endregno = regno + subreg_nregs (reg);
a570a59f 933 }
fe2ebfc8 934 else
935 {
936 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
937 return;
a570a59f 938
fe2ebfc8 939 regno = REGNO (reg) + offset;
a2c6f0b7 940 endregno = end_hard_regno (mode, regno);
fe2ebfc8 941 }
a570a59f 942
943 for (i = regno; i < endregno; i++)
944 SET_REGNO_REG_SET ((regset) data, i);
945}
946
590ec786 947/* Walk X and record all referenced registers in REFERENCED_REGS. */
3b9d3628 948static void
4c9e08a4 949mark_referenced_regs (rtx x)
3b9d3628 950{
951 enum rtx_code code = GET_CODE (x);
d2ca078f 952 const char *fmt;
3b9d3628 953 int i, j;
954
590ec786 955 if (code == SET)
956 mark_referenced_regs (SET_SRC (x));
957 if (code == SET || code == CLOBBER)
958 {
959 x = SET_DEST (x);
960 code = GET_CODE (x);
074d3abf 961 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
962 || code == PC || code == CC0
8ad4c111 963 || (code == SUBREG && REG_P (SUBREG_REG (x))
074d3abf 964 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
9d19a10d 965 /* If we're setting only part of a multi-word register,
966 we shall mark it as referenced, because the words
967 that are not being set should be restored. */
968 && ((GET_MODE_SIZE (GET_MODE (x))
969 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
970 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
971 <= UNITS_PER_WORD))))
590ec786 972 return;
973 }
974 if (code == MEM || code == SUBREG)
975 {
976 x = XEXP (x, 0);
977 code = GET_CODE (x);
978 }
379d2d5f 979
3b9d3628 980 if (code == REG)
981 {
982 int regno = REGNO (x);
590ec786 983 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
984 : reg_renumber[regno]);
3b9d3628 985
590ec786 986 if (hardregno >= 0)
a2c6f0b7 987 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
590ec786 988 /* If this is a pseudo that did not get a hard register, scan its
989 memory location, since it might involve the use of another
990 register, which might be saved. */
991 else if (reg_equiv_mem[regno] != 0)
992 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
993 else if (reg_equiv_address[regno] != 0)
994 mark_referenced_regs (reg_equiv_address[regno]);
3b9d3628 995 return;
996 }
590ec786 997
3b9d3628 998 fmt = GET_RTX_FORMAT (code);
999 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1000 {
1001 if (fmt[i] == 'e')
590ec786 1002 mark_referenced_regs (XEXP (x, i));
3b9d3628 1003 else if (fmt[i] == 'E')
1004 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
590ec786 1005 mark_referenced_regs (XVECEXP (x, i, j));
3b9d3628 1006 }
1007}
1008\f
590ec786 1009/* Insert a sequence of insns to restore. Place these insns in front of
1010 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1011 the maximum number of registers which should be restored during this call.
1012 It should never be less than 1 since we only work with entire registers.
3b9d3628 1013
1014 Note that we have verified in init_caller_save that we can do this
1015 with a simple SET, so use it. Set INSN_CODE to what we save there
1016 since the address might not be valid so the insn might not be recognized.
1017 These insns will be reloaded and have register elimination done by
379d2d5f 1018 find_reload, so we need not worry about that here.
3b9d3628 1019
379d2d5f 1020 Return the extra number of registers saved. */
1021
1022static int
4c9e08a4 1023insert_restore (struct insn_chain *chain, int before_p, int regno,
1024 int maxrestore, enum machine_mode *save_mode)
3b9d3628 1025{
a570a59f 1026 int i, k;
2041cfd9 1027 rtx pat = NULL_RTX;
05d0dcea 1028 int code;
301652e2 1029 unsigned int numregs = 0;
d328ebdf 1030 struct insn_chain *new_chain;
301652e2 1031 rtx mem;
3b9d3628 1032
a53ff4c1 1033 /* A common failure mode if register status is not correct in the
1034 RTL is for this routine to be called with a REGNO we didn't
1035 expect to save. That will cause us to write an insn with a (nil)
1036 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1037 later, check for this common case here instead. This will remove
1038 one step in debugging such problems. */
231bd014 1039 gcc_assert (regno_save_mem[regno][1]);
0217d33f 1040
590ec786 1041 /* Get the pattern to emit and update our status.
ba84d47b 1042
590ec786 1043 See if we can restore `maxrestore' registers at once. Work
ba84d47b 1044 backwards to the single register case. */
1045 for (i = maxrestore; i > 0; i--)
3b9d3628 1046 {
a570a59f 1047 int j;
590ec786 1048 int ok = 1;
1049
1050 if (regno_save_mem[regno][i] == 0)
ba84d47b 1051 continue;
1052
590ec786 1053 for (j = 0; j < i; j++)
1054 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1055 {
1056 ok = 0;
1057 break;
1058 }
2358393e 1059 /* Must do this one restore at a time. */
ba84d47b 1060 if (! ok)
1061 continue;
590ec786 1062
ba84d47b 1063 numregs = i;
1064 break;
1065 }
379d2d5f 1066
301652e2 1067 mem = regno_save_mem [regno][numregs];
1068 if (save_mode [regno] != VOIDmode
1069 && save_mode [regno] != GET_MODE (mem)
67d6c12b 1070 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
e513d163 1071 mem = adjust_address (mem, save_mode[regno], 0);
6f5b55f8 1072 else
1073 mem = copy_rtx (mem);
ad33891d 1074
1075 /* Verify that the alignment of spill space is equal to or greater
1076 than required. */
47dd2e78 1077 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1078 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
ad33891d 1079
a570a59f 1080 pat = gen_rtx_SET (VOIDmode,
4c9e08a4 1081 gen_rtx_REG (GET_MODE (mem),
301652e2 1082 regno), mem);
d7be1dc6 1083 code = reg_restore_code (regno, GET_MODE (mem));
d328ebdf 1084 new_chain = insert_one_insn (chain, before_p, code, pat);
a570a59f 1085
1086 /* Clear status for all registers we restored. */
1087 for (k = 0; k < i; k++)
1088 {
1089 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
d328ebdf 1090 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
a570a59f 1091 n_regs_saved--;
1092 }
1093
8b332087 1094 /* Tell our callers how many extra registers we saved/restored. */
ba84d47b 1095 return numregs - 1;
1096}
379d2d5f 1097
590ec786 1098/* Like insert_restore above, but save registers instead. */
80fabb90 1099
ba84d47b 1100static int
4c9e08a4 1101insert_save (struct insn_chain *chain, int before_p, int regno,
1102 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
ba84d47b 1103{
301652e2 1104 int i;
1105 unsigned int k;
ba84d47b 1106 rtx pat = NULL_RTX;
05d0dcea 1107 int code;
301652e2 1108 unsigned int numregs = 0;
d328ebdf 1109 struct insn_chain *new_chain;
301652e2 1110 rtx mem;
379d2d5f 1111
a53ff4c1 1112 /* A common failure mode if register status is not correct in the
1113 RTL is for this routine to be called with a REGNO we didn't
1114 expect to save. That will cause us to write an insn with a (nil)
1115 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1116 later, check for this common case here. This will remove one
ba84d47b 1117 step in debugging such problems. */
231bd014 1118 gcc_assert (regno_save_mem[regno][1]);
3b9d3628 1119
590ec786 1120 /* Get the pattern to emit and update our status.
379d2d5f 1121
4c9e08a4 1122 See if we can save several registers with a single instruction.
ba84d47b 1123 Work backwards to the single register case. */
590ec786 1124 for (i = MOVE_MAX_WORDS; i > 0; i--)
ba84d47b 1125 {
a570a59f 1126 int j;
590ec786 1127 int ok = 1;
1128 if (regno_save_mem[regno][i] == 0)
ba84d47b 1129 continue;
379d2d5f 1130
590ec786 1131 for (j = 0; j < i; j++)
1132 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1133 {
1134 ok = 0;
1135 break;
1136 }
2358393e 1137 /* Must do this one save at a time. */
ba84d47b 1138 if (! ok)
1139 continue;
1140
ba84d47b 1141 numregs = i;
1142 break;
379d2d5f 1143 }
3b9d3628 1144
301652e2 1145 mem = regno_save_mem [regno][numregs];
1146 if (save_mode [regno] != VOIDmode
1147 && save_mode [regno] != GET_MODE (mem)
67d6c12b 1148 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
e513d163 1149 mem = adjust_address (mem, save_mode[regno], 0);
6f5b55f8 1150 else
1151 mem = copy_rtx (mem);
ad33891d 1152
1153 /* Verify that the alignment of spill space is equal to or greater
1154 than required. */
47dd2e78 1155 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1156 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
ad33891d 1157
301652e2 1158 pat = gen_rtx_SET (VOIDmode, mem,
1159 gen_rtx_REG (GET_MODE (mem),
a570a59f 1160 regno));
d7be1dc6 1161 code = reg_save_code (regno, GET_MODE (mem));
d328ebdf 1162 new_chain = insert_one_insn (chain, before_p, code, pat);
a570a59f 1163
1164 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1165 for (k = 0; k < numregs; k++)
1166 {
1167 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
d328ebdf 1168 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
a570a59f 1169 n_regs_saved++;
1170 }
379d2d5f 1171
8b332087 1172 /* Tell our callers how many extra registers we saved/restored. */
379d2d5f 1173 return numregs - 1;
3b9d3628 1174}
ba84d47b 1175
590ec786 1176/* Emit a new caller-save insn and set the code. */
a570a59f 1177static struct insn_chain *
4c9e08a4 1178insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
ba84d47b 1179{
590ec786 1180 rtx insn = chain->insn;
d328ebdf 1181 struct insn_chain *new_chain;
4c9e08a4 1182
ba84d47b 1183#ifdef HAVE_cc0
1184 /* If INSN references CC0, put our insns in front of the insn that sets
1185 CC0. This is always safe, since the only way we could be passed an
1186 insn that references CC0 is for a restore, and doing a restore earlier
1187 isn't a problem. We do, however, assume here that CALL_INSNs don't
1188 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1189
6d7dc5b9 1190 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
ba84d47b 1191 && before_p
1192 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
590ec786 1193 chain = chain->prev, insn = chain->insn;
ba84d47b 1194#endif
1195
d328ebdf 1196 new_chain = new_insn_chain ();
ba84d47b 1197 if (before_p)
1198 {
a570a59f 1199 rtx link;
1200
d328ebdf 1201 new_chain->prev = chain->prev;
1202 if (new_chain->prev != 0)
1203 new_chain->prev->next = new_chain;
590ec786 1204 else
d328ebdf 1205 reload_insn_chain = new_chain;
590ec786 1206
d328ebdf 1207 chain->prev = new_chain;
1208 new_chain->next = chain;
1209 new_chain->insn = emit_insn_before (pat, insn);
188b3398 1210 /* ??? It would be nice if we could exclude the already / still saved
1211 registers from the live sets. */
d328ebdf 1212 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
a570a59f 1213 /* Registers that die in CHAIN->INSN still live in the new insn. */
1214 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
1215 {
1216 if (REG_NOTE_KIND (link) == REG_DEAD)
1217 {
1218 rtx reg = XEXP (link, 0);
1219 int regno, i;
1220
231bd014 1221 gcc_assert (REG_P (reg));
a570a59f 1222 regno = REGNO (reg);
1223 if (regno >= FIRST_PSEUDO_REGISTER)
1224 regno = reg_renumber[regno];
1225 if (regno < 0)
1226 continue;
67d6c12b 1227 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
a570a59f 1228 i >= 0; i--)
d328ebdf 1229 SET_REGNO_REG_SET (&new_chain->live_throughout, regno + i);
a570a59f 1230 }
1231 }
87bd12fc 1232
1233 /* If CHAIN->INSN is a call, then the registers which contain
1234 the arguments to the function are live in the new insn. */
1235 if (CALL_P (chain->insn))
1236 {
1237 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1238 link != NULL_RTX;
1239 link = XEXP (link, 1))
1240 {
1241 rtx arg = XEXP (link, 0);
1242
1243 if (GET_CODE (arg) == USE)
1244 {
1245 rtx reg = XEXP (arg, 0);
1246
1247 if (REG_P (reg))
1248 {
1249 int i, regno = REGNO (reg);
1250
1251 /* Registers in CALL_INSN_FUNCTION_USAGE are always
1252 hard registers. */
1253 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
1254
1255 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
1256 i >= 0; i--)
d328ebdf 1257 SET_REGNO_REG_SET (&new_chain->live_throughout, regno + i);
87bd12fc 1258 }
1259 }
1260 }
1261
1262 }
1263
d328ebdf 1264 CLEAR_REG_SET (&new_chain->dead_or_set);
5496dbfc 1265 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
d328ebdf 1266 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn;
ba84d47b 1267 }
1268 else
1269 {
d328ebdf 1270 new_chain->next = chain->next;
1271 if (new_chain->next != 0)
1272 new_chain->next->prev = new_chain;
1273 chain->next = new_chain;
1274 new_chain->prev = chain;
1275 new_chain->insn = emit_insn_after (pat, insn);
188b3398 1276 /* ??? It would be nice if we could exclude the already / still saved
1277 registers from the live sets, and observe REG_UNUSED notes. */
d328ebdf 1278 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
a570a59f 1279 /* Registers that are set in CHAIN->INSN live in the new insn.
a0c938f0 1280 (Unless there is a REG_UNUSED note for them, but we don't
a570a59f 1281 look for them here.) */
1282 note_stores (PATTERN (chain->insn), add_stored_regs,
d328ebdf 1283 &new_chain->live_throughout);
1284 CLEAR_REG_SET (&new_chain->dead_or_set);
5496dbfc 1285 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
d328ebdf 1286 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn;
ba84d47b 1287 }
d328ebdf 1288 new_chain->block = chain->block;
1289 new_chain->is_caller_save_insn = 1;
e546118a 1290
d328ebdf 1291 INSN_CODE (new_chain->insn) = code;
1292 return new_chain;
ba84d47b 1293}
d7be1dc6 1294#include "gt-caller-save.h"