]>
Commit | Line | Data |
---|---|---|
c5986054 | 1 | /* Save and restore call-clobbered registers which are live across a call. |
54bd7fd4 | 2 | Copyright (C) 1989, 1992, 1994 Free Software Foundation, Inc. |
c5986054 RS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "rtl.h" | |
22 | #include "insn-config.h" | |
23 | #include "flags.h" | |
24 | #include "regs.h" | |
25 | #include "hard-reg-set.h" | |
26 | #include "recog.h" | |
27 | #include "basic-block.h" | |
28 | #include "reload.h" | |
29 | #include "expr.h" | |
30 | ||
dc17cfda DE |
31 | #ifndef MAX_MOVE_MAX |
32 | #define MAX_MOVE_MAX MOVE_MAX | |
33 | #endif | |
34 | ||
35 | #ifndef MAX_UNITS_PER_WORD | |
36 | #define MAX_UNITS_PER_WORD UNITS_PER_WORD | |
37 | #endif | |
38 | ||
f95361c8 JL |
39 | /* Modes for each hard register that we can save. The smallest mode is wide |
40 | enough to save the entire contents of the register. When saving the | |
41 | register because it is live we first try to save in multi-register modes. | |
42 | If that is not possible the save is done one register at a time. */ | |
c5986054 | 43 | |
f95361c8 | 44 | static enum machine_mode |
dc17cfda | 45 | regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; |
c5986054 RS |
46 | |
47 | /* For each hard register, a place on the stack where it can be saved, | |
48 | if needed. */ | |
49 | ||
f95361c8 | 50 | static rtx |
dc17cfda | 51 | regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; |
c5986054 RS |
52 | |
53 | /* We will only make a register eligible for caller-save if it can be | |
54 | saved in its widest mode with a simple SET insn as long as the memory | |
55 | address is valid. We record the INSN_CODE is those insns here since | |
56 | when we emit them, the addresses might not be valid, so they might not | |
57 | be recognized. */ | |
58 | ||
f95361c8 | 59 | static enum insn_code |
dc17cfda | 60 | reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; |
f95361c8 | 61 | static enum insn_code |
dc17cfda | 62 | reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; |
c5986054 RS |
63 | |
64 | /* Set of hard regs currently live (during scan of all insns). */ | |
65 | ||
66 | static HARD_REG_SET hard_regs_live; | |
67 | ||
68 | /* Set of hard regs currently residing in save area (during insn scan). */ | |
69 | ||
70 | static HARD_REG_SET hard_regs_saved; | |
71 | ||
f95361c8 JL |
72 | /* Set of hard regs which need to be restored before referenced. */ |
73 | ||
74 | static HARD_REG_SET hard_regs_need_restore; | |
75 | ||
c5986054 RS |
76 | /* Number of registers currently in hard_regs_saved. */ |
77 | ||
78 | int n_regs_saved; | |
79 | ||
c1f04022 RK |
80 | static void set_reg_live PROTO((rtx, rtx)); |
81 | static void clear_reg_live PROTO((rtx)); | |
82 | static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode)); | |
83 | static int insert_save_restore PROTO((rtx, int, int, | |
84 | enum machine_mode, int)); | |
c5986054 | 85 | \f |
c5986054 RS |
86 | /* Initialize for caller-save. |
87 | ||
88 | Look at all the hard registers that are used by a call and for which | |
89 | regclass.c has not already excluded from being used across a call. | |
90 | ||
91 | Ensure that we can find a mode to save the register and that there is a | |
92 | simple insn to save and restore the register. This latter check avoids | |
93 | problems that would occur if we tried to save the MQ register of some | |
94 | machines directly into memory. */ | |
95 | ||
96 | void | |
97 | init_caller_save () | |
98 | { | |
99 | char *first_obj = (char *) oballoc (0); | |
100 | rtx addr_reg; | |
101 | int offset; | |
102 | rtx address; | |
f95361c8 | 103 | int i, j; |
c5986054 RS |
104 | |
105 | /* First find all the registers that we need to deal with and all | |
106 | the modes that they can have. If we can't find a mode to use, | |
107 | we can't have the register live over calls. */ | |
108 | ||
109 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
110 | { | |
111 | if (call_used_regs[i] && ! call_fixed_regs[i]) | |
112 | { | |
f95361c8 | 113 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
c5986054 | 114 | { |
f95361c8 JL |
115 | regno_save_mode[i][j] = choose_hard_reg_mode (i, j); |
116 | if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
117 | { | |
118 | call_fixed_regs[i] = 1; | |
119 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
120 | } | |
c5986054 RS |
121 | } |
122 | } | |
123 | else | |
f95361c8 | 124 | regno_save_mode[i][1] = VOIDmode; |
c5986054 RS |
125 | } |
126 | ||
127 | /* The following code tries to approximate the conditions under which | |
128 | we can easily save and restore a register without scratch registers or | |
129 | other complexities. It will usually work, except under conditions where | |
130 | the validity of an insn operand is dependent on the address offset. | |
131 | No such cases are currently known. | |
132 | ||
133 | We first find a typical offset from some BASE_REG_CLASS register. | |
134 | This address is chosen by finding the first register in the class | |
135 | and by finding the smallest power of two that is a valid offset from | |
136 | that register in every mode we will use to save registers. */ | |
137 | ||
138 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
139 | if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) | |
140 | break; | |
141 | ||
142 | if (i == FIRST_PSEUDO_REGISTER) | |
143 | abort (); | |
144 | ||
145 | addr_reg = gen_rtx (REG, Pmode, i); | |
146 | ||
147 | for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
148 | { | |
3245eea0 | 149 | address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset)); |
c5986054 RS |
150 | |
151 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
152 | if (regno_save_mode[i][1] != VOIDmode |
153 | && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
c5986054 RS |
154 | break; |
155 | ||
156 | if (i == FIRST_PSEUDO_REGISTER) | |
157 | break; | |
158 | } | |
159 | ||
160 | /* If we didn't find a valid address, we must use register indirect. */ | |
161 | if (offset == 0) | |
162 | address = addr_reg; | |
163 | ||
164 | /* Next we try to form an insn to save and restore the register. We | |
165 | see if such an insn is recognized and meets its constraints. */ | |
166 | ||
167 | start_sequence (); | |
168 | ||
169 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
170 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
171 | if (regno_save_mode[i][j] != VOIDmode) | |
172 | { | |
173 | rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address); | |
174 | rtx reg = gen_rtx (REG, regno_save_mode[i][j], i); | |
175 | rtx savepat = gen_rtx (SET, VOIDmode, mem, reg); | |
176 | rtx restpat = gen_rtx (SET, VOIDmode, reg, mem); | |
177 | rtx saveinsn = emit_insn (savepat); | |
178 | rtx restinsn = emit_insn (restpat); | |
179 | int ok; | |
180 | ||
181 | reg_save_code[i][j] = recog_memoized (saveinsn); | |
182 | reg_restore_code[i][j] = recog_memoized (restinsn); | |
183 | ||
184 | /* Now extract both insns and see if we can meet their constraints. */ | |
185 | ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1); | |
186 | if (ok) | |
187 | { | |
188 | insn_extract (saveinsn); | |
189 | ok = constrain_operands (reg_save_code[i][j], 1); | |
190 | insn_extract (restinsn); | |
191 | ok &= constrain_operands (reg_restore_code[i][j], 1); | |
192 | } | |
c5986054 | 193 | |
c515799c JL |
194 | if (! ok) |
195 | { | |
196 | regno_save_mode[i][j] = VOIDmode; | |
197 | if (j == 1) | |
198 | { | |
199 | call_fixed_regs[i] = 1; | |
200 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
201 | } | |
202 | } | |
c5986054 RS |
203 | } |
204 | ||
205 | end_sequence (); | |
206 | ||
207 | obfree (first_obj); | |
208 | } | |
209 | \f | |
210 | /* Initialize save areas by showing that we haven't allocated any yet. */ | |
211 | ||
212 | void | |
213 | init_save_areas () | |
214 | { | |
f95361c8 | 215 | int i, j; |
c5986054 RS |
216 | |
217 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
218 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
219 | regno_save_mem[i][j] = 0; | |
c5986054 RS |
220 | } |
221 | ||
222 | /* Allocate save areas for any hard registers that might need saving. | |
223 | We take a conservative approach here and look for call-clobbered hard | |
224 | registers that are assigned to pseudos that cross calls. This may | |
225 | overestimate slightly (especially if some of these registers are later | |
226 | used as spill registers), but it should not be significant. | |
227 | ||
228 | Then perform register elimination in the addresses of the save area | |
229 | locations; return 1 if all eliminated addresses are strictly valid. | |
230 | We assume that our caller has set up the elimination table to the | |
231 | worst (largest) possible offsets. | |
232 | ||
f95361c8 JL |
233 | Set *PCHANGED to 1 if we had to allocate some memory for the save area. |
234 | ||
235 | Future work: | |
236 | ||
237 | In the fallback case we should iterate backwards across all possible | |
238 | modes for the save, choosing the largest available one instead of | |
239 | falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
240 | ||
241 | We do not try to use "move multiple" instructions that exist | |
242 | on some machines (such as the 68k moveml). It could be a win to try | |
243 | and use them when possible. The hard part is doing it in a way that is | |
244 | machine independent since they might be saving non-consecutive | |
245 | registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
c5986054 RS |
246 | |
247 | int | |
248 | setup_save_areas (pchanged) | |
249 | int *pchanged; | |
250 | { | |
f95361c8 JL |
251 | int i, j, k; |
252 | HARD_REG_SET hard_regs_used; | |
c5986054 | 253 | int ok = 1; |
c5986054 | 254 | |
f95361c8 JL |
255 | |
256 | /* Allocate space in the save area for the largest multi-register | |
257 | pseudos first, then work backwards to single register | |
258 | pseudos. */ | |
259 | ||
260 | /* Find and record all call-used hard-registers in this function. */ | |
261 | CLEAR_HARD_REG_SET (hard_regs_used); | |
c5986054 RS |
262 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
263 | if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) | |
264 | { | |
265 | int regno = reg_renumber[i]; | |
f95361c8 | 266 | int endregno |
c5986054 | 267 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); |
f95361c8 | 268 | int nregs = endregno - regno; |
c5986054 | 269 | |
f95361c8 JL |
270 | for (j = 0; j < nregs; j++) |
271 | { | |
272 | if (call_used_regs[regno+j]) | |
273 | SET_HARD_REG_BIT (hard_regs_used, regno+j); | |
274 | } | |
275 | } | |
276 | ||
277 | /* Now run through all the call-used hard-registers and allocate | |
278 | space for them in the caller-save area. Try to allocate space | |
279 | in a manner which allows multi-register saves/restores to be done. */ | |
280 | ||
281 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
282 | for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--) | |
283 | { | |
284 | int ok = 1; | |
b5c2c9bc | 285 | int do_save; |
f95361c8 JL |
286 | |
287 | /* If no mode exists for this size, try another. Also break out | |
288 | if we have already saved this hard register. */ | |
289 | if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
290 | continue; | |
291 | ||
b5c2c9bc RK |
292 | /* See if any register in this group has been saved. */ |
293 | do_save = 1; | |
294 | for (k = 0; k < j; k++) | |
295 | if (regno_save_mem[i + k][1]) | |
296 | { | |
297 | do_save = 0; | |
298 | break; | |
299 | } | |
300 | if (! do_save) | |
301 | continue; | |
302 | ||
f95361c8 | 303 | for (k = 0; k < j; k++) |
c5986054 | 304 | { |
f95361c8 JL |
305 | int regno = i + k; |
306 | ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0); | |
c5986054 | 307 | } |
f95361c8 JL |
308 | |
309 | /* We have found an acceptable mode to store in. */ | |
310 | if (ok) | |
311 | { | |
312 | ||
313 | regno_save_mem[i][j] | |
314 | = assign_stack_local (regno_save_mode[i][j], | |
315 | GET_MODE_SIZE (regno_save_mode[i][j]), 0); | |
316 | ||
39fa3485 | 317 | /* Setup single word save area just in case... */ |
f95361c8 JL |
318 | for (k = 0; k < j; k++) |
319 | { | |
39fa3485 RS |
320 | /* This should not depend on WORDS_BIG_ENDIAN. |
321 | The order of words in regs is the same as in memory. */ | |
322 | rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1], | |
323 | XEXP (regno_save_mem[i][j], 0)); | |
f95361c8 | 324 | |
f95361c8 | 325 | regno_save_mem[i+k][1] |
39fa3485 | 326 | = adj_offsettable_operand (temp, k * UNITS_PER_WORD); |
f95361c8 JL |
327 | } |
328 | *pchanged = 1; | |
329 | } | |
c5986054 RS |
330 | } |
331 | ||
332 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
333 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
334 | if (regno_save_mem[i][j] != 0) | |
335 | ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]), | |
336 | XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0)); | |
c5986054 RS |
337 | |
338 | return ok; | |
339 | } | |
340 | \f | |
341 | /* Find the places where hard regs are live across calls and save them. | |
342 | ||
343 | INSN_MODE is the mode to assign to any insns that we add. This is used | |
344 | by reload to determine whether or not reloads or register eliminations | |
345 | need be done on these insns. */ | |
346 | ||
347 | void | |
348 | save_call_clobbered_regs (insn_mode) | |
349 | enum machine_mode insn_mode; | |
350 | { | |
351 | rtx insn; | |
352 | int b; | |
353 | ||
354 | for (b = 0; b < n_basic_blocks; b++) | |
355 | { | |
356 | regset regs_live = basic_block_live_at_start[b]; | |
34536f93 | 357 | rtx prev_block_last = PREV_INSN (basic_block_head[b]); |
3245eea0 CH |
358 | REGSET_ELT_TYPE bit; |
359 | int offset, i, j; | |
c5986054 RS |
360 | int regno; |
361 | ||
362 | /* Compute hard regs live at start of block -- this is the | |
363 | real hard regs marked live, plus live pseudo regs that | |
364 | have been renumbered to hard regs. No registers have yet been | |
365 | saved because we restore all of them before the end of the basic | |
366 | block. */ | |
367 | ||
69887ad9 RK |
368 | #ifdef HARD_REG_SET |
369 | hard_regs_live = *regs_live; | |
370 | #else | |
371 | COPY_HARD_REG_SET (hard_regs_live, regs_live); | |
372 | #endif | |
c5986054 RS |
373 | |
374 | CLEAR_HARD_REG_SET (hard_regs_saved); | |
f95361c8 | 375 | CLEAR_HARD_REG_SET (hard_regs_need_restore); |
c5986054 RS |
376 | n_regs_saved = 0; |
377 | ||
378 | for (offset = 0, i = 0; offset < regset_size; offset++) | |
379 | { | |
380 | if (regs_live[offset] == 0) | |
3245eea0 | 381 | i += REGSET_ELT_BITS; |
c5986054 RS |
382 | else |
383 | for (bit = 1; bit && i < max_regno; bit <<= 1, i++) | |
384 | if ((regs_live[offset] & bit) | |
385 | && (regno = reg_renumber[i]) >= 0) | |
386 | for (j = regno; | |
387 | j < regno + HARD_REGNO_NREGS (regno, | |
388 | PSEUDO_REGNO_MODE (i)); | |
389 | j++) | |
390 | SET_HARD_REG_BIT (hard_regs_live, j); | |
f95361c8 | 391 | |
c5986054 RS |
392 | } |
393 | ||
394 | /* Now scan the insns in the block, keeping track of what hard | |
395 | regs are live as we go. When we see a call, save the live | |
396 | call-clobbered hard regs. */ | |
397 | ||
398 | for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn)) | |
399 | { | |
400 | RTX_CODE code = GET_CODE (insn); | |
401 | ||
402 | if (GET_RTX_CLASS (code) == 'i') | |
403 | { | |
404 | rtx link; | |
405 | ||
406 | /* If some registers have been saved, see if INSN references | |
407 | any of them. We must restore them before the insn if so. */ | |
408 | ||
409 | if (n_regs_saved) | |
410 | restore_referenced_regs (PATTERN (insn), insn, insn_mode); | |
411 | ||
412 | /* NB: the normal procedure is to first enliven any | |
413 | registers set by insn, then deaden any registers that | |
414 | had their last use at insn. This is incorrect now, | |
415 | since multiple pseudos may have been mapped to the | |
416 | same hard reg, and the death notes are ambiguous. So | |
417 | it must be done in the other, safe, order. */ | |
418 | ||
419 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
420 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
421 | clear_reg_live (XEXP (link, 0)); | |
422 | ||
423 | /* When we reach a call, we need to save all registers that are | |
424 | live, call-used, not fixed, and not already saved. We must | |
425 | test at this point because registers that die in a CALL_INSN | |
426 | are not live across the call and likewise for registers that | |
427 | are born in the CALL_INSN. */ | |
428 | ||
429 | if (code == CALL_INSN) | |
f95361c8 JL |
430 | { |
431 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
432 | if (call_used_regs[regno] && ! call_fixed_regs[regno] | |
433 | && TEST_HARD_REG_BIT (hard_regs_live, regno) | |
434 | && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
435 | regno += insert_save_restore (insn, 1, regno, | |
436 | insn_mode, 0); | |
437 | #ifdef HARD_REG_SET | |
438 | hard_regs_need_restore = hard_regs_saved; | |
439 | #else | |
440 | COPY_HARD_REG_SET (hard_regs_need_restore, | |
441 | hard_regs_saved); | |
442 | #endif | |
443 | ||
444 | /* Must recompute n_regs_saved. */ | |
445 | n_regs_saved = 0; | |
446 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
447 | if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
448 | n_regs_saved++; | |
449 | ||
450 | } | |
c5986054 RS |
451 | |
452 | note_stores (PATTERN (insn), set_reg_live); | |
453 | ||
454 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
455 | if (REG_NOTE_KIND (link) == REG_UNUSED) | |
456 | clear_reg_live (XEXP (link, 0)); | |
457 | } | |
458 | ||
459 | if (insn == basic_block_end[b]) | |
460 | break; | |
461 | } | |
462 | ||
463 | /* At the end of the basic block, we must restore any registers that | |
464 | remain saved. If the last insn in the block is a JUMP_INSN, put | |
465 | the restore before the insn, otherwise, put it after the insn. */ | |
466 | ||
467 | if (n_regs_saved) | |
468 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
f95361c8 JL |
469 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno)) |
470 | regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN | |
471 | ? insn : NEXT_INSN (insn)), 0, | |
472 | regno, insn_mode, MOVE_MAX / UNITS_PER_WORD); | |
473 | ||
34536f93 RS |
474 | /* If we added any insns at the start of the block, update the start |
475 | of the block to point at those insns. */ | |
476 | basic_block_head[b] = NEXT_INSN (prev_block_last); | |
c5986054 RS |
477 | } |
478 | } | |
479 | ||
480 | /* Here from note_stores when an insn stores a value in a register. | |
481 | Set the proper bit or bits in hard_regs_live. All pseudos that have | |
482 | been assigned hard regs have had their register number changed already, | |
483 | so we can ignore pseudos. */ | |
484 | ||
485 | static void | |
486 | set_reg_live (reg, setter) | |
487 | rtx reg, setter; | |
488 | { | |
489 | register int regno, endregno, i; | |
e048626b | 490 | enum machine_mode mode = GET_MODE (reg); |
c5986054 RS |
491 | int word = 0; |
492 | ||
493 | if (GET_CODE (reg) == SUBREG) | |
494 | { | |
495 | word = SUBREG_WORD (reg); | |
496 | reg = SUBREG_REG (reg); | |
497 | } | |
498 | ||
499 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
500 | return; | |
501 | ||
502 | regno = REGNO (reg) + word; | |
e048626b | 503 | endregno = regno + HARD_REGNO_NREGS (regno, mode); |
c5986054 RS |
504 | |
505 | for (i = regno; i < endregno; i++) | |
f95361c8 JL |
506 | { |
507 | SET_HARD_REG_BIT (hard_regs_live, i); | |
508 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); | |
509 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); | |
510 | } | |
c5986054 RS |
511 | } |
512 | ||
513 | /* Here when a REG_DEAD note records the last use of a reg. Clear | |
514 | the appropriate bit or bits in hard_regs_live. Again we can ignore | |
515 | pseudos. */ | |
516 | ||
517 | static void | |
518 | clear_reg_live (reg) | |
519 | rtx reg; | |
520 | { | |
521 | register int regno, endregno, i; | |
522 | ||
523 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
524 | return; | |
525 | ||
526 | regno = REGNO (reg); | |
527 | endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
528 | ||
529 | for (i = regno; i < endregno; i++) | |
f95361c8 JL |
530 | { |
531 | CLEAR_HARD_REG_BIT (hard_regs_live, i); | |
532 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); | |
533 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); | |
534 | } | |
c5986054 RS |
535 | } |
536 | \f | |
537 | /* If any register currently residing in the save area is referenced in X, | |
538 | which is part of INSN, emit code to restore the register in front of INSN. | |
539 | INSN_MODE is the mode to assign to any insns that we add. */ | |
540 | ||
541 | static void | |
542 | restore_referenced_regs (x, insn, insn_mode) | |
543 | rtx x; | |
544 | rtx insn; | |
545 | enum machine_mode insn_mode; | |
546 | { | |
547 | enum rtx_code code = GET_CODE (x); | |
548 | char *fmt; | |
549 | int i, j; | |
550 | ||
f95361c8 JL |
551 | if (code == CLOBBER) |
552 | return; | |
553 | ||
c5986054 RS |
554 | if (code == REG) |
555 | { | |
556 | int regno = REGNO (x); | |
557 | ||
558 | /* If this is a pseudo, scan its memory location, since it might | |
559 | involve the use of another register, which might be saved. */ | |
560 | ||
561 | if (regno >= FIRST_PSEUDO_REGISTER | |
562 | && reg_equiv_mem[regno] != 0) | |
563 | restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0), | |
564 | insn, insn_mode); | |
565 | else if (regno >= FIRST_PSEUDO_REGISTER | |
566 | && reg_equiv_address[regno] != 0) | |
916f14f1 | 567 | restore_referenced_regs (reg_equiv_address[regno], |
c5986054 RS |
568 | insn, insn_mode); |
569 | ||
570 | /* Otherwise if this is a hard register, restore any piece of it that | |
571 | is currently saved. */ | |
572 | ||
573 | else if (regno < FIRST_PSEUDO_REGISTER) | |
574 | { | |
73737e86 RS |
575 | int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x)); |
576 | /* Save at most SAVEREGS at a time. This can not be larger than | |
577 | MOVE_MAX, because that causes insert_save_restore to fail. */ | |
578 | int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD); | |
19301310 | 579 | int endregno = regno + numregs; |
c5986054 | 580 | |
f95361c8 JL |
581 | for (i = regno; i < endregno; i++) |
582 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, i)) | |
73737e86 | 583 | i += insert_save_restore (insn, 0, i, insn_mode, saveregs); |
c5986054 RS |
584 | } |
585 | ||
586 | return; | |
587 | } | |
588 | ||
589 | fmt = GET_RTX_FORMAT (code); | |
590 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
591 | { | |
592 | if (fmt[i] == 'e') | |
593 | restore_referenced_regs (XEXP (x, i), insn, insn_mode); | |
594 | else if (fmt[i] == 'E') | |
595 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
596 | restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode); | |
597 | } | |
598 | } | |
599 | \f | |
600 | /* Insert a sequence of insns to save or restore, SAVE_P says which, | |
601 | REGNO. Place these insns in front of INSN. INSN_MODE is the mode | |
d8ed9afb JL |
602 | to assign to these insns. MAXRESTORE is the maximum number of registers |
603 | which should be restored during this call (when SAVE_P == 0). It should | |
604 | never be less than 1 since we only work with entire registers. | |
c5986054 RS |
605 | |
606 | Note that we have verified in init_caller_save that we can do this | |
607 | with a simple SET, so use it. Set INSN_CODE to what we save there | |
608 | since the address might not be valid so the insn might not be recognized. | |
609 | These insns will be reloaded and have register elimination done by | |
f95361c8 | 610 | find_reload, so we need not worry about that here. |
c5986054 | 611 | |
f95361c8 JL |
612 | Return the extra number of registers saved. */ |
613 | ||
614 | static int | |
615 | insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) | |
c5986054 RS |
616 | rtx insn; |
617 | int save_p; | |
618 | int regno; | |
619 | enum machine_mode insn_mode; | |
f95361c8 | 620 | int maxrestore; |
c5986054 RS |
621 | { |
622 | rtx pat; | |
623 | enum insn_code code; | |
f95361c8 | 624 | int i, numregs; |
c5986054 | 625 | |
09835ed2 RK |
626 | /* A common failure mode if register status is not correct in the RTL |
627 | is for this routine to be called with a REGNO we didn't expect to | |
628 | save. That will cause us to write an insn with a (nil) SET_DEST | |
629 | or SET_SRC. Instead of doing so and causing a crash later, check | |
630 | for this common case and abort here instead. This will remove one | |
631 | step in debugging such problems. */ | |
632 | ||
f95361c8 | 633 | if (regno_save_mem[regno][1] == 0) |
09835ed2 RK |
634 | abort (); |
635 | ||
c5986054 RS |
636 | /* If INSN is a CALL_INSN, we must insert our insns before any |
637 | USE insns in front of the CALL_INSN. */ | |
638 | ||
639 | if (GET_CODE (insn) == CALL_INSN) | |
640 | while (GET_CODE (PREV_INSN (insn)) == INSN | |
641 | && GET_CODE (PATTERN (PREV_INSN (insn))) == USE) | |
642 | insn = PREV_INSN (insn); | |
643 | ||
644 | #ifdef HAVE_cc0 | |
645 | /* If INSN references CC0, put our insns in front of the insn that sets | |
646 | CC0. This is always safe, since the only way we could be passed an | |
647 | insn that references CC0 is for a restore, and doing a restore earlier | |
648 | isn't a problem. We do, however, assume here that CALL_INSNs don't | |
649 | reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
650 | ||
651 | if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) | |
652 | && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
653 | insn = prev_nonnote_insn (insn); | |
654 | #endif | |
655 | ||
656 | /* Get the pattern to emit and update our status. */ | |
657 | if (save_p) | |
658 | { | |
f95361c8 JL |
659 | int i, j, k; |
660 | int ok; | |
661 | ||
662 | /* See if we can save several registers with a single instruction. | |
663 | Work backwards to the single register case. */ | |
664 | for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--) | |
665 | { | |
666 | ok = 1; | |
667 | if (regno_save_mem[regno][i] != 0) | |
668 | for (j = 0; j < i; j++) | |
669 | { | |
9233f8ce RS |
670 | if (! call_used_regs[regno + j] || call_fixed_regs[regno + j] |
671 | || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j) | |
672 | || TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
f95361c8 JL |
673 | ok = 0; |
674 | } | |
675 | else | |
676 | continue; | |
677 | ||
678 | /* Must do this one save at a time */ | |
679 | if (! ok) | |
680 | continue; | |
681 | ||
682 | pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i], | |
683 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno)); | |
684 | code = reg_save_code[regno][i]; | |
685 | ||
686 | /* Set hard_regs_saved for all the registers we saved. */ | |
687 | for (k = 0; k < i; k++) | |
688 | { | |
689 | SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
690 | SET_HARD_REG_BIT (hard_regs_need_restore, regno + k); | |
691 | n_regs_saved++; | |
692 | } | |
693 | ||
694 | numregs = i; | |
695 | break; | |
696 | } | |
c5986054 RS |
697 | } |
698 | else | |
699 | { | |
f95361c8 JL |
700 | int i, j, k; |
701 | int ok; | |
702 | ||
703 | /* See if we can restore `maxrestore' registers at once. Work | |
704 | backwards to the single register case. */ | |
705 | for (i = maxrestore; i > 0; i--) | |
706 | { | |
707 | ok = 1; | |
708 | if (regno_save_mem[regno][i]) | |
709 | for (j = 0; j < i; j++) | |
710 | { | |
711 | if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j)) | |
712 | ok = 0; | |
713 | } | |
714 | else | |
715 | continue; | |
716 | ||
717 | /* Must do this one restore at a time */ | |
718 | if (! ok) | |
719 | continue; | |
720 | ||
721 | pat = gen_rtx (SET, VOIDmode, | |
722 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), | |
723 | regno), | |
724 | regno_save_mem[regno][i]); | |
725 | code = reg_restore_code[regno][i]; | |
c5986054 | 726 | |
f95361c8 JL |
727 | |
728 | /* Clear status for all registers we restored. */ | |
729 | for (k = 0; k < i; k++) | |
730 | { | |
731 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k); | |
732 | n_regs_saved--; | |
733 | } | |
734 | ||
735 | numregs = i; | |
736 | break; | |
737 | } | |
738 | } | |
c5986054 RS |
739 | /* Emit the insn and set the code and mode. */ |
740 | ||
741 | insn = emit_insn_before (pat, insn); | |
742 | PUT_MODE (insn, insn_mode); | |
743 | INSN_CODE (insn) = code; | |
f95361c8 JL |
744 | |
745 | /* Tell our callers how many extra registers we saved/restored */ | |
746 | return numregs - 1; | |
c5986054 | 747 | } |