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3d436d2a 1/* Natural loop analysis code for GNU compiler.
5624e564 2 Copyright (C) 2002-2015 Free Software Foundation, Inc.
3d436d2a
ZD
3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
9dcd6f09 8Software Foundation; either version 3, or (at your option) any later
3d436d2a
ZD
9version.
10
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
15
16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
3d436d2a
ZD
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
c7131fb2 23#include "backend.h"
3d436d2a 24#include "rtl.h"
7932a3db 25#include "obstack.h"
3d436d2a 26#include "cfgloop.h"
c7131fb2 27#include "tree.h"
36566b39 28#include "flags.h"
36566b39 29#include "alias.h"
36566b39
PK
30#include "insn-config.h"
31#include "expmed.h"
32#include "dojump.h"
33#include "explow.h"
34#include "calls.h"
35#include "emit-rtl.h"
36#include "varasm.h"
37#include "stmt.h"
3d436d2a 38#include "expr.h"
66f97d31 39#include "graphds.h"
058e97ec 40#include "params.h"
3d436d2a 41
4391924a
RS
42struct target_cfgloop default_target_cfgloop;
43#if SWITCHABLE_TARGET
44struct target_cfgloop *this_target_cfgloop = &default_target_cfgloop;
45#endif
46
3d436d2a 47/* Checks whether BB is executed exactly once in each LOOP iteration. */
f2dca510 48
3d436d2a 49bool
ed7a4b4b 50just_once_each_iteration_p (const struct loop *loop, const_basic_block bb)
3d436d2a
ZD
51{
52 /* It must be executed at least once each iteration. */
d47cc544 53 if (!dominated_by_p (CDI_DOMINATORS, loop->latch, bb))
3d436d2a
ZD
54 return false;
55
56 /* And just once. */
57 if (bb->loop_father != loop)
58 return false;
59
60 /* But this was not enough. We might have some irreducible loop here. */
61 if (bb->flags & BB_IRREDUCIBLE_LOOP)
62 return false;
63
64 return true;
65}
66
35b07080
ZD
67/* Marks blocks and edges that are part of non-recognized loops; i.e. we
68 throw away all latch edges and mark blocks inside any remaining cycle.
69 Everything is a bit complicated due to fact we do not want to do this
70 for parts of cycles that only "pass" through some loop -- i.e. for
71 each cycle, we want to mark blocks that belong directly to innermost
cfbe3efe 72 loop containing the whole cycle.
c22cacf3 73
cfbe3efe
ZD
74 LOOPS is the loop tree. */
75
8b1c6fd7 76#define LOOP_REPR(LOOP) ((LOOP)->num + last_basic_block_for_fn (cfun))
cfbe3efe
ZD
77#define BB_REPR(BB) ((BB)->index + 1)
78
2de58650 79bool
d73be268 80mark_irreducible_loops (void)
3d436d2a 81{
3d436d2a 82 basic_block act;
2de58650 83 struct graph_edge *ge;
cfbe3efe 84 edge e;
628f6a4e 85 edge_iterator ei;
66f97d31
ZD
86 int src, dest;
87 unsigned depth;
cfbe3efe 88 struct graph *g;
0fc822d0 89 int num = number_of_loops (cfun);
66f97d31 90 struct loop *cloop;
2de58650
JH
91 bool irred_loop_found = false;
92 int i;
3d436d2a 93
d51157de
ZD
94 gcc_assert (current_loops != NULL);
95
35b07080 96 /* Reset the flags. */
fefa31b5
DM
97 FOR_BB_BETWEEN (act, ENTRY_BLOCK_PTR_FOR_FN (cfun),
98 EXIT_BLOCK_PTR_FOR_FN (cfun), next_bb)
35b07080
ZD
99 {
100 act->flags &= ~BB_IRREDUCIBLE_LOOP;
628f6a4e 101 FOR_EACH_EDGE (e, ei, act->succs)
35b07080
ZD
102 e->flags &= ~EDGE_IRREDUCIBLE_LOOP;
103 }
104
3d436d2a 105 /* Create the edge lists. */
8b1c6fd7 106 g = new_graph (last_basic_block_for_fn (cfun) + num);
cfbe3efe 107
fefa31b5
DM
108 FOR_BB_BETWEEN (act, ENTRY_BLOCK_PTR_FOR_FN (cfun),
109 EXIT_BLOCK_PTR_FOR_FN (cfun), next_bb)
628f6a4e 110 FOR_EACH_EDGE (e, ei, act->succs)
3d436d2a 111 {
c22cacf3 112 /* Ignore edges to exit. */
fefa31b5 113 if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun))
3d436d2a 114 continue;
cfbe3efe 115
598ec7bd
ZD
116 src = BB_REPR (act);
117 dest = BB_REPR (e->dest);
cfbe3efe 118
d51157de
ZD
119 /* Ignore latch edges. */
120 if (e->dest->loop_father->header == e->dest
121 && e->dest->loop_father->latch == act)
122 continue;
123
124 /* Edges inside a single loop should be left where they are. Edges
125 to subloop headers should lead to representative of the subloop,
126 but from the same place.
cfbe3efe 127
d51157de
ZD
128 Edges exiting loops should lead from representative
129 of the son of nearest common ancestor of the loops in that
130 act lays. */
131
132 if (e->dest->loop_father->header == e->dest)
133 dest = LOOP_REPR (e->dest->loop_father);
134
135 if (!flow_bb_inside_loop_p (act->loop_father, e->dest))
136 {
137 depth = 1 + loop_depth (find_common_loop (act->loop_father,
138 e->dest->loop_father));
139 if (depth == loop_depth (act->loop_father))
140 cloop = act->loop_father;
141 else
9771b263 142 cloop = (*act->loop_father->superloops)[depth];
d51157de
ZD
143
144 src = LOOP_REPR (cloop);
3d436d2a 145 }
cfbe3efe 146
66f97d31 147 add_edge (g, src, dest)->data = e;
3d436d2a
ZD
148 }
149
66f97d31
ZD
150 /* Find the strongly connected components. */
151 graphds_scc (g, NULL);
3d436d2a 152
cfbe3efe 153 /* Mark the irreducible loops. */
2de58650
JH
154 for (i = 0; i < g->n_vertices; i++)
155 for (ge = g->vertices[i].succ; ge; ge = ge->succ_next)
156 {
157 edge real = (edge) ge->data;
158 /* edge E in graph G is irreducible if it connects two vertices in the
159 same scc. */
160
161 /* All edges should lead from a component with higher number to the
162 one with lower one. */
163 gcc_assert (g->vertices[ge->src].component >= g->vertices[ge->dest].component);
164
165 if (g->vertices[ge->src].component != g->vertices[ge->dest].component)
166 continue;
167
168 real->flags |= EDGE_IRREDUCIBLE_LOOP;
169 irred_loop_found = true;
170 if (flow_bb_inside_loop_p (real->src->loop_father, real->dest))
171 real->src->flags |= BB_IRREDUCIBLE_LOOP;
172 }
3d436d2a 173
cfbe3efe 174 free_graph (g);
3d436d2a 175
f87000d0 176 loops_state_set (LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS);
2de58650 177 return irred_loop_found;
3d436d2a
ZD
178}
179
180/* Counts number of insns inside LOOP. */
181int
ed7a4b4b 182num_loop_insns (const struct loop *loop)
3d436d2a
ZD
183{
184 basic_block *bbs, bb;
185 unsigned i, ninsns = 0;
1f75b71e 186 rtx_insn *insn;
3d436d2a
ZD
187
188 bbs = get_loop_body (loop);
189 for (i = 0; i < loop->num_nodes; i++)
190 {
191 bb = bbs[i];
b5b8b0ac
AO
192 FOR_BB_INSNS (bb, insn)
193 if (NONDEBUG_INSN_P (insn))
91f4cfe3 194 ninsns++;
3d436d2a 195 }
53a51cef
JJ
196 free (bbs);
197
198 if (!ninsns)
199 ninsns = 1; /* To avoid division by zero. */
d329e058 200
3d436d2a
ZD
201 return ninsns;
202}
203
204/* Counts number of insns executed on average per iteration LOOP. */
205int
ed7a4b4b 206average_num_loop_insns (const struct loop *loop)
3d436d2a
ZD
207{
208 basic_block *bbs, bb;
209 unsigned i, binsns, ninsns, ratio;
1f75b71e 210 rtx_insn *insn;
3d436d2a
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211
212 ninsns = 0;
213 bbs = get_loop_body (loop);
214 for (i = 0; i < loop->num_nodes; i++)
215 {
216 bb = bbs[i];
217
b5b8b0ac
AO
218 binsns = 0;
219 FOR_BB_INSNS (bb, insn)
220 if (NONDEBUG_INSN_P (insn))
91f4cfe3 221 binsns++;
3d436d2a
ZD
222
223 ratio = loop->header->frequency == 0
224 ? BB_FREQ_MAX
225 : (bb->frequency * BB_FREQ_MAX) / loop->header->frequency;
226 ninsns += binsns * ratio;
227 }
53a51cef 228 free (bbs);
d329e058 229
3d436d2a
ZD
230 ninsns /= BB_FREQ_MAX;
231 if (!ninsns)
232 ninsns = 1; /* To avoid division by zero. */
233
234 return ninsns;
235}
236
ac84e05e
ZD
237/* Returns expected number of iterations of LOOP, according to
238 measured or guessed profile. No bounding is done on the
239 value. */
240
241gcov_type
242expected_loop_iterations_unbounded (const struct loop *loop)
3d436d2a
ZD
243{
244 edge e;
628f6a4e 245 edge_iterator ei;
3d436d2a 246
997de8ed 247 if (loop->latch->count || loop->header->count)
3d436d2a
ZD
248 {
249 gcov_type count_in, count_latch, expected;
250
251 count_in = 0;
252 count_latch = 0;
253
628f6a4e 254 FOR_EACH_EDGE (e, ei, loop->header->preds)
3d436d2a
ZD
255 if (e->src == loop->latch)
256 count_latch = e->count;
257 else
258 count_in += e->count;
259
260 if (count_in == 0)
c22cacf3 261 expected = count_latch * 2;
bade3a00 262 else
c22cacf3 263 expected = (count_latch + count_in - 1) / count_in;
3d436d2a 264
ac84e05e 265 return expected;
3d436d2a
ZD
266 }
267 else
268 {
269 int freq_in, freq_latch;
270
271 freq_in = 0;
272 freq_latch = 0;
273
628f6a4e 274 FOR_EACH_EDGE (e, ei, loop->header->preds)
3d436d2a
ZD
275 if (e->src == loop->latch)
276 freq_latch = EDGE_FREQUENCY (e);
277 else
278 freq_in += EDGE_FREQUENCY (e);
279
280 if (freq_in == 0)
bade3a00 281 return freq_latch * 2;
3d436d2a
ZD
282
283 return (freq_latch + freq_in - 1) / freq_in;
284 }
285}
689ba89d 286
ac84e05e
ZD
287/* Returns expected number of LOOP iterations. The returned value is bounded
288 by REG_BR_PROB_BASE. */
289
290unsigned
291expected_loop_iterations (const struct loop *loop)
292{
293 gcov_type expected = expected_loop_iterations_unbounded (loop);
294 return (expected > REG_BR_PROB_BASE ? REG_BR_PROB_BASE : expected);
295}
296
689ba89d
ZD
297/* Returns the maximum level of nesting of subloops of LOOP. */
298
299unsigned
300get_loop_level (const struct loop *loop)
301{
302 const struct loop *ploop;
303 unsigned mx = 0, l;
304
305 for (ploop = loop->inner; ploop; ploop = ploop->next)
306 {
307 l = get_loop_level (ploop);
308 if (l >= mx)
309 mx = l + 1;
310 }
311 return mx;
312}
5e962776 313
5e962776
ZD
314/* Initialize the constants for computing set costs. */
315
316void
317init_set_costs (void)
318{
f40751dd 319 int speed;
1f75b71e 320 rtx_insn *seq;
c3dc5e66
RS
321 rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1);
322 rtx reg2 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 2);
323 rtx addr = gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 3);
5e962776
ZD
324 rtx mem = validize_mem (gen_rtx_MEM (SImode, addr));
325 unsigned i;
326
b5deb7b6 327 target_avail_regs = 0;
bec922f0 328 target_clobbered_regs = 0;
5e962776
ZD
329 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
330 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i)
331 && !fixed_regs[i])
bec922f0
SL
332 {
333 target_avail_regs++;
334 if (call_used_regs[i])
335 target_clobbered_regs++;
336 }
5e962776 337
8b11a64c 338 target_res_regs = 3;
5e962776 339
f40751dd
JH
340 for (speed = 0; speed < 2; speed++)
341 {
342 crtl->maybe_hot_insn_p = speed;
343 /* Set up the costs for using extra registers:
344
345 1) If not many free registers remain, we should prefer having an
346 additional move to decreasing the number of available registers.
347 (TARGET_REG_COST).
348 2) If no registers are available, we need to spill, which may require
349 storing the old value to memory and loading it back
350 (TARGET_SPILL_COST). */
351
352 start_sequence ();
353 emit_move_insn (reg1, reg2);
354 seq = get_insns ();
355 end_sequence ();
356 target_reg_cost [speed] = seq_cost (seq, speed);
357
358 start_sequence ();
359 emit_move_insn (mem, reg1);
360 emit_move_insn (reg2, mem);
361 seq = get_insns ();
362 end_sequence ();
363 target_spill_cost [speed] = seq_cost (seq, speed);
364 }
365 default_rtl_profile ();
5e962776
ZD
366}
367
a154b43a
ZD
368/* Estimates cost of increased register pressure caused by making N_NEW new
369 registers live around the loop. N_OLD is the number of registers live
bec922f0
SL
370 around the loop. If CALL_P is true, also take into account that
371 call-used registers may be clobbered in the loop body, reducing the
372 number of available registers before we spill. */
5e962776
ZD
373
374unsigned
bec922f0
SL
375estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed,
376 bool call_p)
5e962776 377{
058e97ec 378 unsigned cost;
a154b43a 379 unsigned regs_needed = n_new + n_old;
bec922f0
SL
380 unsigned available_regs = target_avail_regs;
381
382 /* If there is a call in the loop body, the call-clobbered registers
383 are not available for loop invariants. */
384 if (call_p)
385 available_regs = available_regs - target_clobbered_regs;
5e962776 386
a154b43a
ZD
387 /* If we have enough registers, we should use them and not restrict
388 the transformations unnecessarily. */
bec922f0 389 if (regs_needed + target_res_regs <= available_regs)
a154b43a
ZD
390 return 0;
391
bec922f0 392 if (regs_needed <= available_regs)
058e97ec
VM
393 /* If we are close to running out of registers, try to preserve
394 them. */
f40751dd 395 cost = target_reg_cost [speed] * n_new;
058e97ec
VM
396 else
397 /* If we run out of registers, it is very expensive to add another
398 one. */
f40751dd 399 cost = target_spill_cost [speed] * n_new;
058e97ec 400
2af2dbdc
VM
401 if (optimize && (flag_ira_region == IRA_REGION_ALL
402 || flag_ira_region == IRA_REGION_MIXED)
0fc822d0 403 && number_of_loops (cfun) <= (unsigned) IRA_MAX_LOOPS_NUM)
058e97ec
VM
404 /* IRA regional allocation deals with high register pressure
405 better. So decrease the cost (to do more accurate the cost
406 calculation for IRA, we need to know how many registers lives
407 through the loop transparently). */
408 cost /= 2;
409
410 return cost;
5e962776
ZD
411}
412
d73be268 413/* Sets EDGE_LOOP_EXIT flag for all loop exits. */
70388d94
ZD
414
415void
d73be268 416mark_loop_exit_edges (void)
70388d94
ZD
417{
418 basic_block bb;
419 edge e;
c22cacf3 420
0fc822d0 421 if (number_of_loops (cfun) <= 1)
70388d94
ZD
422 return;
423
11cd3bed 424 FOR_EACH_BB_FN (bb, cfun)
70388d94
ZD
425 {
426 edge_iterator ei;
427
70388d94
ZD
428 FOR_EACH_EDGE (e, ei, bb->succs)
429 {
9ba025a2 430 if (loop_outer (bb->loop_father)
2ff3e325 431 && loop_exit_edge_p (bb->loop_father, e))
70388d94
ZD
432 e->flags |= EDGE_LOOP_EXIT;
433 else
434 e->flags &= ~EDGE_LOOP_EXIT;
435 }
436 }
437}
438
f9bf4777
JH
439/* Return exit edge if loop has only one exit that is likely
440 to be executed on runtime (i.e. it is not EH or leading
441 to noreturn call. */
442
443edge
444single_likely_exit (struct loop *loop)
445{
446 edge found = single_exit (loop);
9771b263 447 vec<edge> exits;
f9bf4777
JH
448 unsigned i;
449 edge ex;
450
451 if (found)
452 return found;
453 exits = get_loop_exit_edges (loop);
9771b263 454 FOR_EACH_VEC_ELT (exits, i, ex)
f9bf4777
JH
455 {
456 if (ex->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
457 continue;
458 /* The constant of 5 is set in a way so noreturn calls are
459 ruled out by this test. The static branch prediction algorithm
460 will not assign such a low probability to conditionals for usual
461 reasons. */
0a6a6ac9 462 if (profile_status_for_fn (cfun) != PROFILE_ABSENT
f9bf4777
JH
463 && ex->probability < 5 && !ex->count)
464 continue;
465 if (!found)
466 found = ex;
467 else
468 {
9771b263 469 exits.release ();
f9bf4777
JH
470 return NULL;
471 }
472 }
9771b263 473 exits.release ();
f9bf4777
JH
474 return found;
475}
519cac4a
JH
476
477
478/* Gets basic blocks of a LOOP. Header is the 0-th block, rest is in dfs
479 order against direction of edges from latch. Specially, if
480 header != latch, latch is the 1-st block. */
481
9771b263 482vec<basic_block>
519cac4a
JH
483get_loop_hot_path (const struct loop *loop)
484{
485 basic_block bb = loop->header;
6e1aa848 486 vec<basic_block> path = vNULL;
519cac4a
JH
487 bitmap visited = BITMAP_ALLOC (NULL);
488
489 while (true)
490 {
491 edge_iterator ei;
492 edge e;
493 edge best = NULL;
494
9771b263 495 path.safe_push (bb);
519cac4a
JH
496 bitmap_set_bit (visited, bb->index);
497 FOR_EACH_EDGE (e, ei, bb->succs)
498 if ((!best || e->probability > best->probability)
499 && !loop_exit_edge_p (loop, e)
500 && !bitmap_bit_p (visited, e->dest->index))
501 best = e;
502 if (!best || best->dest == loop->header)
503 break;
504 bb = best->dest;
505 }
506 BITMAP_FREE (visited);
507 return path;
508}