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677f3fa8 | 1 | /* Common hooks for ARM. |
cbe34bb5 | 2 | Copyright (C) 1991-2017 Free Software Foundation, Inc. |
677f3fa8 JM |
3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published | |
8 | by the Free Software Foundation; either version 3, or (at your | |
9 | option) any later version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
0b97b8f8 | 20 | #define INCLUDE_LIST |
677f3fa8 JM |
21 | #include "config.h" |
22 | #include "system.h" | |
23 | #include "coretypes.h" | |
24 | #include "tm.h" | |
4d0cdd0c | 25 | #include "memmodel.h" |
677f3fa8 JM |
26 | #include "tm_p.h" |
27 | #include "common/common-target.h" | |
28 | #include "common/common-target-def.h" | |
29 | #include "opts.h" | |
30 | #include "flags.h" | |
435d1272 RE |
31 | #include "sbitmap.h" |
32 | #include "diagnostic.h" | |
677f3fa8 JM |
33 | |
34 | /* Set default optimization options. */ | |
35 | static const struct default_options arm_option_optimization_table[] = | |
36 | { | |
37 | /* Enable section anchors by default at -O1 or higher. */ | |
38 | { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 }, | |
22969a8c | 39 | { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 }, |
677f3fa8 JM |
40 | { OPT_LEVELS_NONE, 0, NULL, 0 } |
41 | }; | |
42 | ||
43 | /* Implement TARGET_EXCEPT_UNWIND_INFO. */ | |
44 | ||
45 | enum unwind_info_type | |
46 | arm_except_unwind_info (struct gcc_options *opts) | |
47 | { | |
48 | /* Honor the --enable-sjlj-exceptions configure switch. */ | |
49 | #ifdef CONFIG_SJLJ_EXCEPTIONS | |
50 | if (CONFIG_SJLJ_EXCEPTIONS) | |
51 | return UI_SJLJ; | |
52 | #endif | |
53 | ||
54 | /* If not using ARM EABI unwind tables... */ | |
55 | if (ARM_UNWIND_INFO) | |
56 | { | |
57 | /* For simplicity elsewhere in this file, indicate that all unwind | |
58 | info is disabled if we're not emitting unwind tables. */ | |
59 | if (!opts->x_flag_exceptions && !opts->x_flag_unwind_tables) | |
60 | return UI_NONE; | |
61 | else | |
62 | return UI_TARGET; | |
63 | } | |
64 | ||
221ebb39 OH |
65 | /* ... honor target configurations requesting DWARF2 EH... */ |
66 | #ifdef DWARF2_UNWIND_INFO | |
67 | if (DWARF2_UNWIND_INFO) | |
68 | return UI_DWARF2; | |
69 | #endif | |
70 | ||
71 | /* ... or fallback to sjlj exceptions for backwards compatibility. */ | |
677f3fa8 JM |
72 | return UI_SJLJ; |
73 | } | |
74 | ||
b848e289 JG |
75 | #define ARM_CPU_NAME_LENGTH 20 |
76 | ||
86794453 | 77 | /* Truncate NAME at the first '.' or '+' character seen, or return |
b848e289 JG |
78 | NAME unmodified. */ |
79 | ||
80 | const char * | |
81 | arm_rewrite_selected_cpu (const char *name) | |
82 | { | |
83 | static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0}; | |
84 | char *arg_pos; | |
85 | ||
86 | strncpy (output_buf, name, ARM_CPU_NAME_LENGTH); | |
86794453 RE |
87 | output_buf[ARM_CPU_NAME_LENGTH] = 0; |
88 | ||
b848e289 JG |
89 | arg_pos = strchr (output_buf, '.'); |
90 | ||
91 | /* If we found a '.' truncate the entry at that point. */ | |
92 | if (arg_pos) | |
93 | *arg_pos = '\0'; | |
94 | ||
86794453 RE |
95 | arg_pos = strchr (output_buf, '+'); |
96 | ||
97 | /* If we found a '+' truncate the entry at that point. */ | |
98 | if (arg_pos) | |
99 | *arg_pos = '\0'; | |
100 | ||
b848e289 JG |
101 | return output_buf; |
102 | } | |
103 | ||
104 | /* Called by the driver to rewrite a name passed to the -mcpu | |
105 | argument in preparation to be passed to the assembler. The | |
84e90123 JG |
106 | names passed from the command line will be in ARGV, we want |
107 | to use the right-most argument, which should be in | |
108 | ARGV[ARGC - 1]. ARGC should always be greater than 0. */ | |
b848e289 JG |
109 | |
110 | const char * | |
111 | arm_rewrite_mcpu (int argc, const char **argv) | |
112 | { | |
84e90123 JG |
113 | gcc_assert (argc); |
114 | return arm_rewrite_selected_cpu (argv[argc - 1]); | |
b848e289 JG |
115 | } |
116 | ||
86794453 RE |
117 | /* Truncate NAME at the first '+' character seen, or return |
118 | NAME unmodified. Similar to arm_rewrite_selected_cpu, but we must | |
119 | preserve '.' as that is part of some architecture names. */ | |
120 | ||
121 | const char * | |
122 | arm_rewrite_selected_arch (const char *name) | |
123 | { | |
124 | static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0}; | |
125 | char *arg_pos; | |
126 | ||
127 | strncpy (output_buf, name, ARM_CPU_NAME_LENGTH); | |
128 | output_buf[ARM_CPU_NAME_LENGTH] = 0; | |
129 | ||
130 | arg_pos = strchr (output_buf, '+'); | |
131 | ||
132 | /* If we found a '+' truncate the entry at that point. */ | |
133 | if (arg_pos) | |
134 | *arg_pos = '\0'; | |
135 | ||
136 | return output_buf; | |
137 | } | |
138 | ||
139 | /* Called by the driver to rewrite a name passed to the -march | |
140 | argument in preparation to be passed to the assembler. The | |
141 | names passed from the command line will be in ARGV, we want | |
142 | to use the right-most argument, which should be in | |
143 | ARGV[ARGC - 1]. ARGC should always be greater than 0. */ | |
144 | ||
145 | const char * | |
146 | arm_rewrite_march (int argc, const char **argv) | |
147 | { | |
148 | gcc_assert (argc); | |
149 | return arm_rewrite_selected_arch (argv[argc - 1]); | |
150 | } | |
151 | ||
50061652 | 152 | #include "arm-cpu-cdata.h" |
6e4e50f5 | 153 | |
03d222fa RE |
154 | /* Scan over a raw feature array BITS checking for BIT being present. |
155 | This is slower than the normal bitmask checks, but we would spend longer | |
156 | initializing that than doing the check this way. Returns true iff | |
157 | BIT is found. */ | |
158 | static bool | |
159 | check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit) | |
160 | { | |
161 | while (*bits != isa_nobit) | |
162 | if (*bits++ == bit) | |
163 | return true; | |
164 | ||
165 | return false; | |
166 | } | |
167 | ||
70e73d3c TP |
168 | /* Called by the driver to check whether the target denoted by current |
169 | command line options is a Thumb-only target. ARGV is an array of | |
e53993ef RE |
170 | tupples (normally only one) where the first element of the tupple |
171 | is 'cpu' or 'arch' and the second is the option passed to the | |
172 | compiler for that. An architecture tupple is always taken in | |
173 | preference to a cpu tupple and the last of each type always | |
174 | overrides any earlier setting. */ | |
175 | ||
70e73d3c TP |
176 | const char * |
177 | arm_target_thumb_only (int argc, const char **argv) | |
178 | { | |
e53993ef RE |
179 | const char *arch = NULL; |
180 | const char *cpu = NULL; | |
181 | ||
182 | if (argc % 2 != 0) | |
183 | fatal_error (input_location, | |
184 | "%%:target_mode_check takes an even number of parameters"); | |
70e73d3c | 185 | |
e53993ef | 186 | while (argc) |
70e73d3c | 187 | { |
e53993ef RE |
188 | if (strcmp (argv[0], "arch") == 0) |
189 | arch = argv[1]; | |
190 | else if (strcmp (argv[0], "cpu") == 0) | |
191 | cpu = argv[1]; | |
192 | else | |
193 | fatal_error (input_location, | |
194 | "unrecognized option passed to %%:target_mode_check"); | |
195 | argc -= 2; | |
196 | argv += 2; | |
197 | } | |
198 | ||
199 | /* No architecture, or CPU, has option extensions that change | |
200 | whether or not we have a Thumb-only device, so there is no need | |
201 | to scan any option extensions specified. */ | |
70e73d3c | 202 | |
e53993ef RE |
203 | /* If the architecture is specified, that overrides any CPU setting. */ |
204 | if (arch) | |
205 | { | |
206 | const arch_option *arch_opt | |
207 | = arm_parse_arch_option_name (all_architectures, "-march", arch); | |
208 | ||
209 | if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits, | |
210 | isa_bit_notm)) | |
211 | return "-mthumb"; | |
212 | } | |
213 | else if (cpu) | |
214 | { | |
215 | const cpu_option *cpu_opt | |
216 | = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu); | |
217 | ||
218 | if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits, | |
219 | isa_bit_notm)) | |
220 | return "-mthumb"; | |
70e73d3c | 221 | } |
e53993ef | 222 | |
93aa40fe RE |
223 | /* Compiler hasn't been configured with a default, and the CPU |
224 | doesn't require Thumb, so default to ARM. */ | |
225 | return "-marm"; | |
70e73d3c TP |
226 | } |
227 | ||
435d1272 RE |
228 | /* List the permitted CPU option names. If TARGET is a near miss for an |
229 | entry, print out the suggested alternative. */ | |
230 | static void | |
231 | arm_print_hint_for_cpu_option (const char *target, | |
232 | const cpu_option *list) | |
233 | { | |
234 | auto_vec<const char*> candidates; | |
235 | for (; list->common.name != NULL; list++) | |
236 | candidates.safe_push (list->common.name); | |
237 | char *s; | |
238 | const char *hint = candidates_list_and_hint (target, s, candidates); | |
239 | if (hint) | |
240 | inform (input_location, "valid arguments are: %s; did you mean %qs?", | |
241 | s, hint); | |
242 | else | |
243 | inform (input_location, "valid arguments are: %s", s); | |
244 | ||
245 | XDELETEVEC (s); | |
246 | } | |
247 | ||
248 | /* Parse the base component of a CPU selection in LIST. Return a | |
249 | pointer to the entry in the architecture table. OPTNAME is the | |
250 | name of the option we are parsing and can be used if a diagnostic | |
251 | is needed. */ | |
252 | const cpu_option * | |
253 | arm_parse_cpu_option_name (const cpu_option *list, const char *optname, | |
254 | const char *target) | |
255 | { | |
256 | const cpu_option *entry; | |
257 | const char *end = strchr (target, '+'); | |
258 | size_t len = end ? end - target : strlen (target); | |
259 | ||
260 | for (entry = list; entry->common.name != NULL; entry++) | |
261 | { | |
262 | if (strncmp (entry->common.name, target, len) == 0 | |
263 | && entry->common.name[len] == '\0') | |
264 | return entry; | |
265 | } | |
266 | ||
267 | error_at (input_location, "unrecognized %s target: %s", optname, target); | |
268 | arm_print_hint_for_cpu_option (target, list); | |
269 | return NULL; | |
270 | } | |
271 | ||
272 | /* List the permitted architecture option names. If TARGET is a near | |
273 | miss for an entry, print out the suggested alternative. */ | |
274 | static void | |
275 | arm_print_hint_for_arch_option (const char *target, | |
276 | const arch_option *list) | |
277 | { | |
278 | auto_vec<const char*> candidates; | |
279 | for (; list->common.name != NULL; list++) | |
280 | candidates.safe_push (list->common.name); | |
281 | char *s; | |
282 | const char *hint = candidates_list_and_hint (target, s, candidates); | |
283 | if (hint) | |
284 | inform (input_location, "valid arguments are: %s; did you mean %qs?", | |
285 | s, hint); | |
286 | else | |
287 | inform (input_location, "valid arguments are: %s", s); | |
288 | ||
289 | XDELETEVEC (s); | |
290 | } | |
291 | ||
292 | /* Parse the base component of a CPU or architecture selection in | |
293 | LIST. Return a pointer to the entry in the architecture table. | |
294 | OPTNAME is the name of the option we are parsing and can be used if | |
295 | a diagnostic is needed. */ | |
296 | const arch_option * | |
297 | arm_parse_arch_option_name (const arch_option *list, const char *optname, | |
298 | const char *target) | |
299 | { | |
300 | const arch_option *entry; | |
301 | const char *end = strchr (target, '+'); | |
302 | size_t len = end ? end - target : strlen (target); | |
303 | ||
304 | for (entry = list; entry->common.name != NULL; entry++) | |
305 | { | |
306 | if (strncmp (entry->common.name, target, len) == 0 | |
307 | && entry->common.name[len] == '\0') | |
308 | return entry; | |
309 | } | |
310 | ||
311 | error_at (input_location, "unrecognized %s target: %s", optname, target); | |
312 | arm_print_hint_for_arch_option (target, list); | |
313 | return NULL; | |
314 | } | |
315 | ||
0b97b8f8 RE |
316 | /* List the permitted architecture option names. If TARGET is a near |
317 | miss for an entry, print out the suggested alternative. */ | |
318 | static void | |
319 | arm_print_hint_for_fpu_option (const char *target) | |
320 | { | |
321 | auto_vec<const char*> candidates; | |
322 | for (int i = 0; i < TARGET_FPU_auto; i++) | |
323 | candidates.safe_push (all_fpus[i].name); | |
324 | char *s; | |
325 | const char *hint = candidates_list_and_hint (target, s, candidates); | |
326 | if (hint) | |
327 | inform (input_location, "valid arguments are: %s; did you mean %qs?", | |
328 | s, hint); | |
329 | else | |
330 | inform (input_location, "valid arguments are: %s", s); | |
331 | ||
332 | XDELETEVEC (s); | |
333 | } | |
334 | ||
335 | static const arm_fpu_desc * | |
336 | arm_parse_fpu_option (const char *opt) | |
337 | { | |
338 | int i; | |
339 | ||
340 | for (i = 0; i < TARGET_FPU_auto; i++) | |
341 | { | |
342 | if (strcmp (all_fpus[i].name, opt) == 0) | |
343 | return all_fpus + i; | |
344 | } | |
345 | ||
346 | error_at (input_location, "unrecognized -mfpu target: %s", opt); | |
347 | arm_print_hint_for_fpu_option (opt); | |
348 | return NULL; | |
349 | } | |
350 | ||
435d1272 RE |
351 | /* Convert a static initializer array of feature bits to sbitmap |
352 | representation. */ | |
353 | void | |
354 | arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits) | |
355 | { | |
356 | bitmap_clear (isa); | |
357 | while (*isa_bits != isa_nobit) | |
358 | bitmap_set_bit (isa, *(isa_bits++)); | |
359 | } | |
360 | ||
361 | /* OPT isn't a recognized feature. Print a suitable error message and | |
362 | suggest a possible value. Always print the list of permitted | |
363 | values. */ | |
364 | static void | |
365 | arm_unrecognized_feature (const char *opt, size_t len, | |
366 | const cpu_arch_option *target) | |
367 | { | |
368 | char *this_opt = XALLOCAVEC (char, len+1); | |
369 | auto_vec<const char*> candidates; | |
370 | ||
371 | strncpy (this_opt, opt, len); | |
372 | this_opt[len] = 0; | |
373 | ||
374 | error_at (input_location, "%qs does not support feature %qs", target->name, | |
375 | this_opt); | |
376 | for (const cpu_arch_extension *list = target->extensions; | |
377 | list->name != NULL; | |
378 | list++) | |
379 | candidates.safe_push (list->name); | |
380 | ||
381 | char *s; | |
382 | const char *hint = candidates_list_and_hint (this_opt, s, candidates); | |
383 | ||
384 | if (hint) | |
385 | inform (input_location, "valid feature names are: %s; did you mean %qs?", | |
386 | s, hint); | |
387 | else | |
388 | inform (input_location, "valid feature names are: %s", s); | |
389 | ||
390 | XDELETEVEC (s); | |
391 | } | |
392 | ||
393 | /* Parse any feature extensions to add to (or remove from) the | |
394 | permitted ISA selection. */ | |
395 | void | |
396 | arm_parse_option_features (sbitmap isa, const cpu_arch_option *target, | |
397 | const char *opts_in) | |
398 | { | |
399 | const char *opts = opts_in; | |
400 | ||
401 | if (!opts) | |
402 | return; | |
403 | ||
404 | if (!target->extensions) | |
405 | { | |
406 | error_at (input_location, "%s does not take any feature options", | |
407 | target->name); | |
408 | return; | |
409 | } | |
410 | ||
411 | while (opts) | |
412 | { | |
413 | gcc_assert (*opts == '+'); | |
414 | const struct cpu_arch_extension *entry; | |
415 | const char *end = strchr (++opts, '+'); | |
416 | size_t len = end ? end - opts : strlen (opts); | |
417 | bool matched = false; | |
418 | ||
419 | for (entry = target->extensions; | |
420 | !matched && entry->name != NULL; | |
421 | entry++) | |
422 | { | |
423 | if (strncmp (entry->name, opts, len) == 0 | |
424 | && entry->name[len] == '\0') | |
425 | { | |
426 | if (isa) | |
427 | { | |
428 | const enum isa_feature *f = entry->isa_bits; | |
429 | if (entry->remove) | |
430 | { | |
431 | while (*f != isa_nobit) | |
432 | bitmap_clear_bit (isa, *(f++)); | |
433 | } | |
434 | else | |
435 | { | |
436 | while (*f != isa_nobit) | |
437 | bitmap_set_bit (isa, *(f++)); | |
438 | } | |
439 | } | |
440 | matched = true; | |
441 | } | |
442 | } | |
443 | ||
444 | if (!matched) | |
445 | arm_unrecognized_feature (opts, len, target); | |
446 | ||
447 | opts = end; | |
448 | } | |
449 | } | |
450 | ||
0b97b8f8 RE |
451 | class candidate_extension |
452 | { | |
453 | public: | |
454 | const cpu_arch_extension *extension; | |
455 | sbitmap isa_bits; | |
456 | bool required; | |
457 | ||
458 | candidate_extension (const cpu_arch_extension *ext, sbitmap bits) | |
459 | : extension (ext), isa_bits (bits), required (true) | |
460 | {} | |
461 | ~candidate_extension () | |
462 | { | |
463 | sbitmap_free (isa_bits); | |
464 | } | |
465 | }; | |
466 | ||
467 | /* Generate a canonical representation of the -march option from the | |
468 | current -march string (if given) and other options on the command | |
469 | line that might affect the architecture. This aids multilib selection | |
470 | by ensuring that: | |
471 | a) the option is always present | |
472 | b) only the minimal set of options are used | |
473 | c) when there are multiple extensions, they are in a consistent order. | |
474 | ||
475 | The options array consists of couplets of information where the | |
476 | first item in each couplet is the string describing which option | |
477 | name was selected (arch, cpu, fpu) and the second is the value | |
478 | passed for that option. */ | |
479 | const char * | |
480 | arm_canon_arch_option (int argc, const char **argv) | |
481 | { | |
482 | const char *arch = NULL; | |
483 | const char *cpu = NULL; | |
484 | const char *fpu = NULL; | |
485 | const char *abi = NULL; | |
486 | static char *canonical_arch = NULL; | |
487 | ||
488 | /* Just in case we're called more than once. */ | |
489 | if (canonical_arch) | |
490 | { | |
491 | free (canonical_arch); | |
492 | canonical_arch = NULL; | |
493 | } | |
494 | ||
495 | if (argc & 1) | |
496 | fatal_error (input_location, | |
497 | "%%:canon_for_mlib takes 1 or more pairs of parameters"); | |
498 | ||
499 | while (argc) | |
500 | { | |
501 | if (strcmp (argv[0], "arch") == 0) | |
502 | arch = argv[1]; | |
503 | else if (strcmp (argv[0], "cpu") == 0) | |
504 | cpu = argv[1]; | |
505 | else if (strcmp (argv[0], "fpu") == 0) | |
506 | fpu = argv[1]; | |
507 | else if (strcmp (argv[0], "abi") == 0) | |
508 | abi = argv[1]; | |
509 | else | |
510 | fatal_error (input_location, | |
511 | "unrecognized operand to %%:canon_for_mlib"); | |
512 | ||
513 | argc -= 2; | |
514 | argv += 2; | |
515 | } | |
516 | ||
517 | auto_sbitmap target_isa (isa_num_bits); | |
518 | auto_sbitmap base_isa (isa_num_bits); | |
519 | auto_sbitmap fpu_isa (isa_num_bits); | |
520 | ||
521 | bitmap_clear (fpu_isa); | |
522 | ||
523 | const arch_option *selected_arch = NULL; | |
524 | ||
525 | /* At least one of these must be defined by either the specs or the | |
526 | user. */ | |
527 | gcc_assert (cpu || arch); | |
528 | ||
529 | if (!fpu) | |
11389610 | 530 | fpu = FPUTYPE_AUTO; |
0b97b8f8 RE |
531 | |
532 | if (!abi) | |
533 | { | |
534 | if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT) | |
535 | abi = "soft"; | |
536 | else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP) | |
537 | abi = "softfp"; | |
538 | else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD) | |
539 | abi = "hard"; | |
540 | } | |
541 | ||
542 | /* First build up a bitmap describing the target architecture. */ | |
543 | if (arch) | |
544 | { | |
545 | selected_arch = arm_parse_arch_option_name (all_architectures, | |
546 | "-march", arch); | |
547 | ||
548 | if (selected_arch == NULL) | |
549 | return ""; | |
550 | ||
551 | arm_initialize_isa (target_isa, selected_arch->common.isa_bits); | |
552 | arm_parse_option_features (target_isa, &selected_arch->common, | |
553 | strchr (arch, '+')); | |
554 | if (fpu && strcmp (fpu, "auto") != 0) | |
555 | { | |
556 | /* We assume that architectures do not have any FPU bits | |
557 | enabled by default. If they did, we would need to strip | |
558 | these out first. */ | |
559 | const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu); | |
560 | if (target_fpu == NULL) | |
561 | return ""; | |
562 | ||
563 | arm_initialize_isa (fpu_isa, target_fpu->isa_bits); | |
564 | bitmap_ior (target_isa, target_isa, fpu_isa); | |
565 | } | |
566 | } | |
567 | else if (cpu) | |
568 | { | |
569 | const cpu_option *selected_cpu | |
570 | = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu); | |
571 | ||
572 | if (selected_cpu == NULL) | |
573 | return ""; | |
574 | ||
575 | arm_initialize_isa (target_isa, selected_cpu->common.isa_bits); | |
576 | arm_parse_option_features (target_isa, &selected_cpu->common, | |
577 | strchr (cpu, '+')); | |
578 | if (fpu && strcmp (fpu, "auto") != 0) | |
579 | { | |
580 | /* The easiest and safest way to remove the default fpu | |
581 | capabilities is to look for a '+no..' option that removes | |
bdb0828f | 582 | the base FPU bit (isa_bit_vfpv2). If that doesn't exist |
0b97b8f8 RE |
583 | then the best we can do is strip out all the bits that |
584 | might be part of the most capable FPU we know about, | |
585 | which is "crypto-neon-fp-armv8". */ | |
586 | bool default_fpu_found = false; | |
587 | if (selected_cpu->common.extensions) | |
588 | { | |
589 | const cpu_arch_extension *ext; | |
590 | for (ext = selected_cpu->common.extensions; ext->name != NULL; | |
591 | ++ext) | |
592 | { | |
593 | if (ext->remove | |
bdb0828f | 594 | && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2)) |
0b97b8f8 RE |
595 | { |
596 | arm_initialize_isa (fpu_isa, ext->isa_bits); | |
597 | bitmap_and_compl (target_isa, target_isa, fpu_isa); | |
598 | default_fpu_found = true; | |
599 | } | |
600 | } | |
601 | ||
602 | } | |
603 | ||
604 | if (!default_fpu_found) | |
605 | { | |
606 | arm_initialize_isa | |
607 | (fpu_isa, | |
608 | all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits); | |
609 | bitmap_and_compl (target_isa, target_isa, fpu_isa); | |
610 | } | |
611 | ||
612 | const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu); | |
613 | if (target_fpu == NULL) | |
614 | return ""; | |
615 | ||
616 | arm_initialize_isa (fpu_isa, target_fpu->isa_bits); | |
617 | bitmap_ior (target_isa, target_isa, fpu_isa); | |
618 | } | |
619 | ||
620 | selected_arch = all_architectures + selected_cpu->arch; | |
621 | } | |
622 | ||
623 | /* If we have a soft-float ABI, disable the FPU. */ | |
624 | if (abi && strcmp (abi, "soft") == 0) | |
625 | { | |
626 | /* Clearing the VFPv2 bit is sufficient to stop any extention that | |
627 | builds on the FPU from matching. */ | |
bdb0828f | 628 | bitmap_clear_bit (target_isa, isa_bit_vfpv2); |
0b97b8f8 RE |
629 | } |
630 | ||
631 | /* If we don't have a selected architecture by now, something's | |
632 | badly wrong. */ | |
633 | gcc_assert (selected_arch); | |
634 | ||
635 | arm_initialize_isa (base_isa, selected_arch->common.isa_bits); | |
636 | ||
637 | /* Architecture has no extension options, so just return the canonical | |
638 | architecture name. */ | |
639 | if (selected_arch->common.extensions == NULL) | |
640 | return selected_arch->common.name; | |
641 | ||
642 | /* We're only interested in extension bits. */ | |
643 | bitmap_and_compl (target_isa, target_isa, base_isa); | |
644 | ||
645 | /* There are no extensions needed. Just return the canonical architecture | |
646 | name. */ | |
647 | if (bitmap_empty_p (target_isa)) | |
648 | return selected_arch->common.name; | |
649 | ||
650 | /* What is left is the architecture that the compiler will target. We | |
651 | now need to map that back into a suitable option+features list. | |
652 | ||
653 | The list is built in two passes. First we scan every additive | |
654 | option feature supported by the architecture. If the option | |
655 | provides a subset of the features we need we add it to the list | |
656 | of candidates. We then scan backwards over the list of | |
657 | candidates and if we find a feature that adds nothing to one that | |
658 | was later in the list we mark it as redundant. The result is a | |
659 | minimal list of required features for the target | |
660 | architecture. */ | |
661 | ||
662 | std::list<candidate_extension *> extensions; | |
663 | ||
664 | auto_sbitmap target_isa_unsatisfied (isa_num_bits); | |
665 | bitmap_copy (target_isa_unsatisfied, target_isa); | |
666 | ||
667 | sbitmap isa_bits = NULL; | |
668 | for (const cpu_arch_extension *cand = selected_arch->common.extensions; | |
669 | cand->name != NULL; | |
670 | cand++) | |
671 | { | |
672 | if (cand->remove || cand->alias) | |
673 | continue; | |
674 | ||
675 | if (isa_bits == NULL) | |
676 | isa_bits = sbitmap_alloc (isa_num_bits); | |
677 | ||
678 | arm_initialize_isa (isa_bits, cand->isa_bits); | |
679 | if (bitmap_subset_p (isa_bits, target_isa)) | |
680 | { | |
681 | extensions.push_back (new candidate_extension (cand, isa_bits)); | |
682 | bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied, | |
683 | isa_bits); | |
684 | isa_bits = NULL; | |
685 | } | |
686 | } | |
687 | ||
688 | /* There's one extra case to consider, which is that the user has | |
689 | specified an FPU that is less capable than this architecture | |
690 | supports. In that case the code above will fail to find a | |
691 | suitable feature. We handle this by scanning the list of options | |
692 | again, matching the first option that provides an FPU that is | |
693 | more capable than the selected FPU. | |
694 | ||
695 | Note that the other case (user specified a more capable FPU than | |
696 | this architecture supports) should end up selecting the most | |
697 | capable FPU variant that we do support. This is sufficient for | |
698 | multilib selection. */ | |
699 | ||
bdb0828f RE |
700 | if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_vfpv2) |
701 | && bitmap_bit_p (fpu_isa, isa_bit_vfpv2)) | |
0b97b8f8 RE |
702 | { |
703 | std::list<candidate_extension *>::iterator ipoint = extensions.begin (); | |
704 | ||
705 | for (const cpu_arch_extension *cand = selected_arch->common.extensions; | |
706 | cand->name != NULL; | |
707 | cand++) | |
708 | { | |
709 | if (cand->remove || cand->alias) | |
710 | continue; | |
711 | ||
712 | if (isa_bits == NULL) | |
713 | isa_bits = sbitmap_alloc (isa_num_bits); | |
714 | ||
715 | /* We need to keep the features in canonical order, so move the | |
716 | insertion point if this feature is a candidate. */ | |
717 | if (ipoint != extensions.end () | |
718 | && (*ipoint)->extension == cand) | |
719 | ++ipoint; | |
720 | ||
721 | arm_initialize_isa (isa_bits, cand->isa_bits); | |
722 | if (bitmap_subset_p (fpu_isa, isa_bits)) | |
723 | { | |
724 | extensions.insert (ipoint, | |
725 | new candidate_extension (cand, isa_bits)); | |
726 | isa_bits = NULL; | |
727 | break; | |
728 | } | |
729 | } | |
730 | } | |
731 | ||
732 | if (isa_bits) | |
733 | sbitmap_free (isa_bits); | |
734 | ||
735 | bitmap_clear (target_isa); | |
736 | size_t len = 1; | |
737 | for (std::list<candidate_extension *>::reverse_iterator riter | |
738 | = extensions.rbegin (); | |
739 | riter != extensions.rend (); ++riter) | |
740 | { | |
741 | if (bitmap_subset_p ((*riter)->isa_bits, target_isa)) | |
742 | (*riter)->required = false; | |
743 | else | |
744 | { | |
745 | bitmap_ior (target_isa, target_isa, (*riter)->isa_bits); | |
746 | len += strlen ((*riter)->extension->name) + 1; | |
747 | } | |
748 | } | |
749 | ||
750 | canonical_arch | |
751 | = (char *) xmalloc (len + strlen (selected_arch->common.name)); | |
752 | ||
753 | strcpy (canonical_arch, selected_arch->common.name); | |
754 | ||
755 | for (std::list<candidate_extension *>::iterator iter = extensions.begin (); | |
756 | iter != extensions.end (); ++iter) | |
757 | { | |
758 | if ((*iter)->required) | |
759 | { | |
760 | strcat (canonical_arch, "+"); | |
761 | strcat (canonical_arch, (*iter)->extension->name); | |
762 | } | |
763 | delete (*iter); | |
764 | } | |
765 | ||
766 | return canonical_arch; | |
767 | } | |
768 | ||
63d03dce RE |
769 | /* If building big-endian on a BE8 target generate a --be8 option for |
770 | the linker. Takes four types of option: "little" - little-endian; | |
771 | "big" - big-endian; "be8" - force be8 iff big-endian; and "arch" | |
772 | "<arch-name>" (two arguments) - the target architecture. The | |
773 | parameter names are generated by the driver from the command-line | |
774 | options. */ | |
775 | const char * | |
776 | arm_be8_option (int argc, const char **argv) | |
777 | { | |
778 | int endian = TARGET_ENDIAN_DEFAULT; | |
779 | const char *arch = NULL; | |
780 | int arg; | |
781 | bool force = false; | |
782 | ||
783 | for (arg = 0; arg < argc; arg++) | |
784 | { | |
785 | if (strcmp (argv[arg], "little") == 0) | |
786 | endian = 0; | |
787 | else if (strcmp (argv[arg], "big") == 0) | |
788 | endian = 1; | |
789 | else if (strcmp (argv[arg], "be8") == 0) | |
790 | force = true; | |
791 | else if (strcmp (argv[arg], "arch") == 0) | |
792 | { | |
793 | arg++; | |
794 | gcc_assert (arg < argc); | |
795 | arch = argv[arg]; | |
796 | } | |
797 | else | |
798 | gcc_unreachable (); | |
799 | } | |
800 | ||
801 | /* Little endian - no be8 option. */ | |
802 | if (!endian) | |
803 | return ""; | |
804 | ||
805 | if (force) | |
806 | return "--be8"; | |
807 | ||
808 | /* Arch might not be set iff arm_canon_arch (above) detected an | |
809 | error. Do nothing in that case. */ | |
810 | if (!arch) | |
811 | return ""; | |
812 | ||
813 | const arch_option *selected_arch | |
814 | = arm_parse_arch_option_name (all_architectures, "-march", arch); | |
815 | ||
816 | /* Similarly if the given arch option was itself invalid. */ | |
817 | if (!selected_arch) | |
818 | return ""; | |
819 | ||
820 | if (check_isa_bits_for (selected_arch->common.isa_bits, isa_bit_be8)) | |
821 | return "--be8"; | |
822 | ||
823 | return ""; | |
824 | } | |
825 | ||
b848e289 JG |
826 | #undef ARM_CPU_NAME_LENGTH |
827 | ||
828 | ||
677f3fa8 JM |
829 | #undef TARGET_DEFAULT_TARGET_FLAGS |
830 | #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG) | |
831 | ||
832 | #undef TARGET_OPTION_OPTIMIZATION_TABLE | |
833 | #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table | |
834 | ||
835 | #undef TARGET_EXCEPT_UNWIND_INFO | |
836 | #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info | |
837 | ||
838 | struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; |