]>
Commit | Line | Data |
---|---|---|
a945c346 | 1 | /* Copyright (C) 2012-2024 Free Software Foundation, Inc. |
43e9d192 IB |
2 | Contributed by ARM Ltd. |
3 | ||
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, but | |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
0cfde688 | 20 | /* This is a list of ISA extensions in AArch64. |
43e9d192 | 21 | |
0cfde688 AC |
22 | Before using #include to read this file, define one of the following |
23 | macros: | |
43e9d192 | 24 | |
11a113d5 RS |
25 | AARCH64_OPT_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, |
26 | EXPLICIT_OFF, FEATURE_STRING) | |
27 | ||
0cfde688 AC |
28 | AARCH64_FMV_FEATURE(NAME, FEAT_NAME, IDENT) |
29 | ||
11a113d5 RS |
30 | - NAME is the name of the extension, represented as a string constant. |
31 | ||
32 | - IDENT is the canonical internal name for this flag. | |
33 | ||
0cfde688 AC |
34 | - FEAT_NAME is the unprefixed name used in the CPUFeatures enum. |
35 | ||
11a113d5 RS |
36 | - REQUIRES is a list of features that must be enabled whenever this |
37 | feature is enabled. The relationship is implicitly transitive: | |
38 | if A appears in B's REQUIRES and B appears in C's REQUIRES then | |
39 | A and B must be enabled whenever C is. Thus, turning on C also | |
40 | turns on A and B, while turning off A or B also turns off C. | |
41 | ||
42 | - EXPLICIT_ON is a list of features that are enabled by an explicit | |
43 | +NAME specification, in addition to those listed in REQUIRES. | |
44 | Usually this is an empty list; comments below explain the exceptions. | |
45 | The list is implicitly transitively closed wrt REQUIRES (but *not* | |
46 | to EXPLICIT_ON, since NAME is the only thing explicit in +NAME). | |
47 | Thus if A is in B's REQUIRES and B is in C's EXPLICIT_ON, +C will | |
48 | enable both B and A. B's EXPLICIT_ON has no effect on +C. | |
49 | ||
50 | - EXPLICIT_OFF is a list of features that are disabled by an explicit | |
51 | +noNAME specification, in addition to the features that are transitively | |
52 | dependent on NAME (according to REQUIRES). As with EXPLICIT_ON, | |
53 | this is usually an empty list; comments below explain the exceptions. | |
54 | If a feature A appears in this list then the list implicitly includes | |
55 | any features that are transitively dependent on A (according to REQUIRES). | |
56 | ||
4ca82fc9 TC |
57 | - FEAT_STRING is a string containing the entries in the 'Features' field of |
58 | /proc/cpuinfo on a GNU/Linux system that correspond to this architecture | |
59 | extension being available. Sometimes multiple entries are needed to enable | |
60 | the extension (for example, the 'crypto' extension depends on four | |
61 | entries: aes, pmull, sha1, sha2 being present). In that case this field | |
62 | should contain a space (" ") separated list of the strings in 'Features' | |
29c6debc | 63 | that are required. Their order is not important. An empty string means |
3644cadf | 64 | do not detect this feature during auto detection. |
43e9d192 | 65 | |
0cfde688 AC |
66 | - OPT_FLAGS is a list of feature IDENTS that should be enabled (along with |
67 | their transitive dependencies) when the specified FMV feature is present. | |
68 | ||
69 | Where a feature is present as both an extension and a function | |
70 | multiversioning feature, and IDENT matches the FEAT_NAME suffix, then these | |
71 | can be listed here simultaneously using the macro: | |
72 | ||
73 | AARCH64_OPT_FMV_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, | |
74 | EXPLICIT_OFF, FEATURE_STRING) | |
75 | ||
76 | The list of features extensions must follow topological order wrt REQUIRES | |
77 | and EXPLICIT_ON. For example, if A is in B's REQUIRES list, A must come | |
78 | before B. This is enforced by aarch64-feature-deps.h. | |
79 | ||
80 | The list of multiversioning features must be ordered by increasing priority, | |
81 | as defined in https://github.com/ARM-software/acle/blob/main/main/acle.md | |
11a113d5 RS |
82 | |
83 | NOTE: Any changes to the AARCH64_OPT_EXTENSION macro need to be mirrored in | |
84 | config.gcc. */ | |
85 | ||
0cfde688 AC |
86 | #ifndef AARCH64_OPT_EXTENSION |
87 | #define AARCH64_OPT_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, \ | |
88 | EXPLICIT_OFF, FEATURE_STRING) | |
89 | #endif | |
90 | ||
91 | #ifndef AARCH64_FMV_FEATURE | |
92 | #define AARCH64_FMV_FEATURE(NAME, FEAT_NAME, OPT_FLAGS) | |
93 | #endif | |
94 | ||
95 | #define AARCH64_OPT_FMV_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, \ | |
96 | EXPLICIT_OFF, FEATURE_STRING) \ | |
97 | AARCH64_OPT_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, EXPLICIT_OFF, \ | |
98 | FEATURE_STRING) \ | |
99 | AARCH64_FMV_FEATURE(NAME, IDENT, (IDENT)) | |
100 | ||
101 | ||
11a113d5 RS |
102 | AARCH64_OPT_EXTENSION("fp", FP, (), (), (), "fp") |
103 | ||
104 | AARCH64_OPT_EXTENSION("simd", SIMD, (FP), (), (), "asimd") | |
105 | ||
0cfde688 | 106 | AARCH64_OPT_FMV_EXTENSION("rng", RNG, (), (), (), "rng") |
11a113d5 | 107 | |
0cfde688 | 108 | AARCH64_OPT_FMV_EXTENSION("flagm", FLAGM, (), (), (), "flagm") |
11a113d5 | 109 | |
0cfde688 AC |
110 | AARCH64_FMV_FEATURE("flagm2", FLAGM2, (FLAGM)) |
111 | ||
112 | AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML)) | |
113 | ||
114 | AARCH64_OPT_FMV_EXTENSION("dotprod", DOTPROD, (SIMD), (), (), "asimddp") | |
11a113d5 | 115 | |
0cfde688 | 116 | AARCH64_OPT_FMV_EXTENSION("sm4", SM4, (SIMD), (), (), "sm3 sm4") |
11a113d5 RS |
117 | |
118 | /* An explicit +rdma implies +simd, but +rdma+nosimd still enables scalar | |
119 | RDMA instructions. */ | |
120 | AARCH64_OPT_EXTENSION("rdma", RDMA, (), (SIMD), (), "asimdrdm") | |
121 | ||
0cfde688 AC |
122 | AARCH64_FMV_FEATURE("rmd", RDM, (RDMA)) |
123 | ||
124 | AARCH64_OPT_FMV_EXTENSION("lse", LSE, (), (), (), "atomics") | |
125 | ||
126 | AARCH64_FMV_FEATURE("fp", FP, (FP)) | |
127 | ||
128 | AARCH64_FMV_FEATURE("simd", SIMD, (SIMD)) | |
129 | ||
130 | AARCH64_OPT_FMV_EXTENSION("crc", CRC, (), (), (), "crc32") | |
131 | ||
132 | AARCH64_FMV_FEATURE("sha1", SHA1, ()) | |
11a113d5 | 133 | |
0cfde688 | 134 | AARCH64_OPT_FMV_EXTENSION("sha2", SHA2, (SIMD), (), (), "sha1 sha2") |
11a113d5 | 135 | |
0cfde688 AC |
136 | AARCH64_FMV_FEATURE("sha3", SHA3, (SHA3)) |
137 | ||
138 | AARCH64_OPT_FMV_EXTENSION("aes", AES, (SIMD), (), (), "aes") | |
139 | ||
140 | AARCH64_FMV_FEATURE("pmull", PMULL, ()) | |
11a113d5 RS |
141 | |
142 | /* +nocrypto disables AES, SHA2 and SM4, and anything that depends on them | |
143 | (such as SHA3 and the SVE2 crypto extensions). */ | |
144 | AARCH64_OPT_EXTENSION("crypto", CRYPTO, (AES, SHA2), (), (AES, SHA2, SM4), | |
c067c474 RS |
145 | "aes pmull sha1 sha2") |
146 | ||
0cfde688 AC |
147 | /* Listing sha3 after crypto means we pass "+aes+sha3" to the assembler |
148 | instead of "+sha3+crypto". */ | |
11a113d5 RS |
149 | AARCH64_OPT_EXTENSION("sha3", SHA3, (SHA2), (), (), "sha3 sha512") |
150 | ||
0cfde688 AC |
151 | /* +nofp16 disables an implicit F16FML, even though an implicit F16FML |
152 | does not imply F16. See F16FML for more details. */ | |
153 | AARCH64_OPT_EXTENSION("fp16", F16, (FP), (), (F16FML), "fphp asimdhp") | |
154 | ||
155 | AARCH64_FMV_FEATURE("fp16", FP16, (F16)) | |
11a113d5 RS |
156 | |
157 | /* An explicit +fp16fml implies +fp16, but a dependence on it does not. | |
158 | Thus -march=armv8.4-a implies F16FML but not F16. -march=armv8.4-a+fp16 | |
159 | and -march=armv8.4-a+fp16fml are equivalent and enable both F16FML and F16. | |
160 | -march=armv8.4-a+nofp16+fp16 enables F16 but not F16FML. */ | |
161 | AARCH64_OPT_EXTENSION("fp16fml", F16FML, (), (F16), (), "asimdfhm") | |
162 | ||
0cfde688 | 163 | AARCH64_FMV_FEATURE("dit", DIT, ()) |
11a113d5 | 164 | |
0cfde688 | 165 | AARCH64_FMV_FEATURE("dpb", DPB, ()) |
11a113d5 | 166 | |
0cfde688 | 167 | AARCH64_FMV_FEATURE("dpb2", DPB2, ()) |
11a113d5 | 168 | |
0cfde688 | 169 | AARCH64_FMV_FEATURE("jscvt", JSCVT, ()) |
11a113d5 | 170 | |
0cfde688 | 171 | AARCH64_FMV_FEATURE("fcma", FCMA, (SIMD)) |
11a113d5 | 172 | |
0cfde688 | 173 | AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc") |
11a113d5 | 174 | |
0cfde688 | 175 | AARCH64_FMV_FEATURE("rcpc2", RCPC2, (RCPC)) |
11a113d5 | 176 | |
0cfde688 | 177 | AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "rcpc3") |
11a113d5 | 178 | |
0cfde688 AC |
179 | AARCH64_FMV_FEATURE("frintts", FRINTTS, ()) |
180 | ||
181 | AARCH64_FMV_FEATURE("dgh", DGH, ()) | |
182 | ||
183 | AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm") | |
184 | ||
185 | /* An explicit +bf16 implies +simd, but +bf16+nosimd still enables scalar BF16 | |
186 | instructions. */ | |
187 | AARCH64_OPT_FMV_EXTENSION("bf16", BF16, (FP), (SIMD), (), "bf16") | |
188 | ||
189 | AARCH64_FMV_FEATURE("ebf16", EBF16, (BF16)) | |
190 | ||
191 | AARCH64_FMV_FEATURE("rpres", RPRES, ()) | |
192 | ||
193 | AARCH64_OPT_FMV_EXTENSION("sve", SVE, (SIMD, F16), (), (), "sve") | |
194 | ||
195 | AARCH64_FMV_FEATURE("sve-bf16", SVE_BF16, (SVE, BF16)) | |
196 | ||
197 | AARCH64_FMV_FEATURE("sve-ebf16", SVE_EBF16, (SVE, BF16)) | |
198 | ||
199 | AARCH64_FMV_FEATURE("sve-i8mm", SVE_I8MM, (SVE, I8MM)) | |
200 | ||
201 | AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "f32mm") | |
202 | ||
203 | AARCH64_FMV_FEATURE("f32mm", SVE_F32MM, (F32MM)) | |
204 | ||
205 | AARCH64_OPT_EXTENSION("f64mm", F64MM, (SVE), (), (), "f64mm") | |
206 | ||
207 | AARCH64_FMV_FEATURE("f64mm", SVE_F64MM, (F64MM)) | |
208 | ||
209 | AARCH64_OPT_FMV_EXTENSION("sve2", SVE2, (SVE), (), (), "sve2") | |
11a113d5 RS |
210 | |
211 | AARCH64_OPT_EXTENSION("sve2-aes", SVE2_AES, (SVE2, AES), (), (), "sveaes") | |
212 | ||
0cfde688 AC |
213 | AARCH64_FMV_FEATURE("sve2-aes", SVE_AES, (SVE2_AES)) |
214 | ||
215 | AARCH64_FMV_FEATURE("sve2-pmull128", SVE_PMULL128, (SVE2)) | |
11a113d5 RS |
216 | |
217 | AARCH64_OPT_EXTENSION("sve2-bitperm", SVE2_BITPERM, (SVE2), (), (), | |
218 | "svebitperm") | |
219 | ||
0cfde688 | 220 | AARCH64_FMV_FEATURE("sve2-bitperm", SVE_BITPERM, (SVE2_BITPERM)) |
11a113d5 | 221 | |
0cfde688 | 222 | AARCH64_OPT_EXTENSION("sve2-sha3", SVE2_SHA3, (SVE2, SHA3), (), (), "svesha3") |
11a113d5 | 223 | |
0cfde688 | 224 | AARCH64_FMV_FEATURE("sve2-sha3", SVE_SHA3, (SVE2_SHA3)) |
11a113d5 | 225 | |
0cfde688 | 226 | AARCH64_OPT_EXTENSION("sve2-sm4", SVE2_SM4, (SVE2, SM4), (), (), "svesm4") |
11a113d5 | 227 | |
0cfde688 AC |
228 | AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4)) |
229 | ||
230 | AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme") | |
231 | ||
232 | AARCH64_OPT_FMV_EXTENSION("memtag", MEMTAG, (), (), (), "") | |
233 | ||
234 | AARCH64_FMV_FEATURE("memtag2", MEMTAG2, (MEMTAG)) | |
235 | ||
236 | AARCH64_FMV_FEATURE("memtag3", MEMTAG3, (MEMTAG)) | |
11a113d5 | 237 | |
0cfde688 AC |
238 | AARCH64_OPT_FMV_EXTENSION("sb", SB, (), (), (), "sb") |
239 | ||
240 | AARCH64_OPT_FMV_EXTENSION("predres", PREDRES, (), (), (), "") | |
241 | ||
242 | AARCH64_OPT_FMV_EXTENSION("ssbs", SSBS, (), (), (), "ssbs") | |
243 | ||
244 | AARCH64_FMV_FEATURE("ssbs2", SSBS2, (SSBS)) | |
245 | ||
246 | AARCH64_FMV_FEATURE("bti", BTI, ()) | |
247 | ||
248 | AARCH64_OPT_EXTENSION("profile", PROFILE, (), (), (), "") | |
249 | ||
250 | AARCH64_OPT_EXTENSION("tme", TME, (), (), (), "") | |
11a113d5 RS |
251 | |
252 | AARCH64_OPT_EXTENSION("pauth", PAUTH, (), (), (), "paca pacg") | |
253 | ||
254 | AARCH64_OPT_EXTENSION("ls64", LS64, (), (), (), "") | |
255 | ||
0cfde688 | 256 | AARCH64_FMV_FEATURE("ls64", LS64, ()) |
0caf592d | 257 | |
0cfde688 | 258 | AARCH64_FMV_FEATURE("ls64_v", LS64_V, ()) |
d758d190 | 259 | |
0cfde688 | 260 | AARCH64_FMV_FEATURE("ls64_accdata", LS64_ACCDATA, (LS64)) |
7e04bd1f | 261 | |
0cfde688 | 262 | AARCH64_FMV_FEATURE("wfxt", WFXT, ()) |
4f6ab953 RS |
263 | |
264 | AARCH64_OPT_EXTENSION("sme-f64f64", SME_F64F64, (SME), (), (), "") | |
265 | ||
0cfde688 AC |
266 | AARCH64_FMV_FEATURE("sme-f64f64", SME_F64, (SME_F64F64)) |
267 | ||
268 | AARCH64_OPT_EXTENSION("sme-i16i64", SME_I16I64, (SME), (), (), "") | |
269 | ||
270 | AARCH64_FMV_FEATURE("sme-i16i64", SME_I64, (SME_I16I64)) | |
271 | ||
272 | AARCH64_OPT_FMV_EXTENSION("sme2", SME2, (SME), (), (), "sme2") | |
273 | ||
274 | AARCH64_OPT_EXTENSION("mops", MOPS, (), (), (), "") | |
275 | ||
276 | AARCH64_OPT_EXTENSION("cssc", CSSC, (), (), (), "cssc") | |
3b58b220 | 277 | |
16a05fac VDN |
278 | AARCH64_OPT_EXTENSION("d128", D128, (), (), (), "d128") |
279 | ||
280 | AARCH64_OPT_EXTENSION("the", THE, (), (), (), "the") | |
281 | ||
3aba0458 VDN |
282 | AARCH64_OPT_EXTENSION("gcs", GCS, (), (), (), "gcs") |
283 | ||
0cfde688 | 284 | #undef AARCH64_OPT_FMV_EXTENSION |
cd8b19af | 285 | #undef AARCH64_OPT_EXTENSION |
0cfde688 | 286 | #undef AARCH64_FMV_FEATURE |