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825ada35 | 1 | ;; Falkor pipeline description |
a5544970 | 2 | ;; Copyright (C) 2017-2019 Free Software Foundation, Inc. |
825ada35 JW |
3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ;; | |
6 | ;; GCC is free software; you can redistribute it and/or modify it | |
7 | ;; under the terms of the GNU General Public License as published by | |
8 | ;; the Free Software Foundation; either version 3, or (at your option) | |
9 | ;; any later version. | |
10 | ;; | |
11 | ;; GCC is distributed in the hope that it will be useful, but | |
12 | ;; WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | ;; General Public License for more details. | |
15 | ;; | |
16 | ;; You should have received a copy of the GNU General Public License | |
17 | ;; along with GCC; see the file COPYING3. If not see | |
18 | ;; <http://www.gnu.org/licenses/>. | |
19 | ||
20 | (define_automaton "falkor") | |
21 | ||
22 | ;; Complex int instructions (e.g. multiply and divide) execute in the X | |
23 | ;; pipeline. Simple int instructions execute in the X, Y, and Z pipelines. | |
24 | ||
25 | (define_cpu_unit "falkor_x" "falkor") | |
26 | (define_cpu_unit "falkor_y" "falkor") | |
27 | (define_cpu_unit "falkor_z" "falkor") | |
28 | ||
29 | ;; Branches execute in the B pipeline or in one of the int pipelines depending | |
30 | ;; on how complex it is. Simple int insns (like movz) can also execute here. | |
31 | ||
32 | (define_cpu_unit "falkor_b" "falkor") | |
33 | ||
34 | ;; Vector and FP insns execute in the VX and VY pipelines. | |
35 | ||
36 | (define_automaton "falkor_vfp") | |
37 | ||
38 | (define_cpu_unit "falkor_vx" "falkor_vfp") | |
39 | (define_cpu_unit "falkor_vy" "falkor_vfp") | |
40 | ||
41 | ;; Loads execute in the LD pipeline. | |
42 | ;; Stores execute in the ST, SD, and VSD pipelines, for address, data, and | |
43 | ;; vector data. | |
44 | ||
45 | (define_automaton "falkor_mem") | |
46 | ||
47 | (define_cpu_unit "falkor_ld" "falkor_mem") | |
48 | (define_cpu_unit "falkor_st" "falkor_mem") | |
49 | (define_cpu_unit "falkor_sd" "falkor_mem") | |
50 | (define_cpu_unit "falkor_vsd" "falkor_mem") | |
51 | ||
52 | ;; The GTOV and VTOG pipelines are for general to vector reg moves, and vice | |
53 | ;; versa. | |
54 | ||
55 | (define_cpu_unit "falkor_gtov" "falkor") | |
56 | (define_cpu_unit "falkor_vtog" "falkor") | |
57 | ||
58 | ;; Common reservation combinations. | |
59 | ||
60 | (define_reservation "falkor_vxvy" "falkor_vx|falkor_vy") | |
61 | (define_reservation "falkor_zb" "falkor_z|falkor_b") | |
62 | (define_reservation "falkor_xyz" "falkor_x|falkor_y|falkor_z") | |
63 | (define_reservation "falkor_xyzb" "falkor_x|falkor_y|falkor_z|falkor_b") | |
64 | ||
65 | ;; SIMD Floating-Point Instructions | |
66 | ||
67 | (define_insn_reservation "falkor_afp_1_vxvy" 1 | |
68 | (and (eq_attr "tune" "falkor") | |
69 | (eq_attr "type" "neon_fp_neg_s,neon_fp_neg_d,neon_fp_abs_s,neon_fp_abs_d")) | |
70 | "falkor_vxvy") | |
71 | ||
72 | (define_insn_reservation "falkor_afp_1_vxvy_vxvy" 1 | |
73 | (and (eq_attr "tune" "falkor") | |
74 | (eq_attr "type" "neon_fp_neg_s_q,neon_fp_neg_d_q,neon_fp_abs_s_q,neon_fp_abs_d_q")) | |
75 | "falkor_vxvy+falkor_vxvy") | |
76 | ||
77 | (define_insn_reservation "falkor_afp_2_vxvy" 2 | |
78 | (and (eq_attr "tune" "falkor") | |
79 | (eq_attr "type" "neon_fp_minmax_s,neon_fp_minmax_d,neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,neon_fp_compare_s,neon_fp_compare_d,neon_fp_round_s,neon_fp_round_d")) | |
80 | "falkor_vxvy") | |
81 | ||
82 | (define_insn_reservation "falkor_afp_2_vxvy_vxvy" 2 | |
83 | (and (eq_attr "tune" "falkor") | |
84 | (eq_attr "type" "neon_fp_minmax_s_q,neon_fp_minmax_d_q,neon_fp_compare_s_q,neon_fp_compare_d_q,neon_fp_round_s_q,neon_fp_round_d_q")) | |
85 | "falkor_vxvy+falkor_vxvy") | |
86 | ||
87 | (define_insn_reservation "falkor_afp_3_vxvy" 3 | |
88 | (and (eq_attr "tune" "falkor") | |
89 | (eq_attr "type" "neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,neon_fp_abd_s,neon_fp_abd_d,neon_fp_addsub_s,neon_fp_addsub_d,neon_fp_reduc_add_s,neon_fp_reduc_add_d")) | |
90 | "falkor_vxvy") | |
91 | ||
92 | (define_insn_reservation "falkor_afp_3_vxvy_vxvy" 3 | |
93 | (and (eq_attr "tune" "falkor") | |
94 | (eq_attr "type" "neon_fp_abd_s_q,neon_fp_abd_d_q,neon_fp_addsub_s_q,neon_fp_addsub_d_q,neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q")) | |
95 | "falkor_vxvy+falkor_vxvy") | |
96 | ||
97 | (define_insn_reservation "falkor_afp_4_vxvy" 4 | |
98 | (and (eq_attr "tune" "falkor") | |
99 | (eq_attr "type" "neon_fp_to_int_s,neon_fp_to_int_d,neon_int_to_fp_s,neon_int_to_fp_d,neon_fp_cvt_widen_h,neon_fp_cvt_widen_s")) | |
100 | "falkor_vxvy") | |
101 | ||
102 | (define_insn_reservation "falkor_afp_4_vxvy_vxvy" 4 | |
103 | (and (eq_attr "tune" "falkor") | |
104 | (eq_attr "type" "neon_fp_to_int_s_q,neon_fp_to_int_d_q,neon_int_to_fp_s_q,neon_int_to_fp_d_q")) | |
105 | "falkor_vxvy+falkor_vxvy") | |
106 | ||
107 | (define_insn_reservation "falkor_afp_5_vxvy_mul" 5 | |
108 | (and (eq_attr "tune" "falkor") | |
109 | (eq_attr "type" "neon_fp_mul_s,neon_fp_mul_s_scalar")) | |
110 | "falkor_vxvy") | |
111 | ||
112 | (define_insn_reservation "falkor_afp_5_vxvy_mla" 5 | |
113 | (and (eq_attr "tune" "falkor") | |
114 | (eq_attr "type" "neon_fp_mla_s,neon_fp_mla_s_scalar")) | |
115 | "falkor_vxvy") | |
116 | ||
117 | (define_insn_reservation "falkor_afp_5_vxvy_vxvy_mul" 5 | |
118 | (and (eq_attr "tune" "falkor") | |
119 | (eq_attr "type" "neon_fp_mul_s_q,neon_fp_mul_s_scalar_q")) | |
120 | "falkor_vxvy") | |
121 | ||
122 | (define_insn_reservation "falkor_afp_5_vxvy_vxvy_mla" 5 | |
123 | (and (eq_attr "tune" "falkor") | |
124 | (eq_attr "type" "neon_fp_mla_s_q,neon_fp_mla_s_scalar_q")) | |
125 | "falkor_vxvy") | |
126 | ||
127 | (define_insn_reservation "falkor_afp_6_vxvy_mul" 6 | |
128 | (and (eq_attr "tune" "falkor") | |
129 | (eq_attr "type" "neon_fp_mul_d")) | |
130 | "falkor_vxvy") | |
131 | ||
132 | (define_insn_reservation "falkor_afp_6_vxvy_mla" 6 | |
133 | (and (eq_attr "tune" "falkor") | |
134 | (eq_attr "type" "neon_fp_mla_d")) | |
135 | "falkor_vxvy") | |
136 | ||
137 | (define_insn_reservation "falkor_afp_6_vxvy_vxvy_mul" 6 | |
138 | (and (eq_attr "tune" "falkor") | |
139 | (eq_attr "type" "neon_fp_mul_d_q,neon_fp_mul_d_scalar_q")) | |
140 | "falkor_vxvy+falkor_vxvy") | |
141 | ||
142 | (define_insn_reservation "falkor_afp_6_vxvy_vxvy_mla" 6 | |
143 | (and (eq_attr "tune" "falkor") | |
144 | (eq_attr "type" "neon_fp_mla_d_q,neon_fp_mla_d_scalar_q")) | |
145 | "falkor_vxvy+falkor_vxvy") | |
146 | ||
147 | (define_insn_reservation "falkor_afp_4_vxvy_vxvy_vxvy" 4 | |
148 | (and (eq_attr "tune" "falkor") | |
149 | (eq_attr "type" "neon_fp_cvt_narrow_s_q,neon_fp_cvt_narrow_d_q")) | |
150 | "falkor_vxvy+falkor_vxvy,falkor_vxvy") | |
151 | ||
152 | (define_insn_reservation "falkor_afp_6_vx_vy" 6 | |
153 | (and (eq_attr "tune" "falkor") | |
154 | (eq_attr "type" "neon_fp_div_s")) | |
155 | "falkor_vx+falkor_vy") | |
156 | ||
157 | (define_insn_reservation "falkor_afp_11_vx_vy" 11 | |
158 | (and (eq_attr "tune" "falkor") | |
159 | (eq_attr "type" "neon_fp_div_d")) | |
160 | "falkor_vx+falkor_vy") | |
161 | ||
162 | (define_insn_reservation "falkor_afp_6_vx_vy_vx_vy" 6 | |
163 | (and (eq_attr "tune" "falkor") | |
164 | (eq_attr "type" "neon_fp_div_s_q")) | |
165 | "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)") | |
166 | ||
167 | (define_insn_reservation "falkor_afp_11_vx_vy_vx_vy" 11 | |
168 | (and (eq_attr "tune" "falkor") | |
169 | (eq_attr "type" "neon_fp_div_d_q")) | |
170 | "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)") | |
171 | ||
172 | (define_insn_reservation "falkor_afp_12_vx_vy" 12 | |
173 | (and (eq_attr "tune" "falkor") | |
174 | (eq_attr "type" "neon_fp_sqrt_s")) | |
175 | "falkor_vx+falkor_vy") | |
176 | ||
177 | (define_insn_reservation "falkor_afp_22_vx_vy" 22 | |
178 | (and (eq_attr "tune" "falkor") | |
179 | (eq_attr "type" "neon_fp_sqrt_d")) | |
180 | "falkor_vx+falkor_vy") | |
181 | ||
182 | (define_insn_reservation "falkor_afp_12_vx_vy_vx_vy" 12 | |
183 | (and (eq_attr "tune" "falkor") | |
184 | (eq_attr "type" "neon_fp_sqrt_s_q")) | |
185 | "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)") | |
186 | ||
187 | (define_insn_reservation "falkor_afp_22_vx_vy_vx_vy" 22 | |
188 | (and (eq_attr "tune" "falkor") | |
189 | (eq_attr "type" "neon_fp_sqrt_d_q")) | |
190 | "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)") | |
191 | ||
192 | ;; SIMD Integer Instructions | |
193 | ||
194 | (define_insn_reservation "falkor_ai_1_vxvy" 1 | |
195 | (and (eq_attr "tune" "falkor") | |
196 | (eq_attr "type" "neon_add,neon_reduc_add,neon_logic,neon_neg,neon_sub")) | |
197 | "falkor_vxvy") | |
198 | ||
199 | (define_insn_reservation "falkor_ai_1_vxvy_vxvy" 1 | |
200 | (and (eq_attr "tune" "falkor") | |
201 | (eq_attr "type" "neon_shift_imm_long,neon_add_q,neon_reduc_add_q,neon_logic_q,neon_neg_q,neon_sub_q")) | |
202 | "falkor_vxvy+falkor_vxvy") | |
203 | ||
204 | (define_insn_reservation "falkor_ai_2_vxvy" 2 | |
205 | (and (eq_attr "tune" "falkor") | |
206 | (eq_attr "type" "neon_add_long,neon_sub_long,neon_add_halve,neon_sub_halve,neon_shift_imm,neon_shift_reg,neon_minmax,neon_abs,neon_compare,neon_compare_zero,neon_tst")) | |
207 | "falkor_vxvy") | |
208 | ||
209 | (define_insn_reservation "falkor_ai_2_vxvy_vxvy" 2 | |
210 | (and (eq_attr "tune" "falkor") | |
211 | (eq_attr "type" "neon_add_halve_q,neon_sub_halve_q,neon_shift_imm_q,neon_shift_reg_q,neon_minmax_q,neon_abs_q,neon_compare_q,neon_compare_zero_q,neon_tst_q,neon_reduc_add_long")) | |
212 | "falkor_vxvy+falkor_vxvy") | |
213 | ||
214 | (define_insn_reservation "falkor_ai_3_vxvy" 3 | |
215 | (and (eq_attr "tune" "falkor") | |
216 | (eq_attr "type" "neon_shift_acc,neon_reduc_add_acc,neon_abd,neon_qadd,neon_qsub,neon_qabs,neon_qneg,neon_sat_shift_imm,neon_sat_shift_imm_narrow_q,neon_sat_shift_reg,neon_reduc_minmax")) | |
217 | "falkor_vxvy") | |
218 | ||
219 | (define_insn_reservation "falkor_ai_4_vxvy" 4 | |
220 | (and (eq_attr "tune" "falkor") | |
221 | (eq_attr "type" "neon_reduc_minmax_q")) | |
222 | "falkor_vxvy") | |
223 | ||
224 | (define_insn_reservation "falkor_ai_3_vxvy_vxvy" 3 | |
225 | (and (eq_attr "tune" "falkor") | |
226 | (eq_attr "type" "neon_shift_acc_q,neon_reduc_add_acc_q,neon_abd_q,neon_abd_long,neon_qadd_q,neon_qsub_q,neon_qabs_q,neon_qneg_q,neon_sat_shift_imm_q,neon_sat_shift_reg_q")) | |
227 | "falkor_vxvy+falkor_vxvy") | |
228 | ||
229 | (define_insn_reservation "falkor_ai_4_vxvy_mul" 4 | |
230 | (and (eq_attr "tune" "falkor") | |
231 | (eq_attr "type" "neon_mul_b,neon_mul_h,neon_mul_s,neon_mul_h_scalar,neon_mul_s_scalar,neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,neon_sat_mul_h_scalar,neon_sat_mul_s_scalar")) | |
232 | "falkor_vxvy") | |
233 | ||
234 | (define_insn_reservation "falkor_ai_4_vxvy_mla" 4 | |
235 | (and (eq_attr "tune" "falkor") | |
236 | (eq_attr "type" "neon_mla_b,neon_mla_h,neon_mla_s,neon_mla_h_scalar,neon_mla_s_scalar")) | |
237 | "falkor_vxvy") | |
238 | ||
239 | (define_insn_reservation "falkor_ai_4_vxvy_vxvy_mul" 4 | |
240 | (and (eq_attr "tune" "falkor") | |
241 | (eq_attr "type" "neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,neon_mul_h_scalar_q,neon_mul_s_scalar_q,neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,neon_mul_b_long,neon_mul_h_long,neon_mul_s_long,neon_mul_d_long,neon_mul_h_scalar_long,neon_mul_s_scalar_long,neon_sat_mul_b_long,neon_sat_mul_h_long,neon_sat_mul_s_long,neon_sat_mul_h_scalar_q,neon_sat_mul_s_scalar_q,neon_sat_mul_h_scalar_long,neon_sat_mul_s_scalar_long")) | |
242 | "falkor_vxvy+falkor_vxvy") | |
243 | ||
244 | (define_insn_reservation "falkor_ai_4_vxvy_vxvy_mla" 4 | |
245 | (and (eq_attr "tune" "falkor") | |
246 | (eq_attr "type" "neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,neon_mla_h_scalar_q,neon_mla_s_scalar_q,neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,neon_mla_h_scalar_long,neon_mla_s_scalar_long,neon_sat_mla_b_long,neon_sat_mla_h_long,neon_sat_mla_s_long,neon_sat_mla_h_scalar_long,neon_sat_mla_s_scalar_long")) | |
247 | "falkor_vxvy+falkor_vxvy") | |
248 | ||
249 | (define_insn_reservation "falkor_ai_4_vxvy_vxvy" 4 | |
250 | (and (eq_attr "tune" "falkor") | |
251 | (eq_attr "type" "neon_add_halve_narrow_q,neon_sub_halve_narrow_q,neon_arith_acc")) | |
252 | "falkor_vxvy+falkor_vxvy") | |
253 | ||
254 | (define_insn_reservation "falkor_2_ai_vxvy_vxvy_vxvy_vxvy" 2 | |
255 | (and (eq_attr "tune" "falkor") | |
256 | (eq_attr "type" "neon_add_widen,neon_sub_widen")) | |
257 | "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy)") | |
258 | ||
259 | (define_insn_reservation "falkor_4_ai_vxvy_vxvy_vxvy_vxvy" 4 | |
260 | (and (eq_attr "tune" "falkor") | |
261 | (eq_attr "type" "neon_arith_acc_q")) | |
262 | "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy)") | |
263 | ||
264 | ;; SIMD Load Instructions | |
265 | ||
266 | (define_insn_reservation "falkor_ald_4_ld" 4 | |
267 | (and (eq_attr "tune" "falkor") | |
268 | (eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q,neon_load1_all_lanes,neon_load2_one_lane")) | |
269 | "falkor_ld") | |
270 | ||
271 | (define_insn_reservation "falkor_ald_4_ld_none" 4 | |
272 | (and (eq_attr "tune" "falkor") | |
273 | (eq_attr "type" "neon_load1_2reg,neon_load2_2reg,neon_load2_all_lanes")) | |
274 | "falkor_ld") | |
275 | ||
276 | (define_insn_reservation "falkor_ald_4_ld_ld" 4 | |
277 | (and (eq_attr "tune" "falkor") | |
278 | (eq_attr "type" "neon_load1_2reg_q,neon_load2_2reg_q,neon_load2_all_lanes_q,neon_load3_one_lane,neon_load4_one_lane,neon_ldp,neon_ldp_q")) | |
279 | "falkor_ld,falkor_ld") | |
280 | ||
281 | (define_insn_reservation "falkor_ald_4_ld_ld_none" 4 | |
282 | (and (eq_attr "tune" "falkor") | |
283 | (eq_attr "type" "neon_load1_3reg,neon_load3_3reg,neon_load3_all_lanes")) | |
284 | "falkor_ld,falkor_ld") | |
285 | ||
286 | (define_insn_reservation "falkor_ald_4_ld_ld_ld" 4 | |
287 | (and (eq_attr "tune" "falkor") | |
288 | (eq_attr "type" "neon_load1_3reg_q,neon_load3_3reg_q,neon_load3_all_lanes_q")) | |
289 | "falkor_ld,falkor_ld,falkor_ld") | |
290 | ||
291 | (define_insn_reservation "falkor_ald_4_ld_ld_none_none" 4 | |
292 | (and (eq_attr "tune" "falkor") | |
293 | (eq_attr "type" "neon_load1_4reg,neon_load4_4reg")) | |
294 | "falkor_ld,falkor_ld") | |
295 | ||
296 | (define_insn_reservation "falkor_ald_4_ld_ld_ld_ld" 4 | |
297 | (and (eq_attr "tune" "falkor") | |
298 | (eq_attr "type" "neon_load1_4reg_q,neon_load4_4reg_q,neon_load4_all_lanes,neon_load4_all_lanes_q")) | |
299 | "falkor_ld,falkor_ld,falkor_ld,falkor_ld") | |
300 | ||
301 | ;; Arithmetic and Logical Instructions | |
302 | ||
303 | (define_insn_reservation "falkor_alu_1_xyz" 1 | |
304 | (and (eq_attr "tune" "falkor") | |
305 | (eq_attr "type" "alus_sreg,alus_imm,alus_shift_imm,csel,adc_reg,alu_imm,alu_sreg,alu_shift_imm,alu_ext,alus_ext,logic_imm,logic_reg,logic_shift_imm,logics_imm,logics_reg,logics_shift_imm,mov_reg")) | |
306 | "falkor_xyz") | |
307 | ||
308 | ;; SIMD Miscellaneous Instructions | |
309 | ||
310 | ;; No separate type for ins and dup. But this is correct for both. | |
311 | ||
312 | (define_insn_reservation "falkor_am_3_gtov" 3 | |
313 | (and (eq_attr "tune" "falkor") | |
314 | (eq_attr "type" "neon_from_gp")) | |
315 | "falkor_gtov") | |
316 | ||
317 | ;; No separate type for ins and dup. Assuming dup is more common. Ins is | |
318 | ;; gtov+vxvy and latency of 4. | |
319 | ||
320 | (define_insn_reservation "falkor_am_3_gtov_gtov" 3 | |
321 | (and (eq_attr "tune" "falkor") | |
322 | (eq_attr "type" "neon_from_gp_q")) | |
323 | "falkor_gtov,falkor_gtov") | |
324 | ||
561d0119 SP |
325 | ;; DUP does not use vector pipes in Q mode, only gtov+gtov. |
326 | (define_insn_reservation "falkor_am_1_gtov_gtov" 1 | |
327 | (and (eq_attr "tune" "falkor") | |
328 | (eq_attr "type" "neon_dup_q")) | |
329 | "falkor_gtov*2") | |
330 | ||
825ada35 JW |
331 | ;; neon_to_gp_q is used for 32-bit ARM instructions that move 64-bits of data |
332 | ;; so no use needed here. | |
333 | ||
334 | (define_insn_reservation "falkor_am_3_vtog" 3 | |
335 | (and (eq_attr "tune" "falkor") | |
336 | (eq_attr "type" "neon_to_gp")) | |
337 | "falkor_vtog") | |
338 | ||
339 | (define_insn_reservation "falkor_am_1_vxvy" 1 | |
340 | (and (eq_attr "tune" "falkor") | |
341 | (eq_attr "type" "neon_bsl,neon_dup,neon_ext,neon_ins,neon_ins_q,neon_move,neon_rev,neon_tbl1,neon_permute,neon_shift_imm_narrow_q")) | |
342 | "falkor_vxvy") | |
343 | ||
344 | (define_insn_reservation "falkor_am_1_vxvy_vxvy" 1 | |
345 | (and (eq_attr "tune" "falkor") | |
561d0119 | 346 | (eq_attr "type" "neon_bsl_q,neon_ext_q,neon_move_q,neon_rev_q,neon_tbl1_q,neon_permute_q")) |
825ada35 JW |
347 | "falkor_vxvy+falkor_vxvy") |
348 | ||
349 | (define_insn_reservation "falkor_am_2_vxvy" 2 | |
350 | (and (eq_attr "tune" "falkor") | |
351 | (eq_attr "type" "neon_cls,neon_cnt,neon_rbit")) | |
352 | "falkor_vxvy") | |
353 | ||
354 | (define_insn_reservation "falkor_am_4_vxvy_vxvy" 4 | |
355 | (and (eq_attr "tune" "falkor") | |
356 | (eq_attr "type" "neon_cls_q,neon_cnt_q,neon_rbit_q,neon_tbl2")) | |
357 | "falkor_vxvy+falkor_vxvy") | |
358 | ||
359 | (define_insn_reservation "falkor_am_3_vxvy" 3 | |
360 | (and (eq_attr "tune" "falkor") | |
361 | (eq_attr "type" "neon_fp_recpe_s,neon_fp_recpe_d,neon_fp_rsqrte_s,neon_fp_rsqrte_d,neon_fp_recpx_s,neon_fp_recpx_d")) | |
362 | "falkor_vxvy") | |
363 | ||
364 | (define_insn_reservation "falkor_am_3_vxvy_vxvy" 3 | |
365 | (and (eq_attr "tune" "falkor") | |
366 | (eq_attr "type" "neon_fp_recpe_s_q,neon_fp_recpe_d_q,neon_fp_rsqrte_s_q,neon_fp_rsqrte_d_q")) | |
367 | "falkor_vxvy+falkor_vxvy") | |
368 | ||
369 | (define_insn_reservation "falkor_am_5_vxvy" 5 | |
370 | (and (eq_attr "tune" "falkor") | |
371 | (eq_attr "type" "neon_fp_recps_s")) | |
372 | "falkor_vxvy") | |
373 | ||
374 | (define_insn_reservation "falkor_am_5_vxvy_vxvy" 5 | |
375 | (and (eq_attr "tune" "falkor") | |
376 | (eq_attr "type" "neon_fp_recps_s_q")) | |
377 | "falkor_vxvy+falkor_vxvy") | |
378 | ||
379 | (define_insn_reservation "falkor_am_6_vxvy" 6 | |
380 | (and (eq_attr "tune" "falkor") | |
381 | (eq_attr "type" "neon_fp_recps_d,neon_fp_rsqrts_d")) | |
382 | "falkor_vxvy") | |
383 | ||
384 | (define_insn_reservation "falkor_am_6_vxvy_vxvy" 6 | |
385 | (and (eq_attr "tune" "falkor") | |
386 | (eq_attr "type" "neon_fp_recps_d_q,neon_fp_rsqrts_d_q")) | |
387 | "falkor_vxvy+falkor_vxvy") | |
388 | ||
389 | (define_insn_reservation "falkor_am_5_vxvy_vxvy_vxvy" 5 | |
390 | (and (eq_attr "tune" "falkor") | |
391 | (eq_attr "type" "neon_tbl2_q,neon_tbl3")) | |
392 | "(falkor_vxvy+falkor_vxvy),falkor_vxvy") | |
393 | ||
394 | (define_insn_reservation "falkor_am_6_vxvy_vxvy_vxvy_vxvy" 6 | |
395 | (and (eq_attr "tune" "falkor") | |
396 | (eq_attr "type" "neon_tbl3_q,neon_tbl4")) | |
397 | "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy)") | |
398 | ||
399 | (define_insn_reservation "falkor_am_7_vxvy_vxvy_vxvy_vxvy_vxvy" 7 | |
400 | (and (eq_attr "tune" "falkor") | |
401 | (eq_attr "type" "neon_tbl4_q")) | |
402 | "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy),falkor_vxvy") | |
403 | ||
404 | ;; SIMD Store Instructions | |
405 | ||
406 | ;; ??? stp is neon_store1_2reg in aarch64.md, but neon_stp in aarch64-simd.md. | |
407 | ;; Similarly with ldp. | |
408 | ||
409 | (define_insn_reservation "falkor_ast_st_vsd" 0 | |
410 | (and (eq_attr "tune" "falkor") | |
411 | (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,neon_store1_one_lane,neon_store1_one_lane_q,neon_store1_2reg,neon_store2_2reg,neon_store2_one_lane,neon_store2_one_lane_q,neon_stp")) | |
412 | "falkor_st+falkor_vsd") | |
413 | ||
414 | (define_insn_reservation "falkor_as_0_st_vsd_st_vsd" 0 | |
415 | (and (eq_attr "tune" "falkor") | |
416 | (eq_attr "type" "neon_store1_2reg_q,neon_store1_3reg,neon_store1_4reg,neon_store2_2reg_q,neon_store3_3reg,neon_store4_4reg,neon_store3_one_lane,neon_store3_one_lane_q,neon_store4_one_lane,neon_store4_one_lane_q,neon_stp_q")) | |
417 | "(falkor_st+falkor_vsd),(falkor_st+falkor_vsd)") | |
418 | ||
419 | (define_insn_reservation "falkor_as_0_st_vsd_st_vsd_st_vsd" 0 | |
420 | (and (eq_attr "tune" "falkor") | |
421 | (eq_attr "type" "neon_store1_3reg_q,neon_store3_3reg_q")) | |
422 | "(falkor_st+falkor_vsd),(falkor_st+falkor_vsd),(falkor_st+falkor_vsd)") | |
423 | ||
424 | (define_insn_reservation "falkor_as_0_st_vsd_st_vsd_st_vsd_st_vsd" 0 | |
425 | (and (eq_attr "tune" "falkor") | |
426 | (eq_attr "type" "neon_store1_4reg_q,neon_store4_4reg_q")) | |
427 | "(falkor_st+falkor_vsd),(falkor_st+falkor_vsd),(falkor_st+falkor_vsd),(falkor_st+falkor_vsd)") | |
428 | ||
429 | ;; Branch Instructions | |
430 | ||
431 | (define_insn_reservation "falkor_branch_0_zb" 0 | |
432 | (and (eq_attr "tune" "falkor") | |
433 | (eq_attr "type" "branch")) | |
434 | "falkor_zb") | |
435 | ||
436 | (define_insn_reservation "falkor_call_0_xyzb" 0 | |
437 | (and (eq_attr "tune" "falkor") | |
438 | (eq_attr "type" "call")) | |
439 | "falkor_xyzb") | |
440 | ||
441 | ;; Cryptography Extensions | |
442 | ||
443 | (define_insn_reservation "falkor_cry_1_vxvy" 1 | |
444 | (and (eq_attr "tune" "falkor") | |
445 | (eq_attr "type" "crypto_sha1_fast")) | |
446 | "falkor_vxvy") | |
447 | ||
448 | (define_insn_reservation "falkor_cry_2_vxvy" 2 | |
449 | (and (eq_attr "tune" "falkor") | |
450 | (eq_attr "type" "crypto_aesmc")) | |
451 | "falkor_vxvy") | |
452 | ||
453 | (define_insn_reservation "falkor_cry_2_vxvy_vxvy" 2 | |
454 | (and (eq_attr "tune" "falkor") | |
455 | (eq_attr "type" "crypto_sha1_xor,crypto_sha256_fast,crypto_pmull")) | |
456 | "falkor_vxvy+falkor_vxvy") | |
457 | ||
458 | (define_insn_reservation "falkor_cry_4_vy_vx" 4 | |
459 | (and (eq_attr "tune" "falkor") | |
460 | (eq_attr "type" "crypto_sha1_slow")) | |
461 | "falkor_vy+falkor_vx") | |
462 | ||
463 | (define_insn_reservation "falkor_cry_6_vy_vx" 6 | |
464 | (and (eq_attr "tune" "falkor") | |
465 | (eq_attr "type" "crypto_sha256_slow")) | |
466 | "falkor_vy+falkor_vx") | |
467 | ||
468 | (define_insn_reservation "falkor_cry_3_vxvy_vxvy" 3 | |
469 | (and (eq_attr "tune" "falkor") | |
470 | (eq_attr "type" "crypto_aese")) | |
471 | "falkor_vxvy+falkor_vxvy") | |
472 | ||
473 | ;; FP Load Instructions | |
474 | ||
475 | (define_insn_reservation "falkor_fld_4_ld" 4 | |
476 | (and (eq_attr "tune" "falkor") | |
477 | (eq_attr "type" "f_loads,f_loadd")) | |
478 | "falkor_ld") | |
479 | ||
480 | ;; No separate FP store section, these are found in the SIMD store section. | |
481 | ||
482 | (define_insn_reservation "falkor_fld_0_st_vsd" 0 | |
483 | (and (eq_attr "tune" "falkor") | |
484 | (eq_attr "type" "f_stores,f_stored")) | |
485 | "falkor_st+falkor_vsd") | |
486 | ||
487 | ;; FP Data Processing Instructions | |
488 | ||
489 | (define_insn_reservation "falkor_fpdt_0_vxvy" 0 | |
490 | (and (eq_attr "tune" "falkor") | |
491 | (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd")) | |
492 | "falkor_vxvy") | |
493 | ||
494 | (define_insn_reservation "falkor_fpdt_5_vtog" 5 | |
495 | (and (eq_attr "tune" "falkor") | |
496 | (eq_attr "type" "f_cvtf2i")) | |
497 | "falkor_vtog") | |
498 | ||
499 | (define_insn_reservation "falkor_fpdt_1_vxvy" 1 | |
500 | (and (eq_attr "tune" "falkor") | |
501 | (eq_attr "type" "ffariths,ffarithd,fcsel")) | |
502 | "falkor_vxvy") | |
503 | ||
504 | (define_insn_reservation "falkor_fpdt_2_vxvy" 2 | |
505 | (and (eq_attr "tune" "falkor") | |
506 | (eq_attr "type" "f_minmaxd,f_minmaxs,f_rintd,f_rints")) | |
507 | "falkor_vxvy") | |
508 | ||
509 | ;; Scalar FP ABD is handled same as vector FP ABD. | |
510 | ||
511 | (define_insn_reservation "falkor_fpdt_3_vxvy" 3 | |
512 | (and (eq_attr "tune" "falkor") | |
513 | (eq_attr "type" "faddd,fadds")) | |
514 | "falkor_vxvy") | |
515 | ||
516 | (define_insn_reservation "falkor_fpdt_4_vxvy" 4 | |
517 | (and (eq_attr "tune" "falkor") | |
518 | (eq_attr "type" "f_cvt")) | |
519 | "falkor_vxvy") | |
520 | ||
521 | (define_insn_reservation "falkor_fpdt_5_vxvy_mul" 5 | |
522 | (and (eq_attr "tune" "falkor") | |
523 | (eq_attr "type" "fmuls")) | |
524 | "falkor_vxvy") | |
525 | ||
526 | (define_insn_reservation "falkor_fpdt_5_vxvy_mla" 5 | |
527 | (and (eq_attr "tune" "falkor") | |
528 | (eq_attr "type" "fmacs,ffmas")) | |
529 | "falkor_vxvy") | |
530 | ||
531 | (define_insn_reservation "falkor_fpdt_6_vxvy_mul" 6 | |
532 | (and (eq_attr "tune" "falkor") | |
533 | (eq_attr "type" "fmuld")) | |
534 | "falkor_vxvy") | |
535 | ||
536 | (define_insn_reservation "falkor_fpdt_6_vxvy_mla" 6 | |
537 | (and (eq_attr "tune" "falkor") | |
538 | (eq_attr "type" "fmacd,ffmad")) | |
539 | "falkor_vxvy") | |
540 | ||
541 | (define_insn_reservation "falkor_fpdt_6_vx_vy" 6 | |
542 | (and (eq_attr "tune" "falkor") | |
543 | (eq_attr "type" "fdivs")) | |
544 | "falkor_vx+falkor_vy") | |
545 | ||
546 | (define_insn_reservation "falkor_fpdt_11_vx_vy" 11 | |
547 | (and (eq_attr "tune" "falkor") | |
548 | (eq_attr "type" "fdivd")) | |
549 | "falkor_vx+falkor_vy") | |
550 | ||
551 | (define_insn_reservation "falkor_fpdt_12_vx_vy" 12 | |
552 | (and (eq_attr "tune" "falkor") | |
553 | (eq_attr "type" "fsqrts")) | |
554 | "falkor_vxvy") | |
555 | ||
556 | (define_insn_reservation "falkor_fpdt_22_vx_vy" 22 | |
557 | (and (eq_attr "tune" "falkor") | |
558 | (eq_attr "type" "fsqrtd")) | |
559 | "falkor_vxvy") | |
560 | ||
561 | ;; FP Miscellaneous Instructions | |
562 | ||
563 | (define_insn_reservation "falkor_fpmsc_3_vtog" 3 | |
564 | (and (eq_attr "tune" "falkor") | |
565 | (eq_attr "type" "f_mrc")) | |
566 | "falkor_vtog") | |
567 | ||
568 | (define_insn_reservation "falkor_fpmsc_3_gtov" 3 | |
569 | (and (eq_attr "tune" "falkor") | |
570 | (eq_attr "type" "f_mcr")) | |
571 | "falkor_gtov") | |
572 | ||
573 | (define_insn_reservation "falkor_fpmsc_1_vxvy" 1 | |
574 | (and (eq_attr "tune" "falkor") | |
575 | (eq_attr "type" "fmov,fconsts,fconstd")) | |
576 | "falkor_vxvy") | |
577 | ||
578 | ;; No separate type for float-to-fixed conversions. Same type as | |
579 | ;; float-to-int conversions. They schedule the same though, so no problem. | |
580 | ||
581 | (define_insn_reservation "falkor_fpmsc_6_gtov" 6 | |
582 | (and (eq_attr "tune" "falkor") | |
583 | (eq_attr "type" "f_cvti2f")) | |
584 | "falkor_gtov") | |
585 | ||
586 | ;; Load Instructions | |
587 | ||
588 | (define_insn_reservation "falkor_ld_3_ld" 3 | |
589 | (and (eq_attr "tune" "falkor") | |
db46a2e6 | 590 | (eq_attr "type" "load_4,load_8,load_16")) |
825ada35 JW |
591 | "falkor_ld") |
592 | ||
593 | ;; Miscellaneous Data-Processing Instructions | |
594 | ||
595 | (define_insn_reservation "falkor_misc_1_xyz" 1 | |
596 | (and (eq_attr "tune" "falkor") | |
597 | (eq_attr "type" "bfx,bfm,extend,rotate_imm,shift_imm")) | |
598 | "falkor_xyz") | |
599 | ||
600 | (define_insn_reservation "falkor_misc_2_x" 2 | |
601 | (and (eq_attr "tune" "falkor") | |
602 | (eq_attr "type" "crc")) | |
603 | "falkor_x") | |
604 | ||
605 | (define_insn_reservation "falkor_misc_2_xyz" 2 | |
606 | (and (eq_attr "tune" "falkor") | |
607 | (eq_attr "type" "clz,rbit,rev")) | |
608 | "falkor_xyz") | |
609 | ||
610 | ;; Divide and Multiply Instructions | |
611 | ||
612 | (define_insn_reservation "falkor_muldiv_4_x_mul" 4 | |
613 | (and (eq_attr "tune" "falkor") | |
614 | (eq_attr "type" "mul")) | |
615 | "falkor_x") | |
616 | ||
617 | (define_insn_reservation "falkor_muldiv_4_x_mla" 4 | |
618 | (and (eq_attr "tune" "falkor") | |
619 | (eq_attr "type" "mla,smlal,umlal")) | |
620 | "falkor_x") | |
621 | ||
622 | (define_insn_reservation "falkor_muldiv_5_x_mul" 5 | |
623 | (and (eq_attr "tune" "falkor") | |
624 | (eq_attr "type" "smull,umull")) | |
625 | "falkor_x") | |
626 | ||
627 | (define_insn_reservation "falkor_md_11_x_z" 11 | |
628 | (and (eq_attr "tune" "falkor") | |
629 | (eq_attr "type" "sdiv,udiv")) | |
630 | "falkor_x+falkor_z") | |
631 | ||
632 | ;; Move and Shift Instructions | |
633 | ||
634 | (define_insn_reservation "falkor_mvs_1_xyz" 1 | |
635 | (and (eq_attr "tune" "falkor") | |
636 | (eq_attr "type" "mov_imm,shift_reg")) | |
637 | "falkor_xyz") | |
638 | ||
639 | (define_insn_reservation "falkor_mvs_1_xyzb" 1 | |
640 | (and (eq_attr "tune" "falkor") | |
641 | (eq_attr "type" "adr")) | |
642 | "falkor_xyzb") | |
643 | ||
644 | ;; Other Instructions | |
645 | ||
646 | ;; Block is for instruction scheduling blockage insns in RTL. There are no | |
647 | ;; hardware instructions emitted for them, so don't use any resources. | |
648 | ||
649 | (define_insn_reservation "falkor_other_0_nothing" 0 | |
650 | (and (eq_attr "tune" "falkor") | |
651 | (eq_attr "type" "no_insn,trap,block")) | |
652 | "nothing") | |
653 | ||
654 | (define_insn_reservation "falkor_other_2_z" 2 | |
655 | (and (eq_attr "tune" "falkor") | |
656 | (eq_attr "type" "mrs")) | |
657 | "falkor_z") | |
658 | ||
659 | ;; Assume multiple instructions use all pipes. | |
660 | ||
661 | (define_insn_reservation "falkor_extra" 1 | |
662 | (and (eq_attr "tune" "falkor") | |
663 | (eq_attr "type" "multiple")) | |
664 | "falkor_x+falkor_y+falkor_z+falkor_b+falkor_vx+falkor_vy+falkor_ld+falkor_st+falkor_sd+falkor_vsd+falkor_gtov+falkor_vtog") | |
665 | ||
666 | ;; Store Instructions | |
667 | ||
668 | ;; No use of store_rel, store3, or store4 in aarch64. | |
669 | ||
670 | (define_insn_reservation "falkor_st_0_st_sd" 0 | |
671 | (and (eq_attr "tune" "falkor") | |
db46a2e6 | 672 | (eq_attr "type" "store_4,store_8,store_16")) |
825ada35 JW |
673 | "falkor_st+falkor_sd") |
674 | \f | |
675 | ;; Muliply bypasses. | |
676 | ||
677 | ;; 1 cycle latency (0 bubble) for an integer mul or mac feeding into a mac. | |
678 | ||
679 | (define_bypass 1 | |
680 | "falkor_ai_4_vxvy_mul,falkor_ai_4_vxvy_mla,falkor_ai_4_vxvy_vxvy_mul,falkor_ai_4_vxvy_vxvy_mla,falkor_muldiv_4_x_mul,falkor_muldiv_4_x_mla,falkor_muldiv_5_x_mul" | |
681 | "falkor_ai_4_vxvy_mla,falkor_ai_4_vxvy_vxvy_mla,falkor_muldiv_4_x_mla") | |
682 | ||
683 | ;; 3 cycle latency (2 bubbles) for an FP mul or mac feeding into a mac. | |
684 | ||
685 | (define_bypass 3 | |
686 | "falkor_afp_5_vxvy_mul,falkor_afp_5_vxvy_mla,falkor_afp_5_vxvy_vxvy_mul,falkor_afp_5_vxvy_vxvy_mla,falkor_afp_6_vxvy_mul,falkor_afp_6_vxvy_mla,falkor_afp_6_vxvy_vxvy_mul,falkor_afp_6_vxvy_vxvy_mla,falkor_fpdt_5_vxvy_mul,falkor_fpdt_5_vxvy_mla,falkor_fpdt_6_vxvy_mul,falkor_fpdt_6_vxvy_mla" | |
687 | "falkor_afp_5_vxvy_mla,falkor_afp_5_vxvy_vxvy_mla,falkor_afp_6_vxvy_mla,falkor_afp_6_vxvy_vxvy_mla,falkor_fpdt_5_vxvy_mla,falkor_fpdt_6_vxvy_mla") |