[thirdparty/gcc.git] / gcc / config / aarch64 / thunderx2t99.md

;; Cavium ThunderX 2 CN99xx pipeline description
;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
;;
;; Contributed by Cavium, Broadcom and Mentor Embedded.

;; This file is part of GCC.

;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.

;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;; GNU General Public License for more details.

;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3.  If not see
;; <http://www.gnu.org/licenses/>.

(define_automaton "thunderx2t99, thunderx2t99_advsimd, thunderx2t99_ldst")
(define_automaton "thunderx2t99_mult")

(define_cpu_unit "thunderx2t99_i0" "thunderx2t99")
(define_cpu_unit "thunderx2t99_i1" "thunderx2t99")
(define_cpu_unit "thunderx2t99_i2" "thunderx2t99")

(define_cpu_unit "thunderx2t99_ls0" "thunderx2t99_ldst")
(define_cpu_unit "thunderx2t99_ls1" "thunderx2t99_ldst")
(define_cpu_unit "thunderx2t99_sd" "thunderx2t99_ldst")

; Pseudo-units for multiply pipeline.

(define_cpu_unit "thunderx2t99_i1m1" "thunderx2t99_mult")
(define_cpu_unit "thunderx2t99_i1m2" "thunderx2t99_mult")
(define_cpu_unit "thunderx2t99_i1m3" "thunderx2t99_mult")

; Pseudo-units for load delay (assuming dcache hit).

(define_cpu_unit "thunderx2t99_ls0d1" "thunderx2t99_ldst")
(define_cpu_unit "thunderx2t99_ls0d2" "thunderx2t99_ldst")
(define_cpu_unit "thunderx2t99_ls0d3" "thunderx2t99_ldst")

(define_cpu_unit "thunderx2t99_ls1d1" "thunderx2t99_ldst")
(define_cpu_unit "thunderx2t99_ls1d2" "thunderx2t99_ldst")
(define_cpu_unit "thunderx2t99_ls1d3" "thunderx2t99_ldst")

; Make some aliases for f0/f1.
(define_cpu_unit "thunderx2t99_f0" "thunderx2t99_advsimd")
(define_cpu_unit "thunderx2t99_f1" "thunderx2t99_advsimd")

(define_reservation "thunderx2t99_i012" "thunderx2t99_i0|thunderx2t99_i1|thunderx2t99_i2")
(define_reservation "thunderx2t99_ls01" "thunderx2t99_ls0|thunderx2t99_ls1")
(define_reservation "thunderx2t99_f01" "thunderx2t99_f0|thunderx2t99_f1")

; A load with delay in the ls0/ls1 pipes.
(define_reservation "thunderx2t99_l0delay" "thunderx2t99_ls0,\
				      thunderx2t99_ls0d1,thunderx2t99_ls0d2,\
				      thunderx2t99_ls0d3")
(define_reservation "thunderx2t99_l1delay" "thunderx2t99_ls1,\
				      thunderx2t99_ls1d1,thunderx2t99_ls1d2,\
				      thunderx2t99_ls1d3")
(define_reservation "thunderx2t99_l01delay" "thunderx2t99_l0delay|thunderx2t99_l1delay")

;; Branch and call instructions.

(define_insn_reservation "thunderx2t99_branch" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "call,branch,trap"))
  "thunderx2t99_i2")

;; Misc instructions.

(define_insn_reservation "thunderx2t99_nothing" 0
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "no_insn,block"))
  "nothing")

(define_insn_reservation "thunderx2t99_mrs" 0
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "mrs"))
  "thunderx2t99_i2")

(define_insn_reservation "thunderx2t99_multiple" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "multiple,untyped"))
  "thunderx2t99_i0+thunderx2t99_i1+thunderx2t99_i2+thunderx2t99_ls0+\
   thunderx2t99_ls1+thunderx2t99_sd+thunderx2t99_i1m1+thunderx2t99_i1m2+\
   thunderx2t99_i1m3+thunderx2t99_f0+thunderx2t99_f1")

;; Integer arithmetic/logic instructions.

; Plain register moves are handled by renaming, and don't create any uops.

(define_insn_reservation "thunderx2t99_regmove" 0
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "mov_reg"))
  "nothing")

(define_insn_reservation "thunderx2t99_alu_basic" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,\
			adc_reg,adc_imm,adcs_reg,adcs_imm,\
			logic_reg,logic_imm,logics_reg,logics_imm,\
			csel,adr,mov_imm,shift_reg,shift_imm,bfm,\
			bfx,rbit,rev,extend,rotate_imm"))
  "thunderx2t99_i012")

(define_insn_reservation "thunderx2t99_alu_shift" 2
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "alu_shift_imm,alu_ext,\
			alus_shift_imm,alus_ext,\
			logic_shift_imm,logics_shift_imm"))
  "thunderx2t99_i012,thunderx2t99_i012")

(define_insn_reservation "thunderx2t99_div" 13
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "sdiv,udiv"))
  "thunderx2t99_i1*3")

(define_insn_reservation "thunderx2t99_madd" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "mla,smlal,umlal"))
  "thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3,\
   thunderx2t99_i012")

; NOTE: smull, umull are used for "high part" multiplies too.
(define_insn_reservation "thunderx2t99_mul" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "mul,smull,umull"))
  "thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3")

(define_insn_reservation "thunderx2t99_countbits" 3
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "clz"))
  "thunderx2t99_i1")

;; Integer loads and stores.

(define_insn_reservation "thunderx2t99_load_basic" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "load_4"))
  "thunderx2t99_ls01")

(define_insn_reservation "thunderx2t99_loadpair" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "load_8,load_16"))
  "thunderx2t99_i012,thunderx2t99_ls01")

(define_insn_reservation "thunderx2t99_store_basic" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "store_4"))
  "thunderx2t99_ls01,thunderx2t99_sd")

(define_insn_reservation "thunderx2t99_storepair_basic" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "store_8,store_16"))
  "thunderx2t99_ls01,thunderx2t99_sd")

;; FP data processing instructions.

(define_insn_reservation "thunderx2t99_fp_simple" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "ffariths,ffarithd,f_minmaxs,f_minmaxd"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_fp_addsub" 6
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fadds,faddd"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_fp_cmp" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fdivs,fsqrts"))
  "thunderx2t99_f0*3|thunderx2t99_f1*3")

(define_insn_reservation "thunderx2t99_fp_divsqrt_d" 23
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fdivd,fsqrtd"))
  "thunderx2t99_f0*5|thunderx2t99_f1*5")

(define_insn_reservation "thunderx2t99_fp_mul_mac" 6
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fmuls,fmuld,fmacs,fmacd"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_frint" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "f_rints,f_rintd"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_fcsel" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fcsel"))
  "thunderx2t99_f01")

;; FP miscellaneous instructions.

(define_insn_reservation "thunderx2t99_fp_cvt" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "f_cvtf2i,f_cvt,f_cvti2f"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_fp_mov" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "fconsts,fconstd,fmov,f_mrc"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_fp_mov_to_gen" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "f_mcr"))
  "thunderx2t99_f01")

;; FP loads and stores.

(define_insn_reservation "thunderx2t99_fp_load_basic" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "f_loads,f_loadd"))
  "thunderx2t99_ls01")

(define_insn_reservation "thunderx2t99_fp_store_basic" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "f_stores,f_stored"))
  "thunderx2t99_ls01,thunderx2t99_sd")

;; ASIMD integer instructions.

(define_insn_reservation "thunderx2t99_asimd_int" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_abd,neon_abd_q,\
			neon_arith_acc,neon_arith_acc_q,\
			neon_abs,neon_abs_q,\
			neon_add,neon_add_q,\
			neon_sub,neon_sub_q,\
			neon_neg,neon_neg_q,\
			neon_add_long,neon_add_widen,\
			neon_add_halve,neon_add_halve_q,\
			neon_sub_long,neon_sub_widen,\
			neon_sub_halve,neon_sub_halve_q,\
			neon_add_halve_narrow_q,neon_sub_halve_narrow_q,\
			neon_qabs,neon_qabs_q,\
			neon_qadd,neon_qadd_q,\
			neon_qneg,neon_qneg_q,\
			neon_qsub,neon_qsub_q,\
			neon_minmax,neon_minmax_q,\
			neon_reduc_minmax,neon_reduc_minmax_q,\
			neon_mul_b,neon_mul_h,neon_mul_s,\
			neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,\
			neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,\
			neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\
			neon_mla_b,neon_mla_h,neon_mla_s,\
			neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\
			neon_mul_b_long,neon_mul_h_long,\
			neon_mul_s_long,neon_mul_d_long,\
			neon_sat_mul_b_long,neon_sat_mul_h_long,\
			neon_sat_mul_s_long,\
			neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\
			neon_sat_mla_b_long,neon_sat_mla_h_long,\
			neon_sat_mla_s_long,\
			neon_shift_acc,neon_shift_acc_q,\
			neon_shift_imm,neon_shift_imm_q,\
			neon_shift_reg,neon_shift_reg_q,\
			neon_shift_imm_long,neon_shift_imm_narrow_q,\
			neon_sat_shift_imm,neon_sat_shift_imm_q,\
			neon_sat_shift_reg,neon_sat_shift_reg_q,\
			neon_sat_shift_imm_narrow_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_reduc_add" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_reduc_add,neon_reduc_add_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_cmp" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_compare,neon_compare_q,neon_compare_zero,\
			neon_tst,neon_tst_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_logic" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_logic,neon_logic_q"))
  "thunderx2t99_f01")

;; ASIMD floating-point instructions.

(define_insn_reservation "thunderx2t99_asimd_fp_simple" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_fp_abs_s,neon_fp_abs_d,\
			neon_fp_abs_s_q,neon_fp_abs_d_q,\
			neon_fp_compare_s,neon_fp_compare_d,\
			neon_fp_compare_s_q,neon_fp_compare_d_q,\
			neon_fp_minmax_s,neon_fp_minmax_d,\
			neon_fp_minmax_s_q,neon_fp_minmax_d_q,\
			neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,\
			neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,\
			neon_fp_neg_s,neon_fp_neg_d,\
			neon_fp_neg_s_q,neon_fp_neg_d_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_fp_arith" 6
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\
			neon_fp_abd_s_q,neon_fp_abd_d_q,\
			neon_fp_addsub_s,neon_fp_addsub_d,\
			neon_fp_addsub_s_q,neon_fp_addsub_d_q,\
			neon_fp_reduc_add_s,neon_fp_reduc_add_d,\
			neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q,\
			neon_fp_mul_s,neon_fp_mul_d,\
			neon_fp_mul_s_q,neon_fp_mul_d_q,\
			neon_fp_mul_s_scalar_q,neon_fp_mul_d_scalar_q,\
			neon_fp_mla_s,neon_fp_mla_d,\
			neon_fp_mla_s_q,neon_fp_mla_d_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_fp_conv" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q,\
			neon_fp_to_int_s,neon_fp_to_int_d,\
			neon_fp_to_int_s_q,neon_fp_to_int_d_q,\
			neon_int_to_fp_s,neon_int_to_fp_d,\
			neon_int_to_fp_s_q,neon_int_to_fp_d_q,\
			neon_fp_round_s,neon_fp_round_d,\
			neon_fp_round_s_q,neon_fp_round_d_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_fp_div_s" 16
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_fp_div_s,neon_fp_div_s_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_fp_div_d" 23
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_fp_div_d,neon_fp_div_d_q"))
  "thunderx2t99_f01")

;; ASIMD miscellaneous instructions.

(define_insn_reservation "thunderx2t99_asimd_misc" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_rbit,\
			neon_bsl,neon_bsl_q,\
			neon_cls,neon_cls_q,\
			neon_cnt,neon_cnt_q,\
			neon_from_gp,neon_from_gp_q,\
			neon_dup,neon_dup_q,\
			neon_ext,neon_ext_q,\
			neon_ins,neon_ins_q,\
			neon_move,neon_move_q,\
			neon_fp_recpe_s,neon_fp_recpe_d,\
			neon_fp_recpe_s_q,neon_fp_recpe_d_q,\
			neon_fp_recpx_s,neon_fp_recpx_d,\
			neon_fp_recpx_s_q,neon_fp_recpx_d_q,\
			neon_rev,neon_rev_q,\
			neon_permute,neon_permute_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_recip_step" 6
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_fp_recps_s,neon_fp_recps_s_q,\
			neon_fp_recps_d,neon_fp_recps_d_q,\
			neon_fp_sqrt_s,neon_fp_sqrt_s_q,\
			neon_fp_sqrt_d,neon_fp_sqrt_d_q,\
			neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\
			neon_fp_rsqrte_d, neon_fp_rsqrte_d_q,\
			neon_fp_rsqrts_s, neon_fp_rsqrts_s_q,\
			neon_fp_rsqrts_d, neon_fp_rsqrts_d_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_lut" 8
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_tbl1,neon_tbl1_q,neon_tbl2,neon_tbl2_q,\
			neon_tbl3,neon_tbl3_q,neon_tbl4,neon_tbl4_q"))
  "thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_elt_to_gr" 6
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_to_gp,neon_to_gp_q"))
  "thunderx2t99_f01")

;; ASIMD load instructions.

; NOTE: These reservations attempt to model latency and throughput correctly,
; but the cycle timing of unit allocation is not necessarily accurate (because
; insns are split into uops, and those may be issued out-of-order).

(define_insn_reservation "thunderx2t99_asimd_load1_ldp" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_ldp,neon_ldp_q"))
  "thunderx2t99_i012,thunderx2t99_ls01")

(define_insn_reservation "thunderx2t99_asimd_load1" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q,\
			neon_load1_2reg,neon_load1_2reg_q,\
			neon_load1_3reg,neon_load1_3reg_q,\
			neon_load1_4reg,neon_load1_4reg_q"))
  "thunderx2t99_ls01")

(define_insn_reservation "thunderx2t99_asimd_load1_onelane" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_load1_one_lane,neon_load1_one_lane_q"))
  "thunderx2t99_l01delay,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_load1_all" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q"))
  "thunderx2t99_l01delay,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_load2" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_load2_2reg,neon_load2_2reg_q,\
			neon_load2_one_lane,neon_load2_one_lane_q,\
			neon_load2_all_lanes,neon_load2_all_lanes_q"))
  "thunderx2t99_l01delay,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_load3" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_load3_3reg,neon_load3_3reg_q,\
			neon_load3_one_lane,neon_load3_one_lane_q,\
			neon_load3_all_lanes,neon_load3_all_lanes_q"))
  "thunderx2t99_l01delay,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_load4" 8
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_load4_4reg,neon_load4_4reg_q,\
			neon_load4_one_lane,neon_load4_one_lane_q,\
			neon_load4_all_lanes,neon_load4_all_lanes_q"))
  "thunderx2t99_l01delay,thunderx2t99_f01")

;; ASIMD store instructions.

; Same note applies as for ASIMD load instructions.

(define_insn_reservation "thunderx2t99_asimd_store_stp" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_stp,neon_stp_q"))
  "thunderx2t99_ls01,thunderx2t99_sd")

(define_insn_reservation "thunderx2t99_asimd_store1" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,\
			neon_store1_2reg,neon_store1_2reg_q,\
			neon_store1_3reg,neon_store1_4reg"))
  "thunderx2t99_ls01")

(define_insn_reservation "thunderx2t99_asimd_store1_onelane" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_store1_one_lane,neon_store1_one_lane_q"))
  "thunderx2t99_ls01,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_store2" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_store2_2reg,neon_store2_2reg_q,\
			neon_store2_one_lane,neon_store2_one_lane_q"))
  "thunderx2t99_ls01,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_store3" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_store3_3reg,neon_store3_3reg_q,\
			neon_store3_one_lane,neon_store3_one_lane_q"))
  "thunderx2t99_ls01,thunderx2t99_f01")

(define_insn_reservation "thunderx2t99_asimd_store4" 1
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "neon_store4_4reg,neon_store4_4reg_q,\
			neon_store4_one_lane,neon_store4_one_lane_q"))
  "thunderx2t99_ls01,thunderx2t99_f01")

;; Crypto extensions.

(define_insn_reservation "thunderx2t99_aes" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "crypto_aese,crypto_aesmc"))
  "thunderx2t99_f1")

(define_insn_reservation "thunderx2t99_sha" 7
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "crypto_sha1_fast,crypto_sha1_xor,crypto_sha1_slow,\
			crypto_sha256_fast,crypto_sha256_slow"))
  "thunderx2t99_f1")

;; CRC extension.

(define_insn_reservation "thunderx2t99_crc" 4
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "crc"))
  "thunderx2t99_i1")

;; PMULL extension.

(define_insn_reservation "thunderx2t99_pmull" 5
  (and (eq_attr "tune" "thunderx2t99")
       (eq_attr "type" "crypto_pmull"))
  "thunderx2t99_f1")
Commit	Line	Data
715a2a15	1	;; Cavium ThunderX 2 CN99xx pipeline description
fbd26352	2	;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
715a2a15	3	;;
	4	;; Contributed by Cavium, Broadcom and Mentor Embedded.
	5
	6	;; This file is part of GCC.
	7
	8	;; GCC is free software; you can redistribute it and/or modify
	9	;; it under the terms of the GNU General Public License as published by
	10	;; the Free Software Foundation; either version 3, or (at your option)
	11	;; any later version.
	12
	13	;; GCC is distributed in the hope that it will be useful,
	14	;; but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	;; GNU General Public License for more details.
	17
	18	;; You should have received a copy of the GNU General Public License
	19	;; along with GCC; see the file COPYING3. If not see
	20	;; <http://www.gnu.org/licenses/>.
	21
	22	(define_automaton "thunderx2t99, thunderx2t99_advsimd, thunderx2t99_ldst")
	23	(define_automaton "thunderx2t99_mult")
	24
	25	(define_cpu_unit "thunderx2t99_i0" "thunderx2t99")
	26	(define_cpu_unit "thunderx2t99_i1" "thunderx2t99")
	27	(define_cpu_unit "thunderx2t99_i2" "thunderx2t99")
	28
	29	(define_cpu_unit "thunderx2t99_ls0" "thunderx2t99_ldst")
	30	(define_cpu_unit "thunderx2t99_ls1" "thunderx2t99_ldst")
	31	(define_cpu_unit "thunderx2t99_sd" "thunderx2t99_ldst")
	32
	33	; Pseudo-units for multiply pipeline.
	34
	35	(define_cpu_unit "thunderx2t99_i1m1" "thunderx2t99_mult")
	36	(define_cpu_unit "thunderx2t99_i1m2" "thunderx2t99_mult")
	37	(define_cpu_unit "thunderx2t99_i1m3" "thunderx2t99_mult")
	38
	39	; Pseudo-units for load delay (assuming dcache hit).
	40
	41	(define_cpu_unit "thunderx2t99_ls0d1" "thunderx2t99_ldst")
	42	(define_cpu_unit "thunderx2t99_ls0d2" "thunderx2t99_ldst")
	43	(define_cpu_unit "thunderx2t99_ls0d3" "thunderx2t99_ldst")
	44
	45	(define_cpu_unit "thunderx2t99_ls1d1" "thunderx2t99_ldst")
	46	(define_cpu_unit "thunderx2t99_ls1d2" "thunderx2t99_ldst")
	47	(define_cpu_unit "thunderx2t99_ls1d3" "thunderx2t99_ldst")
	48
	49	; Make some aliases for f0/f1.
	50	(define_cpu_unit "thunderx2t99_f0" "thunderx2t99_advsimd")
	51	(define_cpu_unit "thunderx2t99_f1" "thunderx2t99_advsimd")
	52
	53	(define_reservation "thunderx2t99_i012" "thunderx2t99_i0\|thunderx2t99_i1\|thunderx2t99_i2")
	54	(define_reservation "thunderx2t99_ls01" "thunderx2t99_ls0\|thunderx2t99_ls1")
	55	(define_reservation "thunderx2t99_f01" "thunderx2t99_f0\|thunderx2t99_f1")
	56
715a2a15	57	; A load with delay in the ls0/ls1 pipes.
	58	(define_reservation "thunderx2t99_l0delay" "thunderx2t99_ls0,\
	59	thunderx2t99_ls0d1,thunderx2t99_ls0d2,\
	60	thunderx2t99_ls0d3")
	61	(define_reservation "thunderx2t99_l1delay" "thunderx2t99_ls1,\
	62	thunderx2t99_ls1d1,thunderx2t99_ls1d2,\
	63	thunderx2t99_ls1d3")
	64	(define_reservation "thunderx2t99_l01delay" "thunderx2t99_l0delay\|thunderx2t99_l1delay")
	65
	66	;; Branch and call instructions.
	67
	68	(define_insn_reservation "thunderx2t99_branch" 1
	69	(and (eq_attr "tune" "thunderx2t99")
4c7a29d5	70	(eq_attr "type" "call,branch,trap"))
715a2a15	71	"thunderx2t99_i2")
715a2a15	72
4c7a29d5	73	;; Misc instructions.
	74
	75	(define_insn_reservation "thunderx2t99_nothing" 0
	76	(and (eq_attr "tune" "thunderx2t99")
	77	(eq_attr "type" "no_insn,block"))
	78	"nothing")
	79
	80	(define_insn_reservation "thunderx2t99_mrs" 0
	81	(and (eq_attr "tune" "thunderx2t99")
	82	(eq_attr "type" "mrs"))
	83	"thunderx2t99_i2")
	84
	85	(define_insn_reservation "thunderx2t99_multiple" 1
	86	(and (eq_attr "tune" "thunderx2t99")
08f08c40	87	(eq_attr "type" "multiple,untyped"))
4c7a29d5	88	"thunderx2t99_i0+thunderx2t99_i1+thunderx2t99_i2+thunderx2t99_ls0+\
4c7a29d5	89	thunderx2t99_ls1+thunderx2t99_sd+thunderx2t99_i1m1+thunderx2t99_i1m2+\
08f08c40	90	thunderx2t99_i1m3+thunderx2t99_f0+thunderx2t99_f1")
4c7a29d5	91
715a2a15	92	;; Integer arithmetic/logic instructions.
	93
	94	; Plain register moves are handled by renaming, and don't create any uops.
	95
	96	(define_insn_reservation "thunderx2t99_regmove" 0
	97	(and (eq_attr "tune" "thunderx2t99")
	98	(eq_attr "type" "mov_reg"))
	99	"nothing")
	100
	101	(define_insn_reservation "thunderx2t99_alu_basic" 1
	102	(and (eq_attr "tune" "thunderx2t99")
	103	(eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,\
	104	adc_reg,adc_imm,adcs_reg,adcs_imm,\
	105	logic_reg,logic_imm,logics_reg,logics_imm,\
	106	csel,adr,mov_imm,shift_reg,shift_imm,bfm,\
4c7a29d5	107	bfx,rbit,rev,extend,rotate_imm"))
715a2a15	108	"thunderx2t99_i012")
	109
	110	(define_insn_reservation "thunderx2t99_alu_shift" 2
	111	(and (eq_attr "tune" "thunderx2t99")
08f08c40	112	(eq_attr "type" "alu_shift_imm,alu_ext,\
	113	alus_shift_imm,alus_ext,\
	114	logic_shift_imm,logics_shift_imm"))
715a2a15	115	"thunderx2t99_i012,thunderx2t99_i012")
	116
	117	(define_insn_reservation "thunderx2t99_div" 13
	118	(and (eq_attr "tune" "thunderx2t99")
	119	(eq_attr "type" "sdiv,udiv"))
	120	"thunderx2t99_i1*3")
	121
	122	(define_insn_reservation "thunderx2t99_madd" 5
	123	(and (eq_attr "tune" "thunderx2t99")
	124	(eq_attr "type" "mla,smlal,umlal"))
	125	"thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3,\
	126	thunderx2t99_i012")
	127
	128	; NOTE: smull, umull are used for "high part" multiplies too.
	129	(define_insn_reservation "thunderx2t99_mul" 4
	130	(and (eq_attr "tune" "thunderx2t99")
	131	(eq_attr "type" "mul,smull,umull"))
	132	"thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3")
	133
	134	(define_insn_reservation "thunderx2t99_countbits" 3
	135	(and (eq_attr "tune" "thunderx2t99")
	136	(eq_attr "type" "clz"))
	137	"thunderx2t99_i1")
	138
	139	;; Integer loads and stores.
	140
	141	(define_insn_reservation "thunderx2t99_load_basic" 4
	142	(and (eq_attr "tune" "thunderx2t99")
9f2c2a36	143	(eq_attr "type" "load_4"))
715a2a15	144	"thunderx2t99_ls01")
	145
	146	(define_insn_reservation "thunderx2t99_loadpair" 5
	147	(and (eq_attr "tune" "thunderx2t99")
b0a3c001	148	(eq_attr "type" "load_8,load_16"))
715a2a15	149	"thunderx2t99_i012,thunderx2t99_ls01")
	150
	151	(define_insn_reservation "thunderx2t99_store_basic" 1
	152	(and (eq_attr "tune" "thunderx2t99")
9f2c2a36	153	(eq_attr "type" "store_4"))
715a2a15	154	"thunderx2t99_ls01,thunderx2t99_sd")
	155
	156	(define_insn_reservation "thunderx2t99_storepair_basic" 1
	157	(and (eq_attr "tune" "thunderx2t99")
b0a3c001	158	(eq_attr "type" "store_8,store_16"))
715a2a15	159	"thunderx2t99_ls01,thunderx2t99_sd")
	160
	161	;; FP data processing instructions.
	162
	163	(define_insn_reservation "thunderx2t99_fp_simple" 5
	164	(and (eq_attr "tune" "thunderx2t99")
	165	(eq_attr "type" "ffariths,ffarithd,f_minmaxs,f_minmaxd"))
	166	"thunderx2t99_f01")
	167
	168	(define_insn_reservation "thunderx2t99_fp_addsub" 6
	169	(and (eq_attr "tune" "thunderx2t99")
	170	(eq_attr "type" "fadds,faddd"))
	171	"thunderx2t99_f01")
	172
	173	(define_insn_reservation "thunderx2t99_fp_cmp" 5
	174	(and (eq_attr "tune" "thunderx2t99")
4c7a29d5	175	(eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))
715a2a15	176	"thunderx2t99_f01")
	177
	178	(define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16
	179	(and (eq_attr "tune" "thunderx2t99")
	180	(eq_attr "type" "fdivs,fsqrts"))
	181	"thunderx2t99_f03\|thunderx2t99_f13")
	182
	183	(define_insn_reservation "thunderx2t99_fp_divsqrt_d" 23
	184	(and (eq_attr "tune" "thunderx2t99")
	185	(eq_attr "type" "fdivd,fsqrtd"))
	186	"thunderx2t99_f05\|thunderx2t99_f15")
	187
	188	(define_insn_reservation "thunderx2t99_fp_mul_mac" 6
	189	(and (eq_attr "tune" "thunderx2t99")
	190	(eq_attr "type" "fmuls,fmuld,fmacs,fmacd"))
	191	"thunderx2t99_f01")
	192
	193	(define_insn_reservation "thunderx2t99_frint" 7
	194	(and (eq_attr "tune" "thunderx2t99")
	195	(eq_attr "type" "f_rints,f_rintd"))
	196	"thunderx2t99_f01")
	197
	198	(define_insn_reservation "thunderx2t99_fcsel" 4
	199	(and (eq_attr "tune" "thunderx2t99")
	200	(eq_attr "type" "fcsel"))
	201	"thunderx2t99_f01")
	202
	203	;; FP miscellaneous instructions.
	204
	205	(define_insn_reservation "thunderx2t99_fp_cvt" 7
	206	(and (eq_attr "tune" "thunderx2t99")
	207	(eq_attr "type" "f_cvtf2i,f_cvt,f_cvti2f"))
	208	"thunderx2t99_f01")
	209
	210	(define_insn_reservation "thunderx2t99_fp_mov" 4
	211	(and (eq_attr "tune" "thunderx2t99")
	212	(eq_attr "type" "fconsts,fconstd,fmov,f_mrc"))
	213	"thunderx2t99_f01")
	214
	215	(define_insn_reservation "thunderx2t99_fp_mov_to_gen" 5
	216	(and (eq_attr "tune" "thunderx2t99")
	217	(eq_attr "type" "f_mcr"))
	218	"thunderx2t99_f01")
	219
	220	;; FP loads and stores.
	221
	222	(define_insn_reservation "thunderx2t99_fp_load_basic" 4
	223	(and (eq_attr "tune" "thunderx2t99")
	224	(eq_attr "type" "f_loads,f_loadd"))
	225	"thunderx2t99_ls01")
	226
715a2a15	227	(define_insn_reservation "thunderx2t99_fp_store_basic" 1
	228	(and (eq_attr "tune" "thunderx2t99")
	229	(eq_attr "type" "f_stores,f_stored"))
	230	"thunderx2t99_ls01,thunderx2t99_sd")
	231
715a2a15	232	;; ASIMD integer instructions.
	233
	234	(define_insn_reservation "thunderx2t99_asimd_int" 7
	235	(and (eq_attr "tune" "thunderx2t99")
	236	(eq_attr "type" "neon_abd,neon_abd_q,\
	237	neon_arith_acc,neon_arith_acc_q,\
	238	neon_abs,neon_abs_q,\
	239	neon_add,neon_add_q,\
08f08c40	240	neon_sub,neon_sub_q,\
715a2a15	241	neon_neg,neon_neg_q,\
	242	neon_add_long,neon_add_widen,\
	243	neon_add_halve,neon_add_halve_q,\
	244	neon_sub_long,neon_sub_widen,\
	245	neon_sub_halve,neon_sub_halve_q,\
	246	neon_add_halve_narrow_q,neon_sub_halve_narrow_q,\
	247	neon_qabs,neon_qabs_q,\
	248	neon_qadd,neon_qadd_q,\
	249	neon_qneg,neon_qneg_q,\
	250	neon_qsub,neon_qsub_q,\
	251	neon_minmax,neon_minmax_q,\
	252	neon_reduc_minmax,neon_reduc_minmax_q,\
	253	neon_mul_b,neon_mul_h,neon_mul_s,\
	254	neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,\
	255	neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,\
	256	neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\
	257	neon_mla_b,neon_mla_h,neon_mla_s,\
	258	neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\
	259	neon_mul_b_long,neon_mul_h_long,\
	260	neon_mul_s_long,neon_mul_d_long,\
	261	neon_sat_mul_b_long,neon_sat_mul_h_long,\
	262	neon_sat_mul_s_long,\
	263	neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\
	264	neon_sat_mla_b_long,neon_sat_mla_h_long,\
	265	neon_sat_mla_s_long,\
	266	neon_shift_acc,neon_shift_acc_q,\
	267	neon_shift_imm,neon_shift_imm_q,\
	268	neon_shift_reg,neon_shift_reg_q,\
	269	neon_shift_imm_long,neon_shift_imm_narrow_q,\
	270	neon_sat_shift_imm,neon_sat_shift_imm_q,\
	271	neon_sat_shift_reg,neon_sat_shift_reg_q,\
	272	neon_sat_shift_imm_narrow_q"))
	273	"thunderx2t99_f01")
	274
	275	(define_insn_reservation "thunderx2t99_asimd_reduc_add" 5
	276	(and (eq_attr "tune" "thunderx2t99")
	277	(eq_attr "type" "neon_reduc_add,neon_reduc_add_q"))
	278	"thunderx2t99_f01")
	279
	280	(define_insn_reservation "thunderx2t99_asimd_cmp" 7
	281	(and (eq_attr "tune" "thunderx2t99")
	282	(eq_attr "type" "neon_compare,neon_compare_q,neon_compare_zero,\
	283	neon_tst,neon_tst_q"))
	284	"thunderx2t99_f01")
	285
	286	(define_insn_reservation "thunderx2t99_asimd_logic" 5
	287	(and (eq_attr "tune" "thunderx2t99")
	288	(eq_attr "type" "neon_logic,neon_logic_q"))
	289	"thunderx2t99_f01")
	290
715a2a15	291	;; ASIMD floating-point instructions.
	292
	293	(define_insn_reservation "thunderx2t99_asimd_fp_simple" 5
	294	(and (eq_attr "tune" "thunderx2t99")
	295	(eq_attr "type" "neon_fp_abs_s,neon_fp_abs_d,\
	296	neon_fp_abs_s_q,neon_fp_abs_d_q,\
	297	neon_fp_compare_s,neon_fp_compare_d,\
	298	neon_fp_compare_s_q,neon_fp_compare_d_q,\
	299	neon_fp_minmax_s,neon_fp_minmax_d,\
	300	neon_fp_minmax_s_q,neon_fp_minmax_d_q,\
	301	neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,\
	302	neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,\
	303	neon_fp_neg_s,neon_fp_neg_d,\
	304	neon_fp_neg_s_q,neon_fp_neg_d_q"))
	305	"thunderx2t99_f01")
	306
	307	(define_insn_reservation "thunderx2t99_asimd_fp_arith" 6
	308	(and (eq_attr "tune" "thunderx2t99")
	309	(eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\
	310	neon_fp_abd_s_q,neon_fp_abd_d_q,\
	311	neon_fp_addsub_s,neon_fp_addsub_d,\
	312	neon_fp_addsub_s_q,neon_fp_addsub_d_q,\
	313	neon_fp_reduc_add_s,neon_fp_reduc_add_d,\
	314	neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q,\
	315	neon_fp_mul_s,neon_fp_mul_d,\
	316	neon_fp_mul_s_q,neon_fp_mul_d_q,\
08f08c40	317	neon_fp_mul_s_scalar_q,neon_fp_mul_d_scalar_q,\
715a2a15	318	neon_fp_mla_s,neon_fp_mla_d,\
	319	neon_fp_mla_s_q,neon_fp_mla_d_q"))
	320	"thunderx2t99_f01")
	321
	322	(define_insn_reservation "thunderx2t99_asimd_fp_conv" 7
	323	(and (eq_attr "tune" "thunderx2t99")
	324	(eq_attr "type" "neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q,\
	325	neon_fp_to_int_s,neon_fp_to_int_d,\
	326	neon_fp_to_int_s_q,neon_fp_to_int_d_q,\
08f08c40	327	neon_int_to_fp_s,neon_int_to_fp_d,\
08f08c40	328	neon_int_to_fp_s_q,neon_int_to_fp_d_q,\
715a2a15	329	neon_fp_round_s,neon_fp_round_d,\
	330	neon_fp_round_s_q,neon_fp_round_d_q"))
	331	"thunderx2t99_f01")
	332
	333	(define_insn_reservation "thunderx2t99_asimd_fp_div_s" 16
	334	(and (eq_attr "tune" "thunderx2t99")
	335	(eq_attr "type" "neon_fp_div_s,neon_fp_div_s_q"))
	336	"thunderx2t99_f01")
	337
	338	(define_insn_reservation "thunderx2t99_asimd_fp_div_d" 23
	339	(and (eq_attr "tune" "thunderx2t99")
	340	(eq_attr "type" "neon_fp_div_d,neon_fp_div_d_q"))
	341	"thunderx2t99_f01")
	342
	343	;; ASIMD miscellaneous instructions.
	344
	345	(define_insn_reservation "thunderx2t99_asimd_misc" 5
	346	(and (eq_attr "tune" "thunderx2t99")
	347	(eq_attr "type" "neon_rbit,\
	348	neon_bsl,neon_bsl_q,\
	349	neon_cls,neon_cls_q,\
	350	neon_cnt,neon_cnt_q,\
	351	neon_from_gp,neon_from_gp_q,\
	352	neon_dup,neon_dup_q,\
	353	neon_ext,neon_ext_q,\
	354	neon_ins,neon_ins_q,\
	355	neon_move,neon_move_q,\
	356	neon_fp_recpe_s,neon_fp_recpe_d,\
	357	neon_fp_recpe_s_q,neon_fp_recpe_d_q,\
	358	neon_fp_recpx_s,neon_fp_recpx_d,\
	359	neon_fp_recpx_s_q,neon_fp_recpx_d_q,\
	360	neon_rev,neon_rev_q,\
715a2a15	361	neon_permute,neon_permute_q"))
	362	"thunderx2t99_f01")
	363
	364	(define_insn_reservation "thunderx2t99_asimd_recip_step" 6
	365	(and (eq_attr "tune" "thunderx2t99")
	366	(eq_attr "type" "neon_fp_recps_s,neon_fp_recps_s_q,\
	367	neon_fp_recps_d,neon_fp_recps_d_q,\
08f08c40	368	neon_fp_sqrt_s,neon_fp_sqrt_s_q,\
	369	neon_fp_sqrt_d,neon_fp_sqrt_d_q,\
	370	neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\
	371	neon_fp_rsqrte_d, neon_fp_rsqrte_d_q,\
715a2a15	372	neon_fp_rsqrts_s, neon_fp_rsqrts_s_q,\
	373	neon_fp_rsqrts_d, neon_fp_rsqrts_d_q"))
	374	"thunderx2t99_f01")
	375
	376	(define_insn_reservation "thunderx2t99_asimd_lut" 8
	377	(and (eq_attr "tune" "thunderx2t99")
08f08c40	378	(eq_attr "type" "neon_tbl1,neon_tbl1_q,neon_tbl2,neon_tbl2_q,\
08f08c40	379	neon_tbl3,neon_tbl3_q,neon_tbl4,neon_tbl4_q"))
715a2a15	380	"thunderx2t99_f01")
	381
	382	(define_insn_reservation "thunderx2t99_asimd_elt_to_gr" 6
	383	(and (eq_attr "tune" "thunderx2t99")
	384	(eq_attr "type" "neon_to_gp,neon_to_gp_q"))
	385	"thunderx2t99_f01")
	386
715a2a15	387	;; ASIMD load instructions.
	388
	389	; NOTE: These reservations attempt to model latency and throughput correctly,
	390	; but the cycle timing of unit allocation is not necessarily accurate (because
	391	; insns are split into uops, and those may be issued out-of-order).
	392
08f08c40	393	(define_insn_reservation "thunderx2t99_asimd_load1_ldp" 5
715a2a15	394	(and (eq_attr "tune" "thunderx2t99")
08f08c40	395	(eq_attr "type" "neon_ldp,neon_ldp_q"))
08f08c40	396	"thunderx2t99_i012,thunderx2t99_ls01")
715a2a15	397
08f08c40	398	(define_insn_reservation "thunderx2t99_asimd_load1" 4
715a2a15	399	(and (eq_attr "tune" "thunderx2t99")
08f08c40	400	(eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q,\
	401	neon_load1_2reg,neon_load1_2reg_q,\
	402	neon_load1_3reg,neon_load1_3reg_q,\
	403	neon_load1_4reg,neon_load1_4reg_q"))
	404	"thunderx2t99_ls01")
715a2a15	405
	406	(define_insn_reservation "thunderx2t99_asimd_load1_onelane" 5
	407	(and (eq_attr "tune" "thunderx2t99")
	408	(eq_attr "type" "neon_load1_one_lane,neon_load1_one_lane_q"))
	409	"thunderx2t99_l01delay,thunderx2t99_f01")
	410
	411	(define_insn_reservation "thunderx2t99_asimd_load1_all" 5
	412	(and (eq_attr "tune" "thunderx2t99")
	413	(eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q"))
	414	"thunderx2t99_l01delay,thunderx2t99_f01")
	415
	416	(define_insn_reservation "thunderx2t99_asimd_load2" 5
	417	(and (eq_attr "tune" "thunderx2t99")
	418	(eq_attr "type" "neon_load2_2reg,neon_load2_2reg_q,\
	419	neon_load2_one_lane,neon_load2_one_lane_q,\
	420	neon_load2_all_lanes,neon_load2_all_lanes_q"))
08f08c40	421	"thunderx2t99_l01delay,thunderx2t99_f01")
	422
	423	(define_insn_reservation "thunderx2t99_asimd_load3" 7
	424	(and (eq_attr "tune" "thunderx2t99")
	425	(eq_attr "type" "neon_load3_3reg,neon_load3_3reg_q,\
	426	neon_load3_one_lane,neon_load3_one_lane_q,\
	427	neon_load3_all_lanes,neon_load3_all_lanes_q"))
	428	"thunderx2t99_l01delay,thunderx2t99_f01")
	429
	430	(define_insn_reservation "thunderx2t99_asimd_load4" 8
	431	(and (eq_attr "tune" "thunderx2t99")
	432	(eq_attr "type" "neon_load4_4reg,neon_load4_4reg_q,\
	433	neon_load4_one_lane,neon_load4_one_lane_q,\
	434	neon_load4_all_lanes,neon_load4_all_lanes_q"))
	435	"thunderx2t99_l01delay,thunderx2t99_f01")
715a2a15	436
	437	;; ASIMD store instructions.
	438
	439	; Same note applies as for ASIMD load instructions.
	440
08f08c40	441	(define_insn_reservation "thunderx2t99_asimd_store_stp" 1
715a2a15	442	(and (eq_attr "tune" "thunderx2t99")
08f08c40	443	(eq_attr "type" "neon_stp,neon_stp_q"))
08f08c40	444	"thunderx2t99_ls01,thunderx2t99_sd")
715a2a15	445
08f08c40	446	(define_insn_reservation "thunderx2t99_asimd_store1" 1
715a2a15	447	(and (eq_attr "tune" "thunderx2t99")
08f08c40	448	(eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,\
	449	neon_store1_2reg,neon_store1_2reg_q,\
	450	neon_store1_3reg,neon_store1_4reg"))
	451	"thunderx2t99_ls01")
715a2a15	452
	453	(define_insn_reservation "thunderx2t99_asimd_store1_onelane" 1
	454	(and (eq_attr "tune" "thunderx2t99")
	455	(eq_attr "type" "neon_store1_one_lane,neon_store1_one_lane_q"))
	456	"thunderx2t99_ls01,thunderx2t99_f01")
	457
08f08c40	458	(define_insn_reservation "thunderx2t99_asimd_store2" 1
715a2a15	459	(and (eq_attr "tune" "thunderx2t99")
08f08c40	460	(eq_attr "type" "neon_store2_2reg,neon_store2_2reg_q,\
	461	neon_store2_one_lane,neon_store2_one_lane_q"))
	462	"thunderx2t99_ls01,thunderx2t99_f01")
	463
	464	(define_insn_reservation "thunderx2t99_asimd_store3" 1
	465	(and (eq_attr "tune" "thunderx2t99")
	466	(eq_attr "type" "neon_store3_3reg,neon_store3_3reg_q,\
	467	neon_store3_one_lane,neon_store3_one_lane_q"))
	468	"thunderx2t99_ls01,thunderx2t99_f01")
715a2a15	469
08f08c40	470	(define_insn_reservation "thunderx2t99_asimd_store4" 1
715a2a15	471	(and (eq_attr "tune" "thunderx2t99")
08f08c40	472	(eq_attr "type" "neon_store4_4reg,neon_store4_4reg_q,\
08f08c40	473	neon_store4_one_lane,neon_store4_one_lane_q"))
715a2a15	474	"thunderx2t99_ls01,thunderx2t99_f01")
228224f8	475
	476	;; Crypto extensions.
	477
	478	(define_insn_reservation "thunderx2t99_aes" 5
	479	(and (eq_attr "tune" "thunderx2t99")
	480	(eq_attr "type" "crypto_aese,crypto_aesmc"))
	481	"thunderx2t99_f1")
	482
	483	(define_insn_reservation "thunderx2t99_sha" 7
	484	(and (eq_attr "tune" "thunderx2t99")
	485	(eq_attr "type" "crypto_sha1_fast,crypto_sha1_xor,crypto_sha1_slow,\
	486	crypto_sha256_fast,crypto_sha256_slow"))
	487	"thunderx2t99_f1")
68abe534	488
	489	;; CRC extension.
	490
	491	(define_insn_reservation "thunderx2t99_crc" 4
	492	(and (eq_attr "tune" "thunderx2t99")
	493	(eq_attr "type" "crc"))
	494	"thunderx2t99_i1")
286d6528	495
	496	;; PMULL extension.
	497
	498	(define_insn_reservation "thunderx2t99_pmull" 5
	499	(and (eq_attr "tune" "thunderx2t99")
	500	(eq_attr "type" "crypto_pmull"))
	501	"thunderx2t99_f1")