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1a94ca49 | 1 | /* Definitions of target machine for GNU compiler, for DEC Alpha. |
9ddd9abd | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
5c30094f | 3 | 2000, 2001, 2002, 2004, 2005, 2007, 2008, 2009, 2010, 2011, 2012 |
3be639f7 | 4 | Free Software Foundation, Inc. |
1e6c6f11 | 5 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
1a94ca49 | 6 | |
7ec022b2 | 7 | This file is part of GCC. |
1a94ca49 | 8 | |
7ec022b2 | 9 | GCC is free software; you can redistribute it and/or modify |
1a94ca49 | 10 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
1a94ca49 RK |
12 | any later version. |
13 | ||
7ec022b2 | 14 | GCC is distributed in the hope that it will be useful, |
1a94ca49 RK |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
20 | along with GCC; see the file COPYING3. If not see |
21 | <http://www.gnu.org/licenses/>. */ | |
1a94ca49 | 22 | |
12a41c22 NB |
23 | /* Target CPU builtins. */ |
24 | #define TARGET_CPU_CPP_BUILTINS() \ | |
25 | do \ | |
26 | { \ | |
27 | builtin_define ("__alpha"); \ | |
28 | builtin_define ("__alpha__"); \ | |
29 | builtin_assert ("cpu=alpha"); \ | |
30 | builtin_assert ("machine=alpha"); \ | |
31 | if (TARGET_CIX) \ | |
32 | { \ | |
33 | builtin_define ("__alpha_cix__"); \ | |
34 | builtin_assert ("cpu=cix"); \ | |
35 | } \ | |
36 | if (TARGET_FIX) \ | |
37 | { \ | |
38 | builtin_define ("__alpha_fix__"); \ | |
39 | builtin_assert ("cpu=fix"); \ | |
40 | } \ | |
41 | if (TARGET_BWX) \ | |
42 | { \ | |
43 | builtin_define ("__alpha_bwx__"); \ | |
44 | builtin_assert ("cpu=bwx"); \ | |
45 | } \ | |
46 | if (TARGET_MAX) \ | |
47 | { \ | |
48 | builtin_define ("__alpha_max__"); \ | |
49 | builtin_assert ("cpu=max"); \ | |
50 | } \ | |
8bea7f7c | 51 | if (alpha_cpu == PROCESSOR_EV6) \ |
12a41c22 NB |
52 | { \ |
53 | builtin_define ("__alpha_ev6__"); \ | |
54 | builtin_assert ("cpu=ev6"); \ | |
55 | } \ | |
8bea7f7c | 56 | else if (alpha_cpu == PROCESSOR_EV5) \ |
12a41c22 NB |
57 | { \ |
58 | builtin_define ("__alpha_ev5__"); \ | |
59 | builtin_assert ("cpu=ev5"); \ | |
60 | } \ | |
61 | else /* Presumably ev4. */ \ | |
62 | { \ | |
63 | builtin_define ("__alpha_ev4__"); \ | |
64 | builtin_assert ("cpu=ev4"); \ | |
65 | } \ | |
ac9cfada | 66 | if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \ |
f9ee10ab | 67 | builtin_define ("_IEEE_FP"); \ |
ac9cfada | 68 | if (TARGET_IEEE_WITH_INEXACT) \ |
f9ee10ab | 69 | builtin_define ("_IEEE_FP_INEXACT"); \ |
0f15adbd RH |
70 | if (TARGET_LONG_DOUBLE_128) \ |
71 | builtin_define ("__LONG_DOUBLE_128__"); \ | |
e0322d5c NB |
72 | \ |
73 | /* Macros dependent on the C dialect. */ \ | |
55f49e3d | 74 | SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ |
ac9cfada | 75 | } while (0) |
1a94ca49 | 76 | |
55f49e3d JT |
77 | #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS |
78 | #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \ | |
79 | do \ | |
80 | { \ | |
81 | if (preprocessing_asm_p ()) \ | |
82 | builtin_define_std ("LANGUAGE_ASSEMBLY"); \ | |
04df6730 | 83 | else if (c_dialect_cxx ()) \ |
55f49e3d JT |
84 | { \ |
85 | builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \ | |
86 | builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \ | |
87 | } \ | |
04df6730 NB |
88 | else \ |
89 | builtin_define_std ("LANGUAGE_C"); \ | |
90 | if (c_dialect_objc ()) \ | |
55f49e3d JT |
91 | { \ |
92 | builtin_define ("__LANGUAGE_OBJECTIVE_C"); \ | |
93 | builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \ | |
94 | } \ | |
95 | } \ | |
96 | while (0) | |
97 | #endif | |
98 | ||
1a94ca49 RK |
99 | /* Run-time compilation parameters selecting different hardware subsets. */ |
100 | ||
f6f6a13c RK |
101 | /* Which processor to schedule for. The cpu attribute defines a list that |
102 | mirrors this list, so changes to alpha.md must be made at the same time. */ | |
103 | ||
104 | enum processor_type | |
3c50106f RH |
105 | { |
106 | PROCESSOR_EV4, /* 2106[46]{a,} */ | |
e9a25f70 | 107 | PROCESSOR_EV5, /* 21164{a,pc,} */ |
3c50106f RH |
108 | PROCESSOR_EV6, /* 21264 */ |
109 | PROCESSOR_MAX | |
110 | }; | |
f6f6a13c RK |
111 | |
112 | extern enum processor_type alpha_cpu; | |
8bea7f7c | 113 | extern enum processor_type alpha_tune; |
f6f6a13c | 114 | |
2bf6230d RK |
115 | enum alpha_trap_precision |
116 | { | |
117 | ALPHA_TP_PROG, /* No precision (default). */ | |
118 | ALPHA_TP_FUNC, /* Trap contained within originating function. */ | |
285a5742 | 119 | ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */ |
2bf6230d RK |
120 | }; |
121 | ||
122 | enum alpha_fp_rounding_mode | |
123 | { | |
124 | ALPHA_FPRM_NORM, /* Normal rounding mode. */ | |
125 | ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ | |
285a5742 | 126 | ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ |
2bf6230d RK |
127 | ALPHA_FPRM_DYN /* Dynamic rounding mode. */ |
128 | }; | |
129 | ||
130 | enum alpha_fp_trap_mode | |
131 | { | |
285a5742 | 132 | ALPHA_FPTM_N, /* Normal trap mode. */ |
2bf6230d RK |
133 | ALPHA_FPTM_U, /* Underflow traps enabled. */ |
134 | ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ | |
135 | ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */ | |
136 | }; | |
137 | ||
2bf6230d RK |
138 | extern enum alpha_trap_precision alpha_tp; |
139 | extern enum alpha_fp_rounding_mode alpha_fprm; | |
140 | extern enum alpha_fp_trap_mode alpha_fptm; | |
141 | ||
8bea7f7c RH |
142 | /* Invert the easy way to make options work. */ |
143 | #define TARGET_FP (!TARGET_SOFT_FP) | |
8f87939b | 144 | |
9ba3994a | 145 | /* These are for target os support and cannot be changed at runtime. */ |
800d1de1 RH |
146 | #define TARGET_ABI_OPEN_VMS 0 |
147 | #define TARGET_ABI_OSF (!TARGET_ABI_OPEN_VMS) | |
9ba3994a RH |
148 | |
149 | #ifndef TARGET_AS_CAN_SUBTRACT_LABELS | |
150 | #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS | |
151 | #endif | |
30102605 RH |
152 | #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX |
153 | #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS | |
154 | #endif | |
9c0e94a5 RH |
155 | #ifndef TARGET_CAN_FAULT_IN_PROLOGUE |
156 | #define TARGET_CAN_FAULT_IN_PROLOGUE 0 | |
157 | #endif | |
5495cc55 | 158 | #ifndef TARGET_HAS_XFLOATING_LIBS |
0f15adbd | 159 | #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 |
5495cc55 | 160 | #endif |
4f1c5cce RH |
161 | #ifndef TARGET_PROFILING_NEEDS_GP |
162 | #define TARGET_PROFILING_NEEDS_GP 0 | |
163 | #endif | |
14291bc7 RH |
164 | #ifndef TARGET_FIXUP_EV5_PREFETCH |
165 | #define TARGET_FIXUP_EV5_PREFETCH 0 | |
166 | #endif | |
6f9b006d RH |
167 | #ifndef HAVE_AS_TLS |
168 | #define HAVE_AS_TLS 0 | |
169 | #endif | |
9ba3994a | 170 | |
8bea7f7c | 171 | #define TARGET_DEFAULT MASK_FPREGS |
1a94ca49 | 172 | |
88681624 ILT |
173 | #ifndef TARGET_CPU_DEFAULT |
174 | #define TARGET_CPU_DEFAULT 0 | |
175 | #endif | |
176 | ||
3a37b08e RH |
177 | #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS |
178 | #ifdef HAVE_AS_EXPLICIT_RELOCS | |
179 | #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS | |
8bea7f7c | 180 | #define TARGET_SUPPORT_ARCH 1 |
3a37b08e RH |
181 | #else |
182 | #define TARGET_DEFAULT_EXPLICIT_RELOCS 0 | |
183 | #endif | |
184 | #endif | |
185 | ||
8bea7f7c RH |
186 | #ifndef TARGET_SUPPORT_ARCH |
187 | #define TARGET_SUPPORT_ARCH 0 | |
188 | #endif | |
2bf6230d | 189 | |
7816bea0 DJ |
190 | /* Support for a compile-time default CPU, et cetera. The rules are: |
191 | --with-cpu is ignored if -mcpu is specified. | |
192 | --with-tune is ignored if -mtune is specified. */ | |
193 | #define OPTION_DEFAULT_SPECS \ | |
194 | {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ | |
195 | {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } | |
196 | ||
1a94ca49 RK |
197 | \f |
198 | /* target machine storage layout */ | |
199 | ||
200 | /* Define the size of `int'. The default is the same as the word size. */ | |
201 | #define INT_TYPE_SIZE 32 | |
202 | ||
203 | /* Define the size of `long long'. The default is the twice the word size. */ | |
204 | #define LONG_LONG_TYPE_SIZE 64 | |
205 | ||
206 | /* The two floating-point formats we support are S-floating, which is | |
207 | 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' | |
208 | and `long double' are T. */ | |
209 | ||
210 | #define FLOAT_TYPE_SIZE 32 | |
211 | #define DOUBLE_TYPE_SIZE 64 | |
0f15adbd RH |
212 | #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) |
213 | ||
214 | /* Define this to set long double type size to use in libgcc2.c, which can | |
215 | not depend on target_flags. */ | |
216 | #ifdef __LONG_DOUBLE_128__ | |
217 | #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 | |
218 | #else | |
219 | #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 | |
220 | #endif | |
221 | ||
222 | /* Work around target_flags dependency in ada/targtyps.c. */ | |
223 | #define WIDEST_HARDWARE_FP_SIZE 64 | |
1a94ca49 | 224 | |
5258d7ae RK |
225 | #define WCHAR_TYPE "unsigned int" |
226 | #define WCHAR_TYPE_SIZE 32 | |
1a94ca49 | 227 | |
13d39dbc | 228 | /* Define this macro if it is advisable to hold scalars in registers |
f676971a | 229 | in a wider mode than that declared by the program. In such cases, |
1a94ca49 RK |
230 | the value is constrained to be within the bounds of the declared |
231 | type, but kept valid in the wider mode. The signedness of the | |
232 | extension may differ from that of the type. | |
233 | ||
06d69cd3 RH |
234 | For Alpha, we always store objects in a full register. 32-bit integers |
235 | are always sign-extended, but smaller objects retain their signedness. | |
236 | ||
237 | Note that small vector types can get mapped onto integer modes at the | |
238 | whim of not appearing in alpha-modes.def. We never promoted these | |
c112cf2b | 239 | values before; don't do so now that we've trimmed the set of modes to |
06d69cd3 RH |
240 | those actually implemented in the backend. */ |
241 | ||
242 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
243 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
244 | && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \ | |
245 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
246 | { \ | |
247 | if ((MODE) == SImode) \ | |
248 | (UNSIGNEDP) = 0; \ | |
249 | (MODE) = DImode; \ | |
1a94ca49 RK |
250 | } |
251 | ||
1a94ca49 RK |
252 | /* Define this if most significant bit is lowest numbered |
253 | in instructions that operate on numbered bit-fields. | |
254 | ||
255 | There are no such instructions on the Alpha, but the documentation | |
256 | is little endian. */ | |
257 | #define BITS_BIG_ENDIAN 0 | |
258 | ||
259 | /* Define this if most significant byte of a word is the lowest numbered. | |
260 | This is false on the Alpha. */ | |
261 | #define BYTES_BIG_ENDIAN 0 | |
262 | ||
263 | /* Define this if most significant word of a multiword number is lowest | |
264 | numbered. | |
265 | ||
266 | For Alpha we can decide arbitrarily since there are no machine instructions | |
285a5742 | 267 | for them. Might as well be consistent with bytes. */ |
1a94ca49 RK |
268 | #define WORDS_BIG_ENDIAN 0 |
269 | ||
1a94ca49 RK |
270 | /* Width of a word, in units (bytes). */ |
271 | #define UNITS_PER_WORD 8 | |
272 | ||
273 | /* Width in bits of a pointer. | |
274 | See also the macro `Pmode' defined below. */ | |
275 | #define POINTER_SIZE 64 | |
276 | ||
277 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
278 | #define PARM_BOUNDARY 64 | |
279 | ||
280 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
e5e10fb4 | 281 | #define STACK_BOUNDARY 128 |
1a94ca49 RK |
282 | |
283 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
c176c051 | 284 | #define FUNCTION_BOUNDARY 32 |
1a94ca49 RK |
285 | |
286 | /* Alignment of field after `int : 0' in a structure. */ | |
287 | #define EMPTY_FIELD_BOUNDARY 64 | |
288 | ||
289 | /* Every structure's size must be a multiple of this. */ | |
290 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
291 | ||
43a88a8c | 292 | /* A bit-field declared as `int' forces `int' alignment for the struct. */ |
1a94ca49 RK |
293 | #define PCC_BITFIELD_TYPE_MATTERS 1 |
294 | ||
1a94ca49 | 295 | /* No data type wants to be aligned rounder than this. */ |
5495cc55 | 296 | #define BIGGEST_ALIGNMENT 128 |
1a94ca49 | 297 | |
d16fe557 RK |
298 | /* For atomic access to objects, must have at least 32-bit alignment |
299 | unless the machine has byte operations. */ | |
13eb1f7f | 300 | #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32)) |
d16fe557 | 301 | |
442b1685 RK |
302 | /* Align all constants and variables to at least a word boundary so |
303 | we can pick up pieces of them faster. */ | |
6c174fc0 RH |
304 | /* ??? Only if block-move stuff knows about different source/destination |
305 | alignment. */ | |
306 | #if 0 | |
442b1685 RK |
307 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) |
308 | #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) | |
6c174fc0 | 309 | #endif |
1a94ca49 | 310 | |
825dda42 | 311 | /* Set this nonzero if move instructions will actually fail to work |
1a94ca49 RK |
312 | when given unaligned data. |
313 | ||
314 | Since we get an error message when we do one, call them invalid. */ | |
315 | ||
316 | #define STRICT_ALIGNMENT 1 | |
317 | ||
825dda42 | 318 | /* Set this nonzero if unaligned move instructions are extremely slow. |
1a94ca49 RK |
319 | |
320 | On the Alpha, they trap. */ | |
130d2d72 | 321 | |
e1565e65 | 322 | #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 |
e2ea71ea | 323 | |
1a94ca49 RK |
324 | /* Standard register usage. */ |
325 | ||
326 | /* Number of actual hardware registers. | |
327 | The hardware registers are assigned numbers for the compiler | |
328 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
329 | All registers that the compiler knows about must be given numbers, | |
330 | even those that are not normally considered general registers. | |
331 | ||
332 | We define all 32 integer registers, even though $31 is always zero, | |
333 | and all 32 floating-point registers, even though $f31 is also | |
334 | always zero. We do not bother defining the FP status register and | |
f676971a | 335 | there are no other registers. |
130d2d72 RK |
336 | |
337 | Since $31 is always zero, we will use register number 31 as the | |
338 | argument pointer. It will never appear in the generated code | |
339 | because we will always be eliminating it in favor of the stack | |
52a69200 RK |
340 | pointer or hardware frame pointer. |
341 | ||
342 | Likewise, we use $f31 for the frame pointer, which will always | |
343 | be eliminated in favor of the hardware frame pointer or the | |
344 | stack pointer. */ | |
1a94ca49 RK |
345 | |
346 | #define FIRST_PSEUDO_REGISTER 64 | |
347 | ||
348 | /* 1 for registers that have pervasive standard uses | |
349 | and are not available for the register allocator. */ | |
350 | ||
351 | #define FIXED_REGISTERS \ | |
352 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
353 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ | |
354 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
355 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
356 | ||
357 | /* 1 for registers not available across function calls. | |
358 | These must include the FIXED_REGISTERS and also any | |
359 | registers that can be used without being saved. | |
360 | The latter must include the registers where values are returned | |
361 | and the register where structure-value addresses are passed. | |
362 | Aside from that, you can include as many other registers as you like. */ | |
363 | #define CALL_USED_REGISTERS \ | |
364 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ | |
365 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ | |
366 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ | |
367 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
368 | ||
369 | /* List the order in which to allocate registers. Each register must be | |
ad5d827d RH |
370 | listed once, even those in FIXED_REGISTERS. */ |
371 | ||
372 | #define REG_ALLOC_ORDER { \ | |
373 | 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ | |
374 | 22, 23, 24, 25, 28, /* likewise */ \ | |
375 | 0, /* likewise, but return value */ \ | |
376 | 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ | |
377 | 27, /* likewise, but OSF procedure value */ \ | |
378 | \ | |
379 | 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ | |
380 | 54, 55, 56, 57, 58, 59, /* likewise */ \ | |
381 | 60, 61, 62, /* likewise */ \ | |
382 | 32, 33, /* likewise, but return values */ \ | |
383 | 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ | |
384 | \ | |
385 | 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ | |
386 | 26, /* return address */ \ | |
387 | 15, /* hard frame pointer */ \ | |
388 | \ | |
389 | 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ | |
390 | 40, 41, /* likewise */ \ | |
391 | \ | |
392 | 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ | |
393 | } | |
1a94ca49 RK |
394 | |
395 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
396 | to hold something of mode MODE. | |
397 | This is ordinarily the length in words of a value of mode MODE | |
398 | but can be less for certain modes in special long registers. */ | |
399 | ||
400 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
401 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
402 | ||
403 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
404 | On Alpha, the integer registers can hold any mode. The floating-point | |
5c9948f4 | 405 | registers can hold 64-bit integers as well, but not smaller values. */ |
1a94ca49 | 406 | |
e6a8ebb4 | 407 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
7d83f4f5 | 408 | (IN_RANGE ((REGNO), 32, 62) \ |
5c9948f4 | 409 | ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \ |
d416c0b3 | 410 | || (MODE) == SCmode || (MODE) == DCmode \ |
e6a8ebb4 RH |
411 | : 1) |
412 | ||
413 | /* A C expression that is nonzero if a value of mode | |
414 | MODE1 is accessible in mode MODE2 without copying. | |
1a94ca49 | 415 | |
e6a8ebb4 RH |
416 | This asymmetric test is true when MODE1 could be put |
417 | in an FP register but MODE2 could not. */ | |
1a94ca49 | 418 | |
a7adf08e | 419 | #define MODES_TIEABLE_P(MODE1, MODE2) \ |
e6a8ebb4 RH |
420 | (HARD_REGNO_MODE_OK (32, (MODE1)) \ |
421 | ? HARD_REGNO_MODE_OK (32, (MODE2)) \ | |
a7adf08e | 422 | : 1) |
1a94ca49 RK |
423 | |
424 | /* Specify the registers used for certain standard purposes. | |
425 | The values of these macros are register numbers. */ | |
426 | ||
427 | /* Alpha pc isn't overloaded on a register that the compiler knows about. */ | |
428 | /* #define PC_REGNUM */ | |
429 | ||
430 | /* Register to use for pushing function arguments. */ | |
431 | #define STACK_POINTER_REGNUM 30 | |
432 | ||
433 | /* Base register for access to local variables of the function. */ | |
52a69200 | 434 | #define HARD_FRAME_POINTER_REGNUM 15 |
1a94ca49 | 435 | |
1a94ca49 | 436 | /* Base register for access to arguments of the function. */ |
130d2d72 | 437 | #define ARG_POINTER_REGNUM 31 |
1a94ca49 | 438 | |
52a69200 RK |
439 | /* Base register for access to local variables of function. */ |
440 | #define FRAME_POINTER_REGNUM 63 | |
441 | ||
f676971a | 442 | /* Register in which static-chain is passed to a function. |
1a94ca49 RK |
443 | |
444 | For the Alpha, this is based on an example; the calling sequence | |
445 | doesn't seem to specify this. */ | |
446 | #define STATIC_CHAIN_REGNUM 1 | |
447 | ||
133d3133 RH |
448 | /* The register number of the register used to address a table of |
449 | static data addresses in memory. */ | |
450 | #define PIC_OFFSET_TABLE_REGNUM 29 | |
451 | ||
452 | /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' | |
453 | is clobbered by calls. */ | |
454 | /* ??? It is and it isn't. It's required to be valid for a given | |
455 | function when the function returns. It isn't clobbered by | |
456 | current_file functions. Moreover, we do not expose the ldgp | |
457 | until after reload, so we're probably safe. */ | |
458 | /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ | |
1a94ca49 RK |
459 | \f |
460 | /* Define the classes of registers for register constraints in the | |
461 | machine description. Also define ranges of constants. | |
462 | ||
463 | One of the classes must always be named ALL_REGS and include all hard regs. | |
464 | If there is more than one class, another class must be named NO_REGS | |
465 | and contain no registers. | |
466 | ||
467 | The name GENERAL_REGS must be the name of a class (or an alias for | |
468 | another name such as ALL_REGS). This is the class of registers | |
469 | that is allowed by "g" or "r" in a register constraint. | |
470 | Also, registers outside this class are allocated only when | |
471 | instructions express preferences for them. | |
472 | ||
473 | The classes must be numbered in nondecreasing order; that is, | |
474 | a larger-numbered class must never be contained completely | |
475 | in a smaller-numbered class. | |
476 | ||
477 | For any two classes, it is very desirable that there be another | |
478 | class that represents their union. */ | |
f676971a | 479 | |
b73c0bc8 | 480 | enum reg_class { |
6f9b006d | 481 | NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG, |
b73c0bc8 RH |
482 | GENERAL_REGS, FLOAT_REGS, ALL_REGS, |
483 | LIM_REG_CLASSES | |
484 | }; | |
1a94ca49 RK |
485 | |
486 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
487 | ||
285a5742 | 488 | /* Give names of register classes as strings for dump file. */ |
1a94ca49 | 489 | |
6f9b006d RH |
490 | #define REG_CLASS_NAMES \ |
491 | {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \ | |
b73c0bc8 | 492 | "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } |
1a94ca49 RK |
493 | |
494 | /* Define which registers fit in which classes. | |
495 | This is an initializer for a vector of HARD_REG_SET | |
496 | of length N_REG_CLASSES. */ | |
497 | ||
b73c0bc8 RH |
498 | #define REG_CLASS_CONTENTS \ |
499 | { {0x00000000, 0x00000000}, /* NO_REGS */ \ | |
6f9b006d | 500 | {0x00000001, 0x00000000}, /* R0_REG */ \ |
b73c0bc8 RH |
501 | {0x01000000, 0x00000000}, /* R24_REG */ \ |
502 | {0x02000000, 0x00000000}, /* R25_REG */ \ | |
503 | {0x08000000, 0x00000000}, /* R27_REG */ \ | |
504 | {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \ | |
505 | {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \ | |
506 | {0xffffffff, 0xffffffff} } | |
1a94ca49 RK |
507 | |
508 | /* The same information, inverted: | |
509 | Return the class number of the smallest class containing | |
510 | reg number REGNO. This could be a conditional expression | |
511 | or could index an array. */ | |
512 | ||
93c89ab3 | 513 | #define REGNO_REG_CLASS(REGNO) \ |
6f9b006d RH |
514 | ((REGNO) == 0 ? R0_REG \ |
515 | : (REGNO) == 24 ? R24_REG \ | |
b73c0bc8 RH |
516 | : (REGNO) == 25 ? R25_REG \ |
517 | : (REGNO) == 27 ? R27_REG \ | |
7d83f4f5 | 518 | : IN_RANGE ((REGNO), 32, 62) ? FLOAT_REGS \ |
93c89ab3 | 519 | : GENERAL_REGS) |
1a94ca49 RK |
520 | |
521 | /* The class value for index registers, and the one for base regs. */ | |
522 | #define INDEX_REG_CLASS NO_REGS | |
523 | #define BASE_REG_CLASS GENERAL_REGS | |
524 | ||
1a94ca49 RK |
525 | /* Given an rtx X being reloaded into a reg required to be |
526 | in class CLASS, return the class of reg to actually use. | |
527 | In general this is just CLASS; but on some machines | |
551cc6fd | 528 | in some cases it is preferable to use a more restrictive class. */ |
1a94ca49 | 529 | |
551cc6fd | 530 | #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class |
1a94ca49 | 531 | |
1a94ca49 | 532 | /* If we are copying between general and FP registers, we need a memory |
de4abb91 | 533 | location unless the FIX extension is available. */ |
1a94ca49 | 534 | |
e9a25f70 | 535 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ |
bfd82dbf RK |
536 | (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \ |
537 | || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS))) | |
1a94ca49 | 538 | |
acd94aaf RK |
539 | /* Specify the mode to be used for memory when a secondary memory |
540 | location is needed. If MODE is floating-point, use it. Otherwise, | |
541 | widen to a word like the default. This is needed because we always | |
542 | store integers in FP registers in quadword format. This whole | |
543 | area is very tricky! */ | |
544 | #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ | |
545 | (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ | |
e868b518 | 546 | : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \ |
acd94aaf RK |
547 | : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) |
548 | ||
cff9f8d5 | 549 | /* Return the class of registers that cannot change mode from FROM to TO. */ |
c31dfe4d | 550 | |
b0c42aed JH |
551 | #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ |
552 | (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ | |
553 | ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0) | |
c31dfe4d | 554 | |
1a94ca49 | 555 | /* Define the cost of moving between registers of various classes. Moving |
f676971a | 556 | between FLOAT_REGS and anything else except float regs is expensive. |
1a94ca49 RK |
557 | In fact, we make it quite expensive because we really don't want to |
558 | do these moves unless it is clearly worth it. Optimizations may | |
559 | reduce the impact of not being able to allocate a pseudo to a | |
560 | hard register. */ | |
561 | ||
72910a0b RH |
562 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ |
563 | (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \ | |
564 | : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8) \ | |
565 | : 4+2*alpha_memory_latency) | |
1a94ca49 RK |
566 | |
567 | /* A C expressions returning the cost of moving data of MODE from a register to | |
568 | or from memory. | |
569 | ||
570 | On the Alpha, bump this up a bit. */ | |
571 | ||
bcbbac26 | 572 | extern int alpha_memory_latency; |
cbd5b9a2 | 573 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency) |
1a94ca49 RK |
574 | |
575 | /* Provide the cost of a branch. Exact meaning under development. */ | |
3a4fd356 | 576 | #define BRANCH_COST(speed_p, predictable_p) 5 |
1a94ca49 RK |
577 | \f |
578 | /* Stack layout; function entry, exit and calling. */ | |
579 | ||
580 | /* Define this if pushing a word on the stack | |
581 | makes the stack pointer a smaller address. */ | |
582 | #define STACK_GROWS_DOWNWARD | |
583 | ||
a4d05547 | 584 | /* Define this to nonzero if the nominal address of the stack frame |
1a94ca49 RK |
585 | is at the high-address end of the local variables; |
586 | that is, each additional local variable allocated | |
587 | goes at a more negative offset in the frame. */ | |
f62c8a5c | 588 | /* #define FRAME_GROWS_DOWNWARD 0 */ |
1a94ca49 RK |
589 | |
590 | /* Offset within stack frame to start allocating local variables at. | |
591 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
592 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
593 | of the first local allocated. */ | |
594 | ||
52a69200 | 595 | #define STARTING_FRAME_OFFSET 0 |
1a94ca49 RK |
596 | |
597 | /* If we generate an insn to push BYTES bytes, | |
598 | this says how many the stack pointer really advances by. | |
599 | On Alpha, don't define this because there are no push insns. */ | |
600 | /* #define PUSH_ROUNDING(BYTES) */ | |
601 | ||
e008606e RK |
602 | /* Define this to be nonzero if stack checking is built into the ABI. */ |
603 | #define STACK_CHECK_BUILTIN 1 | |
604 | ||
1a94ca49 RK |
605 | /* Define this if the maximum size of all the outgoing args is to be |
606 | accumulated and pushed during the prologue. The amount can be | |
38173d38 | 607 | found in the variable crtl->outgoing_args_size. */ |
f73ad30e | 608 | #define ACCUMULATE_OUTGOING_ARGS 1 |
1a94ca49 RK |
609 | |
610 | /* Offset of first parameter from the argument pointer register value. */ | |
611 | ||
130d2d72 | 612 | #define FIRST_PARM_OFFSET(FNDECL) 0 |
1a94ca49 RK |
613 | |
614 | /* Definitions for register eliminations. | |
615 | ||
978e8952 | 616 | We have two registers that can be eliminated on the Alpha. First, the |
1a94ca49 | 617 | frame pointer register can often be eliminated in favor of the stack |
130d2d72 | 618 | pointer register. Secondly, the argument pointer register can always be |
285a5742 | 619 | eliminated; it is replaced with either the stack or frame pointer. */ |
1a94ca49 RK |
620 | |
621 | /* This is an array of structures. Each structure initializes one pair | |
622 | of eliminable registers. The "from" register number is given first, | |
623 | followed by "to". Eliminations of the same "from" register are listed | |
624 | in order of preference. */ | |
625 | ||
52a69200 RK |
626 | #define ELIMINABLE_REGS \ |
627 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
628 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
629 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
630 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
1a94ca49 | 631 | |
52a69200 RK |
632 | /* Round up to a multiple of 16 bytes. */ |
633 | #define ALPHA_ROUND(X) (((X) + 15) & ~ 15) | |
634 | ||
1a94ca49 RK |
635 | /* Define the offset between two registers, one to be eliminated, and the other |
636 | its replacement, at the start of a routine. */ | |
35d9c403 RH |
637 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
638 | ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) | |
1a94ca49 RK |
639 | |
640 | /* Define this if stack space is still allocated for a parameter passed | |
641 | in a register. */ | |
642 | /* #define REG_PARM_STACK_SPACE */ | |
643 | ||
1a94ca49 RK |
644 | /* Define how to find the value returned by a function. |
645 | VALTYPE is the data type of the value (as a tree). | |
646 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
647 | otherwise, FUNC is 0. | |
648 | ||
649 | On Alpha the value is found in $0 for integer functions and | |
650 | $f0 for floating-point functions. */ | |
651 | ||
7e4fb06a RH |
652 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
653 | function_value (VALTYPE, FUNC, VOIDmode) | |
1a94ca49 RK |
654 | |
655 | /* Define how to find the value returned by a library function | |
656 | assuming the value has mode MODE. */ | |
657 | ||
7e4fb06a RH |
658 | #define LIBCALL_VALUE(MODE) \ |
659 | function_value (NULL, NULL, MODE) | |
1a94ca49 RK |
660 | |
661 | /* 1 if N is a possible register number for a function value | |
662 | as seen by the caller. */ | |
663 | ||
e5958492 RK |
664 | #define FUNCTION_VALUE_REGNO_P(N) \ |
665 | ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33) | |
1a94ca49 RK |
666 | |
667 | /* 1 if N is a possible register number for function argument passing. | |
668 | On Alpha, these are $16-$21 and $f16-$f21. */ | |
669 | ||
670 | #define FUNCTION_ARG_REGNO_P(N) \ | |
7d83f4f5 | 671 | (IN_RANGE ((N), 16, 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) |
1a94ca49 RK |
672 | \f |
673 | /* Define a data type for recording info about an argument list | |
674 | during the scan of that argument list. This data type should | |
675 | hold all necessary information about the function itself | |
676 | and about the args processed so far, enough to enable macros | |
677 | such as FUNCTION_ARG to determine where the next arg should go. | |
678 | ||
679 | On Alpha, this is a single integer, which is a number of words | |
680 | of arguments scanned so far. | |
681 | Thus 6 or more means all following args should go on the stack. */ | |
682 | ||
683 | #define CUMULATIVE_ARGS int | |
684 | ||
685 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
686 | for a call to a function whose data type is FNTYPE. | |
687 | For a library call, FNTYPE is 0. */ | |
688 | ||
0f6937fe AM |
689 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
690 | (CUM) = 0 | |
1a94ca49 RK |
691 | |
692 | /* Define intermediate macro to compute the size (in registers) of an argument | |
693 | for the Alpha. */ | |
694 | ||
695 | #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ | |
5495cc55 RH |
696 | ((MODE) == TFmode || (MODE) == TCmode ? 1 \ |
697 | : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \ | |
698 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
1a94ca49 | 699 | |
e5958492 | 700 | /* Make (or fake) .linkage entry for function call. |
e5958492 | 701 | IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ |
e5958492 | 702 | |
bcbbac26 RH |
703 | /* This macro defines the start of an assembly comment. */ |
704 | ||
705 | #define ASM_COMMENT_START " #" | |
706 | ||
acd92049 | 707 | /* This macro produces the initial definition of a function. */ |
1a94ca49 | 708 | |
acd92049 RH |
709 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
710 | alpha_start_function(FILE,NAME,DECL); | |
1a94ca49 | 711 | |
acd92049 | 712 | /* This macro closes up a function definition for the assembler. */ |
9c0e94a5 | 713 | |
acd92049 RH |
714 | #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \ |
715 | alpha_end_function(FILE,NAME,DECL) | |
f676971a | 716 | |
acd92049 RH |
717 | /* Output any profiling code before the prologue. */ |
718 | ||
719 | #define PROFILE_BEFORE_PROLOGUE 1 | |
720 | ||
fbadafbc RH |
721 | /* Never use profile counters. */ |
722 | ||
723 | #define NO_PROFILE_COUNTERS 1 | |
724 | ||
1a94ca49 | 725 | /* Output assembler code to FILE to increment profiler label # LABELNO |
e0fb9029 | 726 | for profiling a function entry. Under OSF/1, profiling is enabled |
ddd5a7c1 | 727 | by simply passing -pg to the assembler and linker. */ |
85d159a3 | 728 | |
e0fb9029 | 729 | #define FUNCTION_PROFILER(FILE, LABELNO) |
85d159a3 | 730 | |
1a94ca49 RK |
731 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
732 | the stack pointer does not matter. The value is tested only in | |
733 | functions that have frame pointers. | |
734 | No definition is equivalent to always zero. */ | |
735 | ||
736 | #define EXIT_IGNORE_STACK 1 | |
c112e233 RH |
737 | |
738 | /* Define registers used by the epilogue and return instruction. */ | |
739 | ||
740 | #define EPILOGUE_USES(REGNO) ((REGNO) == 26) | |
1a94ca49 | 741 | \f |
1a94ca49 RK |
742 | /* Length in units of the trampoline for entering a nested function. */ |
743 | ||
7981384f | 744 | #define TRAMPOLINE_SIZE 32 |
1a94ca49 | 745 | |
30864e14 RH |
746 | /* The alignment of a trampoline, in bits. */ |
747 | ||
748 | #define TRAMPOLINE_ALIGNMENT 64 | |
749 | ||
675f0e7c RK |
750 | /* A C expression whose value is RTL representing the value of the return |
751 | address for the frame COUNT steps up from the current frame. | |
752 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of | |
952fc2ed | 753 | the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */ |
675f0e7c | 754 | |
9ecc37f0 | 755 | #define RETURN_ADDR_RTX alpha_return_addr |
9ecc37f0 | 756 | |
221cf9ab OH |
757 | /* Provide a definition of DWARF_FRAME_REGNUM here so that fallback unwinders |
758 | can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same | |
759 | as the default definition in dwarf2out.c. */ | |
760 | #undef DWARF_FRAME_REGNUM | |
761 | #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG) | |
762 | ||
285a5742 | 763 | /* Before the prologue, RA lives in $26. */ |
6abc6f40 | 764 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26) |
8034da37 | 765 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26) |
ed80cd68 | 766 | #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64) |
282efe1c | 767 | #define DWARF_ZERO_REG 31 |
4573b4de RH |
768 | |
769 | /* Describe how we implement __builtin_eh_return. */ | |
770 | #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM) | |
771 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28) | |
772 | #define EH_RETURN_HANDLER_RTX \ | |
773 | gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \ | |
38173d38 | 774 | crtl->outgoing_args_size)) |
675f0e7c | 775 | \f |
1a94ca49 RK |
776 | /* Addressing modes, and classification of registers for them. */ |
777 | ||
1a94ca49 RK |
778 | /* Macros to check register numbers against specific register classes. */ |
779 | ||
780 | /* These assume that REGNO is a hard or pseudo reg number. | |
781 | They give nonzero only if REGNO is a hard reg of the suitable class | |
782 | or a pseudo reg currently allocated to a suitable hard reg. | |
783 | Since they use reg_renumber, they are safe only once reg_renumber | |
784 | has been allocated, which happens in local-alloc.c. */ | |
785 | ||
786 | #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
787 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
52a69200 RK |
788 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ |
789 | || (REGNO) == 63 || reg_renumber[REGNO] == 63) | |
1a94ca49 RK |
790 | \f |
791 | /* Maximum number of registers that can appear in a valid memory address. */ | |
792 | #define MAX_REGS_PER_ADDRESS 1 | |
793 | ||
794 | /* Recognize any constant value that is a valid address. For the Alpha, | |
795 | there are only constants none since we want to use LDA to load any | |
796 | symbolic addresses into registers. */ | |
797 | ||
798 | #define CONSTANT_ADDRESS_P(X) \ | |
7d83f4f5 | 799 | (CONST_INT_P (X) \ |
1a94ca49 RK |
800 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) |
801 | ||
1a94ca49 RK |
802 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx |
803 | and check its validity for a certain class. | |
804 | We have two alternate definitions for each of them. | |
805 | The usual definition accepts all pseudo regs; the other rejects | |
806 | them unless they have been allocated suitable hard regs. | |
807 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
808 | ||
809 | Most source files want to accept pseudo regs in the hope that | |
810 | they will get allocated to the class that the insn wants them to be in. | |
811 | Source files for reload pass need to be strict. | |
812 | After reload, it makes no difference, since pseudo regs have | |
813 | been eliminated by then. */ | |
814 | ||
1a94ca49 RK |
815 | /* Nonzero if X is a hard reg that can be used as an index |
816 | or if it is a pseudo reg. */ | |
817 | #define REG_OK_FOR_INDEX_P(X) 0 | |
5d02b6c2 | 818 | |
1a94ca49 RK |
819 | /* Nonzero if X is a hard reg that can be used as a base reg |
820 | or if it is a pseudo reg. */ | |
a39bdefc | 821 | #define NONSTRICT_REG_OK_FOR_BASE_P(X) \ |
52a69200 | 822 | (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
1a94ca49 | 823 | |
5d02b6c2 RH |
824 | /* ??? Nonzero if X is the frame pointer, or some virtual register |
825 | that may eliminate to the frame pointer. These will be allowed to | |
826 | have offsets greater than 32K. This is done because register | |
827 | elimination offsets will change the hi/lo split, and if we split | |
285a5742 | 828 | before reload, we will require additional instructions. */ |
a39bdefc | 829 | #define NONSTRICT_REG_OK_FP_BASE_P(X) \ |
5d02b6c2 RH |
830 | (REGNO (X) == 31 || REGNO (X) == 63 \ |
831 | || (REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
32990d5b | 832 | && REGNO (X) < LAST_VIRTUAL_POINTER_REGISTER)) |
5d02b6c2 | 833 | |
1a94ca49 | 834 | /* Nonzero if X is a hard reg that can be used as a base reg. */ |
a39bdefc | 835 | #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) |
5d02b6c2 | 836 | |
a39bdefc RH |
837 | #ifdef REG_OK_STRICT |
838 | #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X) | |
839 | #else | |
840 | #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) | |
1a94ca49 RK |
841 | #endif |
842 | \f | |
a9a2595b JR |
843 | /* Try a machine-dependent way of reloading an illegitimate address |
844 | operand. If we find one, push the reload and jump to WIN. This | |
aead1ca3 | 845 | macro is used in only one place: `find_reloads_address' in reload.c. */ |
f676971a | 846 | |
aead1ca3 RH |
847 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
848 | do { \ | |
849 | rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ | |
850 | if (new_x) \ | |
851 | { \ | |
852 | X = new_x; \ | |
853 | goto WIN; \ | |
854 | } \ | |
a9a2595b JR |
855 | } while (0) |
856 | ||
1a94ca49 RK |
857 | /* Go to LABEL if ADDR (a legitimate address expression) |
858 | has an effect that depends on the machine mode it is used for. | |
859 | On the Alpha this is true only for the unaligned modes. We can | |
860 | simplify this test since we know that the address must be valid. */ | |
861 | ||
862 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
863 | { if (GET_CODE (ADDR) == AND) goto LABEL; } | |
1a94ca49 RK |
864 | \f |
865 | /* Specify the machine mode that this machine uses | |
866 | for the index in the tablejump instruction. */ | |
867 | #define CASE_VECTOR_MODE SImode | |
868 | ||
18543a22 ILT |
869 | /* Define as C expression which evaluates to nonzero if the tablejump |
870 | instruction expects the table to contain offsets from the address of the | |
3aa9d5b6 | 871 | table. |
b0435cf4 | 872 | |
3aa9d5b6 | 873 | Do not define this if the table should contain absolute addresses. |
260ced47 RK |
874 | On the Alpha, the table is really GP-relative, not relative to the PC |
875 | of the table, but we pretend that it is PC-relative; this should be OK, | |
0076aa6b | 876 | but we should try to find some better way sometime. */ |
18543a22 | 877 | #define CASE_VECTOR_PC_RELATIVE 1 |
1a94ca49 | 878 | |
1a94ca49 RK |
879 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
880 | #define DEFAULT_SIGNED_CHAR 1 | |
881 | ||
1a94ca49 RK |
882 | /* Max number of bytes we can move to or from memory |
883 | in one reasonably fast instruction. */ | |
884 | ||
885 | #define MOVE_MAX 8 | |
886 | ||
7e24ffc9 | 887 | /* If a memory-to-memory move would take MOVE_RATIO or more simple |
70128ad9 | 888 | move-instruction pairs, we will do a movmem or libcall instead. |
7e24ffc9 HPN |
889 | |
890 | Without byte/word accesses, we want no more than four instructions; | |
285a5742 | 891 | with, several single byte accesses are better. */ |
6c174fc0 | 892 | |
e04ad03d | 893 | #define MOVE_RATIO(speed) (TARGET_BWX ? 7 : 2) |
6c174fc0 | 894 | |
1a94ca49 RK |
895 | /* Largest number of bytes of an object that can be placed in a register. |
896 | On the Alpha we have plenty of registers, so use TImode. */ | |
897 | #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
898 | ||
899 | /* Nonzero if access to memory by bytes is no faster than for words. | |
825dda42 | 900 | Also nonzero if doing byte operations (specifically shifts) in registers |
f676971a | 901 | is undesirable. |
1a94ca49 RK |
902 | |
903 | On the Alpha, we want to not use the byte operation and instead use | |
904 | masking operations to access fields; these will save instructions. */ | |
905 | ||
906 | #define SLOW_BYTE_ACCESS 1 | |
907 | ||
9a63901f RK |
908 | /* Define if operations between registers always perform the operation |
909 | on the full register even if a narrower mode is specified. */ | |
910 | #define WORD_REGISTER_OPERATIONS | |
911 | ||
912 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
913 | will either zero-extend or sign-extend. The value of this macro should | |
914 | be the code that says which one of the two operations is implicitly | |
f822d252 | 915 | done, UNKNOWN if none. */ |
b7747781 | 916 | #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) |
1a94ca49 | 917 | |
225211e2 RK |
918 | /* Define if loading short immediate values into registers sign extends. */ |
919 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
920 | ||
1a94ca49 RK |
921 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
922 | is done just by pretending it is already truncated. */ | |
923 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
924 | ||
7dba8395 RH |
925 | /* The CIX ctlz and cttz instructions return 64 for zero. */ |
926 | #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) | |
927 | #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) | |
928 | ||
1a94ca49 RK |
929 | /* Define the value returned by a floating-point comparison instruction. */ |
930 | ||
12530dbe RH |
931 | #define FLOAT_STORE_FLAG_VALUE(MODE) \ |
932 | REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE)) | |
1a94ca49 | 933 | |
35bb77fd RK |
934 | /* Canonicalize a comparison from one we don't have to one we do have. */ |
935 | ||
936 | #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ | |
937 | do { \ | |
938 | if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \ | |
7d83f4f5 | 939 | && (REG_P (OP1) || (OP1) == const0_rtx)) \ |
35bb77fd RK |
940 | { \ |
941 | rtx tem = (OP0); \ | |
942 | (OP0) = (OP1); \ | |
943 | (OP1) = tem; \ | |
944 | (CODE) = swap_condition (CODE); \ | |
945 | } \ | |
946 | if (((CODE) == LT || (CODE) == LTU) \ | |
7d83f4f5 | 947 | && CONST_INT_P (OP1) && INTVAL (OP1) == 256) \ |
35bb77fd RK |
948 | { \ |
949 | (CODE) = (CODE) == LT ? LE : LEU; \ | |
950 | (OP1) = GEN_INT (255); \ | |
951 | } \ | |
952 | } while (0) | |
953 | ||
1a94ca49 RK |
954 | /* Specify the machine mode that pointers have. |
955 | After generation of rtl, the compiler makes no further distinction | |
956 | between pointers and any other objects of this machine mode. */ | |
957 | #define Pmode DImode | |
958 | ||
285a5742 | 959 | /* Mode of a function address in a call instruction (for indexing purposes). */ |
1a94ca49 RK |
960 | |
961 | #define FUNCTION_MODE Pmode | |
962 | ||
963 | /* Define this if addresses of constant functions | |
964 | shouldn't be put through pseudo regs where they can be cse'd. | |
965 | Desirable on machines where ordinary constants are expensive | |
966 | but a CALL with constant address is cheap. | |
967 | ||
968 | We define this on the Alpha so that gen_call and gen_call_value | |
969 | get to see the SYMBOL_REF (for the hint field of the jsr). It will | |
970 | then copy it into a register, thus actually letting the address be | |
971 | cse'ed. */ | |
972 | ||
973 | #define NO_FUNCTION_CSE | |
974 | ||
d969caf8 | 975 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
285a5742 | 976 | few bits. */ |
d969caf8 | 977 | #define SHIFT_COUNT_TRUNCATED 1 |
1a94ca49 RK |
978 | \f |
979 | /* Control the assembler format that we output. */ | |
980 | ||
1a94ca49 RK |
981 | /* Output to assembler file text saying following lines |
982 | may contain character constants, extra white space, comments, etc. */ | |
1eb356b9 | 983 | #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "") |
1a94ca49 RK |
984 | |
985 | /* Output to assembler file text saying following lines | |
986 | no longer contain unusual constructs. */ | |
1eb356b9 | 987 | #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "") |
1a94ca49 | 988 | |
93de6f51 | 989 | #define TEXT_SECTION_ASM_OP "\t.text" |
1a94ca49 RK |
990 | |
991 | /* Output before read-only data. */ | |
992 | ||
93de6f51 | 993 | #define READONLY_DATA_SECTION_ASM_OP "\t.rdata" |
1a94ca49 RK |
994 | |
995 | /* Output before writable data. */ | |
996 | ||
93de6f51 | 997 | #define DATA_SECTION_ASM_OP "\t.data" |
1a94ca49 | 998 | |
1a94ca49 RK |
999 | /* How to refer to registers in assembler output. |
1000 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1001 | ||
1002 | #define REGISTER_NAMES \ | |
1003 | {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ | |
1004 | "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
1005 | "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ | |
130d2d72 | 1006 | "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ |
1a94ca49 RK |
1007 | "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ |
1008 | "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
1009 | "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ | |
52a69200 | 1010 | "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} |
1a94ca49 | 1011 | |
1eb356b9 RH |
1012 | /* Strip name encoding when emitting labels. */ |
1013 | ||
1014 | #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
1015 | do { \ | |
1016 | const char *name_ = NAME; \ | |
53e8b0b8 | 1017 | if (*name_ == '@' || *name_ == '%') \ |
1eb356b9 RH |
1018 | name_ += 2; \ |
1019 | if (*name_ == '*') \ | |
1020 | name_++; \ | |
1021 | else \ | |
1022 | fputs (user_label_prefix, STREAM); \ | |
1023 | fputs (name_, STREAM); \ | |
1024 | } while (0) | |
1025 | ||
506a61b1 KG |
1026 | /* Globalizing directive for a label. */ |
1027 | #define GLOBAL_ASM_OP "\t.globl " | |
1a94ca49 | 1028 | |
285a5742 | 1029 | /* The prefix to add to user-visible assembler symbols. */ |
1a94ca49 | 1030 | |
4e0c8ad2 | 1031 | #define USER_LABEL_PREFIX "" |
1a94ca49 | 1032 | |
1a94ca49 | 1033 | /* This is how to output a label for a jump table. Arguments are the same as |
4977bab6 | 1034 | for (*targetm.asm_out.internal_label), except the insn for the jump table is |
285a5742 | 1035 | passed. */ |
1a94ca49 RK |
1036 | |
1037 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
4977bab6 | 1038 | { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } |
1a94ca49 RK |
1039 | |
1040 | /* This is how to store into the string LABEL | |
1041 | the symbol_ref name of an internal numbered label where | |
1042 | PREFIX is the class of label and NUM is the number within the class. | |
1043 | This is suitable for output with `assemble_name'. */ | |
1044 | ||
1045 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
d1e6b55b | 1046 | sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM)) |
1a94ca49 | 1047 | |
1a94ca49 RK |
1048 | /* We use the default ASCII-output routine, except that we don't write more |
1049 | than 50 characters since the assembler doesn't support very long lines. */ | |
1050 | ||
1051 | #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ | |
1052 | do { \ | |
1053 | FILE *_hide_asm_out_file = (MYFILE); \ | |
e03c5670 | 1054 | const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \ |
1a94ca49 RK |
1055 | int _hide_thissize = (MYLENGTH); \ |
1056 | int _size_so_far = 0; \ | |
1057 | { \ | |
1058 | FILE *asm_out_file = _hide_asm_out_file; \ | |
e03c5670 | 1059 | const unsigned char *p = _hide_p; \ |
1a94ca49 RK |
1060 | int thissize = _hide_thissize; \ |
1061 | int i; \ | |
1062 | fprintf (asm_out_file, "\t.ascii \""); \ | |
1063 | \ | |
1064 | for (i = 0; i < thissize; i++) \ | |
1065 | { \ | |
1066 | register int c = p[i]; \ | |
1067 | \ | |
1068 | if (_size_so_far ++ > 50 && i < thissize - 4) \ | |
1069 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ | |
1070 | \ | |
1071 | if (c == '\"' || c == '\\') \ | |
1072 | putc ('\\', asm_out_file); \ | |
1073 | if (c >= ' ' && c < 0177) \ | |
1074 | putc (c, asm_out_file); \ | |
1075 | else \ | |
1076 | { \ | |
1077 | fprintf (asm_out_file, "\\%o", c); \ | |
1078 | /* After an octal-escape, if a digit follows, \ | |
1079 | terminate one string constant and start another. \ | |
8aeea6e6 | 1080 | The VAX assembler fails to stop reading the escape \ |
1a94ca49 RK |
1081 | after three digits, so this is the only way we \ |
1082 | can get it to parse the data properly. */ \ | |
0df6c2c7 | 1083 | if (i < thissize - 1 && ISDIGIT (p[i + 1])) \ |
b2d5e311 | 1084 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ |
1a94ca49 RK |
1085 | } \ |
1086 | } \ | |
1087 | fprintf (asm_out_file, "\"\n"); \ | |
1088 | } \ | |
1089 | } \ | |
1090 | while (0) | |
52a69200 | 1091 | |
260ced47 | 1092 | /* This is how to output an element of a case-vector that is relative. */ |
1a94ca49 | 1093 | |
33f7f353 | 1094 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
800d1de1 | 1095 | fprintf (FILE, "\t.gprel32 $L%d\n", (VALUE)) |
1a94ca49 RK |
1096 | |
1097 | /* This is how to output an assembler line | |
1098 | that says to advance the location counter | |
1099 | to a multiple of 2**LOG bytes. */ | |
1100 | ||
1101 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1102 | if ((LOG) != 0) \ | |
1103 | fprintf (FILE, "\t.align %d\n", LOG); | |
1104 | ||
1105 | /* This is how to advance the location counter by SIZE bytes. */ | |
1106 | ||
1107 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
ad14dc5c | 1108 | fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) |
1a94ca49 RK |
1109 | |
1110 | /* This says how to output an assembler line | |
1111 | to define a global common symbol. */ | |
1112 | ||
1113 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1114 | ( fputs ("\t.comm ", (FILE)), \ | |
1115 | assemble_name ((FILE), (NAME)), \ | |
58e15542 | 1116 | fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) |
1a94ca49 RK |
1117 | |
1118 | /* This says how to output an assembler line | |
1119 | to define a local common symbol. */ | |
1120 | ||
1121 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
1122 | ( fputs ("\t.lcomm ", (FILE)), \ | |
1123 | assemble_name ((FILE), (NAME)), \ | |
58e15542 | 1124 | fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) |
60593797 | 1125 | \f |
9ec36da5 | 1126 | |
1a94ca49 RK |
1127 | /* Print operand X (an rtx) in assembler syntax to file FILE. |
1128 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1129 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1130 | ||
1131 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1132 | ||
1133 | /* Determine which codes are valid without a following integer. These must | |
941cc05a RK |
1134 | not be alphabetic. |
1135 | ||
1136 | ~ Generates the name of the current function. | |
2bf6230d | 1137 | |
be7560ea RH |
1138 | / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX |
1139 | attributes are examined to determine what is appropriate. | |
e5958492 RK |
1140 | |
1141 | , Generates single precision suffix for floating point | |
1142 | instructions (s for IEEE, f for VAX) | |
1143 | ||
1144 | - Generates double precision suffix for floating point | |
1145 | instructions (t for IEEE, g for VAX) | |
2bf6230d | 1146 | */ |
1a94ca49 | 1147 | |
be7560ea | 1148 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ |
1eb356b9 | 1149 | ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \ |
e4bec638 | 1150 | || (CODE) == '#' || (CODE) == '*' || (CODE) == '&') |
201312c2 | 1151 | |
1a94ca49 RK |
1152 | /* Print a memory address as an operand to reference that memory location. */ |
1153 | ||
714b019c RH |
1154 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ |
1155 | print_operand_address((FILE), (ADDR)) | |
03f8c4cc | 1156 | \f |
34fa88ab RK |
1157 | /* Tell collect that the object format is ECOFF. */ |
1158 | #define OBJECT_FORMAT_COFF | |
1159 | #define EXTENDED_COFF | |
1160 | ||
1161 | /* If we use NM, pass -g to it so it only lists globals. */ | |
1162 | #define NM_FLAGS "-pg" | |
1163 | ||
03f8c4cc RK |
1164 | /* Definitions for debugging. */ |
1165 | ||
23532de9 JT |
1166 | #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */ |
1167 | #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */ | |
1168 | #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */ | |
03f8c4cc RK |
1169 | |
1170 | #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ | |
fe0986b4 | 1171 | #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG |
03f8c4cc RK |
1172 | #endif |
1173 | ||
1174 | ||
1175 | /* Correct the offset of automatic variables and arguments. Note that | |
1176 | the Alpha debug format wants all automatic variables and arguments | |
1177 | to be in terms of two different offsets from the virtual frame pointer, | |
1178 | which is the stack pointer before any adjustment in the function. | |
1179 | The offset for the argument pointer is fixed for the native compiler, | |
1180 | it is either zero (for the no arguments case) or large enough to hold | |
1181 | all argument registers. | |
1182 | The offset for the auto pointer is the fourth argument to the .frame | |
1183 | directive (local_offset). | |
1184 | To stay compatible with the native tools we use the same offsets | |
1185 | from the virtual frame pointer and adjust the debugger arg/auto offsets | |
1186 | accordingly. These debugger offsets are set up in output_prolog. */ | |
1187 | ||
9a0b18f2 RK |
1188 | extern long alpha_arg_offset; |
1189 | extern long alpha_auto_offset; | |
03f8c4cc RK |
1190 | #define DEBUGGER_AUTO_OFFSET(X) \ |
1191 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) | |
1192 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) | |
1193 | ||
3e487b21 | 1194 | /* mips-tfile doesn't understand .stabd directives. */ |
93a27b7b ZW |
1195 | #define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) do { \ |
1196 | dbxout_begin_stabn_sline (LINE); \ | |
1197 | dbxout_stab_value_internal_label ("LM", &COUNTER); \ | |
1198 | } while (0) | |
3e487b21 ZW |
1199 | |
1200 | /* We want to use MIPS-style .loc directives for SDB line numbers. */ | |
93a27b7b | 1201 | extern int num_source_filenames; |
3e487b21 | 1202 | #define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) \ |
93a27b7b | 1203 | fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE) |
03f8c4cc RK |
1204 | |
1205 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
1206 | alpha_output_filename (STREAM, NAME) | |
03f8c4cc | 1207 | |
4330b0e7 JW |
1208 | /* mips-tfile.c limits us to strings of one page. We must underestimate this |
1209 | number, because the real length runs past this up to the next | |
1210 | continuation point. This is really a dbxout.c bug. */ | |
1211 | #define DBX_CONTIN_LENGTH 3000 | |
03f8c4cc RK |
1212 | |
1213 | /* By default, turn on GDB extensions. */ | |
1214 | #define DEFAULT_GDB_EXTENSIONS 1 | |
1215 | ||
7aadc7c2 RK |
1216 | /* Stabs-in-ECOFF can't handle dbxout_function_end(). */ |
1217 | #define NO_DBX_FUNCTION_END 1 | |
1218 | ||
03f8c4cc RK |
1219 | /* If we are smuggling stabs through the ALPHA ECOFF object |
1220 | format, put a comment in front of the .stab<x> operation so | |
1221 | that the ALPHA assembler does not choke. The mips-tfile program | |
1222 | will correctly put the stab into the object file. */ | |
1223 | ||
93de6f51 HPN |
1224 | #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t") |
1225 | #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t") | |
1226 | #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t") | |
03f8c4cc RK |
1227 | |
1228 | /* Forward references to tags are allowed. */ | |
1229 | #define SDB_ALLOW_FORWARD_REFERENCES | |
1230 | ||
1231 | /* Unknown tags are also allowed. */ | |
1232 | #define SDB_ALLOW_UNKNOWN_REFERENCES | |
1233 | ||
1234 | #define PUT_SDB_DEF(a) \ | |
1235 | do { \ | |
1236 | fprintf (asm_out_file, "\t%s.def\t", \ | |
1237 | (TARGET_GAS) ? "" : "#"); \ | |
1238 | ASM_OUTPUT_LABELREF (asm_out_file, a); \ | |
1239 | fputc (';', asm_out_file); \ | |
1240 | } while (0) | |
1241 | ||
1242 | #define PUT_SDB_PLAIN_DEF(a) \ | |
1243 | do { \ | |
1244 | fprintf (asm_out_file, "\t%s.def\t.%s;", \ | |
1245 | (TARGET_GAS) ? "" : "#", (a)); \ | |
1246 | } while (0) | |
1247 | ||
1248 | #define PUT_SDB_TYPE(a) \ | |
1249 | do { \ | |
1250 | fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \ | |
1251 | } while (0) | |
1252 | ||
1253 | /* For block start and end, we create labels, so that | |
1254 | later we can figure out where the correct offset is. | |
1255 | The normal .ent/.end serve well enough for functions, | |
1256 | so those are just commented out. */ | |
1257 | ||
1258 | extern int sdb_label_count; /* block start/end next label # */ | |
1259 | ||
1260 | #define PUT_SDB_BLOCK_START(LINE) \ | |
1261 | do { \ | |
1262 | fprintf (asm_out_file, \ | |
1263 | "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ | |
1264 | sdb_label_count, \ | |
1265 | (TARGET_GAS) ? "" : "#", \ | |
1266 | sdb_label_count, \ | |
1267 | (LINE)); \ | |
1268 | sdb_label_count++; \ | |
1269 | } while (0) | |
1270 | ||
1271 | #define PUT_SDB_BLOCK_END(LINE) \ | |
1272 | do { \ | |
1273 | fprintf (asm_out_file, \ | |
1274 | "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ | |
1275 | sdb_label_count, \ | |
1276 | (TARGET_GAS) ? "" : "#", \ | |
1277 | sdb_label_count, \ | |
1278 | (LINE)); \ | |
1279 | sdb_label_count++; \ | |
1280 | } while (0) | |
1281 | ||
1282 | #define PUT_SDB_FUNCTION_START(LINE) | |
1283 | ||
1284 | #define PUT_SDB_FUNCTION_END(LINE) | |
1285 | ||
3c303f52 | 1286 | #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME)) |
03f8c4cc | 1287 | |
b0435cf4 RH |
1288 | /* The system headers under Alpha systems are generally C++-aware. */ |
1289 | #define NO_IMPLICIT_EXTERN_C |