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f8b969de | 1 | /* Definitions of target machine for GNU compiler, for DEC Alpha. |
f1717362 | 2 | Copyright (C) 1992-2016 Free Software Foundation, Inc. |
16218bef | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
f8b969de | 4 | |
187b36cf | 5 | This file is part of GCC. |
f8b969de | 6 | |
187b36cf | 7 | GCC is free software; you can redistribute it and/or modify |
f8b969de | 8 | it under the terms of the GNU General Public License as published by |
038d1e19 | 9 | the Free Software Foundation; either version 3, or (at your option) |
f8b969de | 10 | any later version. |
11 | ||
187b36cf | 12 | GCC is distributed in the hope that it will be useful, |
f8b969de | 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
038d1e19 | 18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
f8b969de | 20 | |
36a259fd | 21 | /* Target CPU builtins. */ |
22 | #define TARGET_CPU_CPP_BUILTINS() \ | |
23 | do \ | |
24 | { \ | |
25 | builtin_define ("__alpha"); \ | |
26 | builtin_define ("__alpha__"); \ | |
27 | builtin_assert ("cpu=alpha"); \ | |
28 | builtin_assert ("machine=alpha"); \ | |
29 | if (TARGET_CIX) \ | |
30 | { \ | |
31 | builtin_define ("__alpha_cix__"); \ | |
32 | builtin_assert ("cpu=cix"); \ | |
33 | } \ | |
34 | if (TARGET_FIX) \ | |
35 | { \ | |
36 | builtin_define ("__alpha_fix__"); \ | |
37 | builtin_assert ("cpu=fix"); \ | |
38 | } \ | |
39 | if (TARGET_BWX) \ | |
40 | { \ | |
41 | builtin_define ("__alpha_bwx__"); \ | |
42 | builtin_assert ("cpu=bwx"); \ | |
43 | } \ | |
44 | if (TARGET_MAX) \ | |
45 | { \ | |
46 | builtin_define ("__alpha_max__"); \ | |
47 | builtin_assert ("cpu=max"); \ | |
48 | } \ | |
fb64edde | 49 | if (alpha_cpu == PROCESSOR_EV6) \ |
36a259fd | 50 | { \ |
51 | builtin_define ("__alpha_ev6__"); \ | |
52 | builtin_assert ("cpu=ev6"); \ | |
53 | } \ | |
fb64edde | 54 | else if (alpha_cpu == PROCESSOR_EV5) \ |
36a259fd | 55 | { \ |
56 | builtin_define ("__alpha_ev5__"); \ | |
57 | builtin_assert ("cpu=ev5"); \ | |
58 | } \ | |
59 | else /* Presumably ev4. */ \ | |
60 | { \ | |
61 | builtin_define ("__alpha_ev4__"); \ | |
62 | builtin_assert ("cpu=ev4"); \ | |
63 | } \ | |
6529ea5c | 64 | if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \ |
522358f6 | 65 | builtin_define ("_IEEE_FP"); \ |
6529ea5c | 66 | if (TARGET_IEEE_WITH_INEXACT) \ |
522358f6 | 67 | builtin_define ("_IEEE_FP_INEXACT"); \ |
ef76af46 | 68 | if (TARGET_LONG_DOUBLE_128) \ |
69 | builtin_define ("__LONG_DOUBLE_128__"); \ | |
08eedad6 | 70 | \ |
71 | /* Macros dependent on the C dialect. */ \ | |
ffed53c4 | 72 | SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ |
6529ea5c | 73 | } while (0) |
f8b969de | 74 | |
ffed53c4 | 75 | #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS |
76 | #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \ | |
77 | do \ | |
78 | { \ | |
79 | if (preprocessing_asm_p ()) \ | |
80 | builtin_define_std ("LANGUAGE_ASSEMBLY"); \ | |
71c97472 | 81 | else if (c_dialect_cxx ()) \ |
ffed53c4 | 82 | { \ |
83 | builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \ | |
84 | builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \ | |
85 | } \ | |
71c97472 | 86 | else \ |
87 | builtin_define_std ("LANGUAGE_C"); \ | |
88 | if (c_dialect_objc ()) \ | |
ffed53c4 | 89 | { \ |
90 | builtin_define ("__LANGUAGE_OBJECTIVE_C"); \ | |
91 | builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \ | |
92 | } \ | |
93 | } \ | |
94 | while (0) | |
95 | #endif | |
96 | ||
f8b969de | 97 | /* Run-time compilation parameters selecting different hardware subsets. */ |
98 | ||
da226b03 | 99 | /* Which processor to schedule for. The cpu attribute defines a list that |
100 | mirrors this list, so changes to alpha.md must be made at the same time. */ | |
101 | ||
102 | enum processor_type | |
fab7adbf | 103 | { |
104 | PROCESSOR_EV4, /* 2106[46]{a,} */ | |
0dbd1c74 | 105 | PROCESSOR_EV5, /* 21164{a,pc,} */ |
fab7adbf | 106 | PROCESSOR_EV6, /* 21264 */ |
107 | PROCESSOR_MAX | |
108 | }; | |
da226b03 | 109 | |
110 | extern enum processor_type alpha_cpu; | |
fb64edde | 111 | extern enum processor_type alpha_tune; |
da226b03 | 112 | |
121602da | 113 | enum alpha_trap_precision |
114 | { | |
115 | ALPHA_TP_PROG, /* No precision (default). */ | |
116 | ALPHA_TP_FUNC, /* Trap contained within originating function. */ | |
65abff06 | 117 | ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */ |
121602da | 118 | }; |
119 | ||
120 | enum alpha_fp_rounding_mode | |
121 | { | |
122 | ALPHA_FPRM_NORM, /* Normal rounding mode. */ | |
123 | ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ | |
65abff06 | 124 | ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ |
121602da | 125 | ALPHA_FPRM_DYN /* Dynamic rounding mode. */ |
126 | }; | |
127 | ||
128 | enum alpha_fp_trap_mode | |
129 | { | |
65abff06 | 130 | ALPHA_FPTM_N, /* Normal trap mode. */ |
121602da | 131 | ALPHA_FPTM_U, /* Underflow traps enabled. */ |
132 | ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ | |
133 | ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */ | |
134 | }; | |
135 | ||
121602da | 136 | extern enum alpha_trap_precision alpha_tp; |
137 | extern enum alpha_fp_rounding_mode alpha_fprm; | |
138 | extern enum alpha_fp_trap_mode alpha_fptm; | |
139 | ||
fb64edde | 140 | /* Invert the easy way to make options work. */ |
141 | #define TARGET_FP (!TARGET_SOFT_FP) | |
852b4d5d | 142 | |
4affb66c | 143 | /* These are for target os support and cannot be changed at runtime. */ |
1b803a4f | 144 | #define TARGET_ABI_OPEN_VMS 0 |
145 | #define TARGET_ABI_OSF (!TARGET_ABI_OPEN_VMS) | |
4affb66c | 146 | |
b9a5aa8e | 147 | #ifndef TARGET_CAN_FAULT_IN_PROLOGUE |
148 | #define TARGET_CAN_FAULT_IN_PROLOGUE 0 | |
149 | #endif | |
915c336f | 150 | #ifndef TARGET_HAS_XFLOATING_LIBS |
ef76af46 | 151 | #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 |
915c336f | 152 | #endif |
30dceb30 | 153 | #ifndef TARGET_PROFILING_NEEDS_GP |
154 | #define TARGET_PROFILING_NEEDS_GP 0 | |
155 | #endif | |
8952c876 | 156 | #ifndef TARGET_FIXUP_EV5_PREFETCH |
157 | #define TARGET_FIXUP_EV5_PREFETCH 0 | |
158 | #endif | |
5f7b9df8 | 159 | #ifndef HAVE_AS_TLS |
160 | #define HAVE_AS_TLS 0 | |
161 | #endif | |
4affb66c | 162 | |
fb64edde | 163 | #define TARGET_DEFAULT MASK_FPREGS |
f8b969de | 164 | |
fc981845 | 165 | #ifndef TARGET_CPU_DEFAULT |
166 | #define TARGET_CPU_DEFAULT 0 | |
167 | #endif | |
168 | ||
8626dbb9 | 169 | #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS |
170 | #ifdef HAVE_AS_EXPLICIT_RELOCS | |
171 | #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS | |
fb64edde | 172 | #define TARGET_SUPPORT_ARCH 1 |
8626dbb9 | 173 | #else |
174 | #define TARGET_DEFAULT_EXPLICIT_RELOCS 0 | |
175 | #endif | |
176 | #endif | |
177 | ||
fb64edde | 178 | #ifndef TARGET_SUPPORT_ARCH |
179 | #define TARGET_SUPPORT_ARCH 0 | |
180 | #endif | |
121602da | 181 | |
7dd97ab6 | 182 | /* Support for a compile-time default CPU, et cetera. The rules are: |
183 | --with-cpu is ignored if -mcpu is specified. | |
184 | --with-tune is ignored if -mtune is specified. */ | |
185 | #define OPTION_DEFAULT_SPECS \ | |
186 | {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ | |
187 | {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } | |
188 | ||
f8b969de | 189 | \f |
190 | /* target machine storage layout */ | |
191 | ||
192 | /* Define the size of `int'. The default is the same as the word size. */ | |
193 | #define INT_TYPE_SIZE 32 | |
194 | ||
195 | /* Define the size of `long long'. The default is the twice the word size. */ | |
196 | #define LONG_LONG_TYPE_SIZE 64 | |
197 | ||
198 | /* The two floating-point formats we support are S-floating, which is | |
199 | 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' | |
200 | and `long double' are T. */ | |
201 | ||
202 | #define FLOAT_TYPE_SIZE 32 | |
203 | #define DOUBLE_TYPE_SIZE 64 | |
ef76af46 | 204 | #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) |
205 | ||
ef76af46 | 206 | /* Work around target_flags dependency in ada/targtyps.c. */ |
207 | #define WIDEST_HARDWARE_FP_SIZE 64 | |
f8b969de | 208 | |
c8ced5e0 | 209 | #define WCHAR_TYPE "unsigned int" |
210 | #define WCHAR_TYPE_SIZE 32 | |
f8b969de | 211 | |
064d9c8f | 212 | /* Define this macro if it is advisable to hold scalars in registers |
9e7454d0 | 213 | in a wider mode than that declared by the program. In such cases, |
f8b969de | 214 | the value is constrained to be within the bounds of the declared |
215 | type, but kept valid in the wider mode. The signedness of the | |
216 | extension may differ from that of the type. | |
217 | ||
79db42ad | 218 | For Alpha, we always store objects in a full register. 32-bit integers |
219 | are always sign-extended, but smaller objects retain their signedness. | |
220 | ||
221 | Note that small vector types can get mapped onto integer modes at the | |
222 | whim of not appearing in alpha-modes.def. We never promoted these | |
84cbcde5 | 223 | values before; don't do so now that we've trimmed the set of modes to |
79db42ad | 224 | those actually implemented in the backend. */ |
225 | ||
226 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
227 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
228 | && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \ | |
229 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
230 | { \ | |
231 | if ((MODE) == SImode) \ | |
232 | (UNSIGNEDP) = 0; \ | |
233 | (MODE) = DImode; \ | |
f8b969de | 234 | } |
235 | ||
f8b969de | 236 | /* Define this if most significant bit is lowest numbered |
237 | in instructions that operate on numbered bit-fields. | |
238 | ||
239 | There are no such instructions on the Alpha, but the documentation | |
240 | is little endian. */ | |
241 | #define BITS_BIG_ENDIAN 0 | |
242 | ||
243 | /* Define this if most significant byte of a word is the lowest numbered. | |
244 | This is false on the Alpha. */ | |
245 | #define BYTES_BIG_ENDIAN 0 | |
246 | ||
247 | /* Define this if most significant word of a multiword number is lowest | |
248 | numbered. | |
249 | ||
250 | For Alpha we can decide arbitrarily since there are no machine instructions | |
65abff06 | 251 | for them. Might as well be consistent with bytes. */ |
f8b969de | 252 | #define WORDS_BIG_ENDIAN 0 |
253 | ||
f8b969de | 254 | /* Width of a word, in units (bytes). */ |
255 | #define UNITS_PER_WORD 8 | |
256 | ||
257 | /* Width in bits of a pointer. | |
258 | See also the macro `Pmode' defined below. */ | |
259 | #define POINTER_SIZE 64 | |
260 | ||
261 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
262 | #define PARM_BOUNDARY 64 | |
263 | ||
264 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
e22c13fa | 265 | #define STACK_BOUNDARY 128 |
f8b969de | 266 | |
267 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
0ea5169b | 268 | #define FUNCTION_BOUNDARY 32 |
f8b969de | 269 | |
270 | /* Alignment of field after `int : 0' in a structure. */ | |
271 | #define EMPTY_FIELD_BOUNDARY 64 | |
272 | ||
273 | /* Every structure's size must be a multiple of this. */ | |
274 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
275 | ||
ceb2fe0f | 276 | /* A bit-field declared as `int' forces `int' alignment for the struct. */ |
a25bf392 | 277 | #undef PCC_BITFILED_TYPE_MATTERS |
f8b969de | 278 | #define PCC_BITFIELD_TYPE_MATTERS 1 |
279 | ||
f8b969de | 280 | /* No data type wants to be aligned rounder than this. */ |
915c336f | 281 | #define BIGGEST_ALIGNMENT 128 |
f8b969de | 282 | |
ea68739c | 283 | /* For atomic access to objects, must have at least 32-bit alignment |
284 | unless the machine has byte operations. */ | |
3a6656ad | 285 | #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32)) |
ea68739c | 286 | |
041ca59a | 287 | /* Align all constants and variables to at least a word boundary so |
288 | we can pick up pieces of them faster. */ | |
34377880 | 289 | /* ??? Only if block-move stuff knows about different source/destination |
290 | alignment. */ | |
291 | #if 0 | |
041ca59a | 292 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) |
293 | #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) | |
34377880 | 294 | #endif |
f8b969de | 295 | |
e3e08e7f | 296 | /* Set this nonzero if move instructions will actually fail to work |
f8b969de | 297 | when given unaligned data. |
298 | ||
299 | Since we get an error message when we do one, call them invalid. */ | |
300 | ||
301 | #define STRICT_ALIGNMENT 1 | |
302 | ||
e3e08e7f | 303 | /* Set this nonzero if unaligned move instructions are extremely slow. |
f8b969de | 304 | |
305 | On the Alpha, they trap. */ | |
5d1321bc | 306 | |
9439ebf7 | 307 | #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 |
b739144f | 308 | |
f8b969de | 309 | /* Standard register usage. */ |
310 | ||
311 | /* Number of actual hardware registers. | |
312 | The hardware registers are assigned numbers for the compiler | |
313 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
314 | All registers that the compiler knows about must be given numbers, | |
315 | even those that are not normally considered general registers. | |
316 | ||
317 | We define all 32 integer registers, even though $31 is always zero, | |
318 | and all 32 floating-point registers, even though $f31 is also | |
319 | always zero. We do not bother defining the FP status register and | |
9e7454d0 | 320 | there are no other registers. |
5d1321bc | 321 | |
322 | Since $31 is always zero, we will use register number 31 as the | |
323 | argument pointer. It will never appear in the generated code | |
324 | because we will always be eliminating it in favor of the stack | |
bb9020e6 | 325 | pointer or hardware frame pointer. |
326 | ||
327 | Likewise, we use $f31 for the frame pointer, which will always | |
328 | be eliminated in favor of the hardware frame pointer or the | |
329 | stack pointer. */ | |
f8b969de | 330 | |
331 | #define FIRST_PSEUDO_REGISTER 64 | |
332 | ||
333 | /* 1 for registers that have pervasive standard uses | |
334 | and are not available for the register allocator. */ | |
335 | ||
336 | #define FIXED_REGISTERS \ | |
337 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
338 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ | |
339 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
340 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
341 | ||
342 | /* 1 for registers not available across function calls. | |
343 | These must include the FIXED_REGISTERS and also any | |
344 | registers that can be used without being saved. | |
345 | The latter must include the registers where values are returned | |
346 | and the register where structure-value addresses are passed. | |
347 | Aside from that, you can include as many other registers as you like. */ | |
348 | #define CALL_USED_REGISTERS \ | |
349 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ | |
350 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ | |
351 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ | |
352 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
353 | ||
354 | /* List the order in which to allocate registers. Each register must be | |
c83891bc | 355 | listed once, even those in FIXED_REGISTERS. */ |
356 | ||
357 | #define REG_ALLOC_ORDER { \ | |
358 | 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ | |
359 | 22, 23, 24, 25, 28, /* likewise */ \ | |
360 | 0, /* likewise, but return value */ \ | |
361 | 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ | |
362 | 27, /* likewise, but OSF procedure value */ \ | |
363 | \ | |
364 | 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ | |
365 | 54, 55, 56, 57, 58, 59, /* likewise */ \ | |
366 | 60, 61, 62, /* likewise */ \ | |
367 | 32, 33, /* likewise, but return values */ \ | |
368 | 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ | |
369 | \ | |
370 | 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ | |
371 | 26, /* return address */ \ | |
372 | 15, /* hard frame pointer */ \ | |
373 | \ | |
374 | 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ | |
375 | 40, 41, /* likewise */ \ | |
376 | \ | |
377 | 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ | |
378 | } | |
f8b969de | 379 | |
380 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
381 | to hold something of mode MODE. | |
382 | This is ordinarily the length in words of a value of mode MODE | |
383 | but can be less for certain modes in special long registers. */ | |
384 | ||
385 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
9deca143 | 386 | CEIL (GET_MODE_SIZE (MODE), UNITS_PER_WORD) |
f8b969de | 387 | |
388 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
389 | On Alpha, the integer registers can hold any mode. The floating-point | |
df9e12ce | 390 | registers can hold 64-bit integers as well, but not smaller values. */ |
f8b969de | 391 | |
82ecadd0 | 392 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
c933fb42 | 393 | (IN_RANGE ((REGNO), 32, 62) \ |
df9e12ce | 394 | ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \ |
28d1bd60 | 395 | || (MODE) == SCmode || (MODE) == DCmode \ |
82ecadd0 | 396 | : 1) |
397 | ||
398 | /* A C expression that is nonzero if a value of mode | |
399 | MODE1 is accessible in mode MODE2 without copying. | |
f8b969de | 400 | |
82ecadd0 | 401 | This asymmetric test is true when MODE1 could be put |
402 | in an FP register but MODE2 could not. */ | |
f8b969de | 403 | |
8d059f84 | 404 | #define MODES_TIEABLE_P(MODE1, MODE2) \ |
82ecadd0 | 405 | (HARD_REGNO_MODE_OK (32, (MODE1)) \ |
406 | ? HARD_REGNO_MODE_OK (32, (MODE2)) \ | |
8d059f84 | 407 | : 1) |
f8b969de | 408 | |
409 | /* Specify the registers used for certain standard purposes. | |
410 | The values of these macros are register numbers. */ | |
411 | ||
412 | /* Alpha pc isn't overloaded on a register that the compiler knows about. */ | |
413 | /* #define PC_REGNUM */ | |
414 | ||
415 | /* Register to use for pushing function arguments. */ | |
416 | #define STACK_POINTER_REGNUM 30 | |
417 | ||
418 | /* Base register for access to local variables of the function. */ | |
bb9020e6 | 419 | #define HARD_FRAME_POINTER_REGNUM 15 |
f8b969de | 420 | |
f8b969de | 421 | /* Base register for access to arguments of the function. */ |
5d1321bc | 422 | #define ARG_POINTER_REGNUM 31 |
f8b969de | 423 | |
bb9020e6 | 424 | /* Base register for access to local variables of function. */ |
425 | #define FRAME_POINTER_REGNUM 63 | |
426 | ||
9e7454d0 | 427 | /* Register in which static-chain is passed to a function. |
f8b969de | 428 | |
429 | For the Alpha, this is based on an example; the calling sequence | |
430 | doesn't seem to specify this. */ | |
431 | #define STATIC_CHAIN_REGNUM 1 | |
432 | ||
5dcb037d | 433 | /* The register number of the register used to address a table of |
434 | static data addresses in memory. */ | |
435 | #define PIC_OFFSET_TABLE_REGNUM 29 | |
436 | ||
437 | /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' | |
438 | is clobbered by calls. */ | |
439 | /* ??? It is and it isn't. It's required to be valid for a given | |
440 | function when the function returns. It isn't clobbered by | |
441 | current_file functions. Moreover, we do not expose the ldgp | |
442 | until after reload, so we're probably safe. */ | |
443 | /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ | |
f8b969de | 444 | \f |
445 | /* Define the classes of registers for register constraints in the | |
446 | machine description. Also define ranges of constants. | |
447 | ||
448 | One of the classes must always be named ALL_REGS and include all hard regs. | |
449 | If there is more than one class, another class must be named NO_REGS | |
450 | and contain no registers. | |
451 | ||
452 | The name GENERAL_REGS must be the name of a class (or an alias for | |
453 | another name such as ALL_REGS). This is the class of registers | |
454 | that is allowed by "g" or "r" in a register constraint. | |
455 | Also, registers outside this class are allocated only when | |
456 | instructions express preferences for them. | |
457 | ||
458 | The classes must be numbered in nondecreasing order; that is, | |
459 | a larger-numbered class must never be contained completely | |
460 | in a smaller-numbered class. | |
461 | ||
462 | For any two classes, it is very desirable that there be another | |
463 | class that represents their union. */ | |
9e7454d0 | 464 | |
5b458842 | 465 | enum reg_class { |
5f7b9df8 | 466 | NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG, |
5b458842 | 467 | GENERAL_REGS, FLOAT_REGS, ALL_REGS, |
468 | LIM_REG_CLASSES | |
469 | }; | |
f8b969de | 470 | |
471 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
472 | ||
65abff06 | 473 | /* Give names of register classes as strings for dump file. */ |
f8b969de | 474 | |
5f7b9df8 | 475 | #define REG_CLASS_NAMES \ |
476 | {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \ | |
5b458842 | 477 | "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } |
f8b969de | 478 | |
479 | /* Define which registers fit in which classes. | |
480 | This is an initializer for a vector of HARD_REG_SET | |
481 | of length N_REG_CLASSES. */ | |
482 | ||
5b458842 | 483 | #define REG_CLASS_CONTENTS \ |
484 | { {0x00000000, 0x00000000}, /* NO_REGS */ \ | |
5f7b9df8 | 485 | {0x00000001, 0x00000000}, /* R0_REG */ \ |
5b458842 | 486 | {0x01000000, 0x00000000}, /* R24_REG */ \ |
487 | {0x02000000, 0x00000000}, /* R25_REG */ \ | |
488 | {0x08000000, 0x00000000}, /* R27_REG */ \ | |
489 | {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \ | |
490 | {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \ | |
491 | {0xffffffff, 0xffffffff} } | |
f8b969de | 492 | |
493 | /* The same information, inverted: | |
494 | Return the class number of the smallest class containing | |
495 | reg number REGNO. This could be a conditional expression | |
496 | or could index an array. */ | |
497 | ||
c4db328a | 498 | #define REGNO_REG_CLASS(REGNO) \ |
5f7b9df8 | 499 | ((REGNO) == 0 ? R0_REG \ |
500 | : (REGNO) == 24 ? R24_REG \ | |
5b458842 | 501 | : (REGNO) == 25 ? R25_REG \ |
502 | : (REGNO) == 27 ? R27_REG \ | |
c933fb42 | 503 | : IN_RANGE ((REGNO), 32, 62) ? FLOAT_REGS \ |
c4db328a | 504 | : GENERAL_REGS) |
f8b969de | 505 | |
506 | /* The class value for index registers, and the one for base regs. */ | |
507 | #define INDEX_REG_CLASS NO_REGS | |
508 | #define BASE_REG_CLASS GENERAL_REGS | |
509 | ||
f8b969de | 510 | /* Given an rtx X being reloaded into a reg required to be |
511 | in class CLASS, return the class of reg to actually use. | |
512 | In general this is just CLASS; but on some machines | |
f5a60074 | 513 | in some cases it is preferable to use a more restrictive class. */ |
f8b969de | 514 | |
f5a60074 | 515 | #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class |
f8b969de | 516 | |
f8b969de | 517 | /* If we are copying between general and FP registers, we need a memory |
cbd8ec27 | 518 | location unless the FIX extension is available. */ |
f8b969de | 519 | |
0dbd1c74 | 520 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ |
5c996504 | 521 | (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \ |
522 | || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS))) | |
f8b969de | 523 | |
dbe6bb3a | 524 | /* Specify the mode to be used for memory when a secondary memory |
525 | location is needed. If MODE is floating-point, use it. Otherwise, | |
526 | widen to a word like the default. This is needed because we always | |
527 | store integers in FP registers in quadword format. This whole | |
528 | area is very tricky! */ | |
529 | #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ | |
530 | (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ | |
1f28c11e | 531 | : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \ |
dbe6bb3a | 532 | : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) |
533 | ||
897118e8 | 534 | /* Return the class of registers that cannot change mode from FROM to TO. */ |
15d92ac4 | 535 | |
22aae821 | 536 | #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ |
537 | (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ | |
538 | ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0) | |
15d92ac4 | 539 | |
f8b969de | 540 | /* Provide the cost of a branch. Exact meaning under development. */ |
4a9d7ef7 | 541 | #define BRANCH_COST(speed_p, predictable_p) 5 |
f8b969de | 542 | \f |
543 | /* Stack layout; function entry, exit and calling. */ | |
544 | ||
545 | /* Define this if pushing a word on the stack | |
546 | makes the stack pointer a smaller address. */ | |
2b785411 | 547 | #define STACK_GROWS_DOWNWARD 1 |
f8b969de | 548 | |
3ce7ff97 | 549 | /* Define this to nonzero if the nominal address of the stack frame |
f8b969de | 550 | is at the high-address end of the local variables; |
551 | that is, each additional local variable allocated | |
552 | goes at a more negative offset in the frame. */ | |
d28d5017 | 553 | /* #define FRAME_GROWS_DOWNWARD 0 */ |
f8b969de | 554 | |
555 | /* Offset within stack frame to start allocating local variables at. | |
556 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
557 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
558 | of the first local allocated. */ | |
559 | ||
bb9020e6 | 560 | #define STARTING_FRAME_OFFSET 0 |
f8b969de | 561 | |
562 | /* If we generate an insn to push BYTES bytes, | |
563 | this says how many the stack pointer really advances by. | |
564 | On Alpha, don't define this because there are no push insns. */ | |
565 | /* #define PUSH_ROUNDING(BYTES) */ | |
566 | ||
e626a4ea | 567 | /* Define this to be nonzero if stack checking is built into the ABI. */ |
568 | #define STACK_CHECK_BUILTIN 1 | |
569 | ||
f8b969de | 570 | /* Define this if the maximum size of all the outgoing args is to be |
571 | accumulated and pushed during the prologue. The amount can be | |
abe32cce | 572 | found in the variable crtl->outgoing_args_size. */ |
4448f543 | 573 | #define ACCUMULATE_OUTGOING_ARGS 1 |
f8b969de | 574 | |
575 | /* Offset of first parameter from the argument pointer register value. */ | |
576 | ||
5d1321bc | 577 | #define FIRST_PARM_OFFSET(FNDECL) 0 |
f8b969de | 578 | |
579 | /* Definitions for register eliminations. | |
580 | ||
5dbd6307 | 581 | We have two registers that can be eliminated on the Alpha. First, the |
f8b969de | 582 | frame pointer register can often be eliminated in favor of the stack |
5d1321bc | 583 | pointer register. Secondly, the argument pointer register can always be |
65abff06 | 584 | eliminated; it is replaced with either the stack or frame pointer. */ |
f8b969de | 585 | |
586 | /* This is an array of structures. Each structure initializes one pair | |
587 | of eliminable registers. The "from" register number is given first, | |
588 | followed by "to". Eliminations of the same "from" register are listed | |
589 | in order of preference. */ | |
590 | ||
bb9020e6 | 591 | #define ELIMINABLE_REGS \ |
592 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
593 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
594 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
595 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
f8b969de | 596 | |
bb9020e6 | 597 | /* Round up to a multiple of 16 bytes. */ |
ebd1056d | 598 | #define ALPHA_ROUND(X) ROUND_UP ((X), 16) |
bb9020e6 | 599 | |
f8b969de | 600 | /* Define the offset between two registers, one to be eliminated, and the other |
601 | its replacement, at the start of a routine. */ | |
4310aa50 | 602 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
603 | ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) | |
f8b969de | 604 | |
605 | /* Define this if stack space is still allocated for a parameter passed | |
606 | in a register. */ | |
607 | /* #define REG_PARM_STACK_SPACE */ | |
608 | ||
f8b969de | 609 | /* 1 if N is a possible register number for function argument passing. |
610 | On Alpha, these are $16-$21 and $f16-$f21. */ | |
611 | ||
612 | #define FUNCTION_ARG_REGNO_P(N) \ | |
c933fb42 | 613 | (IN_RANGE ((N), 16, 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) |
f8b969de | 614 | \f |
615 | /* Define a data type for recording info about an argument list | |
616 | during the scan of that argument list. This data type should | |
617 | hold all necessary information about the function itself | |
618 | and about the args processed so far, enough to enable macros | |
619 | such as FUNCTION_ARG to determine where the next arg should go. | |
620 | ||
621 | On Alpha, this is a single integer, which is a number of words | |
622 | of arguments scanned so far. | |
623 | Thus 6 or more means all following args should go on the stack. */ | |
624 | ||
625 | #define CUMULATIVE_ARGS int | |
626 | ||
627 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
628 | for a call to a function whose data type is FNTYPE. | |
629 | For a library call, FNTYPE is 0. */ | |
630 | ||
30c70355 | 631 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
632 | (CUM) = 0 | |
f8b969de | 633 | |
9deca143 | 634 | /* Define intermediate macro to compute |
635 | the size (in registers) of an argument. */ | |
f8b969de | 636 | |
9deca143 | 637 | #define ALPHA_ARG_SIZE(MODE, TYPE) \ |
915c336f | 638 | ((MODE) == TFmode || (MODE) == TCmode ? 1 \ |
9deca143 | 639 | : CEIL (((MODE) == BLKmode \ |
640 | ? int_size_in_bytes (TYPE) \ | |
641 | : GET_MODE_SIZE (MODE)), \ | |
642 | UNITS_PER_WORD)) | |
f8b969de | 643 | |
d160af54 | 644 | /* Make (or fake) .linkage entry for function call. |
d160af54 | 645 | IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ |
d160af54 | 646 | |
07c1a295 | 647 | /* This macro defines the start of an assembly comment. */ |
648 | ||
649 | #define ASM_COMMENT_START " #" | |
650 | ||
2cf1388a | 651 | /* This macro produces the initial definition of a function. */ |
f8b969de | 652 | |
a25bf392 | 653 | #undef ASM_DECLARE_FUNCTION_NAME |
2cf1388a | 654 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
655 | alpha_start_function(FILE,NAME,DECL); | |
f8b969de | 656 | |
2cf1388a | 657 | /* This macro closes up a function definition for the assembler. */ |
b9a5aa8e | 658 | |
a25bf392 | 659 | #undef ASM_DECLARE_FUNCTION_SIZE |
2cf1388a | 660 | #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \ |
661 | alpha_end_function(FILE,NAME,DECL) | |
9e7454d0 | 662 | |
2cf1388a | 663 | /* Output any profiling code before the prologue. */ |
664 | ||
665 | #define PROFILE_BEFORE_PROLOGUE 1 | |
666 | ||
9cd47842 | 667 | /* Never use profile counters. */ |
668 | ||
669 | #define NO_PROFILE_COUNTERS 1 | |
670 | ||
f8b969de | 671 | /* Output assembler code to FILE to increment profiler label # LABELNO |
eae4f634 | 672 | for profiling a function entry. Under OSF/1, profiling is enabled |
01cc3b75 | 673 | by simply passing -pg to the assembler and linker. */ |
24df62e8 | 674 | |
eae4f634 | 675 | #define FUNCTION_PROFILER(FILE, LABELNO) |
24df62e8 | 676 | |
f8b969de | 677 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
678 | the stack pointer does not matter. The value is tested only in | |
679 | functions that have frame pointers. | |
680 | No definition is equivalent to always zero. */ | |
681 | ||
682 | #define EXIT_IGNORE_STACK 1 | |
cdd2135b | 683 | |
684 | /* Define registers used by the epilogue and return instruction. */ | |
685 | ||
686 | #define EPILOGUE_USES(REGNO) ((REGNO) == 26) | |
f8b969de | 687 | \f |
f8b969de | 688 | /* Length in units of the trampoline for entering a nested function. */ |
689 | ||
8d6f57da | 690 | #define TRAMPOLINE_SIZE 32 |
f8b969de | 691 | |
d815ce59 | 692 | /* The alignment of a trampoline, in bits. */ |
693 | ||
694 | #define TRAMPOLINE_ALIGNMENT 64 | |
695 | ||
357ac111 | 696 | /* A C expression whose value is RTL representing the value of the return |
697 | address for the frame COUNT steps up from the current frame. | |
698 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of | |
e4bd5689 | 699 | the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */ |
357ac111 | 700 | |
0c0464e6 | 701 | #define RETURN_ADDR_RTX alpha_return_addr |
0c0464e6 | 702 | |
50f36bdb | 703 | /* Provide a definition of DWARF_FRAME_REGNUM here so that fallback unwinders |
704 | can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same | |
705 | as the default definition in dwarf2out.c. */ | |
706 | #undef DWARF_FRAME_REGNUM | |
707 | #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG) | |
708 | ||
65abff06 | 709 | /* Before the prologue, RA lives in $26. */ |
5a965225 | 710 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26) |
d762ed5b | 711 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26) |
c49ad9ef | 712 | #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64) |
223e8e29 | 713 | #define DWARF_ZERO_REG 31 |
c92c328f | 714 | |
715 | /* Describe how we implement __builtin_eh_return. */ | |
716 | #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM) | |
717 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28) | |
718 | #define EH_RETURN_HANDLER_RTX \ | |
29c05e22 | 719 | gen_rtx_MEM (Pmode, plus_constant (Pmode, stack_pointer_rtx, \ |
abe32cce | 720 | crtl->outgoing_args_size)) |
357ac111 | 721 | \f |
f8b969de | 722 | /* Addressing modes, and classification of registers for them. */ |
723 | ||
f8b969de | 724 | /* Macros to check register numbers against specific register classes. */ |
725 | ||
726 | /* These assume that REGNO is a hard or pseudo reg number. | |
727 | They give nonzero only if REGNO is a hard reg of the suitable class | |
728 | or a pseudo reg currently allocated to a suitable hard reg. | |
729 | Since they use reg_renumber, they are safe only once reg_renumber | |
957b2bdc | 730 | has been allocated, which happens in reginfo.c during register |
731 | allocation. */ | |
f8b969de | 732 | |
733 | #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
734 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
bb9020e6 | 735 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ |
736 | || (REGNO) == 63 || reg_renumber[REGNO] == 63) | |
f8b969de | 737 | \f |
738 | /* Maximum number of registers that can appear in a valid memory address. */ | |
739 | #define MAX_REGS_PER_ADDRESS 1 | |
740 | ||
741 | /* Recognize any constant value that is a valid address. For the Alpha, | |
742 | there are only constants none since we want to use LDA to load any | |
743 | symbolic addresses into registers. */ | |
744 | ||
745 | #define CONSTANT_ADDRESS_P(X) \ | |
c933fb42 | 746 | (CONST_INT_P (X) \ |
f8b969de | 747 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) |
748 | ||
f8b969de | 749 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx |
750 | and check its validity for a certain class. | |
751 | We have two alternate definitions for each of them. | |
752 | The usual definition accepts all pseudo regs; the other rejects | |
753 | them unless they have been allocated suitable hard regs. | |
754 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
755 | ||
756 | Most source files want to accept pseudo regs in the hope that | |
757 | they will get allocated to the class that the insn wants them to be in. | |
758 | Source files for reload pass need to be strict. | |
759 | After reload, it makes no difference, since pseudo regs have | |
760 | been eliminated by then. */ | |
761 | ||
f8b969de | 762 | /* Nonzero if X is a hard reg that can be used as an index |
763 | or if it is a pseudo reg. */ | |
764 | #define REG_OK_FOR_INDEX_P(X) 0 | |
8f59c933 | 765 | |
f8b969de | 766 | /* Nonzero if X is a hard reg that can be used as a base reg |
767 | or if it is a pseudo reg. */ | |
24b3c0ed | 768 | #define NONSTRICT_REG_OK_FOR_BASE_P(X) \ |
bb9020e6 | 769 | (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
f8b969de | 770 | |
8f59c933 | 771 | /* ??? Nonzero if X is the frame pointer, or some virtual register |
772 | that may eliminate to the frame pointer. These will be allowed to | |
773 | have offsets greater than 32K. This is done because register | |
774 | elimination offsets will change the hi/lo split, and if we split | |
65abff06 | 775 | before reload, we will require additional instructions. */ |
24b3c0ed | 776 | #define NONSTRICT_REG_OK_FP_BASE_P(X) \ |
8f59c933 | 777 | (REGNO (X) == 31 || REGNO (X) == 63 \ |
778 | || (REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
60778e62 | 779 | && REGNO (X) < LAST_VIRTUAL_POINTER_REGISTER)) |
8f59c933 | 780 | |
f8b969de | 781 | /* Nonzero if X is a hard reg that can be used as a base reg. */ |
24b3c0ed | 782 | #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) |
8f59c933 | 783 | |
24b3c0ed | 784 | #ifdef REG_OK_STRICT |
785 | #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X) | |
786 | #else | |
787 | #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) | |
f8b969de | 788 | #endif |
789 | \f | |
f64bc32a | 790 | /* Try a machine-dependent way of reloading an illegitimate address |
791 | operand. If we find one, push the reload and jump to WIN. This | |
0d50f0b7 | 792 | macro is used in only one place: `find_reloads_address' in reload.c. */ |
9e7454d0 | 793 | |
0d50f0b7 | 794 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
795 | do { \ | |
796 | rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ | |
797 | if (new_x) \ | |
798 | { \ | |
799 | X = new_x; \ | |
800 | goto WIN; \ | |
801 | } \ | |
f64bc32a | 802 | } while (0) |
803 | ||
f8b969de | 804 | \f |
805 | /* Specify the machine mode that this machine uses | |
806 | for the index in the tablejump instruction. */ | |
807 | #define CASE_VECTOR_MODE SImode | |
808 | ||
25d1d1e9 | 809 | /* Define as C expression which evaluates to nonzero if the tablejump |
810 | instruction expects the table to contain offsets from the address of the | |
58685b43 | 811 | table. |
3024b95b | 812 | |
58685b43 | 813 | Do not define this if the table should contain absolute addresses. |
1a259484 | 814 | On the Alpha, the table is really GP-relative, not relative to the PC |
815 | of the table, but we pretend that it is PC-relative; this should be OK, | |
9199a620 | 816 | but we should try to find some better way sometime. */ |
25d1d1e9 | 817 | #define CASE_VECTOR_PC_RELATIVE 1 |
f8b969de | 818 | |
f8b969de | 819 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
820 | #define DEFAULT_SIGNED_CHAR 1 | |
821 | ||
f8b969de | 822 | /* Max number of bytes we can move to or from memory |
823 | in one reasonably fast instruction. */ | |
824 | ||
825 | #define MOVE_MAX 8 | |
826 | ||
cbdc0179 | 827 | /* If a memory-to-memory move would take MOVE_RATIO or more simple |
008c057d | 828 | move-instruction pairs, we will do a movmem or libcall instead. |
cbdc0179 | 829 | |
830 | Without byte/word accesses, we want no more than four instructions; | |
65abff06 | 831 | with, several single byte accesses are better. */ |
34377880 | 832 | |
f5733e7c | 833 | #define MOVE_RATIO(speed) (TARGET_BWX ? 7 : 2) |
34377880 | 834 | |
f8b969de | 835 | /* Largest number of bytes of an object that can be placed in a register. |
836 | On the Alpha we have plenty of registers, so use TImode. */ | |
837 | #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
838 | ||
839 | /* Nonzero if access to memory by bytes is no faster than for words. | |
e3e08e7f | 840 | Also nonzero if doing byte operations (specifically shifts) in registers |
9e7454d0 | 841 | is undesirable. |
f8b969de | 842 | |
843 | On the Alpha, we want to not use the byte operation and instead use | |
844 | masking operations to access fields; these will save instructions. */ | |
845 | ||
846 | #define SLOW_BYTE_ACCESS 1 | |
847 | ||
29701bb8 | 848 | /* Define if operations between registers always perform the operation |
849 | on the full register even if a narrower mode is specified. */ | |
94f1fba7 | 850 | #define WORD_REGISTER_OPERATIONS 1 |
29701bb8 | 851 | |
852 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
853 | will either zero-extend or sign-extend. The value of this macro should | |
854 | be the code that says which one of the two operations is implicitly | |
21f1e711 | 855 | done, UNKNOWN if none. */ |
2ef10f50 | 856 | #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) |
f8b969de | 857 | |
e5f1946a | 858 | /* Define if loading short immediate values into registers sign extends. */ |
d0b99710 | 859 | #define SHORT_IMMEDIATES_SIGN_EXTEND 1 |
e5f1946a | 860 | |
f8b969de | 861 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
862 | is done just by pretending it is already truncated. */ | |
863 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
864 | ||
8f4be2be | 865 | /* The CIX ctlz and cttz instructions return 64 for zero. */ |
dd3ebafe | 866 | #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, \ |
867 | TARGET_CIX ? 1 : 0) | |
868 | #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, \ | |
869 | TARGET_CIX ? 1 : 0) | |
8f4be2be | 870 | |
f8b969de | 871 | /* Define the value returned by a floating-point comparison instruction. */ |
872 | ||
5936efd3 | 873 | #define FLOAT_STORE_FLAG_VALUE(MODE) \ |
874 | REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE)) | |
f8b969de | 875 | |
876 | /* Specify the machine mode that pointers have. | |
877 | After generation of rtl, the compiler makes no further distinction | |
878 | between pointers and any other objects of this machine mode. */ | |
879 | #define Pmode DImode | |
880 | ||
65abff06 | 881 | /* Mode of a function address in a call instruction (for indexing purposes). */ |
f8b969de | 882 | |
883 | #define FUNCTION_MODE Pmode | |
884 | ||
885 | /* Define this if addresses of constant functions | |
886 | shouldn't be put through pseudo regs where they can be cse'd. | |
887 | Desirable on machines where ordinary constants are expensive | |
888 | but a CALL with constant address is cheap. | |
889 | ||
890 | We define this on the Alpha so that gen_call and gen_call_value | |
891 | get to see the SYMBOL_REF (for the hint field of the jsr). It will | |
892 | then copy it into a register, thus actually letting the address be | |
893 | cse'ed. */ | |
894 | ||
93516111 | 895 | #define NO_FUNCTION_CSE 1 |
f8b969de | 896 | |
d78882c8 | 897 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
65abff06 | 898 | few bits. */ |
d78882c8 | 899 | #define SHIFT_COUNT_TRUNCATED 1 |
f8b969de | 900 | \f |
901 | /* Control the assembler format that we output. */ | |
902 | ||
f8b969de | 903 | /* Output to assembler file text saying following lines |
904 | may contain character constants, extra white space, comments, etc. */ | |
1f0ce6a6 | 905 | #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "") |
f8b969de | 906 | |
907 | /* Output to assembler file text saying following lines | |
908 | no longer contain unusual constructs. */ | |
1f0ce6a6 | 909 | #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "") |
f8b969de | 910 | |
becda1de | 911 | #define TEXT_SECTION_ASM_OP "\t.text" |
f8b969de | 912 | |
f8b969de | 913 | /* Output before writable data. */ |
914 | ||
becda1de | 915 | #define DATA_SECTION_ASM_OP "\t.data" |
f8b969de | 916 | |
f8b969de | 917 | /* How to refer to registers in assembler output. |
918 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
919 | ||
920 | #define REGISTER_NAMES \ | |
921 | {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ | |
922 | "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
923 | "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ | |
5d1321bc | 924 | "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ |
f8b969de | 925 | "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ |
926 | "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
927 | "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ | |
bb9020e6 | 928 | "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} |
f8b969de | 929 | |
1f0ce6a6 | 930 | /* Strip name encoding when emitting labels. */ |
931 | ||
932 | #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
933 | do { \ | |
934 | const char *name_ = NAME; \ | |
7440354e | 935 | if (*name_ == '@' || *name_ == '%') \ |
1f0ce6a6 | 936 | name_ += 2; \ |
937 | if (*name_ == '*') \ | |
938 | name_++; \ | |
939 | else \ | |
940 | fputs (user_label_prefix, STREAM); \ | |
941 | fputs (name_, STREAM); \ | |
942 | } while (0) | |
943 | ||
0036ad94 | 944 | /* Globalizing directive for a label. */ |
945 | #define GLOBAL_ASM_OP "\t.globl " | |
f8b969de | 946 | |
a25bf392 | 947 | /* Use dollar signs rather than periods in special g++ assembler names. */ |
f8b969de | 948 | |
a25bf392 | 949 | #undef NO_DOLLAR_IN_LABEL |
f8b969de | 950 | |
951 | /* This is how to store into the string LABEL | |
952 | the symbol_ref name of an internal numbered label where | |
953 | PREFIX is the class of label and NUM is the number within the class. | |
954 | This is suitable for output with `assemble_name'. */ | |
955 | ||
a25bf392 | 956 | #undef ASM_GENERATE_INTERNAL_LABEL |
f8b969de | 957 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ |
14184418 | 958 | sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM)) |
f8b969de | 959 | |
1a259484 | 960 | /* This is how to output an element of a case-vector that is relative. */ |
f8b969de | 961 | |
9eaab178 | 962 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
1b803a4f | 963 | fprintf (FILE, "\t.gprel32 $L%d\n", (VALUE)) |
6f9a435a | 964 | \f |
5e3815ad | 965 | /* If we use NM, pass -g to it so it only lists globals. */ |
966 | #define NM_FLAGS "-pg" | |
967 | ||
d6c660ad | 968 | /* Definitions for debugging. */ |
969 | ||
d6c660ad | 970 | /* Correct the offset of automatic variables and arguments. Note that |
971 | the Alpha debug format wants all automatic variables and arguments | |
972 | to be in terms of two different offsets from the virtual frame pointer, | |
973 | which is the stack pointer before any adjustment in the function. | |
974 | The offset for the argument pointer is fixed for the native compiler, | |
975 | it is either zero (for the no arguments case) or large enough to hold | |
976 | all argument registers. | |
977 | The offset for the auto pointer is the fourth argument to the .frame | |
978 | directive (local_offset). | |
979 | To stay compatible with the native tools we use the same offsets | |
980 | from the virtual frame pointer and adjust the debugger arg/auto offsets | |
981 | accordingly. These debugger offsets are set up in output_prolog. */ | |
982 | ||
56003045 | 983 | extern long alpha_arg_offset; |
984 | extern long alpha_auto_offset; | |
d6c660ad | 985 | #define DEBUGGER_AUTO_OFFSET(X) \ |
986 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) | |
987 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) | |
988 | ||
d6c660ad | 989 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ |
990 | alpha_output_filename (STREAM, NAME) | |
d6c660ad | 991 | |
d6c660ad | 992 | /* By default, turn on GDB extensions. */ |
993 | #define DEFAULT_GDB_EXTENSIONS 1 | |
994 | ||
3024b95b | 995 | /* The system headers under Alpha systems are generally C++-aware. */ |
996 | #define NO_IMPLICIT_EXTERN_C | |
5c5c1f00 | 997 | |
998 | #define TARGET_SUPPORTS_WIDE_INT 1 |