[thirdparty/gcc.git] / gcc / config / arm / aout.h

/* Definitions of target machine for GNU compiler, for ARM with a.out
   Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007
   Free Software Foundation, Inc.
   Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
   
   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

#ifndef ASM_APP_ON
#define ASM_APP_ON  		""
#endif
#ifndef ASM_APP_OFF
#define ASM_APP_OFF  		""
#endif

/* Switch to the text or data segment.  */
#define TEXT_SECTION_ASM_OP  	"\t.text"
#define DATA_SECTION_ASM_OP  	"\t.data"
#define BSS_SECTION_ASM_OP   	"\t.bss"

/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
   make sure that this change is reflected in the function
   coff_arm_is_local_label_name() in bfd/coff-arm.c.  */
#ifndef REGISTER_PREFIX
#define REGISTER_PREFIX 	""
#endif

#ifndef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX 	"_"
#endif

#ifndef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX 	""
#endif

/* The assembler's names for the registers.  Note that the ?xx registers are
   there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
   (each of which is overlaid on two S registers), although there are no
   actual single-precision registers which correspond to D16-D31.  */
#ifndef REGISTER_NAMES
#define REGISTER_NAMES				   \
{				                   \
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",  \
  "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc",  \
  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",  \
  "cc", "sfp", "afp",		   		   \
  "mv0",   "mv1",   "mv2",   "mv3",		   \
  "mv4",   "mv5",   "mv6",   "mv7",		   \
  "mv8",   "mv9",   "mv10",  "mv11",		   \
  "mv12",  "mv13",  "mv14",  "mv15",		   \
  "wcgr0", "wcgr1", "wcgr2", "wcgr3",		   \
  "wr0",   "wr1",   "wr2",   "wr3",		   \
  "wr4",   "wr5",   "wr6",   "wr7",		   \
  "wr8",   "wr9",   "wr10",  "wr11",		   \
  "wr12",  "wr13",  "wr14",  "wr15",		   \
  "s0",  "s1",  "s2",  "s3",  "s4",  "s5",  "s6",  "s7",  \
  "s8",  "s9",  "s10", "s11", "s12", "s13", "s14", "s15", \
  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
  "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
  "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
  "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
  "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
  "vfpcc"					   \
}
#endif

#ifndef ADDITIONAL_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES		\
{						\
  {"a1", 0},					\
  {"a2", 1},					\
  {"a3", 2},					\
  {"a4", 3},					\
  {"v1", 4},					\
  {"v2", 5},					\
  {"v3", 6},					\
  {"v4", 7},					\
  {"v5", 8},					\
  {"v6", 9},					\
  {"rfp", 9}, /* Gcc used to call it this */	\
  {"sb", 9},					\
  {"v7", 10},					\
  {"r10", 10},	/* sl */			\
  {"r11", 11},	/* fp */			\
  {"r12", 12},	/* ip */			\
  {"r13", 13},	/* sp */			\
  {"r14", 14},	/* lr */			\
  {"r15", 15},	/* pc */			\
  {"mvf0", 27},					\
  {"mvf1", 28},					\
  {"mvf2", 29},					\
  {"mvf3", 30},					\
  {"mvf4", 31},					\
  {"mvf5", 32},					\
  {"mvf6", 33},					\
  {"mvf7", 34},					\
  {"mvf8", 35},					\
  {"mvf9", 36},					\
  {"mvf10", 37},				\
  {"mvf11", 38},				\
  {"mvf12", 39},				\
  {"mvf13", 40},				\
  {"mvf14", 41},				\
  {"mvf15", 42},				\
  {"mvd0", 27},					\
  {"mvd1", 28},					\
  {"mvd2", 29},					\
  {"mvd3", 30},					\
  {"mvd4", 31},					\
  {"mvd5", 32},					\
  {"mvd6", 33},					\
  {"mvd7", 34},					\
  {"mvd8", 35},					\
  {"mvd9", 36},					\
  {"mvd10", 37},				\
  {"mvd11", 38},				\
  {"mvd12", 39},				\
  {"mvd13", 40},				\
  {"mvd14", 41},				\
  {"mvd15", 42},				\
  {"mvfx0", 27},				\
  {"mvfx1", 28},				\
  {"mvfx2", 29},				\
  {"mvfx3", 30},				\
  {"mvfx4", 31},				\
  {"mvfx5", 32},				\
  {"mvfx6", 33},				\
  {"mvfx7", 34},				\
  {"mvfx8", 35},				\
  {"mvfx9", 36},				\
  {"mvfx10", 37},				\
  {"mvfx11", 38},				\
  {"mvfx12", 39},				\
  {"mvfx13", 40},				\
  {"mvfx14", 41},				\
  {"mvfx15", 42},				\
  {"mvdx0", 27},				\
  {"mvdx1", 28},				\
  {"mvdx2", 29},				\
  {"mvdx3", 30},				\
  {"mvdx4", 31},				\
  {"mvdx5", 32},				\
  {"mvdx6", 33},				\
  {"mvdx7", 34},				\
  {"mvdx8", 35},				\
  {"mvdx9", 36},				\
  {"mvdx10", 37},				\
  {"mvdx11", 38},				\
  {"mvdx12", 39},				\
  {"mvdx13", 40},				\
  {"mvdx14", 41},				\
  {"mvdx15", 42},				\
  {"d0", 63}, {"q0", 63},			\
  {"d1", 65},					\
  {"d2", 67}, {"q1", 67},			\
  {"d3", 69},					\
  {"d4", 71}, {"q2", 71},			\
  {"d5", 73},					\
  {"d6", 75}, {"q3", 75},			\
  {"d7", 77},					\
  {"d8", 79}, {"q4", 79},			\
  {"d9", 81},					\
  {"d10", 83}, {"q5", 83},			\
  {"d11", 85},					\
  {"d12", 87}, {"q6", 87},			\
  {"d13", 89},					\
  {"d14", 91}, {"q7", 91},			\
  {"d15", 93},					\
  {"q8", 95},					\
  {"q9", 99},					\
  {"q10", 103},					\
  {"q11", 107},					\
  {"q12", 111},					\
  {"q13", 115},					\
  {"q14", 119},					\
  {"q15", 123}					\
}
#endif

#ifndef NO_DOLLAR_IN_LABEL
#define NO_DOLLAR_IN_LABEL 1
#endif

/* Generate DBX debugging information.  riscix.h will undefine this because
   the native assembler does not support stabs.  */
#define DBX_DEBUGGING_INFO 1

/* Acorn dbx moans about continuation chars, so don't use any.  */
#ifndef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH  0
#endif

/* Output a function label definition.  */
#ifndef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)	\
  do							\
    {							\
      ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL);   \
      ASM_OUTPUT_LABEL (STREAM, NAME);			\
    }							\
  while (0)
#endif

/* Globalizing directive for a label.  */
#define GLOBAL_ASM_OP "\t.global\t"

/* Make an internal label into a string.  */
#ifndef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
  sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
#endif
     
/* Output an element of a dispatch table.  */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)			\
  do								\
    {								\
      gcc_assert (!TARGET_THUMB2);				\
      asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE);		\
    }								\
  while (0)
	  

/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
   can be used.  For non-pic code where the offsets do not suitable for
   TBB/TBH the elements are output as absolute labels.  */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)		\
  do									\
    {									\
      if (TARGET_ARM)							\
	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE);			\
      else if (TARGET_THUMB1)						\
	asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", VALUE, REL);	\
      else /* Thumb-2 */						\
	{								\
	  switch (GET_MODE(body))					\
	    {								\
	    case QImode: /* TBB */					\
	      asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case HImode: /* TBH */					\
	      asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case SImode:						\
	      if (flag_pic)						\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	      else							\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);	\
	      break;							\
	    default:							\
	      gcc_unreachable();					\
	    }								\
	}								\
    }									\
  while (0)


#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN)  \
  output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)

/* Output a gap.  In fact we fill it with nulls.  */
#undef  ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) 	\
  fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))

/* Align output to a power of two.  Horrible /bin/as.  */
#ifndef ASM_OUTPUT_ALIGN  
#define ASM_OUTPUT_ALIGN(STREAM, POWER)			\
  do							\
    {							\
      register int amount = 1 << (POWER);		\
							\
      if (amount == 2)					\
	fprintf (STREAM, "\t.even\n");			\
      else if (amount != 1)				\
	fprintf (STREAM, "\t.align\t%d\n", amount - 4);	\
    }							\
  while (0)
#endif

/* Output a common block.  */
#ifndef ASM_OUTPUT_COMMON
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)	\
  do							\
    {							\
      fprintf (STREAM, "\t.comm\t");			\
      assemble_name (STREAM, NAME);			\
      asm_fprintf (STREAM, ", %d\t%@ %d\n", 		\
	           (int)(ROUNDED), (int)(SIZE));	\
    }							\
  while (0)
#endif
     
/* Output a local common block.  /bin/as can't do this, so hack a
   `.space' into the bss segment.  Note that this is *bad* practice,
   which is guaranteed NOT to work since it doesn't define STATIC
   COMMON space but merely STATIC BSS space.  */
#ifndef ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)		\
  do									\
    {									\
      switch_to_section (bss_section);					\
      ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT));	\
      ASM_OUTPUT_LABEL (STREAM, NAME);					\
      fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE));			\
    }									\
  while (0)
#endif
     
/* Output a zero-initialized block.  */
#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
  asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
#endif

/* Output a #ident directive.  */
#ifndef ASM_OUTPUT_IDENT
#define ASM_OUTPUT_IDENT(STREAM,STRING)  \
  asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
#endif
     
#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START 	"@"
#endif

/* This works for GAS and some other assemblers.  */
#define SET_ASM_OP		"\t.set\t"
Commit	Line	Data
9fb7806b	1	/* Definitions of target machine for GNU compiler, for ARM with a.out
5b3e6663	2	Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007
2398fb2a	3	Free Software Foundation, Inc.
ae3e1bb4	4	Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
9fb7806b	5
4f448245	6	This file is part of GCC.
9fb7806b	7
4f448245 NC	8	GCC is free software; you can redistribute it and/or modify it
4f448245 NC	9	under the terms of the GNU General Public License as published
2f83c7d6	10	by the Free Software Foundation; either version 3, or (at your
4f448245	11	option) any later version.
9fb7806b	12
4f448245 NC	13	GCC is distributed in the hope that it will be useful, but WITHOUT
	14	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	16	License for more details.
9fb7806b	17
4f448245	18	You should have received a copy of the GNU General Public License
2f83c7d6 NC	19	along with GCC; see the file COPYING3. If not see
2f83c7d6 NC	20	<http://www.gnu.org/licenses/>. */
9fb7806b	21
d5b7b3ae RE	22	#ifndef ASM_APP_ON
	23	#define ASM_APP_ON ""
	24	#endif
	25	#ifndef ASM_APP_OFF
	26	#define ASM_APP_OFF ""
	27	#endif
9fb7806b RE	28
9fb7806b RE	29	/* Switch to the text or data segment. */
93de6f51 HPN	30	#define TEXT_SECTION_ASM_OP "\t.text"
	31	#define DATA_SECTION_ASM_OP "\t.data"
	32	#define BSS_SECTION_ASM_OP "\t.bss"
b355a481 NC	33
	34	/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
	35	make sure that this change is reflected in the function
4f448245	36	coff_arm_is_local_label_name() in bfd/coff-arm.c. */
b355a481 NC	37	#ifndef REGISTER_PREFIX
	38	#define REGISTER_PREFIX ""
	39	#endif
	40
	41	#ifndef USER_LABEL_PREFIX
	42	#define USER_LABEL_PREFIX "_"
	43	#endif
	44
	45	#ifndef LOCAL_LABEL_PREFIX
	46	#define LOCAL_LABEL_PREFIX ""
	47	#endif
9fb7806b	48
f1adb0a9 JB	49	/* The assembler's names for the registers. Note that the ?xx registers are
	50	there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
	51	(each of which is overlaid on two S registers), although there are no
	52	actual single-precision registers which correspond to D16-D31. */
9fb7806b	53	#ifndef REGISTER_NAMES
9b66ebb1	54	#define REGISTER_NAMES \
9fb7806b RE	55	{ \
	56	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
	57	"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
	58	"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
9b6b54e2	59	"cc", "sfp", "afp", \
5a9335ef NC	60	"mv0", "mv1", "mv2", "mv3", \
	61	"mv4", "mv5", "mv6", "mv7", \
	62	"mv8", "mv9", "mv10", "mv11", \
	63	"mv12", "mv13", "mv14", "mv15", \
	64	"wcgr0", "wcgr1", "wcgr2", "wcgr3", \
	65	"wr0", "wr1", "wr2", "wr3", \
	66	"wr4", "wr5", "wr6", "wr7", \
	67	"wr8", "wr9", "wr10", "wr11", \
9b66ebb1 PB	68	"wr12", "wr13", "wr14", "wr15", \
	69	"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
	70	"s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
	71	"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
	72	"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
f1adb0a9 JB	73	"d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
	74	"d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
	75	"d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
	76	"d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
9b66ebb1	77	"vfpcc" \
9fb7806b RE	78	}
	79	#endif
	80
	81	#ifndef ADDITIONAL_REGISTER_NAMES
	82	#define ADDITIONAL_REGISTER_NAMES \
	83	{ \
	84	{"a1", 0}, \
	85	{"a2", 1}, \
	86	{"a3", 2}, \
	87	{"a4", 3}, \
	88	{"v1", 4}, \
	89	{"v2", 5}, \
	90	{"v3", 6}, \
	91	{"v4", 7}, \
	92	{"v5", 8}, \
	93	{"v6", 9}, \
	94	{"rfp", 9}, /* Gcc used to call it this */ \
	95	{"sb", 9}, \
	96	{"v7", 10}, \
	97	{"r10", 10}, /* sl */ \
	98	{"r11", 11}, /* fp */ \
	99	{"r12", 12}, /* ip */ \
	100	{"r13", 13}, /* sp */ \
	101	{"r14", 14}, /* lr */ \
9b6b54e2 NC	102	{"r15", 15}, /* pc */ \
	103	{"mvf0", 27}, \
	104	{"mvf1", 28}, \
	105	{"mvf2", 29}, \
	106	{"mvf3", 30}, \
	107	{"mvf4", 31}, \
	108	{"mvf5", 32}, \
	109	{"mvf6", 33}, \
	110	{"mvf7", 34}, \
	111	{"mvf8", 35}, \
	112	{"mvf9", 36}, \
	113	{"mvf10", 37}, \
	114	{"mvf11", 38}, \
	115	{"mvf12", 39}, \
	116	{"mvf13", 40}, \
	117	{"mvf14", 41}, \
	118	{"mvf15", 42}, \
	119	{"mvd0", 27}, \
	120	{"mvd1", 28}, \
	121	{"mvd2", 29}, \
	122	{"mvd3", 30}, \
	123	{"mvd4", 31}, \
	124	{"mvd5", 32}, \
	125	{"mvd6", 33}, \
	126	{"mvd7", 34}, \
	127	{"mvd8", 35}, \
	128	{"mvd9", 36}, \
	129	{"mvd10", 37}, \
	130	{"mvd11", 38}, \
	131	{"mvd12", 39}, \
	132	{"mvd13", 40}, \
	133	{"mvd14", 41}, \
	134	{"mvd15", 42}, \
	135	{"mvfx0", 27}, \
	136	{"mvfx1", 28}, \
	137	{"mvfx2", 29}, \
	138	{"mvfx3", 30}, \
	139	{"mvfx4", 31}, \
	140	{"mvfx5", 32}, \
	141	{"mvfx6", 33}, \
	142	{"mvfx7", 34}, \
	143	{"mvfx8", 35}, \
	144	{"mvfx9", 36}, \
	145	{"mvfx10", 37}, \
	146	{"mvfx11", 38}, \
	147	{"mvfx12", 39}, \
	148	{"mvfx13", 40}, \
	149	{"mvfx14", 41}, \
	150	{"mvfx15", 42}, \
	151	{"mvdx0", 27}, \
	152	{"mvdx1", 28}, \
	153	{"mvdx2", 29}, \
	154	{"mvdx3", 30}, \
	155	{"mvdx4", 31}, \
	156	{"mvdx5", 32}, \
	157	{"mvdx6", 33}, \
	158	{"mvdx7", 34}, \
	159	{"mvdx8", 35}, \
	160	{"mvdx9", 36}, \
	161	{"mvdx10", 37}, \
	162	{"mvdx11", 38}, \
	163	{"mvdx12", 39}, \
	164	{"mvdx13", 40}, \
	165	{"mvdx14", 41}, \
9b66ebb1	166	{"mvdx15", 42}, \
88f77cba	167	{"d0", 63}, {"q0", 63}, \
9b66ebb1	168	{"d1", 65}, \
88f77cba	169	{"d2", 67}, {"q1", 67}, \
9b66ebb1	170	{"d3", 69}, \
88f77cba	171	{"d4", 71}, {"q2", 71}, \
9b66ebb1	172	{"d5", 73}, \
88f77cba	173	{"d6", 75}, {"q3", 75}, \
9b66ebb1	174	{"d7", 77}, \
88f77cba	175	{"d8", 79}, {"q4", 79}, \
9b66ebb1	176	{"d9", 81}, \
88f77cba	177	{"d10", 83}, {"q5", 83}, \
9b66ebb1	178	{"d11", 85}, \
88f77cba	179	{"d12", 87}, {"q6", 87}, \
9b66ebb1	180	{"d13", 89}, \
88f77cba	181	{"d14", 91}, {"q7", 91}, \
9b66ebb1	182	{"d15", 93}, \
88f77cba JB	183	{"q8", 95}, \
	184	{"q9", 99}, \
	185	{"q10", 103}, \
	186	{"q11", 107}, \
	187	{"q12", 111}, \
	188	{"q13", 115}, \
	189	{"q14", 119}, \
	190	{"q15", 123} \
9fb7806b RE	191	}
	192	#endif
	193
be393ecf	194	#ifndef NO_DOLLAR_IN_LABEL
6cfc7210	195	#define NO_DOLLAR_IN_LABEL 1
be393ecf	196	#endif
9fb7806b	197
9fb7806b	198	/* Generate DBX debugging information. riscix.h will undefine this because
4f448245	199	the native assembler does not support stabs. */
23532de9	200	#define DBX_DEBUGGING_INFO 1
9fb7806b RE	201
	202	/* Acorn dbx moans about continuation chars, so don't use any. */
	203	#ifndef DBX_CONTIN_LENGTH
	204	#define DBX_CONTIN_LENGTH 0
	205	#endif
	206
9fb7806b	207	/* Output a function label definition. */
b355a481	208	#ifndef ASM_DECLARE_FUNCTION_NAME
6cfc7210 NC	209	#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
	210	do \
	211	{ \
	212	ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
	213	ASM_OUTPUT_LABEL (STREAM, NAME); \
	214	} \
	215	while (0)
b355a481	216	#endif
9fb7806b	217
506a61b1 KG	218	/* Globalizing directive for a label. */
506a61b1 KG	219	#define GLOBAL_ASM_OP "\t.global\t"
9fb7806b	220
9fb7806b	221	/* Make an internal label into a string. */
b355a481	222	#ifndef ASM_GENERATE_INTERNAL_LABEL
9fb7806b	223	#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
aec3cfba	224	sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
b355a481 NC	225	#endif
b355a481 NC	226
9fb7806b	227	/* Output an element of a dispatch table. */
5b3e6663 PB	228	#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
	229	do \
	230	{ \
	231	gcc_assert (!TARGET_THUMB2); \
	232	asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
	233	} \
	234	while (0)
	235
9fb7806b	236
5b3e6663 PB	237	/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
	238	can be used. For non-pic code where the offsets do not suitable for
	239	TBB/TBH the elements are output as absolute labels. */
657d9449 RE	240	#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
	241	do \
	242	{ \
	243	if (TARGET_ARM) \
	244	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
5b3e6663	245	else if (TARGET_THUMB1) \
657d9449	246	asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", VALUE, REL); \
5b3e6663 PB	247	else /* Thumb-2 */ \
	248	{ \
	249	switch (GET_MODE(body)) \
	250	{ \
	251	case QImode: /* TBB */ \
	252	asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
	253	VALUE, REL); \
	254	break; \
	255	case HImode: /* TBH */ \
	256	asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
	257	VALUE, REL); \
	258	break; \
	259	case SImode: \
	260	if (flag_pic) \
	261	asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	262	else \
	263	asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
	264	break; \
	265	default: \
	266	gcc_unreachable(); \
	267	} \
	268	} \
657d9449 RE	269	} \
	270	while (0)
	271
9fb7806b	272
be393ecf	273	#undef ASM_OUTPUT_ASCII
9fb7806b	274	#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
5a9335ef	275	output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
9fb7806b RE	276
9fb7806b RE	277	/* Output a gap. In fact we fill it with nulls. */
be393ecf	278	#undef ASM_OUTPUT_SKIP
b355a481	279	#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
5a9335ef	280	fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
9fb7806b RE	281
9fb7806b RE	282	/* Align output to a power of two. Horrible /bin/as. */
00275db1	283	#ifndef ASM_OUTPUT_ALIGN
6cfc7210 NC	284	#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
	285	do \
	286	{ \
	287	register int amount = 1 << (POWER); \
	288	\
	289	if (amount == 2) \
	290	fprintf (STREAM, "\t.even\n"); \
	291	else if (amount != 1) \
	292	fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
	293	} \
00275db1 PB	294	while (0)
00275db1 PB	295	#endif
9fb7806b	296
4f448245	297	/* Output a common block. */
b355a481	298	#ifndef ASM_OUTPUT_COMMON
6cfc7210 NC	299	#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
	300	do \
	301	{ \
	302	fprintf (STREAM, "\t.comm\t"); \
	303	assemble_name (STREAM, NAME); \
d5b7b3ae	304	asm_fprintf (STREAM, ", %d\t%@ %d\n", \
58e15542	305	(int)(ROUNDED), (int)(SIZE)); \
6cfc7210 NC	306	} \
6cfc7210 NC	307	while (0)
b355a481 NC	308	#endif
b355a481 NC	309
33f7f353	310	/* Output a local common block. /bin/as can't do this, so hack a
b355a481 NC	311	`.space' into the bss segment. Note that this is bad practice,
	312	which is guaranteed NOT to work since it doesn't define STATIC
	313	COMMON space but merely STATIC BSS space. */
	314	#ifndef ASM_OUTPUT_ALIGNED_LOCAL
6cfc7210 NC	315	#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
	316	do \
	317	{ \
d6b5193b	318	switch_to_section (bss_section); \
6cfc7210 NC	319	ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
6cfc7210 NC	320	ASM_OUTPUT_LABEL (STREAM, NAME); \
58e15542	321	fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
6cfc7210 NC	322	} \
6cfc7210 NC	323	while (0)
b355a481 NC	324	#endif
b355a481 NC	325
c9d9bc85	326	/* Output a zero-initialized block. */
b355a481	327	#ifndef ASM_OUTPUT_ALIGNED_BSS
6cfc7210	328	#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
b355a481 NC	329	asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
b355a481 NC	330	#endif
9fb7806b RE	331
9fb7806b RE	332	/* Output a #ident directive. */
b355a481	333	#ifndef ASM_OUTPUT_IDENT
9fb7806b	334	#define ASM_OUTPUT_IDENT(STREAM,STRING) \
d5b7b3ae	335	asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
b355a481 NC	336	#endif
b355a481 NC	337
9fb7806b	338	#ifndef ASM_COMMENT_START
b355a481	339	#define ASM_COMMENT_START "@"
9fb7806b RE	340	#endif
9fb7806b RE	341
ce29b9d0	342	/* This works for GAS and some other assemblers. */
93de6f51	343	#define SET_ASM_OP "\t.set\t"